1 /*
2  * bsru6.h - ALPS BSRU6 tuner support (moved from budget-ci.c)
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version 2
7  * of the License, or (at your option) any later version.
8  *
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * To obtain the license, point your browser to
16  * http://www.gnu.org/copyleft/gpl.html
17  *
18  *
19  * the project's page is at https://linuxtv.org
20  */
21 
22 #ifndef BSRU6_H
23 #define BSRU6_H
24 
25 static u8 alps_bsru6_inittab[] = {
26 	0x01, 0x15,
27 	0x02, 0x30,
28 	0x03, 0x00,
29 	0x04, 0x7d,   /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
30 	0x05, 0x35,   /* I2CT = 0, SCLT = 1, SDAT = 1 */
31 	0x06, 0x40,   /* DAC not used, set to high impendance mode */
32 	0x07, 0x00,   /* DAC LSB */
33 	0x08, 0x40,   /* DiSEqC off, LNB power on OP2/LOCK pin on */
34 	0x09, 0x00,   /* FIFO */
35 	0x0c, 0x51,   /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
36 	0x0d, 0x82,   /* DC offset compensation = ON, beta_agc1 = 2 */
37 	0x0e, 0x23,   /* alpha_tmg = 2, beta_tmg = 3 */
38 	0x10, 0x3f,   // AGC2  0x3d
39 	0x11, 0x84,
40 	0x12, 0xb9,
41 	0x15, 0xc9,   // lock detector threshold
42 	0x16, 0x00,
43 	0x17, 0x00,
44 	0x18, 0x00,
45 	0x19, 0x00,
46 	0x1a, 0x00,
47 	0x1f, 0x50,
48 	0x20, 0x00,
49 	0x21, 0x00,
50 	0x22, 0x00,
51 	0x23, 0x00,
52 	0x28, 0x00,  // out imp: normal  out type: parallel FEC mode:0
53 	0x29, 0x1e,  // 1/2 threshold
54 	0x2a, 0x14,  // 2/3 threshold
55 	0x2b, 0x0f,  // 3/4 threshold
56 	0x2c, 0x09,  // 5/6 threshold
57 	0x2d, 0x05,  // 7/8 threshold
58 	0x2e, 0x01,
59 	0x31, 0x1f,  // test all FECs
60 	0x32, 0x19,  // viterbi and synchro search
61 	0x33, 0xfc,  // rs control
62 	0x34, 0x93,  // error control
63 	0x0f, 0x52,
64 	0xff, 0xff
65 };
66 
67 static int alps_bsru6_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
68 {
69 	u8 aclk = 0;
70 	u8 bclk = 0;
71 
72 	if (srate < 1500000) {
73 		aclk = 0xb7;
74 		bclk = 0x47;
75 	} else if (srate < 3000000) {
76 		aclk = 0xb7;
77 		bclk = 0x4b;
78 	} else if (srate < 7000000) {
79 		aclk = 0xb7;
80 		bclk = 0x4f;
81 	} else if (srate < 14000000) {
82 		aclk = 0xb7;
83 		bclk = 0x53;
84 	} else if (srate < 30000000) {
85 		aclk = 0xb6;
86 		bclk = 0x53;
87 	} else if (srate < 45000000) {
88 		aclk = 0xb4;
89 		bclk = 0x51;
90 	}
91 
92 	stv0299_writereg(fe, 0x13, aclk);
93 	stv0299_writereg(fe, 0x14, bclk);
94 	stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
95 	stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
96 	stv0299_writereg(fe, 0x21, ratio & 0xf0);
97 
98 	return 0;
99 }
100 
101 static int alps_bsru6_tuner_set_params(struct dvb_frontend *fe)
102 {
103 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
104 	u8 buf[4];
105 	u32 div;
106 	struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
107 	struct i2c_adapter *i2c = fe->tuner_priv;
108 
109 	if ((p->frequency < 950000) || (p->frequency > 2150000))
110 		return -EINVAL;
111 
112 	div = (p->frequency + (125 - 1)) / 125;	/* round correctly */
113 	buf[0] = (div >> 8) & 0x7f;
114 	buf[1] = div & 0xff;
115 	buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
116 	buf[3] = 0xC4;
117 
118 	if (p->frequency > 1530000)
119 		buf[3] = 0xc0;
120 
121 	if (fe->ops.i2c_gate_ctrl)
122 		fe->ops.i2c_gate_ctrl(fe, 1);
123 	if (i2c_transfer(i2c, &msg, 1) != 1)
124 		return -EIO;
125 	return 0;
126 }
127 
128 static struct stv0299_config alps_bsru6_config = {
129 	.demod_address = 0x68,
130 	.inittab = alps_bsru6_inittab,
131 	.mclk = 88000000UL,
132 	.invert = 1,
133 	.skip_reinit = 0,
134 	.lock_output = STV0299_LOCKOUTPUT_1,
135 	.volt13_op0_op1 = STV0299_VOLT13_OP1,
136 	.min_delay_ms = 100,
137 	.set_symbol_rate = alps_bsru6_set_symbol_rate,
138 };
139 
140 #endif
141