1 /* 2 * bsru6.h - ALPS BSRU6 tuner support (moved from budget-ci.c) 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 19 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html 20 * 21 * 22 * the project's page is at https://linuxtv.org 23 */ 24 25 #ifndef BSRU6_H 26 #define BSRU6_H 27 28 static u8 alps_bsru6_inittab[] = { 29 0x01, 0x15, 30 0x02, 0x30, 31 0x03, 0x00, 32 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */ 33 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */ 34 0x06, 0x40, /* DAC not used, set to high impendance mode */ 35 0x07, 0x00, /* DAC LSB */ 36 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */ 37 0x09, 0x00, /* FIFO */ 38 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */ 39 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */ 40 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */ 41 0x10, 0x3f, // AGC2 0x3d 42 0x11, 0x84, 43 0x12, 0xb9, 44 0x15, 0xc9, // lock detector threshold 45 0x16, 0x00, 46 0x17, 0x00, 47 0x18, 0x00, 48 0x19, 0x00, 49 0x1a, 0x00, 50 0x1f, 0x50, 51 0x20, 0x00, 52 0x21, 0x00, 53 0x22, 0x00, 54 0x23, 0x00, 55 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0 56 0x29, 0x1e, // 1/2 threshold 57 0x2a, 0x14, // 2/3 threshold 58 0x2b, 0x0f, // 3/4 threshold 59 0x2c, 0x09, // 5/6 threshold 60 0x2d, 0x05, // 7/8 threshold 61 0x2e, 0x01, 62 0x31, 0x1f, // test all FECs 63 0x32, 0x19, // viterbi and synchro search 64 0x33, 0xfc, // rs control 65 0x34, 0x93, // error control 66 0x0f, 0x52, 67 0xff, 0xff 68 }; 69 70 static int alps_bsru6_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio) 71 { 72 u8 aclk = 0; 73 u8 bclk = 0; 74 75 if (srate < 1500000) { 76 aclk = 0xb7; 77 bclk = 0x47; 78 } else if (srate < 3000000) { 79 aclk = 0xb7; 80 bclk = 0x4b; 81 } else if (srate < 7000000) { 82 aclk = 0xb7; 83 bclk = 0x4f; 84 } else if (srate < 14000000) { 85 aclk = 0xb7; 86 bclk = 0x53; 87 } else if (srate < 30000000) { 88 aclk = 0xb6; 89 bclk = 0x53; 90 } else if (srate < 45000000) { 91 aclk = 0xb4; 92 bclk = 0x51; 93 } 94 95 stv0299_writereg(fe, 0x13, aclk); 96 stv0299_writereg(fe, 0x14, bclk); 97 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff); 98 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff); 99 stv0299_writereg(fe, 0x21, ratio & 0xf0); 100 101 return 0; 102 } 103 104 static int alps_bsru6_tuner_set_params(struct dvb_frontend *fe) 105 { 106 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 107 u8 buf[4]; 108 u32 div; 109 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) }; 110 struct i2c_adapter *i2c = fe->tuner_priv; 111 112 if ((p->frequency < 950000) || (p->frequency > 2150000)) 113 return -EINVAL; 114 115 div = (p->frequency + (125 - 1)) / 125; /* round correctly */ 116 buf[0] = (div >> 8) & 0x7f; 117 buf[1] = div & 0xff; 118 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4; 119 buf[3] = 0xC4; 120 121 if (p->frequency > 1530000) 122 buf[3] = 0xc0; 123 124 if (fe->ops.i2c_gate_ctrl) 125 fe->ops.i2c_gate_ctrl(fe, 1); 126 if (i2c_transfer(i2c, &msg, 1) != 1) 127 return -EIO; 128 return 0; 129 } 130 131 static struct stv0299_config alps_bsru6_config = { 132 .demod_address = 0x68, 133 .inittab = alps_bsru6_inittab, 134 .mclk = 88000000UL, 135 .invert = 1, 136 .skip_reinit = 0, 137 .lock_output = STV0299_LOCKOUTPUT_1, 138 .volt13_op0_op1 = STV0299_VOLT13_OP1, 139 .min_delay_ms = 100, 140 .set_symbol_rate = alps_bsru6_set_symbol_rate, 141 }; 142 143 #endif 144