19a0bf528SMauro Carvalho Chehab /*
29a0bf528SMauro Carvalho Chehab  * Afatech AF9033 demodulator driver
39a0bf528SMauro Carvalho Chehab  *
49a0bf528SMauro Carvalho Chehab  * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
59a0bf528SMauro Carvalho Chehab  * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
69a0bf528SMauro Carvalho Chehab  *
79a0bf528SMauro Carvalho Chehab  *    This program is free software; you can redistribute it and/or modify
89a0bf528SMauro Carvalho Chehab  *    it under the terms of the GNU General Public License as published by
99a0bf528SMauro Carvalho Chehab  *    the Free Software Foundation; either version 2 of the License, or
109a0bf528SMauro Carvalho Chehab  *    (at your option) any later version.
119a0bf528SMauro Carvalho Chehab  *
129a0bf528SMauro Carvalho Chehab  *    This program is distributed in the hope that it will be useful,
139a0bf528SMauro Carvalho Chehab  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
149a0bf528SMauro Carvalho Chehab  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
159a0bf528SMauro Carvalho Chehab  *    GNU General Public License for more details.
169a0bf528SMauro Carvalho Chehab  *
179a0bf528SMauro Carvalho Chehab  *    You should have received a copy of the GNU General Public License along
189a0bf528SMauro Carvalho Chehab  *    with this program; if not, write to the Free Software Foundation, Inc.,
199a0bf528SMauro Carvalho Chehab  *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
209a0bf528SMauro Carvalho Chehab  */
219a0bf528SMauro Carvalho Chehab 
229a0bf528SMauro Carvalho Chehab #include "af9033_priv.h"
239a0bf528SMauro Carvalho Chehab 
2437ebaf68SMauro Carvalho Chehab /* Max transfer size done by I2C transfer functions */
2537ebaf68SMauro Carvalho Chehab #define MAX_XFER_SIZE  64
2637ebaf68SMauro Carvalho Chehab 
2709611caaSAntti Palosaari struct af9033_dev {
28f5b00a76SAntti Palosaari 	struct i2c_client *client;
299a0bf528SMauro Carvalho Chehab 	struct dvb_frontend fe;
309a0bf528SMauro Carvalho Chehab 	struct af9033_config cfg;
3183f11619SAntti Palosaari 	bool is_af9035;
3283f11619SAntti Palosaari 	bool is_it9135;
339a0bf528SMauro Carvalho Chehab 
349a0bf528SMauro Carvalho Chehab 	u32 bandwidth_hz;
359a0bf528SMauro Carvalho Chehab 	bool ts_mode_parallel;
369a0bf528SMauro Carvalho Chehab 	bool ts_mode_serial;
379a0bf528SMauro Carvalho Chehab 
3883f11619SAntti Palosaari 	fe_status_t fe_status;
399a0bf528SMauro Carvalho Chehab 	u32 ber;
409a0bf528SMauro Carvalho Chehab 	u32 ucb;
41204f4319SAntti Palosaari 	u64 error_block_count;
42204f4319SAntti Palosaari 	u64 total_block_count;
4383f11619SAntti Palosaari 	struct delayed_work stat_work;
449a0bf528SMauro Carvalho Chehab 	unsigned long last_stat_check;
459a0bf528SMauro Carvalho Chehab };
469a0bf528SMauro Carvalho Chehab 
479a0bf528SMauro Carvalho Chehab /* write multiple registers */
4809611caaSAntti Palosaari static int af9033_wr_regs(struct af9033_dev *dev, u32 reg, const u8 *val,
499a0bf528SMauro Carvalho Chehab 		int len)
509a0bf528SMauro Carvalho Chehab {
519a0bf528SMauro Carvalho Chehab 	int ret;
5237ebaf68SMauro Carvalho Chehab 	u8 buf[MAX_XFER_SIZE];
539a0bf528SMauro Carvalho Chehab 	struct i2c_msg msg[1] = {
549a0bf528SMauro Carvalho Chehab 		{
55f5b00a76SAntti Palosaari 			.addr = dev->client->addr,
569a0bf528SMauro Carvalho Chehab 			.flags = 0,
5737ebaf68SMauro Carvalho Chehab 			.len = 3 + len,
589a0bf528SMauro Carvalho Chehab 			.buf = buf,
599a0bf528SMauro Carvalho Chehab 		}
609a0bf528SMauro Carvalho Chehab 	};
619a0bf528SMauro Carvalho Chehab 
6237ebaf68SMauro Carvalho Chehab 	if (3 + len > sizeof(buf)) {
63f5b00a76SAntti Palosaari 		dev_warn(&dev->client->dev,
646a087f1fSAntti Palosaari 				"i2c wr reg=%04x: len=%d is too big!\n",
656a087f1fSAntti Palosaari 				reg, len);
6637ebaf68SMauro Carvalho Chehab 		return -EINVAL;
6737ebaf68SMauro Carvalho Chehab 	}
6837ebaf68SMauro Carvalho Chehab 
699a0bf528SMauro Carvalho Chehab 	buf[0] = (reg >> 16) & 0xff;
709a0bf528SMauro Carvalho Chehab 	buf[1] = (reg >>  8) & 0xff;
719a0bf528SMauro Carvalho Chehab 	buf[2] = (reg >>  0) & 0xff;
729a0bf528SMauro Carvalho Chehab 	memcpy(&buf[3], val, len);
739a0bf528SMauro Carvalho Chehab 
74f5b00a76SAntti Palosaari 	ret = i2c_transfer(dev->client->adapter, msg, 1);
759a0bf528SMauro Carvalho Chehab 	if (ret == 1) {
769a0bf528SMauro Carvalho Chehab 		ret = 0;
779a0bf528SMauro Carvalho Chehab 	} else {
786a087f1fSAntti Palosaari 		dev_warn(&dev->client->dev, "i2c wr failed=%d reg=%06x len=%d\n",
796a087f1fSAntti Palosaari 				ret, reg, len);
809a0bf528SMauro Carvalho Chehab 		ret = -EREMOTEIO;
819a0bf528SMauro Carvalho Chehab 	}
829a0bf528SMauro Carvalho Chehab 
839a0bf528SMauro Carvalho Chehab 	return ret;
849a0bf528SMauro Carvalho Chehab }
859a0bf528SMauro Carvalho Chehab 
869a0bf528SMauro Carvalho Chehab /* read multiple registers */
8709611caaSAntti Palosaari static int af9033_rd_regs(struct af9033_dev *dev, u32 reg, u8 *val, int len)
889a0bf528SMauro Carvalho Chehab {
899a0bf528SMauro Carvalho Chehab 	int ret;
909a0bf528SMauro Carvalho Chehab 	u8 buf[3] = { (reg >> 16) & 0xff, (reg >> 8) & 0xff,
919a0bf528SMauro Carvalho Chehab 			(reg >> 0) & 0xff };
929a0bf528SMauro Carvalho Chehab 	struct i2c_msg msg[2] = {
939a0bf528SMauro Carvalho Chehab 		{
94f5b00a76SAntti Palosaari 			.addr = dev->client->addr,
959a0bf528SMauro Carvalho Chehab 			.flags = 0,
969a0bf528SMauro Carvalho Chehab 			.len = sizeof(buf),
979a0bf528SMauro Carvalho Chehab 			.buf = buf
989a0bf528SMauro Carvalho Chehab 		}, {
99f5b00a76SAntti Palosaari 			.addr = dev->client->addr,
1009a0bf528SMauro Carvalho Chehab 			.flags = I2C_M_RD,
1019a0bf528SMauro Carvalho Chehab 			.len = len,
1029a0bf528SMauro Carvalho Chehab 			.buf = val
1039a0bf528SMauro Carvalho Chehab 		}
1049a0bf528SMauro Carvalho Chehab 	};
1059a0bf528SMauro Carvalho Chehab 
106f5b00a76SAntti Palosaari 	ret = i2c_transfer(dev->client->adapter, msg, 2);
1079a0bf528SMauro Carvalho Chehab 	if (ret == 2) {
1089a0bf528SMauro Carvalho Chehab 		ret = 0;
1099a0bf528SMauro Carvalho Chehab 	} else {
1106a087f1fSAntti Palosaari 		dev_warn(&dev->client->dev, "i2c rd failed=%d reg=%06x len=%d\n",
1116a087f1fSAntti Palosaari 				ret, reg, len);
1129a0bf528SMauro Carvalho Chehab 		ret = -EREMOTEIO;
1139a0bf528SMauro Carvalho Chehab 	}
1149a0bf528SMauro Carvalho Chehab 
1159a0bf528SMauro Carvalho Chehab 	return ret;
1169a0bf528SMauro Carvalho Chehab }
1179a0bf528SMauro Carvalho Chehab 
1189a0bf528SMauro Carvalho Chehab 
1199a0bf528SMauro Carvalho Chehab /* write single register */
12009611caaSAntti Palosaari static int af9033_wr_reg(struct af9033_dev *dev, u32 reg, u8 val)
1219a0bf528SMauro Carvalho Chehab {
12209611caaSAntti Palosaari 	return af9033_wr_regs(dev, reg, &val, 1);
1239a0bf528SMauro Carvalho Chehab }
1249a0bf528SMauro Carvalho Chehab 
1259a0bf528SMauro Carvalho Chehab /* read single register */
12609611caaSAntti Palosaari static int af9033_rd_reg(struct af9033_dev *dev, u32 reg, u8 *val)
1279a0bf528SMauro Carvalho Chehab {
12809611caaSAntti Palosaari 	return af9033_rd_regs(dev, reg, val, 1);
1299a0bf528SMauro Carvalho Chehab }
1309a0bf528SMauro Carvalho Chehab 
1319a0bf528SMauro Carvalho Chehab /* write single register with mask */
13209611caaSAntti Palosaari static int af9033_wr_reg_mask(struct af9033_dev *dev, u32 reg, u8 val,
1339a0bf528SMauro Carvalho Chehab 		u8 mask)
1349a0bf528SMauro Carvalho Chehab {
1359a0bf528SMauro Carvalho Chehab 	int ret;
1369a0bf528SMauro Carvalho Chehab 	u8 tmp;
1379a0bf528SMauro Carvalho Chehab 
1389a0bf528SMauro Carvalho Chehab 	/* no need for read if whole reg is written */
1399a0bf528SMauro Carvalho Chehab 	if (mask != 0xff) {
14009611caaSAntti Palosaari 		ret = af9033_rd_regs(dev, reg, &tmp, 1);
1419a0bf528SMauro Carvalho Chehab 		if (ret)
1429a0bf528SMauro Carvalho Chehab 			return ret;
1439a0bf528SMauro Carvalho Chehab 
1449a0bf528SMauro Carvalho Chehab 		val &= mask;
1459a0bf528SMauro Carvalho Chehab 		tmp &= ~mask;
1469a0bf528SMauro Carvalho Chehab 		val |= tmp;
1479a0bf528SMauro Carvalho Chehab 	}
1489a0bf528SMauro Carvalho Chehab 
14909611caaSAntti Palosaari 	return af9033_wr_regs(dev, reg, &val, 1);
1509a0bf528SMauro Carvalho Chehab }
1519a0bf528SMauro Carvalho Chehab 
1529a0bf528SMauro Carvalho Chehab /* read single register with mask */
15309611caaSAntti Palosaari static int af9033_rd_reg_mask(struct af9033_dev *dev, u32 reg, u8 *val,
1549a0bf528SMauro Carvalho Chehab 		u8 mask)
1559a0bf528SMauro Carvalho Chehab {
1569a0bf528SMauro Carvalho Chehab 	int ret, i;
1579a0bf528SMauro Carvalho Chehab 	u8 tmp;
1589a0bf528SMauro Carvalho Chehab 
15909611caaSAntti Palosaari 	ret = af9033_rd_regs(dev, reg, &tmp, 1);
1609a0bf528SMauro Carvalho Chehab 	if (ret)
1619a0bf528SMauro Carvalho Chehab 		return ret;
1629a0bf528SMauro Carvalho Chehab 
1639a0bf528SMauro Carvalho Chehab 	tmp &= mask;
1649a0bf528SMauro Carvalho Chehab 
1659a0bf528SMauro Carvalho Chehab 	/* find position of the first bit */
1669a0bf528SMauro Carvalho Chehab 	for (i = 0; i < 8; i++) {
1679a0bf528SMauro Carvalho Chehab 		if ((mask >> i) & 0x01)
1689a0bf528SMauro Carvalho Chehab 			break;
1699a0bf528SMauro Carvalho Chehab 	}
1709a0bf528SMauro Carvalho Chehab 	*val = tmp >> i;
1719a0bf528SMauro Carvalho Chehab 
1729a0bf528SMauro Carvalho Chehab 	return 0;
1739a0bf528SMauro Carvalho Chehab }
1749a0bf528SMauro Carvalho Chehab 
1753bf5e552SAntti Palosaari /* write reg val table using reg addr auto increment */
17609611caaSAntti Palosaari static int af9033_wr_reg_val_tab(struct af9033_dev *dev,
1773bf5e552SAntti Palosaari 		const struct reg_val *tab, int tab_len)
1783bf5e552SAntti Palosaari {
179d18a88b1SAntti Palosaari #define MAX_TAB_LEN 212
1803bf5e552SAntti Palosaari 	int ret, i, j;
181d18a88b1SAntti Palosaari 	u8 buf[1 + MAX_TAB_LEN];
182d18a88b1SAntti Palosaari 
1836a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "tab_len=%d\n", tab_len);
18437ebaf68SMauro Carvalho Chehab 
18537ebaf68SMauro Carvalho Chehab 	if (tab_len > sizeof(buf)) {
1866a087f1fSAntti Palosaari 		dev_warn(&dev->client->dev, "tab len %d is too big\n", tab_len);
18737ebaf68SMauro Carvalho Chehab 		return -EINVAL;
18837ebaf68SMauro Carvalho Chehab 	}
1893bf5e552SAntti Palosaari 
1903bf5e552SAntti Palosaari 	for (i = 0, j = 0; i < tab_len; i++) {
1913bf5e552SAntti Palosaari 		buf[j] = tab[i].val;
1923bf5e552SAntti Palosaari 
1933bf5e552SAntti Palosaari 		if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1) {
19409611caaSAntti Palosaari 			ret = af9033_wr_regs(dev, tab[i].reg - j, buf, j + 1);
1953bf5e552SAntti Palosaari 			if (ret < 0)
1963bf5e552SAntti Palosaari 				goto err;
1973bf5e552SAntti Palosaari 
1983bf5e552SAntti Palosaari 			j = 0;
1993bf5e552SAntti Palosaari 		} else {
2003bf5e552SAntti Palosaari 			j++;
2013bf5e552SAntti Palosaari 		}
2023bf5e552SAntti Palosaari 	}
2033bf5e552SAntti Palosaari 
2043bf5e552SAntti Palosaari 	return 0;
2053bf5e552SAntti Palosaari 
2063bf5e552SAntti Palosaari err:
2076a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "failed=%d\n", ret);
2083bf5e552SAntti Palosaari 
2093bf5e552SAntti Palosaari 	return ret;
2103bf5e552SAntti Palosaari }
2113bf5e552SAntti Palosaari 
21209611caaSAntti Palosaari static u32 af9033_div(struct af9033_dev *dev, u32 a, u32 b, u32 x)
2139a0bf528SMauro Carvalho Chehab {
2149a0bf528SMauro Carvalho Chehab 	u32 r = 0, c = 0, i;
2159a0bf528SMauro Carvalho Chehab 
2166a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "a=%d b=%d x=%d\n", a, b, x);
2179a0bf528SMauro Carvalho Chehab 
2189a0bf528SMauro Carvalho Chehab 	if (a > b) {
2199a0bf528SMauro Carvalho Chehab 		c = a / b;
2209a0bf528SMauro Carvalho Chehab 		a = a - c * b;
2219a0bf528SMauro Carvalho Chehab 	}
2229a0bf528SMauro Carvalho Chehab 
2239a0bf528SMauro Carvalho Chehab 	for (i = 0; i < x; i++) {
2249a0bf528SMauro Carvalho Chehab 		if (a >= b) {
2259a0bf528SMauro Carvalho Chehab 			r += 1;
2269a0bf528SMauro Carvalho Chehab 			a -= b;
2279a0bf528SMauro Carvalho Chehab 		}
2289a0bf528SMauro Carvalho Chehab 		a <<= 1;
2299a0bf528SMauro Carvalho Chehab 		r <<= 1;
2309a0bf528SMauro Carvalho Chehab 	}
2319a0bf528SMauro Carvalho Chehab 	r = (c << (u32)x) + r;
2329a0bf528SMauro Carvalho Chehab 
2336a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "a=%d b=%d x=%d r=%d r=%x\n", a, b, x, r, r);
2349a0bf528SMauro Carvalho Chehab 
2359a0bf528SMauro Carvalho Chehab 	return r;
2369a0bf528SMauro Carvalho Chehab }
2379a0bf528SMauro Carvalho Chehab 
2389a0bf528SMauro Carvalho Chehab static int af9033_init(struct dvb_frontend *fe)
2399a0bf528SMauro Carvalho Chehab {
24009611caaSAntti Palosaari 	struct af9033_dev *dev = fe->demodulator_priv;
2419a0bf528SMauro Carvalho Chehab 	int ret, i, len;
2429a0bf528SMauro Carvalho Chehab 	const struct reg_val *init;
2439a0bf528SMauro Carvalho Chehab 	u8 buf[4];
2449a0bf528SMauro Carvalho Chehab 	u32 adc_cw, clock_cw;
2459a0bf528SMauro Carvalho Chehab 	struct reg_val_mask tab[] = {
2469a0bf528SMauro Carvalho Chehab 		{ 0x80fb24, 0x00, 0x08 },
2479a0bf528SMauro Carvalho Chehab 		{ 0x80004c, 0x00, 0xff },
24809611caaSAntti Palosaari 		{ 0x00f641, dev->cfg.tuner, 0xff },
2499a0bf528SMauro Carvalho Chehab 		{ 0x80f5ca, 0x01, 0x01 },
2509a0bf528SMauro Carvalho Chehab 		{ 0x80f715, 0x01, 0x01 },
2519a0bf528SMauro Carvalho Chehab 		{ 0x00f41f, 0x04, 0x04 },
2529a0bf528SMauro Carvalho Chehab 		{ 0x00f41a, 0x01, 0x01 },
2539a0bf528SMauro Carvalho Chehab 		{ 0x80f731, 0x00, 0x01 },
2549a0bf528SMauro Carvalho Chehab 		{ 0x00d91e, 0x00, 0x01 },
2559a0bf528SMauro Carvalho Chehab 		{ 0x00d919, 0x00, 0x01 },
2569a0bf528SMauro Carvalho Chehab 		{ 0x80f732, 0x00, 0x01 },
2579a0bf528SMauro Carvalho Chehab 		{ 0x00d91f, 0x00, 0x01 },
2589a0bf528SMauro Carvalho Chehab 		{ 0x00d91a, 0x00, 0x01 },
2599a0bf528SMauro Carvalho Chehab 		{ 0x80f730, 0x00, 0x01 },
2609a0bf528SMauro Carvalho Chehab 		{ 0x80f778, 0x00, 0xff },
2619a0bf528SMauro Carvalho Chehab 		{ 0x80f73c, 0x01, 0x01 },
2629a0bf528SMauro Carvalho Chehab 		{ 0x80f776, 0x00, 0x01 },
2639a0bf528SMauro Carvalho Chehab 		{ 0x00d8fd, 0x01, 0xff },
2649a0bf528SMauro Carvalho Chehab 		{ 0x00d830, 0x01, 0xff },
2659a0bf528SMauro Carvalho Chehab 		{ 0x00d831, 0x00, 0xff },
2669a0bf528SMauro Carvalho Chehab 		{ 0x00d832, 0x00, 0xff },
26709611caaSAntti Palosaari 		{ 0x80f985, dev->ts_mode_serial, 0x01 },
26809611caaSAntti Palosaari 		{ 0x80f986, dev->ts_mode_parallel, 0x01 },
2699a0bf528SMauro Carvalho Chehab 		{ 0x00d827, 0x00, 0xff },
2709a0bf528SMauro Carvalho Chehab 		{ 0x00d829, 0x00, 0xff },
27109611caaSAntti Palosaari 		{ 0x800045, dev->cfg.adc_multiplier, 0xff },
2729a0bf528SMauro Carvalho Chehab 	};
2739a0bf528SMauro Carvalho Chehab 
2749a0bf528SMauro Carvalho Chehab 	/* program clock control */
27509611caaSAntti Palosaari 	clock_cw = af9033_div(dev, dev->cfg.clock, 1000000ul, 19ul);
2769a0bf528SMauro Carvalho Chehab 	buf[0] = (clock_cw >>  0) & 0xff;
2779a0bf528SMauro Carvalho Chehab 	buf[1] = (clock_cw >>  8) & 0xff;
2789a0bf528SMauro Carvalho Chehab 	buf[2] = (clock_cw >> 16) & 0xff;
2799a0bf528SMauro Carvalho Chehab 	buf[3] = (clock_cw >> 24) & 0xff;
2809a0bf528SMauro Carvalho Chehab 
2816a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "clock=%d clock_cw=%08x\n",
2826a087f1fSAntti Palosaari 			dev->cfg.clock, clock_cw);
2839a0bf528SMauro Carvalho Chehab 
28409611caaSAntti Palosaari 	ret = af9033_wr_regs(dev, 0x800025, buf, 4);
2859a0bf528SMauro Carvalho Chehab 	if (ret < 0)
2869a0bf528SMauro Carvalho Chehab 		goto err;
2879a0bf528SMauro Carvalho Chehab 
2889a0bf528SMauro Carvalho Chehab 	/* program ADC control */
2899a0bf528SMauro Carvalho Chehab 	for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
29009611caaSAntti Palosaari 		if (clock_adc_lut[i].clock == dev->cfg.clock)
2919a0bf528SMauro Carvalho Chehab 			break;
2929a0bf528SMauro Carvalho Chehab 	}
2939a0bf528SMauro Carvalho Chehab 
29409611caaSAntti Palosaari 	adc_cw = af9033_div(dev, clock_adc_lut[i].adc, 1000000ul, 19ul);
2959a0bf528SMauro Carvalho Chehab 	buf[0] = (adc_cw >>  0) & 0xff;
2969a0bf528SMauro Carvalho Chehab 	buf[1] = (adc_cw >>  8) & 0xff;
2979a0bf528SMauro Carvalho Chehab 	buf[2] = (adc_cw >> 16) & 0xff;
2989a0bf528SMauro Carvalho Chehab 
2996a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "adc=%d adc_cw=%06x\n",
3006a087f1fSAntti Palosaari 			clock_adc_lut[i].adc, adc_cw);
3019a0bf528SMauro Carvalho Chehab 
30209611caaSAntti Palosaari 	ret = af9033_wr_regs(dev, 0x80f1cd, buf, 3);
3039a0bf528SMauro Carvalho Chehab 	if (ret < 0)
3049a0bf528SMauro Carvalho Chehab 		goto err;
3059a0bf528SMauro Carvalho Chehab 
3069a0bf528SMauro Carvalho Chehab 	/* program register table */
3079a0bf528SMauro Carvalho Chehab 	for (i = 0; i < ARRAY_SIZE(tab); i++) {
30809611caaSAntti Palosaari 		ret = af9033_wr_reg_mask(dev, tab[i].reg, tab[i].val,
3099a0bf528SMauro Carvalho Chehab 				tab[i].mask);
3109a0bf528SMauro Carvalho Chehab 		if (ret < 0)
3119a0bf528SMauro Carvalho Chehab 			goto err;
3129a0bf528SMauro Carvalho Chehab 	}
3139a0bf528SMauro Carvalho Chehab 
314ca681fe0SAntti Palosaari 	/* clock output */
31509611caaSAntti Palosaari 	if (dev->cfg.dyn0_clk) {
31609611caaSAntti Palosaari 		ret = af9033_wr_reg(dev, 0x80fba8, 0x00);
3179dc0f3feSAntti Palosaari 		if (ret < 0)
3189dc0f3feSAntti Palosaari 			goto err;
3199dc0f3feSAntti Palosaari 	}
3209dc0f3feSAntti Palosaari 
3219a0bf528SMauro Carvalho Chehab 	/* settings for TS interface */
32209611caaSAntti Palosaari 	if (dev->cfg.ts_mode == AF9033_TS_MODE_USB) {
32309611caaSAntti Palosaari 		ret = af9033_wr_reg_mask(dev, 0x80f9a5, 0x00, 0x01);
3249a0bf528SMauro Carvalho Chehab 		if (ret < 0)
3259a0bf528SMauro Carvalho Chehab 			goto err;
3269a0bf528SMauro Carvalho Chehab 
32709611caaSAntti Palosaari 		ret = af9033_wr_reg_mask(dev, 0x80f9b5, 0x01, 0x01);
3289a0bf528SMauro Carvalho Chehab 		if (ret < 0)
3299a0bf528SMauro Carvalho Chehab 			goto err;
3309a0bf528SMauro Carvalho Chehab 	} else {
33109611caaSAntti Palosaari 		ret = af9033_wr_reg_mask(dev, 0x80f990, 0x00, 0x01);
3329a0bf528SMauro Carvalho Chehab 		if (ret < 0)
3339a0bf528SMauro Carvalho Chehab 			goto err;
3349a0bf528SMauro Carvalho Chehab 
33509611caaSAntti Palosaari 		ret = af9033_wr_reg_mask(dev, 0x80f9b5, 0x00, 0x01);
3369a0bf528SMauro Carvalho Chehab 		if (ret < 0)
3379a0bf528SMauro Carvalho Chehab 			goto err;
3389a0bf528SMauro Carvalho Chehab 	}
3399a0bf528SMauro Carvalho Chehab 
3409a0bf528SMauro Carvalho Chehab 	/* load OFSM settings */
3416a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "load ofsm settings\n");
34209611caaSAntti Palosaari 	switch (dev->cfg.tuner) {
343fe8eece1SAntti Palosaari 	case AF9033_TUNER_IT9135_38:
344fe8eece1SAntti Palosaari 	case AF9033_TUNER_IT9135_51:
345fe8eece1SAntti Palosaari 	case AF9033_TUNER_IT9135_52:
346463c399cSAntti Palosaari 		len = ARRAY_SIZE(ofsm_init_it9135_v1);
347463c399cSAntti Palosaari 		init = ofsm_init_it9135_v1;
348463c399cSAntti Palosaari 		break;
349fe8eece1SAntti Palosaari 	case AF9033_TUNER_IT9135_60:
350fe8eece1SAntti Palosaari 	case AF9033_TUNER_IT9135_61:
351fe8eece1SAntti Palosaari 	case AF9033_TUNER_IT9135_62:
352463c399cSAntti Palosaari 		len = ARRAY_SIZE(ofsm_init_it9135_v2);
353463c399cSAntti Palosaari 		init = ofsm_init_it9135_v2;
354fe8eece1SAntti Palosaari 		break;
355fe8eece1SAntti Palosaari 	default:
3569a0bf528SMauro Carvalho Chehab 		len = ARRAY_SIZE(ofsm_init);
3579a0bf528SMauro Carvalho Chehab 		init = ofsm_init;
358fe8eece1SAntti Palosaari 		break;
359fe8eece1SAntti Palosaari 	}
360fe8eece1SAntti Palosaari 
36109611caaSAntti Palosaari 	ret = af9033_wr_reg_val_tab(dev, init, len);
3629a0bf528SMauro Carvalho Chehab 	if (ret < 0)
3639a0bf528SMauro Carvalho Chehab 		goto err;
3649a0bf528SMauro Carvalho Chehab 
3659a0bf528SMauro Carvalho Chehab 	/* load tuner specific settings */
3666a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "load tuner specific settings\n");
36709611caaSAntti Palosaari 	switch (dev->cfg.tuner) {
3689a0bf528SMauro Carvalho Chehab 	case AF9033_TUNER_TUA9001:
3699a0bf528SMauro Carvalho Chehab 		len = ARRAY_SIZE(tuner_init_tua9001);
3709a0bf528SMauro Carvalho Chehab 		init = tuner_init_tua9001;
3719a0bf528SMauro Carvalho Chehab 		break;
3729a0bf528SMauro Carvalho Chehab 	case AF9033_TUNER_FC0011:
3739a0bf528SMauro Carvalho Chehab 		len = ARRAY_SIZE(tuner_init_fc0011);
3749a0bf528SMauro Carvalho Chehab 		init = tuner_init_fc0011;
3759a0bf528SMauro Carvalho Chehab 		break;
3769a0bf528SMauro Carvalho Chehab 	case AF9033_TUNER_MXL5007T:
3779a0bf528SMauro Carvalho Chehab 		len = ARRAY_SIZE(tuner_init_mxl5007t);
3789a0bf528SMauro Carvalho Chehab 		init = tuner_init_mxl5007t;
3799a0bf528SMauro Carvalho Chehab 		break;
3809a0bf528SMauro Carvalho Chehab 	case AF9033_TUNER_TDA18218:
3819a0bf528SMauro Carvalho Chehab 		len = ARRAY_SIZE(tuner_init_tda18218);
3829a0bf528SMauro Carvalho Chehab 		init = tuner_init_tda18218;
3839a0bf528SMauro Carvalho Chehab 		break;
384d67ceb33SOliver Schinagl 	case AF9033_TUNER_FC2580:
385d67ceb33SOliver Schinagl 		len = ARRAY_SIZE(tuner_init_fc2580);
386d67ceb33SOliver Schinagl 		init = tuner_init_fc2580;
387d67ceb33SOliver Schinagl 		break;
388e713ad15SAntti Palosaari 	case AF9033_TUNER_FC0012:
389e713ad15SAntti Palosaari 		len = ARRAY_SIZE(tuner_init_fc0012);
390e713ad15SAntti Palosaari 		init = tuner_init_fc0012;
391e713ad15SAntti Palosaari 		break;
3924902bb39SAntti Palosaari 	case AF9033_TUNER_IT9135_38:
393a72cbb77SAntti Palosaari 		len = ARRAY_SIZE(tuner_init_it9135_38);
394a72cbb77SAntti Palosaari 		init = tuner_init_it9135_38;
395a72cbb77SAntti Palosaari 		break;
3964902bb39SAntti Palosaari 	case AF9033_TUNER_IT9135_51:
397bb2e12a6SAntti Palosaari 		len = ARRAY_SIZE(tuner_init_it9135_51);
398bb2e12a6SAntti Palosaari 		init = tuner_init_it9135_51;
399bb2e12a6SAntti Palosaari 		break;
4004902bb39SAntti Palosaari 	case AF9033_TUNER_IT9135_52:
40122d729f3SAntti Palosaari 		len = ARRAY_SIZE(tuner_init_it9135_52);
40222d729f3SAntti Palosaari 		init = tuner_init_it9135_52;
40322d729f3SAntti Palosaari 		break;
4044902bb39SAntti Palosaari 	case AF9033_TUNER_IT9135_60:
405a49f53a0SAntti Palosaari 		len = ARRAY_SIZE(tuner_init_it9135_60);
406a49f53a0SAntti Palosaari 		init = tuner_init_it9135_60;
407a49f53a0SAntti Palosaari 		break;
4084902bb39SAntti Palosaari 	case AF9033_TUNER_IT9135_61:
40985211323SAntti Palosaari 		len = ARRAY_SIZE(tuner_init_it9135_61);
41085211323SAntti Palosaari 		init = tuner_init_it9135_61;
41185211323SAntti Palosaari 		break;
4124902bb39SAntti Palosaari 	case AF9033_TUNER_IT9135_62:
413dc4a2c40SAntti Palosaari 		len = ARRAY_SIZE(tuner_init_it9135_62);
414dc4a2c40SAntti Palosaari 		init = tuner_init_it9135_62;
4154902bb39SAntti Palosaari 		break;
4169a0bf528SMauro Carvalho Chehab 	default:
4176a087f1fSAntti Palosaari 		dev_dbg(&dev->client->dev, "unsupported tuner ID=%d\n",
4186a087f1fSAntti Palosaari 				dev->cfg.tuner);
4199a0bf528SMauro Carvalho Chehab 		ret = -ENODEV;
4209a0bf528SMauro Carvalho Chehab 		goto err;
4219a0bf528SMauro Carvalho Chehab 	}
4229a0bf528SMauro Carvalho Chehab 
42309611caaSAntti Palosaari 	ret = af9033_wr_reg_val_tab(dev, init, len);
4249a0bf528SMauro Carvalho Chehab 	if (ret < 0)
4259a0bf528SMauro Carvalho Chehab 		goto err;
4269a0bf528SMauro Carvalho Chehab 
42709611caaSAntti Palosaari 	if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
42809611caaSAntti Palosaari 		ret = af9033_wr_reg_mask(dev, 0x00d91c, 0x01, 0x01);
4299805992fSJose Alberto Reguero 		if (ret < 0)
4309805992fSJose Alberto Reguero 			goto err;
431bf97b637SAntti Palosaari 
43209611caaSAntti Palosaari 		ret = af9033_wr_reg_mask(dev, 0x00d917, 0x00, 0x01);
4339805992fSJose Alberto Reguero 		if (ret < 0)
4349805992fSJose Alberto Reguero 			goto err;
435bf97b637SAntti Palosaari 
43609611caaSAntti Palosaari 		ret = af9033_wr_reg_mask(dev, 0x00d916, 0x00, 0x01);
4379805992fSJose Alberto Reguero 		if (ret < 0)
4389805992fSJose Alberto Reguero 			goto err;
4399805992fSJose Alberto Reguero 	}
4409805992fSJose Alberto Reguero 
44109611caaSAntti Palosaari 	switch (dev->cfg.tuner) {
442086991ddSAntti Palosaari 	case AF9033_TUNER_IT9135_60:
443086991ddSAntti Palosaari 	case AF9033_TUNER_IT9135_61:
444086991ddSAntti Palosaari 	case AF9033_TUNER_IT9135_62:
44509611caaSAntti Palosaari 		ret = af9033_wr_reg(dev, 0x800000, 0x01);
446086991ddSAntti Palosaari 		if (ret < 0)
447086991ddSAntti Palosaari 			goto err;
448086991ddSAntti Palosaari 	}
449086991ddSAntti Palosaari 
45009611caaSAntti Palosaari 	dev->bandwidth_hz = 0; /* force to program all parameters */
45183f11619SAntti Palosaari 	/* start statistics polling */
45283f11619SAntti Palosaari 	schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
4539a0bf528SMauro Carvalho Chehab 
4549a0bf528SMauro Carvalho Chehab 	return 0;
4559a0bf528SMauro Carvalho Chehab 
4569a0bf528SMauro Carvalho Chehab err:
4576a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "failed=%d\n", ret);
4589a0bf528SMauro Carvalho Chehab 
4599a0bf528SMauro Carvalho Chehab 	return ret;
4609a0bf528SMauro Carvalho Chehab }
4619a0bf528SMauro Carvalho Chehab 
4629a0bf528SMauro Carvalho Chehab static int af9033_sleep(struct dvb_frontend *fe)
4639a0bf528SMauro Carvalho Chehab {
46409611caaSAntti Palosaari 	struct af9033_dev *dev = fe->demodulator_priv;
4659a0bf528SMauro Carvalho Chehab 	int ret, i;
4669a0bf528SMauro Carvalho Chehab 	u8 tmp;
4679a0bf528SMauro Carvalho Chehab 
46883f11619SAntti Palosaari 	/* stop statistics polling */
46983f11619SAntti Palosaari 	cancel_delayed_work_sync(&dev->stat_work);
47083f11619SAntti Palosaari 
47109611caaSAntti Palosaari 	ret = af9033_wr_reg(dev, 0x80004c, 1);
4729a0bf528SMauro Carvalho Chehab 	if (ret < 0)
4739a0bf528SMauro Carvalho Chehab 		goto err;
4749a0bf528SMauro Carvalho Chehab 
47509611caaSAntti Palosaari 	ret = af9033_wr_reg(dev, 0x800000, 0);
4769a0bf528SMauro Carvalho Chehab 	if (ret < 0)
4779a0bf528SMauro Carvalho Chehab 		goto err;
4789a0bf528SMauro Carvalho Chehab 
4799a0bf528SMauro Carvalho Chehab 	for (i = 100, tmp = 1; i && tmp; i--) {
48009611caaSAntti Palosaari 		ret = af9033_rd_reg(dev, 0x80004c, &tmp);
4819a0bf528SMauro Carvalho Chehab 		if (ret < 0)
4829a0bf528SMauro Carvalho Chehab 			goto err;
4839a0bf528SMauro Carvalho Chehab 
4849a0bf528SMauro Carvalho Chehab 		usleep_range(200, 10000);
4859a0bf528SMauro Carvalho Chehab 	}
4869a0bf528SMauro Carvalho Chehab 
4876a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "loop=%d\n", i);
4889a0bf528SMauro Carvalho Chehab 
4899a0bf528SMauro Carvalho Chehab 	if (i == 0) {
4909a0bf528SMauro Carvalho Chehab 		ret = -ETIMEDOUT;
4919a0bf528SMauro Carvalho Chehab 		goto err;
4929a0bf528SMauro Carvalho Chehab 	}
4939a0bf528SMauro Carvalho Chehab 
49409611caaSAntti Palosaari 	ret = af9033_wr_reg_mask(dev, 0x80fb24, 0x08, 0x08);
4959a0bf528SMauro Carvalho Chehab 	if (ret < 0)
4969a0bf528SMauro Carvalho Chehab 		goto err;
4979a0bf528SMauro Carvalho Chehab 
4989a0bf528SMauro Carvalho Chehab 	/* prevent current leak (?) */
49909611caaSAntti Palosaari 	if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
5009a0bf528SMauro Carvalho Chehab 		/* enable parallel TS */
50109611caaSAntti Palosaari 		ret = af9033_wr_reg_mask(dev, 0x00d917, 0x00, 0x01);
5029a0bf528SMauro Carvalho Chehab 		if (ret < 0)
5039a0bf528SMauro Carvalho Chehab 			goto err;
5049a0bf528SMauro Carvalho Chehab 
50509611caaSAntti Palosaari 		ret = af9033_wr_reg_mask(dev, 0x00d916, 0x01, 0x01);
5069a0bf528SMauro Carvalho Chehab 		if (ret < 0)
5079a0bf528SMauro Carvalho Chehab 			goto err;
5089a0bf528SMauro Carvalho Chehab 	}
5099a0bf528SMauro Carvalho Chehab 
5109a0bf528SMauro Carvalho Chehab 	return 0;
5119a0bf528SMauro Carvalho Chehab 
5129a0bf528SMauro Carvalho Chehab err:
5136a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "failed=%d\n", ret);
5149a0bf528SMauro Carvalho Chehab 
5159a0bf528SMauro Carvalho Chehab 	return ret;
5169a0bf528SMauro Carvalho Chehab }
5179a0bf528SMauro Carvalho Chehab 
5189a0bf528SMauro Carvalho Chehab static int af9033_get_tune_settings(struct dvb_frontend *fe,
5199a0bf528SMauro Carvalho Chehab 		struct dvb_frontend_tune_settings *fesettings)
5209a0bf528SMauro Carvalho Chehab {
521fe8eece1SAntti Palosaari 	/* 800 => 2000 because IT9135 v2 is slow to gain lock */
522fe8eece1SAntti Palosaari 	fesettings->min_delay_ms = 2000;
5239a0bf528SMauro Carvalho Chehab 	fesettings->step_size = 0;
5249a0bf528SMauro Carvalho Chehab 	fesettings->max_drift = 0;
5259a0bf528SMauro Carvalho Chehab 
5269a0bf528SMauro Carvalho Chehab 	return 0;
5279a0bf528SMauro Carvalho Chehab }
5289a0bf528SMauro Carvalho Chehab 
5299a0bf528SMauro Carvalho Chehab static int af9033_set_frontend(struct dvb_frontend *fe)
5309a0bf528SMauro Carvalho Chehab {
53109611caaSAntti Palosaari 	struct af9033_dev *dev = fe->demodulator_priv;
5329a0bf528SMauro Carvalho Chehab 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
533182b967eSHans-Frieder Vogt 	int ret, i, spec_inv, sampling_freq;
5349a0bf528SMauro Carvalho Chehab 	u8 tmp, buf[3], bandwidth_reg_val;
5359a0bf528SMauro Carvalho Chehab 	u32 if_frequency, freq_cw, adc_freq;
5369a0bf528SMauro Carvalho Chehab 
5376a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "frequency=%d bandwidth_hz=%d\n",
5386a087f1fSAntti Palosaari 			c->frequency, c->bandwidth_hz);
5399a0bf528SMauro Carvalho Chehab 
5409a0bf528SMauro Carvalho Chehab 	/* check bandwidth */
5419a0bf528SMauro Carvalho Chehab 	switch (c->bandwidth_hz) {
5429a0bf528SMauro Carvalho Chehab 	case 6000000:
5439a0bf528SMauro Carvalho Chehab 		bandwidth_reg_val = 0x00;
5449a0bf528SMauro Carvalho Chehab 		break;
5459a0bf528SMauro Carvalho Chehab 	case 7000000:
5469a0bf528SMauro Carvalho Chehab 		bandwidth_reg_val = 0x01;
5479a0bf528SMauro Carvalho Chehab 		break;
5489a0bf528SMauro Carvalho Chehab 	case 8000000:
5499a0bf528SMauro Carvalho Chehab 		bandwidth_reg_val = 0x02;
5509a0bf528SMauro Carvalho Chehab 		break;
5519a0bf528SMauro Carvalho Chehab 	default:
5526a087f1fSAntti Palosaari 		dev_dbg(&dev->client->dev, "invalid bandwidth_hz\n");
5539a0bf528SMauro Carvalho Chehab 		ret = -EINVAL;
5549a0bf528SMauro Carvalho Chehab 		goto err;
5559a0bf528SMauro Carvalho Chehab 	}
5569a0bf528SMauro Carvalho Chehab 
5579a0bf528SMauro Carvalho Chehab 	/* program tuner */
5589a0bf528SMauro Carvalho Chehab 	if (fe->ops.tuner_ops.set_params)
5599a0bf528SMauro Carvalho Chehab 		fe->ops.tuner_ops.set_params(fe);
5609a0bf528SMauro Carvalho Chehab 
5619a0bf528SMauro Carvalho Chehab 	/* program CFOE coefficients */
56209611caaSAntti Palosaari 	if (c->bandwidth_hz != dev->bandwidth_hz) {
5639a0bf528SMauro Carvalho Chehab 		for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
56409611caaSAntti Palosaari 			if (coeff_lut[i].clock == dev->cfg.clock &&
5659a0bf528SMauro Carvalho Chehab 				coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
5669a0bf528SMauro Carvalho Chehab 				break;
5679a0bf528SMauro Carvalho Chehab 			}
5689a0bf528SMauro Carvalho Chehab 		}
56909611caaSAntti Palosaari 		ret =  af9033_wr_regs(dev, 0x800001,
5709a0bf528SMauro Carvalho Chehab 				coeff_lut[i].val, sizeof(coeff_lut[i].val));
5719a0bf528SMauro Carvalho Chehab 	}
5729a0bf528SMauro Carvalho Chehab 
5739a0bf528SMauro Carvalho Chehab 	/* program frequency control */
57409611caaSAntti Palosaari 	if (c->bandwidth_hz != dev->bandwidth_hz) {
57509611caaSAntti Palosaari 		spec_inv = dev->cfg.spec_inv ? -1 : 1;
5769a0bf528SMauro Carvalho Chehab 
5779a0bf528SMauro Carvalho Chehab 		for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
57809611caaSAntti Palosaari 			if (clock_adc_lut[i].clock == dev->cfg.clock)
5799a0bf528SMauro Carvalho Chehab 				break;
5809a0bf528SMauro Carvalho Chehab 		}
5819a0bf528SMauro Carvalho Chehab 		adc_freq = clock_adc_lut[i].adc;
5829a0bf528SMauro Carvalho Chehab 
5839a0bf528SMauro Carvalho Chehab 		/* get used IF frequency */
5849a0bf528SMauro Carvalho Chehab 		if (fe->ops.tuner_ops.get_if_frequency)
5859a0bf528SMauro Carvalho Chehab 			fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
5869a0bf528SMauro Carvalho Chehab 		else
5879a0bf528SMauro Carvalho Chehab 			if_frequency = 0;
5889a0bf528SMauro Carvalho Chehab 
589182b967eSHans-Frieder Vogt 		sampling_freq = if_frequency;
5909a0bf528SMauro Carvalho Chehab 
591182b967eSHans-Frieder Vogt 		while (sampling_freq > (adc_freq / 2))
592182b967eSHans-Frieder Vogt 			sampling_freq -= adc_freq;
593182b967eSHans-Frieder Vogt 
594182b967eSHans-Frieder Vogt 		if (sampling_freq >= 0)
5959a0bf528SMauro Carvalho Chehab 			spec_inv *= -1;
5969a0bf528SMauro Carvalho Chehab 		else
597182b967eSHans-Frieder Vogt 			sampling_freq *= -1;
5989a0bf528SMauro Carvalho Chehab 
59909611caaSAntti Palosaari 		freq_cw = af9033_div(dev, sampling_freq, adc_freq, 23ul);
6009a0bf528SMauro Carvalho Chehab 
6019a0bf528SMauro Carvalho Chehab 		if (spec_inv == -1)
602182b967eSHans-Frieder Vogt 			freq_cw = 0x800000 - freq_cw;
6039a0bf528SMauro Carvalho Chehab 
60409611caaSAntti Palosaari 		if (dev->cfg.adc_multiplier == AF9033_ADC_MULTIPLIER_2X)
6059a0bf528SMauro Carvalho Chehab 			freq_cw /= 2;
6069a0bf528SMauro Carvalho Chehab 
6079a0bf528SMauro Carvalho Chehab 		buf[0] = (freq_cw >>  0) & 0xff;
6089a0bf528SMauro Carvalho Chehab 		buf[1] = (freq_cw >>  8) & 0xff;
6099a0bf528SMauro Carvalho Chehab 		buf[2] = (freq_cw >> 16) & 0x7f;
610fe8eece1SAntti Palosaari 
611fe8eece1SAntti Palosaari 		/* FIXME: there seems to be calculation error here... */
612fe8eece1SAntti Palosaari 		if (if_frequency == 0)
613fe8eece1SAntti Palosaari 			buf[2] = 0;
614fe8eece1SAntti Palosaari 
61509611caaSAntti Palosaari 		ret = af9033_wr_regs(dev, 0x800029, buf, 3);
6169a0bf528SMauro Carvalho Chehab 		if (ret < 0)
6179a0bf528SMauro Carvalho Chehab 			goto err;
6189a0bf528SMauro Carvalho Chehab 
61909611caaSAntti Palosaari 		dev->bandwidth_hz = c->bandwidth_hz;
6209a0bf528SMauro Carvalho Chehab 	}
6219a0bf528SMauro Carvalho Chehab 
62209611caaSAntti Palosaari 	ret = af9033_wr_reg_mask(dev, 0x80f904, bandwidth_reg_val, 0x03);
6239a0bf528SMauro Carvalho Chehab 	if (ret < 0)
6249a0bf528SMauro Carvalho Chehab 		goto err;
6259a0bf528SMauro Carvalho Chehab 
62609611caaSAntti Palosaari 	ret = af9033_wr_reg(dev, 0x800040, 0x00);
6279a0bf528SMauro Carvalho Chehab 	if (ret < 0)
6289a0bf528SMauro Carvalho Chehab 		goto err;
6299a0bf528SMauro Carvalho Chehab 
63009611caaSAntti Palosaari 	ret = af9033_wr_reg(dev, 0x800047, 0x00);
6319a0bf528SMauro Carvalho Chehab 	if (ret < 0)
6329a0bf528SMauro Carvalho Chehab 		goto err;
6339a0bf528SMauro Carvalho Chehab 
63409611caaSAntti Palosaari 	ret = af9033_wr_reg_mask(dev, 0x80f999, 0x00, 0x01);
6359a0bf528SMauro Carvalho Chehab 	if (ret < 0)
6369a0bf528SMauro Carvalho Chehab 		goto err;
6379a0bf528SMauro Carvalho Chehab 
6389a0bf528SMauro Carvalho Chehab 	if (c->frequency <= 230000000)
6399a0bf528SMauro Carvalho Chehab 		tmp = 0x00; /* VHF */
6409a0bf528SMauro Carvalho Chehab 	else
6419a0bf528SMauro Carvalho Chehab 		tmp = 0x01; /* UHF */
6429a0bf528SMauro Carvalho Chehab 
64309611caaSAntti Palosaari 	ret = af9033_wr_reg(dev, 0x80004b, tmp);
6449a0bf528SMauro Carvalho Chehab 	if (ret < 0)
6459a0bf528SMauro Carvalho Chehab 		goto err;
6469a0bf528SMauro Carvalho Chehab 
64709611caaSAntti Palosaari 	ret = af9033_wr_reg(dev, 0x800000, 0x00);
6489a0bf528SMauro Carvalho Chehab 	if (ret < 0)
6499a0bf528SMauro Carvalho Chehab 		goto err;
6509a0bf528SMauro Carvalho Chehab 
6519a0bf528SMauro Carvalho Chehab 	return 0;
6529a0bf528SMauro Carvalho Chehab 
6539a0bf528SMauro Carvalho Chehab err:
6546a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "failed=%d\n", ret);
6559a0bf528SMauro Carvalho Chehab 
6569a0bf528SMauro Carvalho Chehab 	return ret;
6579a0bf528SMauro Carvalho Chehab }
6589a0bf528SMauro Carvalho Chehab 
6599a0bf528SMauro Carvalho Chehab static int af9033_get_frontend(struct dvb_frontend *fe)
6609a0bf528SMauro Carvalho Chehab {
66109611caaSAntti Palosaari 	struct af9033_dev *dev = fe->demodulator_priv;
6629a0bf528SMauro Carvalho Chehab 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
6639a0bf528SMauro Carvalho Chehab 	int ret;
6649a0bf528SMauro Carvalho Chehab 	u8 buf[8];
6659a0bf528SMauro Carvalho Chehab 
6666a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "\n");
6679a0bf528SMauro Carvalho Chehab 
6689a0bf528SMauro Carvalho Chehab 	/* read all needed registers */
66909611caaSAntti Palosaari 	ret = af9033_rd_regs(dev, 0x80f900, buf, sizeof(buf));
6709a0bf528SMauro Carvalho Chehab 	if (ret < 0)
6719a0bf528SMauro Carvalho Chehab 		goto err;
6729a0bf528SMauro Carvalho Chehab 
6739a0bf528SMauro Carvalho Chehab 	switch ((buf[0] >> 0) & 3) {
6749a0bf528SMauro Carvalho Chehab 	case 0:
6759a0bf528SMauro Carvalho Chehab 		c->transmission_mode = TRANSMISSION_MODE_2K;
6769a0bf528SMauro Carvalho Chehab 		break;
6779a0bf528SMauro Carvalho Chehab 	case 1:
6789a0bf528SMauro Carvalho Chehab 		c->transmission_mode = TRANSMISSION_MODE_8K;
6799a0bf528SMauro Carvalho Chehab 		break;
6809a0bf528SMauro Carvalho Chehab 	}
6819a0bf528SMauro Carvalho Chehab 
6829a0bf528SMauro Carvalho Chehab 	switch ((buf[1] >> 0) & 3) {
6839a0bf528SMauro Carvalho Chehab 	case 0:
6849a0bf528SMauro Carvalho Chehab 		c->guard_interval = GUARD_INTERVAL_1_32;
6859a0bf528SMauro Carvalho Chehab 		break;
6869a0bf528SMauro Carvalho Chehab 	case 1:
6879a0bf528SMauro Carvalho Chehab 		c->guard_interval = GUARD_INTERVAL_1_16;
6889a0bf528SMauro Carvalho Chehab 		break;
6899a0bf528SMauro Carvalho Chehab 	case 2:
6909a0bf528SMauro Carvalho Chehab 		c->guard_interval = GUARD_INTERVAL_1_8;
6919a0bf528SMauro Carvalho Chehab 		break;
6929a0bf528SMauro Carvalho Chehab 	case 3:
6939a0bf528SMauro Carvalho Chehab 		c->guard_interval = GUARD_INTERVAL_1_4;
6949a0bf528SMauro Carvalho Chehab 		break;
6959a0bf528SMauro Carvalho Chehab 	}
6969a0bf528SMauro Carvalho Chehab 
6979a0bf528SMauro Carvalho Chehab 	switch ((buf[2] >> 0) & 7) {
6989a0bf528SMauro Carvalho Chehab 	case 0:
6999a0bf528SMauro Carvalho Chehab 		c->hierarchy = HIERARCHY_NONE;
7009a0bf528SMauro Carvalho Chehab 		break;
7019a0bf528SMauro Carvalho Chehab 	case 1:
7029a0bf528SMauro Carvalho Chehab 		c->hierarchy = HIERARCHY_1;
7039a0bf528SMauro Carvalho Chehab 		break;
7049a0bf528SMauro Carvalho Chehab 	case 2:
7059a0bf528SMauro Carvalho Chehab 		c->hierarchy = HIERARCHY_2;
7069a0bf528SMauro Carvalho Chehab 		break;
7079a0bf528SMauro Carvalho Chehab 	case 3:
7089a0bf528SMauro Carvalho Chehab 		c->hierarchy = HIERARCHY_4;
7099a0bf528SMauro Carvalho Chehab 		break;
7109a0bf528SMauro Carvalho Chehab 	}
7119a0bf528SMauro Carvalho Chehab 
7129a0bf528SMauro Carvalho Chehab 	switch ((buf[3] >> 0) & 3) {
7139a0bf528SMauro Carvalho Chehab 	case 0:
7149a0bf528SMauro Carvalho Chehab 		c->modulation = QPSK;
7159a0bf528SMauro Carvalho Chehab 		break;
7169a0bf528SMauro Carvalho Chehab 	case 1:
7179a0bf528SMauro Carvalho Chehab 		c->modulation = QAM_16;
7189a0bf528SMauro Carvalho Chehab 		break;
7199a0bf528SMauro Carvalho Chehab 	case 2:
7209a0bf528SMauro Carvalho Chehab 		c->modulation = QAM_64;
7219a0bf528SMauro Carvalho Chehab 		break;
7229a0bf528SMauro Carvalho Chehab 	}
7239a0bf528SMauro Carvalho Chehab 
7249a0bf528SMauro Carvalho Chehab 	switch ((buf[4] >> 0) & 3) {
7259a0bf528SMauro Carvalho Chehab 	case 0:
7269a0bf528SMauro Carvalho Chehab 		c->bandwidth_hz = 6000000;
7279a0bf528SMauro Carvalho Chehab 		break;
7289a0bf528SMauro Carvalho Chehab 	case 1:
7299a0bf528SMauro Carvalho Chehab 		c->bandwidth_hz = 7000000;
7309a0bf528SMauro Carvalho Chehab 		break;
7319a0bf528SMauro Carvalho Chehab 	case 2:
7329a0bf528SMauro Carvalho Chehab 		c->bandwidth_hz = 8000000;
7339a0bf528SMauro Carvalho Chehab 		break;
7349a0bf528SMauro Carvalho Chehab 	}
7359a0bf528SMauro Carvalho Chehab 
7369a0bf528SMauro Carvalho Chehab 	switch ((buf[6] >> 0) & 7) {
7379a0bf528SMauro Carvalho Chehab 	case 0:
7389a0bf528SMauro Carvalho Chehab 		c->code_rate_HP = FEC_1_2;
7399a0bf528SMauro Carvalho Chehab 		break;
7409a0bf528SMauro Carvalho Chehab 	case 1:
7419a0bf528SMauro Carvalho Chehab 		c->code_rate_HP = FEC_2_3;
7429a0bf528SMauro Carvalho Chehab 		break;
7439a0bf528SMauro Carvalho Chehab 	case 2:
7449a0bf528SMauro Carvalho Chehab 		c->code_rate_HP = FEC_3_4;
7459a0bf528SMauro Carvalho Chehab 		break;
7469a0bf528SMauro Carvalho Chehab 	case 3:
7479a0bf528SMauro Carvalho Chehab 		c->code_rate_HP = FEC_5_6;
7489a0bf528SMauro Carvalho Chehab 		break;
7499a0bf528SMauro Carvalho Chehab 	case 4:
7509a0bf528SMauro Carvalho Chehab 		c->code_rate_HP = FEC_7_8;
7519a0bf528SMauro Carvalho Chehab 		break;
7529a0bf528SMauro Carvalho Chehab 	case 5:
7539a0bf528SMauro Carvalho Chehab 		c->code_rate_HP = FEC_NONE;
7549a0bf528SMauro Carvalho Chehab 		break;
7559a0bf528SMauro Carvalho Chehab 	}
7569a0bf528SMauro Carvalho Chehab 
7579a0bf528SMauro Carvalho Chehab 	switch ((buf[7] >> 0) & 7) {
7589a0bf528SMauro Carvalho Chehab 	case 0:
7599a0bf528SMauro Carvalho Chehab 		c->code_rate_LP = FEC_1_2;
7609a0bf528SMauro Carvalho Chehab 		break;
7619a0bf528SMauro Carvalho Chehab 	case 1:
7629a0bf528SMauro Carvalho Chehab 		c->code_rate_LP = FEC_2_3;
7639a0bf528SMauro Carvalho Chehab 		break;
7649a0bf528SMauro Carvalho Chehab 	case 2:
7659a0bf528SMauro Carvalho Chehab 		c->code_rate_LP = FEC_3_4;
7669a0bf528SMauro Carvalho Chehab 		break;
7679a0bf528SMauro Carvalho Chehab 	case 3:
7689a0bf528SMauro Carvalho Chehab 		c->code_rate_LP = FEC_5_6;
7699a0bf528SMauro Carvalho Chehab 		break;
7709a0bf528SMauro Carvalho Chehab 	case 4:
7719a0bf528SMauro Carvalho Chehab 		c->code_rate_LP = FEC_7_8;
7729a0bf528SMauro Carvalho Chehab 		break;
7739a0bf528SMauro Carvalho Chehab 	case 5:
7749a0bf528SMauro Carvalho Chehab 		c->code_rate_LP = FEC_NONE;
7759a0bf528SMauro Carvalho Chehab 		break;
7769a0bf528SMauro Carvalho Chehab 	}
7779a0bf528SMauro Carvalho Chehab 
7789a0bf528SMauro Carvalho Chehab 	return 0;
7799a0bf528SMauro Carvalho Chehab 
7809a0bf528SMauro Carvalho Chehab err:
7816a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "failed=%d\n", ret);
7829a0bf528SMauro Carvalho Chehab 
7839a0bf528SMauro Carvalho Chehab 	return ret;
7849a0bf528SMauro Carvalho Chehab }
7859a0bf528SMauro Carvalho Chehab 
7869a0bf528SMauro Carvalho Chehab static int af9033_read_status(struct dvb_frontend *fe, fe_status_t *status)
7879a0bf528SMauro Carvalho Chehab {
78809611caaSAntti Palosaari 	struct af9033_dev *dev = fe->demodulator_priv;
7899a0bf528SMauro Carvalho Chehab 	int ret;
7909a0bf528SMauro Carvalho Chehab 	u8 tmp;
7919a0bf528SMauro Carvalho Chehab 
7929a0bf528SMauro Carvalho Chehab 	*status = 0;
7939a0bf528SMauro Carvalho Chehab 
7949a0bf528SMauro Carvalho Chehab 	/* radio channel status, 0=no result, 1=has signal, 2=no signal */
79509611caaSAntti Palosaari 	ret = af9033_rd_reg(dev, 0x800047, &tmp);
7969a0bf528SMauro Carvalho Chehab 	if (ret < 0)
7979a0bf528SMauro Carvalho Chehab 		goto err;
7989a0bf528SMauro Carvalho Chehab 
7999a0bf528SMauro Carvalho Chehab 	/* has signal */
8009a0bf528SMauro Carvalho Chehab 	if (tmp == 0x01)
8019a0bf528SMauro Carvalho Chehab 		*status |= FE_HAS_SIGNAL;
8029a0bf528SMauro Carvalho Chehab 
8039a0bf528SMauro Carvalho Chehab 	if (tmp != 0x02) {
8049a0bf528SMauro Carvalho Chehab 		/* TPS lock */
80509611caaSAntti Palosaari 		ret = af9033_rd_reg_mask(dev, 0x80f5a9, &tmp, 0x01);
8069a0bf528SMauro Carvalho Chehab 		if (ret < 0)
8079a0bf528SMauro Carvalho Chehab 			goto err;
8089a0bf528SMauro Carvalho Chehab 
8099a0bf528SMauro Carvalho Chehab 		if (tmp)
8109a0bf528SMauro Carvalho Chehab 			*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
8119a0bf528SMauro Carvalho Chehab 					FE_HAS_VITERBI;
8129a0bf528SMauro Carvalho Chehab 
8139a0bf528SMauro Carvalho Chehab 		/* full lock */
81409611caaSAntti Palosaari 		ret = af9033_rd_reg_mask(dev, 0x80f999, &tmp, 0x01);
8159a0bf528SMauro Carvalho Chehab 		if (ret < 0)
8169a0bf528SMauro Carvalho Chehab 			goto err;
8179a0bf528SMauro Carvalho Chehab 
8189a0bf528SMauro Carvalho Chehab 		if (tmp)
8199a0bf528SMauro Carvalho Chehab 			*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
8209a0bf528SMauro Carvalho Chehab 					FE_HAS_VITERBI | FE_HAS_SYNC |
8219a0bf528SMauro Carvalho Chehab 					FE_HAS_LOCK;
8229a0bf528SMauro Carvalho Chehab 	}
8239a0bf528SMauro Carvalho Chehab 
82483f11619SAntti Palosaari 	dev->fe_status = *status;
82583f11619SAntti Palosaari 
8269a0bf528SMauro Carvalho Chehab 	return 0;
8279a0bf528SMauro Carvalho Chehab 
8289a0bf528SMauro Carvalho Chehab err:
8296a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "failed=%d\n", ret);
8309a0bf528SMauro Carvalho Chehab 
8319a0bf528SMauro Carvalho Chehab 	return ret;
8329a0bf528SMauro Carvalho Chehab }
8339a0bf528SMauro Carvalho Chehab 
8349a0bf528SMauro Carvalho Chehab static int af9033_read_snr(struct dvb_frontend *fe, u16 *snr)
8359a0bf528SMauro Carvalho Chehab {
83609611caaSAntti Palosaari 	struct af9033_dev *dev = fe->demodulator_priv;
8376b457786SAntti Palosaari 	struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
8389a0bf528SMauro Carvalho Chehab 
8396b457786SAntti Palosaari 	/* use DVBv5 CNR */
8406b457786SAntti Palosaari 	if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
8416b457786SAntti Palosaari 		*snr = div_s64(c->cnr.stat[0].svalue, 100); /* 1000x => 10x */
8426b457786SAntti Palosaari 	else
8436b457786SAntti Palosaari 		*snr = 0;
8449a0bf528SMauro Carvalho Chehab 
8459a0bf528SMauro Carvalho Chehab 	return 0;
8469a0bf528SMauro Carvalho Chehab }
8479a0bf528SMauro Carvalho Chehab 
8489a0bf528SMauro Carvalho Chehab static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
8499a0bf528SMauro Carvalho Chehab {
85009611caaSAntti Palosaari 	struct af9033_dev *dev = fe->demodulator_priv;
8519a0bf528SMauro Carvalho Chehab 	int ret;
8529a0bf528SMauro Carvalho Chehab 	u8 strength2;
8539a0bf528SMauro Carvalho Chehab 
8549a0bf528SMauro Carvalho Chehab 	/* read signal strength of 0-100 scale */
85509611caaSAntti Palosaari 	ret = af9033_rd_reg(dev, 0x800048, &strength2);
8569a0bf528SMauro Carvalho Chehab 	if (ret < 0)
8579a0bf528SMauro Carvalho Chehab 		goto err;
8589a0bf528SMauro Carvalho Chehab 
8599a0bf528SMauro Carvalho Chehab 	/* scale value to 0x0000-0xffff */
8609a0bf528SMauro Carvalho Chehab 	*strength = strength2 * 0xffff / 100;
8619a0bf528SMauro Carvalho Chehab 
8629a0bf528SMauro Carvalho Chehab 	return 0;
8639a0bf528SMauro Carvalho Chehab 
8649a0bf528SMauro Carvalho Chehab err:
8656a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "failed=%d\n", ret);
8669a0bf528SMauro Carvalho Chehab 
8679a0bf528SMauro Carvalho Chehab 	return ret;
8689a0bf528SMauro Carvalho Chehab }
8699a0bf528SMauro Carvalho Chehab 
87009611caaSAntti Palosaari static int af9033_update_ch_stat(struct af9033_dev *dev)
8719a0bf528SMauro Carvalho Chehab {
8729a0bf528SMauro Carvalho Chehab 	int ret = 0;
8739a0bf528SMauro Carvalho Chehab 	u32 err_cnt, bit_cnt;
8749a0bf528SMauro Carvalho Chehab 	u16 abort_cnt;
8759a0bf528SMauro Carvalho Chehab 	u8 buf[7];
8769a0bf528SMauro Carvalho Chehab 
8779a0bf528SMauro Carvalho Chehab 	/* only update data every half second */
87809611caaSAntti Palosaari 	if (time_after(jiffies, dev->last_stat_check + msecs_to_jiffies(500))) {
87909611caaSAntti Palosaari 		ret = af9033_rd_regs(dev, 0x800032, buf, sizeof(buf));
8809a0bf528SMauro Carvalho Chehab 		if (ret < 0)
8819a0bf528SMauro Carvalho Chehab 			goto err;
8829a0bf528SMauro Carvalho Chehab 		/* in 8 byte packets? */
8839a0bf528SMauro Carvalho Chehab 		abort_cnt = (buf[1] << 8) + buf[0];
8849a0bf528SMauro Carvalho Chehab 		/* in bits */
8859a0bf528SMauro Carvalho Chehab 		err_cnt = (buf[4] << 16) + (buf[3] << 8) + buf[2];
8869a0bf528SMauro Carvalho Chehab 		/* in 8 byte packets? always(?) 0x2710 = 10000 */
8879a0bf528SMauro Carvalho Chehab 		bit_cnt = (buf[6] << 8) + buf[5];
8889a0bf528SMauro Carvalho Chehab 
8899a0bf528SMauro Carvalho Chehab 		if (bit_cnt < abort_cnt) {
8909a0bf528SMauro Carvalho Chehab 			abort_cnt = 1000;
89109611caaSAntti Palosaari 			dev->ber = 0xffffffff;
8929a0bf528SMauro Carvalho Chehab 		} else {
89324e419a0SAntti Palosaari 			/*
89424e419a0SAntti Palosaari 			 * 8 byte packets, that have not been rejected already
89524e419a0SAntti Palosaari 			 */
8969a0bf528SMauro Carvalho Chehab 			bit_cnt -= (u32)abort_cnt;
8979a0bf528SMauro Carvalho Chehab 			if (bit_cnt == 0) {
89809611caaSAntti Palosaari 				dev->ber = 0xffffffff;
8999a0bf528SMauro Carvalho Chehab 			} else {
9009a0bf528SMauro Carvalho Chehab 				err_cnt -= (u32)abort_cnt * 8 * 8;
9019a0bf528SMauro Carvalho Chehab 				bit_cnt *= 8 * 8;
90209611caaSAntti Palosaari 				dev->ber = err_cnt * (0xffffffff / bit_cnt);
9039a0bf528SMauro Carvalho Chehab 			}
9049a0bf528SMauro Carvalho Chehab 		}
90509611caaSAntti Palosaari 		dev->ucb += abort_cnt;
90609611caaSAntti Palosaari 		dev->last_stat_check = jiffies;
9079a0bf528SMauro Carvalho Chehab 	}
9089a0bf528SMauro Carvalho Chehab 
9099a0bf528SMauro Carvalho Chehab 	return 0;
9109a0bf528SMauro Carvalho Chehab err:
9116a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "failed=%d\n", ret);
9120a73f2d6SAntti Palosaari 
9139a0bf528SMauro Carvalho Chehab 	return ret;
9149a0bf528SMauro Carvalho Chehab }
9159a0bf528SMauro Carvalho Chehab 
9169a0bf528SMauro Carvalho Chehab static int af9033_read_ber(struct dvb_frontend *fe, u32 *ber)
9179a0bf528SMauro Carvalho Chehab {
91809611caaSAntti Palosaari 	struct af9033_dev *dev = fe->demodulator_priv;
9199a0bf528SMauro Carvalho Chehab 	int ret;
9209a0bf528SMauro Carvalho Chehab 
92109611caaSAntti Palosaari 	ret = af9033_update_ch_stat(dev);
9229a0bf528SMauro Carvalho Chehab 	if (ret < 0)
9239a0bf528SMauro Carvalho Chehab 		return ret;
9249a0bf528SMauro Carvalho Chehab 
92509611caaSAntti Palosaari 	*ber = dev->ber;
9269a0bf528SMauro Carvalho Chehab 
9279a0bf528SMauro Carvalho Chehab 	return 0;
9289a0bf528SMauro Carvalho Chehab }
9299a0bf528SMauro Carvalho Chehab 
9309a0bf528SMauro Carvalho Chehab static int af9033_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
9319a0bf528SMauro Carvalho Chehab {
93209611caaSAntti Palosaari 	struct af9033_dev *dev = fe->demodulator_priv;
9339a0bf528SMauro Carvalho Chehab 	int ret;
9349a0bf528SMauro Carvalho Chehab 
93509611caaSAntti Palosaari 	ret = af9033_update_ch_stat(dev);
9369a0bf528SMauro Carvalho Chehab 	if (ret < 0)
9379a0bf528SMauro Carvalho Chehab 		return ret;
9389a0bf528SMauro Carvalho Chehab 
93909611caaSAntti Palosaari 	*ucblocks = dev->ucb;
9409a0bf528SMauro Carvalho Chehab 
9419a0bf528SMauro Carvalho Chehab 	return 0;
9429a0bf528SMauro Carvalho Chehab }
9439a0bf528SMauro Carvalho Chehab 
9449a0bf528SMauro Carvalho Chehab static int af9033_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
9459a0bf528SMauro Carvalho Chehab {
94609611caaSAntti Palosaari 	struct af9033_dev *dev = fe->demodulator_priv;
9479a0bf528SMauro Carvalho Chehab 	int ret;
9489a0bf528SMauro Carvalho Chehab 
9496a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "enable=%d\n", enable);
9509a0bf528SMauro Carvalho Chehab 
95109611caaSAntti Palosaari 	ret = af9033_wr_reg_mask(dev, 0x00fa04, enable, 0x01);
9529a0bf528SMauro Carvalho Chehab 	if (ret < 0)
9539a0bf528SMauro Carvalho Chehab 		goto err;
9549a0bf528SMauro Carvalho Chehab 
9559a0bf528SMauro Carvalho Chehab 	return 0;
9569a0bf528SMauro Carvalho Chehab 
9579a0bf528SMauro Carvalho Chehab err:
9586a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "failed=%d\n", ret);
9599a0bf528SMauro Carvalho Chehab 
9609a0bf528SMauro Carvalho Chehab 	return ret;
9619a0bf528SMauro Carvalho Chehab }
9629a0bf528SMauro Carvalho Chehab 
963ed97a6feSMauro Carvalho Chehab static int af9033_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
964040cf86cSAntti Palosaari {
96509611caaSAntti Palosaari 	struct af9033_dev *dev = fe->demodulator_priv;
966040cf86cSAntti Palosaari 	int ret;
967040cf86cSAntti Palosaari 
9686a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "onoff=%d\n", onoff);
969040cf86cSAntti Palosaari 
97009611caaSAntti Palosaari 	ret = af9033_wr_reg_mask(dev, 0x80f993, onoff, 0x01);
971040cf86cSAntti Palosaari 	if (ret < 0)
972040cf86cSAntti Palosaari 		goto err;
973040cf86cSAntti Palosaari 
974040cf86cSAntti Palosaari 	return 0;
975040cf86cSAntti Palosaari 
976040cf86cSAntti Palosaari err:
9776a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "failed=%d\n", ret);
978040cf86cSAntti Palosaari 
979040cf86cSAntti Palosaari 	return ret;
980040cf86cSAntti Palosaari }
981040cf86cSAntti Palosaari 
98224e419a0SAntti Palosaari static int af9033_pid_filter(struct dvb_frontend *fe, int index, u16 pid,
98324e419a0SAntti Palosaari 		int onoff)
984040cf86cSAntti Palosaari {
98509611caaSAntti Palosaari 	struct af9033_dev *dev = fe->demodulator_priv;
986040cf86cSAntti Palosaari 	int ret;
987040cf86cSAntti Palosaari 	u8 wbuf[2] = {(pid >> 0) & 0xff, (pid >> 8) & 0xff};
988040cf86cSAntti Palosaari 
9896a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "index=%d pid=%04x onoff=%d\n",
9906a087f1fSAntti Palosaari 			index, pid, onoff);
991040cf86cSAntti Palosaari 
992040cf86cSAntti Palosaari 	if (pid > 0x1fff)
993040cf86cSAntti Palosaari 		return 0;
994040cf86cSAntti Palosaari 
99509611caaSAntti Palosaari 	ret = af9033_wr_regs(dev, 0x80f996, wbuf, 2);
996040cf86cSAntti Palosaari 	if (ret < 0)
997040cf86cSAntti Palosaari 		goto err;
998040cf86cSAntti Palosaari 
99909611caaSAntti Palosaari 	ret = af9033_wr_reg(dev, 0x80f994, onoff);
1000040cf86cSAntti Palosaari 	if (ret < 0)
1001040cf86cSAntti Palosaari 		goto err;
1002040cf86cSAntti Palosaari 
100309611caaSAntti Palosaari 	ret = af9033_wr_reg(dev, 0x80f995, index);
1004040cf86cSAntti Palosaari 	if (ret < 0)
1005040cf86cSAntti Palosaari 		goto err;
1006040cf86cSAntti Palosaari 
1007040cf86cSAntti Palosaari 	return 0;
1008040cf86cSAntti Palosaari 
1009040cf86cSAntti Palosaari err:
10106a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1011040cf86cSAntti Palosaari 
1012040cf86cSAntti Palosaari 	return ret;
1013040cf86cSAntti Palosaari }
1014040cf86cSAntti Palosaari 
101583f11619SAntti Palosaari static void af9033_stat_work(struct work_struct *work)
101683f11619SAntti Palosaari {
101783f11619SAntti Palosaari 	struct af9033_dev *dev = container_of(work, struct af9033_dev, stat_work.work);
101883f11619SAntti Palosaari 	struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
10193e41313aSAntti Palosaari 	int ret, tmp, i, len;
1020204f4319SAntti Palosaari 	u8 u8tmp, buf[7];
102183f11619SAntti Palosaari 
102283f11619SAntti Palosaari 	dev_dbg(&dev->client->dev, "\n");
102383f11619SAntti Palosaari 
10243e41313aSAntti Palosaari 	/* signal strength */
102583f11619SAntti Palosaari 	if (dev->fe_status & FE_HAS_SIGNAL) {
102683f11619SAntti Palosaari 		if (dev->is_af9035) {
102783f11619SAntti Palosaari 			ret = af9033_rd_reg(dev, 0x80004a, &u8tmp);
102883f11619SAntti Palosaari 			tmp = -u8tmp * 1000;
102983f11619SAntti Palosaari 		} else {
103083f11619SAntti Palosaari 			ret = af9033_rd_reg(dev, 0x8000f7, &u8tmp);
103183f11619SAntti Palosaari 			tmp = (u8tmp - 100) * 1000;
103283f11619SAntti Palosaari 		}
103383f11619SAntti Palosaari 		if (ret)
103483f11619SAntti Palosaari 			goto err;
103583f11619SAntti Palosaari 
103683f11619SAntti Palosaari 		c->strength.len = 1;
103783f11619SAntti Palosaari 		c->strength.stat[0].scale = FE_SCALE_DECIBEL;
103883f11619SAntti Palosaari 		c->strength.stat[0].svalue = tmp;
103983f11619SAntti Palosaari 	} else {
104083f11619SAntti Palosaari 		c->strength.len = 1;
104183f11619SAntti Palosaari 		c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
104283f11619SAntti Palosaari 	}
104383f11619SAntti Palosaari 
10443e41313aSAntti Palosaari 	/* CNR */
10453e41313aSAntti Palosaari 	if (dev->fe_status & FE_HAS_VITERBI) {
10463e41313aSAntti Palosaari 		u32 snr_val;
10473e41313aSAntti Palosaari 		const struct val_snr *snr_lut;
10483e41313aSAntti Palosaari 
10493e41313aSAntti Palosaari 		/* read value */
10503e41313aSAntti Palosaari 		ret = af9033_rd_regs(dev, 0x80002c, buf, 3);
10513e41313aSAntti Palosaari 		if (ret)
10523e41313aSAntti Palosaari 			goto err;
10533e41313aSAntti Palosaari 
10543e41313aSAntti Palosaari 		snr_val = (buf[2] << 16) | (buf[1] << 8) | (buf[0] << 0);
10553e41313aSAntti Palosaari 
10563e41313aSAntti Palosaari 		/* read current modulation */
10573e41313aSAntti Palosaari 		ret = af9033_rd_reg(dev, 0x80f903, &u8tmp);
10583e41313aSAntti Palosaari 		if (ret)
10593e41313aSAntti Palosaari 			goto err;
10603e41313aSAntti Palosaari 
10613e41313aSAntti Palosaari 		switch ((u8tmp >> 0) & 3) {
10623e41313aSAntti Palosaari 		case 0:
10633e41313aSAntti Palosaari 			len = ARRAY_SIZE(qpsk_snr_lut);
10643e41313aSAntti Palosaari 			snr_lut = qpsk_snr_lut;
10653e41313aSAntti Palosaari 			break;
10663e41313aSAntti Palosaari 		case 1:
10673e41313aSAntti Palosaari 			len = ARRAY_SIZE(qam16_snr_lut);
10683e41313aSAntti Palosaari 			snr_lut = qam16_snr_lut;
10693e41313aSAntti Palosaari 			break;
10703e41313aSAntti Palosaari 		case 2:
10713e41313aSAntti Palosaari 			len = ARRAY_SIZE(qam64_snr_lut);
10723e41313aSAntti Palosaari 			snr_lut = qam64_snr_lut;
10733e41313aSAntti Palosaari 			break;
10743e41313aSAntti Palosaari 		default:
10753e41313aSAntti Palosaari 			goto err_schedule_delayed_work;
10763e41313aSAntti Palosaari 		}
10773e41313aSAntti Palosaari 
10783e41313aSAntti Palosaari 		for (i = 0; i < len; i++) {
10793e41313aSAntti Palosaari 			tmp = snr_lut[i].snr * 1000;
10803e41313aSAntti Palosaari 			if (snr_val < snr_lut[i].val)
10813e41313aSAntti Palosaari 				break;
10823e41313aSAntti Palosaari 		}
10833e41313aSAntti Palosaari 
10843e41313aSAntti Palosaari 		c->cnr.len = 1;
10853e41313aSAntti Palosaari 		c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
10863e41313aSAntti Palosaari 		c->cnr.stat[0].svalue = tmp;
10873e41313aSAntti Palosaari 	} else {
10883e41313aSAntti Palosaari 		c->cnr.len = 1;
10893e41313aSAntti Palosaari 		c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
10903e41313aSAntti Palosaari 	}
10913e41313aSAntti Palosaari 
1092204f4319SAntti Palosaari 	/* UCB/PER/BER */
1093204f4319SAntti Palosaari 	if (dev->fe_status & FE_HAS_LOCK) {
1094204f4319SAntti Palosaari 		/* outer FEC, 204 byte packets */
1095204f4319SAntti Palosaari 		u16 abort_packet_count, rsd_packet_count;
1096204f4319SAntti Palosaari 
1097204f4319SAntti Palosaari 		/*
1098204f4319SAntti Palosaari 		 * Packet count used for measurement is 10000
1099204f4319SAntti Palosaari 		 * (rsd_packet_count). Maybe it should be increased?
1100204f4319SAntti Palosaari 		 */
1101204f4319SAntti Palosaari 
1102204f4319SAntti Palosaari 		ret = af9033_rd_regs(dev, 0x800032, buf, 7);
1103204f4319SAntti Palosaari 		if (ret)
1104204f4319SAntti Palosaari 			goto err;
1105204f4319SAntti Palosaari 
1106204f4319SAntti Palosaari 		abort_packet_count = (buf[1] << 8) | (buf[0] << 0);
1107204f4319SAntti Palosaari 		rsd_packet_count = (buf[6] << 8) | (buf[5] << 0);
1108204f4319SAntti Palosaari 
1109204f4319SAntti Palosaari 		dev->error_block_count += abort_packet_count;
1110204f4319SAntti Palosaari 		dev->total_block_count += rsd_packet_count;
1111204f4319SAntti Palosaari 
1112204f4319SAntti Palosaari 		c->block_count.len = 1;
1113204f4319SAntti Palosaari 		c->block_count.stat[0].scale = FE_SCALE_COUNTER;
1114204f4319SAntti Palosaari 		c->block_count.stat[0].uvalue = dev->total_block_count;
1115204f4319SAntti Palosaari 
1116204f4319SAntti Palosaari 		c->block_error.len = 1;
1117204f4319SAntti Palosaari 		c->block_error.stat[0].scale = FE_SCALE_COUNTER;
1118204f4319SAntti Palosaari 		c->block_error.stat[0].uvalue = dev->error_block_count;
1119204f4319SAntti Palosaari 	}
1120204f4319SAntti Palosaari 
11213e41313aSAntti Palosaari err_schedule_delayed_work:
112283f11619SAntti Palosaari 	schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
112383f11619SAntti Palosaari 	return;
112483f11619SAntti Palosaari err:
112583f11619SAntti Palosaari 	dev_dbg(&dev->client->dev, "failed=%d\n", ret);
112683f11619SAntti Palosaari }
112783f11619SAntti Palosaari 
11289a0bf528SMauro Carvalho Chehab static struct dvb_frontend_ops af9033_ops = {
11299a0bf528SMauro Carvalho Chehab 	.delsys = { SYS_DVBT },
11309a0bf528SMauro Carvalho Chehab 	.info = {
11319a0bf528SMauro Carvalho Chehab 		.name = "Afatech AF9033 (DVB-T)",
11329a0bf528SMauro Carvalho Chehab 		.frequency_min = 174000000,
11339a0bf528SMauro Carvalho Chehab 		.frequency_max = 862000000,
11349a0bf528SMauro Carvalho Chehab 		.frequency_stepsize = 250000,
11359a0bf528SMauro Carvalho Chehab 		.frequency_tolerance = 0,
11369a0bf528SMauro Carvalho Chehab 		.caps =	FE_CAN_FEC_1_2 |
11379a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_2_3 |
11389a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_3_4 |
11399a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_5_6 |
11409a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_7_8 |
11419a0bf528SMauro Carvalho Chehab 			FE_CAN_FEC_AUTO |
11429a0bf528SMauro Carvalho Chehab 			FE_CAN_QPSK |
11439a0bf528SMauro Carvalho Chehab 			FE_CAN_QAM_16 |
11449a0bf528SMauro Carvalho Chehab 			FE_CAN_QAM_64 |
11459a0bf528SMauro Carvalho Chehab 			FE_CAN_QAM_AUTO |
11469a0bf528SMauro Carvalho Chehab 			FE_CAN_TRANSMISSION_MODE_AUTO |
11479a0bf528SMauro Carvalho Chehab 			FE_CAN_GUARD_INTERVAL_AUTO |
11489a0bf528SMauro Carvalho Chehab 			FE_CAN_HIERARCHY_AUTO |
11499a0bf528SMauro Carvalho Chehab 			FE_CAN_RECOVER |
11509a0bf528SMauro Carvalho Chehab 			FE_CAN_MUTE_TS
11519a0bf528SMauro Carvalho Chehab 	},
11529a0bf528SMauro Carvalho Chehab 
11539a0bf528SMauro Carvalho Chehab 	.init = af9033_init,
11549a0bf528SMauro Carvalho Chehab 	.sleep = af9033_sleep,
11559a0bf528SMauro Carvalho Chehab 
11569a0bf528SMauro Carvalho Chehab 	.get_tune_settings = af9033_get_tune_settings,
11579a0bf528SMauro Carvalho Chehab 	.set_frontend = af9033_set_frontend,
11589a0bf528SMauro Carvalho Chehab 	.get_frontend = af9033_get_frontend,
11599a0bf528SMauro Carvalho Chehab 
11609a0bf528SMauro Carvalho Chehab 	.read_status = af9033_read_status,
11619a0bf528SMauro Carvalho Chehab 	.read_snr = af9033_read_snr,
11629a0bf528SMauro Carvalho Chehab 	.read_signal_strength = af9033_read_signal_strength,
11639a0bf528SMauro Carvalho Chehab 	.read_ber = af9033_read_ber,
11649a0bf528SMauro Carvalho Chehab 	.read_ucblocks = af9033_read_ucblocks,
11659a0bf528SMauro Carvalho Chehab 
11669a0bf528SMauro Carvalho Chehab 	.i2c_gate_ctrl = af9033_i2c_gate_ctrl,
11679a0bf528SMauro Carvalho Chehab };
11689a0bf528SMauro Carvalho Chehab 
1169f5b00a76SAntti Palosaari static int af9033_probe(struct i2c_client *client,
1170f5b00a76SAntti Palosaari 		const struct i2c_device_id *id)
1171f5b00a76SAntti Palosaari {
1172f5b00a76SAntti Palosaari 	struct af9033_config *cfg = client->dev.platform_data;
1173f5b00a76SAntti Palosaari 	struct af9033_dev *dev;
1174f5b00a76SAntti Palosaari 	int ret;
1175f5b00a76SAntti Palosaari 	u8 buf[8];
1176f5b00a76SAntti Palosaari 	u32 reg;
1177f5b00a76SAntti Palosaari 
1178f5b00a76SAntti Palosaari 	/* allocate memory for the internal state */
1179f5b00a76SAntti Palosaari 	dev = kzalloc(sizeof(struct af9033_dev), GFP_KERNEL);
1180f5b00a76SAntti Palosaari 	if (dev == NULL) {
1181f5b00a76SAntti Palosaari 		ret = -ENOMEM;
1182f5b00a76SAntti Palosaari 		dev_err(&client->dev, "Could not allocate memory for state\n");
1183f5b00a76SAntti Palosaari 		goto err;
1184f5b00a76SAntti Palosaari 	}
1185f5b00a76SAntti Palosaari 
1186f5b00a76SAntti Palosaari 	/* setup the state */
1187f5b00a76SAntti Palosaari 	dev->client = client;
118883f11619SAntti Palosaari 	INIT_DELAYED_WORK(&dev->stat_work, af9033_stat_work);
1189f5b00a76SAntti Palosaari 	memcpy(&dev->cfg, cfg, sizeof(struct af9033_config));
1190f5b00a76SAntti Palosaari 
1191f5b00a76SAntti Palosaari 	if (dev->cfg.clock != 12000000) {
1192f5b00a76SAntti Palosaari 		ret = -ENODEV;
1193f5b00a76SAntti Palosaari 		dev_err(&dev->client->dev,
11946a087f1fSAntti Palosaari 				"unsupported clock %d Hz, only 12000000 Hz is supported currently\n",
11956a087f1fSAntti Palosaari 				dev->cfg.clock);
1196f5b00a76SAntti Palosaari 		goto err_kfree;
1197f5b00a76SAntti Palosaari 	}
1198f5b00a76SAntti Palosaari 
1199f5b00a76SAntti Palosaari 	/* firmware version */
1200f5b00a76SAntti Palosaari 	switch (dev->cfg.tuner) {
1201f5b00a76SAntti Palosaari 	case AF9033_TUNER_IT9135_38:
1202f5b00a76SAntti Palosaari 	case AF9033_TUNER_IT9135_51:
1203f5b00a76SAntti Palosaari 	case AF9033_TUNER_IT9135_52:
1204f5b00a76SAntti Palosaari 	case AF9033_TUNER_IT9135_60:
1205f5b00a76SAntti Palosaari 	case AF9033_TUNER_IT9135_61:
1206f5b00a76SAntti Palosaari 	case AF9033_TUNER_IT9135_62:
120783f11619SAntti Palosaari 		dev->is_it9135 = true;
1208f5b00a76SAntti Palosaari 		reg = 0x004bfc;
1209f5b00a76SAntti Palosaari 		break;
1210f5b00a76SAntti Palosaari 	default:
121183f11619SAntti Palosaari 		dev->is_af9035 = true;
1212f5b00a76SAntti Palosaari 		reg = 0x0083e9;
1213f5b00a76SAntti Palosaari 		break;
1214f5b00a76SAntti Palosaari 	}
1215f5b00a76SAntti Palosaari 
1216f5b00a76SAntti Palosaari 	ret = af9033_rd_regs(dev, reg, &buf[0], 4);
1217f5b00a76SAntti Palosaari 	if (ret < 0)
1218f5b00a76SAntti Palosaari 		goto err_kfree;
1219f5b00a76SAntti Palosaari 
1220f5b00a76SAntti Palosaari 	ret = af9033_rd_regs(dev, 0x804191, &buf[4], 4);
1221f5b00a76SAntti Palosaari 	if (ret < 0)
1222f5b00a76SAntti Palosaari 		goto err_kfree;
1223f5b00a76SAntti Palosaari 
1224f5b00a76SAntti Palosaari 	dev_info(&dev->client->dev,
12256a087f1fSAntti Palosaari 			"firmware version: LINK %d.%d.%d.%d - OFDM %d.%d.%d.%d\n",
12266a087f1fSAntti Palosaari 			buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
12276a087f1fSAntti Palosaari 			buf[7]);
1228f5b00a76SAntti Palosaari 
1229f5b00a76SAntti Palosaari 	/* sleep */
1230f5b00a76SAntti Palosaari 	switch (dev->cfg.tuner) {
1231f5b00a76SAntti Palosaari 	case AF9033_TUNER_IT9135_38:
1232f5b00a76SAntti Palosaari 	case AF9033_TUNER_IT9135_51:
1233f5b00a76SAntti Palosaari 	case AF9033_TUNER_IT9135_52:
1234f5b00a76SAntti Palosaari 	case AF9033_TUNER_IT9135_60:
1235f5b00a76SAntti Palosaari 	case AF9033_TUNER_IT9135_61:
1236f5b00a76SAntti Palosaari 	case AF9033_TUNER_IT9135_62:
1237f5b00a76SAntti Palosaari 		/* IT9135 did not like to sleep at that early */
1238f5b00a76SAntti Palosaari 		break;
1239f5b00a76SAntti Palosaari 	default:
1240f5b00a76SAntti Palosaari 		ret = af9033_wr_reg(dev, 0x80004c, 1);
1241f5b00a76SAntti Palosaari 		if (ret < 0)
1242f5b00a76SAntti Palosaari 			goto err_kfree;
1243f5b00a76SAntti Palosaari 
1244f5b00a76SAntti Palosaari 		ret = af9033_wr_reg(dev, 0x800000, 0);
1245f5b00a76SAntti Palosaari 		if (ret < 0)
1246f5b00a76SAntti Palosaari 			goto err_kfree;
1247f5b00a76SAntti Palosaari 	}
1248f5b00a76SAntti Palosaari 
1249f5b00a76SAntti Palosaari 	/* configure internal TS mode */
1250f5b00a76SAntti Palosaari 	switch (dev->cfg.ts_mode) {
1251f5b00a76SAntti Palosaari 	case AF9033_TS_MODE_PARALLEL:
1252f5b00a76SAntti Palosaari 		dev->ts_mode_parallel = true;
1253f5b00a76SAntti Palosaari 		break;
1254f5b00a76SAntti Palosaari 	case AF9033_TS_MODE_SERIAL:
1255f5b00a76SAntti Palosaari 		dev->ts_mode_serial = true;
1256f5b00a76SAntti Palosaari 		break;
1257f5b00a76SAntti Palosaari 	case AF9033_TS_MODE_USB:
1258f5b00a76SAntti Palosaari 		/* usb mode for AF9035 */
1259f5b00a76SAntti Palosaari 	default:
1260f5b00a76SAntti Palosaari 		break;
1261f5b00a76SAntti Palosaari 	}
1262f5b00a76SAntti Palosaari 
1263f5b00a76SAntti Palosaari 	/* create dvb_frontend */
1264f5b00a76SAntti Palosaari 	memcpy(&dev->fe.ops, &af9033_ops, sizeof(struct dvb_frontend_ops));
1265f5b00a76SAntti Palosaari 	dev->fe.demodulator_priv = dev;
1266f5b00a76SAntti Palosaari 	*cfg->fe = &dev->fe;
1267f5b00a76SAntti Palosaari 	if (cfg->ops) {
1268f5b00a76SAntti Palosaari 		cfg->ops->pid_filter = af9033_pid_filter;
1269f5b00a76SAntti Palosaari 		cfg->ops->pid_filter_ctrl = af9033_pid_filter_ctrl;
1270f5b00a76SAntti Palosaari 	}
1271f5b00a76SAntti Palosaari 	i2c_set_clientdata(client, dev);
1272f5b00a76SAntti Palosaari 
1273f5b00a76SAntti Palosaari 	dev_info(&dev->client->dev, "Afatech AF9033 successfully attached\n");
1274f5b00a76SAntti Palosaari 	return 0;
1275f5b00a76SAntti Palosaari err_kfree:
1276f5b00a76SAntti Palosaari 	kfree(dev);
1277f5b00a76SAntti Palosaari err:
12786a087f1fSAntti Palosaari 	dev_dbg(&client->dev, "failed=%d\n", ret);
1279f5b00a76SAntti Palosaari 	return ret;
1280f5b00a76SAntti Palosaari }
1281f5b00a76SAntti Palosaari 
1282f5b00a76SAntti Palosaari static int af9033_remove(struct i2c_client *client)
1283f5b00a76SAntti Palosaari {
1284f5b00a76SAntti Palosaari 	struct af9033_dev *dev = i2c_get_clientdata(client);
1285f5b00a76SAntti Palosaari 
12866a087f1fSAntti Palosaari 	dev_dbg(&dev->client->dev, "\n");
1287f5b00a76SAntti Palosaari 
1288f5b00a76SAntti Palosaari 	dev->fe.ops.release = NULL;
1289f5b00a76SAntti Palosaari 	dev->fe.demodulator_priv = NULL;
1290f5b00a76SAntti Palosaari 	kfree(dev);
1291f5b00a76SAntti Palosaari 
1292f5b00a76SAntti Palosaari 	return 0;
1293f5b00a76SAntti Palosaari }
1294f5b00a76SAntti Palosaari 
1295f5b00a76SAntti Palosaari static const struct i2c_device_id af9033_id_table[] = {
1296f5b00a76SAntti Palosaari 	{"af9033", 0},
1297f5b00a76SAntti Palosaari 	{}
1298f5b00a76SAntti Palosaari };
1299f5b00a76SAntti Palosaari MODULE_DEVICE_TABLE(i2c, af9033_id_table);
1300f5b00a76SAntti Palosaari 
1301f5b00a76SAntti Palosaari static struct i2c_driver af9033_driver = {
1302f5b00a76SAntti Palosaari 	.driver = {
1303f5b00a76SAntti Palosaari 		.owner	= THIS_MODULE,
1304f5b00a76SAntti Palosaari 		.name	= "af9033",
1305f5b00a76SAntti Palosaari 	},
1306f5b00a76SAntti Palosaari 	.probe		= af9033_probe,
1307f5b00a76SAntti Palosaari 	.remove		= af9033_remove,
1308f5b00a76SAntti Palosaari 	.id_table	= af9033_id_table,
1309f5b00a76SAntti Palosaari };
1310f5b00a76SAntti Palosaari 
1311f5b00a76SAntti Palosaari module_i2c_driver(af9033_driver);
1312f5b00a76SAntti Palosaari 
13139a0bf528SMauro Carvalho Chehab MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
13149a0bf528SMauro Carvalho Chehab MODULE_DESCRIPTION("Afatech AF9033 DVB-T demodulator driver");
13159a0bf528SMauro Carvalho Chehab MODULE_LICENSE("GPL");
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