1 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
2 
3 #include <media/saa7146_vv.h>
4 
5 static u32 saa7146_i2c_func(struct i2c_adapter *adapter)
6 {
7 	/* DEB_I2C("'%s'\n", adapter->name); */
8 
9 	return	  I2C_FUNC_I2C
10 		| I2C_FUNC_SMBUS_QUICK
11 		| I2C_FUNC_SMBUS_READ_BYTE	| I2C_FUNC_SMBUS_WRITE_BYTE
12 		| I2C_FUNC_SMBUS_READ_BYTE_DATA | I2C_FUNC_SMBUS_WRITE_BYTE_DATA;
13 }
14 
15 /* this function returns the status-register of our i2c-device */
16 static inline u32 saa7146_i2c_status(struct saa7146_dev *dev)
17 {
18 	u32 iicsta = saa7146_read(dev, I2C_STATUS);
19 	/* DEB_I2C("status: 0x%08x\n", iicsta); */
20 	return iicsta;
21 }
22 
23 /* this function runs through the i2c-messages and prepares the data to be
24    sent through the saa7146. have a look at the specifications p. 122 ff
25    to understand this. it returns the number of u32s to send, or -1
26    in case of an error. */
27 static int saa7146_i2c_msg_prepare(const struct i2c_msg *m, int num, __le32 *op)
28 {
29 	int h1, h2;
30 	int i, j, addr;
31 	int mem = 0, op_count = 0;
32 
33 	/* first determine size of needed memory */
34 	for(i = 0; i < num; i++) {
35 		mem += m[i].len + 1;
36 	}
37 
38 	/* worst case: we need one u32 for three bytes to be send
39 	   plus one extra byte to address the device */
40 	mem = 1 + ((mem-1) / 3);
41 
42 	/* we assume that op points to a memory of at least
43 	 * SAA7146_I2C_MEM bytes size. if we exceed this limit...
44 	 */
45 	if ((4 * mem) > SAA7146_I2C_MEM) {
46 		/* DEB_I2C("cannot prepare i2c-message\n"); */
47 		return -ENOMEM;
48 	}
49 
50 	/* be careful: clear out the i2c-mem first */
51 	memset(op,0,sizeof(__le32)*mem);
52 
53 	/* loop through all messages */
54 	for(i = 0; i < num; i++) {
55 
56 		/* insert the address of the i2c-slave.
57 		   note: we get 7 bit i2c-addresses,
58 		   so we have to perform a translation */
59 		addr = (m[i].addr*2) + ( (0 != (m[i].flags & I2C_M_RD)) ? 1 : 0);
60 		h1 = op_count/3; h2 = op_count%3;
61 		op[h1] |= cpu_to_le32(	    (u8)addr << ((3-h2)*8));
62 		op[h1] |= cpu_to_le32(SAA7146_I2C_START << ((3-h2)*2));
63 		op_count++;
64 
65 		/* loop through all bytes of message i */
66 		for(j = 0; j < m[i].len; j++) {
67 			/* insert the data bytes */
68 			h1 = op_count/3; h2 = op_count%3;
69 			op[h1] |= cpu_to_le32( (u32)((u8)m[i].buf[j]) << ((3-h2)*8));
70 			op[h1] |= cpu_to_le32(       SAA7146_I2C_CONT << ((3-h2)*2));
71 			op_count++;
72 		}
73 
74 	}
75 
76 	/* have a look at the last byte inserted:
77 	  if it was: ...CONT change it to ...STOP */
78 	h1 = (op_count-1)/3; h2 = (op_count-1)%3;
79 	if ( SAA7146_I2C_CONT == (0x3 & (le32_to_cpu(op[h1]) >> ((3-h2)*2))) ) {
80 		op[h1] &= ~cpu_to_le32(0x2 << ((3-h2)*2));
81 		op[h1] |= cpu_to_le32(SAA7146_I2C_STOP << ((3-h2)*2));
82 	}
83 
84 	/* return the number of u32s to send */
85 	return mem;
86 }
87 
88 /* this functions loops through all i2c-messages. normally, it should determine
89    which bytes were read through the adapter and write them back to the corresponding
90    i2c-message. but instead, we simply write back all bytes.
91    fixme: this could be improved. */
92 static int saa7146_i2c_msg_cleanup(const struct i2c_msg *m, int num, __le32 *op)
93 {
94 	int i, j;
95 	int op_count = 0;
96 
97 	/* loop through all messages */
98 	for(i = 0; i < num; i++) {
99 
100 		op_count++;
101 
102 		/* loop through all bytes of message i */
103 		for(j = 0; j < m[i].len; j++) {
104 			/* write back all bytes that could have been read */
105 			m[i].buf[j] = (le32_to_cpu(op[op_count/3]) >> ((3-(op_count%3))*8));
106 			op_count++;
107 		}
108 	}
109 
110 	return 0;
111 }
112 
113 /* this functions resets the i2c-device and returns 0 if everything was fine, otherwise -1 */
114 static int saa7146_i2c_reset(struct saa7146_dev *dev)
115 {
116 	/* get current status */
117 	u32 status = saa7146_i2c_status(dev);
118 
119 	/* clear registers for sure */
120 	saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
121 	saa7146_write(dev, I2C_TRANSFER, 0);
122 
123 	/* check if any operation is still in progress */
124 	if ( 0 != ( status & SAA7146_I2C_BUSY) ) {
125 
126 		/* yes, kill ongoing operation */
127 		DEB_I2C("busy_state detected\n");
128 
129 		/* set "ABORT-OPERATION"-bit (bit 7)*/
130 		saa7146_write(dev, I2C_STATUS, (dev->i2c_bitrate | MASK_07));
131 		saa7146_write(dev, MC2, (MASK_00 | MASK_16));
132 		msleep(SAA7146_I2C_DELAY);
133 
134 		/* clear all error-bits pending; this is needed because p.123, note 1 */
135 		saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
136 		saa7146_write(dev, MC2, (MASK_00 | MASK_16));
137 		msleep(SAA7146_I2C_DELAY);
138 	}
139 
140 	/* check if any error is (still) present. (this can be necessary because p.123, note 1) */
141 	status = saa7146_i2c_status(dev);
142 
143 	if ( dev->i2c_bitrate != status ) {
144 
145 		DEB_I2C("error_state detected. status:0x%08x\n", status);
146 
147 		/* Repeat the abort operation. This seems to be necessary
148 		   after serious protocol errors caused by e.g. the SAA7740 */
149 		saa7146_write(dev, I2C_STATUS, (dev->i2c_bitrate | MASK_07));
150 		saa7146_write(dev, MC2, (MASK_00 | MASK_16));
151 		msleep(SAA7146_I2C_DELAY);
152 
153 		/* clear all error-bits pending */
154 		saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
155 		saa7146_write(dev, MC2, (MASK_00 | MASK_16));
156 		msleep(SAA7146_I2C_DELAY);
157 
158 		/* the data sheet says it might be necessary to clear the status
159 		   twice after an abort */
160 		saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate);
161 		saa7146_write(dev, MC2, (MASK_00 | MASK_16));
162 		msleep(SAA7146_I2C_DELAY);
163 	}
164 
165 	/* if any error is still present, a fatal error has occurred ... */
166 	status = saa7146_i2c_status(dev);
167 	if ( dev->i2c_bitrate != status ) {
168 		DEB_I2C("fatal error. status:0x%08x\n", status);
169 		return -1;
170 	}
171 
172 	return 0;
173 }
174 
175 /* this functions writes out the data-byte 'dword' to the i2c-device.
176    it returns 0 if ok, -1 if the transfer failed, -2 if the transfer
177    failed badly (e.g. address error) */
178 static int saa7146_i2c_writeout(struct saa7146_dev *dev, __le32 *dword, int short_delay)
179 {
180 	u32 status = 0, mc2 = 0;
181 	int trial = 0;
182 	unsigned long timeout;
183 
184 	/* write out i2c-command */
185 	DEB_I2C("before: 0x%08x (status: 0x%08x), %d\n",
186 		*dword, saa7146_read(dev, I2C_STATUS), dev->i2c_op);
187 
188 	if( 0 != (SAA7146_USE_I2C_IRQ & dev->ext->flags)) {
189 
190 		saa7146_write(dev, I2C_STATUS,	 dev->i2c_bitrate);
191 		saa7146_write(dev, I2C_TRANSFER, le32_to_cpu(*dword));
192 
193 		dev->i2c_op = 1;
194 		SAA7146_ISR_CLEAR(dev, MASK_16|MASK_17);
195 		SAA7146_IER_ENABLE(dev, MASK_16|MASK_17);
196 		saa7146_write(dev, MC2, (MASK_00 | MASK_16));
197 
198 		timeout = HZ/100 + 1; /* 10ms */
199 		timeout = wait_event_interruptible_timeout(dev->i2c_wq, dev->i2c_op == 0, timeout);
200 		if (timeout == -ERESTARTSYS || dev->i2c_op) {
201 			SAA7146_IER_DISABLE(dev, MASK_16|MASK_17);
202 			SAA7146_ISR_CLEAR(dev, MASK_16|MASK_17);
203 			if (timeout == -ERESTARTSYS)
204 				/* a signal arrived */
205 				return -ERESTARTSYS;
206 
207 			pr_warn("%s %s [irq]: timed out waiting for end of xfer\n",
208 				dev->name, __func__);
209 			return -EIO;
210 		}
211 		status = saa7146_read(dev, I2C_STATUS);
212 	} else {
213 		saa7146_write(dev, I2C_STATUS,	 dev->i2c_bitrate);
214 		saa7146_write(dev, I2C_TRANSFER, le32_to_cpu(*dword));
215 		saa7146_write(dev, MC2, (MASK_00 | MASK_16));
216 
217 		/* do not poll for i2c-status before upload is complete */
218 		timeout = jiffies + HZ/100 + 1; /* 10ms */
219 		while(1) {
220 			mc2 = (saa7146_read(dev, MC2) & 0x1);
221 			if( 0 != mc2 ) {
222 				break;
223 			}
224 			if (time_after(jiffies,timeout)) {
225 				pr_warn("%s %s: timed out waiting for MC2\n",
226 					dev->name, __func__);
227 				return -EIO;
228 			}
229 		}
230 		/* wait until we get a transfer done or error */
231 		timeout = jiffies + HZ/100 + 1; /* 10ms */
232 		/* first read usually delivers bogus results... */
233 		saa7146_i2c_status(dev);
234 		while(1) {
235 			status = saa7146_i2c_status(dev);
236 			if ((status & 0x3) != 1)
237 				break;
238 			if (time_after(jiffies,timeout)) {
239 				/* this is normal when probing the bus
240 				 * (no answer from nonexisistant device...)
241 				 */
242 				pr_warn("%s %s [poll]: timed out waiting for end of xfer\n",
243 					dev->name, __func__);
244 				return -EIO;
245 			}
246 			if (++trial < 50 && short_delay)
247 				udelay(10);
248 			else
249 				msleep(1);
250 		}
251 	}
252 
253 	/* give a detailed status report */
254 	if ( 0 != (status & (SAA7146_I2C_SPERR | SAA7146_I2C_APERR |
255 			     SAA7146_I2C_DTERR | SAA7146_I2C_DRERR |
256 			     SAA7146_I2C_AL    | SAA7146_I2C_ERR   |
257 			     SAA7146_I2C_BUSY)) ) {
258 
259 		if ( 0 == (status & SAA7146_I2C_ERR) ||
260 		     0 == (status & SAA7146_I2C_BUSY) ) {
261 			/* it may take some time until ERR goes high - ignore */
262 			DEB_I2C("unexpected i2c status %04x\n", status);
263 		}
264 		if( 0 != (status & SAA7146_I2C_SPERR) ) {
265 			DEB_I2C("error due to invalid start/stop condition\n");
266 		}
267 		if( 0 != (status & SAA7146_I2C_DTERR) ) {
268 			DEB_I2C("error in data transmission\n");
269 		}
270 		if( 0 != (status & SAA7146_I2C_DRERR) ) {
271 			DEB_I2C("error when receiving data\n");
272 		}
273 		if( 0 != (status & SAA7146_I2C_AL) ) {
274 			DEB_I2C("error because arbitration lost\n");
275 		}
276 
277 		/* we handle address-errors here */
278 		if( 0 != (status & SAA7146_I2C_APERR) ) {
279 			DEB_I2C("error in address phase\n");
280 			return -EREMOTEIO;
281 		}
282 
283 		return -EIO;
284 	}
285 
286 	/* read back data, just in case we were reading ... */
287 	*dword = cpu_to_le32(saa7146_read(dev, I2C_TRANSFER));
288 
289 	DEB_I2C("after: 0x%08x\n", *dword);
290 	return 0;
291 }
292 
293 static int saa7146_i2c_transfer(struct saa7146_dev *dev, const struct i2c_msg *msgs, int num, int retries)
294 {
295 	int i = 0, count = 0;
296 	__le32 *buffer = dev->d_i2c.cpu_addr;
297 	int err = 0;
298 	int short_delay = 0;
299 
300 	if (mutex_lock_interruptible(&dev->i2c_lock))
301 		return -ERESTARTSYS;
302 
303 	for(i=0;i<num;i++) {
304 		DEB_I2C("msg:%d/%d\n", i+1, num);
305 	}
306 
307 	/* prepare the message(s), get number of u32s to transfer */
308 	count = saa7146_i2c_msg_prepare(msgs, num, buffer);
309 	if ( 0 > count ) {
310 		err = -1;
311 		goto out;
312 	}
313 
314 	if ( count > 3 || 0 != (SAA7146_I2C_SHORT_DELAY & dev->ext->flags) )
315 		short_delay = 1;
316 
317 	do {
318 		/* reset the i2c-device if necessary */
319 		err = saa7146_i2c_reset(dev);
320 		if ( 0 > err ) {
321 			DEB_I2C("could not reset i2c-device\n");
322 			goto out;
323 		}
324 
325 		/* write out the u32s one after another */
326 		for(i = 0; i < count; i++) {
327 			err = saa7146_i2c_writeout(dev, &buffer[i], short_delay);
328 			if ( 0 != err) {
329 				/* this one is unsatisfying: some i2c slaves on some
330 				   dvb cards don't acknowledge correctly, so the saa7146
331 				   thinks that an address error occurred. in that case, the
332 				   transaction should be retrying, even if an address error
333 				   occurred. analog saa7146 based cards extensively rely on
334 				   i2c address probing, however, and address errors indicate that a
335 				   device is really *not* there. retrying in that case
336 				   increases the time the device needs to probe greatly, so
337 				   it should be avoided. So we bail out in irq mode after an
338 				   address error and trust the saa7146 address error detection. */
339 				if (-EREMOTEIO == err && 0 != (SAA7146_USE_I2C_IRQ & dev->ext->flags))
340 					goto out;
341 				DEB_I2C("error while sending message(s). starting again\n");
342 				break;
343 			}
344 		}
345 		if( 0 == err ) {
346 			err = num;
347 			break;
348 		}
349 
350 		/* delay a bit before retrying */
351 		msleep(10);
352 
353 	} while (err != num && retries--);
354 
355 	/* quit if any error occurred */
356 	if (err != num)
357 		goto out;
358 
359 	/* if any things had to be read, get the results */
360 	if ( 0 != saa7146_i2c_msg_cleanup(msgs, num, buffer)) {
361 		DEB_I2C("could not cleanup i2c-message\n");
362 		err = -1;
363 		goto out;
364 	}
365 
366 	/* return the number of delivered messages */
367 	DEB_I2C("transmission successful. (msg:%d)\n", err);
368 out:
369 	/* another bug in revision 0: the i2c-registers get uploaded randomly by other
370 	   uploads, so we better clear them out before continuing */
371 	if( 0 == dev->revision ) {
372 		__le32 zero = 0;
373 		saa7146_i2c_reset(dev);
374 		if( 0 != saa7146_i2c_writeout(dev, &zero, short_delay)) {
375 			pr_info("revision 0 error. this should never happen\n");
376 		}
377 	}
378 
379 	mutex_unlock(&dev->i2c_lock);
380 	return err;
381 }
382 
383 /* utility functions */
384 static int saa7146_i2c_xfer(struct i2c_adapter* adapter, struct i2c_msg *msg, int num)
385 {
386 	struct v4l2_device *v4l2_dev = i2c_get_adapdata(adapter);
387 	struct saa7146_dev *dev = to_saa7146_dev(v4l2_dev);
388 
389 	/* use helper function to transfer data */
390 	return saa7146_i2c_transfer(dev, msg, num, adapter->retries);
391 }
392 
393 
394 /*****************************************************************************/
395 /* i2c-adapter helper functions                                              */
396 
397 /* exported algorithm data */
398 static struct i2c_algorithm saa7146_algo = {
399 	.master_xfer	= saa7146_i2c_xfer,
400 	.functionality	= saa7146_i2c_func,
401 };
402 
403 int saa7146_i2c_adapter_prepare(struct saa7146_dev *dev, struct i2c_adapter *i2c_adapter, u32 bitrate)
404 {
405 	DEB_EE("bitrate: 0x%08x\n", bitrate);
406 
407 	/* enable i2c-port pins */
408 	saa7146_write(dev, MC1, (MASK_08 | MASK_24));
409 
410 	dev->i2c_bitrate = bitrate;
411 	saa7146_i2c_reset(dev);
412 
413 	if (i2c_adapter) {
414 		i2c_set_adapdata(i2c_adapter, &dev->v4l2_dev);
415 		i2c_adapter->dev.parent    = &dev->pci->dev;
416 		i2c_adapter->algo	   = &saa7146_algo;
417 		i2c_adapter->algo_data     = NULL;
418 		i2c_adapter->timeout = SAA7146_I2C_TIMEOUT;
419 		i2c_adapter->retries = SAA7146_I2C_RETRIES;
420 	}
421 
422 	return 0;
423 }
424