1 // SPDX-License-Identifier: GPL-2.0 2 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 3 4 #include <media/drv-intf/saa7146_vv.h> 5 6 static u32 saa7146_i2c_func(struct i2c_adapter *adapter) 7 { 8 /* DEB_I2C("'%s'\n", adapter->name); */ 9 10 return I2C_FUNC_I2C 11 | I2C_FUNC_SMBUS_QUICK 12 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE 13 | I2C_FUNC_SMBUS_READ_BYTE_DATA | I2C_FUNC_SMBUS_WRITE_BYTE_DATA; 14 } 15 16 /* this function returns the status-register of our i2c-device */ 17 static inline u32 saa7146_i2c_status(struct saa7146_dev *dev) 18 { 19 u32 iicsta = saa7146_read(dev, I2C_STATUS); 20 /* DEB_I2C("status: 0x%08x\n", iicsta); */ 21 return iicsta; 22 } 23 24 /* this function runs through the i2c-messages and prepares the data to be 25 sent through the saa7146. have a look at the specifications p. 122 ff 26 to understand this. it returns the number of u32s to send, or -1 27 in case of an error. */ 28 static int saa7146_i2c_msg_prepare(const struct i2c_msg *m, int num, __le32 *op) 29 { 30 int h1, h2; 31 int i, j, addr; 32 int mem = 0, op_count = 0; 33 34 /* first determine size of needed memory */ 35 for(i = 0; i < num; i++) { 36 mem += m[i].len + 1; 37 } 38 39 /* worst case: we need one u32 for three bytes to be send 40 plus one extra byte to address the device */ 41 mem = 1 + ((mem-1) / 3); 42 43 /* we assume that op points to a memory of at least 44 * SAA7146_I2C_MEM bytes size. if we exceed this limit... 45 */ 46 if ((4 * mem) > SAA7146_I2C_MEM) { 47 /* DEB_I2C("cannot prepare i2c-message\n"); */ 48 return -ENOMEM; 49 } 50 51 /* be careful: clear out the i2c-mem first */ 52 memset(op,0,sizeof(__le32)*mem); 53 54 /* loop through all messages */ 55 for(i = 0; i < num; i++) { 56 57 /* insert the address of the i2c-slave. 58 note: we get 7 bit i2c-addresses, 59 so we have to perform a translation */ 60 addr = (m[i].addr*2) + ( (0 != (m[i].flags & I2C_M_RD)) ? 1 : 0); 61 h1 = op_count/3; h2 = op_count%3; 62 op[h1] |= cpu_to_le32( (u8)addr << ((3-h2)*8)); 63 op[h1] |= cpu_to_le32(SAA7146_I2C_START << ((3-h2)*2)); 64 op_count++; 65 66 /* loop through all bytes of message i */ 67 for(j = 0; j < m[i].len; j++) { 68 /* insert the data bytes */ 69 h1 = op_count/3; h2 = op_count%3; 70 op[h1] |= cpu_to_le32( (u32)((u8)m[i].buf[j]) << ((3-h2)*8)); 71 op[h1] |= cpu_to_le32( SAA7146_I2C_CONT << ((3-h2)*2)); 72 op_count++; 73 } 74 75 } 76 77 /* have a look at the last byte inserted: 78 if it was: ...CONT change it to ...STOP */ 79 h1 = (op_count-1)/3; h2 = (op_count-1)%3; 80 if ( SAA7146_I2C_CONT == (0x3 & (le32_to_cpu(op[h1]) >> ((3-h2)*2))) ) { 81 op[h1] &= ~cpu_to_le32(0x2 << ((3-h2)*2)); 82 op[h1] |= cpu_to_le32(SAA7146_I2C_STOP << ((3-h2)*2)); 83 } 84 85 /* return the number of u32s to send */ 86 return mem; 87 } 88 89 /* this functions loops through all i2c-messages. normally, it should determine 90 which bytes were read through the adapter and write them back to the corresponding 91 i2c-message. but instead, we simply write back all bytes. 92 fixme: this could be improved. */ 93 static int saa7146_i2c_msg_cleanup(const struct i2c_msg *m, int num, __le32 *op) 94 { 95 int i, j; 96 int op_count = 0; 97 98 /* loop through all messages */ 99 for(i = 0; i < num; i++) { 100 101 op_count++; 102 103 /* loop through all bytes of message i */ 104 for(j = 0; j < m[i].len; j++) { 105 /* write back all bytes that could have been read */ 106 m[i].buf[j] = (le32_to_cpu(op[op_count/3]) >> ((3-(op_count%3))*8)); 107 op_count++; 108 } 109 } 110 111 return 0; 112 } 113 114 /* this functions resets the i2c-device and returns 0 if everything was fine, otherwise -1 */ 115 static int saa7146_i2c_reset(struct saa7146_dev *dev) 116 { 117 /* get current status */ 118 u32 status = saa7146_i2c_status(dev); 119 120 /* clear registers for sure */ 121 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate); 122 saa7146_write(dev, I2C_TRANSFER, 0); 123 124 /* check if any operation is still in progress */ 125 if ( 0 != ( status & SAA7146_I2C_BUSY) ) { 126 127 /* yes, kill ongoing operation */ 128 DEB_I2C("busy_state detected\n"); 129 130 /* set "ABORT-OPERATION"-bit (bit 7)*/ 131 saa7146_write(dev, I2C_STATUS, (dev->i2c_bitrate | MASK_07)); 132 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 133 msleep(SAA7146_I2C_DELAY); 134 135 /* clear all error-bits pending; this is needed because p.123, note 1 */ 136 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate); 137 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 138 msleep(SAA7146_I2C_DELAY); 139 } 140 141 /* check if any error is (still) present. (this can be necessary because p.123, note 1) */ 142 status = saa7146_i2c_status(dev); 143 144 if ( dev->i2c_bitrate != status ) { 145 146 DEB_I2C("error_state detected. status:0x%08x\n", status); 147 148 /* Repeat the abort operation. This seems to be necessary 149 after serious protocol errors caused by e.g. the SAA7740 */ 150 saa7146_write(dev, I2C_STATUS, (dev->i2c_bitrate | MASK_07)); 151 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 152 msleep(SAA7146_I2C_DELAY); 153 154 /* clear all error-bits pending */ 155 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate); 156 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 157 msleep(SAA7146_I2C_DELAY); 158 159 /* the data sheet says it might be necessary to clear the status 160 twice after an abort */ 161 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate); 162 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 163 msleep(SAA7146_I2C_DELAY); 164 } 165 166 /* if any error is still present, a fatal error has occurred ... */ 167 status = saa7146_i2c_status(dev); 168 if ( dev->i2c_bitrate != status ) { 169 DEB_I2C("fatal error. status:0x%08x\n", status); 170 return -1; 171 } 172 173 return 0; 174 } 175 176 /* this functions writes out the data-byte 'dword' to the i2c-device. 177 it returns 0 if ok, -1 if the transfer failed, -2 if the transfer 178 failed badly (e.g. address error) */ 179 static int saa7146_i2c_writeout(struct saa7146_dev *dev, __le32 *dword, int short_delay) 180 { 181 u32 status = 0, mc2 = 0; 182 int trial = 0; 183 unsigned long timeout; 184 185 /* write out i2c-command */ 186 DEB_I2C("before: 0x%08x (status: 0x%08x), %d\n", 187 *dword, saa7146_read(dev, I2C_STATUS), dev->i2c_op); 188 189 if( 0 != (SAA7146_USE_I2C_IRQ & dev->ext->flags)) { 190 191 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate); 192 saa7146_write(dev, I2C_TRANSFER, le32_to_cpu(*dword)); 193 194 dev->i2c_op = 1; 195 SAA7146_ISR_CLEAR(dev, MASK_16|MASK_17); 196 SAA7146_IER_ENABLE(dev, MASK_16|MASK_17); 197 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 198 199 timeout = HZ/100 + 1; /* 10ms */ 200 timeout = wait_event_interruptible_timeout(dev->i2c_wq, dev->i2c_op == 0, timeout); 201 if (timeout == -ERESTARTSYS || dev->i2c_op) { 202 SAA7146_IER_DISABLE(dev, MASK_16|MASK_17); 203 SAA7146_ISR_CLEAR(dev, MASK_16|MASK_17); 204 if (timeout == -ERESTARTSYS) 205 /* a signal arrived */ 206 return -ERESTARTSYS; 207 208 pr_warn("%s %s [irq]: timed out waiting for end of xfer\n", 209 dev->name, __func__); 210 return -EIO; 211 } 212 status = saa7146_read(dev, I2C_STATUS); 213 } else { 214 saa7146_write(dev, I2C_STATUS, dev->i2c_bitrate); 215 saa7146_write(dev, I2C_TRANSFER, le32_to_cpu(*dword)); 216 saa7146_write(dev, MC2, (MASK_00 | MASK_16)); 217 218 /* do not poll for i2c-status before upload is complete */ 219 timeout = jiffies + HZ/100 + 1; /* 10ms */ 220 while(1) { 221 mc2 = (saa7146_read(dev, MC2) & 0x1); 222 if( 0 != mc2 ) { 223 break; 224 } 225 if (time_after(jiffies,timeout)) { 226 pr_warn("%s %s: timed out waiting for MC2\n", 227 dev->name, __func__); 228 return -EIO; 229 } 230 } 231 /* wait until we get a transfer done or error */ 232 timeout = jiffies + HZ/100 + 1; /* 10ms */ 233 /* first read usually delivers bogus results... */ 234 saa7146_i2c_status(dev); 235 while(1) { 236 status = saa7146_i2c_status(dev); 237 if ((status & 0x3) != 1) 238 break; 239 if (time_after(jiffies,timeout)) { 240 /* this is normal when probing the bus 241 * (no answer from nonexisistant device...) 242 */ 243 pr_warn("%s %s [poll]: timed out waiting for end of xfer\n", 244 dev->name, __func__); 245 return -EIO; 246 } 247 if (++trial < 50 && short_delay) 248 udelay(10); 249 else 250 msleep(1); 251 } 252 } 253 254 /* give a detailed status report */ 255 if ( 0 != (status & (SAA7146_I2C_SPERR | SAA7146_I2C_APERR | 256 SAA7146_I2C_DTERR | SAA7146_I2C_DRERR | 257 SAA7146_I2C_AL | SAA7146_I2C_ERR | 258 SAA7146_I2C_BUSY)) ) { 259 260 if ( 0 == (status & SAA7146_I2C_ERR) || 261 0 == (status & SAA7146_I2C_BUSY) ) { 262 /* it may take some time until ERR goes high - ignore */ 263 DEB_I2C("unexpected i2c status %04x\n", status); 264 } 265 if( 0 != (status & SAA7146_I2C_SPERR) ) { 266 DEB_I2C("error due to invalid start/stop condition\n"); 267 } 268 if( 0 != (status & SAA7146_I2C_DTERR) ) { 269 DEB_I2C("error in data transmission\n"); 270 } 271 if( 0 != (status & SAA7146_I2C_DRERR) ) { 272 DEB_I2C("error when receiving data\n"); 273 } 274 if( 0 != (status & SAA7146_I2C_AL) ) { 275 DEB_I2C("error because arbitration lost\n"); 276 } 277 278 /* we handle address-errors here */ 279 if( 0 != (status & SAA7146_I2C_APERR) ) { 280 DEB_I2C("error in address phase\n"); 281 return -EREMOTEIO; 282 } 283 284 return -EIO; 285 } 286 287 /* read back data, just in case we were reading ... */ 288 *dword = cpu_to_le32(saa7146_read(dev, I2C_TRANSFER)); 289 290 DEB_I2C("after: 0x%08x\n", *dword); 291 return 0; 292 } 293 294 static int saa7146_i2c_transfer(struct saa7146_dev *dev, const struct i2c_msg *msgs, int num, int retries) 295 { 296 int i = 0, count = 0; 297 __le32 *buffer = dev->d_i2c.cpu_addr; 298 int err = 0; 299 int short_delay = 0; 300 301 if (mutex_lock_interruptible(&dev->i2c_lock)) 302 return -ERESTARTSYS; 303 304 for(i=0;i<num;i++) { 305 DEB_I2C("msg:%d/%d\n", i+1, num); 306 } 307 308 /* prepare the message(s), get number of u32s to transfer */ 309 count = saa7146_i2c_msg_prepare(msgs, num, buffer); 310 if ( 0 > count ) { 311 err = -1; 312 goto out; 313 } 314 315 if ( count > 3 || 0 != (SAA7146_I2C_SHORT_DELAY & dev->ext->flags) ) 316 short_delay = 1; 317 318 do { 319 /* reset the i2c-device if necessary */ 320 err = saa7146_i2c_reset(dev); 321 if ( 0 > err ) { 322 DEB_I2C("could not reset i2c-device\n"); 323 goto out; 324 } 325 326 /* write out the u32s one after another */ 327 for(i = 0; i < count; i++) { 328 err = saa7146_i2c_writeout(dev, &buffer[i], short_delay); 329 if ( 0 != err) { 330 /* this one is unsatisfying: some i2c slaves on some 331 dvb cards don't acknowledge correctly, so the saa7146 332 thinks that an address error occurred. in that case, the 333 transaction should be retrying, even if an address error 334 occurred. analog saa7146 based cards extensively rely on 335 i2c address probing, however, and address errors indicate that a 336 device is really *not* there. retrying in that case 337 increases the time the device needs to probe greatly, so 338 it should be avoided. So we bail out in irq mode after an 339 address error and trust the saa7146 address error detection. */ 340 if (-EREMOTEIO == err && 0 != (SAA7146_USE_I2C_IRQ & dev->ext->flags)) 341 goto out; 342 DEB_I2C("error while sending message(s). starting again\n"); 343 break; 344 } 345 } 346 if( 0 == err ) { 347 err = num; 348 break; 349 } 350 351 /* delay a bit before retrying */ 352 msleep(10); 353 354 } while (err != num && retries--); 355 356 /* quit if any error occurred */ 357 if (err != num) 358 goto out; 359 360 /* if any things had to be read, get the results */ 361 if ( 0 != saa7146_i2c_msg_cleanup(msgs, num, buffer)) { 362 DEB_I2C("could not cleanup i2c-message\n"); 363 err = -1; 364 goto out; 365 } 366 367 /* return the number of delivered messages */ 368 DEB_I2C("transmission successful. (msg:%d)\n", err); 369 out: 370 /* another bug in revision 0: the i2c-registers get uploaded randomly by other 371 uploads, so we better clear them out before continuing */ 372 if( 0 == dev->revision ) { 373 __le32 zero = 0; 374 saa7146_i2c_reset(dev); 375 if( 0 != saa7146_i2c_writeout(dev, &zero, short_delay)) { 376 pr_info("revision 0 error. this should never happen\n"); 377 } 378 } 379 380 mutex_unlock(&dev->i2c_lock); 381 return err; 382 } 383 384 /* utility functions */ 385 static int saa7146_i2c_xfer(struct i2c_adapter* adapter, struct i2c_msg *msg, int num) 386 { 387 struct v4l2_device *v4l2_dev = i2c_get_adapdata(adapter); 388 struct saa7146_dev *dev = to_saa7146_dev(v4l2_dev); 389 390 /* use helper function to transfer data */ 391 return saa7146_i2c_transfer(dev, msg, num, adapter->retries); 392 } 393 394 395 /*****************************************************************************/ 396 /* i2c-adapter helper functions */ 397 398 /* exported algorithm data */ 399 static const struct i2c_algorithm saa7146_algo = { 400 .master_xfer = saa7146_i2c_xfer, 401 .functionality = saa7146_i2c_func, 402 }; 403 404 int saa7146_i2c_adapter_prepare(struct saa7146_dev *dev, struct i2c_adapter *i2c_adapter, u32 bitrate) 405 { 406 DEB_EE("bitrate: 0x%08x\n", bitrate); 407 408 /* enable i2c-port pins */ 409 saa7146_write(dev, MC1, (MASK_08 | MASK_24)); 410 411 dev->i2c_bitrate = bitrate; 412 saa7146_i2c_reset(dev); 413 414 if (i2c_adapter) { 415 i2c_set_adapdata(i2c_adapter, &dev->v4l2_dev); 416 i2c_adapter->dev.parent = &dev->pci->dev; 417 i2c_adapter->algo = &saa7146_algo; 418 i2c_adapter->algo_data = NULL; 419 i2c_adapter->timeout = SAA7146_I2C_TIMEOUT; 420 i2c_adapter->retries = SAA7146_I2C_RETRIES; 421 } 422 423 return 0; 424 } 425