1 /* 2 * OMAP mailbox driver 3 * 4 * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved. 5 * Copyright (C) 2013-2014 Texas Instruments Inc. 6 * 7 * Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> 8 * Suman Anna <s-anna@ti.com> 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * version 2 as published by the Free Software Foundation. 13 * 14 * This program is distributed in the hope that it will be useful, but 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 22 * 02110-1301 USA 23 * 24 */ 25 26 #include <linux/interrupt.h> 27 #include <linux/spinlock.h> 28 #include <linux/mutex.h> 29 #include <linux/slab.h> 30 #include <linux/kfifo.h> 31 #include <linux/err.h> 32 #include <linux/notifier.h> 33 #include <linux/module.h> 34 #include <linux/platform_device.h> 35 #include <linux/pm_runtime.h> 36 #include <linux/platform_data/mailbox-omap.h> 37 #include <linux/omap-mailbox.h> 38 39 #define MAILBOX_REVISION 0x000 40 #define MAILBOX_MESSAGE(m) (0x040 + 4 * (m)) 41 #define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m)) 42 #define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m)) 43 44 #define OMAP2_MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u)) 45 #define OMAP2_MAILBOX_IRQENABLE(u) (0x104 + 8 * (u)) 46 47 #define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 0x10 * (u)) 48 #define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 0x10 * (u)) 49 #define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 0x10 * (u)) 50 51 #define MAILBOX_IRQSTATUS(type, u) (type ? OMAP4_MAILBOX_IRQSTATUS(u) : \ 52 OMAP2_MAILBOX_IRQSTATUS(u)) 53 #define MAILBOX_IRQENABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE(u) : \ 54 OMAP2_MAILBOX_IRQENABLE(u)) 55 #define MAILBOX_IRQDISABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE_CLR(u) \ 56 : OMAP2_MAILBOX_IRQENABLE(u)) 57 58 #define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m))) 59 #define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1)) 60 61 #define MBOX_REG_SIZE 0x120 62 63 #define OMAP4_MBOX_REG_SIZE 0x130 64 65 #define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32)) 66 #define OMAP4_MBOX_NR_REGS (OMAP4_MBOX_REG_SIZE / sizeof(u32)) 67 68 struct omap_mbox_fifo { 69 unsigned long msg; 70 unsigned long fifo_stat; 71 unsigned long msg_stat; 72 unsigned long irqenable; 73 unsigned long irqstatus; 74 unsigned long irqdisable; 75 u32 intr_bit; 76 }; 77 78 struct omap_mbox_queue { 79 spinlock_t lock; 80 struct kfifo fifo; 81 struct work_struct work; 82 struct tasklet_struct tasklet; 83 struct omap_mbox *mbox; 84 bool full; 85 }; 86 87 struct omap_mbox_device { 88 struct device *dev; 89 struct mutex cfg_lock; 90 void __iomem *mbox_base; 91 u32 num_users; 92 u32 num_fifos; 93 struct omap_mbox **mboxes; 94 struct list_head elem; 95 }; 96 97 struct omap_mbox { 98 const char *name; 99 int irq; 100 struct omap_mbox_queue *txq, *rxq; 101 struct device *dev; 102 struct omap_mbox_device *parent; 103 struct omap_mbox_fifo tx_fifo; 104 struct omap_mbox_fifo rx_fifo; 105 u32 ctx[OMAP4_MBOX_NR_REGS]; 106 u32 intr_type; 107 int use_count; 108 struct blocking_notifier_head notifier; 109 }; 110 111 /* global variables for the mailbox devices */ 112 static DEFINE_MUTEX(omap_mbox_devices_lock); 113 static LIST_HEAD(omap_mbox_devices); 114 115 static unsigned int mbox_kfifo_size = CONFIG_OMAP_MBOX_KFIFO_SIZE; 116 module_param(mbox_kfifo_size, uint, S_IRUGO); 117 MODULE_PARM_DESC(mbox_kfifo_size, "Size of omap's mailbox kfifo (bytes)"); 118 119 static inline 120 unsigned int mbox_read_reg(struct omap_mbox_device *mdev, size_t ofs) 121 { 122 return __raw_readl(mdev->mbox_base + ofs); 123 } 124 125 static inline 126 void mbox_write_reg(struct omap_mbox_device *mdev, u32 val, size_t ofs) 127 { 128 __raw_writel(val, mdev->mbox_base + ofs); 129 } 130 131 /* Mailbox FIFO handle functions */ 132 static mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox) 133 { 134 struct omap_mbox_fifo *fifo = &mbox->rx_fifo; 135 return (mbox_msg_t) mbox_read_reg(mbox->parent, fifo->msg); 136 } 137 138 static void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) 139 { 140 struct omap_mbox_fifo *fifo = &mbox->tx_fifo; 141 mbox_write_reg(mbox->parent, msg, fifo->msg); 142 } 143 144 static int mbox_fifo_empty(struct omap_mbox *mbox) 145 { 146 struct omap_mbox_fifo *fifo = &mbox->rx_fifo; 147 return (mbox_read_reg(mbox->parent, fifo->msg_stat) == 0); 148 } 149 150 static int mbox_fifo_full(struct omap_mbox *mbox) 151 { 152 struct omap_mbox_fifo *fifo = &mbox->tx_fifo; 153 return mbox_read_reg(mbox->parent, fifo->fifo_stat); 154 } 155 156 /* Mailbox IRQ handle functions */ 157 static void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) 158 { 159 struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ? 160 &mbox->tx_fifo : &mbox->rx_fifo; 161 u32 bit = fifo->intr_bit; 162 u32 irqstatus = fifo->irqstatus; 163 164 mbox_write_reg(mbox->parent, bit, irqstatus); 165 166 /* Flush posted write for irq status to avoid spurious interrupts */ 167 mbox_read_reg(mbox->parent, irqstatus); 168 } 169 170 static int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) 171 { 172 struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ? 173 &mbox->tx_fifo : &mbox->rx_fifo; 174 u32 bit = fifo->intr_bit; 175 u32 irqenable = fifo->irqenable; 176 u32 irqstatus = fifo->irqstatus; 177 178 u32 enable = mbox_read_reg(mbox->parent, irqenable); 179 u32 status = mbox_read_reg(mbox->parent, irqstatus); 180 181 return (int)(enable & status & bit); 182 } 183 184 /* 185 * message sender 186 */ 187 int omap_mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg) 188 { 189 struct omap_mbox_queue *mq = mbox->txq; 190 int ret = 0, len; 191 192 spin_lock_bh(&mq->lock); 193 194 if (kfifo_avail(&mq->fifo) < sizeof(msg)) { 195 ret = -ENOMEM; 196 goto out; 197 } 198 199 if (kfifo_is_empty(&mq->fifo) && !mbox_fifo_full(mbox)) { 200 mbox_fifo_write(mbox, msg); 201 goto out; 202 } 203 204 len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg)); 205 WARN_ON(len != sizeof(msg)); 206 207 tasklet_schedule(&mbox->txq->tasklet); 208 209 out: 210 spin_unlock_bh(&mq->lock); 211 return ret; 212 } 213 EXPORT_SYMBOL(omap_mbox_msg_send); 214 215 void omap_mbox_save_ctx(struct omap_mbox *mbox) 216 { 217 int i; 218 int nr_regs; 219 220 if (mbox->intr_type) 221 nr_regs = OMAP4_MBOX_NR_REGS; 222 else 223 nr_regs = MBOX_NR_REGS; 224 for (i = 0; i < nr_regs; i++) { 225 mbox->ctx[i] = mbox_read_reg(mbox->parent, i * sizeof(u32)); 226 227 dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__, 228 i, mbox->ctx[i]); 229 } 230 } 231 EXPORT_SYMBOL(omap_mbox_save_ctx); 232 233 void omap_mbox_restore_ctx(struct omap_mbox *mbox) 234 { 235 int i; 236 int nr_regs; 237 238 if (mbox->intr_type) 239 nr_regs = OMAP4_MBOX_NR_REGS; 240 else 241 nr_regs = MBOX_NR_REGS; 242 for (i = 0; i < nr_regs; i++) { 243 mbox_write_reg(mbox->parent, mbox->ctx[i], i * sizeof(u32)); 244 245 dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__, 246 i, mbox->ctx[i]); 247 } 248 } 249 EXPORT_SYMBOL(omap_mbox_restore_ctx); 250 251 void omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) 252 { 253 u32 l; 254 struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ? 255 &mbox->tx_fifo : &mbox->rx_fifo; 256 u32 bit = fifo->intr_bit; 257 u32 irqenable = fifo->irqenable; 258 259 l = mbox_read_reg(mbox->parent, irqenable); 260 l |= bit; 261 mbox_write_reg(mbox->parent, l, irqenable); 262 } 263 EXPORT_SYMBOL(omap_mbox_enable_irq); 264 265 void omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) 266 { 267 struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ? 268 &mbox->tx_fifo : &mbox->rx_fifo; 269 u32 bit = fifo->intr_bit; 270 u32 irqdisable = fifo->irqdisable; 271 272 /* 273 * Read and update the interrupt configuration register for pre-OMAP4. 274 * OMAP4 and later SoCs have a dedicated interrupt disabling register. 275 */ 276 if (!mbox->intr_type) 277 bit = mbox_read_reg(mbox->parent, irqdisable) & ~bit; 278 279 mbox_write_reg(mbox->parent, bit, irqdisable); 280 } 281 EXPORT_SYMBOL(omap_mbox_disable_irq); 282 283 static void mbox_tx_tasklet(unsigned long tx_data) 284 { 285 struct omap_mbox *mbox = (struct omap_mbox *)tx_data; 286 struct omap_mbox_queue *mq = mbox->txq; 287 mbox_msg_t msg; 288 int ret; 289 290 while (kfifo_len(&mq->fifo)) { 291 if (mbox_fifo_full(mbox)) { 292 omap_mbox_enable_irq(mbox, IRQ_TX); 293 break; 294 } 295 296 ret = kfifo_out(&mq->fifo, (unsigned char *)&msg, 297 sizeof(msg)); 298 WARN_ON(ret != sizeof(msg)); 299 300 mbox_fifo_write(mbox, msg); 301 } 302 } 303 304 /* 305 * Message receiver(workqueue) 306 */ 307 static void mbox_rx_work(struct work_struct *work) 308 { 309 struct omap_mbox_queue *mq = 310 container_of(work, struct omap_mbox_queue, work); 311 mbox_msg_t msg; 312 int len; 313 314 while (kfifo_len(&mq->fifo) >= sizeof(msg)) { 315 len = kfifo_out(&mq->fifo, (unsigned char *)&msg, sizeof(msg)); 316 WARN_ON(len != sizeof(msg)); 317 318 blocking_notifier_call_chain(&mq->mbox->notifier, len, 319 (void *)msg); 320 spin_lock_irq(&mq->lock); 321 if (mq->full) { 322 mq->full = false; 323 omap_mbox_enable_irq(mq->mbox, IRQ_RX); 324 } 325 spin_unlock_irq(&mq->lock); 326 } 327 } 328 329 /* 330 * Mailbox interrupt handler 331 */ 332 static void __mbox_tx_interrupt(struct omap_mbox *mbox) 333 { 334 omap_mbox_disable_irq(mbox, IRQ_TX); 335 ack_mbox_irq(mbox, IRQ_TX); 336 tasklet_schedule(&mbox->txq->tasklet); 337 } 338 339 static void __mbox_rx_interrupt(struct omap_mbox *mbox) 340 { 341 struct omap_mbox_queue *mq = mbox->rxq; 342 mbox_msg_t msg; 343 int len; 344 345 while (!mbox_fifo_empty(mbox)) { 346 if (unlikely(kfifo_avail(&mq->fifo) < sizeof(msg))) { 347 omap_mbox_disable_irq(mbox, IRQ_RX); 348 mq->full = true; 349 goto nomem; 350 } 351 352 msg = mbox_fifo_read(mbox); 353 354 len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg)); 355 WARN_ON(len != sizeof(msg)); 356 } 357 358 /* no more messages in the fifo. clear IRQ source. */ 359 ack_mbox_irq(mbox, IRQ_RX); 360 nomem: 361 schedule_work(&mbox->rxq->work); 362 } 363 364 static irqreturn_t mbox_interrupt(int irq, void *p) 365 { 366 struct omap_mbox *mbox = p; 367 368 if (is_mbox_irq(mbox, IRQ_TX)) 369 __mbox_tx_interrupt(mbox); 370 371 if (is_mbox_irq(mbox, IRQ_RX)) 372 __mbox_rx_interrupt(mbox); 373 374 return IRQ_HANDLED; 375 } 376 377 static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox, 378 void (*work) (struct work_struct *), 379 void (*tasklet)(unsigned long)) 380 { 381 struct omap_mbox_queue *mq; 382 383 mq = kzalloc(sizeof(struct omap_mbox_queue), GFP_KERNEL); 384 if (!mq) 385 return NULL; 386 387 spin_lock_init(&mq->lock); 388 389 if (kfifo_alloc(&mq->fifo, mbox_kfifo_size, GFP_KERNEL)) 390 goto error; 391 392 if (work) 393 INIT_WORK(&mq->work, work); 394 395 if (tasklet) 396 tasklet_init(&mq->tasklet, tasklet, (unsigned long)mbox); 397 return mq; 398 error: 399 kfree(mq); 400 return NULL; 401 } 402 403 static void mbox_queue_free(struct omap_mbox_queue *q) 404 { 405 kfifo_free(&q->fifo); 406 kfree(q); 407 } 408 409 static int omap_mbox_startup(struct omap_mbox *mbox) 410 { 411 int ret = 0; 412 struct omap_mbox_queue *mq; 413 struct omap_mbox_device *mdev = mbox->parent; 414 415 mutex_lock(&mdev->cfg_lock); 416 ret = pm_runtime_get_sync(mdev->dev); 417 if (unlikely(ret < 0)) 418 goto fail_startup; 419 420 if (!mbox->use_count++) { 421 mq = mbox_queue_alloc(mbox, NULL, mbox_tx_tasklet); 422 if (!mq) { 423 ret = -ENOMEM; 424 goto fail_alloc_txq; 425 } 426 mbox->txq = mq; 427 428 mq = mbox_queue_alloc(mbox, mbox_rx_work, NULL); 429 if (!mq) { 430 ret = -ENOMEM; 431 goto fail_alloc_rxq; 432 } 433 mbox->rxq = mq; 434 mq->mbox = mbox; 435 ret = request_irq(mbox->irq, mbox_interrupt, IRQF_SHARED, 436 mbox->name, mbox); 437 if (unlikely(ret)) { 438 pr_err("failed to register mailbox interrupt:%d\n", 439 ret); 440 goto fail_request_irq; 441 } 442 443 omap_mbox_enable_irq(mbox, IRQ_RX); 444 } 445 mutex_unlock(&mdev->cfg_lock); 446 return 0; 447 448 fail_request_irq: 449 mbox_queue_free(mbox->rxq); 450 fail_alloc_rxq: 451 mbox_queue_free(mbox->txq); 452 fail_alloc_txq: 453 pm_runtime_put_sync(mdev->dev); 454 mbox->use_count--; 455 fail_startup: 456 mutex_unlock(&mdev->cfg_lock); 457 return ret; 458 } 459 460 static void omap_mbox_fini(struct omap_mbox *mbox) 461 { 462 struct omap_mbox_device *mdev = mbox->parent; 463 464 mutex_lock(&mdev->cfg_lock); 465 466 if (!--mbox->use_count) { 467 omap_mbox_disable_irq(mbox, IRQ_RX); 468 free_irq(mbox->irq, mbox); 469 tasklet_kill(&mbox->txq->tasklet); 470 flush_work(&mbox->rxq->work); 471 mbox_queue_free(mbox->txq); 472 mbox_queue_free(mbox->rxq); 473 } 474 475 pm_runtime_put_sync(mdev->dev); 476 477 mutex_unlock(&mdev->cfg_lock); 478 } 479 480 static struct omap_mbox *omap_mbox_device_find(struct omap_mbox_device *mdev, 481 const char *mbox_name) 482 { 483 struct omap_mbox *_mbox, *mbox = NULL; 484 struct omap_mbox **mboxes = mdev->mboxes; 485 int i; 486 487 if (!mboxes) 488 return NULL; 489 490 for (i = 0; (_mbox = mboxes[i]); i++) { 491 if (!strcmp(_mbox->name, mbox_name)) { 492 mbox = _mbox; 493 break; 494 } 495 } 496 return mbox; 497 } 498 499 struct omap_mbox *omap_mbox_get(const char *name, struct notifier_block *nb) 500 { 501 struct omap_mbox *mbox = NULL; 502 struct omap_mbox_device *mdev; 503 int ret; 504 505 mutex_lock(&omap_mbox_devices_lock); 506 list_for_each_entry(mdev, &omap_mbox_devices, elem) { 507 mbox = omap_mbox_device_find(mdev, name); 508 if (mbox) 509 break; 510 } 511 mutex_unlock(&omap_mbox_devices_lock); 512 513 if (!mbox) 514 return ERR_PTR(-ENOENT); 515 516 if (nb) 517 blocking_notifier_chain_register(&mbox->notifier, nb); 518 519 ret = omap_mbox_startup(mbox); 520 if (ret) { 521 blocking_notifier_chain_unregister(&mbox->notifier, nb); 522 return ERR_PTR(-ENODEV); 523 } 524 525 return mbox; 526 } 527 EXPORT_SYMBOL(omap_mbox_get); 528 529 void omap_mbox_put(struct omap_mbox *mbox, struct notifier_block *nb) 530 { 531 blocking_notifier_chain_unregister(&mbox->notifier, nb); 532 omap_mbox_fini(mbox); 533 } 534 EXPORT_SYMBOL(omap_mbox_put); 535 536 static struct class omap_mbox_class = { .name = "mbox", }; 537 538 static int omap_mbox_register(struct omap_mbox_device *mdev) 539 { 540 int ret; 541 int i; 542 struct omap_mbox **mboxes; 543 544 if (!mdev || !mdev->mboxes) 545 return -EINVAL; 546 547 mboxes = mdev->mboxes; 548 for (i = 0; mboxes[i]; i++) { 549 struct omap_mbox *mbox = mboxes[i]; 550 mbox->dev = device_create(&omap_mbox_class, 551 mdev->dev, 0, mbox, "%s", mbox->name); 552 if (IS_ERR(mbox->dev)) { 553 ret = PTR_ERR(mbox->dev); 554 goto err_out; 555 } 556 557 BLOCKING_INIT_NOTIFIER_HEAD(&mbox->notifier); 558 } 559 560 mutex_lock(&omap_mbox_devices_lock); 561 list_add(&mdev->elem, &omap_mbox_devices); 562 mutex_unlock(&omap_mbox_devices_lock); 563 564 return 0; 565 566 err_out: 567 while (i--) 568 device_unregister(mboxes[i]->dev); 569 return ret; 570 } 571 572 static int omap_mbox_unregister(struct omap_mbox_device *mdev) 573 { 574 int i; 575 struct omap_mbox **mboxes; 576 577 if (!mdev || !mdev->mboxes) 578 return -EINVAL; 579 580 mutex_lock(&omap_mbox_devices_lock); 581 list_del(&mdev->elem); 582 mutex_unlock(&omap_mbox_devices_lock); 583 584 mboxes = mdev->mboxes; 585 for (i = 0; mboxes[i]; i++) 586 device_unregister(mboxes[i]->dev); 587 return 0; 588 } 589 590 static int omap_mbox_probe(struct platform_device *pdev) 591 { 592 struct resource *mem; 593 int ret; 594 struct omap_mbox **list, *mbox, *mboxblk; 595 struct omap_mbox_pdata *pdata = pdev->dev.platform_data; 596 struct omap_mbox_dev_info *info; 597 struct omap_mbox_device *mdev; 598 struct omap_mbox_fifo *fifo; 599 u32 intr_type; 600 u32 l; 601 int i; 602 603 if (!pdata || !pdata->info_cnt || !pdata->info) { 604 pr_err("%s: platform not supported\n", __func__); 605 return -ENODEV; 606 } 607 608 mdev = devm_kzalloc(&pdev->dev, sizeof(*mdev), GFP_KERNEL); 609 if (!mdev) 610 return -ENOMEM; 611 612 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 613 mdev->mbox_base = devm_ioremap_resource(&pdev->dev, mem); 614 if (IS_ERR(mdev->mbox_base)) 615 return PTR_ERR(mdev->mbox_base); 616 617 /* allocate one extra for marking end of list */ 618 list = devm_kzalloc(&pdev->dev, (pdata->info_cnt + 1) * sizeof(*list), 619 GFP_KERNEL); 620 if (!list) 621 return -ENOMEM; 622 623 mboxblk = devm_kzalloc(&pdev->dev, pdata->info_cnt * sizeof(*mbox), 624 GFP_KERNEL); 625 if (!mboxblk) 626 return -ENOMEM; 627 628 info = pdata->info; 629 intr_type = pdata->intr_type; 630 mbox = mboxblk; 631 for (i = 0; i < pdata->info_cnt; i++, info++) { 632 fifo = &mbox->tx_fifo; 633 fifo->msg = MAILBOX_MESSAGE(info->tx_id); 634 fifo->fifo_stat = MAILBOX_FIFOSTATUS(info->tx_id); 635 fifo->intr_bit = MAILBOX_IRQ_NOTFULL(info->tx_id); 636 fifo->irqenable = MAILBOX_IRQENABLE(intr_type, info->usr_id); 637 fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, info->usr_id); 638 fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, info->usr_id); 639 640 fifo = &mbox->rx_fifo; 641 fifo->msg = MAILBOX_MESSAGE(info->rx_id); 642 fifo->msg_stat = MAILBOX_MSGSTATUS(info->rx_id); 643 fifo->intr_bit = MAILBOX_IRQ_NEWMSG(info->rx_id); 644 fifo->irqenable = MAILBOX_IRQENABLE(intr_type, info->usr_id); 645 fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, info->usr_id); 646 fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, info->usr_id); 647 648 mbox->intr_type = intr_type; 649 650 mbox->parent = mdev; 651 mbox->name = info->name; 652 mbox->irq = platform_get_irq(pdev, info->irq_id); 653 if (mbox->irq < 0) 654 return mbox->irq; 655 list[i] = mbox++; 656 } 657 658 mutex_init(&mdev->cfg_lock); 659 mdev->dev = &pdev->dev; 660 mdev->num_users = pdata->num_users; 661 mdev->num_fifos = pdata->num_fifos; 662 mdev->mboxes = list; 663 ret = omap_mbox_register(mdev); 664 if (ret) 665 return ret; 666 667 platform_set_drvdata(pdev, mdev); 668 pm_runtime_enable(mdev->dev); 669 670 ret = pm_runtime_get_sync(mdev->dev); 671 if (ret < 0) { 672 pm_runtime_put_noidle(mdev->dev); 673 goto unregister; 674 } 675 676 /* 677 * just print the raw revision register, the format is not 678 * uniform across all SoCs 679 */ 680 l = mbox_read_reg(mdev, MAILBOX_REVISION); 681 dev_info(mdev->dev, "omap mailbox rev 0x%x\n", l); 682 683 ret = pm_runtime_put_sync(mdev->dev); 684 if (ret < 0) 685 goto unregister; 686 687 return 0; 688 689 unregister: 690 pm_runtime_disable(mdev->dev); 691 omap_mbox_unregister(mdev); 692 return ret; 693 } 694 695 static int omap_mbox_remove(struct platform_device *pdev) 696 { 697 struct omap_mbox_device *mdev = platform_get_drvdata(pdev); 698 699 pm_runtime_disable(mdev->dev); 700 omap_mbox_unregister(mdev); 701 702 return 0; 703 } 704 705 static struct platform_driver omap_mbox_driver = { 706 .probe = omap_mbox_probe, 707 .remove = omap_mbox_remove, 708 .driver = { 709 .name = "omap-mailbox", 710 .owner = THIS_MODULE, 711 }, 712 }; 713 714 static int __init omap_mbox_init(void) 715 { 716 int err; 717 718 err = class_register(&omap_mbox_class); 719 if (err) 720 return err; 721 722 /* kfifo size sanity check: alignment and minimal size */ 723 mbox_kfifo_size = ALIGN(mbox_kfifo_size, sizeof(mbox_msg_t)); 724 mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size, 725 sizeof(mbox_msg_t)); 726 727 return platform_driver_register(&omap_mbox_driver); 728 } 729 subsys_initcall(omap_mbox_init); 730 731 static void __exit omap_mbox_exit(void) 732 { 733 platform_driver_unregister(&omap_mbox_driver); 734 class_unregister(&omap_mbox_class); 735 } 736 module_exit(omap_mbox_exit); 737 738 MODULE_LICENSE("GPL v2"); 739 MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging"); 740 MODULE_AUTHOR("Toshihiro Kobayashi"); 741 MODULE_AUTHOR("Hiroshi DOYU"); 742