1 /*
2  * OMAP mailbox driver
3  *
4  * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved.
5  * Copyright (C) 2013-2014 Texas Instruments Inc.
6  *
7  * Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
8  *          Suman Anna <s-anna@ti.com>
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License
12  * version 2 as published by the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but
15  * WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17  * General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22  * 02110-1301 USA
23  *
24  */
25 
26 #include <linux/interrupt.h>
27 #include <linux/spinlock.h>
28 #include <linux/mutex.h>
29 #include <linux/slab.h>
30 #include <linux/kfifo.h>
31 #include <linux/err.h>
32 #include <linux/module.h>
33 #include <linux/of_device.h>
34 #include <linux/platform_device.h>
35 #include <linux/pm_runtime.h>
36 #include <linux/platform_data/mailbox-omap.h>
37 #include <linux/omap-mailbox.h>
38 #include <linux/mailbox_controller.h>
39 #include <linux/mailbox_client.h>
40 
41 #define MAILBOX_REVISION		0x000
42 #define MAILBOX_MESSAGE(m)		(0x040 + 4 * (m))
43 #define MAILBOX_FIFOSTATUS(m)		(0x080 + 4 * (m))
44 #define MAILBOX_MSGSTATUS(m)		(0x0c0 + 4 * (m))
45 
46 #define OMAP2_MAILBOX_IRQSTATUS(u)	(0x100 + 8 * (u))
47 #define OMAP2_MAILBOX_IRQENABLE(u)	(0x104 + 8 * (u))
48 
49 #define OMAP4_MAILBOX_IRQSTATUS(u)	(0x104 + 0x10 * (u))
50 #define OMAP4_MAILBOX_IRQENABLE(u)	(0x108 + 0x10 * (u))
51 #define OMAP4_MAILBOX_IRQENABLE_CLR(u)	(0x10c + 0x10 * (u))
52 
53 #define MAILBOX_IRQSTATUS(type, u)	(type ? OMAP4_MAILBOX_IRQSTATUS(u) : \
54 						OMAP2_MAILBOX_IRQSTATUS(u))
55 #define MAILBOX_IRQENABLE(type, u)	(type ? OMAP4_MAILBOX_IRQENABLE(u) : \
56 						OMAP2_MAILBOX_IRQENABLE(u))
57 #define MAILBOX_IRQDISABLE(type, u)	(type ? OMAP4_MAILBOX_IRQENABLE_CLR(u) \
58 						: OMAP2_MAILBOX_IRQENABLE(u))
59 
60 #define MAILBOX_IRQ_NEWMSG(m)		(1 << (2 * (m)))
61 #define MAILBOX_IRQ_NOTFULL(m)		(1 << (2 * (m) + 1))
62 
63 #define MBOX_REG_SIZE			0x120
64 
65 #define OMAP4_MBOX_REG_SIZE		0x130
66 
67 #define MBOX_NR_REGS			(MBOX_REG_SIZE / sizeof(u32))
68 #define OMAP4_MBOX_NR_REGS		(OMAP4_MBOX_REG_SIZE / sizeof(u32))
69 
70 struct omap_mbox_fifo {
71 	unsigned long msg;
72 	unsigned long fifo_stat;
73 	unsigned long msg_stat;
74 	unsigned long irqenable;
75 	unsigned long irqstatus;
76 	unsigned long irqdisable;
77 	u32 intr_bit;
78 };
79 
80 struct omap_mbox_queue {
81 	spinlock_t		lock;
82 	struct kfifo		fifo;
83 	struct work_struct	work;
84 	struct omap_mbox	*mbox;
85 	bool full;
86 };
87 
88 struct omap_mbox_device {
89 	struct device *dev;
90 	struct mutex cfg_lock;
91 	void __iomem *mbox_base;
92 	u32 num_users;
93 	u32 num_fifos;
94 	struct omap_mbox **mboxes;
95 	struct mbox_controller controller;
96 	struct list_head elem;
97 };
98 
99 struct omap_mbox_fifo_info {
100 	int tx_id;
101 	int tx_usr;
102 	int tx_irq;
103 
104 	int rx_id;
105 	int rx_usr;
106 	int rx_irq;
107 
108 	const char *name;
109 };
110 
111 struct omap_mbox {
112 	const char		*name;
113 	int			irq;
114 	struct omap_mbox_queue	*rxq;
115 	struct device		*dev;
116 	struct omap_mbox_device *parent;
117 	struct omap_mbox_fifo	tx_fifo;
118 	struct omap_mbox_fifo	rx_fifo;
119 	u32			ctx[OMAP4_MBOX_NR_REGS];
120 	u32			intr_type;
121 	struct mbox_chan	*chan;
122 };
123 
124 /* global variables for the mailbox devices */
125 static DEFINE_MUTEX(omap_mbox_devices_lock);
126 static LIST_HEAD(omap_mbox_devices);
127 
128 static unsigned int mbox_kfifo_size = CONFIG_OMAP_MBOX_KFIFO_SIZE;
129 module_param(mbox_kfifo_size, uint, S_IRUGO);
130 MODULE_PARM_DESC(mbox_kfifo_size, "Size of omap's mailbox kfifo (bytes)");
131 
132 static struct omap_mbox *mbox_chan_to_omap_mbox(struct mbox_chan *chan)
133 {
134 	if (!chan || !chan->con_priv)
135 		return NULL;
136 
137 	return (struct omap_mbox *)chan->con_priv;
138 }
139 
140 static inline
141 unsigned int mbox_read_reg(struct omap_mbox_device *mdev, size_t ofs)
142 {
143 	return __raw_readl(mdev->mbox_base + ofs);
144 }
145 
146 static inline
147 void mbox_write_reg(struct omap_mbox_device *mdev, u32 val, size_t ofs)
148 {
149 	__raw_writel(val, mdev->mbox_base + ofs);
150 }
151 
152 /* Mailbox FIFO handle functions */
153 static mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
154 {
155 	struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
156 	return (mbox_msg_t) mbox_read_reg(mbox->parent, fifo->msg);
157 }
158 
159 static void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
160 {
161 	struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
162 	mbox_write_reg(mbox->parent, msg, fifo->msg);
163 }
164 
165 static int mbox_fifo_empty(struct omap_mbox *mbox)
166 {
167 	struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
168 	return (mbox_read_reg(mbox->parent, fifo->msg_stat) == 0);
169 }
170 
171 static int mbox_fifo_full(struct omap_mbox *mbox)
172 {
173 	struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
174 	return mbox_read_reg(mbox->parent, fifo->fifo_stat);
175 }
176 
177 /* Mailbox IRQ handle functions */
178 static void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
179 {
180 	struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
181 				&mbox->tx_fifo : &mbox->rx_fifo;
182 	u32 bit = fifo->intr_bit;
183 	u32 irqstatus = fifo->irqstatus;
184 
185 	mbox_write_reg(mbox->parent, bit, irqstatus);
186 
187 	/* Flush posted write for irq status to avoid spurious interrupts */
188 	mbox_read_reg(mbox->parent, irqstatus);
189 }
190 
191 static int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
192 {
193 	struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
194 				&mbox->tx_fifo : &mbox->rx_fifo;
195 	u32 bit = fifo->intr_bit;
196 	u32 irqenable = fifo->irqenable;
197 	u32 irqstatus = fifo->irqstatus;
198 
199 	u32 enable = mbox_read_reg(mbox->parent, irqenable);
200 	u32 status = mbox_read_reg(mbox->parent, irqstatus);
201 
202 	return (int)(enable & status & bit);
203 }
204 
205 void omap_mbox_save_ctx(struct mbox_chan *chan)
206 {
207 	int i;
208 	int nr_regs;
209 	struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
210 
211 	if (WARN_ON(!mbox))
212 		return;
213 
214 	if (mbox->intr_type)
215 		nr_regs = OMAP4_MBOX_NR_REGS;
216 	else
217 		nr_regs = MBOX_NR_REGS;
218 	for (i = 0; i < nr_regs; i++) {
219 		mbox->ctx[i] = mbox_read_reg(mbox->parent, i * sizeof(u32));
220 
221 		dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
222 			i, mbox->ctx[i]);
223 	}
224 }
225 EXPORT_SYMBOL(omap_mbox_save_ctx);
226 
227 void omap_mbox_restore_ctx(struct mbox_chan *chan)
228 {
229 	int i;
230 	int nr_regs;
231 	struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
232 
233 	if (WARN_ON(!mbox))
234 		return;
235 
236 	if (mbox->intr_type)
237 		nr_regs = OMAP4_MBOX_NR_REGS;
238 	else
239 		nr_regs = MBOX_NR_REGS;
240 	for (i = 0; i < nr_regs; i++) {
241 		mbox_write_reg(mbox->parent, mbox->ctx[i], i * sizeof(u32));
242 		dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
243 			i, mbox->ctx[i]);
244 	}
245 }
246 EXPORT_SYMBOL(omap_mbox_restore_ctx);
247 
248 static void _omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
249 {
250 	u32 l;
251 	struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
252 				&mbox->tx_fifo : &mbox->rx_fifo;
253 	u32 bit = fifo->intr_bit;
254 	u32 irqenable = fifo->irqenable;
255 
256 	l = mbox_read_reg(mbox->parent, irqenable);
257 	l |= bit;
258 	mbox_write_reg(mbox->parent, l, irqenable);
259 }
260 
261 static void _omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
262 {
263 	struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
264 				&mbox->tx_fifo : &mbox->rx_fifo;
265 	u32 bit = fifo->intr_bit;
266 	u32 irqdisable = fifo->irqdisable;
267 
268 	/*
269 	 * Read and update the interrupt configuration register for pre-OMAP4.
270 	 * OMAP4 and later SoCs have a dedicated interrupt disabling register.
271 	 */
272 	if (!mbox->intr_type)
273 		bit = mbox_read_reg(mbox->parent, irqdisable) & ~bit;
274 
275 	mbox_write_reg(mbox->parent, bit, irqdisable);
276 }
277 
278 void omap_mbox_enable_irq(struct mbox_chan *chan, omap_mbox_irq_t irq)
279 {
280 	struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
281 
282 	if (WARN_ON(!mbox))
283 		return;
284 
285 	_omap_mbox_enable_irq(mbox, irq);
286 }
287 EXPORT_SYMBOL(omap_mbox_enable_irq);
288 
289 void omap_mbox_disable_irq(struct mbox_chan *chan, omap_mbox_irq_t irq)
290 {
291 	struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
292 
293 	if (WARN_ON(!mbox))
294 		return;
295 
296 	_omap_mbox_disable_irq(mbox, irq);
297 }
298 EXPORT_SYMBOL(omap_mbox_disable_irq);
299 
300 /*
301  * Message receiver(workqueue)
302  */
303 static void mbox_rx_work(struct work_struct *work)
304 {
305 	struct omap_mbox_queue *mq =
306 			container_of(work, struct omap_mbox_queue, work);
307 	mbox_msg_t msg;
308 	int len;
309 
310 	while (kfifo_len(&mq->fifo) >= sizeof(msg)) {
311 		len = kfifo_out(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
312 		WARN_ON(len != sizeof(msg));
313 
314 		mbox_chan_received_data(mq->mbox->chan, (void *)msg);
315 		spin_lock_irq(&mq->lock);
316 		if (mq->full) {
317 			mq->full = false;
318 			_omap_mbox_enable_irq(mq->mbox, IRQ_RX);
319 		}
320 		spin_unlock_irq(&mq->lock);
321 	}
322 }
323 
324 /*
325  * Mailbox interrupt handler
326  */
327 static void __mbox_tx_interrupt(struct omap_mbox *mbox)
328 {
329 	_omap_mbox_disable_irq(mbox, IRQ_TX);
330 	ack_mbox_irq(mbox, IRQ_TX);
331 	mbox_chan_txdone(mbox->chan, 0);
332 }
333 
334 static void __mbox_rx_interrupt(struct omap_mbox *mbox)
335 {
336 	struct omap_mbox_queue *mq = mbox->rxq;
337 	mbox_msg_t msg;
338 	int len;
339 
340 	while (!mbox_fifo_empty(mbox)) {
341 		if (unlikely(kfifo_avail(&mq->fifo) < sizeof(msg))) {
342 			_omap_mbox_disable_irq(mbox, IRQ_RX);
343 			mq->full = true;
344 			goto nomem;
345 		}
346 
347 		msg = mbox_fifo_read(mbox);
348 
349 		len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
350 		WARN_ON(len != sizeof(msg));
351 	}
352 
353 	/* no more messages in the fifo. clear IRQ source. */
354 	ack_mbox_irq(mbox, IRQ_RX);
355 nomem:
356 	schedule_work(&mbox->rxq->work);
357 }
358 
359 static irqreturn_t mbox_interrupt(int irq, void *p)
360 {
361 	struct omap_mbox *mbox = p;
362 
363 	if (is_mbox_irq(mbox, IRQ_TX))
364 		__mbox_tx_interrupt(mbox);
365 
366 	if (is_mbox_irq(mbox, IRQ_RX))
367 		__mbox_rx_interrupt(mbox);
368 
369 	return IRQ_HANDLED;
370 }
371 
372 static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox,
373 					void (*work)(struct work_struct *))
374 {
375 	struct omap_mbox_queue *mq;
376 
377 	if (!work)
378 		return NULL;
379 
380 	mq = kzalloc(sizeof(struct omap_mbox_queue), GFP_KERNEL);
381 	if (!mq)
382 		return NULL;
383 
384 	spin_lock_init(&mq->lock);
385 
386 	if (kfifo_alloc(&mq->fifo, mbox_kfifo_size, GFP_KERNEL))
387 		goto error;
388 
389 	INIT_WORK(&mq->work, work);
390 	return mq;
391 
392 error:
393 	kfree(mq);
394 	return NULL;
395 }
396 
397 static void mbox_queue_free(struct omap_mbox_queue *q)
398 {
399 	kfifo_free(&q->fifo);
400 	kfree(q);
401 }
402 
403 static int omap_mbox_startup(struct omap_mbox *mbox)
404 {
405 	int ret = 0;
406 	struct omap_mbox_queue *mq;
407 
408 	mq = mbox_queue_alloc(mbox, mbox_rx_work);
409 	if (!mq)
410 		return -ENOMEM;
411 	mbox->rxq = mq;
412 	mq->mbox = mbox;
413 
414 	ret = request_irq(mbox->irq, mbox_interrupt, IRQF_SHARED,
415 			  mbox->name, mbox);
416 	if (unlikely(ret)) {
417 		pr_err("failed to register mailbox interrupt:%d\n", ret);
418 		goto fail_request_irq;
419 	}
420 
421 	_omap_mbox_enable_irq(mbox, IRQ_RX);
422 
423 	return 0;
424 
425 fail_request_irq:
426 	mbox_queue_free(mbox->rxq);
427 	return ret;
428 }
429 
430 static void omap_mbox_fini(struct omap_mbox *mbox)
431 {
432 	_omap_mbox_disable_irq(mbox, IRQ_RX);
433 	free_irq(mbox->irq, mbox);
434 	flush_work(&mbox->rxq->work);
435 	mbox_queue_free(mbox->rxq);
436 }
437 
438 static struct omap_mbox *omap_mbox_device_find(struct omap_mbox_device *mdev,
439 					       const char *mbox_name)
440 {
441 	struct omap_mbox *_mbox, *mbox = NULL;
442 	struct omap_mbox **mboxes = mdev->mboxes;
443 	int i;
444 
445 	if (!mboxes)
446 		return NULL;
447 
448 	for (i = 0; (_mbox = mboxes[i]); i++) {
449 		if (!strcmp(_mbox->name, mbox_name)) {
450 			mbox = _mbox;
451 			break;
452 		}
453 	}
454 	return mbox;
455 }
456 
457 struct mbox_chan *omap_mbox_request_channel(struct mbox_client *cl,
458 					    const char *chan_name)
459 {
460 	struct device *dev = cl->dev;
461 	struct omap_mbox *mbox = NULL;
462 	struct omap_mbox_device *mdev;
463 	struct mbox_chan *chan;
464 	unsigned long flags;
465 	int ret;
466 
467 	if (!dev)
468 		return ERR_PTR(-ENODEV);
469 
470 	if (dev->of_node) {
471 		pr_err("%s: please use mbox_request_channel(), this API is supported only for OMAP non-DT usage\n",
472 		       __func__);
473 		return ERR_PTR(-ENODEV);
474 	}
475 
476 	mutex_lock(&omap_mbox_devices_lock);
477 	list_for_each_entry(mdev, &omap_mbox_devices, elem) {
478 		mbox = omap_mbox_device_find(mdev, chan_name);
479 		if (mbox)
480 			break;
481 	}
482 	mutex_unlock(&omap_mbox_devices_lock);
483 
484 	if (!mbox || !mbox->chan)
485 		return ERR_PTR(-ENOENT);
486 
487 	chan = mbox->chan;
488 	spin_lock_irqsave(&chan->lock, flags);
489 	chan->msg_free = 0;
490 	chan->msg_count = 0;
491 	chan->active_req = NULL;
492 	chan->cl = cl;
493 	init_completion(&chan->tx_complete);
494 	spin_unlock_irqrestore(&chan->lock, flags);
495 
496 	ret = chan->mbox->ops->startup(chan);
497 	if (ret) {
498 		pr_err("Unable to startup the chan (%d)\n", ret);
499 		mbox_free_channel(chan);
500 		chan = ERR_PTR(ret);
501 	}
502 
503 	return chan;
504 }
505 EXPORT_SYMBOL(omap_mbox_request_channel);
506 
507 static struct class omap_mbox_class = { .name = "mbox", };
508 
509 static int omap_mbox_register(struct omap_mbox_device *mdev)
510 {
511 	int ret;
512 	int i;
513 	struct omap_mbox **mboxes;
514 
515 	if (!mdev || !mdev->mboxes)
516 		return -EINVAL;
517 
518 	mboxes = mdev->mboxes;
519 	for (i = 0; mboxes[i]; i++) {
520 		struct omap_mbox *mbox = mboxes[i];
521 		mbox->dev = device_create(&omap_mbox_class, mdev->dev,
522 					0, mbox, "%s", mbox->name);
523 		if (IS_ERR(mbox->dev)) {
524 			ret = PTR_ERR(mbox->dev);
525 			goto err_out;
526 		}
527 	}
528 
529 	mutex_lock(&omap_mbox_devices_lock);
530 	list_add(&mdev->elem, &omap_mbox_devices);
531 	mutex_unlock(&omap_mbox_devices_lock);
532 
533 	ret = mbox_controller_register(&mdev->controller);
534 
535 err_out:
536 	if (ret) {
537 		while (i--)
538 			device_unregister(mboxes[i]->dev);
539 	}
540 	return ret;
541 }
542 
543 static int omap_mbox_unregister(struct omap_mbox_device *mdev)
544 {
545 	int i;
546 	struct omap_mbox **mboxes;
547 
548 	if (!mdev || !mdev->mboxes)
549 		return -EINVAL;
550 
551 	mutex_lock(&omap_mbox_devices_lock);
552 	list_del(&mdev->elem);
553 	mutex_unlock(&omap_mbox_devices_lock);
554 
555 	mbox_controller_unregister(&mdev->controller);
556 
557 	mboxes = mdev->mboxes;
558 	for (i = 0; mboxes[i]; i++)
559 		device_unregister(mboxes[i]->dev);
560 	return 0;
561 }
562 
563 static int omap_mbox_chan_startup(struct mbox_chan *chan)
564 {
565 	struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
566 	struct omap_mbox_device *mdev = mbox->parent;
567 	int ret = 0;
568 
569 	mutex_lock(&mdev->cfg_lock);
570 	pm_runtime_get_sync(mdev->dev);
571 	ret = omap_mbox_startup(mbox);
572 	if (ret)
573 		pm_runtime_put_sync(mdev->dev);
574 	mutex_unlock(&mdev->cfg_lock);
575 	return ret;
576 }
577 
578 static void omap_mbox_chan_shutdown(struct mbox_chan *chan)
579 {
580 	struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
581 	struct omap_mbox_device *mdev = mbox->parent;
582 
583 	mutex_lock(&mdev->cfg_lock);
584 	omap_mbox_fini(mbox);
585 	pm_runtime_put_sync(mdev->dev);
586 	mutex_unlock(&mdev->cfg_lock);
587 }
588 
589 static int omap_mbox_chan_send_data(struct mbox_chan *chan, void *data)
590 {
591 	struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
592 	int ret = -EBUSY;
593 
594 	if (!mbox)
595 		return -EINVAL;
596 
597 	if (!mbox_fifo_full(mbox)) {
598 		mbox_fifo_write(mbox, (mbox_msg_t)data);
599 		ret = 0;
600 	}
601 
602 	/* always enable the interrupt */
603 	_omap_mbox_enable_irq(mbox, IRQ_TX);
604 	return ret;
605 }
606 
607 static struct mbox_chan_ops omap_mbox_chan_ops = {
608 	.startup        = omap_mbox_chan_startup,
609 	.send_data      = omap_mbox_chan_send_data,
610 	.shutdown       = omap_mbox_chan_shutdown,
611 };
612 
613 static const struct of_device_id omap_mailbox_of_match[] = {
614 	{
615 		.compatible	= "ti,omap2-mailbox",
616 		.data		= (void *)MBOX_INTR_CFG_TYPE1,
617 	},
618 	{
619 		.compatible	= "ti,omap3-mailbox",
620 		.data		= (void *)MBOX_INTR_CFG_TYPE1,
621 	},
622 	{
623 		.compatible	= "ti,omap4-mailbox",
624 		.data		= (void *)MBOX_INTR_CFG_TYPE2,
625 	},
626 	{
627 		/* end */
628 	},
629 };
630 MODULE_DEVICE_TABLE(of, omap_mailbox_of_match);
631 
632 static struct mbox_chan *omap_mbox_of_xlate(struct mbox_controller *controller,
633 					    const struct of_phandle_args *sp)
634 {
635 	phandle phandle = sp->args[0];
636 	struct device_node *node;
637 	struct omap_mbox_device *mdev;
638 	struct omap_mbox *mbox;
639 
640 	mdev = container_of(controller, struct omap_mbox_device, controller);
641 	if (WARN_ON(!mdev))
642 		return NULL;
643 
644 	node = of_find_node_by_phandle(phandle);
645 	if (!node) {
646 		pr_err("%s: could not find node phandle 0x%x\n",
647 		       __func__, phandle);
648 		return NULL;
649 	}
650 
651 	mbox = omap_mbox_device_find(mdev, node->name);
652 	of_node_put(node);
653 	return mbox ? mbox->chan : NULL;
654 }
655 
656 static int omap_mbox_probe(struct platform_device *pdev)
657 {
658 	struct resource *mem;
659 	int ret;
660 	struct mbox_chan *chnls;
661 	struct omap_mbox **list, *mbox, *mboxblk;
662 	struct omap_mbox_pdata *pdata = pdev->dev.platform_data;
663 	struct omap_mbox_dev_info *info = NULL;
664 	struct omap_mbox_fifo_info *finfo, *finfoblk;
665 	struct omap_mbox_device *mdev;
666 	struct omap_mbox_fifo *fifo;
667 	struct device_node *node = pdev->dev.of_node;
668 	struct device_node *child;
669 	const struct of_device_id *match;
670 	u32 intr_type, info_count;
671 	u32 num_users, num_fifos;
672 	u32 tmp[3];
673 	u32 l;
674 	int i;
675 
676 	if (!node && (!pdata || !pdata->info_cnt || !pdata->info)) {
677 		pr_err("%s: platform not supported\n", __func__);
678 		return -ENODEV;
679 	}
680 
681 	if (node) {
682 		match = of_match_device(omap_mailbox_of_match, &pdev->dev);
683 		if (!match)
684 			return -ENODEV;
685 		intr_type = (u32)match->data;
686 
687 		if (of_property_read_u32(node, "ti,mbox-num-users",
688 					 &num_users))
689 			return -ENODEV;
690 
691 		if (of_property_read_u32(node, "ti,mbox-num-fifos",
692 					 &num_fifos))
693 			return -ENODEV;
694 
695 		info_count = of_get_available_child_count(node);
696 		if (!info_count) {
697 			dev_err(&pdev->dev, "no available mbox devices found\n");
698 			return -ENODEV;
699 		}
700 	} else { /* non-DT device creation */
701 		info_count = pdata->info_cnt;
702 		info = pdata->info;
703 		intr_type = pdata->intr_type;
704 		num_users = pdata->num_users;
705 		num_fifos = pdata->num_fifos;
706 	}
707 
708 	finfoblk = devm_kzalloc(&pdev->dev, info_count * sizeof(*finfoblk),
709 				GFP_KERNEL);
710 	if (!finfoblk)
711 		return -ENOMEM;
712 
713 	finfo = finfoblk;
714 	child = NULL;
715 	for (i = 0; i < info_count; i++, finfo++) {
716 		if (node) {
717 			child = of_get_next_available_child(node, child);
718 			ret = of_property_read_u32_array(child, "ti,mbox-tx",
719 							 tmp, ARRAY_SIZE(tmp));
720 			if (ret)
721 				return ret;
722 			finfo->tx_id = tmp[0];
723 			finfo->tx_irq = tmp[1];
724 			finfo->tx_usr = tmp[2];
725 
726 			ret = of_property_read_u32_array(child, "ti,mbox-rx",
727 							 tmp, ARRAY_SIZE(tmp));
728 			if (ret)
729 				return ret;
730 			finfo->rx_id = tmp[0];
731 			finfo->rx_irq = tmp[1];
732 			finfo->rx_usr = tmp[2];
733 
734 			finfo->name = child->name;
735 		} else {
736 			finfo->tx_id = info->tx_id;
737 			finfo->rx_id = info->rx_id;
738 			finfo->tx_usr = info->usr_id;
739 			finfo->tx_irq = info->irq_id;
740 			finfo->rx_usr = info->usr_id;
741 			finfo->rx_irq = info->irq_id;
742 			finfo->name = info->name;
743 			info++;
744 		}
745 		if (finfo->tx_id >= num_fifos || finfo->rx_id >= num_fifos ||
746 		    finfo->tx_usr >= num_users || finfo->rx_usr >= num_users)
747 			return -EINVAL;
748 	}
749 
750 	mdev = devm_kzalloc(&pdev->dev, sizeof(*mdev), GFP_KERNEL);
751 	if (!mdev)
752 		return -ENOMEM;
753 
754 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
755 	mdev->mbox_base = devm_ioremap_resource(&pdev->dev, mem);
756 	if (IS_ERR(mdev->mbox_base))
757 		return PTR_ERR(mdev->mbox_base);
758 
759 	/* allocate one extra for marking end of list */
760 	list = devm_kzalloc(&pdev->dev, (info_count + 1) * sizeof(*list),
761 			    GFP_KERNEL);
762 	if (!list)
763 		return -ENOMEM;
764 
765 	chnls = devm_kzalloc(&pdev->dev, (info_count + 1) * sizeof(*chnls),
766 			     GFP_KERNEL);
767 	if (!chnls)
768 		return -ENOMEM;
769 
770 	mboxblk = devm_kzalloc(&pdev->dev, info_count * sizeof(*mbox),
771 			       GFP_KERNEL);
772 	if (!mboxblk)
773 		return -ENOMEM;
774 
775 	mbox = mboxblk;
776 	finfo = finfoblk;
777 	for (i = 0; i < info_count; i++, finfo++) {
778 		fifo = &mbox->tx_fifo;
779 		fifo->msg = MAILBOX_MESSAGE(finfo->tx_id);
780 		fifo->fifo_stat = MAILBOX_FIFOSTATUS(finfo->tx_id);
781 		fifo->intr_bit = MAILBOX_IRQ_NOTFULL(finfo->tx_id);
782 		fifo->irqenable = MAILBOX_IRQENABLE(intr_type, finfo->tx_usr);
783 		fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, finfo->tx_usr);
784 		fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, finfo->tx_usr);
785 
786 		fifo = &mbox->rx_fifo;
787 		fifo->msg = MAILBOX_MESSAGE(finfo->rx_id);
788 		fifo->msg_stat =  MAILBOX_MSGSTATUS(finfo->rx_id);
789 		fifo->intr_bit = MAILBOX_IRQ_NEWMSG(finfo->rx_id);
790 		fifo->irqenable = MAILBOX_IRQENABLE(intr_type, finfo->rx_usr);
791 		fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, finfo->rx_usr);
792 		fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, finfo->rx_usr);
793 
794 		mbox->intr_type = intr_type;
795 
796 		mbox->parent = mdev;
797 		mbox->name = finfo->name;
798 		mbox->irq = platform_get_irq(pdev, finfo->tx_irq);
799 		if (mbox->irq < 0)
800 			return mbox->irq;
801 		mbox->chan = &chnls[i];
802 		chnls[i].con_priv = mbox;
803 		list[i] = mbox++;
804 	}
805 
806 	mutex_init(&mdev->cfg_lock);
807 	mdev->dev = &pdev->dev;
808 	mdev->num_users = num_users;
809 	mdev->num_fifos = num_fifos;
810 	mdev->mboxes = list;
811 
812 	/* OMAP does not have a Tx-Done IRQ, but rather a Tx-Ready IRQ */
813 	mdev->controller.txdone_irq = true;
814 	mdev->controller.dev = mdev->dev;
815 	mdev->controller.ops = &omap_mbox_chan_ops;
816 	mdev->controller.chans = chnls;
817 	mdev->controller.num_chans = info_count;
818 	mdev->controller.of_xlate = omap_mbox_of_xlate;
819 	ret = omap_mbox_register(mdev);
820 	if (ret)
821 		return ret;
822 
823 	platform_set_drvdata(pdev, mdev);
824 	pm_runtime_enable(mdev->dev);
825 
826 	ret = pm_runtime_get_sync(mdev->dev);
827 	if (ret < 0) {
828 		pm_runtime_put_noidle(mdev->dev);
829 		goto unregister;
830 	}
831 
832 	/*
833 	 * just print the raw revision register, the format is not
834 	 * uniform across all SoCs
835 	 */
836 	l = mbox_read_reg(mdev, MAILBOX_REVISION);
837 	dev_info(mdev->dev, "omap mailbox rev 0x%x\n", l);
838 
839 	ret = pm_runtime_put_sync(mdev->dev);
840 	if (ret < 0)
841 		goto unregister;
842 
843 	devm_kfree(&pdev->dev, finfoblk);
844 	return 0;
845 
846 unregister:
847 	pm_runtime_disable(mdev->dev);
848 	omap_mbox_unregister(mdev);
849 	return ret;
850 }
851 
852 static int omap_mbox_remove(struct platform_device *pdev)
853 {
854 	struct omap_mbox_device *mdev = platform_get_drvdata(pdev);
855 
856 	pm_runtime_disable(mdev->dev);
857 	omap_mbox_unregister(mdev);
858 
859 	return 0;
860 }
861 
862 static struct platform_driver omap_mbox_driver = {
863 	.probe	= omap_mbox_probe,
864 	.remove	= omap_mbox_remove,
865 	.driver	= {
866 		.name = "omap-mailbox",
867 		.of_match_table = of_match_ptr(omap_mailbox_of_match),
868 	},
869 };
870 
871 static int __init omap_mbox_init(void)
872 {
873 	int err;
874 
875 	err = class_register(&omap_mbox_class);
876 	if (err)
877 		return err;
878 
879 	/* kfifo size sanity check: alignment and minimal size */
880 	mbox_kfifo_size = ALIGN(mbox_kfifo_size, sizeof(mbox_msg_t));
881 	mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size,
882 							sizeof(mbox_msg_t));
883 
884 	return platform_driver_register(&omap_mbox_driver);
885 }
886 subsys_initcall(omap_mbox_init);
887 
888 static void __exit omap_mbox_exit(void)
889 {
890 	platform_driver_unregister(&omap_mbox_driver);
891 	class_unregister(&omap_mbox_class);
892 }
893 module_exit(omap_mbox_exit);
894 
895 MODULE_LICENSE("GPL v2");
896 MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging");
897 MODULE_AUTHOR("Toshihiro Kobayashi");
898 MODULE_AUTHOR("Hiroshi DOYU");
899