1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Microchip PolarFire SoC (MPFS) system controller/mailbox controller driver
4  *
5  * Copyright (c) 2020-2022 Microchip Corporation. All rights reserved.
6  *
7  * Author: Conor Dooley <conor.dooley@microchip.com>
8  *
9  */
10 
11 #include <linux/io.h>
12 #include <linux/err.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/interrupt.h>
17 #include <linux/platform_device.h>
18 #include <linux/mailbox_controller.h>
19 #include <soc/microchip/mpfs.h>
20 
21 #define SERVICES_CR_OFFSET		0x50u
22 #define SERVICES_SR_OFFSET		0x54u
23 #define MAILBOX_REG_OFFSET		0x800u
24 #define MSS_SYS_MAILBOX_DATA_OFFSET	0u
25 #define SCB_MASK_WIDTH			16u
26 
27 /* SCBCTRL service control register */
28 
29 #define SCB_CTRL_REQ (0)
30 #define SCB_CTRL_REQ_MASK BIT(SCB_CTRL_REQ)
31 
32 #define SCB_CTRL_BUSY (1)
33 #define SCB_CTRL_BUSY_MASK BIT(SCB_CTRL_BUSY)
34 
35 #define SCB_CTRL_ABORT (2)
36 #define SCB_CTRL_ABORT_MASK BIT(SCB_CTRL_ABORT)
37 
38 #define SCB_CTRL_NOTIFY (3)
39 #define SCB_CTRL_NOTIFY_MASK BIT(SCB_CTRL_NOTIFY)
40 
41 #define SCB_CTRL_POS (16)
42 #define SCB_CTRL_MASK GENMASK(SCB_CTRL_POS + SCB_MASK_WIDTH - 1, SCB_CTRL_POS)
43 
44 /* SCBCTRL service status register */
45 
46 #define SCB_STATUS_REQ (0)
47 #define SCB_STATUS_REQ_MASK BIT(SCB_STATUS_REQ)
48 
49 #define SCB_STATUS_BUSY (1)
50 #define SCB_STATUS_BUSY_MASK BIT(SCB_STATUS_BUSY)
51 
52 #define SCB_STATUS_ABORT (2)
53 #define SCB_STATUS_ABORT_MASK BIT(SCB_STATUS_ABORT)
54 
55 #define SCB_STATUS_NOTIFY (3)
56 #define SCB_STATUS_NOTIFY_MASK BIT(SCB_STATUS_NOTIFY)
57 
58 #define SCB_STATUS_POS (16)
59 #define SCB_STATUS_MASK GENMASK(SCB_STATUS_POS + SCB_MASK_WIDTH - 1, SCB_STATUS_POS)
60 
61 struct mpfs_mbox {
62 	struct mbox_controller controller;
63 	struct device *dev;
64 	int irq;
65 	void __iomem *ctrl_base;
66 	void __iomem *mbox_base;
67 	void __iomem *int_reg;
68 	struct mbox_chan chans[1];
69 	struct mpfs_mss_response *response;
70 	u16 resp_offset;
71 };
72 
73 static bool mpfs_mbox_busy(struct mpfs_mbox *mbox)
74 {
75 	u32 status;
76 
77 	status = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET);
78 
79 	return status & SCB_STATUS_BUSY_MASK;
80 }
81 
82 static bool mpfs_mbox_last_tx_done(struct mbox_chan *chan)
83 {
84 	struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
85 	struct mpfs_mss_response *response = mbox->response;
86 	u32 val;
87 
88 	if (mpfs_mbox_busy(mbox))
89 		return false;
90 
91 	/*
92 	 * The service status is stored in bits 31:16 of the SERVICES_SR
93 	 * register & is only valid when the system controller is not busy.
94 	 * Failed services are intended to generated interrupts, but in reality
95 	 * this does not happen, so the status must be checked here.
96 	 */
97 	val = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET);
98 	response->resp_status = (val & SCB_STATUS_MASK) >> SCB_STATUS_POS;
99 
100 	return true;
101 }
102 
103 static int mpfs_mbox_send_data(struct mbox_chan *chan, void *data)
104 {
105 	struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
106 	struct mpfs_mss_msg *msg = data;
107 	u32 tx_trigger;
108 	u16 opt_sel;
109 	u32 val = 0u;
110 
111 	mbox->response = msg->response;
112 	mbox->resp_offset = msg->resp_offset;
113 
114 	if (mpfs_mbox_busy(mbox))
115 		return -EBUSY;
116 
117 	if (msg->cmd_data_size) {
118 		u32 index;
119 		u8 extra_bits = msg->cmd_data_size & 3;
120 		u32 *word_buf = (u32 *)msg->cmd_data;
121 
122 		for (index = 0; index < (msg->cmd_data_size / 4); index++)
123 			writel_relaxed(word_buf[index],
124 				       mbox->mbox_base + msg->mbox_offset + index * 0x4);
125 		if (extra_bits) {
126 			u8 i;
127 			u8 byte_off = ALIGN_DOWN(msg->cmd_data_size, 4);
128 			u8 *byte_buf = msg->cmd_data + byte_off;
129 
130 			val = readl_relaxed(mbox->mbox_base + msg->mbox_offset + index * 0x4);
131 
132 			for (i = 0u; i < extra_bits; i++) {
133 				val &= ~(0xffu << (i * 8u));
134 				val |= (byte_buf[i] << (i * 8u));
135 			}
136 
137 			writel_relaxed(val, mbox->mbox_base + msg->mbox_offset + index * 0x4);
138 		}
139 	}
140 
141 	opt_sel = ((msg->mbox_offset << 7u) | (msg->cmd_opcode & 0x7fu));
142 
143 	tx_trigger = (opt_sel << SCB_CTRL_POS) & SCB_CTRL_MASK;
144 	tx_trigger |= SCB_CTRL_REQ_MASK | SCB_STATUS_NOTIFY_MASK;
145 	writel_relaxed(tx_trigger, mbox->ctrl_base + SERVICES_CR_OFFSET);
146 
147 	return 0;
148 }
149 
150 static void mpfs_mbox_rx_data(struct mbox_chan *chan)
151 {
152 	struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
153 	struct mpfs_mss_response *response = mbox->response;
154 	u16 num_words = ALIGN((response->resp_size), (4)) / 4U;
155 	u32 i;
156 
157 	if (!response->resp_msg) {
158 		dev_err(mbox->dev, "failed to assign memory for response %d\n", -ENOMEM);
159 		return;
160 	}
161 
162 	/*
163 	 * We should *never* get an interrupt while the controller is
164 	 * still in the busy state. If we do, something has gone badly
165 	 * wrong & the content of the mailbox would not be valid.
166 	 */
167 	if (mpfs_mbox_busy(mbox)) {
168 		dev_err(mbox->dev, "got an interrupt but system controller is busy\n");
169 		response->resp_status = 0xDEAD;
170 		return;
171 	}
172 
173 	for (i = 0; i < num_words; i++) {
174 		response->resp_msg[i] =
175 			readl_relaxed(mbox->mbox_base
176 				      + mbox->resp_offset + i * 0x4);
177 	}
178 
179 	mbox_chan_received_data(chan, response);
180 }
181 
182 static irqreturn_t mpfs_mbox_inbox_isr(int irq, void *data)
183 {
184 	struct mbox_chan *chan = data;
185 	struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
186 
187 	writel_relaxed(0, mbox->int_reg);
188 
189 	mpfs_mbox_rx_data(chan);
190 
191 	return IRQ_HANDLED;
192 }
193 
194 static int mpfs_mbox_startup(struct mbox_chan *chan)
195 {
196 	struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
197 	int ret = 0;
198 
199 	if (!mbox)
200 		return -EINVAL;
201 
202 	ret = devm_request_irq(mbox->dev, mbox->irq, mpfs_mbox_inbox_isr, 0, "mpfs-mailbox", chan);
203 	if (ret)
204 		dev_err(mbox->dev, "failed to register mailbox interrupt:%d\n", ret);
205 
206 	return ret;
207 }
208 
209 static void mpfs_mbox_shutdown(struct mbox_chan *chan)
210 {
211 	struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
212 
213 	devm_free_irq(mbox->dev, mbox->irq, chan);
214 }
215 
216 static const struct mbox_chan_ops mpfs_mbox_ops = {
217 	.send_data = mpfs_mbox_send_data,
218 	.startup = mpfs_mbox_startup,
219 	.shutdown = mpfs_mbox_shutdown,
220 	.last_tx_done = mpfs_mbox_last_tx_done,
221 };
222 
223 static int mpfs_mbox_probe(struct platform_device *pdev)
224 {
225 	struct mpfs_mbox *mbox;
226 	struct resource *regs;
227 	int ret;
228 
229 	mbox = devm_kzalloc(&pdev->dev, sizeof(*mbox), GFP_KERNEL);
230 	if (!mbox)
231 		return -ENOMEM;
232 
233 	mbox->ctrl_base = devm_platform_get_and_ioremap_resource(pdev, 0, &regs);
234 	if (IS_ERR(mbox->ctrl_base))
235 		return PTR_ERR(mbox->ctrl_base);
236 
237 	mbox->int_reg = devm_platform_get_and_ioremap_resource(pdev, 1, &regs);
238 	if (IS_ERR(mbox->int_reg))
239 		return PTR_ERR(mbox->int_reg);
240 
241 	mbox->mbox_base = devm_platform_get_and_ioremap_resource(pdev, 2, &regs);
242 	if (IS_ERR(mbox->mbox_base)) // account for the old dt-binding w/ 2 regs
243 		mbox->mbox_base = mbox->ctrl_base + MAILBOX_REG_OFFSET;
244 
245 	mbox->irq = platform_get_irq(pdev, 0);
246 	if (mbox->irq < 0)
247 		return mbox->irq;
248 
249 	mbox->dev = &pdev->dev;
250 
251 	mbox->chans[0].con_priv = mbox;
252 	mbox->controller.dev = mbox->dev;
253 	mbox->controller.num_chans = 1;
254 	mbox->controller.chans = mbox->chans;
255 	mbox->controller.ops = &mpfs_mbox_ops;
256 	mbox->controller.txdone_poll = true;
257 	mbox->controller.txpoll_period = 10u;
258 
259 	ret = devm_mbox_controller_register(&pdev->dev, &mbox->controller);
260 	if (ret) {
261 		dev_err(&pdev->dev, "Registering MPFS mailbox controller failed\n");
262 		return ret;
263 	}
264 	dev_info(&pdev->dev, "Registered MPFS mailbox controller driver\n");
265 
266 	return 0;
267 }
268 
269 static const struct of_device_id mpfs_mbox_of_match[] = {
270 	{.compatible = "microchip,mpfs-mailbox", },
271 	{},
272 };
273 MODULE_DEVICE_TABLE(of, mpfs_mbox_of_match);
274 
275 static struct platform_driver mpfs_mbox_driver = {
276 	.driver = {
277 		.name = "mpfs-mailbox",
278 		.of_match_table = mpfs_mbox_of_match,
279 	},
280 	.probe = mpfs_mbox_probe,
281 };
282 module_platform_driver(mpfs_mbox_driver);
283 
284 MODULE_LICENSE("GPL v2");
285 MODULE_AUTHOR("Conor Dooley <conor.dooley@microchip.com>");
286 MODULE_DESCRIPTION("MPFS mailbox controller driver");
287