1# SPDX-License-Identifier: GPL-2.0-only 2menuconfig MAILBOX 3 bool "Mailbox Hardware Support" 4 help 5 Mailbox is a framework to control hardware communication between 6 on-chip processors through queued messages and interrupt driven 7 signals. Say Y if your platform supports hardware mailboxes. 8 9if MAILBOX 10 11config APPLE_MAILBOX 12 tristate "Apple Mailbox driver" 13 depends on ARCH_APPLE || (ARM64 && COMPILE_TEST) 14 default ARCH_APPLE 15 help 16 Apple SoCs have various co-processors required for certain 17 peripherals to work (NVMe, display controller, etc.). This 18 driver adds support for the mailbox controller used to 19 communicate with those. 20 21 Say Y here if you have a Apple SoC. 22 23config ARM_MHU 24 tristate "ARM MHU Mailbox" 25 depends on ARM_AMBA 26 help 27 Say Y here if you want to build the ARM MHU controller driver. 28 The controller has 3 mailbox channels, the last of which can be 29 used in Secure mode only. 30 31config ARM_MHU_V2 32 tristate "ARM MHUv2 Mailbox" 33 depends on ARM_AMBA 34 help 35 Say Y here if you want to build the ARM MHUv2 controller driver, 36 which provides unidirectional mailboxes between processing elements. 37 38config IMX_MBOX 39 tristate "i.MX Mailbox" 40 depends on ARCH_MXC || COMPILE_TEST 41 help 42 Mailbox implementation for i.MX Messaging Unit (MU). 43 44config PLATFORM_MHU 45 tristate "Platform MHU Mailbox" 46 depends on OF 47 depends on HAS_IOMEM 48 help 49 Say Y here if you want to build a platform specific variant MHU 50 controller driver. 51 The controller has a maximum of 3 mailbox channels, the last of 52 which can be used in Secure mode only. 53 54config PL320_MBOX 55 bool "ARM PL320 Mailbox" 56 depends on ARM_AMBA 57 help 58 An implementation of the ARM PL320 Interprocessor Communication 59 Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to 60 send short messages between Highbank's A9 cores and the EnergyCore 61 Management Engine, primarily for cpufreq. Say Y here if you want 62 to use the PL320 IPCM support. 63 64config ARMADA_37XX_RWTM_MBOX 65 tristate "Armada 37xx rWTM BIU Mailbox" 66 depends on ARCH_MVEBU || COMPILE_TEST 67 depends on OF 68 help 69 Mailbox implementation for communication with the the firmware 70 running on the Cortex-M3 rWTM secure processor of the Armada 37xx 71 SOC. Say Y here if you are building for such a device (for example 72 the Turris Mox router). 73 74config OMAP2PLUS_MBOX 75 tristate "OMAP2+ Mailbox framework support" 76 depends on ARCH_OMAP2PLUS || ARCH_K3 77 help 78 Mailbox implementation for OMAP family chips with hardware for 79 interprocessor communication involving DSP, IVA1.0 and IVA2 in 80 OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you 81 want to use OMAP2+ Mailbox framework support. 82 83config OMAP_MBOX_KFIFO_SIZE 84 int "Mailbox kfifo default buffer size (bytes)" 85 depends on OMAP2PLUS_MBOX 86 default 256 87 help 88 Specify the default size of mailbox's kfifo buffers (bytes). 89 This can also be changed at runtime (via the mbox_kfifo_size 90 module parameter). 91 92config ROCKCHIP_MBOX 93 bool "Rockchip Soc Integrated Mailbox Support" 94 depends on ARCH_ROCKCHIP || COMPILE_TEST 95 help 96 This driver provides support for inter-processor communication 97 between CPU cores and MCU processor on Some Rockchip SOCs. 98 Please check it that the Soc you use have Mailbox hardware. 99 Say Y here if you want to use the Rockchip Mailbox support. 100 101config PCC 102 bool "Platform Communication Channel Driver" 103 depends on ACPI 104 default n 105 help 106 ACPI 5.0+ spec defines a generic mode of communication 107 between the OS and a platform such as the BMC. This medium 108 (PCC) is typically used by CPPC (ACPI CPU Performance management), 109 RAS (ACPI reliability protocol) and MPST (ACPI Memory power 110 states). Select this driver if your platform implements the 111 PCC clients mentioned above. 112 113config ALTERA_MBOX 114 tristate "Altera Mailbox" 115 depends on HAS_IOMEM 116 help 117 An implementation of the Altera Mailbox soft core. It is used 118 to send message between processors. Say Y here if you want to use the 119 Altera mailbox support. 120 121config BCM2835_MBOX 122 tristate "BCM2835 Mailbox" 123 depends on ARCH_BCM2835 124 help 125 An implementation of the BCM2385 Mailbox. It is used to invoke 126 the services of the Videocore. Say Y here if you want to use the 127 BCM2835 Mailbox. 128 129config STI_MBOX 130 tristate "STI Mailbox framework support" 131 depends on ARCH_STI && OF 132 help 133 Mailbox implementation for STMicroelectonics family chips with 134 hardware for interprocessor communication. 135 136config TI_MESSAGE_MANAGER 137 tristate "Texas Instruments Message Manager Driver" 138 depends on ARCH_KEYSTONE || ARCH_K3 139 help 140 An implementation of Message Manager slave driver for Keystone 141 and K3 architecture SoCs from Texas Instruments. Message Manager 142 is a communication entity found on few of Texas Instrument's keystone 143 and K3 architecture SoCs. These may be used for communication between 144 multiple processors within the SoC. Select this driver if your 145 platform has support for the hardware block. 146 147config HI3660_MBOX 148 tristate "Hi3660 Mailbox" if EXPERT 149 depends on (ARCH_HISI || COMPILE_TEST) 150 depends on OF 151 default ARCH_HISI 152 help 153 An implementation of the hi3660 mailbox. It is used to send message 154 between application processors and other processors/MCU/DSP. Select 155 Y here if you want to use Hi3660 mailbox controller. 156 157config HI6220_MBOX 158 tristate "Hi6220 Mailbox" if EXPERT 159 depends on (ARCH_HISI || COMPILE_TEST) 160 depends on OF 161 default ARCH_HISI 162 help 163 An implementation of the hi6220 mailbox. It is used to send message 164 between application processors and MCU. Say Y here if you want to 165 build Hi6220 mailbox controller driver. 166 167config MAILBOX_TEST 168 tristate "Mailbox Test Client" 169 depends on OF 170 depends on HAS_IOMEM 171 help 172 Test client to help with testing new Controller driver 173 implementations. 174 175config POLARFIRE_SOC_MAILBOX 176 tristate "PolarFire SoC (MPFS) Mailbox" 177 depends on HAS_IOMEM 178 depends on SOC_MICROCHIP_POLARFIRE || COMPILE_TEST 179 help 180 This driver adds support for the PolarFire SoC (MPFS) mailbox controller. 181 182 To compile this driver as a module, choose M here. the 183 module will be called mailbox-mpfs. 184 185 If unsure, say N. 186 187config QCOM_APCS_IPC 188 tristate "Qualcomm APCS IPC driver" 189 depends on ARCH_QCOM || COMPILE_TEST 190 help 191 Say y here to enable support for the APCS IPC mailbox driver, 192 providing an interface for invoking the inter-process communication 193 signals from the application processor to other masters. 194 195config TEGRA_HSP_MBOX 196 bool "Tegra HSP (Hardware Synchronization Primitives) Driver" 197 depends on ARCH_TEGRA 198 help 199 The Tegra HSP driver is used for the interprocessor communication 200 between different remote processors and host processors on Tegra186 201 and later SoCs. Say Y here if you want to have this support. 202 If unsure say N. 203 204config XGENE_SLIMPRO_MBOX 205 tristate "APM SoC X-Gene SLIMpro Mailbox Controller" 206 depends on ARCH_XGENE 207 help 208 An implementation of the APM X-Gene Interprocessor Communication 209 Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller. 210 It is used to send short messages between ARM64-bit cores and 211 the SLIMpro Management Engine, primarily for PM. Say Y here if you 212 want to use the APM X-Gene SLIMpro IPCM support. 213 214config BCM_PDC_MBOX 215 tristate "Broadcom FlexSparx DMA Mailbox" 216 depends on ARCH_BCM_IPROC || COMPILE_TEST 217 help 218 Mailbox implementation for the Broadcom FlexSparx DMA ring manager, 219 which provides access to various offload engines on Broadcom 220 SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2. 221 222config BCM_FLEXRM_MBOX 223 tristate "Broadcom FlexRM Mailbox" 224 depends on ARM64 225 depends on ARCH_BCM_IPROC || COMPILE_TEST 226 select GENERIC_MSI_IRQ_DOMAIN 227 default m if ARCH_BCM_IPROC 228 help 229 Mailbox implementation of the Broadcom FlexRM ring manager, 230 which provides access to various offload engines on Broadcom 231 SoCs. Say Y here if you want to use the Broadcom FlexRM. 232 233config STM32_IPCC 234 tristate "STM32 IPCC Mailbox" 235 depends on MACH_STM32MP157 || COMPILE_TEST 236 help 237 Mailbox implementation for STMicroelectonics STM32 family chips 238 with hardware for Inter-Processor Communication Controller (IPCC) 239 between processors. Say Y here if you want to have this support. 240 241config MTK_CMDQ_MBOX 242 tristate "MediaTek CMDQ Mailbox Support" 243 depends on ARCH_MEDIATEK || COMPILE_TEST 244 select MTK_INFRACFG 245 help 246 Say yes here to add support for the MediaTek Command Queue (CMDQ) 247 mailbox driver. The CMDQ is used to help read/write registers with 248 critical time limitation, such as updating display configuration 249 during the vblank. 250 251config ZYNQMP_IPI_MBOX 252 bool "Xilinx ZynqMP IPI Mailbox" 253 depends on ARCH_ZYNQMP && OF 254 help 255 Say yes here to add support for Xilinx IPI mailbox driver. 256 This mailbox driver is used to send notification or short message 257 between processors with Xilinx ZynqMP IPI. It will place the 258 message to the IPI buffer and will access the IPI control 259 registers to kick the other processor or enquire status. 260 261config SUN6I_MSGBOX 262 tristate "Allwinner sun6i/sun8i/sun9i/sun50i Message Box" 263 depends on ARCH_SUNXI || COMPILE_TEST 264 default ARCH_SUNXI 265 help 266 Mailbox implementation for the hardware message box present in 267 various Allwinner SoCs. This mailbox is used for communication 268 between the application CPUs and the power management coprocessor. 269 270config SPRD_MBOX 271 tristate "Spreadtrum Mailbox" 272 depends on ARCH_SPRD || COMPILE_TEST 273 help 274 Mailbox driver implementation for the Spreadtrum platform. It is used 275 to send message between application processors and MCU. Say Y here if 276 you want to build the Spreatrum mailbox controller driver. 277 278config QCOM_IPCC 279 tristate "Qualcomm Technologies, Inc. IPCC driver" 280 depends on ARCH_QCOM || COMPILE_TEST 281 help 282 Qualcomm Technologies, Inc. Inter-Processor Communication Controller 283 (IPCC) driver for MSM devices. The driver provides mailbox support for 284 sending interrupts to the clients. On the other hand, the driver also 285 acts as an interrupt controller for receiving interrupts from clients. 286 Say Y here if you want to build this driver. 287 288endif 289