xref: /openbmc/linux/drivers/mailbox/Kconfig (revision 6c33a6f4) 
1# SPDX-License-Identifier: GPL-2.0-only
2menuconfig MAILBOX
3	bool "Mailbox Hardware Support"
4	help
5	  Mailbox is a framework to control hardware communication between
6	  on-chip processors through queued messages and interrupt driven
7	  signals. Say Y if your platform supports hardware mailboxes.
8
9if MAILBOX
10
11config ARM_MHU
12	tristate "ARM MHU Mailbox"
13	depends on ARM_AMBA
14	help
15	  Say Y here if you want to build the ARM MHU controller driver.
16	  The controller has 3 mailbox channels, the last of which can be
17	  used in Secure mode only.
18
19config IMX_MBOX
20	tristate "i.MX Mailbox"
21	depends on ARCH_MXC || COMPILE_TEST
22	help
23	  Mailbox implementation for i.MX Messaging Unit (MU).
24
25config PLATFORM_MHU
26	tristate "Platform MHU Mailbox"
27	depends on OF
28	depends on HAS_IOMEM
29	help
30	  Say Y here if you want to build a platform specific variant MHU
31	  controller driver.
32	  The controller has a maximum of 3 mailbox channels, the last of
33	  which can be used in Secure mode only.
34
35config PL320_MBOX
36	bool "ARM PL320 Mailbox"
37	depends on ARM_AMBA
38	help
39	  An implementation of the ARM PL320 Interprocessor Communication
40	  Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
41	  send short messages between Highbank's A9 cores and the EnergyCore
42	  Management Engine, primarily for cpufreq. Say Y here if you want
43	  to use the PL320 IPCM support.
44
45config ARMADA_37XX_RWTM_MBOX
46	tristate "Armada 37xx rWTM BIU Mailbox"
47	depends on ARCH_MVEBU || COMPILE_TEST
48	depends on OF
49	help
50	  Mailbox implementation for communication with the the firmware
51	  running on the Cortex-M3 rWTM secure processor of the Armada 37xx
52	  SOC. Say Y here if you are building for such a device (for example
53	  the Turris Mox router).
54
55config OMAP2PLUS_MBOX
56	tristate "OMAP2+ Mailbox framework support"
57	depends on ARCH_OMAP2PLUS || ARCH_K3
58	help
59	  Mailbox implementation for OMAP family chips with hardware for
60	  interprocessor communication involving DSP, IVA1.0 and IVA2 in
61	  OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
62	  want to use OMAP2+ Mailbox framework support.
63
64config OMAP_MBOX_KFIFO_SIZE
65	int "Mailbox kfifo default buffer size (bytes)"
66	depends on OMAP2PLUS_MBOX
67	default 256
68	help
69	  Specify the default size of mailbox's kfifo buffers (bytes).
70	  This can also be changed at runtime (via the mbox_kfifo_size
71	  module parameter).
72
73config ROCKCHIP_MBOX
74	bool "Rockchip Soc Intergrated Mailbox Support"
75	depends on ARCH_ROCKCHIP || COMPILE_TEST
76	help
77	  This driver provides support for inter-processor communication
78	  between CPU cores and MCU processor on Some Rockchip SOCs.
79	  Please check it that the Soc you use have Mailbox hardware.
80	  Say Y here if you want to use the Rockchip Mailbox support.
81
82config PCC
83	bool "Platform Communication Channel Driver"
84	depends on ACPI
85	default n
86	help
87	  ACPI 5.0+ spec defines a generic mode of communication
88	  between the OS and a platform such as the BMC. This medium
89	  (PCC) is typically used by CPPC (ACPI CPU Performance management),
90	  RAS (ACPI reliability protocol) and MPST (ACPI Memory power
91	  states). Select this driver if your platform implements the
92	  PCC clients mentioned above.
93
94config ALTERA_MBOX
95	tristate "Altera Mailbox"
96	depends on HAS_IOMEM
97	help
98	  An implementation of the Altera Mailbox soft core. It is used
99	  to send message between processors. Say Y here if you want to use the
100	  Altera mailbox support.
101
102config BCM2835_MBOX
103	tristate "BCM2835 Mailbox"
104	depends on ARCH_BCM2835
105	help
106	  An implementation of the BCM2385 Mailbox.  It is used to invoke
107	  the services of the Videocore. Say Y here if you want to use the
108	  BCM2835 Mailbox.
109
110config STI_MBOX
111	tristate "STI Mailbox framework support"
112	depends on ARCH_STI && OF
113	help
114	  Mailbox implementation for STMicroelectonics family chips with
115	  hardware for interprocessor communication.
116
117config TI_MESSAGE_MANAGER
118	tristate "Texas Instruments Message Manager Driver"
119	depends on ARCH_KEYSTONE || ARCH_K3
120	help
121	  An implementation of Message Manager slave driver for Keystone
122	  and K3 architecture SoCs from Texas Instruments. Message Manager
123	  is a communication entity found on few of Texas Instrument's keystone
124	  and K3 architecture SoCs. These may be used for communication between
125	  multiple processors within the SoC. Select this driver if your
126	  platform has support for the hardware block.
127
128config HI3660_MBOX
129	tristate "Hi3660 Mailbox" if EXPERT
130	depends on (ARCH_HISI || COMPILE_TEST)
131	depends on OF
132	default ARCH_HISI
133	help
134	  An implementation of the hi3660 mailbox. It is used to send message
135	  between application processors and other processors/MCU/DSP. Select
136	  Y here if you want to use Hi3660 mailbox controller.
137
138config HI6220_MBOX
139	tristate "Hi6220 Mailbox" if EXPERT
140	depends on (ARCH_HISI || COMPILE_TEST)
141	depends on OF
142	default ARCH_HISI
143	help
144	  An implementation of the hi6220 mailbox. It is used to send message
145	  between application processors and MCU. Say Y here if you want to
146	  build Hi6220 mailbox controller driver.
147
148config MAILBOX_TEST
149	tristate "Mailbox Test Client"
150	depends on OF
151	depends on HAS_IOMEM
152	help
153	  Test client to help with testing new Controller driver
154	  implementations.
155
156config QCOM_APCS_IPC
157	tristate "Qualcomm APCS IPC driver"
158	depends on ARCH_QCOM || COMPILE_TEST
159	help
160	  Say y here to enable support for the APCS IPC mailbox driver,
161	  providing an interface for invoking the inter-process communication
162	  signals from the application processor to other masters.
163
164config TEGRA_HSP_MBOX
165	bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
166	depends on ARCH_TEGRA
167	help
168	  The Tegra HSP driver is used for the interprocessor communication
169	  between different remote processors and host processors on Tegra186
170	  and later SoCs. Say Y here if you want to have this support.
171	  If unsure say N.
172
173config XGENE_SLIMPRO_MBOX
174	tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
175	depends on ARCH_XGENE
176	help
177	  An implementation of the APM X-Gene Interprocessor Communication
178	  Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
179	  It is used to send short messages between ARM64-bit cores and
180	  the SLIMpro Management Engine, primarily for PM. Say Y here if you
181	  want to use the APM X-Gene SLIMpro IPCM support.
182
183config BCM_PDC_MBOX
184	tristate "Broadcom FlexSparx DMA Mailbox"
185	depends on ARCH_BCM_IPROC || COMPILE_TEST
186	help
187	  Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
188	  which provides access to various offload engines on Broadcom
189	  SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
190
191config BCM_FLEXRM_MBOX
192	tristate "Broadcom FlexRM Mailbox"
193	depends on ARM64
194	depends on ARCH_BCM_IPROC || COMPILE_TEST
195	select GENERIC_MSI_IRQ_DOMAIN
196	default m if ARCH_BCM_IPROC
197	help
198	  Mailbox implementation of the Broadcom FlexRM ring manager,
199	  which provides access to various offload engines on Broadcom
200	  SoCs. Say Y here if you want to use the Broadcom FlexRM.
201
202config STM32_IPCC
203	tristate "STM32 IPCC Mailbox"
204	depends on MACH_STM32MP157
205	help
206	  Mailbox implementation for STMicroelectonics STM32 family chips
207	  with hardware for Inter-Processor Communication Controller (IPCC)
208	  between processors. Say Y here if you want to have this support.
209
210config MTK_CMDQ_MBOX
211	tristate "MediaTek CMDQ Mailbox Support"
212	depends on ARCH_MEDIATEK || COMPILE_TEST
213	select MTK_INFRACFG
214	help
215	  Say yes here to add support for the MediaTek Command Queue (CMDQ)
216	  mailbox driver. The CMDQ is used to help read/write registers with
217	  critical time limitation, such as updating display configuration
218	  during the vblank.
219
220config ZYNQMP_IPI_MBOX
221	bool "Xilinx ZynqMP IPI Mailbox"
222	depends on ARCH_ZYNQMP && OF
223	help
224	  Say yes here to add support for Xilinx IPI mailbox driver.
225	  This mailbox driver is used to send notification or short message
226	  between processors with Xilinx ZynqMP IPI. It will place the
227	  message to the IPI buffer and will access the IPI control
228	  registers to kick the other processor or enquire status.
229
230endif
231