xref: /openbmc/linux/drivers/mailbox/Kconfig (revision 4a075bd4)
1menuconfig MAILBOX
2	bool "Mailbox Hardware Support"
3	help
4	  Mailbox is a framework to control hardware communication between
5	  on-chip processors through queued messages and interrupt driven
6	  signals. Say Y if your platform supports hardware mailboxes.
7
8if MAILBOX
9
10config ARM_MHU
11	tristate "ARM MHU Mailbox"
12	depends on ARM_AMBA
13	help
14	  Say Y here if you want to build the ARM MHU controller driver.
15	  The controller has 3 mailbox channels, the last of which can be
16	  used in Secure mode only.
17
18config IMX_MBOX
19	tristate "i.MX Mailbox"
20	depends on ARCH_MXC || COMPILE_TEST
21	help
22	  Mailbox implementation for i.MX Messaging Unit (MU).
23
24config PLATFORM_MHU
25	tristate "Platform MHU Mailbox"
26	depends on OF
27	depends on HAS_IOMEM
28	help
29	  Say Y here if you want to build a platform specific variant MHU
30	  controller driver.
31	  The controller has a maximum of 3 mailbox channels, the last of
32	  which can be used in Secure mode only.
33
34config PL320_MBOX
35	bool "ARM PL320 Mailbox"
36	depends on ARM_AMBA
37	help
38	  An implementation of the ARM PL320 Interprocessor Communication
39	  Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
40	  send short messages between Highbank's A9 cores and the EnergyCore
41	  Management Engine, primarily for cpufreq. Say Y here if you want
42	  to use the PL320 IPCM support.
43
44config ARMADA_37XX_RWTM_MBOX
45	tristate "Armada 37xx rWTM BIU Mailbox"
46	depends on ARCH_MVEBU || COMPILE_TEST
47	depends on OF
48	help
49	  Mailbox implementation for communication with the the firmware
50	  running on the Cortex-M3 rWTM secure processor of the Armada 37xx
51	  SOC. Say Y here if you are building for such a device (for example
52	  the Turris Mox router).
53
54config OMAP2PLUS_MBOX
55	tristate "OMAP2+ Mailbox framework support"
56	depends on ARCH_OMAP2PLUS
57	help
58	  Mailbox implementation for OMAP family chips with hardware for
59	  interprocessor communication involving DSP, IVA1.0 and IVA2 in
60	  OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
61	  want to use OMAP2+ Mailbox framework support.
62
63config OMAP_MBOX_KFIFO_SIZE
64	int "Mailbox kfifo default buffer size (bytes)"
65	depends on OMAP2PLUS_MBOX
66	default 256
67	help
68	  Specify the default size of mailbox's kfifo buffers (bytes).
69	  This can also be changed at runtime (via the mbox_kfifo_size
70	  module parameter).
71
72config ROCKCHIP_MBOX
73	bool "Rockchip Soc Intergrated Mailbox Support"
74	depends on ARCH_ROCKCHIP || COMPILE_TEST
75	help
76	  This driver provides support for inter-processor communication
77	  between CPU cores and MCU processor on Some Rockchip SOCs.
78	  Please check it that the Soc you use have Mailbox hardware.
79	  Say Y here if you want to use the Rockchip Mailbox support.
80
81config PCC
82	bool "Platform Communication Channel Driver"
83	depends on ACPI
84	default n
85	help
86	  ACPI 5.0+ spec defines a generic mode of communication
87	  between the OS and a platform such as the BMC. This medium
88	  (PCC) is typically used by CPPC (ACPI CPU Performance management),
89	  RAS (ACPI reliability protocol) and MPST (ACPI Memory power
90	  states). Select this driver if your platform implements the
91	  PCC clients mentioned above.
92
93config ALTERA_MBOX
94	tristate "Altera Mailbox"
95	depends on HAS_IOMEM
96	help
97	  An implementation of the Altera Mailbox soft core. It is used
98	  to send message between processors. Say Y here if you want to use the
99	  Altera mailbox support.
100
101config BCM2835_MBOX
102	tristate "BCM2835 Mailbox"
103	depends on ARCH_BCM2835
104	help
105	  An implementation of the BCM2385 Mailbox.  It is used to invoke
106	  the services of the Videocore. Say Y here if you want to use the
107	  BCM2835 Mailbox.
108
109config STI_MBOX
110	tristate "STI Mailbox framework support"
111	depends on ARCH_STI && OF
112	help
113	  Mailbox implementation for STMicroelectonics family chips with
114	  hardware for interprocessor communication.
115
116config TI_MESSAGE_MANAGER
117	tristate "Texas Instruments Message Manager Driver"
118	depends on ARCH_KEYSTONE || ARCH_K3
119	help
120	  An implementation of Message Manager slave driver for Keystone
121	  and K3 architecture SoCs from Texas Instruments. Message Manager
122	  is a communication entity found on few of Texas Instrument's keystone
123	  and K3 architecture SoCs. These may be used for communication between
124	  multiple processors within the SoC. Select this driver if your
125	  platform has support for the hardware block.
126
127config HI3660_MBOX
128	tristate "Hi3660 Mailbox" if EXPERT
129	depends on (ARCH_HISI || COMPILE_TEST)
130	depends on OF
131	default ARCH_HISI
132	help
133	  An implementation of the hi3660 mailbox. It is used to send message
134	  between application processors and other processors/MCU/DSP. Select
135	  Y here if you want to use Hi3660 mailbox controller.
136
137config HI6220_MBOX
138	tristate "Hi6220 Mailbox" if EXPERT
139	depends on (ARCH_HISI || COMPILE_TEST)
140	depends on OF
141	default ARCH_HISI
142	help
143	  An implementation of the hi6220 mailbox. It is used to send message
144	  between application processors and MCU. Say Y here if you want to
145	  build Hi6220 mailbox controller driver.
146
147config MAILBOX_TEST
148	tristate "Mailbox Test Client"
149	depends on OF
150	depends on HAS_IOMEM
151	help
152	  Test client to help with testing new Controller driver
153	  implementations.
154
155config QCOM_APCS_IPC
156	tristate "Qualcomm APCS IPC driver"
157	depends on ARCH_QCOM || COMPILE_TEST
158	help
159	  Say y here to enable support for the APCS IPC mailbox driver,
160	  providing an interface for invoking the inter-process communication
161	  signals from the application processor to other masters.
162
163config TEGRA_HSP_MBOX
164	bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
165	depends on ARCH_TEGRA
166	help
167	  The Tegra HSP driver is used for the interprocessor communication
168	  between different remote processors and host processors on Tegra186
169	  and later SoCs. Say Y here if you want to have this support.
170	  If unsure say N.
171
172config XGENE_SLIMPRO_MBOX
173	tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
174	depends on ARCH_XGENE
175	help
176	  An implementation of the APM X-Gene Interprocessor Communication
177	  Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
178	  It is used to send short messages between ARM64-bit cores and
179	  the SLIMpro Management Engine, primarily for PM. Say Y here if you
180	  want to use the APM X-Gene SLIMpro IPCM support.
181
182config BCM_PDC_MBOX
183	tristate "Broadcom FlexSparx DMA Mailbox"
184	depends on ARCH_BCM_IPROC || COMPILE_TEST
185	help
186	  Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
187	  which provides access to various offload engines on Broadcom
188	  SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
189
190config BCM_FLEXRM_MBOX
191	tristate "Broadcom FlexRM Mailbox"
192	depends on ARM64
193	depends on ARCH_BCM_IPROC || COMPILE_TEST
194	select GENERIC_MSI_IRQ_DOMAIN
195	default m if ARCH_BCM_IPROC
196	help
197	  Mailbox implementation of the Broadcom FlexRM ring manager,
198	  which provides access to various offload engines on Broadcom
199	  SoCs. Say Y here if you want to use the Broadcom FlexRM.
200
201config STM32_IPCC
202	tristate "STM32 IPCC Mailbox"
203	depends on MACH_STM32MP157
204	help
205	  Mailbox implementation for STMicroelectonics STM32 family chips
206	  with hardware for Inter-Processor Communication Controller (IPCC)
207	  between processors. Say Y here if you want to have this support.
208
209config MTK_CMDQ_MBOX
210	tristate "MediaTek CMDQ Mailbox Support"
211	depends on ARCH_MEDIATEK || COMPILE_TEST
212	select MTK_INFRACFG
213	help
214	  Say yes here to add support for the MediaTek Command Queue (CMDQ)
215	  mailbox driver. The CMDQ is used to help read/write registers with
216	  critical time limitation, such as updating display configuration
217	  during the vblank.
218
219config ZYNQMP_IPI_MBOX
220	bool "Xilinx ZynqMP IPI Mailbox"
221	depends on ARCH_ZYNQMP && OF
222	help
223	  Say yes here to add support for Xilinx IPI mailbox driver.
224	  This mailbox driver is used to send notification or short message
225	  between processors with Xilinx ZynqMP IPI. It will place the
226	  message to the IPI buffer and will access the IPI control
227	  registers to kick the other processor or enquire status.
228
229endif
230