1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Device driver for the PMU in Apple PowerBooks and PowerMacs. 4 * 5 * The VIA (versatile interface adapter) interfaces to the PMU, 6 * a 6805 microprocessor core whose primary function is to control 7 * battery charging and system power on the PowerBook 3400 and 2400. 8 * The PMU also controls the ADB (Apple Desktop Bus) which connects 9 * to the keyboard and mouse, as well as the non-volatile RAM 10 * and the RTC (real time clock) chip. 11 * 12 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi. 13 * Copyright (C) 2001-2002 Benjamin Herrenschmidt 14 * Copyright (C) 2006-2007 Johannes Berg 15 * 16 * THIS DRIVER IS BECOMING A TOTAL MESS ! 17 * - Cleanup atomically disabling reply to PMU events after 18 * a sleep or a freq. switch 19 * 20 */ 21 #include <stdarg.h> 22 #include <linux/mutex.h> 23 #include <linux/types.h> 24 #include <linux/errno.h> 25 #include <linux/kernel.h> 26 #include <linux/delay.h> 27 #include <linux/sched/signal.h> 28 #include <linux/miscdevice.h> 29 #include <linux/blkdev.h> 30 #include <linux/pci.h> 31 #include <linux/slab.h> 32 #include <linux/poll.h> 33 #include <linux/adb.h> 34 #include <linux/pmu.h> 35 #include <linux/cuda.h> 36 #include <linux/module.h> 37 #include <linux/spinlock.h> 38 #include <linux/pm.h> 39 #include <linux/proc_fs.h> 40 #include <linux/seq_file.h> 41 #include <linux/init.h> 42 #include <linux/interrupt.h> 43 #include <linux/device.h> 44 #include <linux/syscore_ops.h> 45 #include <linux/freezer.h> 46 #include <linux/syscalls.h> 47 #include <linux/suspend.h> 48 #include <linux/cpu.h> 49 #include <linux/compat.h> 50 #include <linux/of_address.h> 51 #include <linux/of_irq.h> 52 #include <linux/uaccess.h> 53 #include <asm/machdep.h> 54 #include <asm/io.h> 55 #include <asm/pgtable.h> 56 #include <asm/sections.h> 57 #include <asm/irq.h> 58 #ifdef CONFIG_PPC_PMAC 59 #include <asm/pmac_feature.h> 60 #include <asm/pmac_pfunc.h> 61 #include <asm/pmac_low_i2c.h> 62 #include <asm/prom.h> 63 #include <asm/mmu_context.h> 64 #include <asm/cputable.h> 65 #include <asm/time.h> 66 #include <asm/backlight.h> 67 #else 68 #include <asm/macintosh.h> 69 #include <asm/macints.h> 70 #include <asm/mac_via.h> 71 #endif 72 73 #include "via-pmu-event.h" 74 75 /* Some compile options */ 76 #undef DEBUG_SLEEP 77 78 /* Misc minor number allocated for /dev/pmu */ 79 #define PMU_MINOR 154 80 81 /* How many iterations between battery polls */ 82 #define BATTERY_POLLING_COUNT 2 83 84 static DEFINE_MUTEX(pmu_info_proc_mutex); 85 86 /* VIA registers - spaced 0x200 bytes apart */ 87 #define RS 0x200 /* skip between registers */ 88 #define B 0 /* B-side data */ 89 #define A RS /* A-side data */ 90 #define DIRB (2*RS) /* B-side direction (1=output) */ 91 #define DIRA (3*RS) /* A-side direction (1=output) */ 92 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */ 93 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */ 94 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */ 95 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */ 96 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */ 97 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */ 98 #define SR (10*RS) /* Shift register */ 99 #define ACR (11*RS) /* Auxiliary control register */ 100 #define PCR (12*RS) /* Peripheral control register */ 101 #define IFR (13*RS) /* Interrupt flag register */ 102 #define IER (14*RS) /* Interrupt enable register */ 103 #define ANH (15*RS) /* A-side data, no handshake */ 104 105 /* Bits in B data register: both active low */ 106 #ifdef CONFIG_PPC_PMAC 107 #define TACK 0x08 /* Transfer acknowledge (input) */ 108 #define TREQ 0x10 /* Transfer request (output) */ 109 #else 110 #define TACK 0x02 111 #define TREQ 0x04 112 #endif 113 114 /* Bits in ACR */ 115 #define SR_CTRL 0x1c /* Shift register control bits */ 116 #define SR_EXT 0x0c /* Shift on external clock */ 117 #define SR_OUT 0x10 /* Shift out if 1 */ 118 119 /* Bits in IFR and IER */ 120 #define IER_SET 0x80 /* set bits in IER */ 121 #define IER_CLR 0 /* clear bits in IER */ 122 #define SR_INT 0x04 /* Shift register full/empty */ 123 #define CB2_INT 0x08 124 #define CB1_INT 0x10 /* transition on CB1 input */ 125 126 static volatile enum pmu_state { 127 uninitialized = 0, 128 idle, 129 sending, 130 intack, 131 reading, 132 reading_intr, 133 locked, 134 } pmu_state; 135 136 static volatile enum int_data_state { 137 int_data_empty, 138 int_data_fill, 139 int_data_ready, 140 int_data_flush 141 } int_data_state[2] = { int_data_empty, int_data_empty }; 142 143 static struct adb_request *current_req; 144 static struct adb_request *last_req; 145 static struct adb_request *req_awaiting_reply; 146 static unsigned char interrupt_data[2][32]; 147 static int interrupt_data_len[2]; 148 static int int_data_last; 149 static unsigned char *reply_ptr; 150 static int data_index; 151 static int data_len; 152 static volatile int adb_int_pending; 153 static volatile int disable_poll; 154 static int pmu_kind = PMU_UNKNOWN; 155 static int pmu_fully_inited; 156 static int pmu_has_adb; 157 #ifdef CONFIG_PPC_PMAC 158 static volatile unsigned char __iomem *via1; 159 static volatile unsigned char __iomem *via2; 160 static struct device_node *vias; 161 static struct device_node *gpio_node; 162 #endif 163 static unsigned char __iomem *gpio_reg; 164 static int gpio_irq = 0; 165 static int gpio_irq_enabled = -1; 166 static volatile int pmu_suspended; 167 static spinlock_t pmu_lock; 168 static u8 pmu_intr_mask; 169 static int pmu_version; 170 static int drop_interrupts; 171 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) 172 static int option_lid_wakeup = 1; 173 #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */ 174 static unsigned long async_req_locks; 175 176 #define NUM_IRQ_STATS 13 177 static unsigned int pmu_irq_stats[NUM_IRQ_STATS]; 178 179 static struct proc_dir_entry *proc_pmu_root; 180 static struct proc_dir_entry *proc_pmu_info; 181 static struct proc_dir_entry *proc_pmu_irqstats; 182 static struct proc_dir_entry *proc_pmu_options; 183 static int option_server_mode; 184 185 int pmu_battery_count; 186 int pmu_cur_battery; 187 unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT; 188 struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES]; 189 static int query_batt_timer = BATTERY_POLLING_COUNT; 190 static struct adb_request batt_req; 191 static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES]; 192 193 int __fake_sleep; 194 int asleep; 195 196 #ifdef CONFIG_ADB 197 static int adb_dev_map; 198 static int pmu_adb_flags; 199 200 static int pmu_probe(void); 201 static int pmu_init(void); 202 static int pmu_send_request(struct adb_request *req, int sync); 203 static int pmu_adb_autopoll(int devs); 204 static int pmu_adb_reset_bus(void); 205 #endif /* CONFIG_ADB */ 206 207 static int init_pmu(void); 208 static void pmu_start(void); 209 static irqreturn_t via_pmu_interrupt(int irq, void *arg); 210 static irqreturn_t gpio1_interrupt(int irq, void *arg); 211 static int pmu_info_proc_show(struct seq_file *m, void *v); 212 static int pmu_irqstats_proc_show(struct seq_file *m, void *v); 213 static int pmu_battery_proc_show(struct seq_file *m, void *v); 214 static void pmu_pass_intr(unsigned char *data, int len); 215 static const struct proc_ops pmu_options_proc_ops; 216 217 #ifdef CONFIG_ADB 218 const struct adb_driver via_pmu_driver = { 219 .name = "PMU", 220 .probe = pmu_probe, 221 .init = pmu_init, 222 .send_request = pmu_send_request, 223 .autopoll = pmu_adb_autopoll, 224 .poll = pmu_poll_adb, 225 .reset_bus = pmu_adb_reset_bus, 226 }; 227 #endif /* CONFIG_ADB */ 228 229 extern void low_sleep_handler(void); 230 extern void enable_kernel_altivec(void); 231 extern void enable_kernel_fp(void); 232 233 #ifdef DEBUG_SLEEP 234 int pmu_polled_request(struct adb_request *req); 235 void pmu_blink(int n); 236 #endif 237 238 /* 239 * This table indicates for each PMU opcode: 240 * - the number of data bytes to be sent with the command, or -1 241 * if a length byte should be sent, 242 * - the number of response bytes which the PMU will return, or 243 * -1 if it will send a length byte. 244 */ 245 static const s8 pmu_data_len[256][2] = { 246 /* 0 1 2 3 4 5 6 7 */ 247 /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 248 /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 249 /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 250 /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0}, 251 /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0}, 252 /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1}, 253 /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 254 /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0}, 255 /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 256 /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1}, 257 /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0}, 258 /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1}, 259 /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 260 /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1}, 261 /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 262 /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1}, 263 /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 264 /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 265 /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 266 /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 267 /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0}, 268 /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 269 /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 270 /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 271 /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 272 /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 273 /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 274 /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1}, 275 /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0}, 276 /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0}, 277 /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 278 /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 279 }; 280 281 static char *pbook_type[] = { 282 "Unknown PowerBook", 283 "PowerBook 2400/3400/3500(G3)", 284 "PowerBook G3 Series", 285 "1999 PowerBook G3", 286 "Core99" 287 }; 288 289 int __init find_via_pmu(void) 290 { 291 #ifdef CONFIG_PPC_PMAC 292 u64 taddr; 293 const u32 *reg; 294 295 if (pmu_state != uninitialized) 296 return 1; 297 vias = of_find_node_by_name(NULL, "via-pmu"); 298 if (vias == NULL) 299 return 0; 300 301 reg = of_get_property(vias, "reg", NULL); 302 if (reg == NULL) { 303 printk(KERN_ERR "via-pmu: No \"reg\" property !\n"); 304 goto fail; 305 } 306 taddr = of_translate_address(vias, reg); 307 if (taddr == OF_BAD_ADDR) { 308 printk(KERN_ERR "via-pmu: Can't translate address !\n"); 309 goto fail; 310 } 311 312 spin_lock_init(&pmu_lock); 313 314 pmu_has_adb = 1; 315 316 pmu_intr_mask = PMU_INT_PCEJECT | 317 PMU_INT_SNDBRT | 318 PMU_INT_ADB | 319 PMU_INT_TICK; 320 321 if (of_node_name_eq(vias->parent, "ohare") || 322 of_device_is_compatible(vias->parent, "ohare")) 323 pmu_kind = PMU_OHARE_BASED; 324 else if (of_device_is_compatible(vias->parent, "paddington")) 325 pmu_kind = PMU_PADDINGTON_BASED; 326 else if (of_device_is_compatible(vias->parent, "heathrow")) 327 pmu_kind = PMU_HEATHROW_BASED; 328 else if (of_device_is_compatible(vias->parent, "Keylargo") 329 || of_device_is_compatible(vias->parent, "K2-Keylargo")) { 330 struct device_node *gpiop; 331 struct device_node *adbp; 332 u64 gaddr = OF_BAD_ADDR; 333 334 pmu_kind = PMU_KEYLARGO_BASED; 335 adbp = of_find_node_by_type(NULL, "adb"); 336 pmu_has_adb = (adbp != NULL); 337 of_node_put(adbp); 338 pmu_intr_mask = PMU_INT_PCEJECT | 339 PMU_INT_SNDBRT | 340 PMU_INT_ADB | 341 PMU_INT_TICK | 342 PMU_INT_ENVIRONMENT; 343 344 gpiop = of_find_node_by_name(NULL, "gpio"); 345 if (gpiop) { 346 reg = of_get_property(gpiop, "reg", NULL); 347 if (reg) 348 gaddr = of_translate_address(gpiop, reg); 349 if (gaddr != OF_BAD_ADDR) 350 gpio_reg = ioremap(gaddr, 0x10); 351 of_node_put(gpiop); 352 } 353 if (gpio_reg == NULL) { 354 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n"); 355 goto fail; 356 } 357 } else 358 pmu_kind = PMU_UNKNOWN; 359 360 via1 = via2 = ioremap(taddr, 0x2000); 361 if (via1 == NULL) { 362 printk(KERN_ERR "via-pmu: Can't map address !\n"); 363 goto fail_via_remap; 364 } 365 366 out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */ 367 out_8(&via1[IFR], 0x7f); /* clear IFR */ 368 369 pmu_state = idle; 370 371 if (!init_pmu()) 372 goto fail_init; 373 374 sys_ctrler = SYS_CTRLER_PMU; 375 376 return 1; 377 378 fail_init: 379 iounmap(via1); 380 via1 = via2 = NULL; 381 fail_via_remap: 382 iounmap(gpio_reg); 383 gpio_reg = NULL; 384 fail: 385 of_node_put(vias); 386 vias = NULL; 387 pmu_state = uninitialized; 388 return 0; 389 #else 390 if (macintosh_config->adb_type != MAC_ADB_PB2) 391 return 0; 392 393 pmu_kind = PMU_UNKNOWN; 394 395 spin_lock_init(&pmu_lock); 396 397 pmu_has_adb = 1; 398 399 pmu_intr_mask = PMU_INT_PCEJECT | 400 PMU_INT_SNDBRT | 401 PMU_INT_ADB | 402 PMU_INT_TICK; 403 404 pmu_state = idle; 405 406 if (!init_pmu()) { 407 pmu_state = uninitialized; 408 return 0; 409 } 410 411 return 1; 412 #endif /* !CONFIG_PPC_PMAC */ 413 } 414 415 #ifdef CONFIG_ADB 416 static int pmu_probe(void) 417 { 418 return pmu_state == uninitialized ? -ENODEV : 0; 419 } 420 421 static int pmu_init(void) 422 { 423 return pmu_state == uninitialized ? -ENODEV : 0; 424 } 425 #endif /* CONFIG_ADB */ 426 427 /* 428 * We can't wait until pmu_init gets called, that happens too late. 429 * It happens after IDE and SCSI initialization, which can take a few 430 * seconds, and by that time the PMU could have given up on us and 431 * turned us off. 432 * Thus this is called with arch_initcall rather than device_initcall. 433 */ 434 static int __init via_pmu_start(void) 435 { 436 unsigned int __maybe_unused irq; 437 438 if (pmu_state == uninitialized) 439 return -ENODEV; 440 441 batt_req.complete = 1; 442 443 #ifdef CONFIG_PPC_PMAC 444 irq = irq_of_parse_and_map(vias, 0); 445 if (!irq) { 446 printk(KERN_ERR "via-pmu: can't map interrupt\n"); 447 return -ENODEV; 448 } 449 /* We set IRQF_NO_SUSPEND because we don't want the interrupt 450 * to be disabled between the 2 passes of driver suspend, we 451 * control our own disabling for that one 452 */ 453 if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND, 454 "VIA-PMU", (void *)0)) { 455 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq); 456 return -ENODEV; 457 } 458 459 if (pmu_kind == PMU_KEYLARGO_BASED) { 460 gpio_node = of_find_node_by_name(NULL, "extint-gpio1"); 461 if (gpio_node == NULL) 462 gpio_node = of_find_node_by_name(NULL, 463 "pmu-interrupt"); 464 if (gpio_node) 465 gpio_irq = irq_of_parse_and_map(gpio_node, 0); 466 467 if (gpio_irq) { 468 if (request_irq(gpio_irq, gpio1_interrupt, 469 IRQF_NO_SUSPEND, "GPIO1 ADB", 470 (void *)0)) 471 printk(KERN_ERR "pmu: can't get irq %d" 472 " (GPIO1)\n", gpio_irq); 473 else 474 gpio_irq_enabled = 1; 475 } 476 } 477 478 /* Enable interrupts */ 479 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT); 480 #else 481 if (request_irq(IRQ_MAC_ADB_SR, via_pmu_interrupt, IRQF_NO_SUSPEND, 482 "VIA-PMU-SR", NULL)) { 483 pr_err("%s: couldn't get SR irq\n", __func__); 484 return -ENODEV; 485 } 486 if (request_irq(IRQ_MAC_ADB_CL, via_pmu_interrupt, IRQF_NO_SUSPEND, 487 "VIA-PMU-CL", NULL)) { 488 pr_err("%s: couldn't get CL irq\n", __func__); 489 free_irq(IRQ_MAC_ADB_SR, NULL); 490 return -ENODEV; 491 } 492 #endif /* !CONFIG_PPC_PMAC */ 493 494 pmu_fully_inited = 1; 495 496 /* Make sure PMU settle down before continuing. This is _very_ important 497 * since the IDE probe may shut interrupts down for quite a bit of time. If 498 * a PMU communication is pending while this happens, the PMU may timeout 499 * Not that on Core99 machines, the PMU keeps sending us environement 500 * messages, we should find a way to either fix IDE or make it call 501 * pmu_suspend() before masking interrupts. This can also happens while 502 * scolling with some fbdevs. 503 */ 504 do { 505 pmu_poll(); 506 } while (pmu_state != idle); 507 508 return 0; 509 } 510 511 arch_initcall(via_pmu_start); 512 513 /* 514 * This has to be done after pci_init, which is a subsys_initcall. 515 */ 516 static int __init via_pmu_dev_init(void) 517 { 518 if (pmu_state == uninitialized) 519 return -ENODEV; 520 521 #ifdef CONFIG_PMAC_BACKLIGHT 522 /* Initialize backlight */ 523 pmu_backlight_init(); 524 #endif 525 526 #ifdef CONFIG_PPC32 527 if (of_machine_is_compatible("AAPL,3400/2400") || 528 of_machine_is_compatible("AAPL,3500")) { 529 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, 530 NULL, PMAC_MB_INFO_MODEL, 0); 531 pmu_battery_count = 1; 532 if (mb == PMAC_TYPE_COMET) 533 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET; 534 else 535 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER; 536 } else if (of_machine_is_compatible("AAPL,PowerBook1998") || 537 of_machine_is_compatible("PowerBook1,1")) { 538 pmu_battery_count = 2; 539 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; 540 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; 541 } else { 542 struct device_node* prim = 543 of_find_node_by_name(NULL, "power-mgt"); 544 const u32 *prim_info = NULL; 545 if (prim) 546 prim_info = of_get_property(prim, "prim-info", NULL); 547 if (prim_info) { 548 /* Other stuffs here yet unknown */ 549 pmu_battery_count = (prim_info[6] >> 16) & 0xff; 550 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; 551 if (pmu_battery_count > 1) 552 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; 553 } 554 of_node_put(prim); 555 } 556 #endif /* CONFIG_PPC32 */ 557 558 /* Create /proc/pmu */ 559 proc_pmu_root = proc_mkdir("pmu", NULL); 560 if (proc_pmu_root) { 561 long i; 562 563 for (i=0; i<pmu_battery_count; i++) { 564 char title[16]; 565 sprintf(title, "battery_%ld", i); 566 proc_pmu_batt[i] = proc_create_single_data(title, 0, 567 proc_pmu_root, pmu_battery_proc_show, 568 (void *)i); 569 } 570 571 proc_pmu_info = proc_create_single("info", 0, proc_pmu_root, 572 pmu_info_proc_show); 573 proc_pmu_irqstats = proc_create_single("interrupts", 0, 574 proc_pmu_root, pmu_irqstats_proc_show); 575 proc_pmu_options = proc_create("options", 0600, proc_pmu_root, 576 &pmu_options_proc_ops); 577 } 578 return 0; 579 } 580 581 device_initcall(via_pmu_dev_init); 582 583 static int 584 init_pmu(void) 585 { 586 int timeout; 587 struct adb_request req; 588 589 /* Negate TREQ. Set TACK to input and TREQ to output. */ 590 out_8(&via2[B], in_8(&via2[B]) | TREQ); 591 out_8(&via2[DIRB], (in_8(&via2[DIRB]) | TREQ) & ~TACK); 592 593 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); 594 timeout = 100000; 595 while (!req.complete) { 596 if (--timeout < 0) { 597 printk(KERN_ERR "init_pmu: no response from PMU\n"); 598 return 0; 599 } 600 udelay(10); 601 pmu_poll(); 602 } 603 604 /* ack all pending interrupts */ 605 timeout = 100000; 606 interrupt_data[0][0] = 1; 607 while (interrupt_data[0][0] || pmu_state != idle) { 608 if (--timeout < 0) { 609 printk(KERN_ERR "init_pmu: timed out acking intrs\n"); 610 return 0; 611 } 612 if (pmu_state == idle) 613 adb_int_pending = 1; 614 via_pmu_interrupt(0, NULL); 615 udelay(10); 616 } 617 618 /* Tell PMU we are ready. */ 619 if (pmu_kind == PMU_KEYLARGO_BASED) { 620 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); 621 while (!req.complete) 622 pmu_poll(); 623 } 624 625 /* Read PMU version */ 626 pmu_request(&req, NULL, 1, PMU_GET_VERSION); 627 pmu_wait_complete(&req); 628 if (req.reply_len > 0) 629 pmu_version = req.reply[0]; 630 631 /* Read server mode setting */ 632 if (pmu_kind == PMU_KEYLARGO_BASED) { 633 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, 634 PMU_PWR_GET_POWERUP_EVENTS); 635 pmu_wait_complete(&req); 636 if (req.reply_len == 2) { 637 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT) 638 option_server_mode = 1; 639 printk(KERN_INFO "via-pmu: Server Mode is %s\n", 640 option_server_mode ? "enabled" : "disabled"); 641 } 642 } 643 644 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n", 645 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version); 646 647 return 1; 648 } 649 650 int 651 pmu_get_model(void) 652 { 653 return pmu_kind; 654 } 655 656 static void pmu_set_server_mode(int server_mode) 657 { 658 struct adb_request req; 659 660 if (pmu_kind != PMU_KEYLARGO_BASED) 661 return; 662 663 option_server_mode = server_mode; 664 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS); 665 pmu_wait_complete(&req); 666 if (req.reply_len < 2) 667 return; 668 if (server_mode) 669 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, 670 PMU_PWR_SET_POWERUP_EVENTS, 671 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); 672 else 673 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, 674 PMU_PWR_CLR_POWERUP_EVENTS, 675 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); 676 pmu_wait_complete(&req); 677 } 678 679 /* This new version of the code for 2400/3400/3500 powerbooks 680 * is inspired from the implementation in gkrellm-pmu 681 */ 682 static void 683 done_battery_state_ohare(struct adb_request* req) 684 { 685 #ifdef CONFIG_PPC_PMAC 686 /* format: 687 * [0] : flags 688 * 0x01 : AC indicator 689 * 0x02 : charging 690 * 0x04 : battery exist 691 * 0x08 : 692 * 0x10 : 693 * 0x20 : full charged 694 * 0x40 : pcharge reset 695 * 0x80 : battery exist 696 * 697 * [1][2] : battery voltage 698 * [3] : CPU temperature 699 * [4] : battery temperature 700 * [5] : current 701 * [6][7] : pcharge 702 * --tkoba 703 */ 704 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER; 705 long pcharge, charge, vb, vmax, lmax; 706 long vmax_charging, vmax_charged; 707 long amperage, voltage, time, max; 708 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, 709 NULL, PMAC_MB_INFO_MODEL, 0); 710 711 if (req->reply[0] & 0x01) 712 pmu_power_flags |= PMU_PWR_AC_PRESENT; 713 else 714 pmu_power_flags &= ~PMU_PWR_AC_PRESENT; 715 716 if (mb == PMAC_TYPE_COMET) { 717 vmax_charged = 189; 718 vmax_charging = 213; 719 lmax = 6500; 720 } else { 721 vmax_charged = 330; 722 vmax_charging = 330; 723 lmax = 6500; 724 } 725 vmax = vmax_charged; 726 727 /* If battery installed */ 728 if (req->reply[0] & 0x04) { 729 bat_flags |= PMU_BATT_PRESENT; 730 if (req->reply[0] & 0x02) 731 bat_flags |= PMU_BATT_CHARGING; 732 vb = (req->reply[1] << 8) | req->reply[2]; 733 voltage = (vb * 265 + 72665) / 10; 734 amperage = req->reply[5]; 735 if ((req->reply[0] & 0x01) == 0) { 736 if (amperage > 200) 737 vb += ((amperage - 200) * 15)/100; 738 } else if (req->reply[0] & 0x02) { 739 vb = (vb * 97) / 100; 740 vmax = vmax_charging; 741 } 742 charge = (100 * vb) / vmax; 743 if (req->reply[0] & 0x40) { 744 pcharge = (req->reply[6] << 8) + req->reply[7]; 745 if (pcharge > lmax) 746 pcharge = lmax; 747 pcharge *= 100; 748 pcharge = 100 - pcharge / lmax; 749 if (pcharge < charge) 750 charge = pcharge; 751 } 752 if (amperage > 0) 753 time = (charge * 16440) / amperage; 754 else 755 time = 0; 756 max = 100; 757 amperage = -amperage; 758 } else 759 charge = max = amperage = voltage = time = 0; 760 761 pmu_batteries[pmu_cur_battery].flags = bat_flags; 762 pmu_batteries[pmu_cur_battery].charge = charge; 763 pmu_batteries[pmu_cur_battery].max_charge = max; 764 pmu_batteries[pmu_cur_battery].amperage = amperage; 765 pmu_batteries[pmu_cur_battery].voltage = voltage; 766 pmu_batteries[pmu_cur_battery].time_remaining = time; 767 #endif /* CONFIG_PPC_PMAC */ 768 769 clear_bit(0, &async_req_locks); 770 } 771 772 static void 773 done_battery_state_smart(struct adb_request* req) 774 { 775 /* format: 776 * [0] : format of this structure (known: 3,4,5) 777 * [1] : flags 778 * 779 * format 3 & 4: 780 * 781 * [2] : charge 782 * [3] : max charge 783 * [4] : current 784 * [5] : voltage 785 * 786 * format 5: 787 * 788 * [2][3] : charge 789 * [4][5] : max charge 790 * [6][7] : current 791 * [8][9] : voltage 792 */ 793 794 unsigned int bat_flags = PMU_BATT_TYPE_SMART; 795 int amperage; 796 unsigned int capa, max, voltage; 797 798 if (req->reply[1] & 0x01) 799 pmu_power_flags |= PMU_PWR_AC_PRESENT; 800 else 801 pmu_power_flags &= ~PMU_PWR_AC_PRESENT; 802 803 804 capa = max = amperage = voltage = 0; 805 806 if (req->reply[1] & 0x04) { 807 bat_flags |= PMU_BATT_PRESENT; 808 switch(req->reply[0]) { 809 case 3: 810 case 4: capa = req->reply[2]; 811 max = req->reply[3]; 812 amperage = *((signed char *)&req->reply[4]); 813 voltage = req->reply[5]; 814 break; 815 case 5: capa = (req->reply[2] << 8) | req->reply[3]; 816 max = (req->reply[4] << 8) | req->reply[5]; 817 amperage = *((signed short *)&req->reply[6]); 818 voltage = (req->reply[8] << 8) | req->reply[9]; 819 break; 820 default: 821 pr_warn("pmu.c: unrecognized battery info, " 822 "len: %d, %4ph\n", req->reply_len, 823 req->reply); 824 break; 825 } 826 } 827 828 if ((req->reply[1] & 0x01) && (amperage > 0)) 829 bat_flags |= PMU_BATT_CHARGING; 830 831 pmu_batteries[pmu_cur_battery].flags = bat_flags; 832 pmu_batteries[pmu_cur_battery].charge = capa; 833 pmu_batteries[pmu_cur_battery].max_charge = max; 834 pmu_batteries[pmu_cur_battery].amperage = amperage; 835 pmu_batteries[pmu_cur_battery].voltage = voltage; 836 if (amperage) { 837 if ((req->reply[1] & 0x01) && (amperage > 0)) 838 pmu_batteries[pmu_cur_battery].time_remaining 839 = ((max-capa) * 3600) / amperage; 840 else 841 pmu_batteries[pmu_cur_battery].time_remaining 842 = (capa * 3600) / (-amperage); 843 } else 844 pmu_batteries[pmu_cur_battery].time_remaining = 0; 845 846 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count; 847 848 clear_bit(0, &async_req_locks); 849 } 850 851 static void 852 query_battery_state(void) 853 { 854 if (test_and_set_bit(0, &async_req_locks)) 855 return; 856 if (pmu_kind == PMU_OHARE_BASED) 857 pmu_request(&batt_req, done_battery_state_ohare, 858 1, PMU_BATTERY_STATE); 859 else 860 pmu_request(&batt_req, done_battery_state_smart, 861 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1); 862 } 863 864 static int pmu_info_proc_show(struct seq_file *m, void *v) 865 { 866 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION); 867 seq_printf(m, "PMU firmware version : %02x\n", pmu_version); 868 seq_printf(m, "AC Power : %d\n", 869 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0); 870 seq_printf(m, "Battery count : %d\n", pmu_battery_count); 871 872 return 0; 873 } 874 875 static int pmu_irqstats_proc_show(struct seq_file *m, void *v) 876 { 877 int i; 878 static const char *irq_names[NUM_IRQ_STATS] = { 879 "Unknown interrupt (type 0)", 880 "Unknown interrupt (type 1)", 881 "PC-Card eject button", 882 "Sound/Brightness button", 883 "ADB message", 884 "Battery state change", 885 "Environment interrupt", 886 "Tick timer", 887 "Ghost interrupt (zero len)", 888 "Empty interrupt (empty mask)", 889 "Max irqs in a row", 890 "Total CB1 triggered events", 891 "Total GPIO1 triggered events", 892 }; 893 894 for (i = 0; i < NUM_IRQ_STATS; i++) { 895 seq_printf(m, " %2u: %10u (%s)\n", 896 i, pmu_irq_stats[i], irq_names[i]); 897 } 898 return 0; 899 } 900 901 static int pmu_battery_proc_show(struct seq_file *m, void *v) 902 { 903 long batnum = (long)m->private; 904 905 seq_putc(m, '\n'); 906 seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags); 907 seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge); 908 seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge); 909 seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage); 910 seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage); 911 seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining); 912 return 0; 913 } 914 915 static int pmu_options_proc_show(struct seq_file *m, void *v) 916 { 917 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) 918 if (pmu_kind == PMU_KEYLARGO_BASED && 919 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) 920 seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup); 921 #endif 922 if (pmu_kind == PMU_KEYLARGO_BASED) 923 seq_printf(m, "server_mode=%d\n", option_server_mode); 924 925 return 0; 926 } 927 928 static int pmu_options_proc_open(struct inode *inode, struct file *file) 929 { 930 return single_open(file, pmu_options_proc_show, NULL); 931 } 932 933 static ssize_t pmu_options_proc_write(struct file *file, 934 const char __user *buffer, size_t count, loff_t *pos) 935 { 936 char tmp[33]; 937 char *label, *val; 938 size_t fcount = count; 939 940 if (!count) 941 return -EINVAL; 942 if (count > 32) 943 count = 32; 944 if (copy_from_user(tmp, buffer, count)) 945 return -EFAULT; 946 tmp[count] = 0; 947 948 label = tmp; 949 while(*label == ' ') 950 label++; 951 val = label; 952 while(*val && (*val != '=')) { 953 if (*val == ' ') 954 *val = 0; 955 val++; 956 } 957 if ((*val) == 0) 958 return -EINVAL; 959 *(val++) = 0; 960 while(*val == ' ') 961 val++; 962 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) 963 if (pmu_kind == PMU_KEYLARGO_BASED && 964 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) 965 if (!strcmp(label, "lid_wakeup")) 966 option_lid_wakeup = ((*val) == '1'); 967 #endif 968 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) { 969 int new_value; 970 new_value = ((*val) == '1'); 971 if (new_value != option_server_mode) 972 pmu_set_server_mode(new_value); 973 } 974 return fcount; 975 } 976 977 static const struct proc_ops pmu_options_proc_ops = { 978 .proc_open = pmu_options_proc_open, 979 .proc_read = seq_read, 980 .proc_lseek = seq_lseek, 981 .proc_release = single_release, 982 .proc_write = pmu_options_proc_write, 983 }; 984 985 #ifdef CONFIG_ADB 986 /* Send an ADB command */ 987 static int pmu_send_request(struct adb_request *req, int sync) 988 { 989 int i, ret; 990 991 if (pmu_state == uninitialized || !pmu_fully_inited) { 992 req->complete = 1; 993 return -ENXIO; 994 } 995 996 ret = -EINVAL; 997 998 switch (req->data[0]) { 999 case PMU_PACKET: 1000 for (i = 0; i < req->nbytes - 1; ++i) 1001 req->data[i] = req->data[i+1]; 1002 --req->nbytes; 1003 if (pmu_data_len[req->data[0]][1] != 0) { 1004 req->reply[0] = ADB_RET_OK; 1005 req->reply_len = 1; 1006 } else 1007 req->reply_len = 0; 1008 ret = pmu_queue_request(req); 1009 break; 1010 case CUDA_PACKET: 1011 switch (req->data[1]) { 1012 case CUDA_GET_TIME: 1013 if (req->nbytes != 2) 1014 break; 1015 req->data[0] = PMU_READ_RTC; 1016 req->nbytes = 1; 1017 req->reply_len = 3; 1018 req->reply[0] = CUDA_PACKET; 1019 req->reply[1] = 0; 1020 req->reply[2] = CUDA_GET_TIME; 1021 ret = pmu_queue_request(req); 1022 break; 1023 case CUDA_SET_TIME: 1024 if (req->nbytes != 6) 1025 break; 1026 req->data[0] = PMU_SET_RTC; 1027 req->nbytes = 5; 1028 for (i = 1; i <= 4; ++i) 1029 req->data[i] = req->data[i+1]; 1030 req->reply_len = 3; 1031 req->reply[0] = CUDA_PACKET; 1032 req->reply[1] = 0; 1033 req->reply[2] = CUDA_SET_TIME; 1034 ret = pmu_queue_request(req); 1035 break; 1036 } 1037 break; 1038 case ADB_PACKET: 1039 if (!pmu_has_adb) 1040 return -ENXIO; 1041 for (i = req->nbytes - 1; i > 1; --i) 1042 req->data[i+2] = req->data[i]; 1043 req->data[3] = req->nbytes - 2; 1044 req->data[2] = pmu_adb_flags; 1045 /*req->data[1] = req->data[1];*/ 1046 req->data[0] = PMU_ADB_CMD; 1047 req->nbytes += 2; 1048 req->reply_expected = 1; 1049 req->reply_len = 0; 1050 ret = pmu_queue_request(req); 1051 break; 1052 } 1053 if (ret) { 1054 req->complete = 1; 1055 return ret; 1056 } 1057 1058 if (sync) 1059 while (!req->complete) 1060 pmu_poll(); 1061 1062 return 0; 1063 } 1064 1065 /* Enable/disable autopolling */ 1066 static int __pmu_adb_autopoll(int devs) 1067 { 1068 struct adb_request req; 1069 1070 if (devs) { 1071 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86, 1072 adb_dev_map >> 8, adb_dev_map); 1073 pmu_adb_flags = 2; 1074 } else { 1075 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF); 1076 pmu_adb_flags = 0; 1077 } 1078 while (!req.complete) 1079 pmu_poll(); 1080 return 0; 1081 } 1082 1083 static int pmu_adb_autopoll(int devs) 1084 { 1085 if (pmu_state == uninitialized || !pmu_fully_inited || !pmu_has_adb) 1086 return -ENXIO; 1087 1088 adb_dev_map = devs; 1089 return __pmu_adb_autopoll(devs); 1090 } 1091 1092 /* Reset the ADB bus */ 1093 static int pmu_adb_reset_bus(void) 1094 { 1095 struct adb_request req; 1096 int save_autopoll = adb_dev_map; 1097 1098 if (pmu_state == uninitialized || !pmu_fully_inited || !pmu_has_adb) 1099 return -ENXIO; 1100 1101 /* anyone got a better idea?? */ 1102 __pmu_adb_autopoll(0); 1103 1104 req.nbytes = 4; 1105 req.done = NULL; 1106 req.data[0] = PMU_ADB_CMD; 1107 req.data[1] = ADB_BUSRESET; 1108 req.data[2] = 0; 1109 req.data[3] = 0; 1110 req.data[4] = 0; 1111 req.reply_len = 0; 1112 req.reply_expected = 1; 1113 if (pmu_queue_request(&req) != 0) { 1114 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n"); 1115 return -EIO; 1116 } 1117 pmu_wait_complete(&req); 1118 1119 if (save_autopoll != 0) 1120 __pmu_adb_autopoll(save_autopoll); 1121 1122 return 0; 1123 } 1124 #endif /* CONFIG_ADB */ 1125 1126 /* Construct and send a pmu request */ 1127 int 1128 pmu_request(struct adb_request *req, void (*done)(struct adb_request *), 1129 int nbytes, ...) 1130 { 1131 va_list list; 1132 int i; 1133 1134 if (pmu_state == uninitialized) 1135 return -ENXIO; 1136 1137 if (nbytes < 0 || nbytes > 32) { 1138 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes); 1139 req->complete = 1; 1140 return -EINVAL; 1141 } 1142 req->nbytes = nbytes; 1143 req->done = done; 1144 va_start(list, nbytes); 1145 for (i = 0; i < nbytes; ++i) 1146 req->data[i] = va_arg(list, int); 1147 va_end(list); 1148 req->reply_len = 0; 1149 req->reply_expected = 0; 1150 return pmu_queue_request(req); 1151 } 1152 1153 int 1154 pmu_queue_request(struct adb_request *req) 1155 { 1156 unsigned long flags; 1157 int nsend; 1158 1159 if (pmu_state == uninitialized) { 1160 req->complete = 1; 1161 return -ENXIO; 1162 } 1163 if (req->nbytes <= 0) { 1164 req->complete = 1; 1165 return 0; 1166 } 1167 nsend = pmu_data_len[req->data[0]][0]; 1168 if (nsend >= 0 && req->nbytes != nsend + 1) { 1169 req->complete = 1; 1170 return -EINVAL; 1171 } 1172 1173 req->next = NULL; 1174 req->sent = 0; 1175 req->complete = 0; 1176 1177 spin_lock_irqsave(&pmu_lock, flags); 1178 if (current_req) { 1179 last_req->next = req; 1180 last_req = req; 1181 } else { 1182 current_req = req; 1183 last_req = req; 1184 if (pmu_state == idle) 1185 pmu_start(); 1186 } 1187 spin_unlock_irqrestore(&pmu_lock, flags); 1188 1189 return 0; 1190 } 1191 1192 static inline void 1193 wait_for_ack(void) 1194 { 1195 /* Sightly increased the delay, I had one occurrence of the message 1196 * reported 1197 */ 1198 int timeout = 4000; 1199 while ((in_8(&via2[B]) & TACK) == 0) { 1200 if (--timeout < 0) { 1201 printk(KERN_ERR "PMU not responding (!ack)\n"); 1202 return; 1203 } 1204 udelay(10); 1205 } 1206 } 1207 1208 /* New PMU seems to be very sensitive to those timings, so we make sure 1209 * PCI is flushed immediately */ 1210 static inline void 1211 send_byte(int x) 1212 { 1213 out_8(&via1[ACR], in_8(&via1[ACR]) | SR_OUT | SR_EXT); 1214 out_8(&via1[SR], x); 1215 out_8(&via2[B], in_8(&via2[B]) & ~TREQ); /* assert TREQ */ 1216 (void)in_8(&via2[B]); 1217 } 1218 1219 static inline void 1220 recv_byte(void) 1221 { 1222 out_8(&via1[ACR], (in_8(&via1[ACR]) & ~SR_OUT) | SR_EXT); 1223 in_8(&via1[SR]); /* resets SR */ 1224 out_8(&via2[B], in_8(&via2[B]) & ~TREQ); 1225 (void)in_8(&via2[B]); 1226 } 1227 1228 static inline void 1229 pmu_done(struct adb_request *req) 1230 { 1231 void (*done)(struct adb_request *) = req->done; 1232 mb(); 1233 req->complete = 1; 1234 /* Here, we assume that if the request has a done member, the 1235 * struct request will survive to setting req->complete to 1 1236 */ 1237 if (done) 1238 (*done)(req); 1239 } 1240 1241 static void 1242 pmu_start(void) 1243 { 1244 struct adb_request *req; 1245 1246 /* assert pmu_state == idle */ 1247 /* get the packet to send */ 1248 req = current_req; 1249 if (!req || pmu_state != idle 1250 || (/*req->reply_expected && */req_awaiting_reply)) 1251 return; 1252 1253 pmu_state = sending; 1254 data_index = 1; 1255 data_len = pmu_data_len[req->data[0]][0]; 1256 1257 /* Sounds safer to make sure ACK is high before writing. This helped 1258 * kill a problem with ADB and some iBooks 1259 */ 1260 wait_for_ack(); 1261 /* set the shift register to shift out and send a byte */ 1262 send_byte(req->data[0]); 1263 } 1264 1265 void 1266 pmu_poll(void) 1267 { 1268 if (pmu_state == uninitialized) 1269 return; 1270 if (disable_poll) 1271 return; 1272 via_pmu_interrupt(0, NULL); 1273 } 1274 1275 void 1276 pmu_poll_adb(void) 1277 { 1278 if (pmu_state == uninitialized) 1279 return; 1280 if (disable_poll) 1281 return; 1282 /* Kicks ADB read when PMU is suspended */ 1283 adb_int_pending = 1; 1284 do { 1285 via_pmu_interrupt(0, NULL); 1286 } while (pmu_suspended && (adb_int_pending || pmu_state != idle 1287 || req_awaiting_reply)); 1288 } 1289 1290 void 1291 pmu_wait_complete(struct adb_request *req) 1292 { 1293 if (pmu_state == uninitialized) 1294 return; 1295 while((pmu_state != idle && pmu_state != locked) || !req->complete) 1296 via_pmu_interrupt(0, NULL); 1297 } 1298 1299 /* This function loops until the PMU is idle and prevents it from 1300 * anwsering to ADB interrupts. pmu_request can still be called. 1301 * This is done to avoid spurrious shutdowns when we know we'll have 1302 * interrupts switched off for a long time 1303 */ 1304 void 1305 pmu_suspend(void) 1306 { 1307 unsigned long flags; 1308 1309 if (pmu_state == uninitialized) 1310 return; 1311 1312 spin_lock_irqsave(&pmu_lock, flags); 1313 pmu_suspended++; 1314 if (pmu_suspended > 1) { 1315 spin_unlock_irqrestore(&pmu_lock, flags); 1316 return; 1317 } 1318 1319 do { 1320 spin_unlock_irqrestore(&pmu_lock, flags); 1321 if (req_awaiting_reply) 1322 adb_int_pending = 1; 1323 via_pmu_interrupt(0, NULL); 1324 spin_lock_irqsave(&pmu_lock, flags); 1325 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) { 1326 if (gpio_irq >= 0) 1327 disable_irq_nosync(gpio_irq); 1328 out_8(&via1[IER], CB1_INT | IER_CLR); 1329 spin_unlock_irqrestore(&pmu_lock, flags); 1330 break; 1331 } 1332 } while (1); 1333 } 1334 1335 void 1336 pmu_resume(void) 1337 { 1338 unsigned long flags; 1339 1340 if (pmu_state == uninitialized || pmu_suspended < 1) 1341 return; 1342 1343 spin_lock_irqsave(&pmu_lock, flags); 1344 pmu_suspended--; 1345 if (pmu_suspended > 0) { 1346 spin_unlock_irqrestore(&pmu_lock, flags); 1347 return; 1348 } 1349 adb_int_pending = 1; 1350 if (gpio_irq >= 0) 1351 enable_irq(gpio_irq); 1352 out_8(&via1[IER], CB1_INT | IER_SET); 1353 spin_unlock_irqrestore(&pmu_lock, flags); 1354 pmu_poll(); 1355 } 1356 1357 /* Interrupt data could be the result data from an ADB cmd */ 1358 static void 1359 pmu_handle_data(unsigned char *data, int len) 1360 { 1361 unsigned char ints; 1362 int idx; 1363 int i = 0; 1364 1365 asleep = 0; 1366 if (drop_interrupts || len < 1) { 1367 adb_int_pending = 0; 1368 pmu_irq_stats[8]++; 1369 return; 1370 } 1371 1372 /* Get PMU interrupt mask */ 1373 ints = data[0]; 1374 1375 /* Record zero interrupts for stats */ 1376 if (ints == 0) 1377 pmu_irq_stats[9]++; 1378 1379 /* Hack to deal with ADB autopoll flag */ 1380 if (ints & PMU_INT_ADB) 1381 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL); 1382 1383 next: 1384 if (ints == 0) { 1385 if (i > pmu_irq_stats[10]) 1386 pmu_irq_stats[10] = i; 1387 return; 1388 } 1389 i++; 1390 1391 idx = ffs(ints) - 1; 1392 ints &= ~BIT(idx); 1393 1394 pmu_irq_stats[idx]++; 1395 1396 /* Note: for some reason, we get an interrupt with len=1, 1397 * data[0]==0 after each normal ADB interrupt, at least 1398 * on the Pismo. Still investigating... --BenH 1399 */ 1400 switch (BIT(idx)) { 1401 case PMU_INT_ADB: 1402 if ((data[0] & PMU_INT_ADB_AUTO) == 0) { 1403 struct adb_request *req = req_awaiting_reply; 1404 if (!req) { 1405 printk(KERN_ERR "PMU: extra ADB reply\n"); 1406 return; 1407 } 1408 req_awaiting_reply = NULL; 1409 if (len <= 2) 1410 req->reply_len = 0; 1411 else { 1412 memcpy(req->reply, data + 1, len - 1); 1413 req->reply_len = len - 1; 1414 } 1415 pmu_done(req); 1416 } else { 1417 #ifdef CONFIG_XMON 1418 if (len == 4 && data[1] == 0x2c) { 1419 extern int xmon_wants_key, xmon_adb_keycode; 1420 if (xmon_wants_key) { 1421 xmon_adb_keycode = data[2]; 1422 return; 1423 } 1424 } 1425 #endif /* CONFIG_XMON */ 1426 #ifdef CONFIG_ADB 1427 /* 1428 * XXX On the [23]400 the PMU gives us an up 1429 * event for keycodes 0x74 or 0x75 when the PC 1430 * card eject buttons are released, so we 1431 * ignore those events. 1432 */ 1433 if (!(pmu_kind == PMU_OHARE_BASED && len == 4 1434 && data[1] == 0x2c && data[3] == 0xff 1435 && (data[2] & ~1) == 0xf4)) 1436 adb_input(data+1, len-1, 1); 1437 #endif /* CONFIG_ADB */ 1438 } 1439 break; 1440 1441 /* Sound/brightness button pressed */ 1442 case PMU_INT_SNDBRT: 1443 #ifdef CONFIG_PMAC_BACKLIGHT 1444 if (len == 3) 1445 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4); 1446 #endif 1447 break; 1448 1449 /* Tick interrupt */ 1450 case PMU_INT_TICK: 1451 /* Environment or tick interrupt, query batteries */ 1452 if (pmu_battery_count) { 1453 if ((--query_batt_timer) == 0) { 1454 query_battery_state(); 1455 query_batt_timer = BATTERY_POLLING_COUNT; 1456 } 1457 } 1458 break; 1459 1460 case PMU_INT_ENVIRONMENT: 1461 if (pmu_battery_count) 1462 query_battery_state(); 1463 pmu_pass_intr(data, len); 1464 /* len == 6 is probably a bad check. But how do I 1465 * know what PMU versions send what events here? */ 1466 if (len == 6) { 1467 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8)); 1468 via_pmu_event(PMU_EVT_LID, data[1]&1); 1469 } 1470 break; 1471 1472 default: 1473 pmu_pass_intr(data, len); 1474 } 1475 goto next; 1476 } 1477 1478 static struct adb_request* 1479 pmu_sr_intr(void) 1480 { 1481 struct adb_request *req; 1482 int bite = 0; 1483 1484 if (in_8(&via2[B]) & TREQ) { 1485 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", in_8(&via2[B])); 1486 return NULL; 1487 } 1488 /* The ack may not yet be low when we get the interrupt */ 1489 while ((in_8(&via2[B]) & TACK) != 0) 1490 ; 1491 1492 /* if reading grab the byte, and reset the interrupt */ 1493 if (pmu_state == reading || pmu_state == reading_intr) 1494 bite = in_8(&via1[SR]); 1495 1496 /* reset TREQ and wait for TACK to go high */ 1497 out_8(&via2[B], in_8(&via2[B]) | TREQ); 1498 wait_for_ack(); 1499 1500 switch (pmu_state) { 1501 case sending: 1502 req = current_req; 1503 if (data_len < 0) { 1504 data_len = req->nbytes - 1; 1505 send_byte(data_len); 1506 break; 1507 } 1508 if (data_index <= data_len) { 1509 send_byte(req->data[data_index++]); 1510 break; 1511 } 1512 req->sent = 1; 1513 data_len = pmu_data_len[req->data[0]][1]; 1514 if (data_len == 0) { 1515 pmu_state = idle; 1516 current_req = req->next; 1517 if (req->reply_expected) 1518 req_awaiting_reply = req; 1519 else 1520 return req; 1521 } else { 1522 pmu_state = reading; 1523 data_index = 0; 1524 reply_ptr = req->reply + req->reply_len; 1525 recv_byte(); 1526 } 1527 break; 1528 1529 case intack: 1530 data_index = 0; 1531 data_len = -1; 1532 pmu_state = reading_intr; 1533 reply_ptr = interrupt_data[int_data_last]; 1534 recv_byte(); 1535 if (gpio_irq >= 0 && !gpio_irq_enabled) { 1536 enable_irq(gpio_irq); 1537 gpio_irq_enabled = 1; 1538 } 1539 break; 1540 1541 case reading: 1542 case reading_intr: 1543 if (data_len == -1) { 1544 data_len = bite; 1545 if (bite > 32) 1546 printk(KERN_ERR "PMU: bad reply len %d\n", bite); 1547 } else if (data_index < 32) { 1548 reply_ptr[data_index++] = bite; 1549 } 1550 if (data_index < data_len) { 1551 recv_byte(); 1552 break; 1553 } 1554 1555 if (pmu_state == reading_intr) { 1556 pmu_state = idle; 1557 int_data_state[int_data_last] = int_data_ready; 1558 interrupt_data_len[int_data_last] = data_len; 1559 } else { 1560 req = current_req; 1561 /* 1562 * For PMU sleep and freq change requests, we lock the 1563 * PMU until it's explicitly unlocked. This avoids any 1564 * spurrious event polling getting in 1565 */ 1566 current_req = req->next; 1567 req->reply_len += data_index; 1568 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED) 1569 pmu_state = locked; 1570 else 1571 pmu_state = idle; 1572 return req; 1573 } 1574 break; 1575 1576 default: 1577 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n", 1578 pmu_state); 1579 } 1580 return NULL; 1581 } 1582 1583 static irqreturn_t 1584 via_pmu_interrupt(int irq, void *arg) 1585 { 1586 unsigned long flags; 1587 int intr; 1588 int nloop = 0; 1589 int int_data = -1; 1590 struct adb_request *req = NULL; 1591 int handled = 0; 1592 1593 /* This is a bit brutal, we can probably do better */ 1594 spin_lock_irqsave(&pmu_lock, flags); 1595 ++disable_poll; 1596 1597 for (;;) { 1598 /* On 68k Macs, VIA interrupts are dispatched individually. 1599 * Unless we are polling, the relevant IRQ flag has already 1600 * been cleared. 1601 */ 1602 intr = 0; 1603 if (IS_ENABLED(CONFIG_PPC_PMAC) || !irq) { 1604 intr = in_8(&via1[IFR]) & (SR_INT | CB1_INT); 1605 out_8(&via1[IFR], intr); 1606 } 1607 #ifndef CONFIG_PPC_PMAC 1608 switch (irq) { 1609 case IRQ_MAC_ADB_CL: 1610 intr = CB1_INT; 1611 break; 1612 case IRQ_MAC_ADB_SR: 1613 intr = SR_INT; 1614 break; 1615 } 1616 #endif 1617 if (intr == 0) 1618 break; 1619 handled = 1; 1620 if (++nloop > 1000) { 1621 printk(KERN_DEBUG "PMU: stuck in intr loop, " 1622 "intr=%x, ier=%x pmu_state=%d\n", 1623 intr, in_8(&via1[IER]), pmu_state); 1624 break; 1625 } 1626 if (intr & CB1_INT) { 1627 adb_int_pending = 1; 1628 pmu_irq_stats[11]++; 1629 } 1630 if (intr & SR_INT) { 1631 req = pmu_sr_intr(); 1632 if (req) 1633 break; 1634 } 1635 #ifndef CONFIG_PPC_PMAC 1636 break; 1637 #endif 1638 } 1639 1640 recheck: 1641 if (pmu_state == idle) { 1642 if (adb_int_pending) { 1643 if (int_data_state[0] == int_data_empty) 1644 int_data_last = 0; 1645 else if (int_data_state[1] == int_data_empty) 1646 int_data_last = 1; 1647 else 1648 goto no_free_slot; 1649 pmu_state = intack; 1650 int_data_state[int_data_last] = int_data_fill; 1651 /* Sounds safer to make sure ACK is high before writing. 1652 * This helped kill a problem with ADB and some iBooks 1653 */ 1654 wait_for_ack(); 1655 send_byte(PMU_INT_ACK); 1656 adb_int_pending = 0; 1657 } else if (current_req) 1658 pmu_start(); 1659 } 1660 no_free_slot: 1661 /* Mark the oldest buffer for flushing */ 1662 if (int_data_state[!int_data_last] == int_data_ready) { 1663 int_data_state[!int_data_last] = int_data_flush; 1664 int_data = !int_data_last; 1665 } else if (int_data_state[int_data_last] == int_data_ready) { 1666 int_data_state[int_data_last] = int_data_flush; 1667 int_data = int_data_last; 1668 } 1669 --disable_poll; 1670 spin_unlock_irqrestore(&pmu_lock, flags); 1671 1672 /* Deal with completed PMU requests outside of the lock */ 1673 if (req) { 1674 pmu_done(req); 1675 req = NULL; 1676 } 1677 1678 /* Deal with interrupt datas outside of the lock */ 1679 if (int_data >= 0) { 1680 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]); 1681 spin_lock_irqsave(&pmu_lock, flags); 1682 ++disable_poll; 1683 int_data_state[int_data] = int_data_empty; 1684 int_data = -1; 1685 goto recheck; 1686 } 1687 1688 return IRQ_RETVAL(handled); 1689 } 1690 1691 void 1692 pmu_unlock(void) 1693 { 1694 unsigned long flags; 1695 1696 spin_lock_irqsave(&pmu_lock, flags); 1697 if (pmu_state == locked) 1698 pmu_state = idle; 1699 adb_int_pending = 1; 1700 spin_unlock_irqrestore(&pmu_lock, flags); 1701 } 1702 1703 1704 static __maybe_unused irqreturn_t 1705 gpio1_interrupt(int irq, void *arg) 1706 { 1707 unsigned long flags; 1708 1709 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) { 1710 spin_lock_irqsave(&pmu_lock, flags); 1711 if (gpio_irq_enabled > 0) { 1712 disable_irq_nosync(gpio_irq); 1713 gpio_irq_enabled = 0; 1714 } 1715 pmu_irq_stats[12]++; 1716 adb_int_pending = 1; 1717 spin_unlock_irqrestore(&pmu_lock, flags); 1718 via_pmu_interrupt(0, NULL); 1719 return IRQ_HANDLED; 1720 } 1721 return IRQ_NONE; 1722 } 1723 1724 void 1725 pmu_enable_irled(int on) 1726 { 1727 struct adb_request req; 1728 1729 if (pmu_state == uninitialized) 1730 return ; 1731 if (pmu_kind == PMU_KEYLARGO_BASED) 1732 return ; 1733 1734 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED | 1735 (on ? PMU_POW_ON : PMU_POW_OFF)); 1736 pmu_wait_complete(&req); 1737 } 1738 1739 /* Offset between Unix time (1970-based) and Mac time (1904-based) */ 1740 #define RTC_OFFSET 2082844800 1741 1742 time64_t pmu_get_time(void) 1743 { 1744 struct adb_request req; 1745 u32 now; 1746 1747 if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0) 1748 return 0; 1749 pmu_wait_complete(&req); 1750 if (req.reply_len != 4) 1751 pr_err("%s: got %d byte reply\n", __func__, req.reply_len); 1752 now = (req.reply[0] << 24) + (req.reply[1] << 16) + 1753 (req.reply[2] << 8) + req.reply[3]; 1754 return (time64_t)now - RTC_OFFSET; 1755 } 1756 1757 int pmu_set_rtc_time(struct rtc_time *tm) 1758 { 1759 u32 now; 1760 struct adb_request req; 1761 1762 now = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET); 1763 if (pmu_request(&req, NULL, 5, PMU_SET_RTC, 1764 now >> 24, now >> 16, now >> 8, now) < 0) 1765 return -ENXIO; 1766 pmu_wait_complete(&req); 1767 if (req.reply_len != 0) 1768 pr_err("%s: got %d byte reply\n", __func__, req.reply_len); 1769 return 0; 1770 } 1771 1772 void 1773 pmu_restart(void) 1774 { 1775 struct adb_request req; 1776 1777 if (pmu_state == uninitialized) 1778 return; 1779 1780 local_irq_disable(); 1781 1782 drop_interrupts = 1; 1783 1784 if (pmu_kind != PMU_KEYLARGO_BASED) { 1785 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | 1786 PMU_INT_TICK ); 1787 while(!req.complete) 1788 pmu_poll(); 1789 } 1790 1791 pmu_request(&req, NULL, 1, PMU_RESET); 1792 pmu_wait_complete(&req); 1793 for (;;) 1794 ; 1795 } 1796 1797 void 1798 pmu_shutdown(void) 1799 { 1800 struct adb_request req; 1801 1802 if (pmu_state == uninitialized) 1803 return; 1804 1805 local_irq_disable(); 1806 1807 drop_interrupts = 1; 1808 1809 if (pmu_kind != PMU_KEYLARGO_BASED) { 1810 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | 1811 PMU_INT_TICK ); 1812 pmu_wait_complete(&req); 1813 } else { 1814 /* Disable server mode on shutdown or we'll just 1815 * wake up again 1816 */ 1817 pmu_set_server_mode(0); 1818 } 1819 1820 pmu_request(&req, NULL, 5, PMU_SHUTDOWN, 1821 'M', 'A', 'T', 'T'); 1822 pmu_wait_complete(&req); 1823 for (;;) 1824 ; 1825 } 1826 1827 int 1828 pmu_present(void) 1829 { 1830 return pmu_state != uninitialized; 1831 } 1832 1833 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) 1834 /* 1835 * Put the powerbook to sleep. 1836 */ 1837 1838 static u32 save_via[8]; 1839 1840 static void 1841 save_via_state(void) 1842 { 1843 save_via[0] = in_8(&via1[ANH]); 1844 save_via[1] = in_8(&via1[DIRA]); 1845 save_via[2] = in_8(&via1[B]); 1846 save_via[3] = in_8(&via1[DIRB]); 1847 save_via[4] = in_8(&via1[PCR]); 1848 save_via[5] = in_8(&via1[ACR]); 1849 save_via[6] = in_8(&via1[T1CL]); 1850 save_via[7] = in_8(&via1[T1CH]); 1851 } 1852 static void 1853 restore_via_state(void) 1854 { 1855 out_8(&via1[ANH], save_via[0]); 1856 out_8(&via1[DIRA], save_via[1]); 1857 out_8(&via1[B], save_via[2]); 1858 out_8(&via1[DIRB], save_via[3]); 1859 out_8(&via1[PCR], save_via[4]); 1860 out_8(&via1[ACR], save_via[5]); 1861 out_8(&via1[T1CL], save_via[6]); 1862 out_8(&via1[T1CH], save_via[7]); 1863 out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */ 1864 out_8(&via1[IFR], 0x7f); /* clear IFR */ 1865 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT); 1866 } 1867 1868 #define GRACKLE_PM (1<<7) 1869 #define GRACKLE_DOZE (1<<5) 1870 #define GRACKLE_NAP (1<<4) 1871 #define GRACKLE_SLEEP (1<<3) 1872 1873 static int powerbook_sleep_grackle(void) 1874 { 1875 unsigned long save_l2cr; 1876 unsigned short pmcr1; 1877 struct adb_request req; 1878 struct pci_dev *grackle; 1879 1880 grackle = pci_get_domain_bus_and_slot(0, 0, 0); 1881 if (!grackle) 1882 return -ENODEV; 1883 1884 /* Turn off various things. Darwin does some retry tests here... */ 1885 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE); 1886 pmu_wait_complete(&req); 1887 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, 1888 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY); 1889 pmu_wait_complete(&req); 1890 1891 /* For 750, save backside cache setting and disable it */ 1892 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ 1893 1894 if (!__fake_sleep) { 1895 /* Ask the PMU to put us to sleep */ 1896 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); 1897 pmu_wait_complete(&req); 1898 } 1899 1900 /* The VIA is supposed not to be restored correctly*/ 1901 save_via_state(); 1902 /* We shut down some HW */ 1903 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1); 1904 1905 pci_read_config_word(grackle, 0x70, &pmcr1); 1906 /* Apparently, MacOS uses NAP mode for Grackle ??? */ 1907 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP); 1908 pmcr1 |= GRACKLE_PM|GRACKLE_NAP; 1909 pci_write_config_word(grackle, 0x70, pmcr1); 1910 1911 /* Call low-level ASM sleep handler */ 1912 if (__fake_sleep) 1913 mdelay(5000); 1914 else 1915 low_sleep_handler(); 1916 1917 /* We're awake again, stop grackle PM */ 1918 pci_read_config_word(grackle, 0x70, &pmcr1); 1919 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP); 1920 pci_write_config_word(grackle, 0x70, pmcr1); 1921 1922 pci_dev_put(grackle); 1923 1924 /* Make sure the PMU is idle */ 1925 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0); 1926 restore_via_state(); 1927 1928 /* Restore L2 cache */ 1929 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) 1930 _set_L2CR(save_l2cr); 1931 1932 /* Restore userland MMU context */ 1933 switch_mmu_context(NULL, current->active_mm, NULL); 1934 1935 /* Power things up */ 1936 pmu_unlock(); 1937 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); 1938 pmu_wait_complete(&req); 1939 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, 1940 PMU_POW0_ON|PMU_POW0_HARD_DRIVE); 1941 pmu_wait_complete(&req); 1942 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, 1943 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY); 1944 pmu_wait_complete(&req); 1945 1946 return 0; 1947 } 1948 1949 static int 1950 powerbook_sleep_Core99(void) 1951 { 1952 unsigned long save_l2cr; 1953 unsigned long save_l3cr; 1954 struct adb_request req; 1955 1956 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) { 1957 printk(KERN_ERR "Sleep mode not supported on this machine\n"); 1958 return -ENOSYS; 1959 } 1960 1961 if (num_online_cpus() > 1 || cpu_is_offline(0)) 1962 return -EAGAIN; 1963 1964 /* Stop environment and ADB interrupts */ 1965 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0); 1966 pmu_wait_complete(&req); 1967 1968 /* Tell PMU what events will wake us up */ 1969 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS, 1970 0xff, 0xff); 1971 pmu_wait_complete(&req); 1972 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS, 1973 0, PMU_PWR_WAKEUP_KEY | 1974 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0)); 1975 pmu_wait_complete(&req); 1976 1977 /* Save the state of the L2 and L3 caches */ 1978 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ 1979 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ 1980 1981 if (!__fake_sleep) { 1982 /* Ask the PMU to put us to sleep */ 1983 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); 1984 pmu_wait_complete(&req); 1985 } 1986 1987 /* The VIA is supposed not to be restored correctly*/ 1988 save_via_state(); 1989 1990 /* Shut down various ASICs. There's a chance that we can no longer 1991 * talk to the PMU after this, so I moved it to _after_ sending the 1992 * sleep command to it. Still need to be checked. 1993 */ 1994 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1); 1995 1996 /* Call low-level ASM sleep handler */ 1997 if (__fake_sleep) 1998 mdelay(5000); 1999 else 2000 low_sleep_handler(); 2001 2002 /* Restore Apple core ASICs state */ 2003 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0); 2004 2005 /* Restore VIA */ 2006 restore_via_state(); 2007 2008 /* tweak LPJ before cpufreq is there */ 2009 loops_per_jiffy *= 2; 2010 2011 /* Restore video */ 2012 pmac_call_early_video_resume(); 2013 2014 /* Restore L2 cache */ 2015 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) 2016 _set_L2CR(save_l2cr); 2017 /* Restore L3 cache */ 2018 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0) 2019 _set_L3CR(save_l3cr); 2020 2021 /* Restore userland MMU context */ 2022 switch_mmu_context(NULL, current->active_mm, NULL); 2023 2024 /* Tell PMU we are ready */ 2025 pmu_unlock(); 2026 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); 2027 pmu_wait_complete(&req); 2028 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); 2029 pmu_wait_complete(&req); 2030 2031 /* Restore LPJ, cpufreq will adjust the cpu frequency */ 2032 loops_per_jiffy /= 2; 2033 2034 return 0; 2035 } 2036 2037 #define PB3400_MEM_CTRL 0xf8000000 2038 #define PB3400_MEM_CTRL_SLEEP 0x70 2039 2040 static void __iomem *pb3400_mem_ctrl; 2041 2042 static void powerbook_sleep_init_3400(void) 2043 { 2044 /* map in the memory controller registers */ 2045 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100); 2046 if (pb3400_mem_ctrl == NULL) 2047 printk(KERN_WARNING "ioremap failed: sleep won't be possible"); 2048 } 2049 2050 static int powerbook_sleep_3400(void) 2051 { 2052 int i, x; 2053 unsigned int hid0; 2054 unsigned long msr; 2055 struct adb_request sleep_req; 2056 unsigned int __iomem *mem_ctrl_sleep; 2057 2058 if (pb3400_mem_ctrl == NULL) 2059 return -ENOMEM; 2060 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP; 2061 2062 /* Set the memory controller to keep the memory refreshed 2063 while we're asleep */ 2064 for (i = 0x403f; i >= 0x4000; --i) { 2065 out_be32(mem_ctrl_sleep, i); 2066 do { 2067 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff; 2068 } while (x == 0); 2069 if (x >= 0x100) 2070 break; 2071 } 2072 2073 /* Ask the PMU to put us to sleep */ 2074 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); 2075 pmu_wait_complete(&sleep_req); 2076 pmu_unlock(); 2077 2078 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1); 2079 2080 asleep = 1; 2081 2082 /* Put the CPU into sleep mode */ 2083 hid0 = mfspr(SPRN_HID0); 2084 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP; 2085 mtspr(SPRN_HID0, hid0); 2086 local_irq_enable(); 2087 msr = mfmsr() | MSR_POW; 2088 while (asleep) { 2089 mb(); 2090 mtmsr(msr); 2091 isync(); 2092 } 2093 local_irq_disable(); 2094 2095 /* OK, we're awake again, start restoring things */ 2096 out_be32(mem_ctrl_sleep, 0x3f); 2097 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0); 2098 2099 return 0; 2100 } 2101 2102 #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */ 2103 2104 /* 2105 * Support for /dev/pmu device 2106 */ 2107 #define RB_SIZE 0x10 2108 struct pmu_private { 2109 struct list_head list; 2110 int rb_get; 2111 int rb_put; 2112 struct rb_entry { 2113 unsigned short len; 2114 unsigned char data[16]; 2115 } rb_buf[RB_SIZE]; 2116 wait_queue_head_t wait; 2117 spinlock_t lock; 2118 #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) 2119 int backlight_locker; 2120 #endif 2121 }; 2122 2123 static LIST_HEAD(all_pmu_pvt); 2124 static DEFINE_SPINLOCK(all_pvt_lock); 2125 2126 static void 2127 pmu_pass_intr(unsigned char *data, int len) 2128 { 2129 struct pmu_private *pp; 2130 struct list_head *list; 2131 int i; 2132 unsigned long flags; 2133 2134 if (len > sizeof(pp->rb_buf[0].data)) 2135 len = sizeof(pp->rb_buf[0].data); 2136 spin_lock_irqsave(&all_pvt_lock, flags); 2137 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) { 2138 pp = list_entry(list, struct pmu_private, list); 2139 spin_lock(&pp->lock); 2140 i = pp->rb_put + 1; 2141 if (i >= RB_SIZE) 2142 i = 0; 2143 if (i != pp->rb_get) { 2144 struct rb_entry *rp = &pp->rb_buf[pp->rb_put]; 2145 rp->len = len; 2146 memcpy(rp->data, data, len); 2147 pp->rb_put = i; 2148 wake_up_interruptible(&pp->wait); 2149 } 2150 spin_unlock(&pp->lock); 2151 } 2152 spin_unlock_irqrestore(&all_pvt_lock, flags); 2153 } 2154 2155 static int 2156 pmu_open(struct inode *inode, struct file *file) 2157 { 2158 struct pmu_private *pp; 2159 unsigned long flags; 2160 2161 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL); 2162 if (!pp) 2163 return -ENOMEM; 2164 pp->rb_get = pp->rb_put = 0; 2165 spin_lock_init(&pp->lock); 2166 init_waitqueue_head(&pp->wait); 2167 mutex_lock(&pmu_info_proc_mutex); 2168 spin_lock_irqsave(&all_pvt_lock, flags); 2169 #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) 2170 pp->backlight_locker = 0; 2171 #endif 2172 list_add(&pp->list, &all_pmu_pvt); 2173 spin_unlock_irqrestore(&all_pvt_lock, flags); 2174 file->private_data = pp; 2175 mutex_unlock(&pmu_info_proc_mutex); 2176 return 0; 2177 } 2178 2179 static ssize_t 2180 pmu_read(struct file *file, char __user *buf, 2181 size_t count, loff_t *ppos) 2182 { 2183 struct pmu_private *pp = file->private_data; 2184 DECLARE_WAITQUEUE(wait, current); 2185 unsigned long flags; 2186 int ret = 0; 2187 2188 if (count < 1 || !pp) 2189 return -EINVAL; 2190 if (!access_ok(buf, count)) 2191 return -EFAULT; 2192 2193 spin_lock_irqsave(&pp->lock, flags); 2194 add_wait_queue(&pp->wait, &wait); 2195 set_current_state(TASK_INTERRUPTIBLE); 2196 2197 for (;;) { 2198 ret = -EAGAIN; 2199 if (pp->rb_get != pp->rb_put) { 2200 int i = pp->rb_get; 2201 struct rb_entry *rp = &pp->rb_buf[i]; 2202 ret = rp->len; 2203 spin_unlock_irqrestore(&pp->lock, flags); 2204 if (ret > count) 2205 ret = count; 2206 if (ret > 0 && copy_to_user(buf, rp->data, ret)) 2207 ret = -EFAULT; 2208 if (++i >= RB_SIZE) 2209 i = 0; 2210 spin_lock_irqsave(&pp->lock, flags); 2211 pp->rb_get = i; 2212 } 2213 if (ret >= 0) 2214 break; 2215 if (file->f_flags & O_NONBLOCK) 2216 break; 2217 ret = -ERESTARTSYS; 2218 if (signal_pending(current)) 2219 break; 2220 spin_unlock_irqrestore(&pp->lock, flags); 2221 schedule(); 2222 spin_lock_irqsave(&pp->lock, flags); 2223 } 2224 __set_current_state(TASK_RUNNING); 2225 remove_wait_queue(&pp->wait, &wait); 2226 spin_unlock_irqrestore(&pp->lock, flags); 2227 2228 return ret; 2229 } 2230 2231 static ssize_t 2232 pmu_write(struct file *file, const char __user *buf, 2233 size_t count, loff_t *ppos) 2234 { 2235 return 0; 2236 } 2237 2238 static __poll_t 2239 pmu_fpoll(struct file *filp, poll_table *wait) 2240 { 2241 struct pmu_private *pp = filp->private_data; 2242 __poll_t mask = 0; 2243 unsigned long flags; 2244 2245 if (!pp) 2246 return 0; 2247 poll_wait(filp, &pp->wait, wait); 2248 spin_lock_irqsave(&pp->lock, flags); 2249 if (pp->rb_get != pp->rb_put) 2250 mask |= EPOLLIN; 2251 spin_unlock_irqrestore(&pp->lock, flags); 2252 return mask; 2253 } 2254 2255 static int 2256 pmu_release(struct inode *inode, struct file *file) 2257 { 2258 struct pmu_private *pp = file->private_data; 2259 unsigned long flags; 2260 2261 if (pp) { 2262 file->private_data = NULL; 2263 spin_lock_irqsave(&all_pvt_lock, flags); 2264 list_del(&pp->list); 2265 spin_unlock_irqrestore(&all_pvt_lock, flags); 2266 2267 #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) 2268 if (pp->backlight_locker) 2269 pmac_backlight_enable(); 2270 #endif 2271 2272 kfree(pp); 2273 } 2274 return 0; 2275 } 2276 2277 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) 2278 static void pmac_suspend_disable_irqs(void) 2279 { 2280 /* Call platform functions marked "on sleep" */ 2281 pmac_pfunc_i2c_suspend(); 2282 pmac_pfunc_base_suspend(); 2283 } 2284 2285 static int powerbook_sleep(suspend_state_t state) 2286 { 2287 int error = 0; 2288 2289 /* Wait for completion of async requests */ 2290 while (!batt_req.complete) 2291 pmu_poll(); 2292 2293 /* Giveup the lazy FPU & vec so we don't have to back them 2294 * up from the low level code 2295 */ 2296 enable_kernel_fp(); 2297 2298 #ifdef CONFIG_ALTIVEC 2299 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2300 enable_kernel_altivec(); 2301 #endif /* CONFIG_ALTIVEC */ 2302 2303 switch (pmu_kind) { 2304 case PMU_OHARE_BASED: 2305 error = powerbook_sleep_3400(); 2306 break; 2307 case PMU_HEATHROW_BASED: 2308 case PMU_PADDINGTON_BASED: 2309 error = powerbook_sleep_grackle(); 2310 break; 2311 case PMU_KEYLARGO_BASED: 2312 error = powerbook_sleep_Core99(); 2313 break; 2314 default: 2315 return -ENOSYS; 2316 } 2317 2318 if (error) 2319 return error; 2320 2321 mdelay(100); 2322 2323 return 0; 2324 } 2325 2326 static void pmac_suspend_enable_irqs(void) 2327 { 2328 /* Force a poll of ADB interrupts */ 2329 adb_int_pending = 1; 2330 via_pmu_interrupt(0, NULL); 2331 2332 mdelay(10); 2333 2334 /* Call platform functions marked "on wake" */ 2335 pmac_pfunc_base_resume(); 2336 pmac_pfunc_i2c_resume(); 2337 } 2338 2339 static int pmu_sleep_valid(suspend_state_t state) 2340 { 2341 return state == PM_SUSPEND_MEM 2342 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0); 2343 } 2344 2345 static const struct platform_suspend_ops pmu_pm_ops = { 2346 .enter = powerbook_sleep, 2347 .valid = pmu_sleep_valid, 2348 }; 2349 2350 static int register_pmu_pm_ops(void) 2351 { 2352 if (pmu_kind == PMU_OHARE_BASED) 2353 powerbook_sleep_init_3400(); 2354 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs; 2355 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs; 2356 suspend_set_ops(&pmu_pm_ops); 2357 2358 return 0; 2359 } 2360 2361 device_initcall(register_pmu_pm_ops); 2362 #endif 2363 2364 static int pmu_ioctl(struct file *filp, 2365 u_int cmd, u_long arg) 2366 { 2367 __u32 __user *argp = (__u32 __user *)arg; 2368 int error = -EINVAL; 2369 2370 switch (cmd) { 2371 #ifdef CONFIG_PPC_PMAC 2372 case PMU_IOC_SLEEP: 2373 if (!capable(CAP_SYS_ADMIN)) 2374 return -EACCES; 2375 return pm_suspend(PM_SUSPEND_MEM); 2376 case PMU_IOC_CAN_SLEEP: 2377 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0) 2378 return put_user(0, argp); 2379 else 2380 return put_user(1, argp); 2381 #endif 2382 2383 #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY 2384 /* Compatibility ioctl's for backlight */ 2385 case PMU_IOC_GET_BACKLIGHT: 2386 { 2387 int brightness; 2388 2389 brightness = pmac_backlight_get_legacy_brightness(); 2390 if (brightness < 0) 2391 return brightness; 2392 else 2393 return put_user(brightness, argp); 2394 2395 } 2396 case PMU_IOC_SET_BACKLIGHT: 2397 { 2398 int brightness; 2399 2400 error = get_user(brightness, argp); 2401 if (error) 2402 return error; 2403 2404 return pmac_backlight_set_legacy_brightness(brightness); 2405 } 2406 #ifdef CONFIG_INPUT_ADBHID 2407 case PMU_IOC_GRAB_BACKLIGHT: { 2408 struct pmu_private *pp = filp->private_data; 2409 2410 if (pp->backlight_locker) 2411 return 0; 2412 2413 pp->backlight_locker = 1; 2414 pmac_backlight_disable(); 2415 2416 return 0; 2417 } 2418 #endif /* CONFIG_INPUT_ADBHID */ 2419 #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */ 2420 2421 case PMU_IOC_GET_MODEL: 2422 return put_user(pmu_kind, argp); 2423 case PMU_IOC_HAS_ADB: 2424 return put_user(pmu_has_adb, argp); 2425 } 2426 return error; 2427 } 2428 2429 static long pmu_unlocked_ioctl(struct file *filp, 2430 u_int cmd, u_long arg) 2431 { 2432 int ret; 2433 2434 mutex_lock(&pmu_info_proc_mutex); 2435 ret = pmu_ioctl(filp, cmd, arg); 2436 mutex_unlock(&pmu_info_proc_mutex); 2437 2438 return ret; 2439 } 2440 2441 #ifdef CONFIG_COMPAT 2442 #define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t) 2443 #define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t) 2444 #define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t) 2445 #define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t) 2446 #define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t) 2447 #define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t) 2448 2449 static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg) 2450 { 2451 switch (cmd) { 2452 case PMU_IOC_SLEEP: 2453 break; 2454 case PMU_IOC_GET_BACKLIGHT32: 2455 cmd = PMU_IOC_GET_BACKLIGHT; 2456 break; 2457 case PMU_IOC_SET_BACKLIGHT32: 2458 cmd = PMU_IOC_SET_BACKLIGHT; 2459 break; 2460 case PMU_IOC_GET_MODEL32: 2461 cmd = PMU_IOC_GET_MODEL; 2462 break; 2463 case PMU_IOC_HAS_ADB32: 2464 cmd = PMU_IOC_HAS_ADB; 2465 break; 2466 case PMU_IOC_CAN_SLEEP32: 2467 cmd = PMU_IOC_CAN_SLEEP; 2468 break; 2469 case PMU_IOC_GRAB_BACKLIGHT32: 2470 cmd = PMU_IOC_GRAB_BACKLIGHT; 2471 break; 2472 default: 2473 return -ENOIOCTLCMD; 2474 } 2475 return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg)); 2476 } 2477 #endif 2478 2479 static const struct file_operations pmu_device_fops = { 2480 .read = pmu_read, 2481 .write = pmu_write, 2482 .poll = pmu_fpoll, 2483 .unlocked_ioctl = pmu_unlocked_ioctl, 2484 #ifdef CONFIG_COMPAT 2485 .compat_ioctl = compat_pmu_ioctl, 2486 #endif 2487 .open = pmu_open, 2488 .release = pmu_release, 2489 .llseek = noop_llseek, 2490 }; 2491 2492 static struct miscdevice pmu_device = { 2493 PMU_MINOR, "pmu", &pmu_device_fops 2494 }; 2495 2496 static int pmu_device_init(void) 2497 { 2498 if (pmu_state == uninitialized) 2499 return 0; 2500 if (misc_register(&pmu_device) < 0) 2501 printk(KERN_ERR "via-pmu: cannot register misc device.\n"); 2502 return 0; 2503 } 2504 device_initcall(pmu_device_init); 2505 2506 2507 #ifdef DEBUG_SLEEP 2508 static inline void 2509 polled_handshake(void) 2510 { 2511 via2[B] &= ~TREQ; eieio(); 2512 while ((via2[B] & TACK) != 0) 2513 ; 2514 via2[B] |= TREQ; eieio(); 2515 while ((via2[B] & TACK) == 0) 2516 ; 2517 } 2518 2519 static inline void 2520 polled_send_byte(int x) 2521 { 2522 via1[ACR] |= SR_OUT | SR_EXT; eieio(); 2523 via1[SR] = x; eieio(); 2524 polled_handshake(); 2525 } 2526 2527 static inline int 2528 polled_recv_byte(void) 2529 { 2530 int x; 2531 2532 via1[ACR] = (via1[ACR] & ~SR_OUT) | SR_EXT; eieio(); 2533 x = via1[SR]; eieio(); 2534 polled_handshake(); 2535 x = via1[SR]; eieio(); 2536 return x; 2537 } 2538 2539 int 2540 pmu_polled_request(struct adb_request *req) 2541 { 2542 unsigned long flags; 2543 int i, l, c; 2544 2545 req->complete = 1; 2546 c = req->data[0]; 2547 l = pmu_data_len[c][0]; 2548 if (l >= 0 && req->nbytes != l + 1) 2549 return -EINVAL; 2550 2551 local_irq_save(flags); 2552 while (pmu_state != idle) 2553 pmu_poll(); 2554 2555 while ((via2[B] & TACK) == 0) 2556 ; 2557 polled_send_byte(c); 2558 if (l < 0) { 2559 l = req->nbytes - 1; 2560 polled_send_byte(l); 2561 } 2562 for (i = 1; i <= l; ++i) 2563 polled_send_byte(req->data[i]); 2564 2565 l = pmu_data_len[c][1]; 2566 if (l < 0) 2567 l = polled_recv_byte(); 2568 for (i = 0; i < l; ++i) 2569 req->reply[i + req->reply_len] = polled_recv_byte(); 2570 2571 if (req->done) 2572 (*req->done)(req); 2573 2574 local_irq_restore(flags); 2575 return 0; 2576 } 2577 2578 /* N.B. This doesn't work on the 3400 */ 2579 void pmu_blink(int n) 2580 { 2581 struct adb_request req; 2582 2583 memset(&req, 0, sizeof(req)); 2584 2585 for (; n > 0; --n) { 2586 req.nbytes = 4; 2587 req.done = NULL; 2588 req.data[0] = 0xee; 2589 req.data[1] = 4; 2590 req.data[2] = 0; 2591 req.data[3] = 1; 2592 req.reply[0] = ADB_RET_OK; 2593 req.reply_len = 1; 2594 req.reply_expected = 0; 2595 pmu_polled_request(&req); 2596 mdelay(50); 2597 req.nbytes = 4; 2598 req.done = NULL; 2599 req.data[0] = 0xee; 2600 req.data[1] = 4; 2601 req.data[2] = 0; 2602 req.data[3] = 0; 2603 req.reply[0] = ADB_RET_OK; 2604 req.reply_len = 1; 2605 req.reply_expected = 0; 2606 pmu_polled_request(&req); 2607 mdelay(50); 2608 } 2609 mdelay(50); 2610 } 2611 #endif /* DEBUG_SLEEP */ 2612 2613 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) 2614 int pmu_sys_suspended; 2615 2616 static int pmu_syscore_suspend(void) 2617 { 2618 /* Suspend PMU event interrupts */ 2619 pmu_suspend(); 2620 pmu_sys_suspended = 1; 2621 2622 #ifdef CONFIG_PMAC_BACKLIGHT 2623 /* Tell backlight code not to muck around with the chip anymore */ 2624 pmu_backlight_set_sleep(1); 2625 #endif 2626 2627 return 0; 2628 } 2629 2630 static void pmu_syscore_resume(void) 2631 { 2632 struct adb_request req; 2633 2634 if (!pmu_sys_suspended) 2635 return; 2636 2637 /* Tell PMU we are ready */ 2638 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); 2639 pmu_wait_complete(&req); 2640 2641 #ifdef CONFIG_PMAC_BACKLIGHT 2642 /* Tell backlight code it can use the chip again */ 2643 pmu_backlight_set_sleep(0); 2644 #endif 2645 /* Resume PMU event interrupts */ 2646 pmu_resume(); 2647 pmu_sys_suspended = 0; 2648 } 2649 2650 static struct syscore_ops pmu_syscore_ops = { 2651 .suspend = pmu_syscore_suspend, 2652 .resume = pmu_syscore_resume, 2653 }; 2654 2655 static int pmu_syscore_register(void) 2656 { 2657 register_syscore_ops(&pmu_syscore_ops); 2658 2659 return 0; 2660 } 2661 subsys_initcall(pmu_syscore_register); 2662 #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */ 2663 2664 EXPORT_SYMBOL(pmu_request); 2665 EXPORT_SYMBOL(pmu_queue_request); 2666 EXPORT_SYMBOL(pmu_poll); 2667 EXPORT_SYMBOL(pmu_poll_adb); 2668 EXPORT_SYMBOL(pmu_wait_complete); 2669 EXPORT_SYMBOL(pmu_suspend); 2670 EXPORT_SYMBOL(pmu_resume); 2671 EXPORT_SYMBOL(pmu_unlock); 2672 #if defined(CONFIG_PPC32) 2673 EXPORT_SYMBOL(pmu_enable_irled); 2674 EXPORT_SYMBOL(pmu_battery_count); 2675 EXPORT_SYMBOL(pmu_batteries); 2676 EXPORT_SYMBOL(pmu_power_flags); 2677 #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */ 2678 2679