1 /* 2 * Device driver for the via-pmu on Apple Powermacs. 3 * 4 * The VIA (versatile interface adapter) interfaces to the PMU, 5 * a 6805 microprocessor core whose primary function is to control 6 * battery charging and system power on the PowerBook 3400 and 2400. 7 * The PMU also controls the ADB (Apple Desktop Bus) which connects 8 * to the keyboard and mouse, as well as the non-volatile RAM 9 * and the RTC (real time clock) chip. 10 * 11 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi. 12 * Copyright (C) 2001-2002 Benjamin Herrenschmidt 13 * Copyright (C) 2006-2007 Johannes Berg 14 * 15 * THIS DRIVER IS BECOMING A TOTAL MESS ! 16 * - Cleanup atomically disabling reply to PMU events after 17 * a sleep or a freq. switch 18 * 19 */ 20 #include <stdarg.h> 21 #include <linux/mutex.h> 22 #include <linux/types.h> 23 #include <linux/errno.h> 24 #include <linux/kernel.h> 25 #include <linux/delay.h> 26 #include <linux/sched.h> 27 #include <linux/miscdevice.h> 28 #include <linux/blkdev.h> 29 #include <linux/pci.h> 30 #include <linux/slab.h> 31 #include <linux/poll.h> 32 #include <linux/adb.h> 33 #include <linux/pmu.h> 34 #include <linux/cuda.h> 35 #include <linux/module.h> 36 #include <linux/spinlock.h> 37 #include <linux/pm.h> 38 #include <linux/proc_fs.h> 39 #include <linux/seq_file.h> 40 #include <linux/init.h> 41 #include <linux/interrupt.h> 42 #include <linux/device.h> 43 #include <linux/syscore_ops.h> 44 #include <linux/freezer.h> 45 #include <linux/syscalls.h> 46 #include <linux/suspend.h> 47 #include <linux/cpu.h> 48 #include <linux/compat.h> 49 #include <asm/prom.h> 50 #include <asm/machdep.h> 51 #include <asm/io.h> 52 #include <asm/pgtable.h> 53 #include <asm/system.h> 54 #include <asm/sections.h> 55 #include <asm/irq.h> 56 #include <asm/pmac_feature.h> 57 #include <asm/pmac_pfunc.h> 58 #include <asm/pmac_low_i2c.h> 59 #include <asm/uaccess.h> 60 #include <asm/mmu_context.h> 61 #include <asm/cputable.h> 62 #include <asm/time.h> 63 #include <asm/backlight.h> 64 65 #include "via-pmu-event.h" 66 67 /* Some compile options */ 68 #undef DEBUG_SLEEP 69 70 /* Misc minor number allocated for /dev/pmu */ 71 #define PMU_MINOR 154 72 73 /* How many iterations between battery polls */ 74 #define BATTERY_POLLING_COUNT 2 75 76 static DEFINE_MUTEX(pmu_info_proc_mutex); 77 static volatile unsigned char __iomem *via; 78 79 /* VIA registers - spaced 0x200 bytes apart */ 80 #define RS 0x200 /* skip between registers */ 81 #define B 0 /* B-side data */ 82 #define A RS /* A-side data */ 83 #define DIRB (2*RS) /* B-side direction (1=output) */ 84 #define DIRA (3*RS) /* A-side direction (1=output) */ 85 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */ 86 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */ 87 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */ 88 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */ 89 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */ 90 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */ 91 #define SR (10*RS) /* Shift register */ 92 #define ACR (11*RS) /* Auxiliary control register */ 93 #define PCR (12*RS) /* Peripheral control register */ 94 #define IFR (13*RS) /* Interrupt flag register */ 95 #define IER (14*RS) /* Interrupt enable register */ 96 #define ANH (15*RS) /* A-side data, no handshake */ 97 98 /* Bits in B data register: both active low */ 99 #define TACK 0x08 /* Transfer acknowledge (input) */ 100 #define TREQ 0x10 /* Transfer request (output) */ 101 102 /* Bits in ACR */ 103 #define SR_CTRL 0x1c /* Shift register control bits */ 104 #define SR_EXT 0x0c /* Shift on external clock */ 105 #define SR_OUT 0x10 /* Shift out if 1 */ 106 107 /* Bits in IFR and IER */ 108 #define IER_SET 0x80 /* set bits in IER */ 109 #define IER_CLR 0 /* clear bits in IER */ 110 #define SR_INT 0x04 /* Shift register full/empty */ 111 #define CB2_INT 0x08 112 #define CB1_INT 0x10 /* transition on CB1 input */ 113 114 static volatile enum pmu_state { 115 idle, 116 sending, 117 intack, 118 reading, 119 reading_intr, 120 locked, 121 } pmu_state; 122 123 static volatile enum int_data_state { 124 int_data_empty, 125 int_data_fill, 126 int_data_ready, 127 int_data_flush 128 } int_data_state[2] = { int_data_empty, int_data_empty }; 129 130 static struct adb_request *current_req; 131 static struct adb_request *last_req; 132 static struct adb_request *req_awaiting_reply; 133 static unsigned char interrupt_data[2][32]; 134 static int interrupt_data_len[2]; 135 static int int_data_last; 136 static unsigned char *reply_ptr; 137 static int data_index; 138 static int data_len; 139 static volatile int adb_int_pending; 140 static volatile int disable_poll; 141 static struct device_node *vias; 142 static int pmu_kind = PMU_UNKNOWN; 143 static int pmu_fully_inited; 144 static int pmu_has_adb; 145 static struct device_node *gpio_node; 146 static unsigned char __iomem *gpio_reg; 147 static int gpio_irq = NO_IRQ; 148 static int gpio_irq_enabled = -1; 149 static volatile int pmu_suspended; 150 static spinlock_t pmu_lock; 151 static u8 pmu_intr_mask; 152 static int pmu_version; 153 static int drop_interrupts; 154 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) 155 static int option_lid_wakeup = 1; 156 #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */ 157 static unsigned long async_req_locks; 158 static unsigned int pmu_irq_stats[11]; 159 160 static struct proc_dir_entry *proc_pmu_root; 161 static struct proc_dir_entry *proc_pmu_info; 162 static struct proc_dir_entry *proc_pmu_irqstats; 163 static struct proc_dir_entry *proc_pmu_options; 164 static int option_server_mode; 165 166 int pmu_battery_count; 167 int pmu_cur_battery; 168 unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT; 169 struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES]; 170 static int query_batt_timer = BATTERY_POLLING_COUNT; 171 static struct adb_request batt_req; 172 static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES]; 173 174 int __fake_sleep; 175 int asleep; 176 177 #ifdef CONFIG_ADB 178 static int adb_dev_map; 179 static int pmu_adb_flags; 180 181 static int pmu_probe(void); 182 static int pmu_init(void); 183 static int pmu_send_request(struct adb_request *req, int sync); 184 static int pmu_adb_autopoll(int devs); 185 static int pmu_adb_reset_bus(void); 186 #endif /* CONFIG_ADB */ 187 188 static int init_pmu(void); 189 static void pmu_start(void); 190 static irqreturn_t via_pmu_interrupt(int irq, void *arg); 191 static irqreturn_t gpio1_interrupt(int irq, void *arg); 192 static const struct file_operations pmu_info_proc_fops; 193 static const struct file_operations pmu_irqstats_proc_fops; 194 static void pmu_pass_intr(unsigned char *data, int len); 195 static const struct file_operations pmu_battery_proc_fops; 196 static const struct file_operations pmu_options_proc_fops; 197 198 #ifdef CONFIG_ADB 199 struct adb_driver via_pmu_driver = { 200 "PMU", 201 pmu_probe, 202 pmu_init, 203 pmu_send_request, 204 pmu_adb_autopoll, 205 pmu_poll_adb, 206 pmu_adb_reset_bus 207 }; 208 #endif /* CONFIG_ADB */ 209 210 extern void low_sleep_handler(void); 211 extern void enable_kernel_altivec(void); 212 extern void enable_kernel_fp(void); 213 214 #ifdef DEBUG_SLEEP 215 int pmu_polled_request(struct adb_request *req); 216 void pmu_blink(int n); 217 #endif 218 219 /* 220 * This table indicates for each PMU opcode: 221 * - the number of data bytes to be sent with the command, or -1 222 * if a length byte should be sent, 223 * - the number of response bytes which the PMU will return, or 224 * -1 if it will send a length byte. 225 */ 226 static const s8 pmu_data_len[256][2] = { 227 /* 0 1 2 3 4 5 6 7 */ 228 /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 229 /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 230 /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 231 /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0}, 232 /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0}, 233 /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1}, 234 /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 235 /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0}, 236 /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 237 /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1}, 238 /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0}, 239 /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1}, 240 /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 241 /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1}, 242 /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 243 /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1}, 244 /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 245 /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 246 /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 247 /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 248 /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0}, 249 /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 250 /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 251 /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 252 /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 253 /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 254 /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 255 /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1}, 256 /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0}, 257 /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0}, 258 /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 259 /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, 260 }; 261 262 static char *pbook_type[] = { 263 "Unknown PowerBook", 264 "PowerBook 2400/3400/3500(G3)", 265 "PowerBook G3 Series", 266 "1999 PowerBook G3", 267 "Core99" 268 }; 269 270 int __init find_via_pmu(void) 271 { 272 u64 taddr; 273 const u32 *reg; 274 275 if (via != 0) 276 return 1; 277 vias = of_find_node_by_name(NULL, "via-pmu"); 278 if (vias == NULL) 279 return 0; 280 281 reg = of_get_property(vias, "reg", NULL); 282 if (reg == NULL) { 283 printk(KERN_ERR "via-pmu: No \"reg\" property !\n"); 284 goto fail; 285 } 286 taddr = of_translate_address(vias, reg); 287 if (taddr == OF_BAD_ADDR) { 288 printk(KERN_ERR "via-pmu: Can't translate address !\n"); 289 goto fail; 290 } 291 292 spin_lock_init(&pmu_lock); 293 294 pmu_has_adb = 1; 295 296 pmu_intr_mask = PMU_INT_PCEJECT | 297 PMU_INT_SNDBRT | 298 PMU_INT_ADB | 299 PMU_INT_TICK; 300 301 if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0) 302 || of_device_is_compatible(vias->parent, "ohare"))) 303 pmu_kind = PMU_OHARE_BASED; 304 else if (of_device_is_compatible(vias->parent, "paddington")) 305 pmu_kind = PMU_PADDINGTON_BASED; 306 else if (of_device_is_compatible(vias->parent, "heathrow")) 307 pmu_kind = PMU_HEATHROW_BASED; 308 else if (of_device_is_compatible(vias->parent, "Keylargo") 309 || of_device_is_compatible(vias->parent, "K2-Keylargo")) { 310 struct device_node *gpiop; 311 struct device_node *adbp; 312 u64 gaddr = OF_BAD_ADDR; 313 314 pmu_kind = PMU_KEYLARGO_BASED; 315 adbp = of_find_node_by_type(NULL, "adb"); 316 pmu_has_adb = (adbp != NULL); 317 of_node_put(adbp); 318 pmu_intr_mask = PMU_INT_PCEJECT | 319 PMU_INT_SNDBRT | 320 PMU_INT_ADB | 321 PMU_INT_TICK | 322 PMU_INT_ENVIRONMENT; 323 324 gpiop = of_find_node_by_name(NULL, "gpio"); 325 if (gpiop) { 326 reg = of_get_property(gpiop, "reg", NULL); 327 if (reg) 328 gaddr = of_translate_address(gpiop, reg); 329 if (gaddr != OF_BAD_ADDR) 330 gpio_reg = ioremap(gaddr, 0x10); 331 } 332 if (gpio_reg == NULL) { 333 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n"); 334 goto fail_gpio; 335 } 336 } else 337 pmu_kind = PMU_UNKNOWN; 338 339 via = ioremap(taddr, 0x2000); 340 if (via == NULL) { 341 printk(KERN_ERR "via-pmu: Can't map address !\n"); 342 goto fail; 343 } 344 345 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ 346 out_8(&via[IFR], 0x7f); /* clear IFR */ 347 348 pmu_state = idle; 349 350 if (!init_pmu()) { 351 via = NULL; 352 return 0; 353 } 354 355 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n", 356 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version); 357 358 sys_ctrler = SYS_CTRLER_PMU; 359 360 return 1; 361 fail: 362 of_node_put(vias); 363 iounmap(gpio_reg); 364 gpio_reg = NULL; 365 fail_gpio: 366 vias = NULL; 367 return 0; 368 } 369 370 #ifdef CONFIG_ADB 371 static int pmu_probe(void) 372 { 373 return vias == NULL? -ENODEV: 0; 374 } 375 376 static int __init pmu_init(void) 377 { 378 if (vias == NULL) 379 return -ENODEV; 380 return 0; 381 } 382 #endif /* CONFIG_ADB */ 383 384 /* 385 * We can't wait until pmu_init gets called, that happens too late. 386 * It happens after IDE and SCSI initialization, which can take a few 387 * seconds, and by that time the PMU could have given up on us and 388 * turned us off. 389 * Thus this is called with arch_initcall rather than device_initcall. 390 */ 391 static int __init via_pmu_start(void) 392 { 393 unsigned int irq; 394 395 if (vias == NULL) 396 return -ENODEV; 397 398 batt_req.complete = 1; 399 400 irq = irq_of_parse_and_map(vias, 0); 401 if (irq == NO_IRQ) { 402 printk(KERN_ERR "via-pmu: can't map interrupt\n"); 403 return -ENODEV; 404 } 405 /* We set IRQF_NO_SUSPEND because we don't want the interrupt 406 * to be disabled between the 2 passes of driver suspend, we 407 * control our own disabling for that one 408 */ 409 if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND, 410 "VIA-PMU", (void *)0)) { 411 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq); 412 return -ENODEV; 413 } 414 415 if (pmu_kind == PMU_KEYLARGO_BASED) { 416 gpio_node = of_find_node_by_name(NULL, "extint-gpio1"); 417 if (gpio_node == NULL) 418 gpio_node = of_find_node_by_name(NULL, 419 "pmu-interrupt"); 420 if (gpio_node) 421 gpio_irq = irq_of_parse_and_map(gpio_node, 0); 422 423 if (gpio_irq != NO_IRQ) { 424 if (request_irq(gpio_irq, gpio1_interrupt, IRQF_TIMER, 425 "GPIO1 ADB", (void *)0)) 426 printk(KERN_ERR "pmu: can't get irq %d" 427 " (GPIO1)\n", gpio_irq); 428 else 429 gpio_irq_enabled = 1; 430 } 431 } 432 433 /* Enable interrupts */ 434 out_8(&via[IER], IER_SET | SR_INT | CB1_INT); 435 436 pmu_fully_inited = 1; 437 438 /* Make sure PMU settle down before continuing. This is _very_ important 439 * since the IDE probe may shut interrupts down for quite a bit of time. If 440 * a PMU communication is pending while this happens, the PMU may timeout 441 * Not that on Core99 machines, the PMU keeps sending us environement 442 * messages, we should find a way to either fix IDE or make it call 443 * pmu_suspend() before masking interrupts. This can also happens while 444 * scolling with some fbdevs. 445 */ 446 do { 447 pmu_poll(); 448 } while (pmu_state != idle); 449 450 return 0; 451 } 452 453 arch_initcall(via_pmu_start); 454 455 /* 456 * This has to be done after pci_init, which is a subsys_initcall. 457 */ 458 static int __init via_pmu_dev_init(void) 459 { 460 if (vias == NULL) 461 return -ENODEV; 462 463 #ifdef CONFIG_PMAC_BACKLIGHT 464 /* Initialize backlight */ 465 pmu_backlight_init(); 466 #endif 467 468 #ifdef CONFIG_PPC32 469 if (of_machine_is_compatible("AAPL,3400/2400") || 470 of_machine_is_compatible("AAPL,3500")) { 471 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, 472 NULL, PMAC_MB_INFO_MODEL, 0); 473 pmu_battery_count = 1; 474 if (mb == PMAC_TYPE_COMET) 475 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET; 476 else 477 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER; 478 } else if (of_machine_is_compatible("AAPL,PowerBook1998") || 479 of_machine_is_compatible("PowerBook1,1")) { 480 pmu_battery_count = 2; 481 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; 482 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; 483 } else { 484 struct device_node* prim = 485 of_find_node_by_name(NULL, "power-mgt"); 486 const u32 *prim_info = NULL; 487 if (prim) 488 prim_info = of_get_property(prim, "prim-info", NULL); 489 if (prim_info) { 490 /* Other stuffs here yet unknown */ 491 pmu_battery_count = (prim_info[6] >> 16) & 0xff; 492 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; 493 if (pmu_battery_count > 1) 494 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; 495 } 496 of_node_put(prim); 497 } 498 #endif /* CONFIG_PPC32 */ 499 500 /* Create /proc/pmu */ 501 proc_pmu_root = proc_mkdir("pmu", NULL); 502 if (proc_pmu_root) { 503 long i; 504 505 for (i=0; i<pmu_battery_count; i++) { 506 char title[16]; 507 sprintf(title, "battery_%ld", i); 508 proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root, 509 &pmu_battery_proc_fops, (void *)i); 510 } 511 512 proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops); 513 proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root, 514 &pmu_irqstats_proc_fops); 515 proc_pmu_options = proc_create("options", 0600, proc_pmu_root, 516 &pmu_options_proc_fops); 517 } 518 return 0; 519 } 520 521 device_initcall(via_pmu_dev_init); 522 523 static int 524 init_pmu(void) 525 { 526 int timeout; 527 struct adb_request req; 528 529 out_8(&via[B], via[B] | TREQ); /* negate TREQ */ 530 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */ 531 532 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); 533 timeout = 100000; 534 while (!req.complete) { 535 if (--timeout < 0) { 536 printk(KERN_ERR "init_pmu: no response from PMU\n"); 537 return 0; 538 } 539 udelay(10); 540 pmu_poll(); 541 } 542 543 /* ack all pending interrupts */ 544 timeout = 100000; 545 interrupt_data[0][0] = 1; 546 while (interrupt_data[0][0] || pmu_state != idle) { 547 if (--timeout < 0) { 548 printk(KERN_ERR "init_pmu: timed out acking intrs\n"); 549 return 0; 550 } 551 if (pmu_state == idle) 552 adb_int_pending = 1; 553 via_pmu_interrupt(0, NULL); 554 udelay(10); 555 } 556 557 /* Tell PMU we are ready. */ 558 if (pmu_kind == PMU_KEYLARGO_BASED) { 559 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); 560 while (!req.complete) 561 pmu_poll(); 562 } 563 564 /* Read PMU version */ 565 pmu_request(&req, NULL, 1, PMU_GET_VERSION); 566 pmu_wait_complete(&req); 567 if (req.reply_len > 0) 568 pmu_version = req.reply[0]; 569 570 /* Read server mode setting */ 571 if (pmu_kind == PMU_KEYLARGO_BASED) { 572 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, 573 PMU_PWR_GET_POWERUP_EVENTS); 574 pmu_wait_complete(&req); 575 if (req.reply_len == 2) { 576 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT) 577 option_server_mode = 1; 578 printk(KERN_INFO "via-pmu: Server Mode is %s\n", 579 option_server_mode ? "enabled" : "disabled"); 580 } 581 } 582 return 1; 583 } 584 585 int 586 pmu_get_model(void) 587 { 588 return pmu_kind; 589 } 590 591 static void pmu_set_server_mode(int server_mode) 592 { 593 struct adb_request req; 594 595 if (pmu_kind != PMU_KEYLARGO_BASED) 596 return; 597 598 option_server_mode = server_mode; 599 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS); 600 pmu_wait_complete(&req); 601 if (req.reply_len < 2) 602 return; 603 if (server_mode) 604 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, 605 PMU_PWR_SET_POWERUP_EVENTS, 606 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); 607 else 608 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, 609 PMU_PWR_CLR_POWERUP_EVENTS, 610 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); 611 pmu_wait_complete(&req); 612 } 613 614 /* This new version of the code for 2400/3400/3500 powerbooks 615 * is inspired from the implementation in gkrellm-pmu 616 */ 617 static void 618 done_battery_state_ohare(struct adb_request* req) 619 { 620 /* format: 621 * [0] : flags 622 * 0x01 : AC indicator 623 * 0x02 : charging 624 * 0x04 : battery exist 625 * 0x08 : 626 * 0x10 : 627 * 0x20 : full charged 628 * 0x40 : pcharge reset 629 * 0x80 : battery exist 630 * 631 * [1][2] : battery voltage 632 * [3] : CPU temperature 633 * [4] : battery temperature 634 * [5] : current 635 * [6][7] : pcharge 636 * --tkoba 637 */ 638 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER; 639 long pcharge, charge, vb, vmax, lmax; 640 long vmax_charging, vmax_charged; 641 long amperage, voltage, time, max; 642 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, 643 NULL, PMAC_MB_INFO_MODEL, 0); 644 645 if (req->reply[0] & 0x01) 646 pmu_power_flags |= PMU_PWR_AC_PRESENT; 647 else 648 pmu_power_flags &= ~PMU_PWR_AC_PRESENT; 649 650 if (mb == PMAC_TYPE_COMET) { 651 vmax_charged = 189; 652 vmax_charging = 213; 653 lmax = 6500; 654 } else { 655 vmax_charged = 330; 656 vmax_charging = 330; 657 lmax = 6500; 658 } 659 vmax = vmax_charged; 660 661 /* If battery installed */ 662 if (req->reply[0] & 0x04) { 663 bat_flags |= PMU_BATT_PRESENT; 664 if (req->reply[0] & 0x02) 665 bat_flags |= PMU_BATT_CHARGING; 666 vb = (req->reply[1] << 8) | req->reply[2]; 667 voltage = (vb * 265 + 72665) / 10; 668 amperage = req->reply[5]; 669 if ((req->reply[0] & 0x01) == 0) { 670 if (amperage > 200) 671 vb += ((amperage - 200) * 15)/100; 672 } else if (req->reply[0] & 0x02) { 673 vb = (vb * 97) / 100; 674 vmax = vmax_charging; 675 } 676 charge = (100 * vb) / vmax; 677 if (req->reply[0] & 0x40) { 678 pcharge = (req->reply[6] << 8) + req->reply[7]; 679 if (pcharge > lmax) 680 pcharge = lmax; 681 pcharge *= 100; 682 pcharge = 100 - pcharge / lmax; 683 if (pcharge < charge) 684 charge = pcharge; 685 } 686 if (amperage > 0) 687 time = (charge * 16440) / amperage; 688 else 689 time = 0; 690 max = 100; 691 amperage = -amperage; 692 } else 693 charge = max = amperage = voltage = time = 0; 694 695 pmu_batteries[pmu_cur_battery].flags = bat_flags; 696 pmu_batteries[pmu_cur_battery].charge = charge; 697 pmu_batteries[pmu_cur_battery].max_charge = max; 698 pmu_batteries[pmu_cur_battery].amperage = amperage; 699 pmu_batteries[pmu_cur_battery].voltage = voltage; 700 pmu_batteries[pmu_cur_battery].time_remaining = time; 701 702 clear_bit(0, &async_req_locks); 703 } 704 705 static void 706 done_battery_state_smart(struct adb_request* req) 707 { 708 /* format: 709 * [0] : format of this structure (known: 3,4,5) 710 * [1] : flags 711 * 712 * format 3 & 4: 713 * 714 * [2] : charge 715 * [3] : max charge 716 * [4] : current 717 * [5] : voltage 718 * 719 * format 5: 720 * 721 * [2][3] : charge 722 * [4][5] : max charge 723 * [6][7] : current 724 * [8][9] : voltage 725 */ 726 727 unsigned int bat_flags = PMU_BATT_TYPE_SMART; 728 int amperage; 729 unsigned int capa, max, voltage; 730 731 if (req->reply[1] & 0x01) 732 pmu_power_flags |= PMU_PWR_AC_PRESENT; 733 else 734 pmu_power_flags &= ~PMU_PWR_AC_PRESENT; 735 736 737 capa = max = amperage = voltage = 0; 738 739 if (req->reply[1] & 0x04) { 740 bat_flags |= PMU_BATT_PRESENT; 741 switch(req->reply[0]) { 742 case 3: 743 case 4: capa = req->reply[2]; 744 max = req->reply[3]; 745 amperage = *((signed char *)&req->reply[4]); 746 voltage = req->reply[5]; 747 break; 748 case 5: capa = (req->reply[2] << 8) | req->reply[3]; 749 max = (req->reply[4] << 8) | req->reply[5]; 750 amperage = *((signed short *)&req->reply[6]); 751 voltage = (req->reply[8] << 8) | req->reply[9]; 752 break; 753 default: 754 printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n", 755 req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]); 756 break; 757 } 758 } 759 760 if ((req->reply[1] & 0x01) && (amperage > 0)) 761 bat_flags |= PMU_BATT_CHARGING; 762 763 pmu_batteries[pmu_cur_battery].flags = bat_flags; 764 pmu_batteries[pmu_cur_battery].charge = capa; 765 pmu_batteries[pmu_cur_battery].max_charge = max; 766 pmu_batteries[pmu_cur_battery].amperage = amperage; 767 pmu_batteries[pmu_cur_battery].voltage = voltage; 768 if (amperage) { 769 if ((req->reply[1] & 0x01) && (amperage > 0)) 770 pmu_batteries[pmu_cur_battery].time_remaining 771 = ((max-capa) * 3600) / amperage; 772 else 773 pmu_batteries[pmu_cur_battery].time_remaining 774 = (capa * 3600) / (-amperage); 775 } else 776 pmu_batteries[pmu_cur_battery].time_remaining = 0; 777 778 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count; 779 780 clear_bit(0, &async_req_locks); 781 } 782 783 static void 784 query_battery_state(void) 785 { 786 if (test_and_set_bit(0, &async_req_locks)) 787 return; 788 if (pmu_kind == PMU_OHARE_BASED) 789 pmu_request(&batt_req, done_battery_state_ohare, 790 1, PMU_BATTERY_STATE); 791 else 792 pmu_request(&batt_req, done_battery_state_smart, 793 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1); 794 } 795 796 static int pmu_info_proc_show(struct seq_file *m, void *v) 797 { 798 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION); 799 seq_printf(m, "PMU firmware version : %02x\n", pmu_version); 800 seq_printf(m, "AC Power : %d\n", 801 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0); 802 seq_printf(m, "Battery count : %d\n", pmu_battery_count); 803 804 return 0; 805 } 806 807 static int pmu_info_proc_open(struct inode *inode, struct file *file) 808 { 809 return single_open(file, pmu_info_proc_show, NULL); 810 } 811 812 static const struct file_operations pmu_info_proc_fops = { 813 .owner = THIS_MODULE, 814 .open = pmu_info_proc_open, 815 .read = seq_read, 816 .llseek = seq_lseek, 817 .release = single_release, 818 }; 819 820 static int pmu_irqstats_proc_show(struct seq_file *m, void *v) 821 { 822 int i; 823 static const char *irq_names[] = { 824 "Total CB1 triggered events", 825 "Total GPIO1 triggered events", 826 "PC-Card eject button", 827 "Sound/Brightness button", 828 "ADB message", 829 "Battery state change", 830 "Environment interrupt", 831 "Tick timer", 832 "Ghost interrupt (zero len)", 833 "Empty interrupt (empty mask)", 834 "Max irqs in a row" 835 }; 836 837 for (i=0; i<11; i++) { 838 seq_printf(m, " %2u: %10u (%s)\n", 839 i, pmu_irq_stats[i], irq_names[i]); 840 } 841 return 0; 842 } 843 844 static int pmu_irqstats_proc_open(struct inode *inode, struct file *file) 845 { 846 return single_open(file, pmu_irqstats_proc_show, NULL); 847 } 848 849 static const struct file_operations pmu_irqstats_proc_fops = { 850 .owner = THIS_MODULE, 851 .open = pmu_irqstats_proc_open, 852 .read = seq_read, 853 .llseek = seq_lseek, 854 .release = single_release, 855 }; 856 857 static int pmu_battery_proc_show(struct seq_file *m, void *v) 858 { 859 long batnum = (long)m->private; 860 861 seq_putc(m, '\n'); 862 seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags); 863 seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge); 864 seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge); 865 seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage); 866 seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage); 867 seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining); 868 return 0; 869 } 870 871 static int pmu_battery_proc_open(struct inode *inode, struct file *file) 872 { 873 return single_open(file, pmu_battery_proc_show, PDE(inode)->data); 874 } 875 876 static const struct file_operations pmu_battery_proc_fops = { 877 .owner = THIS_MODULE, 878 .open = pmu_battery_proc_open, 879 .read = seq_read, 880 .llseek = seq_lseek, 881 .release = single_release, 882 }; 883 884 static int pmu_options_proc_show(struct seq_file *m, void *v) 885 { 886 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) 887 if (pmu_kind == PMU_KEYLARGO_BASED && 888 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) 889 seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup); 890 #endif 891 if (pmu_kind == PMU_KEYLARGO_BASED) 892 seq_printf(m, "server_mode=%d\n", option_server_mode); 893 894 return 0; 895 } 896 897 static int pmu_options_proc_open(struct inode *inode, struct file *file) 898 { 899 return single_open(file, pmu_options_proc_show, NULL); 900 } 901 902 static ssize_t pmu_options_proc_write(struct file *file, 903 const char __user *buffer, size_t count, loff_t *pos) 904 { 905 char tmp[33]; 906 char *label, *val; 907 size_t fcount = count; 908 909 if (!count) 910 return -EINVAL; 911 if (count > 32) 912 count = 32; 913 if (copy_from_user(tmp, buffer, count)) 914 return -EFAULT; 915 tmp[count] = 0; 916 917 label = tmp; 918 while(*label == ' ') 919 label++; 920 val = label; 921 while(*val && (*val != '=')) { 922 if (*val == ' ') 923 *val = 0; 924 val++; 925 } 926 if ((*val) == 0) 927 return -EINVAL; 928 *(val++) = 0; 929 while(*val == ' ') 930 val++; 931 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) 932 if (pmu_kind == PMU_KEYLARGO_BASED && 933 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) 934 if (!strcmp(label, "lid_wakeup")) 935 option_lid_wakeup = ((*val) == '1'); 936 #endif 937 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) { 938 int new_value; 939 new_value = ((*val) == '1'); 940 if (new_value != option_server_mode) 941 pmu_set_server_mode(new_value); 942 } 943 return fcount; 944 } 945 946 static const struct file_operations pmu_options_proc_fops = { 947 .owner = THIS_MODULE, 948 .open = pmu_options_proc_open, 949 .read = seq_read, 950 .llseek = seq_lseek, 951 .release = single_release, 952 .write = pmu_options_proc_write, 953 }; 954 955 #ifdef CONFIG_ADB 956 /* Send an ADB command */ 957 static int pmu_send_request(struct adb_request *req, int sync) 958 { 959 int i, ret; 960 961 if ((vias == NULL) || (!pmu_fully_inited)) { 962 req->complete = 1; 963 return -ENXIO; 964 } 965 966 ret = -EINVAL; 967 968 switch (req->data[0]) { 969 case PMU_PACKET: 970 for (i = 0; i < req->nbytes - 1; ++i) 971 req->data[i] = req->data[i+1]; 972 --req->nbytes; 973 if (pmu_data_len[req->data[0]][1] != 0) { 974 req->reply[0] = ADB_RET_OK; 975 req->reply_len = 1; 976 } else 977 req->reply_len = 0; 978 ret = pmu_queue_request(req); 979 break; 980 case CUDA_PACKET: 981 switch (req->data[1]) { 982 case CUDA_GET_TIME: 983 if (req->nbytes != 2) 984 break; 985 req->data[0] = PMU_READ_RTC; 986 req->nbytes = 1; 987 req->reply_len = 3; 988 req->reply[0] = CUDA_PACKET; 989 req->reply[1] = 0; 990 req->reply[2] = CUDA_GET_TIME; 991 ret = pmu_queue_request(req); 992 break; 993 case CUDA_SET_TIME: 994 if (req->nbytes != 6) 995 break; 996 req->data[0] = PMU_SET_RTC; 997 req->nbytes = 5; 998 for (i = 1; i <= 4; ++i) 999 req->data[i] = req->data[i+1]; 1000 req->reply_len = 3; 1001 req->reply[0] = CUDA_PACKET; 1002 req->reply[1] = 0; 1003 req->reply[2] = CUDA_SET_TIME; 1004 ret = pmu_queue_request(req); 1005 break; 1006 } 1007 break; 1008 case ADB_PACKET: 1009 if (!pmu_has_adb) 1010 return -ENXIO; 1011 for (i = req->nbytes - 1; i > 1; --i) 1012 req->data[i+2] = req->data[i]; 1013 req->data[3] = req->nbytes - 2; 1014 req->data[2] = pmu_adb_flags; 1015 /*req->data[1] = req->data[1];*/ 1016 req->data[0] = PMU_ADB_CMD; 1017 req->nbytes += 2; 1018 req->reply_expected = 1; 1019 req->reply_len = 0; 1020 ret = pmu_queue_request(req); 1021 break; 1022 } 1023 if (ret) { 1024 req->complete = 1; 1025 return ret; 1026 } 1027 1028 if (sync) 1029 while (!req->complete) 1030 pmu_poll(); 1031 1032 return 0; 1033 } 1034 1035 /* Enable/disable autopolling */ 1036 static int __pmu_adb_autopoll(int devs) 1037 { 1038 struct adb_request req; 1039 1040 if (devs) { 1041 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86, 1042 adb_dev_map >> 8, adb_dev_map); 1043 pmu_adb_flags = 2; 1044 } else { 1045 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF); 1046 pmu_adb_flags = 0; 1047 } 1048 while (!req.complete) 1049 pmu_poll(); 1050 return 0; 1051 } 1052 1053 static int pmu_adb_autopoll(int devs) 1054 { 1055 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) 1056 return -ENXIO; 1057 1058 adb_dev_map = devs; 1059 return __pmu_adb_autopoll(devs); 1060 } 1061 1062 /* Reset the ADB bus */ 1063 static int pmu_adb_reset_bus(void) 1064 { 1065 struct adb_request req; 1066 int save_autopoll = adb_dev_map; 1067 1068 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) 1069 return -ENXIO; 1070 1071 /* anyone got a better idea?? */ 1072 __pmu_adb_autopoll(0); 1073 1074 req.nbytes = 4; 1075 req.done = NULL; 1076 req.data[0] = PMU_ADB_CMD; 1077 req.data[1] = ADB_BUSRESET; 1078 req.data[2] = 0; 1079 req.data[3] = 0; 1080 req.data[4] = 0; 1081 req.reply_len = 0; 1082 req.reply_expected = 1; 1083 if (pmu_queue_request(&req) != 0) { 1084 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n"); 1085 return -EIO; 1086 } 1087 pmu_wait_complete(&req); 1088 1089 if (save_autopoll != 0) 1090 __pmu_adb_autopoll(save_autopoll); 1091 1092 return 0; 1093 } 1094 #endif /* CONFIG_ADB */ 1095 1096 /* Construct and send a pmu request */ 1097 int 1098 pmu_request(struct adb_request *req, void (*done)(struct adb_request *), 1099 int nbytes, ...) 1100 { 1101 va_list list; 1102 int i; 1103 1104 if (vias == NULL) 1105 return -ENXIO; 1106 1107 if (nbytes < 0 || nbytes > 32) { 1108 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes); 1109 req->complete = 1; 1110 return -EINVAL; 1111 } 1112 req->nbytes = nbytes; 1113 req->done = done; 1114 va_start(list, nbytes); 1115 for (i = 0; i < nbytes; ++i) 1116 req->data[i] = va_arg(list, int); 1117 va_end(list); 1118 req->reply_len = 0; 1119 req->reply_expected = 0; 1120 return pmu_queue_request(req); 1121 } 1122 1123 int 1124 pmu_queue_request(struct adb_request *req) 1125 { 1126 unsigned long flags; 1127 int nsend; 1128 1129 if (via == NULL) { 1130 req->complete = 1; 1131 return -ENXIO; 1132 } 1133 if (req->nbytes <= 0) { 1134 req->complete = 1; 1135 return 0; 1136 } 1137 nsend = pmu_data_len[req->data[0]][0]; 1138 if (nsend >= 0 && req->nbytes != nsend + 1) { 1139 req->complete = 1; 1140 return -EINVAL; 1141 } 1142 1143 req->next = NULL; 1144 req->sent = 0; 1145 req->complete = 0; 1146 1147 spin_lock_irqsave(&pmu_lock, flags); 1148 if (current_req != 0) { 1149 last_req->next = req; 1150 last_req = req; 1151 } else { 1152 current_req = req; 1153 last_req = req; 1154 if (pmu_state == idle) 1155 pmu_start(); 1156 } 1157 spin_unlock_irqrestore(&pmu_lock, flags); 1158 1159 return 0; 1160 } 1161 1162 static inline void 1163 wait_for_ack(void) 1164 { 1165 /* Sightly increased the delay, I had one occurrence of the message 1166 * reported 1167 */ 1168 int timeout = 4000; 1169 while ((in_8(&via[B]) & TACK) == 0) { 1170 if (--timeout < 0) { 1171 printk(KERN_ERR "PMU not responding (!ack)\n"); 1172 return; 1173 } 1174 udelay(10); 1175 } 1176 } 1177 1178 /* New PMU seems to be very sensitive to those timings, so we make sure 1179 * PCI is flushed immediately */ 1180 static inline void 1181 send_byte(int x) 1182 { 1183 volatile unsigned char __iomem *v = via; 1184 1185 out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT); 1186 out_8(&v[SR], x); 1187 out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */ 1188 (void)in_8(&v[B]); 1189 } 1190 1191 static inline void 1192 recv_byte(void) 1193 { 1194 volatile unsigned char __iomem *v = via; 1195 1196 out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT); 1197 in_8(&v[SR]); /* resets SR */ 1198 out_8(&v[B], in_8(&v[B]) & ~TREQ); 1199 (void)in_8(&v[B]); 1200 } 1201 1202 static inline void 1203 pmu_done(struct adb_request *req) 1204 { 1205 void (*done)(struct adb_request *) = req->done; 1206 mb(); 1207 req->complete = 1; 1208 /* Here, we assume that if the request has a done member, the 1209 * struct request will survive to setting req->complete to 1 1210 */ 1211 if (done) 1212 (*done)(req); 1213 } 1214 1215 static void 1216 pmu_start(void) 1217 { 1218 struct adb_request *req; 1219 1220 /* assert pmu_state == idle */ 1221 /* get the packet to send */ 1222 req = current_req; 1223 if (req == 0 || pmu_state != idle 1224 || (/*req->reply_expected && */req_awaiting_reply)) 1225 return; 1226 1227 pmu_state = sending; 1228 data_index = 1; 1229 data_len = pmu_data_len[req->data[0]][0]; 1230 1231 /* Sounds safer to make sure ACK is high before writing. This helped 1232 * kill a problem with ADB and some iBooks 1233 */ 1234 wait_for_ack(); 1235 /* set the shift register to shift out and send a byte */ 1236 send_byte(req->data[0]); 1237 } 1238 1239 void 1240 pmu_poll(void) 1241 { 1242 if (!via) 1243 return; 1244 if (disable_poll) 1245 return; 1246 via_pmu_interrupt(0, NULL); 1247 } 1248 1249 void 1250 pmu_poll_adb(void) 1251 { 1252 if (!via) 1253 return; 1254 if (disable_poll) 1255 return; 1256 /* Kicks ADB read when PMU is suspended */ 1257 adb_int_pending = 1; 1258 do { 1259 via_pmu_interrupt(0, NULL); 1260 } while (pmu_suspended && (adb_int_pending || pmu_state != idle 1261 || req_awaiting_reply)); 1262 } 1263 1264 void 1265 pmu_wait_complete(struct adb_request *req) 1266 { 1267 if (!via) 1268 return; 1269 while((pmu_state != idle && pmu_state != locked) || !req->complete) 1270 via_pmu_interrupt(0, NULL); 1271 } 1272 1273 /* This function loops until the PMU is idle and prevents it from 1274 * anwsering to ADB interrupts. pmu_request can still be called. 1275 * This is done to avoid spurrious shutdowns when we know we'll have 1276 * interrupts switched off for a long time 1277 */ 1278 void 1279 pmu_suspend(void) 1280 { 1281 unsigned long flags; 1282 1283 if (!via) 1284 return; 1285 1286 spin_lock_irqsave(&pmu_lock, flags); 1287 pmu_suspended++; 1288 if (pmu_suspended > 1) { 1289 spin_unlock_irqrestore(&pmu_lock, flags); 1290 return; 1291 } 1292 1293 do { 1294 spin_unlock_irqrestore(&pmu_lock, flags); 1295 if (req_awaiting_reply) 1296 adb_int_pending = 1; 1297 via_pmu_interrupt(0, NULL); 1298 spin_lock_irqsave(&pmu_lock, flags); 1299 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) { 1300 if (gpio_irq >= 0) 1301 disable_irq_nosync(gpio_irq); 1302 out_8(&via[IER], CB1_INT | IER_CLR); 1303 spin_unlock_irqrestore(&pmu_lock, flags); 1304 break; 1305 } 1306 } while (1); 1307 } 1308 1309 void 1310 pmu_resume(void) 1311 { 1312 unsigned long flags; 1313 1314 if (!via || (pmu_suspended < 1)) 1315 return; 1316 1317 spin_lock_irqsave(&pmu_lock, flags); 1318 pmu_suspended--; 1319 if (pmu_suspended > 0) { 1320 spin_unlock_irqrestore(&pmu_lock, flags); 1321 return; 1322 } 1323 adb_int_pending = 1; 1324 if (gpio_irq >= 0) 1325 enable_irq(gpio_irq); 1326 out_8(&via[IER], CB1_INT | IER_SET); 1327 spin_unlock_irqrestore(&pmu_lock, flags); 1328 pmu_poll(); 1329 } 1330 1331 /* Interrupt data could be the result data from an ADB cmd */ 1332 static void 1333 pmu_handle_data(unsigned char *data, int len) 1334 { 1335 unsigned char ints, pirq; 1336 int i = 0; 1337 1338 asleep = 0; 1339 if (drop_interrupts || len < 1) { 1340 adb_int_pending = 0; 1341 pmu_irq_stats[8]++; 1342 return; 1343 } 1344 1345 /* Get PMU interrupt mask */ 1346 ints = data[0]; 1347 1348 /* Record zero interrupts for stats */ 1349 if (ints == 0) 1350 pmu_irq_stats[9]++; 1351 1352 /* Hack to deal with ADB autopoll flag */ 1353 if (ints & PMU_INT_ADB) 1354 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL); 1355 1356 next: 1357 1358 if (ints == 0) { 1359 if (i > pmu_irq_stats[10]) 1360 pmu_irq_stats[10] = i; 1361 return; 1362 } 1363 1364 for (pirq = 0; pirq < 8; pirq++) 1365 if (ints & (1 << pirq)) 1366 break; 1367 pmu_irq_stats[pirq]++; 1368 i++; 1369 ints &= ~(1 << pirq); 1370 1371 /* Note: for some reason, we get an interrupt with len=1, 1372 * data[0]==0 after each normal ADB interrupt, at least 1373 * on the Pismo. Still investigating... --BenH 1374 */ 1375 if ((1 << pirq) & PMU_INT_ADB) { 1376 if ((data[0] & PMU_INT_ADB_AUTO) == 0) { 1377 struct adb_request *req = req_awaiting_reply; 1378 if (req == 0) { 1379 printk(KERN_ERR "PMU: extra ADB reply\n"); 1380 return; 1381 } 1382 req_awaiting_reply = NULL; 1383 if (len <= 2) 1384 req->reply_len = 0; 1385 else { 1386 memcpy(req->reply, data + 1, len - 1); 1387 req->reply_len = len - 1; 1388 } 1389 pmu_done(req); 1390 } else { 1391 if (len == 4 && data[1] == 0x2c) { 1392 extern int xmon_wants_key, xmon_adb_keycode; 1393 if (xmon_wants_key) { 1394 xmon_adb_keycode = data[2]; 1395 return; 1396 } 1397 } 1398 #ifdef CONFIG_ADB 1399 /* 1400 * XXX On the [23]400 the PMU gives us an up 1401 * event for keycodes 0x74 or 0x75 when the PC 1402 * card eject buttons are released, so we 1403 * ignore those events. 1404 */ 1405 if (!(pmu_kind == PMU_OHARE_BASED && len == 4 1406 && data[1] == 0x2c && data[3] == 0xff 1407 && (data[2] & ~1) == 0xf4)) 1408 adb_input(data+1, len-1, 1); 1409 #endif /* CONFIG_ADB */ 1410 } 1411 } 1412 /* Sound/brightness button pressed */ 1413 else if ((1 << pirq) & PMU_INT_SNDBRT) { 1414 #ifdef CONFIG_PMAC_BACKLIGHT 1415 if (len == 3) 1416 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4); 1417 #endif 1418 } 1419 /* Tick interrupt */ 1420 else if ((1 << pirq) & PMU_INT_TICK) { 1421 /* Environement or tick interrupt, query batteries */ 1422 if (pmu_battery_count) { 1423 if ((--query_batt_timer) == 0) { 1424 query_battery_state(); 1425 query_batt_timer = BATTERY_POLLING_COUNT; 1426 } 1427 } 1428 } 1429 else if ((1 << pirq) & PMU_INT_ENVIRONMENT) { 1430 if (pmu_battery_count) 1431 query_battery_state(); 1432 pmu_pass_intr(data, len); 1433 /* len == 6 is probably a bad check. But how do I 1434 * know what PMU versions send what events here? */ 1435 if (len == 6) { 1436 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8)); 1437 via_pmu_event(PMU_EVT_LID, data[1]&1); 1438 } 1439 } else { 1440 pmu_pass_intr(data, len); 1441 } 1442 goto next; 1443 } 1444 1445 static struct adb_request* 1446 pmu_sr_intr(void) 1447 { 1448 struct adb_request *req; 1449 int bite = 0; 1450 1451 if (via[B] & TREQ) { 1452 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]); 1453 out_8(&via[IFR], SR_INT); 1454 return NULL; 1455 } 1456 /* The ack may not yet be low when we get the interrupt */ 1457 while ((in_8(&via[B]) & TACK) != 0) 1458 ; 1459 1460 /* if reading grab the byte, and reset the interrupt */ 1461 if (pmu_state == reading || pmu_state == reading_intr) 1462 bite = in_8(&via[SR]); 1463 1464 /* reset TREQ and wait for TACK to go high */ 1465 out_8(&via[B], in_8(&via[B]) | TREQ); 1466 wait_for_ack(); 1467 1468 switch (pmu_state) { 1469 case sending: 1470 req = current_req; 1471 if (data_len < 0) { 1472 data_len = req->nbytes - 1; 1473 send_byte(data_len); 1474 break; 1475 } 1476 if (data_index <= data_len) { 1477 send_byte(req->data[data_index++]); 1478 break; 1479 } 1480 req->sent = 1; 1481 data_len = pmu_data_len[req->data[0]][1]; 1482 if (data_len == 0) { 1483 pmu_state = idle; 1484 current_req = req->next; 1485 if (req->reply_expected) 1486 req_awaiting_reply = req; 1487 else 1488 return req; 1489 } else { 1490 pmu_state = reading; 1491 data_index = 0; 1492 reply_ptr = req->reply + req->reply_len; 1493 recv_byte(); 1494 } 1495 break; 1496 1497 case intack: 1498 data_index = 0; 1499 data_len = -1; 1500 pmu_state = reading_intr; 1501 reply_ptr = interrupt_data[int_data_last]; 1502 recv_byte(); 1503 if (gpio_irq >= 0 && !gpio_irq_enabled) { 1504 enable_irq(gpio_irq); 1505 gpio_irq_enabled = 1; 1506 } 1507 break; 1508 1509 case reading: 1510 case reading_intr: 1511 if (data_len == -1) { 1512 data_len = bite; 1513 if (bite > 32) 1514 printk(KERN_ERR "PMU: bad reply len %d\n", bite); 1515 } else if (data_index < 32) { 1516 reply_ptr[data_index++] = bite; 1517 } 1518 if (data_index < data_len) { 1519 recv_byte(); 1520 break; 1521 } 1522 1523 if (pmu_state == reading_intr) { 1524 pmu_state = idle; 1525 int_data_state[int_data_last] = int_data_ready; 1526 interrupt_data_len[int_data_last] = data_len; 1527 } else { 1528 req = current_req; 1529 /* 1530 * For PMU sleep and freq change requests, we lock the 1531 * PMU until it's explicitly unlocked. This avoids any 1532 * spurrious event polling getting in 1533 */ 1534 current_req = req->next; 1535 req->reply_len += data_index; 1536 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED) 1537 pmu_state = locked; 1538 else 1539 pmu_state = idle; 1540 return req; 1541 } 1542 break; 1543 1544 default: 1545 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n", 1546 pmu_state); 1547 } 1548 return NULL; 1549 } 1550 1551 static irqreturn_t 1552 via_pmu_interrupt(int irq, void *arg) 1553 { 1554 unsigned long flags; 1555 int intr; 1556 int nloop = 0; 1557 int int_data = -1; 1558 struct adb_request *req = NULL; 1559 int handled = 0; 1560 1561 /* This is a bit brutal, we can probably do better */ 1562 spin_lock_irqsave(&pmu_lock, flags); 1563 ++disable_poll; 1564 1565 for (;;) { 1566 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT); 1567 if (intr == 0) 1568 break; 1569 handled = 1; 1570 if (++nloop > 1000) { 1571 printk(KERN_DEBUG "PMU: stuck in intr loop, " 1572 "intr=%x, ier=%x pmu_state=%d\n", 1573 intr, in_8(&via[IER]), pmu_state); 1574 break; 1575 } 1576 out_8(&via[IFR], intr); 1577 if (intr & CB1_INT) { 1578 adb_int_pending = 1; 1579 pmu_irq_stats[0]++; 1580 } 1581 if (intr & SR_INT) { 1582 req = pmu_sr_intr(); 1583 if (req) 1584 break; 1585 } 1586 } 1587 1588 recheck: 1589 if (pmu_state == idle) { 1590 if (adb_int_pending) { 1591 if (int_data_state[0] == int_data_empty) 1592 int_data_last = 0; 1593 else if (int_data_state[1] == int_data_empty) 1594 int_data_last = 1; 1595 else 1596 goto no_free_slot; 1597 pmu_state = intack; 1598 int_data_state[int_data_last] = int_data_fill; 1599 /* Sounds safer to make sure ACK is high before writing. 1600 * This helped kill a problem with ADB and some iBooks 1601 */ 1602 wait_for_ack(); 1603 send_byte(PMU_INT_ACK); 1604 adb_int_pending = 0; 1605 } else if (current_req) 1606 pmu_start(); 1607 } 1608 no_free_slot: 1609 /* Mark the oldest buffer for flushing */ 1610 if (int_data_state[!int_data_last] == int_data_ready) { 1611 int_data_state[!int_data_last] = int_data_flush; 1612 int_data = !int_data_last; 1613 } else if (int_data_state[int_data_last] == int_data_ready) { 1614 int_data_state[int_data_last] = int_data_flush; 1615 int_data = int_data_last; 1616 } 1617 --disable_poll; 1618 spin_unlock_irqrestore(&pmu_lock, flags); 1619 1620 /* Deal with completed PMU requests outside of the lock */ 1621 if (req) { 1622 pmu_done(req); 1623 req = NULL; 1624 } 1625 1626 /* Deal with interrupt datas outside of the lock */ 1627 if (int_data >= 0) { 1628 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]); 1629 spin_lock_irqsave(&pmu_lock, flags); 1630 ++disable_poll; 1631 int_data_state[int_data] = int_data_empty; 1632 int_data = -1; 1633 goto recheck; 1634 } 1635 1636 return IRQ_RETVAL(handled); 1637 } 1638 1639 void 1640 pmu_unlock(void) 1641 { 1642 unsigned long flags; 1643 1644 spin_lock_irqsave(&pmu_lock, flags); 1645 if (pmu_state == locked) 1646 pmu_state = idle; 1647 adb_int_pending = 1; 1648 spin_unlock_irqrestore(&pmu_lock, flags); 1649 } 1650 1651 1652 static irqreturn_t 1653 gpio1_interrupt(int irq, void *arg) 1654 { 1655 unsigned long flags; 1656 1657 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) { 1658 spin_lock_irqsave(&pmu_lock, flags); 1659 if (gpio_irq_enabled > 0) { 1660 disable_irq_nosync(gpio_irq); 1661 gpio_irq_enabled = 0; 1662 } 1663 pmu_irq_stats[1]++; 1664 adb_int_pending = 1; 1665 spin_unlock_irqrestore(&pmu_lock, flags); 1666 via_pmu_interrupt(0, NULL); 1667 return IRQ_HANDLED; 1668 } 1669 return IRQ_NONE; 1670 } 1671 1672 void 1673 pmu_enable_irled(int on) 1674 { 1675 struct adb_request req; 1676 1677 if (vias == NULL) 1678 return ; 1679 if (pmu_kind == PMU_KEYLARGO_BASED) 1680 return ; 1681 1682 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED | 1683 (on ? PMU_POW_ON : PMU_POW_OFF)); 1684 pmu_wait_complete(&req); 1685 } 1686 1687 void 1688 pmu_restart(void) 1689 { 1690 struct adb_request req; 1691 1692 if (via == NULL) 1693 return; 1694 1695 local_irq_disable(); 1696 1697 drop_interrupts = 1; 1698 1699 if (pmu_kind != PMU_KEYLARGO_BASED) { 1700 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | 1701 PMU_INT_TICK ); 1702 while(!req.complete) 1703 pmu_poll(); 1704 } 1705 1706 pmu_request(&req, NULL, 1, PMU_RESET); 1707 pmu_wait_complete(&req); 1708 for (;;) 1709 ; 1710 } 1711 1712 void 1713 pmu_shutdown(void) 1714 { 1715 struct adb_request req; 1716 1717 if (via == NULL) 1718 return; 1719 1720 local_irq_disable(); 1721 1722 drop_interrupts = 1; 1723 1724 if (pmu_kind != PMU_KEYLARGO_BASED) { 1725 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | 1726 PMU_INT_TICK ); 1727 pmu_wait_complete(&req); 1728 } else { 1729 /* Disable server mode on shutdown or we'll just 1730 * wake up again 1731 */ 1732 pmu_set_server_mode(0); 1733 } 1734 1735 pmu_request(&req, NULL, 5, PMU_SHUTDOWN, 1736 'M', 'A', 'T', 'T'); 1737 pmu_wait_complete(&req); 1738 for (;;) 1739 ; 1740 } 1741 1742 int 1743 pmu_present(void) 1744 { 1745 return via != 0; 1746 } 1747 1748 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) 1749 /* 1750 * Put the powerbook to sleep. 1751 */ 1752 1753 static u32 save_via[8]; 1754 1755 static void 1756 save_via_state(void) 1757 { 1758 save_via[0] = in_8(&via[ANH]); 1759 save_via[1] = in_8(&via[DIRA]); 1760 save_via[2] = in_8(&via[B]); 1761 save_via[3] = in_8(&via[DIRB]); 1762 save_via[4] = in_8(&via[PCR]); 1763 save_via[5] = in_8(&via[ACR]); 1764 save_via[6] = in_8(&via[T1CL]); 1765 save_via[7] = in_8(&via[T1CH]); 1766 } 1767 static void 1768 restore_via_state(void) 1769 { 1770 out_8(&via[ANH], save_via[0]); 1771 out_8(&via[DIRA], save_via[1]); 1772 out_8(&via[B], save_via[2]); 1773 out_8(&via[DIRB], save_via[3]); 1774 out_8(&via[PCR], save_via[4]); 1775 out_8(&via[ACR], save_via[5]); 1776 out_8(&via[T1CL], save_via[6]); 1777 out_8(&via[T1CH], save_via[7]); 1778 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ 1779 out_8(&via[IFR], 0x7f); /* clear IFR */ 1780 out_8(&via[IER], IER_SET | SR_INT | CB1_INT); 1781 } 1782 1783 #define GRACKLE_PM (1<<7) 1784 #define GRACKLE_DOZE (1<<5) 1785 #define GRACKLE_NAP (1<<4) 1786 #define GRACKLE_SLEEP (1<<3) 1787 1788 static int powerbook_sleep_grackle(void) 1789 { 1790 unsigned long save_l2cr; 1791 unsigned short pmcr1; 1792 struct adb_request req; 1793 struct pci_dev *grackle; 1794 1795 grackle = pci_get_bus_and_slot(0, 0); 1796 if (!grackle) 1797 return -ENODEV; 1798 1799 /* Turn off various things. Darwin does some retry tests here... */ 1800 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE); 1801 pmu_wait_complete(&req); 1802 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, 1803 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY); 1804 pmu_wait_complete(&req); 1805 1806 /* For 750, save backside cache setting and disable it */ 1807 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ 1808 1809 if (!__fake_sleep) { 1810 /* Ask the PMU to put us to sleep */ 1811 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); 1812 pmu_wait_complete(&req); 1813 } 1814 1815 /* The VIA is supposed not to be restored correctly*/ 1816 save_via_state(); 1817 /* We shut down some HW */ 1818 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1); 1819 1820 pci_read_config_word(grackle, 0x70, &pmcr1); 1821 /* Apparently, MacOS uses NAP mode for Grackle ??? */ 1822 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP); 1823 pmcr1 |= GRACKLE_PM|GRACKLE_NAP; 1824 pci_write_config_word(grackle, 0x70, pmcr1); 1825 1826 /* Call low-level ASM sleep handler */ 1827 if (__fake_sleep) 1828 mdelay(5000); 1829 else 1830 low_sleep_handler(); 1831 1832 /* We're awake again, stop grackle PM */ 1833 pci_read_config_word(grackle, 0x70, &pmcr1); 1834 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP); 1835 pci_write_config_word(grackle, 0x70, pmcr1); 1836 1837 pci_dev_put(grackle); 1838 1839 /* Make sure the PMU is idle */ 1840 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0); 1841 restore_via_state(); 1842 1843 /* Restore L2 cache */ 1844 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) 1845 _set_L2CR(save_l2cr); 1846 1847 /* Restore userland MMU context */ 1848 switch_mmu_context(NULL, current->active_mm); 1849 1850 /* Power things up */ 1851 pmu_unlock(); 1852 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); 1853 pmu_wait_complete(&req); 1854 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, 1855 PMU_POW0_ON|PMU_POW0_HARD_DRIVE); 1856 pmu_wait_complete(&req); 1857 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, 1858 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY); 1859 pmu_wait_complete(&req); 1860 1861 return 0; 1862 } 1863 1864 static int 1865 powerbook_sleep_Core99(void) 1866 { 1867 unsigned long save_l2cr; 1868 unsigned long save_l3cr; 1869 struct adb_request req; 1870 1871 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) { 1872 printk(KERN_ERR "Sleep mode not supported on this machine\n"); 1873 return -ENOSYS; 1874 } 1875 1876 if (num_online_cpus() > 1 || cpu_is_offline(0)) 1877 return -EAGAIN; 1878 1879 /* Stop environment and ADB interrupts */ 1880 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0); 1881 pmu_wait_complete(&req); 1882 1883 /* Tell PMU what events will wake us up */ 1884 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS, 1885 0xff, 0xff); 1886 pmu_wait_complete(&req); 1887 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS, 1888 0, PMU_PWR_WAKEUP_KEY | 1889 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0)); 1890 pmu_wait_complete(&req); 1891 1892 /* Save the state of the L2 and L3 caches */ 1893 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ 1894 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ 1895 1896 if (!__fake_sleep) { 1897 /* Ask the PMU to put us to sleep */ 1898 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); 1899 pmu_wait_complete(&req); 1900 } 1901 1902 /* The VIA is supposed not to be restored correctly*/ 1903 save_via_state(); 1904 1905 /* Shut down various ASICs. There's a chance that we can no longer 1906 * talk to the PMU after this, so I moved it to _after_ sending the 1907 * sleep command to it. Still need to be checked. 1908 */ 1909 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1); 1910 1911 /* Call low-level ASM sleep handler */ 1912 if (__fake_sleep) 1913 mdelay(5000); 1914 else 1915 low_sleep_handler(); 1916 1917 /* Restore Apple core ASICs state */ 1918 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0); 1919 1920 /* Restore VIA */ 1921 restore_via_state(); 1922 1923 /* tweak LPJ before cpufreq is there */ 1924 loops_per_jiffy *= 2; 1925 1926 /* Restore video */ 1927 pmac_call_early_video_resume(); 1928 1929 /* Restore L2 cache */ 1930 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) 1931 _set_L2CR(save_l2cr); 1932 /* Restore L3 cache */ 1933 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0) 1934 _set_L3CR(save_l3cr); 1935 1936 /* Restore userland MMU context */ 1937 switch_mmu_context(NULL, current->active_mm); 1938 1939 /* Tell PMU we are ready */ 1940 pmu_unlock(); 1941 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); 1942 pmu_wait_complete(&req); 1943 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); 1944 pmu_wait_complete(&req); 1945 1946 /* Restore LPJ, cpufreq will adjust the cpu frequency */ 1947 loops_per_jiffy /= 2; 1948 1949 return 0; 1950 } 1951 1952 #define PB3400_MEM_CTRL 0xf8000000 1953 #define PB3400_MEM_CTRL_SLEEP 0x70 1954 1955 static void __iomem *pb3400_mem_ctrl; 1956 1957 static void powerbook_sleep_init_3400(void) 1958 { 1959 /* map in the memory controller registers */ 1960 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100); 1961 if (pb3400_mem_ctrl == NULL) 1962 printk(KERN_WARNING "ioremap failed: sleep won't be possible"); 1963 } 1964 1965 static int powerbook_sleep_3400(void) 1966 { 1967 int i, x; 1968 unsigned int hid0; 1969 unsigned long msr; 1970 struct adb_request sleep_req; 1971 unsigned int __iomem *mem_ctrl_sleep; 1972 1973 if (pb3400_mem_ctrl == NULL) 1974 return -ENOMEM; 1975 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP; 1976 1977 /* Set the memory controller to keep the memory refreshed 1978 while we're asleep */ 1979 for (i = 0x403f; i >= 0x4000; --i) { 1980 out_be32(mem_ctrl_sleep, i); 1981 do { 1982 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff; 1983 } while (x == 0); 1984 if (x >= 0x100) 1985 break; 1986 } 1987 1988 /* Ask the PMU to put us to sleep */ 1989 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); 1990 pmu_wait_complete(&sleep_req); 1991 pmu_unlock(); 1992 1993 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1); 1994 1995 asleep = 1; 1996 1997 /* Put the CPU into sleep mode */ 1998 hid0 = mfspr(SPRN_HID0); 1999 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP; 2000 mtspr(SPRN_HID0, hid0); 2001 local_irq_enable(); 2002 msr = mfmsr() | MSR_POW; 2003 while (asleep) { 2004 mb(); 2005 mtmsr(msr); 2006 isync(); 2007 } 2008 local_irq_disable(); 2009 2010 /* OK, we're awake again, start restoring things */ 2011 out_be32(mem_ctrl_sleep, 0x3f); 2012 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0); 2013 2014 return 0; 2015 } 2016 2017 #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */ 2018 2019 /* 2020 * Support for /dev/pmu device 2021 */ 2022 #define RB_SIZE 0x10 2023 struct pmu_private { 2024 struct list_head list; 2025 int rb_get; 2026 int rb_put; 2027 struct rb_entry { 2028 unsigned short len; 2029 unsigned char data[16]; 2030 } rb_buf[RB_SIZE]; 2031 wait_queue_head_t wait; 2032 spinlock_t lock; 2033 #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) 2034 int backlight_locker; 2035 #endif 2036 }; 2037 2038 static LIST_HEAD(all_pmu_pvt); 2039 static DEFINE_SPINLOCK(all_pvt_lock); 2040 2041 static void 2042 pmu_pass_intr(unsigned char *data, int len) 2043 { 2044 struct pmu_private *pp; 2045 struct list_head *list; 2046 int i; 2047 unsigned long flags; 2048 2049 if (len > sizeof(pp->rb_buf[0].data)) 2050 len = sizeof(pp->rb_buf[0].data); 2051 spin_lock_irqsave(&all_pvt_lock, flags); 2052 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) { 2053 pp = list_entry(list, struct pmu_private, list); 2054 spin_lock(&pp->lock); 2055 i = pp->rb_put + 1; 2056 if (i >= RB_SIZE) 2057 i = 0; 2058 if (i != pp->rb_get) { 2059 struct rb_entry *rp = &pp->rb_buf[pp->rb_put]; 2060 rp->len = len; 2061 memcpy(rp->data, data, len); 2062 pp->rb_put = i; 2063 wake_up_interruptible(&pp->wait); 2064 } 2065 spin_unlock(&pp->lock); 2066 } 2067 spin_unlock_irqrestore(&all_pvt_lock, flags); 2068 } 2069 2070 static int 2071 pmu_open(struct inode *inode, struct file *file) 2072 { 2073 struct pmu_private *pp; 2074 unsigned long flags; 2075 2076 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL); 2077 if (pp == 0) 2078 return -ENOMEM; 2079 pp->rb_get = pp->rb_put = 0; 2080 spin_lock_init(&pp->lock); 2081 init_waitqueue_head(&pp->wait); 2082 mutex_lock(&pmu_info_proc_mutex); 2083 spin_lock_irqsave(&all_pvt_lock, flags); 2084 #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) 2085 pp->backlight_locker = 0; 2086 #endif 2087 list_add(&pp->list, &all_pmu_pvt); 2088 spin_unlock_irqrestore(&all_pvt_lock, flags); 2089 file->private_data = pp; 2090 mutex_unlock(&pmu_info_proc_mutex); 2091 return 0; 2092 } 2093 2094 static ssize_t 2095 pmu_read(struct file *file, char __user *buf, 2096 size_t count, loff_t *ppos) 2097 { 2098 struct pmu_private *pp = file->private_data; 2099 DECLARE_WAITQUEUE(wait, current); 2100 unsigned long flags; 2101 int ret = 0; 2102 2103 if (count < 1 || pp == 0) 2104 return -EINVAL; 2105 if (!access_ok(VERIFY_WRITE, buf, count)) 2106 return -EFAULT; 2107 2108 spin_lock_irqsave(&pp->lock, flags); 2109 add_wait_queue(&pp->wait, &wait); 2110 current->state = TASK_INTERRUPTIBLE; 2111 2112 for (;;) { 2113 ret = -EAGAIN; 2114 if (pp->rb_get != pp->rb_put) { 2115 int i = pp->rb_get; 2116 struct rb_entry *rp = &pp->rb_buf[i]; 2117 ret = rp->len; 2118 spin_unlock_irqrestore(&pp->lock, flags); 2119 if (ret > count) 2120 ret = count; 2121 if (ret > 0 && copy_to_user(buf, rp->data, ret)) 2122 ret = -EFAULT; 2123 if (++i >= RB_SIZE) 2124 i = 0; 2125 spin_lock_irqsave(&pp->lock, flags); 2126 pp->rb_get = i; 2127 } 2128 if (ret >= 0) 2129 break; 2130 if (file->f_flags & O_NONBLOCK) 2131 break; 2132 ret = -ERESTARTSYS; 2133 if (signal_pending(current)) 2134 break; 2135 spin_unlock_irqrestore(&pp->lock, flags); 2136 schedule(); 2137 spin_lock_irqsave(&pp->lock, flags); 2138 } 2139 current->state = TASK_RUNNING; 2140 remove_wait_queue(&pp->wait, &wait); 2141 spin_unlock_irqrestore(&pp->lock, flags); 2142 2143 return ret; 2144 } 2145 2146 static ssize_t 2147 pmu_write(struct file *file, const char __user *buf, 2148 size_t count, loff_t *ppos) 2149 { 2150 return 0; 2151 } 2152 2153 static unsigned int 2154 pmu_fpoll(struct file *filp, poll_table *wait) 2155 { 2156 struct pmu_private *pp = filp->private_data; 2157 unsigned int mask = 0; 2158 unsigned long flags; 2159 2160 if (pp == 0) 2161 return 0; 2162 poll_wait(filp, &pp->wait, wait); 2163 spin_lock_irqsave(&pp->lock, flags); 2164 if (pp->rb_get != pp->rb_put) 2165 mask |= POLLIN; 2166 spin_unlock_irqrestore(&pp->lock, flags); 2167 return mask; 2168 } 2169 2170 static int 2171 pmu_release(struct inode *inode, struct file *file) 2172 { 2173 struct pmu_private *pp = file->private_data; 2174 unsigned long flags; 2175 2176 if (pp != 0) { 2177 file->private_data = NULL; 2178 spin_lock_irqsave(&all_pvt_lock, flags); 2179 list_del(&pp->list); 2180 spin_unlock_irqrestore(&all_pvt_lock, flags); 2181 2182 #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) 2183 if (pp->backlight_locker) 2184 pmac_backlight_enable(); 2185 #endif 2186 2187 kfree(pp); 2188 } 2189 return 0; 2190 } 2191 2192 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) 2193 static void pmac_suspend_disable_irqs(void) 2194 { 2195 /* Call platform functions marked "on sleep" */ 2196 pmac_pfunc_i2c_suspend(); 2197 pmac_pfunc_base_suspend(); 2198 } 2199 2200 static int powerbook_sleep(suspend_state_t state) 2201 { 2202 int error = 0; 2203 2204 /* Wait for completion of async requests */ 2205 while (!batt_req.complete) 2206 pmu_poll(); 2207 2208 /* Giveup the lazy FPU & vec so we don't have to back them 2209 * up from the low level code 2210 */ 2211 enable_kernel_fp(); 2212 2213 #ifdef CONFIG_ALTIVEC 2214 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2215 enable_kernel_altivec(); 2216 #endif /* CONFIG_ALTIVEC */ 2217 2218 switch (pmu_kind) { 2219 case PMU_OHARE_BASED: 2220 error = powerbook_sleep_3400(); 2221 break; 2222 case PMU_HEATHROW_BASED: 2223 case PMU_PADDINGTON_BASED: 2224 error = powerbook_sleep_grackle(); 2225 break; 2226 case PMU_KEYLARGO_BASED: 2227 error = powerbook_sleep_Core99(); 2228 break; 2229 default: 2230 return -ENOSYS; 2231 } 2232 2233 if (error) 2234 return error; 2235 2236 mdelay(100); 2237 2238 return 0; 2239 } 2240 2241 static void pmac_suspend_enable_irqs(void) 2242 { 2243 /* Force a poll of ADB interrupts */ 2244 adb_int_pending = 1; 2245 via_pmu_interrupt(0, NULL); 2246 2247 mdelay(10); 2248 2249 /* Call platform functions marked "on wake" */ 2250 pmac_pfunc_base_resume(); 2251 pmac_pfunc_i2c_resume(); 2252 } 2253 2254 static int pmu_sleep_valid(suspend_state_t state) 2255 { 2256 return state == PM_SUSPEND_MEM 2257 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0); 2258 } 2259 2260 static const struct platform_suspend_ops pmu_pm_ops = { 2261 .enter = powerbook_sleep, 2262 .valid = pmu_sleep_valid, 2263 }; 2264 2265 static int register_pmu_pm_ops(void) 2266 { 2267 if (pmu_kind == PMU_OHARE_BASED) 2268 powerbook_sleep_init_3400(); 2269 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs; 2270 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs; 2271 suspend_set_ops(&pmu_pm_ops); 2272 2273 return 0; 2274 } 2275 2276 device_initcall(register_pmu_pm_ops); 2277 #endif 2278 2279 static int pmu_ioctl(struct file *filp, 2280 u_int cmd, u_long arg) 2281 { 2282 __u32 __user *argp = (__u32 __user *)arg; 2283 int error = -EINVAL; 2284 2285 switch (cmd) { 2286 case PMU_IOC_SLEEP: 2287 if (!capable(CAP_SYS_ADMIN)) 2288 return -EACCES; 2289 return pm_suspend(PM_SUSPEND_MEM); 2290 case PMU_IOC_CAN_SLEEP: 2291 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0) 2292 return put_user(0, argp); 2293 else 2294 return put_user(1, argp); 2295 2296 #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY 2297 /* Compatibility ioctl's for backlight */ 2298 case PMU_IOC_GET_BACKLIGHT: 2299 { 2300 int brightness; 2301 2302 brightness = pmac_backlight_get_legacy_brightness(); 2303 if (brightness < 0) 2304 return brightness; 2305 else 2306 return put_user(brightness, argp); 2307 2308 } 2309 case PMU_IOC_SET_BACKLIGHT: 2310 { 2311 int brightness; 2312 2313 error = get_user(brightness, argp); 2314 if (error) 2315 return error; 2316 2317 return pmac_backlight_set_legacy_brightness(brightness); 2318 } 2319 #ifdef CONFIG_INPUT_ADBHID 2320 case PMU_IOC_GRAB_BACKLIGHT: { 2321 struct pmu_private *pp = filp->private_data; 2322 2323 if (pp->backlight_locker) 2324 return 0; 2325 2326 pp->backlight_locker = 1; 2327 pmac_backlight_disable(); 2328 2329 return 0; 2330 } 2331 #endif /* CONFIG_INPUT_ADBHID */ 2332 #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */ 2333 2334 case PMU_IOC_GET_MODEL: 2335 return put_user(pmu_kind, argp); 2336 case PMU_IOC_HAS_ADB: 2337 return put_user(pmu_has_adb, argp); 2338 } 2339 return error; 2340 } 2341 2342 static long pmu_unlocked_ioctl(struct file *filp, 2343 u_int cmd, u_long arg) 2344 { 2345 int ret; 2346 2347 mutex_lock(&pmu_info_proc_mutex); 2348 ret = pmu_ioctl(filp, cmd, arg); 2349 mutex_unlock(&pmu_info_proc_mutex); 2350 2351 return ret; 2352 } 2353 2354 #ifdef CONFIG_COMPAT 2355 #define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t) 2356 #define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t) 2357 #define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t) 2358 #define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t) 2359 #define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t) 2360 #define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t) 2361 2362 static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg) 2363 { 2364 switch (cmd) { 2365 case PMU_IOC_SLEEP: 2366 break; 2367 case PMU_IOC_GET_BACKLIGHT32: 2368 cmd = PMU_IOC_GET_BACKLIGHT; 2369 break; 2370 case PMU_IOC_SET_BACKLIGHT32: 2371 cmd = PMU_IOC_SET_BACKLIGHT; 2372 break; 2373 case PMU_IOC_GET_MODEL32: 2374 cmd = PMU_IOC_GET_MODEL; 2375 break; 2376 case PMU_IOC_HAS_ADB32: 2377 cmd = PMU_IOC_HAS_ADB; 2378 break; 2379 case PMU_IOC_CAN_SLEEP32: 2380 cmd = PMU_IOC_CAN_SLEEP; 2381 break; 2382 case PMU_IOC_GRAB_BACKLIGHT32: 2383 cmd = PMU_IOC_GRAB_BACKLIGHT; 2384 break; 2385 default: 2386 return -ENOIOCTLCMD; 2387 } 2388 return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg)); 2389 } 2390 #endif 2391 2392 static const struct file_operations pmu_device_fops = { 2393 .read = pmu_read, 2394 .write = pmu_write, 2395 .poll = pmu_fpoll, 2396 .unlocked_ioctl = pmu_unlocked_ioctl, 2397 #ifdef CONFIG_COMPAT 2398 .compat_ioctl = compat_pmu_ioctl, 2399 #endif 2400 .open = pmu_open, 2401 .release = pmu_release, 2402 .llseek = noop_llseek, 2403 }; 2404 2405 static struct miscdevice pmu_device = { 2406 PMU_MINOR, "pmu", &pmu_device_fops 2407 }; 2408 2409 static int pmu_device_init(void) 2410 { 2411 if (!via) 2412 return 0; 2413 if (misc_register(&pmu_device) < 0) 2414 printk(KERN_ERR "via-pmu: cannot register misc device.\n"); 2415 return 0; 2416 } 2417 device_initcall(pmu_device_init); 2418 2419 2420 #ifdef DEBUG_SLEEP 2421 static inline void 2422 polled_handshake(volatile unsigned char __iomem *via) 2423 { 2424 via[B] &= ~TREQ; eieio(); 2425 while ((via[B] & TACK) != 0) 2426 ; 2427 via[B] |= TREQ; eieio(); 2428 while ((via[B] & TACK) == 0) 2429 ; 2430 } 2431 2432 static inline void 2433 polled_send_byte(volatile unsigned char __iomem *via, int x) 2434 { 2435 via[ACR] |= SR_OUT | SR_EXT; eieio(); 2436 via[SR] = x; eieio(); 2437 polled_handshake(via); 2438 } 2439 2440 static inline int 2441 polled_recv_byte(volatile unsigned char __iomem *via) 2442 { 2443 int x; 2444 2445 via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio(); 2446 x = via[SR]; eieio(); 2447 polled_handshake(via); 2448 x = via[SR]; eieio(); 2449 return x; 2450 } 2451 2452 int 2453 pmu_polled_request(struct adb_request *req) 2454 { 2455 unsigned long flags; 2456 int i, l, c; 2457 volatile unsigned char __iomem *v = via; 2458 2459 req->complete = 1; 2460 c = req->data[0]; 2461 l = pmu_data_len[c][0]; 2462 if (l >= 0 && req->nbytes != l + 1) 2463 return -EINVAL; 2464 2465 local_irq_save(flags); 2466 while (pmu_state != idle) 2467 pmu_poll(); 2468 2469 while ((via[B] & TACK) == 0) 2470 ; 2471 polled_send_byte(v, c); 2472 if (l < 0) { 2473 l = req->nbytes - 1; 2474 polled_send_byte(v, l); 2475 } 2476 for (i = 1; i <= l; ++i) 2477 polled_send_byte(v, req->data[i]); 2478 2479 l = pmu_data_len[c][1]; 2480 if (l < 0) 2481 l = polled_recv_byte(v); 2482 for (i = 0; i < l; ++i) 2483 req->reply[i + req->reply_len] = polled_recv_byte(v); 2484 2485 if (req->done) 2486 (*req->done)(req); 2487 2488 local_irq_restore(flags); 2489 return 0; 2490 } 2491 2492 /* N.B. This doesn't work on the 3400 */ 2493 void pmu_blink(int n) 2494 { 2495 struct adb_request req; 2496 2497 memset(&req, 0, sizeof(req)); 2498 2499 for (; n > 0; --n) { 2500 req.nbytes = 4; 2501 req.done = NULL; 2502 req.data[0] = 0xee; 2503 req.data[1] = 4; 2504 req.data[2] = 0; 2505 req.data[3] = 1; 2506 req.reply[0] = ADB_RET_OK; 2507 req.reply_len = 1; 2508 req.reply_expected = 0; 2509 pmu_polled_request(&req); 2510 mdelay(50); 2511 req.nbytes = 4; 2512 req.done = NULL; 2513 req.data[0] = 0xee; 2514 req.data[1] = 4; 2515 req.data[2] = 0; 2516 req.data[3] = 0; 2517 req.reply[0] = ADB_RET_OK; 2518 req.reply_len = 1; 2519 req.reply_expected = 0; 2520 pmu_polled_request(&req); 2521 mdelay(50); 2522 } 2523 mdelay(50); 2524 } 2525 #endif /* DEBUG_SLEEP */ 2526 2527 #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32) 2528 int pmu_sys_suspended; 2529 2530 static int pmu_syscore_suspend(void) 2531 { 2532 /* Suspend PMU event interrupts */ 2533 pmu_suspend(); 2534 pmu_sys_suspended = 1; 2535 2536 #ifdef CONFIG_PMAC_BACKLIGHT 2537 /* Tell backlight code not to muck around with the chip anymore */ 2538 pmu_backlight_set_sleep(1); 2539 #endif 2540 2541 return 0; 2542 } 2543 2544 static void pmu_syscore_resume(void) 2545 { 2546 struct adb_request req; 2547 2548 if (!pmu_sys_suspended) 2549 return; 2550 2551 /* Tell PMU we are ready */ 2552 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); 2553 pmu_wait_complete(&req); 2554 2555 #ifdef CONFIG_PMAC_BACKLIGHT 2556 /* Tell backlight code it can use the chip again */ 2557 pmu_backlight_set_sleep(0); 2558 #endif 2559 /* Resume PMU event interrupts */ 2560 pmu_resume(); 2561 pmu_sys_suspended = 0; 2562 } 2563 2564 static struct syscore_ops pmu_syscore_ops = { 2565 .suspend = pmu_syscore_suspend, 2566 .resume = pmu_syscore_resume, 2567 }; 2568 2569 static int pmu_syscore_register(void) 2570 { 2571 register_syscore_ops(&pmu_syscore_ops); 2572 2573 return 0; 2574 } 2575 subsys_initcall(pmu_syscore_register); 2576 #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */ 2577 2578 EXPORT_SYMBOL(pmu_request); 2579 EXPORT_SYMBOL(pmu_queue_request); 2580 EXPORT_SYMBOL(pmu_poll); 2581 EXPORT_SYMBOL(pmu_poll_adb); 2582 EXPORT_SYMBOL(pmu_wait_complete); 2583 EXPORT_SYMBOL(pmu_suspend); 2584 EXPORT_SYMBOL(pmu_resume); 2585 EXPORT_SYMBOL(pmu_unlock); 2586 #if defined(CONFIG_PPC32) 2587 EXPORT_SYMBOL(pmu_enable_irled); 2588 EXPORT_SYMBOL(pmu_battery_count); 2589 EXPORT_SYMBOL(pmu_batteries); 2590 EXPORT_SYMBOL(pmu_power_flags); 2591 #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */ 2592 2593