1 /* 2 * PowerMac G5 SMU driver 3 * 4 * Copyright 2004 J. Mayer <l_indien@magic.fr> 5 * Copyright 2005 Benjamin Herrenschmidt, IBM Corp. 6 * 7 * Released under the term of the GNU GPL v2. 8 */ 9 10 /* 11 * TODO: 12 * - maybe add timeout to commands ? 13 * - blocking version of time functions 14 * - polling version of i2c commands (including timer that works with 15 * interrupts off) 16 * - maybe avoid some data copies with i2c by directly using the smu cmd 17 * buffer and a lower level internal interface 18 * - understand SMU -> CPU events and implement reception of them via 19 * the userland interface 20 */ 21 22 #include <linux/types.h> 23 #include <linux/kernel.h> 24 #include <linux/device.h> 25 #include <linux/dmapool.h> 26 #include <linux/bootmem.h> 27 #include <linux/vmalloc.h> 28 #include <linux/highmem.h> 29 #include <linux/jiffies.h> 30 #include <linux/interrupt.h> 31 #include <linux/rtc.h> 32 #include <linux/completion.h> 33 #include <linux/miscdevice.h> 34 #include <linux/delay.h> 35 #include <linux/poll.h> 36 #include <linux/mutex.h> 37 #include <linux/of_device.h> 38 #include <linux/of_irq.h> 39 #include <linux/of_platform.h> 40 #include <linux/slab.h> 41 #include <linux/memblock.h> 42 #include <linux/sched/signal.h> 43 44 #include <asm/byteorder.h> 45 #include <asm/io.h> 46 #include <asm/prom.h> 47 #include <asm/machdep.h> 48 #include <asm/pmac_feature.h> 49 #include <asm/smu.h> 50 #include <asm/sections.h> 51 #include <linux/uaccess.h> 52 53 #define VERSION "0.7" 54 #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp." 55 56 #undef DEBUG_SMU 57 58 #ifdef DEBUG_SMU 59 #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0) 60 #else 61 #define DPRINTK(fmt, args...) do { } while (0) 62 #endif 63 64 /* 65 * This is the command buffer passed to the SMU hardware 66 */ 67 #define SMU_MAX_DATA 254 68 69 struct smu_cmd_buf { 70 u8 cmd; 71 u8 length; 72 u8 data[SMU_MAX_DATA]; 73 }; 74 75 struct smu_device { 76 spinlock_t lock; 77 struct device_node *of_node; 78 struct platform_device *of_dev; 79 int doorbell; /* doorbell gpio */ 80 u32 __iomem *db_buf; /* doorbell buffer */ 81 struct device_node *db_node; 82 unsigned int db_irq; 83 int msg; 84 struct device_node *msg_node; 85 unsigned int msg_irq; 86 struct smu_cmd_buf *cmd_buf; /* command buffer virtual */ 87 u32 cmd_buf_abs; /* command buffer absolute */ 88 struct list_head cmd_list; 89 struct smu_cmd *cmd_cur; /* pending command */ 90 int broken_nap; 91 struct list_head cmd_i2c_list; 92 struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */ 93 struct timer_list i2c_timer; 94 }; 95 96 /* 97 * I don't think there will ever be more than one SMU, so 98 * for now, just hard code that 99 */ 100 static DEFINE_MUTEX(smu_mutex); 101 static struct smu_device *smu; 102 static DEFINE_MUTEX(smu_part_access); 103 static int smu_irq_inited; 104 static unsigned long smu_cmdbuf_abs; 105 106 static void smu_i2c_retry(struct timer_list *t); 107 108 /* 109 * SMU driver low level stuff 110 */ 111 112 static void smu_start_cmd(void) 113 { 114 unsigned long faddr, fend; 115 struct smu_cmd *cmd; 116 117 if (list_empty(&smu->cmd_list)) 118 return; 119 120 /* Fetch first command in queue */ 121 cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link); 122 smu->cmd_cur = cmd; 123 list_del(&cmd->link); 124 125 DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd, 126 cmd->data_len); 127 DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf); 128 129 /* Fill the SMU command buffer */ 130 smu->cmd_buf->cmd = cmd->cmd; 131 smu->cmd_buf->length = cmd->data_len; 132 memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len); 133 134 /* Flush command and data to RAM */ 135 faddr = (unsigned long)smu->cmd_buf; 136 fend = faddr + smu->cmd_buf->length + 2; 137 flush_inval_dcache_range(faddr, fend); 138 139 140 /* We also disable NAP mode for the duration of the command 141 * on U3 based machines. 142 * This is slightly racy as it can be written back to 1 by a sysctl 143 * but that never happens in practice. There seem to be an issue with 144 * U3 based machines such as the iMac G5 where napping for the 145 * whole duration of the command prevents the SMU from fetching it 146 * from memory. This might be related to the strange i2c based 147 * mechanism the SMU uses to access memory. 148 */ 149 if (smu->broken_nap) 150 powersave_nap = 0; 151 152 /* This isn't exactly a DMA mapping here, I suspect 153 * the SMU is actually communicating with us via i2c to the 154 * northbridge or the CPU to access RAM. 155 */ 156 writel(smu->cmd_buf_abs, smu->db_buf); 157 158 /* Ring the SMU doorbell */ 159 pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4); 160 } 161 162 163 static irqreturn_t smu_db_intr(int irq, void *arg) 164 { 165 unsigned long flags; 166 struct smu_cmd *cmd; 167 void (*done)(struct smu_cmd *cmd, void *misc) = NULL; 168 void *misc = NULL; 169 u8 gpio; 170 int rc = 0; 171 172 /* SMU completed the command, well, we hope, let's make sure 173 * of it 174 */ 175 spin_lock_irqsave(&smu->lock, flags); 176 177 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); 178 if ((gpio & 7) != 7) { 179 spin_unlock_irqrestore(&smu->lock, flags); 180 return IRQ_HANDLED; 181 } 182 183 cmd = smu->cmd_cur; 184 smu->cmd_cur = NULL; 185 if (cmd == NULL) 186 goto bail; 187 188 if (rc == 0) { 189 unsigned long faddr; 190 int reply_len; 191 u8 ack; 192 193 /* CPU might have brought back the cache line, so we need 194 * to flush again before peeking at the SMU response. We 195 * flush the entire buffer for now as we haven't read the 196 * reply length (it's only 2 cache lines anyway) 197 */ 198 faddr = (unsigned long)smu->cmd_buf; 199 flush_inval_dcache_range(faddr, faddr + 256); 200 201 /* Now check ack */ 202 ack = (~cmd->cmd) & 0xff; 203 if (ack != smu->cmd_buf->cmd) { 204 DPRINTK("SMU: incorrect ack, want %x got %x\n", 205 ack, smu->cmd_buf->cmd); 206 rc = -EIO; 207 } 208 reply_len = rc == 0 ? smu->cmd_buf->length : 0; 209 DPRINTK("SMU: reply len: %d\n", reply_len); 210 if (reply_len > cmd->reply_len) { 211 printk(KERN_WARNING "SMU: reply buffer too small," 212 "got %d bytes for a %d bytes buffer\n", 213 reply_len, cmd->reply_len); 214 reply_len = cmd->reply_len; 215 } 216 cmd->reply_len = reply_len; 217 if (cmd->reply_buf && reply_len) 218 memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len); 219 } 220 221 /* Now complete the command. Write status last in order as we lost 222 * ownership of the command structure as soon as it's no longer -1 223 */ 224 done = cmd->done; 225 misc = cmd->misc; 226 mb(); 227 cmd->status = rc; 228 229 /* Re-enable NAP mode */ 230 if (smu->broken_nap) 231 powersave_nap = 1; 232 bail: 233 /* Start next command if any */ 234 smu_start_cmd(); 235 spin_unlock_irqrestore(&smu->lock, flags); 236 237 /* Call command completion handler if any */ 238 if (done) 239 done(cmd, misc); 240 241 /* It's an edge interrupt, nothing to do */ 242 return IRQ_HANDLED; 243 } 244 245 246 static irqreturn_t smu_msg_intr(int irq, void *arg) 247 { 248 /* I don't quite know what to do with this one, we seem to never 249 * receive it, so I suspect we have to arm it someway in the SMU 250 * to start getting events that way. 251 */ 252 253 printk(KERN_INFO "SMU: message interrupt !\n"); 254 255 /* It's an edge interrupt, nothing to do */ 256 return IRQ_HANDLED; 257 } 258 259 260 /* 261 * Queued command management. 262 * 263 */ 264 265 int smu_queue_cmd(struct smu_cmd *cmd) 266 { 267 unsigned long flags; 268 269 if (smu == NULL) 270 return -ENODEV; 271 if (cmd->data_len > SMU_MAX_DATA || 272 cmd->reply_len > SMU_MAX_DATA) 273 return -EINVAL; 274 275 cmd->status = 1; 276 spin_lock_irqsave(&smu->lock, flags); 277 list_add_tail(&cmd->link, &smu->cmd_list); 278 if (smu->cmd_cur == NULL) 279 smu_start_cmd(); 280 spin_unlock_irqrestore(&smu->lock, flags); 281 282 /* Workaround for early calls when irq isn't available */ 283 if (!smu_irq_inited || !smu->db_irq) 284 smu_spinwait_cmd(cmd); 285 286 return 0; 287 } 288 EXPORT_SYMBOL(smu_queue_cmd); 289 290 291 int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command, 292 unsigned int data_len, 293 void (*done)(struct smu_cmd *cmd, void *misc), 294 void *misc, ...) 295 { 296 struct smu_cmd *cmd = &scmd->cmd; 297 va_list list; 298 int i; 299 300 if (data_len > sizeof(scmd->buffer)) 301 return -EINVAL; 302 303 memset(scmd, 0, sizeof(*scmd)); 304 cmd->cmd = command; 305 cmd->data_len = data_len; 306 cmd->data_buf = scmd->buffer; 307 cmd->reply_len = sizeof(scmd->buffer); 308 cmd->reply_buf = scmd->buffer; 309 cmd->done = done; 310 cmd->misc = misc; 311 312 va_start(list, misc); 313 for (i = 0; i < data_len; ++i) 314 scmd->buffer[i] = (u8)va_arg(list, int); 315 va_end(list); 316 317 return smu_queue_cmd(cmd); 318 } 319 EXPORT_SYMBOL(smu_queue_simple); 320 321 322 void smu_poll(void) 323 { 324 u8 gpio; 325 326 if (smu == NULL) 327 return; 328 329 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); 330 if ((gpio & 7) == 7) 331 smu_db_intr(smu->db_irq, smu); 332 } 333 EXPORT_SYMBOL(smu_poll); 334 335 336 void smu_done_complete(struct smu_cmd *cmd, void *misc) 337 { 338 struct completion *comp = misc; 339 340 complete(comp); 341 } 342 EXPORT_SYMBOL(smu_done_complete); 343 344 345 void smu_spinwait_cmd(struct smu_cmd *cmd) 346 { 347 while(cmd->status == 1) 348 smu_poll(); 349 } 350 EXPORT_SYMBOL(smu_spinwait_cmd); 351 352 353 /* RTC low level commands */ 354 static inline int bcd2hex (int n) 355 { 356 return (((n & 0xf0) >> 4) * 10) + (n & 0xf); 357 } 358 359 360 static inline int hex2bcd (int n) 361 { 362 return ((n / 10) << 4) + (n % 10); 363 } 364 365 366 static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf, 367 struct rtc_time *time) 368 { 369 cmd_buf->cmd = 0x8e; 370 cmd_buf->length = 8; 371 cmd_buf->data[0] = 0x80; 372 cmd_buf->data[1] = hex2bcd(time->tm_sec); 373 cmd_buf->data[2] = hex2bcd(time->tm_min); 374 cmd_buf->data[3] = hex2bcd(time->tm_hour); 375 cmd_buf->data[4] = time->tm_wday; 376 cmd_buf->data[5] = hex2bcd(time->tm_mday); 377 cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1; 378 cmd_buf->data[7] = hex2bcd(time->tm_year - 100); 379 } 380 381 382 int smu_get_rtc_time(struct rtc_time *time, int spinwait) 383 { 384 struct smu_simple_cmd cmd; 385 int rc; 386 387 if (smu == NULL) 388 return -ENODEV; 389 390 memset(time, 0, sizeof(struct rtc_time)); 391 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL, 392 SMU_CMD_RTC_GET_DATETIME); 393 if (rc) 394 return rc; 395 smu_spinwait_simple(&cmd); 396 397 time->tm_sec = bcd2hex(cmd.buffer[0]); 398 time->tm_min = bcd2hex(cmd.buffer[1]); 399 time->tm_hour = bcd2hex(cmd.buffer[2]); 400 time->tm_wday = bcd2hex(cmd.buffer[3]); 401 time->tm_mday = bcd2hex(cmd.buffer[4]); 402 time->tm_mon = bcd2hex(cmd.buffer[5]) - 1; 403 time->tm_year = bcd2hex(cmd.buffer[6]) + 100; 404 405 return 0; 406 } 407 408 409 int smu_set_rtc_time(struct rtc_time *time, int spinwait) 410 { 411 struct smu_simple_cmd cmd; 412 int rc; 413 414 if (smu == NULL) 415 return -ENODEV; 416 417 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL, 418 SMU_CMD_RTC_SET_DATETIME, 419 hex2bcd(time->tm_sec), 420 hex2bcd(time->tm_min), 421 hex2bcd(time->tm_hour), 422 time->tm_wday, 423 hex2bcd(time->tm_mday), 424 hex2bcd(time->tm_mon) + 1, 425 hex2bcd(time->tm_year - 100)); 426 if (rc) 427 return rc; 428 smu_spinwait_simple(&cmd); 429 430 return 0; 431 } 432 433 434 void smu_shutdown(void) 435 { 436 struct smu_simple_cmd cmd; 437 438 if (smu == NULL) 439 return; 440 441 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL, 442 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0)) 443 return; 444 smu_spinwait_simple(&cmd); 445 for (;;) 446 ; 447 } 448 449 450 void smu_restart(void) 451 { 452 struct smu_simple_cmd cmd; 453 454 if (smu == NULL) 455 return; 456 457 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL, 458 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0)) 459 return; 460 smu_spinwait_simple(&cmd); 461 for (;;) 462 ; 463 } 464 465 466 int smu_present(void) 467 { 468 return smu != NULL; 469 } 470 EXPORT_SYMBOL(smu_present); 471 472 473 int __init smu_init (void) 474 { 475 struct device_node *np; 476 const u32 *data; 477 int ret = 0; 478 479 np = of_find_node_by_type(NULL, "smu"); 480 if (np == NULL) 481 return -ENODEV; 482 483 printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR); 484 485 /* 486 * SMU based G5s need some memory below 2Gb. Thankfully this is 487 * called at a time where memblock is still available. 488 */ 489 smu_cmdbuf_abs = memblock_alloc_base(4096, 4096, 0x80000000UL); 490 if (smu_cmdbuf_abs == 0) { 491 printk(KERN_ERR "SMU: Command buffer allocation failed !\n"); 492 ret = -EINVAL; 493 goto fail_np; 494 } 495 496 smu = alloc_bootmem(sizeof(struct smu_device)); 497 498 spin_lock_init(&smu->lock); 499 INIT_LIST_HEAD(&smu->cmd_list); 500 INIT_LIST_HEAD(&smu->cmd_i2c_list); 501 smu->of_node = np; 502 smu->db_irq = 0; 503 smu->msg_irq = 0; 504 505 /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a 506 * 32 bits value safely 507 */ 508 smu->cmd_buf_abs = (u32)smu_cmdbuf_abs; 509 smu->cmd_buf = __va(smu_cmdbuf_abs); 510 511 smu->db_node = of_find_node_by_name(NULL, "smu-doorbell"); 512 if (smu->db_node == NULL) { 513 printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n"); 514 ret = -ENXIO; 515 goto fail_bootmem; 516 } 517 data = of_get_property(smu->db_node, "reg", NULL); 518 if (data == NULL) { 519 printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n"); 520 ret = -ENXIO; 521 goto fail_db_node; 522 } 523 524 /* Current setup has one doorbell GPIO that does both doorbell 525 * and ack. GPIOs are at 0x50, best would be to find that out 526 * in the device-tree though. 527 */ 528 smu->doorbell = *data; 529 if (smu->doorbell < 0x50) 530 smu->doorbell += 0x50; 531 532 /* Now look for the smu-interrupt GPIO */ 533 do { 534 smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt"); 535 if (smu->msg_node == NULL) 536 break; 537 data = of_get_property(smu->msg_node, "reg", NULL); 538 if (data == NULL) { 539 of_node_put(smu->msg_node); 540 smu->msg_node = NULL; 541 break; 542 } 543 smu->msg = *data; 544 if (smu->msg < 0x50) 545 smu->msg += 0x50; 546 } while(0); 547 548 /* Doorbell buffer is currently hard-coded, I didn't find a proper 549 * device-tree entry giving the address. Best would probably to use 550 * an offset for K2 base though, but let's do it that way for now. 551 */ 552 smu->db_buf = ioremap(0x8000860c, 0x1000); 553 if (smu->db_buf == NULL) { 554 printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n"); 555 ret = -ENXIO; 556 goto fail_msg_node; 557 } 558 559 /* U3 has an issue with NAP mode when issuing SMU commands */ 560 smu->broken_nap = pmac_get_uninorth_variant() < 4; 561 if (smu->broken_nap) 562 printk(KERN_INFO "SMU: using NAP mode workaround\n"); 563 564 sys_ctrler = SYS_CTRLER_SMU; 565 return 0; 566 567 fail_msg_node: 568 of_node_put(smu->msg_node); 569 fail_db_node: 570 of_node_put(smu->db_node); 571 fail_bootmem: 572 free_bootmem(__pa(smu), sizeof(struct smu_device)); 573 smu = NULL; 574 fail_np: 575 of_node_put(np); 576 return ret; 577 } 578 579 580 static int smu_late_init(void) 581 { 582 if (!smu) 583 return 0; 584 585 timer_setup(&smu->i2c_timer, smu_i2c_retry, 0); 586 587 if (smu->db_node) { 588 smu->db_irq = irq_of_parse_and_map(smu->db_node, 0); 589 if (!smu->db_irq) 590 printk(KERN_ERR "smu: failed to map irq for node %pOF\n", 591 smu->db_node); 592 } 593 if (smu->msg_node) { 594 smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0); 595 if (!smu->msg_irq) 596 printk(KERN_ERR "smu: failed to map irq for node %pOF\n", 597 smu->msg_node); 598 } 599 600 /* 601 * Try to request the interrupts 602 */ 603 604 if (smu->db_irq) { 605 if (request_irq(smu->db_irq, smu_db_intr, 606 IRQF_SHARED, "SMU doorbell", smu) < 0) { 607 printk(KERN_WARNING "SMU: can't " 608 "request interrupt %d\n", 609 smu->db_irq); 610 smu->db_irq = 0; 611 } 612 } 613 614 if (smu->msg_irq) { 615 if (request_irq(smu->msg_irq, smu_msg_intr, 616 IRQF_SHARED, "SMU message", smu) < 0) { 617 printk(KERN_WARNING "SMU: can't " 618 "request interrupt %d\n", 619 smu->msg_irq); 620 smu->msg_irq = 0; 621 } 622 } 623 624 smu_irq_inited = 1; 625 return 0; 626 } 627 /* This has to be before arch_initcall as the low i2c stuff relies on the 628 * above having been done before we reach arch_initcalls 629 */ 630 core_initcall(smu_late_init); 631 632 /* 633 * sysfs visibility 634 */ 635 636 static void smu_expose_childs(struct work_struct *unused) 637 { 638 struct device_node *np; 639 640 for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;) 641 if (of_device_is_compatible(np, "smu-sensors")) 642 of_platform_device_create(np, "smu-sensors", 643 &smu->of_dev->dev); 644 } 645 646 static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs); 647 648 static int smu_platform_probe(struct platform_device* dev) 649 { 650 if (!smu) 651 return -ENODEV; 652 smu->of_dev = dev; 653 654 /* 655 * Ok, we are matched, now expose all i2c busses. We have to defer 656 * that unfortunately or it would deadlock inside the device model 657 */ 658 schedule_work(&smu_expose_childs_work); 659 660 return 0; 661 } 662 663 static const struct of_device_id smu_platform_match[] = 664 { 665 { 666 .type = "smu", 667 }, 668 {}, 669 }; 670 671 static struct platform_driver smu_of_platform_driver = 672 { 673 .driver = { 674 .name = "smu", 675 .of_match_table = smu_platform_match, 676 }, 677 .probe = smu_platform_probe, 678 }; 679 680 static int __init smu_init_sysfs(void) 681 { 682 /* 683 * For now, we don't power manage machines with an SMU chip, 684 * I'm a bit too far from figuring out how that works with those 685 * new chipsets, but that will come back and bite us 686 */ 687 platform_driver_register(&smu_of_platform_driver); 688 return 0; 689 } 690 691 device_initcall(smu_init_sysfs); 692 693 struct platform_device *smu_get_ofdev(void) 694 { 695 if (!smu) 696 return NULL; 697 return smu->of_dev; 698 } 699 700 EXPORT_SYMBOL_GPL(smu_get_ofdev); 701 702 /* 703 * i2c interface 704 */ 705 706 static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail) 707 { 708 void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done; 709 void *misc = cmd->misc; 710 unsigned long flags; 711 712 /* Check for read case */ 713 if (!fail && cmd->read) { 714 if (cmd->pdata[0] < 1) 715 fail = 1; 716 else 717 memcpy(cmd->info.data, &cmd->pdata[1], 718 cmd->info.datalen); 719 } 720 721 DPRINTK("SMU: completing, success: %d\n", !fail); 722 723 /* Update status and mark no pending i2c command with lock 724 * held so nobody comes in while we dequeue an eventual 725 * pending next i2c command 726 */ 727 spin_lock_irqsave(&smu->lock, flags); 728 smu->cmd_i2c_cur = NULL; 729 wmb(); 730 cmd->status = fail ? -EIO : 0; 731 732 /* Is there another i2c command waiting ? */ 733 if (!list_empty(&smu->cmd_i2c_list)) { 734 struct smu_i2c_cmd *newcmd; 735 736 /* Fetch it, new current, remove from list */ 737 newcmd = list_entry(smu->cmd_i2c_list.next, 738 struct smu_i2c_cmd, link); 739 smu->cmd_i2c_cur = newcmd; 740 list_del(&cmd->link); 741 742 /* Queue with low level smu */ 743 list_add_tail(&cmd->scmd.link, &smu->cmd_list); 744 if (smu->cmd_cur == NULL) 745 smu_start_cmd(); 746 } 747 spin_unlock_irqrestore(&smu->lock, flags); 748 749 /* Call command completion handler if any */ 750 if (done) 751 done(cmd, misc); 752 753 } 754 755 756 static void smu_i2c_retry(struct timer_list *unused) 757 { 758 struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur; 759 760 DPRINTK("SMU: i2c failure, requeuing...\n"); 761 762 /* requeue command simply by resetting reply_len */ 763 cmd->pdata[0] = 0xff; 764 cmd->scmd.reply_len = sizeof(cmd->pdata); 765 smu_queue_cmd(&cmd->scmd); 766 } 767 768 769 static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc) 770 { 771 struct smu_i2c_cmd *cmd = misc; 772 int fail = 0; 773 774 DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n", 775 cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len); 776 777 /* Check for possible status */ 778 if (scmd->status < 0) 779 fail = 1; 780 else if (cmd->read) { 781 if (cmd->stage == 0) 782 fail = cmd->pdata[0] != 0; 783 else 784 fail = cmd->pdata[0] >= 0x80; 785 } else { 786 fail = cmd->pdata[0] != 0; 787 } 788 789 /* Handle failures by requeuing command, after 5ms interval 790 */ 791 if (fail && --cmd->retries > 0) { 792 DPRINTK("SMU: i2c failure, starting timer...\n"); 793 BUG_ON(cmd != smu->cmd_i2c_cur); 794 if (!smu_irq_inited) { 795 mdelay(5); 796 smu_i2c_retry(NULL); 797 return; 798 } 799 mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5)); 800 return; 801 } 802 803 /* If failure or stage 1, command is complete */ 804 if (fail || cmd->stage != 0) { 805 smu_i2c_complete_command(cmd, fail); 806 return; 807 } 808 809 DPRINTK("SMU: going to stage 1\n"); 810 811 /* Ok, initial command complete, now poll status */ 812 scmd->reply_buf = cmd->pdata; 813 scmd->reply_len = sizeof(cmd->pdata); 814 scmd->data_buf = cmd->pdata; 815 scmd->data_len = 1; 816 cmd->pdata[0] = 0; 817 cmd->stage = 1; 818 cmd->retries = 20; 819 smu_queue_cmd(scmd); 820 } 821 822 823 int smu_queue_i2c(struct smu_i2c_cmd *cmd) 824 { 825 unsigned long flags; 826 827 if (smu == NULL) 828 return -ENODEV; 829 830 /* Fill most fields of scmd */ 831 cmd->scmd.cmd = SMU_CMD_I2C_COMMAND; 832 cmd->scmd.done = smu_i2c_low_completion; 833 cmd->scmd.misc = cmd; 834 cmd->scmd.reply_buf = cmd->pdata; 835 cmd->scmd.reply_len = sizeof(cmd->pdata); 836 cmd->scmd.data_buf = (u8 *)(char *)&cmd->info; 837 cmd->scmd.status = 1; 838 cmd->stage = 0; 839 cmd->pdata[0] = 0xff; 840 cmd->retries = 20; 841 cmd->status = 1; 842 843 /* Check transfer type, sanitize some "info" fields 844 * based on transfer type and do more checking 845 */ 846 cmd->info.caddr = cmd->info.devaddr; 847 cmd->read = cmd->info.devaddr & 0x01; 848 switch(cmd->info.type) { 849 case SMU_I2C_TRANSFER_SIMPLE: 850 memset(&cmd->info.sublen, 0, 4); 851 break; 852 case SMU_I2C_TRANSFER_COMBINED: 853 cmd->info.devaddr &= 0xfe; 854 case SMU_I2C_TRANSFER_STDSUB: 855 if (cmd->info.sublen > 3) 856 return -EINVAL; 857 break; 858 default: 859 return -EINVAL; 860 } 861 862 /* Finish setting up command based on transfer direction 863 */ 864 if (cmd->read) { 865 if (cmd->info.datalen > SMU_I2C_READ_MAX) 866 return -EINVAL; 867 memset(cmd->info.data, 0xff, cmd->info.datalen); 868 cmd->scmd.data_len = 9; 869 } else { 870 if (cmd->info.datalen > SMU_I2C_WRITE_MAX) 871 return -EINVAL; 872 cmd->scmd.data_len = 9 + cmd->info.datalen; 873 } 874 875 DPRINTK("SMU: i2c enqueuing command\n"); 876 DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n", 877 cmd->read ? "read" : "write", cmd->info.datalen, 878 cmd->info.bus, cmd->info.caddr, 879 cmd->info.subaddr[0], cmd->info.type); 880 881 882 /* Enqueue command in i2c list, and if empty, enqueue also in 883 * main command list 884 */ 885 spin_lock_irqsave(&smu->lock, flags); 886 if (smu->cmd_i2c_cur == NULL) { 887 smu->cmd_i2c_cur = cmd; 888 list_add_tail(&cmd->scmd.link, &smu->cmd_list); 889 if (smu->cmd_cur == NULL) 890 smu_start_cmd(); 891 } else 892 list_add_tail(&cmd->link, &smu->cmd_i2c_list); 893 spin_unlock_irqrestore(&smu->lock, flags); 894 895 return 0; 896 } 897 898 /* 899 * Handling of "partitions" 900 */ 901 902 static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len) 903 { 904 DECLARE_COMPLETION_ONSTACK(comp); 905 unsigned int chunk; 906 struct smu_cmd cmd; 907 int rc; 908 u8 params[8]; 909 910 /* We currently use a chunk size of 0xe. We could check the 911 * SMU firmware version and use bigger sizes though 912 */ 913 chunk = 0xe; 914 915 while (len) { 916 unsigned int clen = min(len, chunk); 917 918 cmd.cmd = SMU_CMD_MISC_ee_COMMAND; 919 cmd.data_len = 7; 920 cmd.data_buf = params; 921 cmd.reply_len = chunk; 922 cmd.reply_buf = dest; 923 cmd.done = smu_done_complete; 924 cmd.misc = ∁ 925 params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC; 926 params[1] = 0x4; 927 *((u32 *)¶ms[2]) = addr; 928 params[6] = clen; 929 930 rc = smu_queue_cmd(&cmd); 931 if (rc) 932 return rc; 933 wait_for_completion(&comp); 934 if (cmd.status != 0) 935 return rc; 936 if (cmd.reply_len != clen) { 937 printk(KERN_DEBUG "SMU: short read in " 938 "smu_read_datablock, got: %d, want: %d\n", 939 cmd.reply_len, clen); 940 return -EIO; 941 } 942 len -= clen; 943 addr += clen; 944 dest += clen; 945 } 946 return 0; 947 } 948 949 static struct smu_sdbp_header *smu_create_sdb_partition(int id) 950 { 951 DECLARE_COMPLETION_ONSTACK(comp); 952 struct smu_simple_cmd cmd; 953 unsigned int addr, len, tlen; 954 struct smu_sdbp_header *hdr; 955 struct property *prop; 956 957 /* First query the partition info */ 958 DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq); 959 smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2, 960 smu_done_complete, &comp, 961 SMU_CMD_PARTITION_LATEST, id); 962 wait_for_completion(&comp); 963 DPRINTK("SMU: done, status: %d, reply_len: %d\n", 964 cmd.cmd.status, cmd.cmd.reply_len); 965 966 /* Partition doesn't exist (or other error) */ 967 if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6) 968 return NULL; 969 970 /* Fetch address and length from reply */ 971 addr = *((u16 *)cmd.buffer); 972 len = cmd.buffer[3] << 2; 973 /* Calucluate total length to allocate, including the 17 bytes 974 * for "sdb-partition-XX" that we append at the end of the buffer 975 */ 976 tlen = sizeof(struct property) + len + 18; 977 978 prop = kzalloc(tlen, GFP_KERNEL); 979 if (prop == NULL) 980 return NULL; 981 hdr = (struct smu_sdbp_header *)(prop + 1); 982 prop->name = ((char *)prop) + tlen - 18; 983 sprintf(prop->name, "sdb-partition-%02x", id); 984 prop->length = len; 985 prop->value = hdr; 986 prop->next = NULL; 987 988 /* Read the datablock */ 989 if (smu_read_datablock((u8 *)hdr, addr, len)) { 990 printk(KERN_DEBUG "SMU: datablock read failed while reading " 991 "partition %02x !\n", id); 992 goto failure; 993 } 994 995 /* Got it, check a few things and create the property */ 996 if (hdr->id != id) { 997 printk(KERN_DEBUG "SMU: Reading partition %02x and got " 998 "%02x !\n", id, hdr->id); 999 goto failure; 1000 } 1001 if (of_add_property(smu->of_node, prop)) { 1002 printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x " 1003 "property !\n", id); 1004 goto failure; 1005 } 1006 1007 return hdr; 1008 failure: 1009 kfree(prop); 1010 return NULL; 1011 } 1012 1013 /* Note: Only allowed to return error code in pointers (using ERR_PTR) 1014 * when interruptible is 1 1015 */ 1016 const struct smu_sdbp_header *__smu_get_sdb_partition(int id, 1017 unsigned int *size, int interruptible) 1018 { 1019 char pname[32]; 1020 const struct smu_sdbp_header *part; 1021 1022 if (!smu) 1023 return NULL; 1024 1025 sprintf(pname, "sdb-partition-%02x", id); 1026 1027 DPRINTK("smu_get_sdb_partition(%02x)\n", id); 1028 1029 if (interruptible) { 1030 int rc; 1031 rc = mutex_lock_interruptible(&smu_part_access); 1032 if (rc) 1033 return ERR_PTR(rc); 1034 } else 1035 mutex_lock(&smu_part_access); 1036 1037 part = of_get_property(smu->of_node, pname, size); 1038 if (part == NULL) { 1039 DPRINTK("trying to extract from SMU ...\n"); 1040 part = smu_create_sdb_partition(id); 1041 if (part != NULL && size) 1042 *size = part->len << 2; 1043 } 1044 mutex_unlock(&smu_part_access); 1045 return part; 1046 } 1047 1048 const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size) 1049 { 1050 return __smu_get_sdb_partition(id, size, 0); 1051 } 1052 EXPORT_SYMBOL(smu_get_sdb_partition); 1053 1054 1055 /* 1056 * Userland driver interface 1057 */ 1058 1059 1060 static LIST_HEAD(smu_clist); 1061 static DEFINE_SPINLOCK(smu_clist_lock); 1062 1063 enum smu_file_mode { 1064 smu_file_commands, 1065 smu_file_events, 1066 smu_file_closing 1067 }; 1068 1069 struct smu_private 1070 { 1071 struct list_head list; 1072 enum smu_file_mode mode; 1073 int busy; 1074 struct smu_cmd cmd; 1075 spinlock_t lock; 1076 wait_queue_head_t wait; 1077 u8 buffer[SMU_MAX_DATA]; 1078 }; 1079 1080 1081 static int smu_open(struct inode *inode, struct file *file) 1082 { 1083 struct smu_private *pp; 1084 unsigned long flags; 1085 1086 pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL); 1087 if (pp == 0) 1088 return -ENOMEM; 1089 spin_lock_init(&pp->lock); 1090 pp->mode = smu_file_commands; 1091 init_waitqueue_head(&pp->wait); 1092 1093 mutex_lock(&smu_mutex); 1094 spin_lock_irqsave(&smu_clist_lock, flags); 1095 list_add(&pp->list, &smu_clist); 1096 spin_unlock_irqrestore(&smu_clist_lock, flags); 1097 file->private_data = pp; 1098 mutex_unlock(&smu_mutex); 1099 1100 return 0; 1101 } 1102 1103 1104 static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc) 1105 { 1106 struct smu_private *pp = misc; 1107 1108 wake_up_all(&pp->wait); 1109 } 1110 1111 1112 static ssize_t smu_write(struct file *file, const char __user *buf, 1113 size_t count, loff_t *ppos) 1114 { 1115 struct smu_private *pp = file->private_data; 1116 unsigned long flags; 1117 struct smu_user_cmd_hdr hdr; 1118 int rc = 0; 1119 1120 if (pp->busy) 1121 return -EBUSY; 1122 else if (copy_from_user(&hdr, buf, sizeof(hdr))) 1123 return -EFAULT; 1124 else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) { 1125 pp->mode = smu_file_events; 1126 return 0; 1127 } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) { 1128 const struct smu_sdbp_header *part; 1129 part = __smu_get_sdb_partition(hdr.cmd, NULL, 1); 1130 if (part == NULL) 1131 return -EINVAL; 1132 else if (IS_ERR(part)) 1133 return PTR_ERR(part); 1134 return 0; 1135 } else if (hdr.cmdtype != SMU_CMDTYPE_SMU) 1136 return -EINVAL; 1137 else if (pp->mode != smu_file_commands) 1138 return -EBADFD; 1139 else if (hdr.data_len > SMU_MAX_DATA) 1140 return -EINVAL; 1141 1142 spin_lock_irqsave(&pp->lock, flags); 1143 if (pp->busy) { 1144 spin_unlock_irqrestore(&pp->lock, flags); 1145 return -EBUSY; 1146 } 1147 pp->busy = 1; 1148 pp->cmd.status = 1; 1149 spin_unlock_irqrestore(&pp->lock, flags); 1150 1151 if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) { 1152 pp->busy = 0; 1153 return -EFAULT; 1154 } 1155 1156 pp->cmd.cmd = hdr.cmd; 1157 pp->cmd.data_len = hdr.data_len; 1158 pp->cmd.reply_len = SMU_MAX_DATA; 1159 pp->cmd.data_buf = pp->buffer; 1160 pp->cmd.reply_buf = pp->buffer; 1161 pp->cmd.done = smu_user_cmd_done; 1162 pp->cmd.misc = pp; 1163 rc = smu_queue_cmd(&pp->cmd); 1164 if (rc < 0) 1165 return rc; 1166 return count; 1167 } 1168 1169 1170 static ssize_t smu_read_command(struct file *file, struct smu_private *pp, 1171 char __user *buf, size_t count) 1172 { 1173 DECLARE_WAITQUEUE(wait, current); 1174 struct smu_user_reply_hdr hdr; 1175 unsigned long flags; 1176 int size, rc = 0; 1177 1178 if (!pp->busy) 1179 return 0; 1180 if (count < sizeof(struct smu_user_reply_hdr)) 1181 return -EOVERFLOW; 1182 spin_lock_irqsave(&pp->lock, flags); 1183 if (pp->cmd.status == 1) { 1184 if (file->f_flags & O_NONBLOCK) { 1185 spin_unlock_irqrestore(&pp->lock, flags); 1186 return -EAGAIN; 1187 } 1188 add_wait_queue(&pp->wait, &wait); 1189 for (;;) { 1190 set_current_state(TASK_INTERRUPTIBLE); 1191 rc = 0; 1192 if (pp->cmd.status != 1) 1193 break; 1194 rc = -ERESTARTSYS; 1195 if (signal_pending(current)) 1196 break; 1197 spin_unlock_irqrestore(&pp->lock, flags); 1198 schedule(); 1199 spin_lock_irqsave(&pp->lock, flags); 1200 } 1201 set_current_state(TASK_RUNNING); 1202 remove_wait_queue(&pp->wait, &wait); 1203 } 1204 spin_unlock_irqrestore(&pp->lock, flags); 1205 if (rc) 1206 return rc; 1207 if (pp->cmd.status != 0) 1208 pp->cmd.reply_len = 0; 1209 size = sizeof(hdr) + pp->cmd.reply_len; 1210 if (count < size) 1211 size = count; 1212 rc = size; 1213 hdr.status = pp->cmd.status; 1214 hdr.reply_len = pp->cmd.reply_len; 1215 if (copy_to_user(buf, &hdr, sizeof(hdr))) 1216 return -EFAULT; 1217 size -= sizeof(hdr); 1218 if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size)) 1219 return -EFAULT; 1220 pp->busy = 0; 1221 1222 return rc; 1223 } 1224 1225 1226 static ssize_t smu_read_events(struct file *file, struct smu_private *pp, 1227 char __user *buf, size_t count) 1228 { 1229 /* Not implemented */ 1230 msleep_interruptible(1000); 1231 return 0; 1232 } 1233 1234 1235 static ssize_t smu_read(struct file *file, char __user *buf, 1236 size_t count, loff_t *ppos) 1237 { 1238 struct smu_private *pp = file->private_data; 1239 1240 if (pp->mode == smu_file_commands) 1241 return smu_read_command(file, pp, buf, count); 1242 if (pp->mode == smu_file_events) 1243 return smu_read_events(file, pp, buf, count); 1244 1245 return -EBADFD; 1246 } 1247 1248 static __poll_t smu_fpoll(struct file *file, poll_table *wait) 1249 { 1250 struct smu_private *pp = file->private_data; 1251 __poll_t mask = 0; 1252 unsigned long flags; 1253 1254 if (pp == 0) 1255 return 0; 1256 1257 if (pp->mode == smu_file_commands) { 1258 poll_wait(file, &pp->wait, wait); 1259 1260 spin_lock_irqsave(&pp->lock, flags); 1261 if (pp->busy && pp->cmd.status != 1) 1262 mask |= EPOLLIN; 1263 spin_unlock_irqrestore(&pp->lock, flags); 1264 } 1265 if (pp->mode == smu_file_events) { 1266 /* Not yet implemented */ 1267 } 1268 return mask; 1269 } 1270 1271 static int smu_release(struct inode *inode, struct file *file) 1272 { 1273 struct smu_private *pp = file->private_data; 1274 unsigned long flags; 1275 unsigned int busy; 1276 1277 if (pp == 0) 1278 return 0; 1279 1280 file->private_data = NULL; 1281 1282 /* Mark file as closing to avoid races with new request */ 1283 spin_lock_irqsave(&pp->lock, flags); 1284 pp->mode = smu_file_closing; 1285 busy = pp->busy; 1286 1287 /* Wait for any pending request to complete */ 1288 if (busy && pp->cmd.status == 1) { 1289 DECLARE_WAITQUEUE(wait, current); 1290 1291 add_wait_queue(&pp->wait, &wait); 1292 for (;;) { 1293 set_current_state(TASK_UNINTERRUPTIBLE); 1294 if (pp->cmd.status != 1) 1295 break; 1296 spin_unlock_irqrestore(&pp->lock, flags); 1297 schedule(); 1298 spin_lock_irqsave(&pp->lock, flags); 1299 } 1300 set_current_state(TASK_RUNNING); 1301 remove_wait_queue(&pp->wait, &wait); 1302 } 1303 spin_unlock_irqrestore(&pp->lock, flags); 1304 1305 spin_lock_irqsave(&smu_clist_lock, flags); 1306 list_del(&pp->list); 1307 spin_unlock_irqrestore(&smu_clist_lock, flags); 1308 kfree(pp); 1309 1310 return 0; 1311 } 1312 1313 1314 static const struct file_operations smu_device_fops = { 1315 .llseek = no_llseek, 1316 .read = smu_read, 1317 .write = smu_write, 1318 .poll = smu_fpoll, 1319 .open = smu_open, 1320 .release = smu_release, 1321 }; 1322 1323 static struct miscdevice pmu_device = { 1324 MISC_DYNAMIC_MINOR, "smu", &smu_device_fops 1325 }; 1326 1327 static int smu_device_init(void) 1328 { 1329 if (!smu) 1330 return -ENODEV; 1331 if (misc_register(&pmu_device) < 0) 1332 printk(KERN_ERR "via-pmu: cannot register misc device.\n"); 1333 return 0; 1334 } 1335 device_initcall(smu_device_init); 1336