1 /* 2 * PowerMac G5 SMU driver 3 * 4 * Copyright 2004 J. Mayer <l_indien@magic.fr> 5 * Copyright 2005 Benjamin Herrenschmidt, IBM Corp. 6 * 7 * Released under the term of the GNU GPL v2. 8 */ 9 10 /* 11 * TODO: 12 * - maybe add timeout to commands ? 13 * - blocking version of time functions 14 * - polling version of i2c commands (including timer that works with 15 * interrupts off) 16 * - maybe avoid some data copies with i2c by directly using the smu cmd 17 * buffer and a lower level internal interface 18 * - understand SMU -> CPU events and implement reception of them via 19 * the userland interface 20 */ 21 22 #include <linux/types.h> 23 #include <linux/kernel.h> 24 #include <linux/device.h> 25 #include <linux/dmapool.h> 26 #include <linux/memblock.h> 27 #include <linux/vmalloc.h> 28 #include <linux/highmem.h> 29 #include <linux/jiffies.h> 30 #include <linux/interrupt.h> 31 #include <linux/rtc.h> 32 #include <linux/completion.h> 33 #include <linux/miscdevice.h> 34 #include <linux/delay.h> 35 #include <linux/poll.h> 36 #include <linux/mutex.h> 37 #include <linux/of_device.h> 38 #include <linux/of_irq.h> 39 #include <linux/of_platform.h> 40 #include <linux/slab.h> 41 #include <linux/sched/signal.h> 42 43 #include <asm/byteorder.h> 44 #include <asm/io.h> 45 #include <asm/prom.h> 46 #include <asm/machdep.h> 47 #include <asm/pmac_feature.h> 48 #include <asm/smu.h> 49 #include <asm/sections.h> 50 #include <linux/uaccess.h> 51 52 #define VERSION "0.7" 53 #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp." 54 55 #undef DEBUG_SMU 56 57 #ifdef DEBUG_SMU 58 #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0) 59 #else 60 #define DPRINTK(fmt, args...) do { } while (0) 61 #endif 62 63 /* 64 * This is the command buffer passed to the SMU hardware 65 */ 66 #define SMU_MAX_DATA 254 67 68 struct smu_cmd_buf { 69 u8 cmd; 70 u8 length; 71 u8 data[SMU_MAX_DATA]; 72 }; 73 74 struct smu_device { 75 spinlock_t lock; 76 struct device_node *of_node; 77 struct platform_device *of_dev; 78 int doorbell; /* doorbell gpio */ 79 u32 __iomem *db_buf; /* doorbell buffer */ 80 struct device_node *db_node; 81 unsigned int db_irq; 82 int msg; 83 struct device_node *msg_node; 84 unsigned int msg_irq; 85 struct smu_cmd_buf *cmd_buf; /* command buffer virtual */ 86 u32 cmd_buf_abs; /* command buffer absolute */ 87 struct list_head cmd_list; 88 struct smu_cmd *cmd_cur; /* pending command */ 89 int broken_nap; 90 struct list_head cmd_i2c_list; 91 struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */ 92 struct timer_list i2c_timer; 93 }; 94 95 /* 96 * I don't think there will ever be more than one SMU, so 97 * for now, just hard code that 98 */ 99 static DEFINE_MUTEX(smu_mutex); 100 static struct smu_device *smu; 101 static DEFINE_MUTEX(smu_part_access); 102 static int smu_irq_inited; 103 static unsigned long smu_cmdbuf_abs; 104 105 static void smu_i2c_retry(struct timer_list *t); 106 107 /* 108 * SMU driver low level stuff 109 */ 110 111 static void smu_start_cmd(void) 112 { 113 unsigned long faddr, fend; 114 struct smu_cmd *cmd; 115 116 if (list_empty(&smu->cmd_list)) 117 return; 118 119 /* Fetch first command in queue */ 120 cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link); 121 smu->cmd_cur = cmd; 122 list_del(&cmd->link); 123 124 DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd, 125 cmd->data_len); 126 DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf); 127 128 /* Fill the SMU command buffer */ 129 smu->cmd_buf->cmd = cmd->cmd; 130 smu->cmd_buf->length = cmd->data_len; 131 memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len); 132 133 /* Flush command and data to RAM */ 134 faddr = (unsigned long)smu->cmd_buf; 135 fend = faddr + smu->cmd_buf->length + 2; 136 flush_inval_dcache_range(faddr, fend); 137 138 139 /* We also disable NAP mode for the duration of the command 140 * on U3 based machines. 141 * This is slightly racy as it can be written back to 1 by a sysctl 142 * but that never happens in practice. There seem to be an issue with 143 * U3 based machines such as the iMac G5 where napping for the 144 * whole duration of the command prevents the SMU from fetching it 145 * from memory. This might be related to the strange i2c based 146 * mechanism the SMU uses to access memory. 147 */ 148 if (smu->broken_nap) 149 powersave_nap = 0; 150 151 /* This isn't exactly a DMA mapping here, I suspect 152 * the SMU is actually communicating with us via i2c to the 153 * northbridge or the CPU to access RAM. 154 */ 155 writel(smu->cmd_buf_abs, smu->db_buf); 156 157 /* Ring the SMU doorbell */ 158 pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4); 159 } 160 161 162 static irqreturn_t smu_db_intr(int irq, void *arg) 163 { 164 unsigned long flags; 165 struct smu_cmd *cmd; 166 void (*done)(struct smu_cmd *cmd, void *misc) = NULL; 167 void *misc = NULL; 168 u8 gpio; 169 int rc = 0; 170 171 /* SMU completed the command, well, we hope, let's make sure 172 * of it 173 */ 174 spin_lock_irqsave(&smu->lock, flags); 175 176 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); 177 if ((gpio & 7) != 7) { 178 spin_unlock_irqrestore(&smu->lock, flags); 179 return IRQ_HANDLED; 180 } 181 182 cmd = smu->cmd_cur; 183 smu->cmd_cur = NULL; 184 if (cmd == NULL) 185 goto bail; 186 187 if (rc == 0) { 188 unsigned long faddr; 189 int reply_len; 190 u8 ack; 191 192 /* CPU might have brought back the cache line, so we need 193 * to flush again before peeking at the SMU response. We 194 * flush the entire buffer for now as we haven't read the 195 * reply length (it's only 2 cache lines anyway) 196 */ 197 faddr = (unsigned long)smu->cmd_buf; 198 flush_inval_dcache_range(faddr, faddr + 256); 199 200 /* Now check ack */ 201 ack = (~cmd->cmd) & 0xff; 202 if (ack != smu->cmd_buf->cmd) { 203 DPRINTK("SMU: incorrect ack, want %x got %x\n", 204 ack, smu->cmd_buf->cmd); 205 rc = -EIO; 206 } 207 reply_len = rc == 0 ? smu->cmd_buf->length : 0; 208 DPRINTK("SMU: reply len: %d\n", reply_len); 209 if (reply_len > cmd->reply_len) { 210 printk(KERN_WARNING "SMU: reply buffer too small," 211 "got %d bytes for a %d bytes buffer\n", 212 reply_len, cmd->reply_len); 213 reply_len = cmd->reply_len; 214 } 215 cmd->reply_len = reply_len; 216 if (cmd->reply_buf && reply_len) 217 memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len); 218 } 219 220 /* Now complete the command. Write status last in order as we lost 221 * ownership of the command structure as soon as it's no longer -1 222 */ 223 done = cmd->done; 224 misc = cmd->misc; 225 mb(); 226 cmd->status = rc; 227 228 /* Re-enable NAP mode */ 229 if (smu->broken_nap) 230 powersave_nap = 1; 231 bail: 232 /* Start next command if any */ 233 smu_start_cmd(); 234 spin_unlock_irqrestore(&smu->lock, flags); 235 236 /* Call command completion handler if any */ 237 if (done) 238 done(cmd, misc); 239 240 /* It's an edge interrupt, nothing to do */ 241 return IRQ_HANDLED; 242 } 243 244 245 static irqreturn_t smu_msg_intr(int irq, void *arg) 246 { 247 /* I don't quite know what to do with this one, we seem to never 248 * receive it, so I suspect we have to arm it someway in the SMU 249 * to start getting events that way. 250 */ 251 252 printk(KERN_INFO "SMU: message interrupt !\n"); 253 254 /* It's an edge interrupt, nothing to do */ 255 return IRQ_HANDLED; 256 } 257 258 259 /* 260 * Queued command management. 261 * 262 */ 263 264 int smu_queue_cmd(struct smu_cmd *cmd) 265 { 266 unsigned long flags; 267 268 if (smu == NULL) 269 return -ENODEV; 270 if (cmd->data_len > SMU_MAX_DATA || 271 cmd->reply_len > SMU_MAX_DATA) 272 return -EINVAL; 273 274 cmd->status = 1; 275 spin_lock_irqsave(&smu->lock, flags); 276 list_add_tail(&cmd->link, &smu->cmd_list); 277 if (smu->cmd_cur == NULL) 278 smu_start_cmd(); 279 spin_unlock_irqrestore(&smu->lock, flags); 280 281 /* Workaround for early calls when irq isn't available */ 282 if (!smu_irq_inited || !smu->db_irq) 283 smu_spinwait_cmd(cmd); 284 285 return 0; 286 } 287 EXPORT_SYMBOL(smu_queue_cmd); 288 289 290 int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command, 291 unsigned int data_len, 292 void (*done)(struct smu_cmd *cmd, void *misc), 293 void *misc, ...) 294 { 295 struct smu_cmd *cmd = &scmd->cmd; 296 va_list list; 297 int i; 298 299 if (data_len > sizeof(scmd->buffer)) 300 return -EINVAL; 301 302 memset(scmd, 0, sizeof(*scmd)); 303 cmd->cmd = command; 304 cmd->data_len = data_len; 305 cmd->data_buf = scmd->buffer; 306 cmd->reply_len = sizeof(scmd->buffer); 307 cmd->reply_buf = scmd->buffer; 308 cmd->done = done; 309 cmd->misc = misc; 310 311 va_start(list, misc); 312 for (i = 0; i < data_len; ++i) 313 scmd->buffer[i] = (u8)va_arg(list, int); 314 va_end(list); 315 316 return smu_queue_cmd(cmd); 317 } 318 EXPORT_SYMBOL(smu_queue_simple); 319 320 321 void smu_poll(void) 322 { 323 u8 gpio; 324 325 if (smu == NULL) 326 return; 327 328 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); 329 if ((gpio & 7) == 7) 330 smu_db_intr(smu->db_irq, smu); 331 } 332 EXPORT_SYMBOL(smu_poll); 333 334 335 void smu_done_complete(struct smu_cmd *cmd, void *misc) 336 { 337 struct completion *comp = misc; 338 339 complete(comp); 340 } 341 EXPORT_SYMBOL(smu_done_complete); 342 343 344 void smu_spinwait_cmd(struct smu_cmd *cmd) 345 { 346 while(cmd->status == 1) 347 smu_poll(); 348 } 349 EXPORT_SYMBOL(smu_spinwait_cmd); 350 351 352 /* RTC low level commands */ 353 static inline int bcd2hex (int n) 354 { 355 return (((n & 0xf0) >> 4) * 10) + (n & 0xf); 356 } 357 358 359 static inline int hex2bcd (int n) 360 { 361 return ((n / 10) << 4) + (n % 10); 362 } 363 364 365 static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf, 366 struct rtc_time *time) 367 { 368 cmd_buf->cmd = 0x8e; 369 cmd_buf->length = 8; 370 cmd_buf->data[0] = 0x80; 371 cmd_buf->data[1] = hex2bcd(time->tm_sec); 372 cmd_buf->data[2] = hex2bcd(time->tm_min); 373 cmd_buf->data[3] = hex2bcd(time->tm_hour); 374 cmd_buf->data[4] = time->tm_wday; 375 cmd_buf->data[5] = hex2bcd(time->tm_mday); 376 cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1; 377 cmd_buf->data[7] = hex2bcd(time->tm_year - 100); 378 } 379 380 381 int smu_get_rtc_time(struct rtc_time *time, int spinwait) 382 { 383 struct smu_simple_cmd cmd; 384 int rc; 385 386 if (smu == NULL) 387 return -ENODEV; 388 389 memset(time, 0, sizeof(struct rtc_time)); 390 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL, 391 SMU_CMD_RTC_GET_DATETIME); 392 if (rc) 393 return rc; 394 smu_spinwait_simple(&cmd); 395 396 time->tm_sec = bcd2hex(cmd.buffer[0]); 397 time->tm_min = bcd2hex(cmd.buffer[1]); 398 time->tm_hour = bcd2hex(cmd.buffer[2]); 399 time->tm_wday = bcd2hex(cmd.buffer[3]); 400 time->tm_mday = bcd2hex(cmd.buffer[4]); 401 time->tm_mon = bcd2hex(cmd.buffer[5]) - 1; 402 time->tm_year = bcd2hex(cmd.buffer[6]) + 100; 403 404 return 0; 405 } 406 407 408 int smu_set_rtc_time(struct rtc_time *time, int spinwait) 409 { 410 struct smu_simple_cmd cmd; 411 int rc; 412 413 if (smu == NULL) 414 return -ENODEV; 415 416 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL, 417 SMU_CMD_RTC_SET_DATETIME, 418 hex2bcd(time->tm_sec), 419 hex2bcd(time->tm_min), 420 hex2bcd(time->tm_hour), 421 time->tm_wday, 422 hex2bcd(time->tm_mday), 423 hex2bcd(time->tm_mon) + 1, 424 hex2bcd(time->tm_year - 100)); 425 if (rc) 426 return rc; 427 smu_spinwait_simple(&cmd); 428 429 return 0; 430 } 431 432 433 void smu_shutdown(void) 434 { 435 struct smu_simple_cmd cmd; 436 437 if (smu == NULL) 438 return; 439 440 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL, 441 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0)) 442 return; 443 smu_spinwait_simple(&cmd); 444 for (;;) 445 ; 446 } 447 448 449 void smu_restart(void) 450 { 451 struct smu_simple_cmd cmd; 452 453 if (smu == NULL) 454 return; 455 456 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL, 457 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0)) 458 return; 459 smu_spinwait_simple(&cmd); 460 for (;;) 461 ; 462 } 463 464 465 int smu_present(void) 466 { 467 return smu != NULL; 468 } 469 EXPORT_SYMBOL(smu_present); 470 471 472 int __init smu_init (void) 473 { 474 struct device_node *np; 475 const u32 *data; 476 int ret = 0; 477 478 np = of_find_node_by_type(NULL, "smu"); 479 if (np == NULL) 480 return -ENODEV; 481 482 printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR); 483 484 /* 485 * SMU based G5s need some memory below 2Gb. Thankfully this is 486 * called at a time where memblock is still available. 487 */ 488 smu_cmdbuf_abs = memblock_alloc_base(4096, 4096, 0x80000000UL); 489 if (smu_cmdbuf_abs == 0) { 490 printk(KERN_ERR "SMU: Command buffer allocation failed !\n"); 491 ret = -EINVAL; 492 goto fail_np; 493 } 494 495 smu = memblock_alloc(sizeof(struct smu_device), SMP_CACHE_BYTES); 496 497 spin_lock_init(&smu->lock); 498 INIT_LIST_HEAD(&smu->cmd_list); 499 INIT_LIST_HEAD(&smu->cmd_i2c_list); 500 smu->of_node = np; 501 smu->db_irq = 0; 502 smu->msg_irq = 0; 503 504 /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a 505 * 32 bits value safely 506 */ 507 smu->cmd_buf_abs = (u32)smu_cmdbuf_abs; 508 smu->cmd_buf = __va(smu_cmdbuf_abs); 509 510 smu->db_node = of_find_node_by_name(NULL, "smu-doorbell"); 511 if (smu->db_node == NULL) { 512 printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n"); 513 ret = -ENXIO; 514 goto fail_bootmem; 515 } 516 data = of_get_property(smu->db_node, "reg", NULL); 517 if (data == NULL) { 518 printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n"); 519 ret = -ENXIO; 520 goto fail_db_node; 521 } 522 523 /* Current setup has one doorbell GPIO that does both doorbell 524 * and ack. GPIOs are at 0x50, best would be to find that out 525 * in the device-tree though. 526 */ 527 smu->doorbell = *data; 528 if (smu->doorbell < 0x50) 529 smu->doorbell += 0x50; 530 531 /* Now look for the smu-interrupt GPIO */ 532 do { 533 smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt"); 534 if (smu->msg_node == NULL) 535 break; 536 data = of_get_property(smu->msg_node, "reg", NULL); 537 if (data == NULL) { 538 of_node_put(smu->msg_node); 539 smu->msg_node = NULL; 540 break; 541 } 542 smu->msg = *data; 543 if (smu->msg < 0x50) 544 smu->msg += 0x50; 545 } while(0); 546 547 /* Doorbell buffer is currently hard-coded, I didn't find a proper 548 * device-tree entry giving the address. Best would probably to use 549 * an offset for K2 base though, but let's do it that way for now. 550 */ 551 smu->db_buf = ioremap(0x8000860c, 0x1000); 552 if (smu->db_buf == NULL) { 553 printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n"); 554 ret = -ENXIO; 555 goto fail_msg_node; 556 } 557 558 /* U3 has an issue with NAP mode when issuing SMU commands */ 559 smu->broken_nap = pmac_get_uninorth_variant() < 4; 560 if (smu->broken_nap) 561 printk(KERN_INFO "SMU: using NAP mode workaround\n"); 562 563 sys_ctrler = SYS_CTRLER_SMU; 564 return 0; 565 566 fail_msg_node: 567 of_node_put(smu->msg_node); 568 fail_db_node: 569 of_node_put(smu->db_node); 570 fail_bootmem: 571 memblock_free(__pa(smu), sizeof(struct smu_device)); 572 smu = NULL; 573 fail_np: 574 of_node_put(np); 575 return ret; 576 } 577 578 579 static int smu_late_init(void) 580 { 581 if (!smu) 582 return 0; 583 584 timer_setup(&smu->i2c_timer, smu_i2c_retry, 0); 585 586 if (smu->db_node) { 587 smu->db_irq = irq_of_parse_and_map(smu->db_node, 0); 588 if (!smu->db_irq) 589 printk(KERN_ERR "smu: failed to map irq for node %pOF\n", 590 smu->db_node); 591 } 592 if (smu->msg_node) { 593 smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0); 594 if (!smu->msg_irq) 595 printk(KERN_ERR "smu: failed to map irq for node %pOF\n", 596 smu->msg_node); 597 } 598 599 /* 600 * Try to request the interrupts 601 */ 602 603 if (smu->db_irq) { 604 if (request_irq(smu->db_irq, smu_db_intr, 605 IRQF_SHARED, "SMU doorbell", smu) < 0) { 606 printk(KERN_WARNING "SMU: can't " 607 "request interrupt %d\n", 608 smu->db_irq); 609 smu->db_irq = 0; 610 } 611 } 612 613 if (smu->msg_irq) { 614 if (request_irq(smu->msg_irq, smu_msg_intr, 615 IRQF_SHARED, "SMU message", smu) < 0) { 616 printk(KERN_WARNING "SMU: can't " 617 "request interrupt %d\n", 618 smu->msg_irq); 619 smu->msg_irq = 0; 620 } 621 } 622 623 smu_irq_inited = 1; 624 return 0; 625 } 626 /* This has to be before arch_initcall as the low i2c stuff relies on the 627 * above having been done before we reach arch_initcalls 628 */ 629 core_initcall(smu_late_init); 630 631 /* 632 * sysfs visibility 633 */ 634 635 static void smu_expose_childs(struct work_struct *unused) 636 { 637 struct device_node *np; 638 639 for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;) 640 if (of_device_is_compatible(np, "smu-sensors")) 641 of_platform_device_create(np, "smu-sensors", 642 &smu->of_dev->dev); 643 } 644 645 static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs); 646 647 static int smu_platform_probe(struct platform_device* dev) 648 { 649 if (!smu) 650 return -ENODEV; 651 smu->of_dev = dev; 652 653 /* 654 * Ok, we are matched, now expose all i2c busses. We have to defer 655 * that unfortunately or it would deadlock inside the device model 656 */ 657 schedule_work(&smu_expose_childs_work); 658 659 return 0; 660 } 661 662 static const struct of_device_id smu_platform_match[] = 663 { 664 { 665 .type = "smu", 666 }, 667 {}, 668 }; 669 670 static struct platform_driver smu_of_platform_driver = 671 { 672 .driver = { 673 .name = "smu", 674 .of_match_table = smu_platform_match, 675 }, 676 .probe = smu_platform_probe, 677 }; 678 679 static int __init smu_init_sysfs(void) 680 { 681 /* 682 * For now, we don't power manage machines with an SMU chip, 683 * I'm a bit too far from figuring out how that works with those 684 * new chipsets, but that will come back and bite us 685 */ 686 platform_driver_register(&smu_of_platform_driver); 687 return 0; 688 } 689 690 device_initcall(smu_init_sysfs); 691 692 struct platform_device *smu_get_ofdev(void) 693 { 694 if (!smu) 695 return NULL; 696 return smu->of_dev; 697 } 698 699 EXPORT_SYMBOL_GPL(smu_get_ofdev); 700 701 /* 702 * i2c interface 703 */ 704 705 static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail) 706 { 707 void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done; 708 void *misc = cmd->misc; 709 unsigned long flags; 710 711 /* Check for read case */ 712 if (!fail && cmd->read) { 713 if (cmd->pdata[0] < 1) 714 fail = 1; 715 else 716 memcpy(cmd->info.data, &cmd->pdata[1], 717 cmd->info.datalen); 718 } 719 720 DPRINTK("SMU: completing, success: %d\n", !fail); 721 722 /* Update status and mark no pending i2c command with lock 723 * held so nobody comes in while we dequeue an eventual 724 * pending next i2c command 725 */ 726 spin_lock_irqsave(&smu->lock, flags); 727 smu->cmd_i2c_cur = NULL; 728 wmb(); 729 cmd->status = fail ? -EIO : 0; 730 731 /* Is there another i2c command waiting ? */ 732 if (!list_empty(&smu->cmd_i2c_list)) { 733 struct smu_i2c_cmd *newcmd; 734 735 /* Fetch it, new current, remove from list */ 736 newcmd = list_entry(smu->cmd_i2c_list.next, 737 struct smu_i2c_cmd, link); 738 smu->cmd_i2c_cur = newcmd; 739 list_del(&cmd->link); 740 741 /* Queue with low level smu */ 742 list_add_tail(&cmd->scmd.link, &smu->cmd_list); 743 if (smu->cmd_cur == NULL) 744 smu_start_cmd(); 745 } 746 spin_unlock_irqrestore(&smu->lock, flags); 747 748 /* Call command completion handler if any */ 749 if (done) 750 done(cmd, misc); 751 752 } 753 754 755 static void smu_i2c_retry(struct timer_list *unused) 756 { 757 struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur; 758 759 DPRINTK("SMU: i2c failure, requeuing...\n"); 760 761 /* requeue command simply by resetting reply_len */ 762 cmd->pdata[0] = 0xff; 763 cmd->scmd.reply_len = sizeof(cmd->pdata); 764 smu_queue_cmd(&cmd->scmd); 765 } 766 767 768 static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc) 769 { 770 struct smu_i2c_cmd *cmd = misc; 771 int fail = 0; 772 773 DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n", 774 cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len); 775 776 /* Check for possible status */ 777 if (scmd->status < 0) 778 fail = 1; 779 else if (cmd->read) { 780 if (cmd->stage == 0) 781 fail = cmd->pdata[0] != 0; 782 else 783 fail = cmd->pdata[0] >= 0x80; 784 } else { 785 fail = cmd->pdata[0] != 0; 786 } 787 788 /* Handle failures by requeuing command, after 5ms interval 789 */ 790 if (fail && --cmd->retries > 0) { 791 DPRINTK("SMU: i2c failure, starting timer...\n"); 792 BUG_ON(cmd != smu->cmd_i2c_cur); 793 if (!smu_irq_inited) { 794 mdelay(5); 795 smu_i2c_retry(NULL); 796 return; 797 } 798 mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5)); 799 return; 800 } 801 802 /* If failure or stage 1, command is complete */ 803 if (fail || cmd->stage != 0) { 804 smu_i2c_complete_command(cmd, fail); 805 return; 806 } 807 808 DPRINTK("SMU: going to stage 1\n"); 809 810 /* Ok, initial command complete, now poll status */ 811 scmd->reply_buf = cmd->pdata; 812 scmd->reply_len = sizeof(cmd->pdata); 813 scmd->data_buf = cmd->pdata; 814 scmd->data_len = 1; 815 cmd->pdata[0] = 0; 816 cmd->stage = 1; 817 cmd->retries = 20; 818 smu_queue_cmd(scmd); 819 } 820 821 822 int smu_queue_i2c(struct smu_i2c_cmd *cmd) 823 { 824 unsigned long flags; 825 826 if (smu == NULL) 827 return -ENODEV; 828 829 /* Fill most fields of scmd */ 830 cmd->scmd.cmd = SMU_CMD_I2C_COMMAND; 831 cmd->scmd.done = smu_i2c_low_completion; 832 cmd->scmd.misc = cmd; 833 cmd->scmd.reply_buf = cmd->pdata; 834 cmd->scmd.reply_len = sizeof(cmd->pdata); 835 cmd->scmd.data_buf = (u8 *)(char *)&cmd->info; 836 cmd->scmd.status = 1; 837 cmd->stage = 0; 838 cmd->pdata[0] = 0xff; 839 cmd->retries = 20; 840 cmd->status = 1; 841 842 /* Check transfer type, sanitize some "info" fields 843 * based on transfer type and do more checking 844 */ 845 cmd->info.caddr = cmd->info.devaddr; 846 cmd->read = cmd->info.devaddr & 0x01; 847 switch(cmd->info.type) { 848 case SMU_I2C_TRANSFER_SIMPLE: 849 memset(&cmd->info.sublen, 0, 4); 850 break; 851 case SMU_I2C_TRANSFER_COMBINED: 852 cmd->info.devaddr &= 0xfe; 853 case SMU_I2C_TRANSFER_STDSUB: 854 if (cmd->info.sublen > 3) 855 return -EINVAL; 856 break; 857 default: 858 return -EINVAL; 859 } 860 861 /* Finish setting up command based on transfer direction 862 */ 863 if (cmd->read) { 864 if (cmd->info.datalen > SMU_I2C_READ_MAX) 865 return -EINVAL; 866 memset(cmd->info.data, 0xff, cmd->info.datalen); 867 cmd->scmd.data_len = 9; 868 } else { 869 if (cmd->info.datalen > SMU_I2C_WRITE_MAX) 870 return -EINVAL; 871 cmd->scmd.data_len = 9 + cmd->info.datalen; 872 } 873 874 DPRINTK("SMU: i2c enqueuing command\n"); 875 DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n", 876 cmd->read ? "read" : "write", cmd->info.datalen, 877 cmd->info.bus, cmd->info.caddr, 878 cmd->info.subaddr[0], cmd->info.type); 879 880 881 /* Enqueue command in i2c list, and if empty, enqueue also in 882 * main command list 883 */ 884 spin_lock_irqsave(&smu->lock, flags); 885 if (smu->cmd_i2c_cur == NULL) { 886 smu->cmd_i2c_cur = cmd; 887 list_add_tail(&cmd->scmd.link, &smu->cmd_list); 888 if (smu->cmd_cur == NULL) 889 smu_start_cmd(); 890 } else 891 list_add_tail(&cmd->link, &smu->cmd_i2c_list); 892 spin_unlock_irqrestore(&smu->lock, flags); 893 894 return 0; 895 } 896 897 /* 898 * Handling of "partitions" 899 */ 900 901 static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len) 902 { 903 DECLARE_COMPLETION_ONSTACK(comp); 904 unsigned int chunk; 905 struct smu_cmd cmd; 906 int rc; 907 u8 params[8]; 908 909 /* We currently use a chunk size of 0xe. We could check the 910 * SMU firmware version and use bigger sizes though 911 */ 912 chunk = 0xe; 913 914 while (len) { 915 unsigned int clen = min(len, chunk); 916 917 cmd.cmd = SMU_CMD_MISC_ee_COMMAND; 918 cmd.data_len = 7; 919 cmd.data_buf = params; 920 cmd.reply_len = chunk; 921 cmd.reply_buf = dest; 922 cmd.done = smu_done_complete; 923 cmd.misc = ∁ 924 params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC; 925 params[1] = 0x4; 926 *((u32 *)¶ms[2]) = addr; 927 params[6] = clen; 928 929 rc = smu_queue_cmd(&cmd); 930 if (rc) 931 return rc; 932 wait_for_completion(&comp); 933 if (cmd.status != 0) 934 return rc; 935 if (cmd.reply_len != clen) { 936 printk(KERN_DEBUG "SMU: short read in " 937 "smu_read_datablock, got: %d, want: %d\n", 938 cmd.reply_len, clen); 939 return -EIO; 940 } 941 len -= clen; 942 addr += clen; 943 dest += clen; 944 } 945 return 0; 946 } 947 948 static struct smu_sdbp_header *smu_create_sdb_partition(int id) 949 { 950 DECLARE_COMPLETION_ONSTACK(comp); 951 struct smu_simple_cmd cmd; 952 unsigned int addr, len, tlen; 953 struct smu_sdbp_header *hdr; 954 struct property *prop; 955 956 /* First query the partition info */ 957 DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq); 958 smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2, 959 smu_done_complete, &comp, 960 SMU_CMD_PARTITION_LATEST, id); 961 wait_for_completion(&comp); 962 DPRINTK("SMU: done, status: %d, reply_len: %d\n", 963 cmd.cmd.status, cmd.cmd.reply_len); 964 965 /* Partition doesn't exist (or other error) */ 966 if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6) 967 return NULL; 968 969 /* Fetch address and length from reply */ 970 addr = *((u16 *)cmd.buffer); 971 len = cmd.buffer[3] << 2; 972 /* Calucluate total length to allocate, including the 17 bytes 973 * for "sdb-partition-XX" that we append at the end of the buffer 974 */ 975 tlen = sizeof(struct property) + len + 18; 976 977 prop = kzalloc(tlen, GFP_KERNEL); 978 if (prop == NULL) 979 return NULL; 980 hdr = (struct smu_sdbp_header *)(prop + 1); 981 prop->name = ((char *)prop) + tlen - 18; 982 sprintf(prop->name, "sdb-partition-%02x", id); 983 prop->length = len; 984 prop->value = hdr; 985 prop->next = NULL; 986 987 /* Read the datablock */ 988 if (smu_read_datablock((u8 *)hdr, addr, len)) { 989 printk(KERN_DEBUG "SMU: datablock read failed while reading " 990 "partition %02x !\n", id); 991 goto failure; 992 } 993 994 /* Got it, check a few things and create the property */ 995 if (hdr->id != id) { 996 printk(KERN_DEBUG "SMU: Reading partition %02x and got " 997 "%02x !\n", id, hdr->id); 998 goto failure; 999 } 1000 if (of_add_property(smu->of_node, prop)) { 1001 printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x " 1002 "property !\n", id); 1003 goto failure; 1004 } 1005 1006 return hdr; 1007 failure: 1008 kfree(prop); 1009 return NULL; 1010 } 1011 1012 /* Note: Only allowed to return error code in pointers (using ERR_PTR) 1013 * when interruptible is 1 1014 */ 1015 const struct smu_sdbp_header *__smu_get_sdb_partition(int id, 1016 unsigned int *size, int interruptible) 1017 { 1018 char pname[32]; 1019 const struct smu_sdbp_header *part; 1020 1021 if (!smu) 1022 return NULL; 1023 1024 sprintf(pname, "sdb-partition-%02x", id); 1025 1026 DPRINTK("smu_get_sdb_partition(%02x)\n", id); 1027 1028 if (interruptible) { 1029 int rc; 1030 rc = mutex_lock_interruptible(&smu_part_access); 1031 if (rc) 1032 return ERR_PTR(rc); 1033 } else 1034 mutex_lock(&smu_part_access); 1035 1036 part = of_get_property(smu->of_node, pname, size); 1037 if (part == NULL) { 1038 DPRINTK("trying to extract from SMU ...\n"); 1039 part = smu_create_sdb_partition(id); 1040 if (part != NULL && size) 1041 *size = part->len << 2; 1042 } 1043 mutex_unlock(&smu_part_access); 1044 return part; 1045 } 1046 1047 const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size) 1048 { 1049 return __smu_get_sdb_partition(id, size, 0); 1050 } 1051 EXPORT_SYMBOL(smu_get_sdb_partition); 1052 1053 1054 /* 1055 * Userland driver interface 1056 */ 1057 1058 1059 static LIST_HEAD(smu_clist); 1060 static DEFINE_SPINLOCK(smu_clist_lock); 1061 1062 enum smu_file_mode { 1063 smu_file_commands, 1064 smu_file_events, 1065 smu_file_closing 1066 }; 1067 1068 struct smu_private 1069 { 1070 struct list_head list; 1071 enum smu_file_mode mode; 1072 int busy; 1073 struct smu_cmd cmd; 1074 spinlock_t lock; 1075 wait_queue_head_t wait; 1076 u8 buffer[SMU_MAX_DATA]; 1077 }; 1078 1079 1080 static int smu_open(struct inode *inode, struct file *file) 1081 { 1082 struct smu_private *pp; 1083 unsigned long flags; 1084 1085 pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL); 1086 if (pp == 0) 1087 return -ENOMEM; 1088 spin_lock_init(&pp->lock); 1089 pp->mode = smu_file_commands; 1090 init_waitqueue_head(&pp->wait); 1091 1092 mutex_lock(&smu_mutex); 1093 spin_lock_irqsave(&smu_clist_lock, flags); 1094 list_add(&pp->list, &smu_clist); 1095 spin_unlock_irqrestore(&smu_clist_lock, flags); 1096 file->private_data = pp; 1097 mutex_unlock(&smu_mutex); 1098 1099 return 0; 1100 } 1101 1102 1103 static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc) 1104 { 1105 struct smu_private *pp = misc; 1106 1107 wake_up_all(&pp->wait); 1108 } 1109 1110 1111 static ssize_t smu_write(struct file *file, const char __user *buf, 1112 size_t count, loff_t *ppos) 1113 { 1114 struct smu_private *pp = file->private_data; 1115 unsigned long flags; 1116 struct smu_user_cmd_hdr hdr; 1117 int rc = 0; 1118 1119 if (pp->busy) 1120 return -EBUSY; 1121 else if (copy_from_user(&hdr, buf, sizeof(hdr))) 1122 return -EFAULT; 1123 else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) { 1124 pp->mode = smu_file_events; 1125 return 0; 1126 } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) { 1127 const struct smu_sdbp_header *part; 1128 part = __smu_get_sdb_partition(hdr.cmd, NULL, 1); 1129 if (part == NULL) 1130 return -EINVAL; 1131 else if (IS_ERR(part)) 1132 return PTR_ERR(part); 1133 return 0; 1134 } else if (hdr.cmdtype != SMU_CMDTYPE_SMU) 1135 return -EINVAL; 1136 else if (pp->mode != smu_file_commands) 1137 return -EBADFD; 1138 else if (hdr.data_len > SMU_MAX_DATA) 1139 return -EINVAL; 1140 1141 spin_lock_irqsave(&pp->lock, flags); 1142 if (pp->busy) { 1143 spin_unlock_irqrestore(&pp->lock, flags); 1144 return -EBUSY; 1145 } 1146 pp->busy = 1; 1147 pp->cmd.status = 1; 1148 spin_unlock_irqrestore(&pp->lock, flags); 1149 1150 if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) { 1151 pp->busy = 0; 1152 return -EFAULT; 1153 } 1154 1155 pp->cmd.cmd = hdr.cmd; 1156 pp->cmd.data_len = hdr.data_len; 1157 pp->cmd.reply_len = SMU_MAX_DATA; 1158 pp->cmd.data_buf = pp->buffer; 1159 pp->cmd.reply_buf = pp->buffer; 1160 pp->cmd.done = smu_user_cmd_done; 1161 pp->cmd.misc = pp; 1162 rc = smu_queue_cmd(&pp->cmd); 1163 if (rc < 0) 1164 return rc; 1165 return count; 1166 } 1167 1168 1169 static ssize_t smu_read_command(struct file *file, struct smu_private *pp, 1170 char __user *buf, size_t count) 1171 { 1172 DECLARE_WAITQUEUE(wait, current); 1173 struct smu_user_reply_hdr hdr; 1174 unsigned long flags; 1175 int size, rc = 0; 1176 1177 if (!pp->busy) 1178 return 0; 1179 if (count < sizeof(struct smu_user_reply_hdr)) 1180 return -EOVERFLOW; 1181 spin_lock_irqsave(&pp->lock, flags); 1182 if (pp->cmd.status == 1) { 1183 if (file->f_flags & O_NONBLOCK) { 1184 spin_unlock_irqrestore(&pp->lock, flags); 1185 return -EAGAIN; 1186 } 1187 add_wait_queue(&pp->wait, &wait); 1188 for (;;) { 1189 set_current_state(TASK_INTERRUPTIBLE); 1190 rc = 0; 1191 if (pp->cmd.status != 1) 1192 break; 1193 rc = -ERESTARTSYS; 1194 if (signal_pending(current)) 1195 break; 1196 spin_unlock_irqrestore(&pp->lock, flags); 1197 schedule(); 1198 spin_lock_irqsave(&pp->lock, flags); 1199 } 1200 set_current_state(TASK_RUNNING); 1201 remove_wait_queue(&pp->wait, &wait); 1202 } 1203 spin_unlock_irqrestore(&pp->lock, flags); 1204 if (rc) 1205 return rc; 1206 if (pp->cmd.status != 0) 1207 pp->cmd.reply_len = 0; 1208 size = sizeof(hdr) + pp->cmd.reply_len; 1209 if (count < size) 1210 size = count; 1211 rc = size; 1212 hdr.status = pp->cmd.status; 1213 hdr.reply_len = pp->cmd.reply_len; 1214 if (copy_to_user(buf, &hdr, sizeof(hdr))) 1215 return -EFAULT; 1216 size -= sizeof(hdr); 1217 if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size)) 1218 return -EFAULT; 1219 pp->busy = 0; 1220 1221 return rc; 1222 } 1223 1224 1225 static ssize_t smu_read_events(struct file *file, struct smu_private *pp, 1226 char __user *buf, size_t count) 1227 { 1228 /* Not implemented */ 1229 msleep_interruptible(1000); 1230 return 0; 1231 } 1232 1233 1234 static ssize_t smu_read(struct file *file, char __user *buf, 1235 size_t count, loff_t *ppos) 1236 { 1237 struct smu_private *pp = file->private_data; 1238 1239 if (pp->mode == smu_file_commands) 1240 return smu_read_command(file, pp, buf, count); 1241 if (pp->mode == smu_file_events) 1242 return smu_read_events(file, pp, buf, count); 1243 1244 return -EBADFD; 1245 } 1246 1247 static __poll_t smu_fpoll(struct file *file, poll_table *wait) 1248 { 1249 struct smu_private *pp = file->private_data; 1250 __poll_t mask = 0; 1251 unsigned long flags; 1252 1253 if (pp == 0) 1254 return 0; 1255 1256 if (pp->mode == smu_file_commands) { 1257 poll_wait(file, &pp->wait, wait); 1258 1259 spin_lock_irqsave(&pp->lock, flags); 1260 if (pp->busy && pp->cmd.status != 1) 1261 mask |= EPOLLIN; 1262 spin_unlock_irqrestore(&pp->lock, flags); 1263 } 1264 if (pp->mode == smu_file_events) { 1265 /* Not yet implemented */ 1266 } 1267 return mask; 1268 } 1269 1270 static int smu_release(struct inode *inode, struct file *file) 1271 { 1272 struct smu_private *pp = file->private_data; 1273 unsigned long flags; 1274 unsigned int busy; 1275 1276 if (pp == 0) 1277 return 0; 1278 1279 file->private_data = NULL; 1280 1281 /* Mark file as closing to avoid races with new request */ 1282 spin_lock_irqsave(&pp->lock, flags); 1283 pp->mode = smu_file_closing; 1284 busy = pp->busy; 1285 1286 /* Wait for any pending request to complete */ 1287 if (busy && pp->cmd.status == 1) { 1288 DECLARE_WAITQUEUE(wait, current); 1289 1290 add_wait_queue(&pp->wait, &wait); 1291 for (;;) { 1292 set_current_state(TASK_UNINTERRUPTIBLE); 1293 if (pp->cmd.status != 1) 1294 break; 1295 spin_unlock_irqrestore(&pp->lock, flags); 1296 schedule(); 1297 spin_lock_irqsave(&pp->lock, flags); 1298 } 1299 set_current_state(TASK_RUNNING); 1300 remove_wait_queue(&pp->wait, &wait); 1301 } 1302 spin_unlock_irqrestore(&pp->lock, flags); 1303 1304 spin_lock_irqsave(&smu_clist_lock, flags); 1305 list_del(&pp->list); 1306 spin_unlock_irqrestore(&smu_clist_lock, flags); 1307 kfree(pp); 1308 1309 return 0; 1310 } 1311 1312 1313 static const struct file_operations smu_device_fops = { 1314 .llseek = no_llseek, 1315 .read = smu_read, 1316 .write = smu_write, 1317 .poll = smu_fpoll, 1318 .open = smu_open, 1319 .release = smu_release, 1320 }; 1321 1322 static struct miscdevice pmu_device = { 1323 MISC_DYNAMIC_MINOR, "smu", &smu_device_fops 1324 }; 1325 1326 static int smu_device_init(void) 1327 { 1328 if (!smu) 1329 return -ENODEV; 1330 if (misc_register(&pmu_device) < 0) 1331 printk(KERN_ERR "via-pmu: cannot register misc device.\n"); 1332 return 0; 1333 } 1334 device_initcall(smu_device_init); 1335