1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2017-2022 Linaro Ltd 4 * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved. 5 * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. 6 */ 7 #include <linux/bits.h> 8 #include <linux/bitfield.h> 9 #include <linux/led-class-multicolor.h> 10 #include <linux/module.h> 11 #include <linux/of.h> 12 #include <linux/of_device.h> 13 #include <linux/platform_device.h> 14 #include <linux/pwm.h> 15 #include <linux/regmap.h> 16 #include <linux/slab.h> 17 18 #define LPG_SUBTYPE_REG 0x05 19 #define LPG_SUBTYPE_LPG 0x2 20 #define LPG_SUBTYPE_PWM 0xb 21 #define LPG_SUBTYPE_HI_RES_PWM 0xc 22 #define LPG_SUBTYPE_LPG_LITE 0x11 23 #define LPG_PATTERN_CONFIG_REG 0x40 24 #define LPG_SIZE_CLK_REG 0x41 25 #define PWM_CLK_SELECT_MASK GENMASK(1, 0) 26 #define PWM_CLK_SELECT_HI_RES_MASK GENMASK(2, 0) 27 #define PWM_SIZE_HI_RES_MASK GENMASK(6, 4) 28 #define LPG_PREDIV_CLK_REG 0x42 29 #define PWM_FREQ_PRE_DIV_MASK GENMASK(6, 5) 30 #define PWM_FREQ_EXP_MASK GENMASK(2, 0) 31 #define PWM_TYPE_CONFIG_REG 0x43 32 #define PWM_VALUE_REG 0x44 33 #define PWM_ENABLE_CONTROL_REG 0x46 34 #define PWM_SYNC_REG 0x47 35 #define LPG_RAMP_DURATION_REG 0x50 36 #define LPG_HI_PAUSE_REG 0x52 37 #define LPG_LO_PAUSE_REG 0x54 38 #define LPG_HI_IDX_REG 0x56 39 #define LPG_LO_IDX_REG 0x57 40 #define PWM_SEC_ACCESS_REG 0xd0 41 #define PWM_DTEST_REG(x) (0xe2 + (x) - 1) 42 43 #define TRI_LED_SRC_SEL 0x45 44 #define TRI_LED_EN_CTL 0x46 45 #define TRI_LED_ATC_CTL 0x47 46 47 #define LPG_LUT_REG(x) (0x40 + (x) * 2) 48 #define RAMP_CONTROL_REG 0xc8 49 50 #define LPG_RESOLUTION_9BIT BIT(9) 51 #define LPG_RESOLUTION_15BIT BIT(15) 52 #define LPG_MAX_M 7 53 #define LPG_MAX_PREDIV 6 54 55 struct lpg_channel; 56 struct lpg_data; 57 58 /** 59 * struct lpg - LPG device context 60 * @dev: pointer to LPG device 61 * @map: regmap for register access 62 * @lock: used to synchronize LED and pwm callback requests 63 * @pwm: PWM-chip object, if operating in PWM mode 64 * @data: reference to version specific data 65 * @lut_base: base address of the LUT block (optional) 66 * @lut_size: number of entries in the LUT block 67 * @lut_bitmap: allocation bitmap for LUT entries 68 * @triled_base: base address of the TRILED block (optional) 69 * @triled_src: power-source for the TRILED 70 * @triled_has_atc_ctl: true if there is TRI_LED_ATC_CTL register 71 * @triled_has_src_sel: true if there is TRI_LED_SRC_SEL register 72 * @channels: list of PWM channels 73 * @num_channels: number of @channels 74 */ 75 struct lpg { 76 struct device *dev; 77 struct regmap *map; 78 79 struct mutex lock; 80 81 struct pwm_chip pwm; 82 83 const struct lpg_data *data; 84 85 u32 lut_base; 86 u32 lut_size; 87 unsigned long *lut_bitmap; 88 89 u32 triled_base; 90 u32 triled_src; 91 bool triled_has_atc_ctl; 92 bool triled_has_src_sel; 93 94 struct lpg_channel *channels; 95 unsigned int num_channels; 96 }; 97 98 /** 99 * struct lpg_channel - per channel data 100 * @lpg: reference to parent lpg 101 * @base: base address of the PWM channel 102 * @triled_mask: mask in TRILED to enable this channel 103 * @lut_mask: mask in LUT to start pattern generator for this channel 104 * @subtype: PMIC hardware block subtype 105 * @in_use: channel is exposed to LED framework 106 * @color: color of the LED attached to this channel 107 * @dtest_line: DTEST line for output, or 0 if disabled 108 * @dtest_value: DTEST line configuration 109 * @pwm_value: duty (in microseconds) of the generated pulses, overridden by LUT 110 * @enabled: output enabled? 111 * @period: period (in nanoseconds) of the generated pulses 112 * @clk_sel: reference clock frequency selector 113 * @pre_div_sel: divider selector of the reference clock 114 * @pre_div_exp: exponential divider of the reference clock 115 * @pwm_resolution_sel: pwm resolution selector 116 * @ramp_enabled: duty cycle is driven by iterating over lookup table 117 * @ramp_ping_pong: reverse through pattern, rather than wrapping to start 118 * @ramp_oneshot: perform only a single pass over the pattern 119 * @ramp_reverse: iterate over pattern backwards 120 * @ramp_tick_ms: length (in milliseconds) of one step in the pattern 121 * @ramp_lo_pause_ms: pause (in milliseconds) before iterating over pattern 122 * @ramp_hi_pause_ms: pause (in milliseconds) after iterating over pattern 123 * @pattern_lo_idx: start index of associated pattern 124 * @pattern_hi_idx: last index of associated pattern 125 */ 126 struct lpg_channel { 127 struct lpg *lpg; 128 129 u32 base; 130 unsigned int triled_mask; 131 unsigned int lut_mask; 132 unsigned int subtype; 133 134 bool in_use; 135 136 int color; 137 138 u32 dtest_line; 139 u32 dtest_value; 140 141 u16 pwm_value; 142 bool enabled; 143 144 u64 period; 145 unsigned int clk_sel; 146 unsigned int pre_div_sel; 147 unsigned int pre_div_exp; 148 unsigned int pwm_resolution_sel; 149 150 bool ramp_enabled; 151 bool ramp_ping_pong; 152 bool ramp_oneshot; 153 bool ramp_reverse; 154 unsigned short ramp_tick_ms; 155 unsigned long ramp_lo_pause_ms; 156 unsigned long ramp_hi_pause_ms; 157 158 unsigned int pattern_lo_idx; 159 unsigned int pattern_hi_idx; 160 }; 161 162 /** 163 * struct lpg_led - logical LED object 164 * @lpg: lpg context reference 165 * @cdev: LED class device 166 * @mcdev: Multicolor LED class device 167 * @num_channels: number of @channels 168 * @channels: list of channels associated with the LED 169 */ 170 struct lpg_led { 171 struct lpg *lpg; 172 173 struct led_classdev cdev; 174 struct led_classdev_mc mcdev; 175 176 unsigned int num_channels; 177 struct lpg_channel *channels[]; 178 }; 179 180 /** 181 * struct lpg_channel_data - per channel initialization data 182 * @base: base address for PWM channel registers 183 * @triled_mask: bitmask for controlling this channel in TRILED 184 */ 185 struct lpg_channel_data { 186 unsigned int base; 187 u8 triled_mask; 188 }; 189 190 /** 191 * struct lpg_data - initialization data 192 * @lut_base: base address of LUT block 193 * @lut_size: number of entries in LUT 194 * @triled_base: base address of TRILED 195 * @triled_has_atc_ctl: true if there is TRI_LED_ATC_CTL register 196 * @triled_has_src_sel: true if there is TRI_LED_SRC_SEL register 197 * @num_channels: number of channels in LPG 198 * @channels: list of channel initialization data 199 */ 200 struct lpg_data { 201 unsigned int lut_base; 202 unsigned int lut_size; 203 unsigned int triled_base; 204 bool triled_has_atc_ctl; 205 bool triled_has_src_sel; 206 int num_channels; 207 const struct lpg_channel_data *channels; 208 }; 209 210 static int triled_set(struct lpg *lpg, unsigned int mask, unsigned int enable) 211 { 212 /* Skip if we don't have a triled block */ 213 if (!lpg->triled_base) 214 return 0; 215 216 return regmap_update_bits(lpg->map, lpg->triled_base + TRI_LED_EN_CTL, 217 mask, enable); 218 } 219 220 static int lpg_lut_store(struct lpg *lpg, struct led_pattern *pattern, 221 size_t len, unsigned int *lo_idx, unsigned int *hi_idx) 222 { 223 unsigned int idx; 224 u16 val; 225 int i; 226 227 idx = bitmap_find_next_zero_area(lpg->lut_bitmap, lpg->lut_size, 228 0, len, 0); 229 if (idx >= lpg->lut_size) 230 return -ENOMEM; 231 232 for (i = 0; i < len; i++) { 233 val = pattern[i].brightness; 234 235 regmap_bulk_write(lpg->map, lpg->lut_base + LPG_LUT_REG(idx + i), 236 &val, sizeof(val)); 237 } 238 239 bitmap_set(lpg->lut_bitmap, idx, len); 240 241 *lo_idx = idx; 242 *hi_idx = idx + len - 1; 243 244 return 0; 245 } 246 247 static void lpg_lut_free(struct lpg *lpg, unsigned int lo_idx, unsigned int hi_idx) 248 { 249 int len; 250 251 len = hi_idx - lo_idx + 1; 252 if (len == 1) 253 return; 254 255 bitmap_clear(lpg->lut_bitmap, lo_idx, len); 256 } 257 258 static int lpg_lut_sync(struct lpg *lpg, unsigned int mask) 259 { 260 return regmap_write(lpg->map, lpg->lut_base + RAMP_CONTROL_REG, mask); 261 } 262 263 static const unsigned int lpg_clk_rates[] = {0, 1024, 32768, 19200000}; 264 static const unsigned int lpg_clk_rates_hi_res[] = {0, 1024, 32768, 19200000, 76800000}; 265 static const unsigned int lpg_pre_divs[] = {1, 3, 5, 6}; 266 static const unsigned int lpg_pwm_resolution[] = {9}; 267 static const unsigned int lpg_pwm_resolution_hi_res[] = {8, 9, 10, 11, 12, 13, 14, 15}; 268 269 static int lpg_calc_freq(struct lpg_channel *chan, uint64_t period) 270 { 271 unsigned int i, pwm_resolution_count, best_pwm_resolution_sel = 0; 272 const unsigned int *clk_rate_arr, *pwm_resolution_arr; 273 unsigned int clk_sel, clk_len, best_clk = 0; 274 unsigned int div, best_div = 0; 275 unsigned int m, best_m = 0; 276 unsigned int resolution; 277 unsigned int error; 278 unsigned int best_err = UINT_MAX; 279 u64 max_period, min_period; 280 u64 best_period = 0; 281 u64 max_res; 282 283 /* 284 * The PWM period is determined by: 285 * 286 * resolution * pre_div * 2^M 287 * period = -------------------------- 288 * refclk 289 * 290 * Resolution = 2^9 bits for PWM or 291 * 2^{8, 9, 10, 11, 12, 13, 14, 15} bits for high resolution PWM 292 * pre_div = {1, 3, 5, 6} and 293 * M = [0..7]. 294 * 295 * This allows for periods between 27uS and 384s for PWM channels and periods between 296 * 3uS and 24576s for high resolution PWMs. 297 * The PWM framework wants a period of equal or lower length than requested, 298 * reject anything below minimum period. 299 */ 300 301 if (chan->subtype == LPG_SUBTYPE_HI_RES_PWM) { 302 clk_rate_arr = lpg_clk_rates_hi_res; 303 clk_len = ARRAY_SIZE(lpg_clk_rates_hi_res); 304 pwm_resolution_arr = lpg_pwm_resolution_hi_res; 305 pwm_resolution_count = ARRAY_SIZE(lpg_pwm_resolution_hi_res); 306 max_res = LPG_RESOLUTION_15BIT; 307 } else { 308 clk_rate_arr = lpg_clk_rates; 309 clk_len = ARRAY_SIZE(lpg_clk_rates); 310 pwm_resolution_arr = lpg_pwm_resolution; 311 pwm_resolution_count = ARRAY_SIZE(lpg_pwm_resolution); 312 max_res = LPG_RESOLUTION_9BIT; 313 } 314 315 min_period = (u64)NSEC_PER_SEC * 316 div64_u64((1 << pwm_resolution_arr[0]), clk_rate_arr[clk_len - 1]); 317 if (period <= min_period) 318 return -EINVAL; 319 320 /* Limit period to largest possible value, to avoid overflows */ 321 max_period = (u64)NSEC_PER_SEC * max_res * LPG_MAX_PREDIV * 322 div64_u64((1 << LPG_MAX_M), 1024); 323 if (period > max_period) 324 period = max_period; 325 326 /* 327 * Search for the pre_div, refclk, resolution and M by solving the rewritten formula 328 * for each refclk, resolution and pre_div value: 329 * 330 * period * refclk 331 * M = log2 ------------------------------------- 332 * NSEC_PER_SEC * pre_div * resolution 333 */ 334 335 for (i = 0; i < pwm_resolution_count; i++) { 336 resolution = 1 << pwm_resolution_arr[i]; 337 for (clk_sel = 1; clk_sel < clk_len; clk_sel++) { 338 u64 numerator = period * clk_rate_arr[clk_sel]; 339 340 for (div = 0; div < ARRAY_SIZE(lpg_pre_divs); div++) { 341 u64 denominator = (u64)NSEC_PER_SEC * lpg_pre_divs[div] * 342 resolution; 343 u64 actual; 344 u64 ratio; 345 346 if (numerator < denominator) 347 continue; 348 349 ratio = div64_u64(numerator, denominator); 350 m = ilog2(ratio); 351 if (m > LPG_MAX_M) 352 m = LPG_MAX_M; 353 354 actual = DIV_ROUND_UP_ULL(denominator * (1 << m), 355 clk_rate_arr[clk_sel]); 356 error = period - actual; 357 if (error < best_err) { 358 best_err = error; 359 best_div = div; 360 best_m = m; 361 best_clk = clk_sel; 362 best_period = actual; 363 best_pwm_resolution_sel = i; 364 } 365 } 366 } 367 } 368 chan->clk_sel = best_clk; 369 chan->pre_div_sel = best_div; 370 chan->pre_div_exp = best_m; 371 chan->period = best_period; 372 chan->pwm_resolution_sel = best_pwm_resolution_sel; 373 return 0; 374 } 375 376 static void lpg_calc_duty(struct lpg_channel *chan, uint64_t duty) 377 { 378 unsigned int max; 379 unsigned int val; 380 unsigned int clk_rate; 381 382 if (chan->subtype == LPG_SUBTYPE_HI_RES_PWM) { 383 max = LPG_RESOLUTION_15BIT - 1; 384 clk_rate = lpg_clk_rates_hi_res[chan->clk_sel]; 385 } else { 386 max = LPG_RESOLUTION_9BIT - 1; 387 clk_rate = lpg_clk_rates[chan->clk_sel]; 388 } 389 390 val = div64_u64(duty * clk_rate, 391 (u64)NSEC_PER_SEC * lpg_pre_divs[chan->pre_div_sel] * (1 << chan->pre_div_exp)); 392 393 chan->pwm_value = min(val, max); 394 } 395 396 static void lpg_apply_freq(struct lpg_channel *chan) 397 { 398 unsigned long val; 399 struct lpg *lpg = chan->lpg; 400 401 if (!chan->enabled) 402 return; 403 404 val = chan->clk_sel; 405 406 /* Specify resolution, based on the subtype of the channel */ 407 switch (chan->subtype) { 408 case LPG_SUBTYPE_LPG: 409 val |= GENMASK(5, 4); 410 break; 411 case LPG_SUBTYPE_PWM: 412 val |= BIT(2); 413 break; 414 case LPG_SUBTYPE_HI_RES_PWM: 415 val |= FIELD_PREP(PWM_SIZE_HI_RES_MASK, chan->pwm_resolution_sel); 416 break; 417 case LPG_SUBTYPE_LPG_LITE: 418 default: 419 val |= BIT(4); 420 break; 421 } 422 423 regmap_write(lpg->map, chan->base + LPG_SIZE_CLK_REG, val); 424 425 val = FIELD_PREP(PWM_FREQ_PRE_DIV_MASK, chan->pre_div_sel) | 426 FIELD_PREP(PWM_FREQ_EXP_MASK, chan->pre_div_exp); 427 regmap_write(lpg->map, chan->base + LPG_PREDIV_CLK_REG, val); 428 } 429 430 #define LPG_ENABLE_GLITCH_REMOVAL BIT(5) 431 432 static void lpg_enable_glitch(struct lpg_channel *chan) 433 { 434 struct lpg *lpg = chan->lpg; 435 436 regmap_update_bits(lpg->map, chan->base + PWM_TYPE_CONFIG_REG, 437 LPG_ENABLE_GLITCH_REMOVAL, 0); 438 } 439 440 static void lpg_disable_glitch(struct lpg_channel *chan) 441 { 442 struct lpg *lpg = chan->lpg; 443 444 regmap_update_bits(lpg->map, chan->base + PWM_TYPE_CONFIG_REG, 445 LPG_ENABLE_GLITCH_REMOVAL, 446 LPG_ENABLE_GLITCH_REMOVAL); 447 } 448 449 static void lpg_apply_pwm_value(struct lpg_channel *chan) 450 { 451 struct lpg *lpg = chan->lpg; 452 u16 val = chan->pwm_value; 453 454 if (!chan->enabled) 455 return; 456 457 regmap_bulk_write(lpg->map, chan->base + PWM_VALUE_REG, &val, sizeof(val)); 458 } 459 460 #define LPG_PATTERN_CONFIG_LO_TO_HI BIT(4) 461 #define LPG_PATTERN_CONFIG_REPEAT BIT(3) 462 #define LPG_PATTERN_CONFIG_TOGGLE BIT(2) 463 #define LPG_PATTERN_CONFIG_PAUSE_HI BIT(1) 464 #define LPG_PATTERN_CONFIG_PAUSE_LO BIT(0) 465 466 static void lpg_apply_lut_control(struct lpg_channel *chan) 467 { 468 struct lpg *lpg = chan->lpg; 469 unsigned int hi_pause; 470 unsigned int lo_pause; 471 unsigned int conf = 0; 472 unsigned int lo_idx = chan->pattern_lo_idx; 473 unsigned int hi_idx = chan->pattern_hi_idx; 474 u16 step = chan->ramp_tick_ms; 475 476 if (!chan->ramp_enabled || chan->pattern_lo_idx == chan->pattern_hi_idx) 477 return; 478 479 hi_pause = DIV_ROUND_UP(chan->ramp_hi_pause_ms, step); 480 lo_pause = DIV_ROUND_UP(chan->ramp_lo_pause_ms, step); 481 482 if (!chan->ramp_reverse) 483 conf |= LPG_PATTERN_CONFIG_LO_TO_HI; 484 if (!chan->ramp_oneshot) 485 conf |= LPG_PATTERN_CONFIG_REPEAT; 486 if (chan->ramp_ping_pong) 487 conf |= LPG_PATTERN_CONFIG_TOGGLE; 488 if (chan->ramp_hi_pause_ms) 489 conf |= LPG_PATTERN_CONFIG_PAUSE_HI; 490 if (chan->ramp_lo_pause_ms) 491 conf |= LPG_PATTERN_CONFIG_PAUSE_LO; 492 493 regmap_write(lpg->map, chan->base + LPG_PATTERN_CONFIG_REG, conf); 494 regmap_write(lpg->map, chan->base + LPG_HI_IDX_REG, hi_idx); 495 regmap_write(lpg->map, chan->base + LPG_LO_IDX_REG, lo_idx); 496 497 regmap_bulk_write(lpg->map, chan->base + LPG_RAMP_DURATION_REG, &step, sizeof(step)); 498 regmap_write(lpg->map, chan->base + LPG_HI_PAUSE_REG, hi_pause); 499 regmap_write(lpg->map, chan->base + LPG_LO_PAUSE_REG, lo_pause); 500 } 501 502 #define LPG_ENABLE_CONTROL_OUTPUT BIT(7) 503 #define LPG_ENABLE_CONTROL_BUFFER_TRISTATE BIT(5) 504 #define LPG_ENABLE_CONTROL_SRC_PWM BIT(2) 505 #define LPG_ENABLE_CONTROL_RAMP_GEN BIT(1) 506 507 static void lpg_apply_control(struct lpg_channel *chan) 508 { 509 unsigned int ctrl; 510 struct lpg *lpg = chan->lpg; 511 512 ctrl = LPG_ENABLE_CONTROL_BUFFER_TRISTATE; 513 514 if (chan->enabled) 515 ctrl |= LPG_ENABLE_CONTROL_OUTPUT; 516 517 if (chan->pattern_lo_idx != chan->pattern_hi_idx) 518 ctrl |= LPG_ENABLE_CONTROL_RAMP_GEN; 519 else 520 ctrl |= LPG_ENABLE_CONTROL_SRC_PWM; 521 522 regmap_write(lpg->map, chan->base + PWM_ENABLE_CONTROL_REG, ctrl); 523 524 /* 525 * Due to LPG hardware bug, in the PWM mode, having enabled PWM, 526 * We have to write PWM values one more time. 527 */ 528 if (chan->enabled) 529 lpg_apply_pwm_value(chan); 530 } 531 532 #define LPG_SYNC_PWM BIT(0) 533 534 static void lpg_apply_sync(struct lpg_channel *chan) 535 { 536 struct lpg *lpg = chan->lpg; 537 538 regmap_write(lpg->map, chan->base + PWM_SYNC_REG, LPG_SYNC_PWM); 539 } 540 541 static int lpg_parse_dtest(struct lpg *lpg) 542 { 543 struct lpg_channel *chan; 544 struct device_node *np = lpg->dev->of_node; 545 int count; 546 int ret; 547 int i; 548 549 count = of_property_count_u32_elems(np, "qcom,dtest"); 550 if (count == -EINVAL) { 551 return 0; 552 } else if (count < 0) { 553 ret = count; 554 goto err_malformed; 555 } else if (count != lpg->data->num_channels * 2) { 556 dev_err(lpg->dev, "qcom,dtest needs to be %d items\n", 557 lpg->data->num_channels * 2); 558 return -EINVAL; 559 } 560 561 for (i = 0; i < lpg->data->num_channels; i++) { 562 chan = &lpg->channels[i]; 563 564 ret = of_property_read_u32_index(np, "qcom,dtest", i * 2, 565 &chan->dtest_line); 566 if (ret) 567 goto err_malformed; 568 569 ret = of_property_read_u32_index(np, "qcom,dtest", i * 2 + 1, 570 &chan->dtest_value); 571 if (ret) 572 goto err_malformed; 573 } 574 575 return 0; 576 577 err_malformed: 578 dev_err(lpg->dev, "malformed qcom,dtest\n"); 579 return ret; 580 } 581 582 static void lpg_apply_dtest(struct lpg_channel *chan) 583 { 584 struct lpg *lpg = chan->lpg; 585 586 if (!chan->dtest_line) 587 return; 588 589 regmap_write(lpg->map, chan->base + PWM_SEC_ACCESS_REG, 0xa5); 590 regmap_write(lpg->map, chan->base + PWM_DTEST_REG(chan->dtest_line), 591 chan->dtest_value); 592 } 593 594 static void lpg_apply(struct lpg_channel *chan) 595 { 596 lpg_disable_glitch(chan); 597 lpg_apply_freq(chan); 598 lpg_apply_pwm_value(chan); 599 lpg_apply_control(chan); 600 lpg_apply_sync(chan); 601 lpg_apply_lut_control(chan); 602 lpg_enable_glitch(chan); 603 } 604 605 static void lpg_brightness_set(struct lpg_led *led, struct led_classdev *cdev, 606 struct mc_subled *subleds) 607 { 608 enum led_brightness brightness; 609 struct lpg_channel *chan; 610 unsigned int triled_enabled = 0; 611 unsigned int triled_mask = 0; 612 unsigned int lut_mask = 0; 613 unsigned int duty; 614 struct lpg *lpg = led->lpg; 615 int i; 616 617 for (i = 0; i < led->num_channels; i++) { 618 chan = led->channels[i]; 619 brightness = subleds[i].brightness; 620 621 if (brightness == LED_OFF) { 622 chan->enabled = false; 623 chan->ramp_enabled = false; 624 } else if (chan->pattern_lo_idx != chan->pattern_hi_idx) { 625 lpg_calc_freq(chan, NSEC_PER_MSEC); 626 627 chan->enabled = true; 628 chan->ramp_enabled = true; 629 630 lut_mask |= chan->lut_mask; 631 triled_enabled |= chan->triled_mask; 632 } else { 633 lpg_calc_freq(chan, NSEC_PER_MSEC); 634 635 duty = div_u64(brightness * chan->period, cdev->max_brightness); 636 lpg_calc_duty(chan, duty); 637 chan->enabled = true; 638 chan->ramp_enabled = false; 639 640 triled_enabled |= chan->triled_mask; 641 } 642 643 triled_mask |= chan->triled_mask; 644 645 lpg_apply(chan); 646 } 647 648 /* Toggle triled lines */ 649 if (triled_mask) 650 triled_set(lpg, triled_mask, triled_enabled); 651 652 /* Trigger start of ramp generator(s) */ 653 if (lut_mask) 654 lpg_lut_sync(lpg, lut_mask); 655 } 656 657 static int lpg_brightness_single_set(struct led_classdev *cdev, 658 enum led_brightness value) 659 { 660 struct lpg_led *led = container_of(cdev, struct lpg_led, cdev); 661 struct mc_subled info; 662 663 mutex_lock(&led->lpg->lock); 664 665 info.brightness = value; 666 lpg_brightness_set(led, cdev, &info); 667 668 mutex_unlock(&led->lpg->lock); 669 670 return 0; 671 } 672 673 static int lpg_brightness_mc_set(struct led_classdev *cdev, 674 enum led_brightness value) 675 { 676 struct led_classdev_mc *mc = lcdev_to_mccdev(cdev); 677 struct lpg_led *led = container_of(mc, struct lpg_led, mcdev); 678 679 mutex_lock(&led->lpg->lock); 680 681 led_mc_calc_color_components(mc, value); 682 lpg_brightness_set(led, cdev, mc->subled_info); 683 684 mutex_unlock(&led->lpg->lock); 685 686 return 0; 687 } 688 689 static int lpg_blink_set(struct lpg_led *led, 690 unsigned long *delay_on, unsigned long *delay_off) 691 { 692 struct lpg_channel *chan; 693 unsigned int period; 694 unsigned int triled_mask = 0; 695 struct lpg *lpg = led->lpg; 696 u64 duty; 697 int i; 698 699 if (!*delay_on && !*delay_off) { 700 *delay_on = 500; 701 *delay_off = 500; 702 } 703 704 duty = *delay_on * NSEC_PER_MSEC; 705 period = (*delay_on + *delay_off) * NSEC_PER_MSEC; 706 707 for (i = 0; i < led->num_channels; i++) { 708 chan = led->channels[i]; 709 710 lpg_calc_freq(chan, period); 711 lpg_calc_duty(chan, duty); 712 713 chan->enabled = true; 714 chan->ramp_enabled = false; 715 716 triled_mask |= chan->triled_mask; 717 718 lpg_apply(chan); 719 } 720 721 /* Enable triled lines */ 722 triled_set(lpg, triled_mask, triled_mask); 723 724 chan = led->channels[0]; 725 duty = div_u64(chan->pwm_value * chan->period, LPG_RESOLUTION_9BIT); 726 *delay_on = div_u64(duty, NSEC_PER_MSEC); 727 *delay_off = div_u64(chan->period - duty, NSEC_PER_MSEC); 728 729 return 0; 730 } 731 732 static int lpg_blink_single_set(struct led_classdev *cdev, 733 unsigned long *delay_on, unsigned long *delay_off) 734 { 735 struct lpg_led *led = container_of(cdev, struct lpg_led, cdev); 736 int ret; 737 738 mutex_lock(&led->lpg->lock); 739 740 ret = lpg_blink_set(led, delay_on, delay_off); 741 742 mutex_unlock(&led->lpg->lock); 743 744 return ret; 745 } 746 747 static int lpg_blink_mc_set(struct led_classdev *cdev, 748 unsigned long *delay_on, unsigned long *delay_off) 749 { 750 struct led_classdev_mc *mc = lcdev_to_mccdev(cdev); 751 struct lpg_led *led = container_of(mc, struct lpg_led, mcdev); 752 int ret; 753 754 mutex_lock(&led->lpg->lock); 755 756 ret = lpg_blink_set(led, delay_on, delay_off); 757 758 mutex_unlock(&led->lpg->lock); 759 760 return ret; 761 } 762 763 static int lpg_pattern_set(struct lpg_led *led, struct led_pattern *led_pattern, 764 u32 len, int repeat) 765 { 766 struct lpg_channel *chan; 767 struct lpg *lpg = led->lpg; 768 struct led_pattern *pattern; 769 unsigned int brightness_a; 770 unsigned int brightness_b; 771 unsigned int actual_len; 772 unsigned int hi_pause; 773 unsigned int lo_pause; 774 unsigned int delta_t; 775 unsigned int lo_idx; 776 unsigned int hi_idx; 777 unsigned int i; 778 bool ping_pong = true; 779 int ret = -EINVAL; 780 781 /* Hardware only support oneshot or indefinite loops */ 782 if (repeat != -1 && repeat != 1) 783 return -EINVAL; 784 785 /* 786 * The standardized leds-trigger-pattern format defines that the 787 * brightness of the LED follows a linear transition from one entry 788 * in the pattern to the next, over the given delta_t time. It 789 * describes that the way to perform instant transitions a zero-length 790 * entry should be added following a pattern entry. 791 * 792 * The LPG hardware is only able to perform the latter (no linear 793 * transitions), so require each entry in the pattern to be followed by 794 * a zero-length transition. 795 */ 796 if (len % 2) 797 return -EINVAL; 798 799 pattern = kcalloc(len / 2, sizeof(*pattern), GFP_KERNEL); 800 if (!pattern) 801 return -ENOMEM; 802 803 for (i = 0; i < len; i += 2) { 804 if (led_pattern[i].brightness != led_pattern[i + 1].brightness) 805 goto out_free_pattern; 806 if (led_pattern[i + 1].delta_t != 0) 807 goto out_free_pattern; 808 809 pattern[i / 2].brightness = led_pattern[i].brightness; 810 pattern[i / 2].delta_t = led_pattern[i].delta_t; 811 } 812 813 len /= 2; 814 815 /* 816 * Specifying a pattern of length 1 causes the hardware to iterate 817 * through the entire LUT, so prohibit this. 818 */ 819 if (len < 2) 820 goto out_free_pattern; 821 822 /* 823 * The LPG plays patterns with at a fixed pace, a "low pause" can be 824 * used to stretch the first delay of the pattern and a "high pause" 825 * the last one. 826 * 827 * In order to save space the pattern can be played in "ping pong" 828 * mode, in which the pattern is first played forward, then "high 829 * pause" is applied, then the pattern is played backwards and finally 830 * the "low pause" is applied. 831 * 832 * The middle elements of the pattern are used to determine delta_t and 833 * the "low pause" and "high pause" multipliers are derrived from this. 834 * 835 * The first element in the pattern is used to determine "low pause". 836 * 837 * If the specified pattern is a palindrome the ping pong mode is 838 * enabled. In this scenario the delta_t of the middle entry (i.e. the 839 * last in the programmed pattern) determines the "high pause". 840 */ 841 842 /* Detect palindromes and use "ping pong" to reduce LUT usage */ 843 for (i = 0; i < len / 2; i++) { 844 brightness_a = pattern[i].brightness; 845 brightness_b = pattern[len - i - 1].brightness; 846 847 if (brightness_a != brightness_b) { 848 ping_pong = false; 849 break; 850 } 851 } 852 853 /* The pattern length to be written to the LUT */ 854 if (ping_pong) 855 actual_len = (len + 1) / 2; 856 else 857 actual_len = len; 858 859 /* 860 * Validate that all delta_t in the pattern are the same, with the 861 * exception of the middle element in case of ping_pong. 862 */ 863 delta_t = pattern[1].delta_t; 864 for (i = 2; i < len; i++) { 865 if (pattern[i].delta_t != delta_t) { 866 /* 867 * Allow last entry in the full or shortened pattern to 868 * specify hi pause. Reject other variations. 869 */ 870 if (i != actual_len - 1) 871 goto out_free_pattern; 872 } 873 } 874 875 /* LPG_RAMP_DURATION_REG is a 9bit */ 876 if (delta_t >= BIT(9)) 877 goto out_free_pattern; 878 879 /* Find "low pause" and "high pause" in the pattern */ 880 lo_pause = pattern[0].delta_t; 881 hi_pause = pattern[actual_len - 1].delta_t; 882 883 mutex_lock(&lpg->lock); 884 ret = lpg_lut_store(lpg, pattern, actual_len, &lo_idx, &hi_idx); 885 if (ret < 0) 886 goto out_unlock; 887 888 for (i = 0; i < led->num_channels; i++) { 889 chan = led->channels[i]; 890 891 chan->ramp_tick_ms = delta_t; 892 chan->ramp_ping_pong = ping_pong; 893 chan->ramp_oneshot = repeat != -1; 894 895 chan->ramp_lo_pause_ms = lo_pause; 896 chan->ramp_hi_pause_ms = hi_pause; 897 898 chan->pattern_lo_idx = lo_idx; 899 chan->pattern_hi_idx = hi_idx; 900 } 901 902 out_unlock: 903 mutex_unlock(&lpg->lock); 904 out_free_pattern: 905 kfree(pattern); 906 907 return ret; 908 } 909 910 static int lpg_pattern_single_set(struct led_classdev *cdev, 911 struct led_pattern *pattern, u32 len, 912 int repeat) 913 { 914 struct lpg_led *led = container_of(cdev, struct lpg_led, cdev); 915 int ret; 916 917 ret = lpg_pattern_set(led, pattern, len, repeat); 918 if (ret < 0) 919 return ret; 920 921 lpg_brightness_single_set(cdev, LED_FULL); 922 923 return 0; 924 } 925 926 static int lpg_pattern_mc_set(struct led_classdev *cdev, 927 struct led_pattern *pattern, u32 len, 928 int repeat) 929 { 930 struct led_classdev_mc *mc = lcdev_to_mccdev(cdev); 931 struct lpg_led *led = container_of(mc, struct lpg_led, mcdev); 932 int ret; 933 934 ret = lpg_pattern_set(led, pattern, len, repeat); 935 if (ret < 0) 936 return ret; 937 938 led_mc_calc_color_components(mc, LED_FULL); 939 lpg_brightness_set(led, cdev, mc->subled_info); 940 941 return 0; 942 } 943 944 static int lpg_pattern_clear(struct lpg_led *led) 945 { 946 struct lpg_channel *chan; 947 struct lpg *lpg = led->lpg; 948 int i; 949 950 mutex_lock(&lpg->lock); 951 952 chan = led->channels[0]; 953 lpg_lut_free(lpg, chan->pattern_lo_idx, chan->pattern_hi_idx); 954 955 for (i = 0; i < led->num_channels; i++) { 956 chan = led->channels[i]; 957 chan->pattern_lo_idx = 0; 958 chan->pattern_hi_idx = 0; 959 } 960 961 mutex_unlock(&lpg->lock); 962 963 return 0; 964 } 965 966 static int lpg_pattern_single_clear(struct led_classdev *cdev) 967 { 968 struct lpg_led *led = container_of(cdev, struct lpg_led, cdev); 969 970 return lpg_pattern_clear(led); 971 } 972 973 static int lpg_pattern_mc_clear(struct led_classdev *cdev) 974 { 975 struct led_classdev_mc *mc = lcdev_to_mccdev(cdev); 976 struct lpg_led *led = container_of(mc, struct lpg_led, mcdev); 977 978 return lpg_pattern_clear(led); 979 } 980 981 static int lpg_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) 982 { 983 struct lpg *lpg = container_of(chip, struct lpg, pwm); 984 struct lpg_channel *chan = &lpg->channels[pwm->hwpwm]; 985 986 return chan->in_use ? -EBUSY : 0; 987 } 988 989 /* 990 * Limitations: 991 * - Updating both duty and period is not done atomically, so the output signal 992 * will momentarily be a mix of the settings. 993 * - Changed parameters takes effect immediately. 994 * - A disabled channel outputs a logical 0. 995 */ 996 static int lpg_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 997 const struct pwm_state *state) 998 { 999 struct lpg *lpg = container_of(chip, struct lpg, pwm); 1000 struct lpg_channel *chan = &lpg->channels[pwm->hwpwm]; 1001 int ret = 0; 1002 1003 if (state->polarity != PWM_POLARITY_NORMAL) 1004 return -EINVAL; 1005 1006 mutex_lock(&lpg->lock); 1007 1008 if (state->enabled) { 1009 ret = lpg_calc_freq(chan, state->period); 1010 if (ret < 0) 1011 goto out_unlock; 1012 1013 lpg_calc_duty(chan, state->duty_cycle); 1014 } 1015 chan->enabled = state->enabled; 1016 1017 lpg_apply(chan); 1018 1019 triled_set(lpg, chan->triled_mask, chan->enabled ? chan->triled_mask : 0); 1020 1021 out_unlock: 1022 mutex_unlock(&lpg->lock); 1023 1024 return ret; 1025 } 1026 1027 static int lpg_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, 1028 struct pwm_state *state) 1029 { 1030 struct lpg *lpg = container_of(chip, struct lpg, pwm); 1031 struct lpg_channel *chan = &lpg->channels[pwm->hwpwm]; 1032 unsigned int resolution; 1033 unsigned int pre_div; 1034 unsigned int refclk; 1035 unsigned int val; 1036 unsigned int m; 1037 u16 pwm_value; 1038 int ret; 1039 1040 ret = regmap_read(lpg->map, chan->base + LPG_SIZE_CLK_REG, &val); 1041 if (ret) 1042 return ret; 1043 1044 if (chan->subtype == LPG_SUBTYPE_HI_RES_PWM) { 1045 refclk = lpg_clk_rates_hi_res[FIELD_GET(PWM_CLK_SELECT_HI_RES_MASK, val)]; 1046 resolution = lpg_pwm_resolution_hi_res[FIELD_GET(PWM_SIZE_HI_RES_MASK, val)]; 1047 } else { 1048 refclk = lpg_clk_rates[FIELD_GET(PWM_CLK_SELECT_MASK, val)]; 1049 resolution = 9; 1050 } 1051 1052 if (refclk) { 1053 ret = regmap_read(lpg->map, chan->base + LPG_PREDIV_CLK_REG, &val); 1054 if (ret) 1055 return ret; 1056 1057 pre_div = lpg_pre_divs[FIELD_GET(PWM_FREQ_PRE_DIV_MASK, val)]; 1058 m = FIELD_GET(PWM_FREQ_EXP_MASK, val); 1059 1060 ret = regmap_bulk_read(lpg->map, chan->base + PWM_VALUE_REG, &pwm_value, sizeof(pwm_value)); 1061 if (ret) 1062 return ret; 1063 1064 state->period = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * (1 << resolution) * 1065 pre_div * (1 << m), refclk); 1066 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pwm_value * pre_div * (1 << m), refclk); 1067 } else { 1068 state->period = 0; 1069 state->duty_cycle = 0; 1070 } 1071 1072 ret = regmap_read(lpg->map, chan->base + PWM_ENABLE_CONTROL_REG, &val); 1073 if (ret) 1074 return ret; 1075 1076 state->enabled = FIELD_GET(LPG_ENABLE_CONTROL_OUTPUT, val); 1077 state->polarity = PWM_POLARITY_NORMAL; 1078 1079 if (state->duty_cycle > state->period) 1080 state->duty_cycle = state->period; 1081 1082 return 0; 1083 } 1084 1085 static const struct pwm_ops lpg_pwm_ops = { 1086 .request = lpg_pwm_request, 1087 .apply = lpg_pwm_apply, 1088 .get_state = lpg_pwm_get_state, 1089 .owner = THIS_MODULE, 1090 }; 1091 1092 static int lpg_add_pwm(struct lpg *lpg) 1093 { 1094 int ret; 1095 1096 lpg->pwm.base = -1; 1097 lpg->pwm.dev = lpg->dev; 1098 lpg->pwm.npwm = lpg->num_channels; 1099 lpg->pwm.ops = &lpg_pwm_ops; 1100 1101 ret = pwmchip_add(&lpg->pwm); 1102 if (ret) 1103 dev_err(lpg->dev, "failed to add PWM chip: ret %d\n", ret); 1104 1105 return ret; 1106 } 1107 1108 static int lpg_parse_channel(struct lpg *lpg, struct device_node *np, 1109 struct lpg_channel **channel) 1110 { 1111 struct lpg_channel *chan; 1112 u32 color = LED_COLOR_ID_GREEN; 1113 u32 reg; 1114 int ret; 1115 1116 ret = of_property_read_u32(np, "reg", ®); 1117 if (ret || !reg || reg > lpg->num_channels) { 1118 dev_err(lpg->dev, "invalid \"reg\" of %pOFn\n", np); 1119 return -EINVAL; 1120 } 1121 1122 chan = &lpg->channels[reg - 1]; 1123 chan->in_use = true; 1124 1125 ret = of_property_read_u32(np, "color", &color); 1126 if (ret < 0 && ret != -EINVAL) { 1127 dev_err(lpg->dev, "failed to parse \"color\" of %pOF\n", np); 1128 return ret; 1129 } 1130 1131 chan->color = color; 1132 1133 *channel = chan; 1134 1135 return 0; 1136 } 1137 1138 static int lpg_add_led(struct lpg *lpg, struct device_node *np) 1139 { 1140 struct led_init_data init_data = {}; 1141 struct led_classdev *cdev; 1142 struct device_node *child; 1143 struct mc_subled *info; 1144 struct lpg_led *led; 1145 const char *state; 1146 int num_channels; 1147 u32 color = 0; 1148 int ret; 1149 int i; 1150 1151 ret = of_property_read_u32(np, "color", &color); 1152 if (ret < 0 && ret != -EINVAL) { 1153 dev_err(lpg->dev, "failed to parse \"color\" of %pOF\n", np); 1154 return ret; 1155 } 1156 1157 if (color == LED_COLOR_ID_RGB) 1158 num_channels = of_get_available_child_count(np); 1159 else 1160 num_channels = 1; 1161 1162 led = devm_kzalloc(lpg->dev, struct_size(led, channels, num_channels), GFP_KERNEL); 1163 if (!led) 1164 return -ENOMEM; 1165 1166 led->lpg = lpg; 1167 led->num_channels = num_channels; 1168 1169 if (color == LED_COLOR_ID_RGB) { 1170 info = devm_kcalloc(lpg->dev, num_channels, sizeof(*info), GFP_KERNEL); 1171 if (!info) 1172 return -ENOMEM; 1173 i = 0; 1174 for_each_available_child_of_node(np, child) { 1175 ret = lpg_parse_channel(lpg, child, &led->channels[i]); 1176 if (ret < 0) 1177 return ret; 1178 1179 info[i].color_index = led->channels[i]->color; 1180 info[i].intensity = 0; 1181 i++; 1182 } 1183 1184 led->mcdev.subled_info = info; 1185 led->mcdev.num_colors = num_channels; 1186 1187 cdev = &led->mcdev.led_cdev; 1188 cdev->brightness_set_blocking = lpg_brightness_mc_set; 1189 cdev->blink_set = lpg_blink_mc_set; 1190 1191 /* Register pattern accessors only if we have a LUT block */ 1192 if (lpg->lut_base) { 1193 cdev->pattern_set = lpg_pattern_mc_set; 1194 cdev->pattern_clear = lpg_pattern_mc_clear; 1195 } 1196 } else { 1197 ret = lpg_parse_channel(lpg, np, &led->channels[0]); 1198 if (ret < 0) 1199 return ret; 1200 1201 cdev = &led->cdev; 1202 cdev->brightness_set_blocking = lpg_brightness_single_set; 1203 cdev->blink_set = lpg_blink_single_set; 1204 1205 /* Register pattern accessors only if we have a LUT block */ 1206 if (lpg->lut_base) { 1207 cdev->pattern_set = lpg_pattern_single_set; 1208 cdev->pattern_clear = lpg_pattern_single_clear; 1209 } 1210 } 1211 1212 cdev->default_trigger = of_get_property(np, "linux,default-trigger", NULL); 1213 cdev->max_brightness = LPG_RESOLUTION_9BIT - 1; 1214 1215 if (!of_property_read_string(np, "default-state", &state) && 1216 !strcmp(state, "on")) 1217 cdev->brightness = cdev->max_brightness; 1218 else 1219 cdev->brightness = LED_OFF; 1220 1221 cdev->brightness_set_blocking(cdev, cdev->brightness); 1222 1223 init_data.fwnode = of_fwnode_handle(np); 1224 1225 if (color == LED_COLOR_ID_RGB) 1226 ret = devm_led_classdev_multicolor_register_ext(lpg->dev, &led->mcdev, &init_data); 1227 else 1228 ret = devm_led_classdev_register_ext(lpg->dev, &led->cdev, &init_data); 1229 if (ret) 1230 dev_err(lpg->dev, "unable to register %s\n", cdev->name); 1231 1232 return ret; 1233 } 1234 1235 static int lpg_init_channels(struct lpg *lpg) 1236 { 1237 const struct lpg_data *data = lpg->data; 1238 struct lpg_channel *chan; 1239 int i; 1240 1241 lpg->num_channels = data->num_channels; 1242 lpg->channels = devm_kcalloc(lpg->dev, data->num_channels, 1243 sizeof(struct lpg_channel), GFP_KERNEL); 1244 if (!lpg->channels) 1245 return -ENOMEM; 1246 1247 for (i = 0; i < data->num_channels; i++) { 1248 chan = &lpg->channels[i]; 1249 1250 chan->lpg = lpg; 1251 chan->base = data->channels[i].base; 1252 chan->triled_mask = data->channels[i].triled_mask; 1253 chan->lut_mask = BIT(i); 1254 1255 regmap_read(lpg->map, chan->base + LPG_SUBTYPE_REG, &chan->subtype); 1256 } 1257 1258 return 0; 1259 } 1260 1261 static int lpg_init_triled(struct lpg *lpg) 1262 { 1263 struct device_node *np = lpg->dev->of_node; 1264 int ret; 1265 1266 /* Skip initialization if we don't have a triled block */ 1267 if (!lpg->data->triled_base) 1268 return 0; 1269 1270 lpg->triled_base = lpg->data->triled_base; 1271 lpg->triled_has_atc_ctl = lpg->data->triled_has_atc_ctl; 1272 lpg->triled_has_src_sel = lpg->data->triled_has_src_sel; 1273 1274 if (lpg->triled_has_src_sel) { 1275 ret = of_property_read_u32(np, "qcom,power-source", &lpg->triled_src); 1276 if (ret || lpg->triled_src == 2 || lpg->triled_src > 3) { 1277 dev_err(lpg->dev, "invalid power source\n"); 1278 return -EINVAL; 1279 } 1280 } 1281 1282 /* Disable automatic trickle charge LED */ 1283 if (lpg->triled_has_atc_ctl) 1284 regmap_write(lpg->map, lpg->triled_base + TRI_LED_ATC_CTL, 0); 1285 1286 /* Configure power source */ 1287 if (lpg->triled_has_src_sel) 1288 regmap_write(lpg->map, lpg->triled_base + TRI_LED_SRC_SEL, lpg->triled_src); 1289 1290 /* Default all outputs to off */ 1291 regmap_write(lpg->map, lpg->triled_base + TRI_LED_EN_CTL, 0); 1292 1293 return 0; 1294 } 1295 1296 static int lpg_init_lut(struct lpg *lpg) 1297 { 1298 const struct lpg_data *data = lpg->data; 1299 1300 if (!data->lut_base) 1301 return 0; 1302 1303 lpg->lut_base = data->lut_base; 1304 lpg->lut_size = data->lut_size; 1305 1306 lpg->lut_bitmap = devm_bitmap_zalloc(lpg->dev, lpg->lut_size, GFP_KERNEL); 1307 if (!lpg->lut_bitmap) 1308 return -ENOMEM; 1309 1310 return 0; 1311 } 1312 1313 static int lpg_probe(struct platform_device *pdev) 1314 { 1315 struct device_node *np; 1316 struct lpg *lpg; 1317 int ret; 1318 int i; 1319 1320 lpg = devm_kzalloc(&pdev->dev, sizeof(*lpg), GFP_KERNEL); 1321 if (!lpg) 1322 return -ENOMEM; 1323 1324 lpg->data = of_device_get_match_data(&pdev->dev); 1325 if (!lpg->data) 1326 return -EINVAL; 1327 1328 platform_set_drvdata(pdev, lpg); 1329 1330 lpg->dev = &pdev->dev; 1331 mutex_init(&lpg->lock); 1332 1333 lpg->map = dev_get_regmap(pdev->dev.parent, NULL); 1334 if (!lpg->map) 1335 return dev_err_probe(&pdev->dev, -ENXIO, "parent regmap unavailable\n"); 1336 1337 ret = lpg_init_channels(lpg); 1338 if (ret < 0) 1339 return ret; 1340 1341 ret = lpg_parse_dtest(lpg); 1342 if (ret < 0) 1343 return ret; 1344 1345 ret = lpg_init_triled(lpg); 1346 if (ret < 0) 1347 return ret; 1348 1349 ret = lpg_init_lut(lpg); 1350 if (ret < 0) 1351 return ret; 1352 1353 for_each_available_child_of_node(pdev->dev.of_node, np) { 1354 ret = lpg_add_led(lpg, np); 1355 if (ret) 1356 return ret; 1357 } 1358 1359 for (i = 0; i < lpg->num_channels; i++) 1360 lpg_apply_dtest(&lpg->channels[i]); 1361 1362 return lpg_add_pwm(lpg); 1363 } 1364 1365 static int lpg_remove(struct platform_device *pdev) 1366 { 1367 struct lpg *lpg = platform_get_drvdata(pdev); 1368 1369 pwmchip_remove(&lpg->pwm); 1370 1371 return 0; 1372 } 1373 1374 static const struct lpg_data pm8916_pwm_data = { 1375 .num_channels = 1, 1376 .channels = (const struct lpg_channel_data[]) { 1377 { .base = 0xbc00 }, 1378 }, 1379 }; 1380 1381 static const struct lpg_data pm8941_lpg_data = { 1382 .lut_base = 0xb000, 1383 .lut_size = 64, 1384 1385 .triled_base = 0xd000, 1386 .triled_has_atc_ctl = true, 1387 .triled_has_src_sel = true, 1388 1389 .num_channels = 8, 1390 .channels = (const struct lpg_channel_data[]) { 1391 { .base = 0xb100 }, 1392 { .base = 0xb200 }, 1393 { .base = 0xb300 }, 1394 { .base = 0xb400 }, 1395 { .base = 0xb500, .triled_mask = BIT(5) }, 1396 { .base = 0xb600, .triled_mask = BIT(6) }, 1397 { .base = 0xb700, .triled_mask = BIT(7) }, 1398 { .base = 0xb800 }, 1399 }, 1400 }; 1401 1402 static const struct lpg_data pm8994_lpg_data = { 1403 .lut_base = 0xb000, 1404 .lut_size = 64, 1405 1406 .num_channels = 6, 1407 .channels = (const struct lpg_channel_data[]) { 1408 { .base = 0xb100 }, 1409 { .base = 0xb200 }, 1410 { .base = 0xb300 }, 1411 { .base = 0xb400 }, 1412 { .base = 0xb500 }, 1413 { .base = 0xb600 }, 1414 }, 1415 }; 1416 1417 static const struct lpg_data pmi8994_lpg_data = { 1418 .lut_base = 0xb000, 1419 .lut_size = 24, 1420 1421 .triled_base = 0xd000, 1422 .triled_has_atc_ctl = true, 1423 .triled_has_src_sel = true, 1424 1425 .num_channels = 4, 1426 .channels = (const struct lpg_channel_data[]) { 1427 { .base = 0xb100, .triled_mask = BIT(5) }, 1428 { .base = 0xb200, .triled_mask = BIT(6) }, 1429 { .base = 0xb300, .triled_mask = BIT(7) }, 1430 { .base = 0xb400 }, 1431 }, 1432 }; 1433 1434 static const struct lpg_data pmi8998_lpg_data = { 1435 .lut_base = 0xb000, 1436 .lut_size = 49, 1437 1438 .triled_base = 0xd000, 1439 1440 .num_channels = 6, 1441 .channels = (const struct lpg_channel_data[]) { 1442 { .base = 0xb100 }, 1443 { .base = 0xb200 }, 1444 { .base = 0xb300, .triled_mask = BIT(5) }, 1445 { .base = 0xb400, .triled_mask = BIT(6) }, 1446 { .base = 0xb500, .triled_mask = BIT(7) }, 1447 { .base = 0xb600 }, 1448 }, 1449 }; 1450 1451 static const struct lpg_data pm8150b_lpg_data = { 1452 .lut_base = 0xb000, 1453 .lut_size = 24, 1454 1455 .triled_base = 0xd000, 1456 1457 .num_channels = 2, 1458 .channels = (const struct lpg_channel_data[]) { 1459 { .base = 0xb100, .triled_mask = BIT(7) }, 1460 { .base = 0xb200, .triled_mask = BIT(6) }, 1461 }, 1462 }; 1463 1464 static const struct lpg_data pm8150l_lpg_data = { 1465 .lut_base = 0xb000, 1466 .lut_size = 48, 1467 1468 .triled_base = 0xd000, 1469 1470 .num_channels = 5, 1471 .channels = (const struct lpg_channel_data[]) { 1472 { .base = 0xb100, .triled_mask = BIT(7) }, 1473 { .base = 0xb200, .triled_mask = BIT(6) }, 1474 { .base = 0xb300, .triled_mask = BIT(5) }, 1475 { .base = 0xbc00 }, 1476 { .base = 0xbd00 }, 1477 1478 }, 1479 }; 1480 1481 static const struct lpg_data pm8350c_pwm_data = { 1482 .triled_base = 0xef00, 1483 1484 .num_channels = 4, 1485 .channels = (const struct lpg_channel_data[]) { 1486 { .base = 0xe800, .triled_mask = BIT(7) }, 1487 { .base = 0xe900, .triled_mask = BIT(6) }, 1488 { .base = 0xea00, .triled_mask = BIT(5) }, 1489 { .base = 0xeb00 }, 1490 }, 1491 }; 1492 1493 static const struct lpg_data pmk8550_pwm_data = { 1494 .num_channels = 2, 1495 .channels = (const struct lpg_channel_data[]) { 1496 { .base = 0xe800 }, 1497 { .base = 0xe900 }, 1498 }, 1499 }; 1500 1501 static const struct of_device_id lpg_of_table[] = { 1502 { .compatible = "qcom,pm8150b-lpg", .data = &pm8150b_lpg_data }, 1503 { .compatible = "qcom,pm8150l-lpg", .data = &pm8150l_lpg_data }, 1504 { .compatible = "qcom,pm8350c-pwm", .data = &pm8350c_pwm_data }, 1505 { .compatible = "qcom,pm8916-pwm", .data = &pm8916_pwm_data }, 1506 { .compatible = "qcom,pm8941-lpg", .data = &pm8941_lpg_data }, 1507 { .compatible = "qcom,pm8994-lpg", .data = &pm8994_lpg_data }, 1508 { .compatible = "qcom,pmi8994-lpg", .data = &pmi8994_lpg_data }, 1509 { .compatible = "qcom,pmi8998-lpg", .data = &pmi8998_lpg_data }, 1510 { .compatible = "qcom,pmc8180c-lpg", .data = &pm8150l_lpg_data }, 1511 { .compatible = "qcom,pmk8550-pwm", .data = &pmk8550_pwm_data }, 1512 {} 1513 }; 1514 MODULE_DEVICE_TABLE(of, lpg_of_table); 1515 1516 static struct platform_driver lpg_driver = { 1517 .probe = lpg_probe, 1518 .remove = lpg_remove, 1519 .driver = { 1520 .name = "qcom-spmi-lpg", 1521 .of_match_table = lpg_of_table, 1522 }, 1523 }; 1524 module_platform_driver(lpg_driver); 1525 1526 MODULE_DESCRIPTION("Qualcomm LPG LED driver"); 1527 MODULE_LICENSE("GPL v2"); 1528