1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright 2015-16 Golden Delicious Computers 4 * 5 * Author: Nikolaus Schaller <hns@goldelico.com> 6 * 7 * LED driver for the IS31FL319{0,1,3,6,9} to drive 1, 3, 6 or 9 light 8 * effect LEDs. 9 */ 10 11 #include <linux/err.h> 12 #include <linux/i2c.h> 13 #include <linux/leds.h> 14 #include <linux/mod_devicetable.h> 15 #include <linux/module.h> 16 #include <linux/property.h> 17 #include <linux/regmap.h> 18 #include <linux/slab.h> 19 #include <linux/delay.h> 20 #include <linux/gpio/consumer.h> 21 22 /* register numbers */ 23 #define IS31FL319X_SHUTDOWN 0x00 24 25 /* registers for 3190, 3191 and 3193 */ 26 #define IS31FL3190_BREATHING 0x01 27 #define IS31FL3190_LEDMODE 0x02 28 #define IS31FL3190_CURRENT 0x03 29 #define IS31FL3190_PWM(channel) (0x04 + channel) 30 #define IS31FL3190_DATA_UPDATE 0x07 31 #define IS31FL3190_T0(channel) (0x0a + channel) 32 #define IS31FL3190_T1T2(channel) (0x10 + channel) 33 #define IS31FL3190_T3T4(channel) (0x16 + channel) 34 #define IS31FL3190_TIME_UPDATE 0x1c 35 #define IS31FL3190_LEDCONTROL 0x1d 36 #define IS31FL3190_RESET 0x2f 37 38 #define IS31FL3190_CURRENT_uA_MIN 5000 39 #define IS31FL3190_CURRENT_uA_DEFAULT 42000 40 #define IS31FL3190_CURRENT_uA_MAX 42000 41 #define IS31FL3190_CURRENT_SHIFT 2 42 #define IS31FL3190_CURRENT_MASK GENMASK(4, 2) 43 #define IS31FL3190_CURRENT_5_mA 0x02 44 #define IS31FL3190_CURRENT_10_mA 0x01 45 #define IS31FL3190_CURRENT_17dot5_mA 0x04 46 #define IS31FL3190_CURRENT_30_mA 0x03 47 #define IS31FL3190_CURRENT_42_mA 0x00 48 49 /* registers for 3196 and 3199 */ 50 #define IS31FL3196_CTRL1 0x01 51 #define IS31FL3196_CTRL2 0x02 52 #define IS31FL3196_CONFIG1 0x03 53 #define IS31FL3196_CONFIG2 0x04 54 #define IS31FL3196_RAMP_MODE 0x05 55 #define IS31FL3196_BREATH_MARK 0x06 56 #define IS31FL3196_PWM(channel) (0x07 + channel) 57 #define IS31FL3196_DATA_UPDATE 0x10 58 #define IS31FL3196_T0(channel) (0x11 + channel) 59 #define IS31FL3196_T123_1 0x1a 60 #define IS31FL3196_T123_2 0x1b 61 #define IS31FL3196_T123_3 0x1c 62 #define IS31FL3196_T4(channel) (0x1d + channel) 63 #define IS31FL3196_TIME_UPDATE 0x26 64 #define IS31FL3196_RESET 0xff 65 66 #define IS31FL3196_REG_CNT (IS31FL3196_RESET + 1) 67 68 #define IS31FL319X_MAX_LEDS 9 69 70 /* CS (Current Setting) in CONFIG2 register */ 71 #define IS31FL3196_CONFIG2_CS_SHIFT 4 72 #define IS31FL3196_CONFIG2_CS_MASK GENMASK(2, 0) 73 #define IS31FL3196_CONFIG2_CS_STEP_REF 12 74 75 #define IS31FL3196_CURRENT_uA_MIN 5000 76 #define IS31FL3196_CURRENT_uA_MAX 40000 77 #define IS31FL3196_CURRENT_uA_STEP 5000 78 #define IS31FL3196_CURRENT_uA_DEFAULT 20000 79 80 /* Audio gain in CONFIG2 register */ 81 #define IS31FL3196_AUDIO_GAIN_DB_MAX ((u32)21) 82 #define IS31FL3196_AUDIO_GAIN_DB_STEP 3 83 84 /* 85 * regmap is used as a cache of chip's register space, 86 * to avoid reading back brightness values from chip, 87 * which is known to hang. 88 */ 89 struct is31fl319x_chip { 90 const struct is31fl319x_chipdef *cdef; 91 struct i2c_client *client; 92 struct gpio_desc *shutdown_gpio; 93 struct regmap *regmap; 94 struct mutex lock; 95 u32 audio_gain_db; 96 97 struct is31fl319x_led { 98 struct is31fl319x_chip *chip; 99 struct led_classdev cdev; 100 u32 max_microamp; 101 bool configured; 102 } leds[IS31FL319X_MAX_LEDS]; 103 }; 104 105 struct is31fl319x_chipdef { 106 int num_leds; 107 u8 reset_reg; 108 const struct regmap_config *is31fl319x_regmap_config; 109 int (*brightness_set)(struct led_classdev *cdev, enum led_brightness brightness); 110 u32 current_default; 111 u32 current_min; 112 u32 current_max; 113 bool is_3196or3199; 114 }; 115 116 static bool is31fl319x_readable_reg(struct device *dev, unsigned int reg) 117 { 118 /* we have no readable registers */ 119 return false; 120 } 121 122 static bool is31fl3190_volatile_reg(struct device *dev, unsigned int reg) 123 { 124 /* volatile registers are not cached */ 125 switch (reg) { 126 case IS31FL3190_DATA_UPDATE: 127 case IS31FL3190_TIME_UPDATE: 128 case IS31FL3190_RESET: 129 return true; /* always write-through */ 130 default: 131 return false; 132 } 133 } 134 135 static const struct reg_default is31fl3190_reg_defaults[] = { 136 { IS31FL3190_LEDMODE, 0x00 }, 137 { IS31FL3190_CURRENT, 0x00 }, 138 { IS31FL3190_PWM(0), 0x00 }, 139 { IS31FL3190_PWM(1), 0x00 }, 140 { IS31FL3190_PWM(2), 0x00 }, 141 }; 142 143 static struct regmap_config is31fl3190_regmap_config = { 144 .reg_bits = 8, 145 .val_bits = 8, 146 .max_register = IS31FL3190_RESET, 147 .cache_type = REGCACHE_FLAT, 148 .readable_reg = is31fl319x_readable_reg, 149 .volatile_reg = is31fl3190_volatile_reg, 150 .reg_defaults = is31fl3190_reg_defaults, 151 .num_reg_defaults = ARRAY_SIZE(is31fl3190_reg_defaults), 152 }; 153 154 static bool is31fl3196_volatile_reg(struct device *dev, unsigned int reg) 155 { 156 /* volatile registers are not cached */ 157 switch (reg) { 158 case IS31FL3196_DATA_UPDATE: 159 case IS31FL3196_TIME_UPDATE: 160 case IS31FL3196_RESET: 161 return true; /* always write-through */ 162 default: 163 return false; 164 } 165 } 166 167 static const struct reg_default is31fl3196_reg_defaults[] = { 168 { IS31FL3196_CONFIG1, 0x00 }, 169 { IS31FL3196_CONFIG2, 0x00 }, 170 { IS31FL3196_PWM(0), 0x00 }, 171 { IS31FL3196_PWM(1), 0x00 }, 172 { IS31FL3196_PWM(2), 0x00 }, 173 { IS31FL3196_PWM(3), 0x00 }, 174 { IS31FL3196_PWM(4), 0x00 }, 175 { IS31FL3196_PWM(5), 0x00 }, 176 { IS31FL3196_PWM(6), 0x00 }, 177 { IS31FL3196_PWM(7), 0x00 }, 178 { IS31FL3196_PWM(8), 0x00 }, 179 }; 180 181 static struct regmap_config is31fl3196_regmap_config = { 182 .reg_bits = 8, 183 .val_bits = 8, 184 .max_register = IS31FL3196_REG_CNT, 185 .cache_type = REGCACHE_FLAT, 186 .readable_reg = is31fl319x_readable_reg, 187 .volatile_reg = is31fl3196_volatile_reg, 188 .reg_defaults = is31fl3196_reg_defaults, 189 .num_reg_defaults = ARRAY_SIZE(is31fl3196_reg_defaults), 190 }; 191 192 static int is31fl3190_brightness_set(struct led_classdev *cdev, 193 enum led_brightness brightness) 194 { 195 struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led, cdev); 196 struct is31fl319x_chip *is31 = led->chip; 197 int chan = led - is31->leds; 198 int ret; 199 int i; 200 u8 ctrl = 0; 201 202 dev_dbg(&is31->client->dev, "channel %d: %d\n", chan, brightness); 203 204 mutex_lock(&is31->lock); 205 206 /* update PWM register */ 207 ret = regmap_write(is31->regmap, IS31FL3190_PWM(chan), brightness); 208 if (ret < 0) 209 goto out; 210 211 /* read current brightness of all PWM channels */ 212 for (i = 0; i < is31->cdef->num_leds; i++) { 213 unsigned int pwm_value; 214 bool on; 215 216 /* 217 * since neither cdev nor the chip can provide 218 * the current setting, we read from the regmap cache 219 */ 220 221 ret = regmap_read(is31->regmap, IS31FL3190_PWM(i), &pwm_value); 222 on = ret >= 0 && pwm_value > LED_OFF; 223 224 ctrl |= on << i; 225 } 226 227 if (ctrl > 0) { 228 dev_dbg(&is31->client->dev, "power up %02x\n", ctrl); 229 regmap_write(is31->regmap, IS31FL3190_LEDCONTROL, ctrl); 230 /* update PWMs */ 231 regmap_write(is31->regmap, IS31FL3190_DATA_UPDATE, 0x00); 232 /* enable chip from shut down and enable all channels */ 233 ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x20); 234 } else { 235 dev_dbg(&is31->client->dev, "power down\n"); 236 /* shut down (no need to clear LEDCONTROL) */ 237 ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01); 238 } 239 240 out: 241 mutex_unlock(&is31->lock); 242 243 return ret; 244 } 245 246 static int is31fl3196_brightness_set(struct led_classdev *cdev, 247 enum led_brightness brightness) 248 { 249 struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led, cdev); 250 struct is31fl319x_chip *is31 = led->chip; 251 int chan = led - is31->leds; 252 int ret; 253 int i; 254 u8 ctrl1 = 0, ctrl2 = 0; 255 256 dev_dbg(&is31->client->dev, "channel %d: %d\n", chan, brightness); 257 258 mutex_lock(&is31->lock); 259 260 /* update PWM register */ 261 ret = regmap_write(is31->regmap, IS31FL3196_PWM(chan), brightness); 262 if (ret < 0) 263 goto out; 264 265 /* read current brightness of all PWM channels */ 266 for (i = 0; i < is31->cdef->num_leds; i++) { 267 unsigned int pwm_value; 268 bool on; 269 270 /* 271 * since neither cdev nor the chip can provide 272 * the current setting, we read from the regmap cache 273 */ 274 275 ret = regmap_read(is31->regmap, IS31FL3196_PWM(i), &pwm_value); 276 on = ret >= 0 && pwm_value > LED_OFF; 277 278 if (i < 3) 279 ctrl1 |= on << i; /* 0..2 => bit 0..2 */ 280 else if (i < 6) 281 ctrl1 |= on << (i + 1); /* 3..5 => bit 4..6 */ 282 else 283 ctrl2 |= on << (i - 6); /* 6..8 => bit 0..2 */ 284 } 285 286 if (ctrl1 > 0 || ctrl2 > 0) { 287 dev_dbg(&is31->client->dev, "power up %02x %02x\n", 288 ctrl1, ctrl2); 289 regmap_write(is31->regmap, IS31FL3196_CTRL1, ctrl1); 290 regmap_write(is31->regmap, IS31FL3196_CTRL2, ctrl2); 291 /* update PWMs */ 292 regmap_write(is31->regmap, IS31FL3196_DATA_UPDATE, 0x00); 293 /* enable chip from shut down */ 294 ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01); 295 } else { 296 dev_dbg(&is31->client->dev, "power down\n"); 297 /* shut down (no need to clear CTRL1/2) */ 298 ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x00); 299 } 300 301 out: 302 mutex_unlock(&is31->lock); 303 304 return ret; 305 } 306 307 static const struct is31fl319x_chipdef is31fl3190_cdef = { 308 .num_leds = 1, 309 .reset_reg = IS31FL3190_RESET, 310 .is31fl319x_regmap_config = &is31fl3190_regmap_config, 311 .brightness_set = is31fl3190_brightness_set, 312 .current_default = IS31FL3190_CURRENT_uA_DEFAULT, 313 .current_min = IS31FL3190_CURRENT_uA_MIN, 314 .current_max = IS31FL3190_CURRENT_uA_MAX, 315 .is_3196or3199 = false, 316 }; 317 318 static const struct is31fl319x_chipdef is31fl3193_cdef = { 319 .num_leds = 3, 320 .reset_reg = IS31FL3190_RESET, 321 .is31fl319x_regmap_config = &is31fl3190_regmap_config, 322 .brightness_set = is31fl3190_brightness_set, 323 .current_default = IS31FL3190_CURRENT_uA_DEFAULT, 324 .current_min = IS31FL3190_CURRENT_uA_MIN, 325 .current_max = IS31FL3190_CURRENT_uA_MAX, 326 .is_3196or3199 = false, 327 }; 328 329 static const struct is31fl319x_chipdef is31fl3196_cdef = { 330 .num_leds = 6, 331 .reset_reg = IS31FL3196_RESET, 332 .is31fl319x_regmap_config = &is31fl3196_regmap_config, 333 .brightness_set = is31fl3196_brightness_set, 334 .current_default = IS31FL3196_CURRENT_uA_DEFAULT, 335 .current_min = IS31FL3196_CURRENT_uA_MIN, 336 .current_max = IS31FL3196_CURRENT_uA_MAX, 337 .is_3196or3199 = true, 338 }; 339 340 static const struct is31fl319x_chipdef is31fl3199_cdef = { 341 .num_leds = 9, 342 .reset_reg = IS31FL3196_RESET, 343 .is31fl319x_regmap_config = &is31fl3196_regmap_config, 344 .brightness_set = is31fl3196_brightness_set, 345 .current_default = IS31FL3196_CURRENT_uA_DEFAULT, 346 .current_min = IS31FL3196_CURRENT_uA_MIN, 347 .current_max = IS31FL3196_CURRENT_uA_MAX, 348 .is_3196or3199 = true, 349 }; 350 351 static const struct of_device_id of_is31fl319x_match[] = { 352 { .compatible = "issi,is31fl3190", .data = &is31fl3190_cdef, }, 353 { .compatible = "issi,is31fl3191", .data = &is31fl3190_cdef, }, 354 { .compatible = "issi,is31fl3193", .data = &is31fl3193_cdef, }, 355 { .compatible = "issi,is31fl3196", .data = &is31fl3196_cdef, }, 356 { .compatible = "issi,is31fl3199", .data = &is31fl3199_cdef, }, 357 { .compatible = "si-en,sn3190", .data = &is31fl3190_cdef, }, 358 { .compatible = "si-en,sn3191", .data = &is31fl3190_cdef, }, 359 { .compatible = "si-en,sn3193", .data = &is31fl3193_cdef, }, 360 { .compatible = "si-en,sn3196", .data = &is31fl3196_cdef, }, 361 { .compatible = "si-en,sn3199", .data = &is31fl3199_cdef, }, 362 { } 363 }; 364 MODULE_DEVICE_TABLE(of, of_is31fl319x_match); 365 366 static int is31fl319x_parse_child_fw(const struct device *dev, 367 const struct fwnode_handle *child, 368 struct is31fl319x_led *led, 369 struct is31fl319x_chip *is31) 370 { 371 struct led_classdev *cdev = &led->cdev; 372 int ret; 373 374 if (fwnode_property_read_string(child, "label", &cdev->name)) 375 cdev->name = fwnode_get_name(child); 376 377 ret = fwnode_property_read_string(child, "linux,default-trigger", &cdev->default_trigger); 378 if (ret < 0 && ret != -EINVAL) /* is optional */ 379 return ret; 380 381 led->max_microamp = is31->cdef->current_default; 382 ret = fwnode_property_read_u32(child, "led-max-microamp", &led->max_microamp); 383 if (!ret) { 384 if (led->max_microamp < is31->cdef->current_min) 385 return -EINVAL; /* not supported */ 386 led->max_microamp = min(led->max_microamp, 387 is31->cdef->current_max); 388 } 389 390 return 0; 391 } 392 393 static int is31fl319x_parse_fw(struct device *dev, struct is31fl319x_chip *is31) 394 { 395 struct fwnode_handle *fwnode = dev_fwnode(dev), *child; 396 int count; 397 int ret; 398 399 is31->shutdown_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH); 400 if (IS_ERR(is31->shutdown_gpio)) 401 return dev_err_probe(dev, PTR_ERR(is31->shutdown_gpio), 402 "Failed to get shutdown gpio\n"); 403 404 is31->cdef = device_get_match_data(dev); 405 406 count = 0; 407 fwnode_for_each_available_child_node(fwnode, child) 408 count++; 409 410 dev_dbg(dev, "probing with %d leds defined in DT\n", count); 411 412 if (!count || count > is31->cdef->num_leds) 413 return dev_err_probe(dev, -ENODEV, 414 "Number of leds defined must be between 1 and %u\n", 415 is31->cdef->num_leds); 416 417 fwnode_for_each_available_child_node(fwnode, child) { 418 struct is31fl319x_led *led; 419 u32 reg; 420 421 ret = fwnode_property_read_u32(child, "reg", ®); 422 if (ret) { 423 ret = dev_err_probe(dev, ret, "Failed to read led 'reg' property\n"); 424 goto put_child_node; 425 } 426 427 if (reg < 1 || reg > is31->cdef->num_leds) { 428 ret = dev_err_probe(dev, -EINVAL, "invalid led reg %u\n", reg); 429 goto put_child_node; 430 } 431 432 led = &is31->leds[reg - 1]; 433 434 if (led->configured) { 435 ret = dev_err_probe(dev, -EINVAL, "led %u is already configured\n", reg); 436 goto put_child_node; 437 } 438 439 ret = is31fl319x_parse_child_fw(dev, child, led, is31); 440 if (ret) { 441 ret = dev_err_probe(dev, ret, "led %u DT parsing failed\n", reg); 442 goto put_child_node; 443 } 444 445 led->configured = true; 446 } 447 448 is31->audio_gain_db = 0; 449 if (is31->cdef->is_3196or3199) { 450 ret = fwnode_property_read_u32(fwnode, "audio-gain-db", &is31->audio_gain_db); 451 if (!ret) 452 is31->audio_gain_db = min(is31->audio_gain_db, 453 IS31FL3196_AUDIO_GAIN_DB_MAX); 454 } 455 456 return 0; 457 458 put_child_node: 459 fwnode_handle_put(child); 460 return ret; 461 } 462 463 static inline int is31fl3190_microamp_to_cs(struct device *dev, u32 microamp) 464 { 465 switch (microamp) { 466 case 5000: 467 return IS31FL3190_CURRENT_5_mA; 468 case 10000: 469 return IS31FL3190_CURRENT_10_mA; 470 case 17500: 471 return IS31FL3190_CURRENT_17dot5_mA; 472 case 30000: 473 return IS31FL3190_CURRENT_30_mA; 474 case 42000: 475 return IS31FL3190_CURRENT_42_mA; 476 default: 477 dev_warn(dev, "Unsupported current value: %d, using 5000 µA!\n", microamp); 478 return IS31FL3190_CURRENT_5_mA; 479 } 480 } 481 482 static inline int is31fl3196_microamp_to_cs(struct device *dev, u32 microamp) 483 { 484 /* round down to nearest supported value (range check done by caller) */ 485 u32 step = microamp / IS31FL3196_CURRENT_uA_STEP; 486 487 return ((IS31FL3196_CONFIG2_CS_STEP_REF - step) & 488 IS31FL3196_CONFIG2_CS_MASK) << 489 IS31FL3196_CONFIG2_CS_SHIFT; /* CS encoding */ 490 } 491 492 static inline int is31fl3196_db_to_gain(u32 dezibel) 493 { 494 /* round down to nearest supported value (range check done by caller) */ 495 return dezibel / IS31FL3196_AUDIO_GAIN_DB_STEP; 496 } 497 498 static int is31fl319x_probe(struct i2c_client *client) 499 { 500 struct is31fl319x_chip *is31; 501 struct device *dev = &client->dev; 502 int err; 503 int i = 0; 504 u32 aggregated_led_microamp; 505 506 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 507 return -EIO; 508 509 is31 = devm_kzalloc(&client->dev, sizeof(*is31), GFP_KERNEL); 510 if (!is31) 511 return -ENOMEM; 512 513 mutex_init(&is31->lock); 514 err = devm_add_action(dev, (void (*)(void *))mutex_destroy, &is31->lock); 515 if (err) 516 return err; 517 518 err = is31fl319x_parse_fw(&client->dev, is31); 519 if (err) 520 return err; 521 522 if (is31->shutdown_gpio) { 523 gpiod_direction_output(is31->shutdown_gpio, 0); 524 mdelay(5); 525 gpiod_direction_output(is31->shutdown_gpio, 1); 526 } 527 528 is31->client = client; 529 is31->regmap = devm_regmap_init_i2c(client, is31->cdef->is31fl319x_regmap_config); 530 if (IS_ERR(is31->regmap)) 531 return dev_err_probe(dev, PTR_ERR(is31->regmap), "failed to allocate register map\n"); 532 533 i2c_set_clientdata(client, is31); 534 535 /* check for write-reply from chip (we can't read any registers) */ 536 err = regmap_write(is31->regmap, is31->cdef->reset_reg, 0x00); 537 if (err < 0) 538 return dev_err_probe(dev, err, "no response from chip write\n"); 539 540 /* 541 * Kernel conventions require per-LED led-max-microamp property. 542 * But the chip does not allow to limit individual LEDs. 543 * So we take minimum from all subnodes for safety of hardware. 544 */ 545 aggregated_led_microamp = is31->cdef->current_max; 546 for (i = 0; i < is31->cdef->num_leds; i++) 547 if (is31->leds[i].configured && 548 is31->leds[i].max_microamp < aggregated_led_microamp) 549 aggregated_led_microamp = is31->leds[i].max_microamp; 550 551 if (is31->cdef->is_3196or3199) 552 regmap_write(is31->regmap, IS31FL3196_CONFIG2, 553 is31fl3196_microamp_to_cs(dev, aggregated_led_microamp) | 554 is31fl3196_db_to_gain(is31->audio_gain_db)); 555 else 556 regmap_update_bits(is31->regmap, IS31FL3190_CURRENT, IS31FL3190_CURRENT_MASK, 557 is31fl3190_microamp_to_cs(dev, aggregated_led_microamp) << IS31FL3190_CURRENT_SHIFT); 558 559 for (i = 0; i < is31->cdef->num_leds; i++) { 560 struct is31fl319x_led *led = &is31->leds[i]; 561 562 if (!led->configured) 563 continue; 564 565 led->chip = is31; 566 led->cdev.brightness_set_blocking = is31->cdef->brightness_set; 567 568 err = devm_led_classdev_register(&client->dev, &led->cdev); 569 if (err < 0) 570 return err; 571 } 572 573 return 0; 574 } 575 576 /* 577 * i2c-core (and modalias) requires that id_table be properly filled, 578 * even though it is not used for DeviceTree based instantiation. 579 */ 580 static const struct i2c_device_id is31fl319x_id[] = { 581 { "is31fl3190" }, 582 { "is31fl3191" }, 583 { "is31fl3193" }, 584 { "is31fl3196" }, 585 { "is31fl3199" }, 586 { "sn3190" }, 587 { "sn3191" }, 588 { "sn3193" }, 589 { "sn3196" }, 590 { "sn3199" }, 591 {}, 592 }; 593 MODULE_DEVICE_TABLE(i2c, is31fl319x_id); 594 595 static struct i2c_driver is31fl319x_driver = { 596 .driver = { 597 .name = "leds-is31fl319x", 598 .of_match_table = of_is31fl319x_match, 599 }, 600 .probe_new = is31fl319x_probe, 601 .id_table = is31fl319x_id, 602 }; 603 604 module_i2c_driver(is31fl319x_driver); 605 606 MODULE_AUTHOR("H. Nikolaus Schaller <hns@goldelico.com>"); 607 MODULE_AUTHOR("Andrey Utkin <andrey_utkin@fastmail.com>"); 608 MODULE_DESCRIPTION("IS31FL319X LED driver"); 609 MODULE_LICENSE("GPL v2"); 610