1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Texas Instruments' K3 Interrupt Aggregator irqchip driver
4  *
5  * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
6  *	Lokesh Vutla <lokeshvutla@ti.com>
7  */
8 
9 #include <linux/err.h>
10 #include <linux/io.h>
11 #include <linux/irq.h>
12 #include <linux/irqchip.h>
13 #include <linux/irqdomain.h>
14 #include <linux/interrupt.h>
15 #include <linux/msi.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/of_address.h>
19 #include <linux/of_irq.h>
20 #include <linux/of_platform.h>
21 #include <linux/irqchip/chained_irq.h>
22 #include <linux/soc/ti/ti_sci_inta_msi.h>
23 #include <linux/soc/ti/ti_sci_protocol.h>
24 #include <asm-generic/msi.h>
25 
26 #define TI_SCI_DEV_ID_MASK	0xffff
27 #define TI_SCI_DEV_ID_SHIFT	16
28 #define TI_SCI_IRQ_ID_MASK	0xffff
29 #define TI_SCI_IRQ_ID_SHIFT	0
30 #define HWIRQ_TO_DEVID(hwirq)	(((hwirq) >> (TI_SCI_DEV_ID_SHIFT)) & \
31 				 (TI_SCI_DEV_ID_MASK))
32 #define HWIRQ_TO_IRQID(hwirq)	((hwirq) & (TI_SCI_IRQ_ID_MASK))
33 #define TO_HWIRQ(dev, index)	((((dev) & TI_SCI_DEV_ID_MASK) << \
34 				 TI_SCI_DEV_ID_SHIFT) | \
35 				((index) & TI_SCI_IRQ_ID_MASK))
36 
37 #define MAX_EVENTS_PER_VINT	64
38 #define VINT_ENABLE_SET_OFFSET	0x0
39 #define VINT_ENABLE_CLR_OFFSET	0x8
40 #define VINT_STATUS_OFFSET	0x18
41 #define VINT_STATUS_MASKED_OFFSET	0x20
42 
43 /**
44  * struct ti_sci_inta_event_desc - Description of an event coming to
45  *				   Interrupt Aggregator. This serves
46  *				   as a mapping table for global event,
47  *				   hwirq and vint bit.
48  * @global_event:	Global event number corresponding to this event
49  * @hwirq:		Hwirq of the incoming interrupt
50  * @vint_bit:		Corresponding vint bit to which this event is attached.
51  */
52 struct ti_sci_inta_event_desc {
53 	u16 global_event;
54 	u32 hwirq;
55 	u8 vint_bit;
56 };
57 
58 /**
59  * struct ti_sci_inta_vint_desc - Description of a virtual interrupt coming out
60  *				  of Interrupt Aggregator.
61  * @domain:		Pointer to IRQ domain to which this vint belongs.
62  * @list:		List entry for the vint list
63  * @event_map:		Bitmap to manage the allocation of events to vint.
64  * @events:		Array of event descriptors assigned to this vint.
65  * @parent_virq:	Linux IRQ number that gets attached to parent
66  * @vint_id:		TISCI vint ID
67  */
68 struct ti_sci_inta_vint_desc {
69 	struct irq_domain *domain;
70 	struct list_head list;
71 	DECLARE_BITMAP(event_map, MAX_EVENTS_PER_VINT);
72 	struct ti_sci_inta_event_desc events[MAX_EVENTS_PER_VINT];
73 	unsigned int parent_virq;
74 	u16 vint_id;
75 };
76 
77 /**
78  * struct ti_sci_inta_irq_domain - Structure representing a TISCI based
79  *				   Interrupt Aggregator IRQ domain.
80  * @sci:		Pointer to TISCI handle
81  * @vint:		TISCI resource pointer representing IA interrupts.
82  * @global_event:	TISCI resource pointer representing global events.
83  * @vint_list:		List of the vints active in the system
84  * @vint_mutex:		Mutex to protect vint_list
85  * @base:		Base address of the memory mapped IO registers
86  * @pdev:		Pointer to platform device.
87  * @ti_sci_id:		TI-SCI device identifier
88  * @unmapped_cnt:	Number of @unmapped_dev_ids entries
89  * @unmapped_dev_ids:	Pointer to an array of TI-SCI device identifiers of
90  *			unmapped event sources.
91  *			Unmapped Events are not part of the Global Event Map and
92  *			they are converted to Global event within INTA to be
93  *			received by the same INTA to generate an interrupt.
94  *			In case an interrupt request comes for a device which is
95  *			generating Unmapped Event, we must use the INTA's TI-SCI
96  *			device identifier in place of the source device
97  *			identifier to let sysfw know where it has to program the
98  *			Global Event number.
99  */
100 struct ti_sci_inta_irq_domain {
101 	const struct ti_sci_handle *sci;
102 	struct ti_sci_resource *vint;
103 	struct ti_sci_resource *global_event;
104 	struct list_head vint_list;
105 	/* Mutex to protect vint list */
106 	struct mutex vint_mutex;
107 	void __iomem *base;
108 	struct platform_device *pdev;
109 	u32 ti_sci_id;
110 
111 	int unmapped_cnt;
112 	u16 *unmapped_dev_ids;
113 };
114 
115 #define to_vint_desc(e, i) container_of(e, struct ti_sci_inta_vint_desc, \
116 					events[i])
117 
118 static u16 ti_sci_inta_get_dev_id(struct ti_sci_inta_irq_domain *inta, u32 hwirq)
119 {
120 	u16 dev_id = HWIRQ_TO_DEVID(hwirq);
121 	int i;
122 
123 	if (inta->unmapped_cnt == 0)
124 		return dev_id;
125 
126 	/*
127 	 * For devices sending Unmapped Events we must use the INTA's TI-SCI
128 	 * device identifier number to be able to convert it to a Global Event
129 	 * and map it to an interrupt.
130 	 */
131 	for (i = 0; i < inta->unmapped_cnt; i++) {
132 		if (dev_id == inta->unmapped_dev_ids[i]) {
133 			dev_id = inta->ti_sci_id;
134 			break;
135 		}
136 	}
137 
138 	return dev_id;
139 }
140 
141 /**
142  * ti_sci_inta_irq_handler() - Chained IRQ handler for the vint irqs
143  * @desc:	Pointer to irq_desc corresponding to the irq
144  */
145 static void ti_sci_inta_irq_handler(struct irq_desc *desc)
146 {
147 	struct ti_sci_inta_vint_desc *vint_desc;
148 	struct ti_sci_inta_irq_domain *inta;
149 	struct irq_domain *domain;
150 	unsigned int bit;
151 	unsigned long val;
152 
153 	vint_desc = irq_desc_get_handler_data(desc);
154 	domain = vint_desc->domain;
155 	inta = domain->host_data;
156 
157 	chained_irq_enter(irq_desc_get_chip(desc), desc);
158 
159 	val = readq_relaxed(inta->base + vint_desc->vint_id * 0x1000 +
160 			    VINT_STATUS_MASKED_OFFSET);
161 
162 	for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT)
163 		generic_handle_domain_irq(domain, vint_desc->events[bit].hwirq);
164 
165 	chained_irq_exit(irq_desc_get_chip(desc), desc);
166 }
167 
168 /**
169  * ti_sci_inta_xlate_irq() - Translate hwirq to parent's hwirq.
170  * @inta:	IRQ domain corresponding to Interrupt Aggregator
171  * @vint_id:	Hardware irq corresponding to the above irq domain
172  *
173  * Return parent irq number if translation is available else -ENOENT.
174  */
175 static int ti_sci_inta_xlate_irq(struct ti_sci_inta_irq_domain *inta,
176 				 u16 vint_id)
177 {
178 	struct device_node *np = dev_of_node(&inta->pdev->dev);
179 	u32 base, parent_base, size;
180 	const __be32 *range;
181 	int len;
182 
183 	range = of_get_property(np, "ti,interrupt-ranges", &len);
184 	if (!range)
185 		return vint_id;
186 
187 	for (len /= sizeof(*range); len >= 3; len -= 3) {
188 		base = be32_to_cpu(*range++);
189 		parent_base = be32_to_cpu(*range++);
190 		size = be32_to_cpu(*range++);
191 
192 		if (base <= vint_id && vint_id < base + size)
193 			return vint_id - base + parent_base;
194 	}
195 
196 	return -ENOENT;
197 }
198 
199 /**
200  * ti_sci_inta_alloc_parent_irq() - Allocate parent irq to Interrupt aggregator
201  * @domain:	IRQ domain corresponding to Interrupt Aggregator
202  *
203  * Return 0 if all went well else corresponding error value.
204  */
205 static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_domain *domain)
206 {
207 	struct ti_sci_inta_irq_domain *inta = domain->host_data;
208 	struct ti_sci_inta_vint_desc *vint_desc;
209 	struct irq_fwspec parent_fwspec;
210 	struct device_node *parent_node;
211 	unsigned int parent_virq;
212 	int p_hwirq, ret;
213 	u16 vint_id;
214 
215 	vint_id = ti_sci_get_free_resource(inta->vint);
216 	if (vint_id == TI_SCI_RESOURCE_NULL)
217 		return ERR_PTR(-EINVAL);
218 
219 	p_hwirq = ti_sci_inta_xlate_irq(inta, vint_id);
220 	if (p_hwirq < 0) {
221 		ret = p_hwirq;
222 		goto free_vint;
223 	}
224 
225 	vint_desc = kzalloc(sizeof(*vint_desc), GFP_KERNEL);
226 	if (!vint_desc) {
227 		ret = -ENOMEM;
228 		goto free_vint;
229 	}
230 
231 	vint_desc->domain = domain;
232 	vint_desc->vint_id = vint_id;
233 	INIT_LIST_HEAD(&vint_desc->list);
234 
235 	parent_node = of_irq_find_parent(dev_of_node(&inta->pdev->dev));
236 	parent_fwspec.fwnode = of_node_to_fwnode(parent_node);
237 
238 	if (of_device_is_compatible(parent_node, "arm,gic-v3")) {
239 		/* Parent is GIC */
240 		parent_fwspec.param_count = 3;
241 		parent_fwspec.param[0] = 0;
242 		parent_fwspec.param[1] = p_hwirq - 32;
243 		parent_fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH;
244 	} else {
245 		/* Parent is Interrupt Router */
246 		parent_fwspec.param_count = 1;
247 		parent_fwspec.param[0] = p_hwirq;
248 	}
249 
250 	parent_virq = irq_create_fwspec_mapping(&parent_fwspec);
251 	if (parent_virq == 0) {
252 		dev_err(&inta->pdev->dev, "Parent IRQ allocation failed\n");
253 		ret = -EINVAL;
254 		goto free_vint_desc;
255 
256 	}
257 	vint_desc->parent_virq = parent_virq;
258 
259 	list_add_tail(&vint_desc->list, &inta->vint_list);
260 	irq_set_chained_handler_and_data(vint_desc->parent_virq,
261 					 ti_sci_inta_irq_handler, vint_desc);
262 
263 	return vint_desc;
264 free_vint_desc:
265 	kfree(vint_desc);
266 free_vint:
267 	ti_sci_release_resource(inta->vint, vint_id);
268 	return ERR_PTR(ret);
269 }
270 
271 /**
272  * ti_sci_inta_alloc_event() - Attach an event to a IA vint.
273  * @vint_desc:	Pointer to vint_desc to which the event gets attached
274  * @free_bit:	Bit inside vint to which event gets attached
275  * @hwirq:	hwirq of the input event
276  *
277  * Return event_desc pointer if all went ok else appropriate error value.
278  */
279 static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_event(struct ti_sci_inta_vint_desc *vint_desc,
280 							      u16 free_bit,
281 							      u32 hwirq)
282 {
283 	struct ti_sci_inta_irq_domain *inta = vint_desc->domain->host_data;
284 	struct ti_sci_inta_event_desc *event_desc;
285 	u16 dev_id, dev_index;
286 	int err;
287 
288 	dev_id = ti_sci_inta_get_dev_id(inta, hwirq);
289 	dev_index = HWIRQ_TO_IRQID(hwirq);
290 
291 	event_desc = &vint_desc->events[free_bit];
292 	event_desc->hwirq = hwirq;
293 	event_desc->vint_bit = free_bit;
294 	event_desc->global_event = ti_sci_get_free_resource(inta->global_event);
295 	if (event_desc->global_event == TI_SCI_RESOURCE_NULL)
296 		return ERR_PTR(-EINVAL);
297 
298 	err = inta->sci->ops.rm_irq_ops.set_event_map(inta->sci,
299 						      dev_id, dev_index,
300 						      inta->ti_sci_id,
301 						      vint_desc->vint_id,
302 						      event_desc->global_event,
303 						      free_bit);
304 	if (err)
305 		goto free_global_event;
306 
307 	return event_desc;
308 free_global_event:
309 	ti_sci_release_resource(inta->global_event, event_desc->global_event);
310 	return ERR_PTR(err);
311 }
312 
313 /**
314  * ti_sci_inta_alloc_irq() -  Allocate an irq within INTA domain
315  * @domain:	irq_domain pointer corresponding to INTA
316  * @hwirq:	hwirq of the input event
317  *
318  * Note: Allocation happens in the following manner:
319  *	- Find a free bit available in any of the vints available in the list.
320  *	- If not found, allocate a vint from the vint pool
321  *	- Attach the free bit to input hwirq.
322  * Return event_desc if all went ok else appropriate error value.
323  */
324 static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_irq(struct irq_domain *domain,
325 							    u32 hwirq)
326 {
327 	struct ti_sci_inta_irq_domain *inta = domain->host_data;
328 	struct ti_sci_inta_vint_desc *vint_desc = NULL;
329 	struct ti_sci_inta_event_desc *event_desc;
330 	u16 free_bit;
331 
332 	mutex_lock(&inta->vint_mutex);
333 	list_for_each_entry(vint_desc, &inta->vint_list, list) {
334 		free_bit = find_first_zero_bit(vint_desc->event_map,
335 					       MAX_EVENTS_PER_VINT);
336 		if (free_bit != MAX_EVENTS_PER_VINT) {
337 			set_bit(free_bit, vint_desc->event_map);
338 			goto alloc_event;
339 		}
340 	}
341 
342 	/* No free bits available. Allocate a new vint */
343 	vint_desc = ti_sci_inta_alloc_parent_irq(domain);
344 	if (IS_ERR(vint_desc)) {
345 		event_desc = ERR_CAST(vint_desc);
346 		goto unlock;
347 	}
348 
349 	free_bit = find_first_zero_bit(vint_desc->event_map,
350 				       MAX_EVENTS_PER_VINT);
351 	set_bit(free_bit, vint_desc->event_map);
352 
353 alloc_event:
354 	event_desc = ti_sci_inta_alloc_event(vint_desc, free_bit, hwirq);
355 	if (IS_ERR(event_desc))
356 		clear_bit(free_bit, vint_desc->event_map);
357 
358 unlock:
359 	mutex_unlock(&inta->vint_mutex);
360 	return event_desc;
361 }
362 
363 /**
364  * ti_sci_inta_free_parent_irq() - Free a parent irq to INTA
365  * @inta:	Pointer to inta domain.
366  * @vint_desc:	Pointer to vint_desc that needs to be freed.
367  */
368 static void ti_sci_inta_free_parent_irq(struct ti_sci_inta_irq_domain *inta,
369 					struct ti_sci_inta_vint_desc *vint_desc)
370 {
371 	if (find_first_bit(vint_desc->event_map, MAX_EVENTS_PER_VINT) == MAX_EVENTS_PER_VINT) {
372 		list_del(&vint_desc->list);
373 		ti_sci_release_resource(inta->vint, vint_desc->vint_id);
374 		irq_dispose_mapping(vint_desc->parent_virq);
375 		kfree(vint_desc);
376 	}
377 }
378 
379 /**
380  * ti_sci_inta_free_irq() - Free an IRQ within INTA domain
381  * @event_desc:	Pointer to event_desc that needs to be freed.
382  * @hwirq:	Hwirq number within INTA domain that needs to be freed
383  */
384 static void ti_sci_inta_free_irq(struct ti_sci_inta_event_desc *event_desc,
385 				 u32 hwirq)
386 {
387 	struct ti_sci_inta_vint_desc *vint_desc;
388 	struct ti_sci_inta_irq_domain *inta;
389 	u16 dev_id;
390 
391 	vint_desc = to_vint_desc(event_desc, event_desc->vint_bit);
392 	inta = vint_desc->domain->host_data;
393 	dev_id = ti_sci_inta_get_dev_id(inta, hwirq);
394 	/* free event irq */
395 	mutex_lock(&inta->vint_mutex);
396 	inta->sci->ops.rm_irq_ops.free_event_map(inta->sci,
397 						 dev_id, HWIRQ_TO_IRQID(hwirq),
398 						 inta->ti_sci_id,
399 						 vint_desc->vint_id,
400 						 event_desc->global_event,
401 						 event_desc->vint_bit);
402 
403 	clear_bit(event_desc->vint_bit, vint_desc->event_map);
404 	ti_sci_release_resource(inta->global_event, event_desc->global_event);
405 	event_desc->global_event = TI_SCI_RESOURCE_NULL;
406 	event_desc->hwirq = 0;
407 
408 	ti_sci_inta_free_parent_irq(inta, vint_desc);
409 	mutex_unlock(&inta->vint_mutex);
410 }
411 
412 /**
413  * ti_sci_inta_request_resources() - Allocate resources for input irq
414  * @data: Pointer to corresponding irq_data
415  *
416  * Note: This is the core api where the actual allocation happens for input
417  *	 hwirq. This allocation involves creating a parent irq for vint.
418  *	 If this is done in irq_domain_ops.alloc() then a deadlock is reached
419  *	 for allocation. So this allocation is being done in request_resources()
420  *
421  * Return: 0 if all went well else corresponding error.
422  */
423 static int ti_sci_inta_request_resources(struct irq_data *data)
424 {
425 	struct ti_sci_inta_event_desc *event_desc;
426 
427 	event_desc = ti_sci_inta_alloc_irq(data->domain, data->hwirq);
428 	if (IS_ERR(event_desc))
429 		return PTR_ERR(event_desc);
430 
431 	data->chip_data = event_desc;
432 
433 	return 0;
434 }
435 
436 /**
437  * ti_sci_inta_release_resources - Release resources for input irq
438  * @data: Pointer to corresponding irq_data
439  *
440  * Note: Corresponding to request_resources(), all the unmapping and deletion
441  *	 of parent vint irqs happens in this api.
442  */
443 static void ti_sci_inta_release_resources(struct irq_data *data)
444 {
445 	struct ti_sci_inta_event_desc *event_desc;
446 
447 	event_desc = irq_data_get_irq_chip_data(data);
448 	ti_sci_inta_free_irq(event_desc, data->hwirq);
449 }
450 
451 /**
452  * ti_sci_inta_manage_event() - Control the event based on the offset
453  * @data:	Pointer to corresponding irq_data
454  * @offset:	register offset using which event is controlled.
455  */
456 static void ti_sci_inta_manage_event(struct irq_data *data, u32 offset)
457 {
458 	struct ti_sci_inta_event_desc *event_desc;
459 	struct ti_sci_inta_vint_desc *vint_desc;
460 	struct ti_sci_inta_irq_domain *inta;
461 
462 	event_desc = irq_data_get_irq_chip_data(data);
463 	vint_desc = to_vint_desc(event_desc, event_desc->vint_bit);
464 	inta = data->domain->host_data;
465 
466 	writeq_relaxed(BIT(event_desc->vint_bit),
467 		       inta->base + vint_desc->vint_id * 0x1000 + offset);
468 }
469 
470 /**
471  * ti_sci_inta_mask_irq() - Mask an event
472  * @data:	Pointer to corresponding irq_data
473  */
474 static void ti_sci_inta_mask_irq(struct irq_data *data)
475 {
476 	ti_sci_inta_manage_event(data, VINT_ENABLE_CLR_OFFSET);
477 }
478 
479 /**
480  * ti_sci_inta_unmask_irq() - Unmask an event
481  * @data:	Pointer to corresponding irq_data
482  */
483 static void ti_sci_inta_unmask_irq(struct irq_data *data)
484 {
485 	ti_sci_inta_manage_event(data, VINT_ENABLE_SET_OFFSET);
486 }
487 
488 /**
489  * ti_sci_inta_ack_irq() - Ack an event
490  * @data:	Pointer to corresponding irq_data
491  */
492 static void ti_sci_inta_ack_irq(struct irq_data *data)
493 {
494 	/*
495 	 * Do not clear the event if hardware is capable of sending
496 	 * a down event.
497 	 */
498 	if (irqd_get_trigger_type(data) != IRQF_TRIGGER_HIGH)
499 		ti_sci_inta_manage_event(data, VINT_STATUS_OFFSET);
500 }
501 
502 static int ti_sci_inta_set_affinity(struct irq_data *d,
503 				    const struct cpumask *mask_val, bool force)
504 {
505 	return -EINVAL;
506 }
507 
508 /**
509  * ti_sci_inta_set_type() - Update the trigger type of the irq.
510  * @data:	Pointer to corresponding irq_data
511  * @type:	Trigger type as specified by user
512  *
513  * Note: This updates the handle_irq callback for level msi.
514  *
515  * Return 0 if all went well else appropriate error.
516  */
517 static int ti_sci_inta_set_type(struct irq_data *data, unsigned int type)
518 {
519 	/*
520 	 * .alloc default sets handle_edge_irq. But if the user specifies
521 	 * that IRQ is level MSI, then update the handle to handle_level_irq
522 	 */
523 	switch (type & IRQ_TYPE_SENSE_MASK) {
524 	case IRQF_TRIGGER_HIGH:
525 		irq_set_handler_locked(data, handle_level_irq);
526 		return 0;
527 	case IRQF_TRIGGER_RISING:
528 		return 0;
529 	default:
530 		return -EINVAL;
531 	}
532 }
533 
534 static struct irq_chip ti_sci_inta_irq_chip = {
535 	.name			= "INTA",
536 	.irq_ack		= ti_sci_inta_ack_irq,
537 	.irq_mask		= ti_sci_inta_mask_irq,
538 	.irq_set_type		= ti_sci_inta_set_type,
539 	.irq_unmask		= ti_sci_inta_unmask_irq,
540 	.irq_set_affinity	= ti_sci_inta_set_affinity,
541 	.irq_request_resources	= ti_sci_inta_request_resources,
542 	.irq_release_resources	= ti_sci_inta_release_resources,
543 };
544 
545 /**
546  * ti_sci_inta_irq_domain_free() - Free an IRQ from the IRQ domain
547  * @domain:	Domain to which the irqs belong
548  * @virq:	base linux virtual IRQ to be freed.
549  * @nr_irqs:	Number of continuous irqs to be freed
550  */
551 static void ti_sci_inta_irq_domain_free(struct irq_domain *domain,
552 					unsigned int virq, unsigned int nr_irqs)
553 {
554 	struct irq_data *data = irq_domain_get_irq_data(domain, virq);
555 
556 	irq_domain_reset_irq_data(data);
557 }
558 
559 /**
560  * ti_sci_inta_irq_domain_alloc() - Allocate Interrupt aggregator IRQs
561  * @domain:	Point to the interrupt aggregator IRQ domain
562  * @virq:	Corresponding Linux virtual IRQ number
563  * @nr_irqs:	Continuous irqs to be allocated
564  * @data:	Pointer to firmware specifier
565  *
566  * No actual allocation happens here.
567  *
568  * Return 0 if all went well else appropriate error value.
569  */
570 static int ti_sci_inta_irq_domain_alloc(struct irq_domain *domain,
571 					unsigned int virq, unsigned int nr_irqs,
572 					void *data)
573 {
574 	msi_alloc_info_t *arg = data;
575 
576 	irq_domain_set_info(domain, virq, arg->hwirq, &ti_sci_inta_irq_chip,
577 			    NULL, handle_edge_irq, NULL, NULL);
578 
579 	return 0;
580 }
581 
582 static const struct irq_domain_ops ti_sci_inta_irq_domain_ops = {
583 	.free		= ti_sci_inta_irq_domain_free,
584 	.alloc		= ti_sci_inta_irq_domain_alloc,
585 };
586 
587 static struct irq_chip ti_sci_inta_msi_irq_chip = {
588 	.name			= "MSI-INTA",
589 	.flags			= IRQCHIP_SUPPORTS_LEVEL_MSI,
590 };
591 
592 static void ti_sci_inta_msi_set_desc(msi_alloc_info_t *arg,
593 				     struct msi_desc *desc)
594 {
595 	struct platform_device *pdev = to_platform_device(desc->dev);
596 
597 	arg->desc = desc;
598 	arg->hwirq = TO_HWIRQ(pdev->id, desc->msi_index);
599 }
600 
601 static struct msi_domain_ops ti_sci_inta_msi_ops = {
602 	.set_desc	= ti_sci_inta_msi_set_desc,
603 };
604 
605 static struct msi_domain_info ti_sci_inta_msi_domain_info = {
606 	.flags	= (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
607 		   MSI_FLAG_LEVEL_CAPABLE),
608 	.ops	= &ti_sci_inta_msi_ops,
609 	.chip	= &ti_sci_inta_msi_irq_chip,
610 };
611 
612 static int ti_sci_inta_get_unmapped_sources(struct ti_sci_inta_irq_domain *inta)
613 {
614 	struct device *dev = &inta->pdev->dev;
615 	struct device_node *node = dev_of_node(dev);
616 	struct of_phandle_iterator it;
617 	int count, err, ret, i;
618 
619 	count = of_count_phandle_with_args(node, "ti,unmapped-event-sources", NULL);
620 	if (count <= 0)
621 		return 0;
622 
623 	inta->unmapped_dev_ids = devm_kcalloc(dev, count,
624 					      sizeof(*inta->unmapped_dev_ids),
625 					      GFP_KERNEL);
626 	if (!inta->unmapped_dev_ids)
627 		return -ENOMEM;
628 
629 	i = 0;
630 	of_for_each_phandle(&it, err, node, "ti,unmapped-event-sources", NULL, 0) {
631 		u32 dev_id;
632 
633 		ret = of_property_read_u32(it.node, "ti,sci-dev-id", &dev_id);
634 		if (ret) {
635 			dev_err(dev, "ti,sci-dev-id read failure for %pOFf\n", it.node);
636 			of_node_put(it.node);
637 			return ret;
638 		}
639 		inta->unmapped_dev_ids[i++] = dev_id;
640 	}
641 
642 	inta->unmapped_cnt = count;
643 
644 	return 0;
645 }
646 
647 static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev)
648 {
649 	struct irq_domain *parent_domain, *domain, *msi_domain;
650 	struct device_node *parent_node, *node;
651 	struct ti_sci_inta_irq_domain *inta;
652 	struct device *dev = &pdev->dev;
653 	int ret;
654 
655 	node = dev_of_node(dev);
656 	parent_node = of_irq_find_parent(node);
657 	if (!parent_node) {
658 		dev_err(dev, "Failed to get IRQ parent node\n");
659 		return -ENODEV;
660 	}
661 
662 	parent_domain = irq_find_host(parent_node);
663 	if (!parent_domain)
664 		return -EPROBE_DEFER;
665 
666 	inta = devm_kzalloc(dev, sizeof(*inta), GFP_KERNEL);
667 	if (!inta)
668 		return -ENOMEM;
669 
670 	inta->pdev = pdev;
671 	inta->sci = devm_ti_sci_get_by_phandle(dev, "ti,sci");
672 	if (IS_ERR(inta->sci))
673 		return dev_err_probe(dev, PTR_ERR(inta->sci),
674 				     "ti,sci read fail\n");
675 
676 	ret = of_property_read_u32(dev->of_node, "ti,sci-dev-id", &inta->ti_sci_id);
677 	if (ret) {
678 		dev_err(dev, "missing 'ti,sci-dev-id' property\n");
679 		return -EINVAL;
680 	}
681 
682 	inta->vint = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
683 					      TI_SCI_RESASG_SUBTYPE_IA_VINT);
684 	if (IS_ERR(inta->vint)) {
685 		dev_err(dev, "VINT resource allocation failed\n");
686 		return PTR_ERR(inta->vint);
687 	}
688 
689 	inta->global_event = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
690 						      TI_SCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT);
691 	if (IS_ERR(inta->global_event)) {
692 		dev_err(dev, "Global event resource allocation failed\n");
693 		return PTR_ERR(inta->global_event);
694 	}
695 
696 	inta->base = devm_platform_ioremap_resource(pdev, 0);
697 	if (IS_ERR(inta->base))
698 		return PTR_ERR(inta->base);
699 
700 	ret = ti_sci_inta_get_unmapped_sources(inta);
701 	if (ret)
702 		return ret;
703 
704 	domain = irq_domain_add_linear(dev_of_node(dev),
705 				       ti_sci_get_num_resources(inta->vint),
706 				       &ti_sci_inta_irq_domain_ops, inta);
707 	if (!domain) {
708 		dev_err(dev, "Failed to allocate IRQ domain\n");
709 		return -ENOMEM;
710 	}
711 
712 	msi_domain = ti_sci_inta_msi_create_irq_domain(of_node_to_fwnode(node),
713 						&ti_sci_inta_msi_domain_info,
714 						domain);
715 	if (!msi_domain) {
716 		irq_domain_remove(domain);
717 		dev_err(dev, "Failed to allocate msi domain\n");
718 		return -ENOMEM;
719 	}
720 
721 	INIT_LIST_HEAD(&inta->vint_list);
722 	mutex_init(&inta->vint_mutex);
723 
724 	dev_info(dev, "Interrupt Aggregator domain %d created\n", inta->ti_sci_id);
725 
726 	return 0;
727 }
728 
729 static const struct of_device_id ti_sci_inta_irq_domain_of_match[] = {
730 	{ .compatible = "ti,sci-inta", },
731 	{ /* sentinel */ },
732 };
733 MODULE_DEVICE_TABLE(of, ti_sci_inta_irq_domain_of_match);
734 
735 static struct platform_driver ti_sci_inta_irq_domain_driver = {
736 	.probe = ti_sci_inta_irq_domain_probe,
737 	.driver = {
738 		.name = "ti-sci-inta",
739 		.of_match_table = ti_sci_inta_irq_domain_of_match,
740 	},
741 };
742 module_platform_driver(ti_sci_inta_irq_domain_driver);
743 
744 MODULE_AUTHOR("Lokesh Vutla <lokeshvutla@ti.com>");
745 MODULE_DESCRIPTION("K3 Interrupt Aggregator driver over TI SCI protocol");
746 MODULE_LICENSE("GPL v2");
747