1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
222b67acdSDmitry Eremin-Solenikov /*
322b67acdSDmitry Eremin-Solenikov * Copyright (C) 2015 Dmitry Eremin-Solenikov
422b67acdSDmitry Eremin-Solenikov * Copyright (C) 1999-2001 Nicolas Pitre
522b67acdSDmitry Eremin-Solenikov *
622b67acdSDmitry Eremin-Solenikov * Generic IRQ handling for the SA11x0.
722b67acdSDmitry Eremin-Solenikov */
822b67acdSDmitry Eremin-Solenikov #include <linux/init.h>
922b67acdSDmitry Eremin-Solenikov #include <linux/module.h>
1022b67acdSDmitry Eremin-Solenikov #include <linux/interrupt.h>
1122b67acdSDmitry Eremin-Solenikov #include <linux/io.h>
1222b67acdSDmitry Eremin-Solenikov #include <linux/irq.h>
1322b67acdSDmitry Eremin-Solenikov #include <linux/irqdomain.h>
1422b67acdSDmitry Eremin-Solenikov #include <linux/syscore_ops.h>
1522b67acdSDmitry Eremin-Solenikov #include <linux/irqchip/irq-sa11x0.h>
1622b67acdSDmitry Eremin-Solenikov
1722b67acdSDmitry Eremin-Solenikov #include <soc/sa1100/pwer.h>
1822b67acdSDmitry Eremin-Solenikov
1922b67acdSDmitry Eremin-Solenikov #include <asm/exception.h>
2022b67acdSDmitry Eremin-Solenikov
2122b67acdSDmitry Eremin-Solenikov #define ICIP 0x00 /* IC IRQ Pending reg. */
2222b67acdSDmitry Eremin-Solenikov #define ICMR 0x04 /* IC Mask Reg. */
2322b67acdSDmitry Eremin-Solenikov #define ICLR 0x08 /* IC Level Reg. */
2422b67acdSDmitry Eremin-Solenikov #define ICCR 0x0C /* IC Control Reg. */
2522b67acdSDmitry Eremin-Solenikov #define ICFP 0x10 /* IC FIQ Pending reg. */
2622b67acdSDmitry Eremin-Solenikov #define ICPR 0x20 /* IC Pending Reg. */
2722b67acdSDmitry Eremin-Solenikov
2822b67acdSDmitry Eremin-Solenikov static void __iomem *iobase;
2922b67acdSDmitry Eremin-Solenikov
3022b67acdSDmitry Eremin-Solenikov /*
3122b67acdSDmitry Eremin-Solenikov * We don't need to ACK IRQs on the SA1100 unless they're GPIOs
3222b67acdSDmitry Eremin-Solenikov * this is for internal IRQs i.e. from IRQ LCD to RTCAlrm.
3322b67acdSDmitry Eremin-Solenikov */
sa1100_mask_irq(struct irq_data * d)3422b67acdSDmitry Eremin-Solenikov static void sa1100_mask_irq(struct irq_data *d)
3522b67acdSDmitry Eremin-Solenikov {
3622b67acdSDmitry Eremin-Solenikov u32 reg;
3722b67acdSDmitry Eremin-Solenikov
3822b67acdSDmitry Eremin-Solenikov reg = readl_relaxed(iobase + ICMR);
3922b67acdSDmitry Eremin-Solenikov reg &= ~BIT(d->hwirq);
4022b67acdSDmitry Eremin-Solenikov writel_relaxed(reg, iobase + ICMR);
4122b67acdSDmitry Eremin-Solenikov }
4222b67acdSDmitry Eremin-Solenikov
sa1100_unmask_irq(struct irq_data * d)4322b67acdSDmitry Eremin-Solenikov static void sa1100_unmask_irq(struct irq_data *d)
4422b67acdSDmitry Eremin-Solenikov {
4522b67acdSDmitry Eremin-Solenikov u32 reg;
4622b67acdSDmitry Eremin-Solenikov
4722b67acdSDmitry Eremin-Solenikov reg = readl_relaxed(iobase + ICMR);
4822b67acdSDmitry Eremin-Solenikov reg |= BIT(d->hwirq);
4922b67acdSDmitry Eremin-Solenikov writel_relaxed(reg, iobase + ICMR);
5022b67acdSDmitry Eremin-Solenikov }
5122b67acdSDmitry Eremin-Solenikov
sa1100_set_wake(struct irq_data * d,unsigned int on)5222b67acdSDmitry Eremin-Solenikov static int sa1100_set_wake(struct irq_data *d, unsigned int on)
5322b67acdSDmitry Eremin-Solenikov {
5422b67acdSDmitry Eremin-Solenikov return sa11x0_sc_set_wake(d->hwirq, on);
5522b67acdSDmitry Eremin-Solenikov }
5622b67acdSDmitry Eremin-Solenikov
5722b67acdSDmitry Eremin-Solenikov static struct irq_chip sa1100_normal_chip = {
5822b67acdSDmitry Eremin-Solenikov .name = "SC",
5922b67acdSDmitry Eremin-Solenikov .irq_ack = sa1100_mask_irq,
6022b67acdSDmitry Eremin-Solenikov .irq_mask = sa1100_mask_irq,
6122b67acdSDmitry Eremin-Solenikov .irq_unmask = sa1100_unmask_irq,
6222b67acdSDmitry Eremin-Solenikov .irq_set_wake = sa1100_set_wake,
6322b67acdSDmitry Eremin-Solenikov };
6422b67acdSDmitry Eremin-Solenikov
sa1100_normal_irqdomain_map(struct irq_domain * d,unsigned int irq,irq_hw_number_t hwirq)6522b67acdSDmitry Eremin-Solenikov static int sa1100_normal_irqdomain_map(struct irq_domain *d,
6622b67acdSDmitry Eremin-Solenikov unsigned int irq, irq_hw_number_t hwirq)
6722b67acdSDmitry Eremin-Solenikov {
6822b67acdSDmitry Eremin-Solenikov irq_set_chip_and_handler(irq, &sa1100_normal_chip,
6922b67acdSDmitry Eremin-Solenikov handle_level_irq);
7022b67acdSDmitry Eremin-Solenikov
7122b67acdSDmitry Eremin-Solenikov return 0;
7222b67acdSDmitry Eremin-Solenikov }
7322b67acdSDmitry Eremin-Solenikov
74c62af70fSRussell King static const struct irq_domain_ops sa1100_normal_irqdomain_ops = {
7522b67acdSDmitry Eremin-Solenikov .map = sa1100_normal_irqdomain_map,
7622b67acdSDmitry Eremin-Solenikov .xlate = irq_domain_xlate_onetwocell,
7722b67acdSDmitry Eremin-Solenikov };
7822b67acdSDmitry Eremin-Solenikov
7922b67acdSDmitry Eremin-Solenikov static struct irq_domain *sa1100_normal_irqdomain;
8022b67acdSDmitry Eremin-Solenikov
8122b67acdSDmitry Eremin-Solenikov static struct sa1100irq_state {
8222b67acdSDmitry Eremin-Solenikov unsigned int saved;
8322b67acdSDmitry Eremin-Solenikov unsigned int icmr;
8422b67acdSDmitry Eremin-Solenikov unsigned int iclr;
8522b67acdSDmitry Eremin-Solenikov unsigned int iccr;
8622b67acdSDmitry Eremin-Solenikov } sa1100irq_state;
8722b67acdSDmitry Eremin-Solenikov
sa1100irq_suspend(void)8822b67acdSDmitry Eremin-Solenikov static int sa1100irq_suspend(void)
8922b67acdSDmitry Eremin-Solenikov {
9022b67acdSDmitry Eremin-Solenikov struct sa1100irq_state *st = &sa1100irq_state;
9122b67acdSDmitry Eremin-Solenikov
9222b67acdSDmitry Eremin-Solenikov st->saved = 1;
9322b67acdSDmitry Eremin-Solenikov st->icmr = readl_relaxed(iobase + ICMR);
9422b67acdSDmitry Eremin-Solenikov st->iclr = readl_relaxed(iobase + ICLR);
9522b67acdSDmitry Eremin-Solenikov st->iccr = readl_relaxed(iobase + ICCR);
9622b67acdSDmitry Eremin-Solenikov
9722b67acdSDmitry Eremin-Solenikov /*
9822b67acdSDmitry Eremin-Solenikov * Disable all GPIO-based interrupts.
9922b67acdSDmitry Eremin-Solenikov */
10022b67acdSDmitry Eremin-Solenikov writel_relaxed(st->icmr & 0xfffff000, iobase + ICMR);
10122b67acdSDmitry Eremin-Solenikov
10222b67acdSDmitry Eremin-Solenikov return 0;
10322b67acdSDmitry Eremin-Solenikov }
10422b67acdSDmitry Eremin-Solenikov
sa1100irq_resume(void)10522b67acdSDmitry Eremin-Solenikov static void sa1100irq_resume(void)
10622b67acdSDmitry Eremin-Solenikov {
10722b67acdSDmitry Eremin-Solenikov struct sa1100irq_state *st = &sa1100irq_state;
10822b67acdSDmitry Eremin-Solenikov
10922b67acdSDmitry Eremin-Solenikov if (st->saved) {
11022b67acdSDmitry Eremin-Solenikov writel_relaxed(st->iccr, iobase + ICCR);
11122b67acdSDmitry Eremin-Solenikov writel_relaxed(st->iclr, iobase + ICLR);
11222b67acdSDmitry Eremin-Solenikov
11322b67acdSDmitry Eremin-Solenikov writel_relaxed(st->icmr, iobase + ICMR);
11422b67acdSDmitry Eremin-Solenikov }
11522b67acdSDmitry Eremin-Solenikov }
11622b67acdSDmitry Eremin-Solenikov
11722b67acdSDmitry Eremin-Solenikov static struct syscore_ops sa1100irq_syscore_ops = {
11822b67acdSDmitry Eremin-Solenikov .suspend = sa1100irq_suspend,
11922b67acdSDmitry Eremin-Solenikov .resume = sa1100irq_resume,
12022b67acdSDmitry Eremin-Solenikov };
12122b67acdSDmitry Eremin-Solenikov
sa1100irq_init_devicefs(void)12222b67acdSDmitry Eremin-Solenikov static int __init sa1100irq_init_devicefs(void)
12322b67acdSDmitry Eremin-Solenikov {
12422b67acdSDmitry Eremin-Solenikov register_syscore_ops(&sa1100irq_syscore_ops);
12522b67acdSDmitry Eremin-Solenikov return 0;
12622b67acdSDmitry Eremin-Solenikov }
12722b67acdSDmitry Eremin-Solenikov
12822b67acdSDmitry Eremin-Solenikov device_initcall(sa1100irq_init_devicefs);
12922b67acdSDmitry Eremin-Solenikov
13022b67acdSDmitry Eremin-Solenikov static asmlinkage void __exception_irq_entry
sa1100_handle_irq(struct pt_regs * regs)13122b67acdSDmitry Eremin-Solenikov sa1100_handle_irq(struct pt_regs *regs)
13222b67acdSDmitry Eremin-Solenikov {
13322b67acdSDmitry Eremin-Solenikov uint32_t icip, icmr, mask;
13422b67acdSDmitry Eremin-Solenikov
13522b67acdSDmitry Eremin-Solenikov do {
13622b67acdSDmitry Eremin-Solenikov icip = readl_relaxed(iobase + ICIP);
13722b67acdSDmitry Eremin-Solenikov icmr = readl_relaxed(iobase + ICMR);
13822b67acdSDmitry Eremin-Solenikov mask = icip & icmr;
13922b67acdSDmitry Eremin-Solenikov
14022b67acdSDmitry Eremin-Solenikov if (mask == 0)
14122b67acdSDmitry Eremin-Solenikov break;
14222b67acdSDmitry Eremin-Solenikov
143*0953fb26SMark Rutland generic_handle_domain_irq(sa1100_normal_irqdomain,
144*0953fb26SMark Rutland ffs(mask) - 1);
14522b67acdSDmitry Eremin-Solenikov } while (1);
14622b67acdSDmitry Eremin-Solenikov }
14722b67acdSDmitry Eremin-Solenikov
sa11x0_init_irq_nodt(int irq_start,resource_size_t io_start)14822b67acdSDmitry Eremin-Solenikov void __init sa11x0_init_irq_nodt(int irq_start, resource_size_t io_start)
14922b67acdSDmitry Eremin-Solenikov {
15022b67acdSDmitry Eremin-Solenikov iobase = ioremap(io_start, SZ_64K);
15122b67acdSDmitry Eremin-Solenikov if (WARN_ON(!iobase))
15222b67acdSDmitry Eremin-Solenikov return;
15322b67acdSDmitry Eremin-Solenikov
15422b67acdSDmitry Eremin-Solenikov /* disable all IRQs */
15522b67acdSDmitry Eremin-Solenikov writel_relaxed(0, iobase + ICMR);
15622b67acdSDmitry Eremin-Solenikov
15722b67acdSDmitry Eremin-Solenikov /* all IRQs are IRQ, not FIQ */
15822b67acdSDmitry Eremin-Solenikov writel_relaxed(0, iobase + ICLR);
15922b67acdSDmitry Eremin-Solenikov
16022b67acdSDmitry Eremin-Solenikov /*
16122b67acdSDmitry Eremin-Solenikov * Whatever the doc says, this has to be set for the wait-on-irq
16222b67acdSDmitry Eremin-Solenikov * instruction to work... on a SA1100 rev 9 at least.
16322b67acdSDmitry Eremin-Solenikov */
16422b67acdSDmitry Eremin-Solenikov writel_relaxed(1, iobase + ICCR);
16522b67acdSDmitry Eremin-Solenikov
16622b67acdSDmitry Eremin-Solenikov sa1100_normal_irqdomain = irq_domain_add_simple(NULL,
16722b67acdSDmitry Eremin-Solenikov 32, irq_start,
16822b67acdSDmitry Eremin-Solenikov &sa1100_normal_irqdomain_ops, NULL);
16922b67acdSDmitry Eremin-Solenikov
17022b67acdSDmitry Eremin-Solenikov set_handle_irq(sa1100_handle_irq);
17122b67acdSDmitry Eremin-Solenikov }
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