1 /* 2 * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License along 15 * with this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 17 */ 18 19 #include <linux/kernel.h> 20 #include <linux/init.h> 21 #include <linux/irq.h> 22 #include <linux/irqdomain.h> 23 #include <linux/io.h> 24 #include <linux/of.h> 25 #include <linux/of_address.h> 26 #include <linux/of_irq.h> 27 #include <linux/stmp_device.h> 28 #include <asm/exception.h> 29 30 #include "irqchip.h" 31 32 #define HW_ICOLL_VECTOR 0x0000 33 #define HW_ICOLL_LEVELACK 0x0010 34 #define HW_ICOLL_CTRL 0x0020 35 #define HW_ICOLL_STAT_OFFSET 0x0070 36 #define HW_ICOLL_INTERRUPTn_SET(n) (0x0124 + (n) * 0x10) 37 #define HW_ICOLL_INTERRUPTn_CLR(n) (0x0128 + (n) * 0x10) 38 #define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004 39 #define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 0x1 40 41 #define ICOLL_NUM_IRQS 128 42 43 static void __iomem *icoll_base; 44 static struct irq_domain *icoll_domain; 45 46 static void icoll_ack_irq(struct irq_data *d) 47 { 48 /* 49 * The Interrupt Collector is able to prioritize irqs. 50 * Currently only level 0 is used. So acking can use 51 * BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 unconditionally. 52 */ 53 __raw_writel(BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0, 54 icoll_base + HW_ICOLL_LEVELACK); 55 } 56 57 static void icoll_mask_irq(struct irq_data *d) 58 { 59 __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, 60 icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->hwirq)); 61 } 62 63 static void icoll_unmask_irq(struct irq_data *d) 64 { 65 __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, 66 icoll_base + HW_ICOLL_INTERRUPTn_SET(d->hwirq)); 67 } 68 69 static struct irq_chip mxs_icoll_chip = { 70 .irq_ack = icoll_ack_irq, 71 .irq_mask = icoll_mask_irq, 72 .irq_unmask = icoll_unmask_irq, 73 }; 74 75 asmlinkage void __exception_irq_entry icoll_handle_irq(struct pt_regs *regs) 76 { 77 u32 irqnr; 78 79 irqnr = __raw_readl(icoll_base + HW_ICOLL_STAT_OFFSET); 80 __raw_writel(irqnr, icoll_base + HW_ICOLL_VECTOR); 81 handle_domain_irq(icoll_domain, irqnr, regs); 82 } 83 84 static int icoll_irq_domain_map(struct irq_domain *d, unsigned int virq, 85 irq_hw_number_t hw) 86 { 87 irq_set_chip_and_handler(virq, &mxs_icoll_chip, handle_level_irq); 88 set_irq_flags(virq, IRQF_VALID); 89 90 return 0; 91 } 92 93 static const struct irq_domain_ops icoll_irq_domain_ops = { 94 .map = icoll_irq_domain_map, 95 .xlate = irq_domain_xlate_onecell, 96 }; 97 98 static int __init icoll_of_init(struct device_node *np, 99 struct device_node *interrupt_parent) 100 { 101 icoll_base = of_iomap(np, 0); 102 WARN_ON(!icoll_base); 103 104 /* 105 * Interrupt Collector reset, which initializes the priority 106 * for each irq to level 0. 107 */ 108 stmp_reset_block(icoll_base + HW_ICOLL_CTRL); 109 110 icoll_domain = irq_domain_add_linear(np, ICOLL_NUM_IRQS, 111 &icoll_irq_domain_ops, NULL); 112 return icoll_domain ? 0 : -ENODEV; 113 } 114 IRQCHIP_DECLARE(mxs, "fsl,icoll", icoll_of_init); 115