1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2016,2017 ARM Limited, All Rights Reserved. 4 * Author: Marc Zyngier <marc.zyngier@arm.com> 5 */ 6 7 #include <linux/interrupt.h> 8 #include <linux/irq.h> 9 #include <linux/irqdomain.h> 10 #include <linux/msi.h> 11 #include <linux/sched.h> 12 13 #include <linux/irqchip/arm-gic-v4.h> 14 15 /* 16 * WARNING: The blurb below assumes that you understand the 17 * intricacies of GICv3, GICv4, and how a guest's view of a GICv3 gets 18 * translated into GICv4 commands. So it effectively targets at most 19 * two individuals. You know who you are. 20 * 21 * The core GICv4 code is designed to *avoid* exposing too much of the 22 * core GIC code (that would in turn leak into the hypervisor code), 23 * and instead provide a hypervisor agnostic interface to the HW (of 24 * course, the astute reader will quickly realize that hypervisor 25 * agnostic actually means KVM-specific - what were you thinking?). 26 * 27 * In order to achieve a modicum of isolation, we try to hide most of 28 * the GICv4 "stuff" behind normal irqchip operations: 29 * 30 * - Any guest-visible VLPI is backed by a Linux interrupt (and a 31 * physical LPI which gets unmapped when the guest maps the 32 * VLPI). This allows the same DevID/EventID pair to be either 33 * mapped to the LPI (host) or the VLPI (guest). Note that this is 34 * exclusive, and you cannot have both. 35 * 36 * - Enabling/disabling a VLPI is done by issuing mask/unmask calls. 37 * 38 * - Guest INT/CLEAR commands are implemented through 39 * irq_set_irqchip_state(). 40 * 41 * - The *bizarre* stuff (mapping/unmapping an interrupt to a VLPI, or 42 * issuing an INV after changing a priority) gets shoved into the 43 * irq_set_vcpu_affinity() method. While this is quite horrible 44 * (let's face it, this is the irqchip version of an ioctl), it 45 * confines the crap to a single location. And map/unmap really is 46 * about setting the affinity of a VLPI to a vcpu, so only INV is 47 * majorly out of place. So there. 48 * 49 * A number of commands are simply not provided by this interface, as 50 * they do not make direct sense. For example, MAPD is purely local to 51 * the virtual ITS (because it references a virtual device, and the 52 * physical ITS is still very much in charge of the physical 53 * device). Same goes for things like MAPC (the physical ITS deals 54 * with the actual vPE affinity, and not the braindead concept of 55 * collection). SYNC is not provided either, as each and every command 56 * is followed by a VSYNC. This could be relaxed in the future, should 57 * this be seen as a bottleneck (yes, this means *never*). 58 * 59 * But handling VLPIs is only one side of the job of the GICv4 60 * code. The other (darker) side is to take care of the doorbell 61 * interrupts which are delivered when a VLPI targeting a non-running 62 * vcpu is being made pending. 63 * 64 * The choice made here is that each vcpu (VPE in old northern GICv4 65 * dialect) gets a single doorbell LPI, no matter how many interrupts 66 * are targeting it. This has a nice property, which is that the 67 * interrupt becomes a handle for the VPE, and that the hypervisor 68 * code can manipulate it through the normal interrupt API: 69 * 70 * - VMs (or rather the VM abstraction that matters to the GIC) 71 * contain an irq domain where each interrupt maps to a VPE. In 72 * turn, this domain sits on top of the normal LPI allocator, and a 73 * specially crafted irq_chip implementation. 74 * 75 * - mask/unmask do what is expected on the doorbell interrupt. 76 * 77 * - irq_set_affinity is used to move a VPE from one redistributor to 78 * another. 79 * 80 * - irq_set_vcpu_affinity once again gets hijacked for the purpose of 81 * creating a new sub-API, namely scheduling/descheduling a VPE 82 * (which involves programming GICR_V{PROP,PEND}BASER) and 83 * performing INVALL operations. 84 */ 85 86 static struct irq_domain *gic_domain; 87 static const struct irq_domain_ops *vpe_domain_ops; 88 static const struct irq_domain_ops *sgi_domain_ops; 89 90 static bool has_v4_1(void) 91 { 92 return !!sgi_domain_ops; 93 } 94 95 static int its_alloc_vcpu_sgis(struct its_vpe *vpe, int idx) 96 { 97 char *name; 98 int sgi_base; 99 100 if (!has_v4_1()) 101 return 0; 102 103 name = kasprintf(GFP_KERNEL, "GICv4-sgi-%d", task_pid_nr(current)); 104 if (!name) 105 goto err; 106 107 vpe->fwnode = irq_domain_alloc_named_id_fwnode(name, idx); 108 if (!vpe->fwnode) 109 goto err; 110 111 kfree(name); 112 name = NULL; 113 114 vpe->sgi_domain = irq_domain_create_linear(vpe->fwnode, 16, 115 sgi_domain_ops, vpe); 116 if (!vpe->sgi_domain) 117 goto err; 118 119 sgi_base = __irq_domain_alloc_irqs(vpe->sgi_domain, -1, 16, 120 NUMA_NO_NODE, vpe, 121 false, NULL); 122 if (sgi_base <= 0) 123 goto err; 124 125 return 0; 126 127 err: 128 if (vpe->sgi_domain) 129 irq_domain_remove(vpe->sgi_domain); 130 if (vpe->fwnode) 131 irq_domain_free_fwnode(vpe->fwnode); 132 kfree(name); 133 return -ENOMEM; 134 } 135 136 int its_alloc_vcpu_irqs(struct its_vm *vm) 137 { 138 int vpe_base_irq, i; 139 140 vm->fwnode = irq_domain_alloc_named_id_fwnode("GICv4-vpe", 141 task_pid_nr(current)); 142 if (!vm->fwnode) 143 goto err; 144 145 vm->domain = irq_domain_create_hierarchy(gic_domain, 0, vm->nr_vpes, 146 vm->fwnode, vpe_domain_ops, 147 vm); 148 if (!vm->domain) 149 goto err; 150 151 for (i = 0; i < vm->nr_vpes; i++) { 152 vm->vpes[i]->its_vm = vm; 153 vm->vpes[i]->idai = true; 154 } 155 156 vpe_base_irq = __irq_domain_alloc_irqs(vm->domain, -1, vm->nr_vpes, 157 NUMA_NO_NODE, vm, 158 false, NULL); 159 if (vpe_base_irq <= 0) 160 goto err; 161 162 for (i = 0; i < vm->nr_vpes; i++) { 163 int ret; 164 vm->vpes[i]->irq = vpe_base_irq + i; 165 ret = its_alloc_vcpu_sgis(vm->vpes[i], i); 166 if (ret) 167 goto err; 168 } 169 170 return 0; 171 172 err: 173 if (vm->domain) 174 irq_domain_remove(vm->domain); 175 if (vm->fwnode) 176 irq_domain_free_fwnode(vm->fwnode); 177 178 return -ENOMEM; 179 } 180 181 static void its_free_sgi_irqs(struct its_vm *vm) 182 { 183 int i; 184 185 if (!has_v4_1()) 186 return; 187 188 for (i = 0; i < vm->nr_vpes; i++) { 189 unsigned int irq = irq_find_mapping(vm->vpes[i]->sgi_domain, 0); 190 191 if (WARN_ON(!irq)) 192 continue; 193 194 irq_domain_free_irqs(irq, 16); 195 irq_domain_remove(vm->vpes[i]->sgi_domain); 196 irq_domain_free_fwnode(vm->vpes[i]->fwnode); 197 } 198 } 199 200 void its_free_vcpu_irqs(struct its_vm *vm) 201 { 202 its_free_sgi_irqs(vm); 203 irq_domain_free_irqs(vm->vpes[0]->irq, vm->nr_vpes); 204 irq_domain_remove(vm->domain); 205 irq_domain_free_fwnode(vm->fwnode); 206 } 207 208 static int its_send_vpe_cmd(struct its_vpe *vpe, struct its_cmd_info *info) 209 { 210 return irq_set_vcpu_affinity(vpe->irq, info); 211 } 212 213 int its_make_vpe_non_resident(struct its_vpe *vpe, bool db) 214 { 215 struct irq_desc *desc = irq_to_desc(vpe->irq); 216 struct its_cmd_info info = { }; 217 int ret; 218 219 WARN_ON(preemptible()); 220 221 info.cmd_type = DESCHEDULE_VPE; 222 if (has_v4_1()) { 223 /* GICv4.1 can directly deal with doorbells */ 224 info.req_db = db; 225 } else { 226 /* Undo the nested disable_irq() calls... */ 227 while (db && irqd_irq_disabled(&desc->irq_data)) 228 enable_irq(vpe->irq); 229 } 230 231 ret = its_send_vpe_cmd(vpe, &info); 232 if (!ret) 233 vpe->resident = false; 234 235 vpe->ready = false; 236 237 return ret; 238 } 239 240 int its_make_vpe_resident(struct its_vpe *vpe, bool g0en, bool g1en) 241 { 242 struct its_cmd_info info = { }; 243 int ret; 244 245 WARN_ON(preemptible()); 246 247 info.cmd_type = SCHEDULE_VPE; 248 if (has_v4_1()) { 249 info.g0en = g0en; 250 info.g1en = g1en; 251 } else { 252 /* Disabled the doorbell, as we're about to enter the guest */ 253 disable_irq_nosync(vpe->irq); 254 } 255 256 ret = its_send_vpe_cmd(vpe, &info); 257 if (!ret) 258 vpe->resident = true; 259 260 return ret; 261 } 262 263 int its_commit_vpe(struct its_vpe *vpe) 264 { 265 struct its_cmd_info info = { 266 .cmd_type = COMMIT_VPE, 267 }; 268 int ret; 269 270 WARN_ON(preemptible()); 271 272 ret = its_send_vpe_cmd(vpe, &info); 273 if (!ret) 274 vpe->ready = true; 275 276 return ret; 277 } 278 279 280 int its_invall_vpe(struct its_vpe *vpe) 281 { 282 struct its_cmd_info info = { 283 .cmd_type = INVALL_VPE, 284 }; 285 286 return its_send_vpe_cmd(vpe, &info); 287 } 288 289 int its_map_vlpi(int irq, struct its_vlpi_map *map) 290 { 291 struct its_cmd_info info = { 292 .cmd_type = MAP_VLPI, 293 { 294 .map = map, 295 }, 296 }; 297 int ret; 298 299 /* 300 * The host will never see that interrupt firing again, so it 301 * is vital that we don't do any lazy masking. 302 */ 303 irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY); 304 305 ret = irq_set_vcpu_affinity(irq, &info); 306 if (ret) 307 irq_clear_status_flags(irq, IRQ_DISABLE_UNLAZY); 308 309 return ret; 310 } 311 312 int its_get_vlpi(int irq, struct its_vlpi_map *map) 313 { 314 struct its_cmd_info info = { 315 .cmd_type = GET_VLPI, 316 { 317 .map = map, 318 }, 319 }; 320 321 return irq_set_vcpu_affinity(irq, &info); 322 } 323 324 int its_unmap_vlpi(int irq) 325 { 326 irq_clear_status_flags(irq, IRQ_DISABLE_UNLAZY); 327 return irq_set_vcpu_affinity(irq, NULL); 328 } 329 330 int its_prop_update_vlpi(int irq, u8 config, bool inv) 331 { 332 struct its_cmd_info info = { 333 .cmd_type = inv ? PROP_UPDATE_AND_INV_VLPI : PROP_UPDATE_VLPI, 334 { 335 .config = config, 336 }, 337 }; 338 339 return irq_set_vcpu_affinity(irq, &info); 340 } 341 342 int its_prop_update_vsgi(int irq, u8 priority, bool group) 343 { 344 struct its_cmd_info info = { 345 .cmd_type = PROP_UPDATE_VSGI, 346 { 347 .priority = priority, 348 .group = group, 349 }, 350 }; 351 352 return irq_set_vcpu_affinity(irq, &info); 353 } 354 355 int its_init_v4(struct irq_domain *domain, 356 const struct irq_domain_ops *vpe_ops, 357 const struct irq_domain_ops *sgi_ops) 358 { 359 if (domain) { 360 pr_info("ITS: Enabling GICv4 support\n"); 361 gic_domain = domain; 362 vpe_domain_ops = vpe_ops; 363 sgi_domain_ops = sgi_ops; 364 return 0; 365 } 366 367 pr_err("ITS: No GICv4 VPE domain allocated\n"); 368 return -ENODEV; 369 } 370