1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2cc2d3216SMarc Zyngier /* 3d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 4cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 5cc2d3216SMarc Zyngier */ 6cc2d3216SMarc Zyngier 73f010cf1STomasz Nowicki #include <linux/acpi.h> 88d3554b8SHanjun Guo #include <linux/acpi_iort.h> 9ffedbf0cSMarc Zyngier #include <linux/bitfield.h> 10cc2d3216SMarc Zyngier #include <linux/bitmap.h> 11cc2d3216SMarc Zyngier #include <linux/cpu.h> 12c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 13cc2d3216SMarc Zyngier #include <linux/delay.h> 143fb68faeSMarc Zyngier #include <linux/efi.h> 15cc2d3216SMarc Zyngier #include <linux/interrupt.h> 16*fa49364cSRobin Murphy #include <linux/iommu.h> 1796806229SMarc Zyngier #include <linux/iopoll.h> 183f010cf1STomasz Nowicki #include <linux/irqdomain.h> 19880cb3cdSMarc Zyngier #include <linux/list.h> 20cc2d3216SMarc Zyngier #include <linux/log2.h> 215e2c9f9aSMarc Zyngier #include <linux/memblock.h> 22cc2d3216SMarc Zyngier #include <linux/mm.h> 23cc2d3216SMarc Zyngier #include <linux/msi.h> 24cc2d3216SMarc Zyngier #include <linux/of.h> 25cc2d3216SMarc Zyngier #include <linux/of_address.h> 26cc2d3216SMarc Zyngier #include <linux/of_irq.h> 27cc2d3216SMarc Zyngier #include <linux/of_pci.h> 28cc2d3216SMarc Zyngier #include <linux/of_platform.h> 29cc2d3216SMarc Zyngier #include <linux/percpu.h> 30cc2d3216SMarc Zyngier #include <linux/slab.h> 31dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 32cc2d3216SMarc Zyngier 3341a83e06SJoel Porquet #include <linux/irqchip.h> 34cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 35c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 36cc2d3216SMarc Zyngier 37cc2d3216SMarc Zyngier #include <asm/cputype.h> 38cc2d3216SMarc Zyngier #include <asm/exception.h> 39cc2d3216SMarc Zyngier 4067510ccaSRobert Richter #include "irq-gic-common.h" 4167510ccaSRobert Richter 4294100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4394100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 44fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 45cc2d3216SMarc Zyngier 46c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 47c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 48c48ed51cSMarc Zyngier 49c0cdc890SValentin Schneider #define RD_LOCAL_LPI_ENABLED BIT(0) 50d23bc2bcSValentin Schneider #define RD_LOCAL_PENDTABLE_PREALLOCATED BIT(1) 51d23bc2bcSValentin Schneider #define RD_LOCAL_MEMRESERVE_DONE BIT(2) 52c0cdc890SValentin Schneider 53a13b0404SMarc Zyngier static u32 lpi_id_bits; 54a13b0404SMarc Zyngier 55a13b0404SMarc Zyngier /* 56a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 57a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 58a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 59a13b0404SMarc Zyngier */ 60a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 61a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 62a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 63a13b0404SMarc Zyngier 642130b789SJulien Thierry #define LPI_PROP_DEFAULT_PRIO GICD_INT_DEF_PRI 65a13b0404SMarc Zyngier 66cc2d3216SMarc Zyngier /* 67cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 68cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 69cc2d3216SMarc Zyngier * CPU. 70cc2d3216SMarc Zyngier */ 71cc2d3216SMarc Zyngier struct its_collection { 72cc2d3216SMarc Zyngier u64 target_address; 73cc2d3216SMarc Zyngier u16 col_id; 74cc2d3216SMarc Zyngier }; 75cc2d3216SMarc Zyngier 76cc2d3216SMarc Zyngier /* 779347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 789347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 79466b7d16SShanker Donthineni */ 80466b7d16SShanker Donthineni struct its_baser { 81466b7d16SShanker Donthineni void *base; 82466b7d16SShanker Donthineni u64 val; 83466b7d16SShanker Donthineni u32 order; 849347359aSShanker Donthineni u32 psz; 85466b7d16SShanker Donthineni }; 86466b7d16SShanker Donthineni 87558b0165SArd Biesheuvel struct its_device; 88558b0165SArd Biesheuvel 89466b7d16SShanker Donthineni /* 90cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 91841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 92841514abSMarc Zyngier * list of devices writing to it. 939791ec7dSMarc Zyngier * 949791ec7dSMarc Zyngier * dev_alloc_lock has to be taken for device allocations, while the 959791ec7dSMarc Zyngier * spinlock must be taken to parse data structures such as the device 969791ec7dSMarc Zyngier * list. 97cc2d3216SMarc Zyngier */ 98cc2d3216SMarc Zyngier struct its_node { 99cc2d3216SMarc Zyngier raw_spinlock_t lock; 1009791ec7dSMarc Zyngier struct mutex dev_alloc_lock; 101cc2d3216SMarc Zyngier struct list_head entry; 102cc2d3216SMarc Zyngier void __iomem *base; 1035e46a484SMarc Zyngier void __iomem *sgir_base; 104db40f0a7STomasz Nowicki phys_addr_t phys_base; 105cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 106cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 107466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 108cc2d3216SMarc Zyngier struct its_collection *collections; 109558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 110558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 1110dd57fedSMarc Zyngier u64 typer; 112dba0bc7bSDerek Basehore u64 cbaser_save; 113dba0bc7bSDerek Basehore u32 ctlr_save; 1145e516846SMarc Zyngier u32 mpidr; 115cc2d3216SMarc Zyngier struct list_head its_device_list; 116cc2d3216SMarc Zyngier u64 flags; 117debf6d02SMarc Zyngier unsigned long list_nr; 118fbf8f40eSGanapatrao Kulkarni int numa_node; 119558b0165SArd Biesheuvel unsigned int msi_domain_flags; 120558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1215c9a882eSMarc Zyngier int vlpi_redist_offset; 122cc2d3216SMarc Zyngier }; 123cc2d3216SMarc Zyngier 1240dd57fedSMarc Zyngier #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) 1255e516846SMarc Zyngier #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) 126576a8342SMarc Zyngier #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) 1270dd57fedSMarc Zyngier 128cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 129cc2d3216SMarc Zyngier 13032bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 131f2d83409SMarc Zyngier #define ITS_MAX_VPEID_BITS \ 132f2d83409SMarc Zyngier ({ \ 133f2d83409SMarc Zyngier int nvpeid = 16; \ 134f2d83409SMarc Zyngier if (gic_rdists->has_rvpeid && \ 135f2d83409SMarc Zyngier gic_rdists->gicd_typer2 & GICD_TYPER2_VIL) \ 136f2d83409SMarc Zyngier nvpeid = 1 + (gic_rdists->gicd_typer2 & \ 137f2d83409SMarc Zyngier GICD_TYPER2_VID); \ 138f2d83409SMarc Zyngier \ 139f2d83409SMarc Zyngier nvpeid; \ 140f2d83409SMarc Zyngier }) 14132bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 14232bd44dcSShanker Donthineni 1432eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1442eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1452eca0d6cSShanker Donthineni 146591e5becSMarc Zyngier struct event_lpi_map { 147591e5becSMarc Zyngier unsigned long *lpi_map; 148591e5becSMarc Zyngier u16 *col_map; 149591e5becSMarc Zyngier irq_hw_number_t lpi_base; 150591e5becSMarc Zyngier int nr_lpis; 15111635fa2SMarc Zyngier raw_spinlock_t vlpi_lock; 152d011e4e6SMarc Zyngier struct its_vm *vm; 153d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 154d011e4e6SMarc Zyngier int nr_vlpis; 155591e5becSMarc Zyngier }; 156591e5becSMarc Zyngier 157cc2d3216SMarc Zyngier /* 158d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 159d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 160d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 161d011e4e6SMarc Zyngier * indicates which one. 162cc2d3216SMarc Zyngier */ 163cc2d3216SMarc Zyngier struct its_device { 164cc2d3216SMarc Zyngier struct list_head entry; 165cc2d3216SMarc Zyngier struct its_node *its; 166591e5becSMarc Zyngier struct event_lpi_map event_map; 167cc2d3216SMarc Zyngier void *itt; 168cc2d3216SMarc Zyngier u32 nr_ites; 169cc2d3216SMarc Zyngier u32 device_id; 1709791ec7dSMarc Zyngier bool shared; 171cc2d3216SMarc Zyngier }; 172cc2d3216SMarc Zyngier 17320b3d54eSMarc Zyngier static struct { 17420b3d54eSMarc Zyngier raw_spinlock_t lock; 17520b3d54eSMarc Zyngier struct its_device *dev; 17620b3d54eSMarc Zyngier struct its_vpe **vpes; 17720b3d54eSMarc Zyngier int next_victim; 17820b3d54eSMarc Zyngier } vpe_proxy; 17920b3d54eSMarc Zyngier 1802f13ff1dSMarc Zyngier struct cpu_lpi_count { 1812f13ff1dSMarc Zyngier atomic_t managed; 1822f13ff1dSMarc Zyngier atomic_t unmanaged; 1832f13ff1dSMarc Zyngier }; 1842f13ff1dSMarc Zyngier 1852f13ff1dSMarc Zyngier static DEFINE_PER_CPU(struct cpu_lpi_count, cpu_lpi_count); 1862f13ff1dSMarc Zyngier 1871ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 188a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1891ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 190db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1911ac19ca6SMarc Zyngier 1923dfa576bSMarc Zyngier static unsigned long its_list_map; 1933171a47aSMarc Zyngier static u16 vmovp_seq_num; 1943171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1953171a47aSMarc Zyngier 1967d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1973dfa576bSMarc Zyngier 1981ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 19911e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 2001ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 201e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 2021ac19ca6SMarc Zyngier 203009384b3SMarc Zyngier /* 204009384b3SMarc Zyngier * Skip ITSs that have no vLPIs mapped, unless we're on GICv4.1, as we 205009384b3SMarc Zyngier * always have vSGIs mapped. 206009384b3SMarc Zyngier */ 207009384b3SMarc Zyngier static bool require_its_list_vmovp(struct its_vm *vm, struct its_node *its) 208009384b3SMarc Zyngier { 209009384b3SMarc Zyngier return (gic_rdists->has_rvpeid || vm->vlpi_count[its->list_nr]); 210009384b3SMarc Zyngier } 211009384b3SMarc Zyngier 21284243125SZenghui Yu static u16 get_its_list(struct its_vm *vm) 21384243125SZenghui Yu { 21484243125SZenghui Yu struct its_node *its; 21584243125SZenghui Yu unsigned long its_list = 0; 21684243125SZenghui Yu 21784243125SZenghui Yu list_for_each_entry(its, &its_nodes, entry) { 2180dd57fedSMarc Zyngier if (!is_v4(its)) 21984243125SZenghui Yu continue; 22084243125SZenghui Yu 221009384b3SMarc Zyngier if (require_its_list_vmovp(vm, its)) 22284243125SZenghui Yu __set_bit(its->list_nr, &its_list); 22384243125SZenghui Yu } 22484243125SZenghui Yu 22584243125SZenghui Yu return (u16)its_list; 22684243125SZenghui Yu } 22784243125SZenghui Yu 228425c09beSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 229425c09beSMarc Zyngier { 230425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 231425c09beSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 232425c09beSMarc Zyngier } 233425c09beSMarc Zyngier 234591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 235591e5becSMarc Zyngier u32 event) 236591e5becSMarc Zyngier { 237591e5becSMarc Zyngier struct its_node *its = its_dev->its; 238591e5becSMarc Zyngier 239591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 240591e5becSMarc Zyngier } 241591e5becSMarc Zyngier 242c1d4d5cdSMarc Zyngier static struct its_vlpi_map *dev_event_to_vlpi_map(struct its_device *its_dev, 243c1d4d5cdSMarc Zyngier u32 event) 244c1d4d5cdSMarc Zyngier { 245c1d4d5cdSMarc Zyngier if (WARN_ON_ONCE(event >= its_dev->event_map.nr_lpis)) 246c1d4d5cdSMarc Zyngier return NULL; 247c1d4d5cdSMarc Zyngier 248c1d4d5cdSMarc Zyngier return &its_dev->event_map.vlpi_maps[event]; 249c1d4d5cdSMarc Zyngier } 250c1d4d5cdSMarc Zyngier 251f4a81f5aSMarc Zyngier static struct its_vlpi_map *get_vlpi_map(struct irq_data *d) 252f4a81f5aSMarc Zyngier { 253f4a81f5aSMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 254f4a81f5aSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 255f4a81f5aSMarc Zyngier u32 event = its_get_event_id(d); 256f4a81f5aSMarc Zyngier 257f4a81f5aSMarc Zyngier return dev_event_to_vlpi_map(its_dev, event); 258f4a81f5aSMarc Zyngier } 259f4a81f5aSMarc Zyngier 260f4a81f5aSMarc Zyngier return NULL; 261f4a81f5aSMarc Zyngier } 262f4a81f5aSMarc Zyngier 263f3a05921SMarc Zyngier static int vpe_to_cpuid_lock(struct its_vpe *vpe, unsigned long *flags) 264425c09beSMarc Zyngier { 265f3a05921SMarc Zyngier raw_spin_lock_irqsave(&vpe->vpe_lock, *flags); 266f3a05921SMarc Zyngier return vpe->col_idx; 267f3a05921SMarc Zyngier } 268f3a05921SMarc Zyngier 269f3a05921SMarc Zyngier static void vpe_to_cpuid_unlock(struct its_vpe *vpe, unsigned long flags) 270f3a05921SMarc Zyngier { 271f3a05921SMarc Zyngier raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); 272f3a05921SMarc Zyngier } 273f3a05921SMarc Zyngier 274f3a05921SMarc Zyngier static int irq_to_cpuid_lock(struct irq_data *d, unsigned long *flags) 275f3a05921SMarc Zyngier { 276f3a05921SMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 277f3a05921SMarc Zyngier int cpu; 278f3a05921SMarc Zyngier 279f3a05921SMarc Zyngier if (map) { 280f3a05921SMarc Zyngier cpu = vpe_to_cpuid_lock(map->vpe, flags); 281f3a05921SMarc Zyngier } else { 282f3a05921SMarc Zyngier /* Physical LPIs are already locked via the irq_desc lock */ 283425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 284f3a05921SMarc Zyngier cpu = its_dev->event_map.col_map[its_get_event_id(d)]; 285f3a05921SMarc Zyngier /* Keep GCC quiet... */ 286f3a05921SMarc Zyngier *flags = 0; 287f3a05921SMarc Zyngier } 288f3a05921SMarc Zyngier 289f3a05921SMarc Zyngier return cpu; 290f3a05921SMarc Zyngier } 291f3a05921SMarc Zyngier 292f3a05921SMarc Zyngier static void irq_to_cpuid_unlock(struct irq_data *d, unsigned long flags) 293f3a05921SMarc Zyngier { 294f4a81f5aSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 295425c09beSMarc Zyngier 296f4a81f5aSMarc Zyngier if (map) 297f3a05921SMarc Zyngier vpe_to_cpuid_unlock(map->vpe, flags); 298425c09beSMarc Zyngier } 299425c09beSMarc Zyngier 30083559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 30183559b47SMarc Zyngier { 30220faba84SJoe Perches if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(15, 0))) 30383559b47SMarc Zyngier return NULL; 30483559b47SMarc Zyngier 30583559b47SMarc Zyngier return col; 30683559b47SMarc Zyngier } 30783559b47SMarc Zyngier 308205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 309205e065dSMarc Zyngier { 310205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 311205e065dSMarc Zyngier return vpe; 312205e065dSMarc Zyngier 313205e065dSMarc Zyngier return NULL; 314205e065dSMarc Zyngier } 315205e065dSMarc Zyngier 316cc2d3216SMarc Zyngier /* 317cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 318cc2d3216SMarc Zyngier * block. 319cc2d3216SMarc Zyngier */ 320cc2d3216SMarc Zyngier struct its_cmd_desc { 321cc2d3216SMarc Zyngier union { 322cc2d3216SMarc Zyngier struct { 323cc2d3216SMarc Zyngier struct its_device *dev; 324cc2d3216SMarc Zyngier u32 event_id; 325cc2d3216SMarc Zyngier } its_inv_cmd; 326cc2d3216SMarc Zyngier 327cc2d3216SMarc Zyngier struct { 328cc2d3216SMarc Zyngier struct its_device *dev; 329cc2d3216SMarc Zyngier u32 event_id; 3308d85dcedSMarc Zyngier } its_clear_cmd; 3318d85dcedSMarc Zyngier 3328d85dcedSMarc Zyngier struct { 3338d85dcedSMarc Zyngier struct its_device *dev; 3348d85dcedSMarc Zyngier u32 event_id; 335cc2d3216SMarc Zyngier } its_int_cmd; 336cc2d3216SMarc Zyngier 337cc2d3216SMarc Zyngier struct { 338cc2d3216SMarc Zyngier struct its_device *dev; 339cc2d3216SMarc Zyngier int valid; 340cc2d3216SMarc Zyngier } its_mapd_cmd; 341cc2d3216SMarc Zyngier 342cc2d3216SMarc Zyngier struct { 343cc2d3216SMarc Zyngier struct its_collection *col; 344cc2d3216SMarc Zyngier int valid; 345cc2d3216SMarc Zyngier } its_mapc_cmd; 346cc2d3216SMarc Zyngier 347cc2d3216SMarc Zyngier struct { 348cc2d3216SMarc Zyngier struct its_device *dev; 349cc2d3216SMarc Zyngier u32 phys_id; 350cc2d3216SMarc Zyngier u32 event_id; 3516a25ad3aSMarc Zyngier } its_mapti_cmd; 352cc2d3216SMarc Zyngier 353cc2d3216SMarc Zyngier struct { 354cc2d3216SMarc Zyngier struct its_device *dev; 355cc2d3216SMarc Zyngier struct its_collection *col; 356591e5becSMarc Zyngier u32 event_id; 357cc2d3216SMarc Zyngier } its_movi_cmd; 358cc2d3216SMarc Zyngier 359cc2d3216SMarc Zyngier struct { 360cc2d3216SMarc Zyngier struct its_device *dev; 361cc2d3216SMarc Zyngier u32 event_id; 362cc2d3216SMarc Zyngier } its_discard_cmd; 363cc2d3216SMarc Zyngier 364cc2d3216SMarc Zyngier struct { 365cc2d3216SMarc Zyngier struct its_collection *col; 366cc2d3216SMarc Zyngier } its_invall_cmd; 367d011e4e6SMarc Zyngier 368d011e4e6SMarc Zyngier struct { 369d011e4e6SMarc Zyngier struct its_vpe *vpe; 370eb78192bSMarc Zyngier } its_vinvall_cmd; 371eb78192bSMarc Zyngier 372eb78192bSMarc Zyngier struct { 373eb78192bSMarc Zyngier struct its_vpe *vpe; 374eb78192bSMarc Zyngier struct its_collection *col; 375eb78192bSMarc Zyngier bool valid; 376eb78192bSMarc Zyngier } its_vmapp_cmd; 377eb78192bSMarc Zyngier 378eb78192bSMarc Zyngier struct { 379eb78192bSMarc Zyngier struct its_vpe *vpe; 380d011e4e6SMarc Zyngier struct its_device *dev; 381d011e4e6SMarc Zyngier u32 virt_id; 382d011e4e6SMarc Zyngier u32 event_id; 383d011e4e6SMarc Zyngier bool db_enabled; 384d011e4e6SMarc Zyngier } its_vmapti_cmd; 385d011e4e6SMarc Zyngier 386d011e4e6SMarc Zyngier struct { 387d011e4e6SMarc Zyngier struct its_vpe *vpe; 388d011e4e6SMarc Zyngier struct its_device *dev; 389d011e4e6SMarc Zyngier u32 event_id; 390d011e4e6SMarc Zyngier bool db_enabled; 391d011e4e6SMarc Zyngier } its_vmovi_cmd; 3923171a47aSMarc Zyngier 3933171a47aSMarc Zyngier struct { 3943171a47aSMarc Zyngier struct its_vpe *vpe; 3953171a47aSMarc Zyngier struct its_collection *col; 3963171a47aSMarc Zyngier u16 seq_num; 3973171a47aSMarc Zyngier u16 its_list; 3983171a47aSMarc Zyngier } its_vmovp_cmd; 399d97c97baSMarc Zyngier 400d97c97baSMarc Zyngier struct { 401d97c97baSMarc Zyngier struct its_vpe *vpe; 402d97c97baSMarc Zyngier } its_invdb_cmd; 403e252cf8aSMarc Zyngier 404e252cf8aSMarc Zyngier struct { 405e252cf8aSMarc Zyngier struct its_vpe *vpe; 406e252cf8aSMarc Zyngier u8 sgi; 407e252cf8aSMarc Zyngier u8 priority; 408e252cf8aSMarc Zyngier bool enable; 409e252cf8aSMarc Zyngier bool group; 410e252cf8aSMarc Zyngier bool clear; 411e252cf8aSMarc Zyngier } its_vsgi_cmd; 412cc2d3216SMarc Zyngier }; 413cc2d3216SMarc Zyngier }; 414cc2d3216SMarc Zyngier 415cc2d3216SMarc Zyngier /* 416cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 417cc2d3216SMarc Zyngier */ 418cc2d3216SMarc Zyngier struct its_cmd_block { 4192bbdfcc5SBen Dooks (Codethink) union { 420cc2d3216SMarc Zyngier u64 raw_cmd[4]; 4212bbdfcc5SBen Dooks (Codethink) __le64 raw_cmd_le[4]; 4222bbdfcc5SBen Dooks (Codethink) }; 423cc2d3216SMarc Zyngier }; 424cc2d3216SMarc Zyngier 425cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 426cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 427cc2d3216SMarc Zyngier 42867047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 42967047f90SMarc Zyngier struct its_cmd_block *, 430cc2d3216SMarc Zyngier struct its_cmd_desc *); 431cc2d3216SMarc Zyngier 43267047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 43367047f90SMarc Zyngier struct its_cmd_block *, 434d011e4e6SMarc Zyngier struct its_cmd_desc *); 435d011e4e6SMarc Zyngier 4364d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 4374d36f136SMarc Zyngier { 4384d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 4394d36f136SMarc Zyngier *raw_cmd &= ~mask; 4404d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 4414d36f136SMarc Zyngier } 4424d36f136SMarc Zyngier 443cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 444cc2d3216SMarc Zyngier { 4454d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 446cc2d3216SMarc Zyngier } 447cc2d3216SMarc Zyngier 448cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 449cc2d3216SMarc Zyngier { 4504d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 451cc2d3216SMarc Zyngier } 452cc2d3216SMarc Zyngier 453cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 454cc2d3216SMarc Zyngier { 4554d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 456cc2d3216SMarc Zyngier } 457cc2d3216SMarc Zyngier 458cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 459cc2d3216SMarc Zyngier { 4604d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 461cc2d3216SMarc Zyngier } 462cc2d3216SMarc Zyngier 463cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 464cc2d3216SMarc Zyngier { 4654d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 466cc2d3216SMarc Zyngier } 467cc2d3216SMarc Zyngier 468cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 469cc2d3216SMarc Zyngier { 47030ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 471cc2d3216SMarc Zyngier } 472cc2d3216SMarc Zyngier 473cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 474cc2d3216SMarc Zyngier { 4754d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 476cc2d3216SMarc Zyngier } 477cc2d3216SMarc Zyngier 478cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 479cc2d3216SMarc Zyngier { 48030ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 481cc2d3216SMarc Zyngier } 482cc2d3216SMarc Zyngier 483cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 484cc2d3216SMarc Zyngier { 4854d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 486cc2d3216SMarc Zyngier } 487cc2d3216SMarc Zyngier 488d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 489d011e4e6SMarc Zyngier { 490d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 491d011e4e6SMarc Zyngier } 492d011e4e6SMarc Zyngier 493d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 494d011e4e6SMarc Zyngier { 495d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 496d011e4e6SMarc Zyngier } 497d011e4e6SMarc Zyngier 498d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 499d011e4e6SMarc Zyngier { 500d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 501d011e4e6SMarc Zyngier } 502d011e4e6SMarc Zyngier 503d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 504d011e4e6SMarc Zyngier { 505d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 506d011e4e6SMarc Zyngier } 507d011e4e6SMarc Zyngier 5083171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 5093171a47aSMarc Zyngier { 5103171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 5113171a47aSMarc Zyngier } 5123171a47aSMarc Zyngier 5133171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 5143171a47aSMarc Zyngier { 5153171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 5163171a47aSMarc Zyngier } 5173171a47aSMarc Zyngier 518eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 519eb78192bSMarc Zyngier { 52030ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 521eb78192bSMarc Zyngier } 522eb78192bSMarc Zyngier 523eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 524eb78192bSMarc Zyngier { 525eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 526eb78192bSMarc Zyngier } 527eb78192bSMarc Zyngier 52864edfaa9SMarc Zyngier static void its_encode_vconf_addr(struct its_cmd_block *cmd, u64 vconf_pa) 52964edfaa9SMarc Zyngier { 53064edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], vconf_pa >> 16, 51, 16); 53164edfaa9SMarc Zyngier } 53264edfaa9SMarc Zyngier 53364edfaa9SMarc Zyngier static void its_encode_alloc(struct its_cmd_block *cmd, bool alloc) 53464edfaa9SMarc Zyngier { 53564edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], alloc, 8, 8); 53664edfaa9SMarc Zyngier } 53764edfaa9SMarc Zyngier 53864edfaa9SMarc Zyngier static void its_encode_ptz(struct its_cmd_block *cmd, bool ptz) 53964edfaa9SMarc Zyngier { 54064edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], ptz, 9, 9); 54164edfaa9SMarc Zyngier } 54264edfaa9SMarc Zyngier 54364edfaa9SMarc Zyngier static void its_encode_vmapp_default_db(struct its_cmd_block *cmd, 54464edfaa9SMarc Zyngier u32 vpe_db_lpi) 54564edfaa9SMarc Zyngier { 54664edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpe_db_lpi, 31, 0); 54764edfaa9SMarc Zyngier } 54864edfaa9SMarc Zyngier 549dd3f050aSMarc Zyngier static void its_encode_vmovp_default_db(struct its_cmd_block *cmd, 550dd3f050aSMarc Zyngier u32 vpe_db_lpi) 551dd3f050aSMarc Zyngier { 552dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpe_db_lpi, 31, 0); 553dd3f050aSMarc Zyngier } 554dd3f050aSMarc Zyngier 555dd3f050aSMarc Zyngier static void its_encode_db(struct its_cmd_block *cmd, bool db) 556dd3f050aSMarc Zyngier { 557dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db, 63, 63); 558dd3f050aSMarc Zyngier } 559dd3f050aSMarc Zyngier 560e252cf8aSMarc Zyngier static void its_encode_sgi_intid(struct its_cmd_block *cmd, u8 sgi) 561e252cf8aSMarc Zyngier { 562e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], sgi, 35, 32); 563e252cf8aSMarc Zyngier } 564e252cf8aSMarc Zyngier 565e252cf8aSMarc Zyngier static void its_encode_sgi_priority(struct its_cmd_block *cmd, u8 prio) 566e252cf8aSMarc Zyngier { 567e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], prio >> 4, 23, 20); 568e252cf8aSMarc Zyngier } 569e252cf8aSMarc Zyngier 570e252cf8aSMarc Zyngier static void its_encode_sgi_group(struct its_cmd_block *cmd, bool grp) 571e252cf8aSMarc Zyngier { 572e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], grp, 10, 10); 573e252cf8aSMarc Zyngier } 574e252cf8aSMarc Zyngier 575e252cf8aSMarc Zyngier static void its_encode_sgi_clear(struct its_cmd_block *cmd, bool clr) 576e252cf8aSMarc Zyngier { 577e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], clr, 9, 9); 578e252cf8aSMarc Zyngier } 579e252cf8aSMarc Zyngier 580e252cf8aSMarc Zyngier static void its_encode_sgi_enable(struct its_cmd_block *cmd, bool en) 581e252cf8aSMarc Zyngier { 582e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], en, 8, 8); 583e252cf8aSMarc Zyngier } 584e252cf8aSMarc Zyngier 585cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 586cc2d3216SMarc Zyngier { 587cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 5882bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[0] = cpu_to_le64(cmd->raw_cmd[0]); 5892bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[1] = cpu_to_le64(cmd->raw_cmd[1]); 5902bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[2] = cpu_to_le64(cmd->raw_cmd[2]); 5912bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[3] = cpu_to_le64(cmd->raw_cmd[3]); 592cc2d3216SMarc Zyngier } 593cc2d3216SMarc Zyngier 59467047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 59567047f90SMarc Zyngier struct its_cmd_block *cmd, 596cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 597cc2d3216SMarc Zyngier { 598cc2d3216SMarc Zyngier unsigned long itt_addr; 599c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 600cc2d3216SMarc Zyngier 601cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 602cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 603cc2d3216SMarc Zyngier 604cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 605cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 606cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 607cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 608cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 609cc2d3216SMarc Zyngier 610cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 611cc2d3216SMarc Zyngier 612591e5becSMarc Zyngier return NULL; 613cc2d3216SMarc Zyngier } 614cc2d3216SMarc Zyngier 61567047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 61667047f90SMarc Zyngier struct its_cmd_block *cmd, 617cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 618cc2d3216SMarc Zyngier { 619cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 620cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 621cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 622cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 623cc2d3216SMarc Zyngier 624cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 625cc2d3216SMarc Zyngier 626cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 627cc2d3216SMarc Zyngier } 628cc2d3216SMarc Zyngier 62967047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 63067047f90SMarc Zyngier struct its_cmd_block *cmd, 631cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 632cc2d3216SMarc Zyngier { 633591e5becSMarc Zyngier struct its_collection *col; 634591e5becSMarc Zyngier 6356a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 6366a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 637591e5becSMarc Zyngier 6386a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 6396a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 6406a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 6416a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 642591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 643cc2d3216SMarc Zyngier 644cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 645cc2d3216SMarc Zyngier 64683559b47SMarc Zyngier return valid_col(col); 647cc2d3216SMarc Zyngier } 648cc2d3216SMarc Zyngier 64967047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 65067047f90SMarc Zyngier struct its_cmd_block *cmd, 651cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 652cc2d3216SMarc Zyngier { 653591e5becSMarc Zyngier struct its_collection *col; 654591e5becSMarc Zyngier 655591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 656591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 657591e5becSMarc Zyngier 658cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 659cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 660591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 661cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 662cc2d3216SMarc Zyngier 663cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 664cc2d3216SMarc Zyngier 66583559b47SMarc Zyngier return valid_col(col); 666cc2d3216SMarc Zyngier } 667cc2d3216SMarc Zyngier 66867047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 66967047f90SMarc Zyngier struct its_cmd_block *cmd, 670cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 671cc2d3216SMarc Zyngier { 672591e5becSMarc Zyngier struct its_collection *col; 673591e5becSMarc Zyngier 674591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 675591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 676591e5becSMarc Zyngier 677cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 678cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 679cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 680cc2d3216SMarc Zyngier 681cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 682cc2d3216SMarc Zyngier 68383559b47SMarc Zyngier return valid_col(col); 684cc2d3216SMarc Zyngier } 685cc2d3216SMarc Zyngier 68667047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 68767047f90SMarc Zyngier struct its_cmd_block *cmd, 688cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 689cc2d3216SMarc Zyngier { 690591e5becSMarc Zyngier struct its_collection *col; 691591e5becSMarc Zyngier 692591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 693591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 694591e5becSMarc Zyngier 695cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 696cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 697cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 698cc2d3216SMarc Zyngier 699cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 700cc2d3216SMarc Zyngier 70183559b47SMarc Zyngier return valid_col(col); 702cc2d3216SMarc Zyngier } 703cc2d3216SMarc Zyngier 70467047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 70567047f90SMarc Zyngier struct its_cmd_block *cmd, 7068d85dcedSMarc Zyngier struct its_cmd_desc *desc) 7078d85dcedSMarc Zyngier { 7088d85dcedSMarc Zyngier struct its_collection *col; 7098d85dcedSMarc Zyngier 7108d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 7118d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 7128d85dcedSMarc Zyngier 7138d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 7148d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 7158d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 7168d85dcedSMarc Zyngier 7178d85dcedSMarc Zyngier its_fixup_cmd(cmd); 7188d85dcedSMarc Zyngier 71983559b47SMarc Zyngier return valid_col(col); 7208d85dcedSMarc Zyngier } 7218d85dcedSMarc Zyngier 72267047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 72367047f90SMarc Zyngier struct its_cmd_block *cmd, 7248d85dcedSMarc Zyngier struct its_cmd_desc *desc) 7258d85dcedSMarc Zyngier { 7268d85dcedSMarc Zyngier struct its_collection *col; 7278d85dcedSMarc Zyngier 7288d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 7298d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 7308d85dcedSMarc Zyngier 7318d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 7328d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 7338d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 7348d85dcedSMarc Zyngier 7358d85dcedSMarc Zyngier its_fixup_cmd(cmd); 7368d85dcedSMarc Zyngier 73783559b47SMarc Zyngier return valid_col(col); 7388d85dcedSMarc Zyngier } 7398d85dcedSMarc Zyngier 74067047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 74167047f90SMarc Zyngier struct its_cmd_block *cmd, 742cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 743cc2d3216SMarc Zyngier { 744cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 74510794522SZenghui Yu its_encode_collection(cmd, desc->its_invall_cmd.col->col_id); 746cc2d3216SMarc Zyngier 747cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 748cc2d3216SMarc Zyngier 749b383a42cSWudi Wang return desc->its_invall_cmd.col; 750cc2d3216SMarc Zyngier } 751cc2d3216SMarc Zyngier 75267047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 75367047f90SMarc Zyngier struct its_cmd_block *cmd, 754eb78192bSMarc Zyngier struct its_cmd_desc *desc) 755eb78192bSMarc Zyngier { 756eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 757eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 758eb78192bSMarc Zyngier 759eb78192bSMarc Zyngier its_fixup_cmd(cmd); 760eb78192bSMarc Zyngier 761205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 762eb78192bSMarc Zyngier } 763eb78192bSMarc Zyngier 76467047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 76567047f90SMarc Zyngier struct its_cmd_block *cmd, 766eb78192bSMarc Zyngier struct its_cmd_desc *desc) 767eb78192bSMarc Zyngier { 76864edfaa9SMarc Zyngier unsigned long vpt_addr, vconf_addr; 7695c9a882eSMarc Zyngier u64 target; 77064edfaa9SMarc Zyngier bool alloc; 771eb78192bSMarc Zyngier 772eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 773eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 774eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 77564edfaa9SMarc Zyngier 77664edfaa9SMarc Zyngier if (!desc->its_vmapp_cmd.valid) { 77764edfaa9SMarc Zyngier if (is_v4_1(its)) { 77864edfaa9SMarc Zyngier alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count); 77964edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 78064edfaa9SMarc Zyngier } 78164edfaa9SMarc Zyngier 78264edfaa9SMarc Zyngier goto out; 78364edfaa9SMarc Zyngier } 78464edfaa9SMarc Zyngier 78564edfaa9SMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 78664edfaa9SMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 78764edfaa9SMarc Zyngier 7885c9a882eSMarc Zyngier its_encode_target(cmd, target); 789eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 790eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 791eb78192bSMarc Zyngier 79264edfaa9SMarc Zyngier if (!is_v4_1(its)) 79364edfaa9SMarc Zyngier goto out; 79464edfaa9SMarc Zyngier 79564edfaa9SMarc Zyngier vconf_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->its_vm->vprop_page)); 79664edfaa9SMarc Zyngier 79764edfaa9SMarc Zyngier alloc = !atomic_fetch_inc(&desc->its_vmapp_cmd.vpe->vmapp_count); 79864edfaa9SMarc Zyngier 79964edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 80064edfaa9SMarc Zyngier 801c21bc068SShenming Lu /* 802c21bc068SShenming Lu * GICv4.1 provides a way to get the VLPI state, which needs the vPE 803c21bc068SShenming Lu * to be unmapped first, and in this case, we may remap the vPE 804c21bc068SShenming Lu * back while the VPT is not empty. So we can't assume that the 805c21bc068SShenming Lu * VPT is empty on map. This is why we never advertise PTZ. 806c21bc068SShenming Lu */ 807c21bc068SShenming Lu its_encode_ptz(cmd, false); 80864edfaa9SMarc Zyngier its_encode_vconf_addr(cmd, vconf_addr); 80964edfaa9SMarc Zyngier its_encode_vmapp_default_db(cmd, desc->its_vmapp_cmd.vpe->vpe_db_lpi); 81064edfaa9SMarc Zyngier 81164edfaa9SMarc Zyngier out: 812eb78192bSMarc Zyngier its_fixup_cmd(cmd); 813eb78192bSMarc Zyngier 814205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 815eb78192bSMarc Zyngier } 816eb78192bSMarc Zyngier 81767047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 81867047f90SMarc Zyngier struct its_cmd_block *cmd, 819d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 820d011e4e6SMarc Zyngier { 821d011e4e6SMarc Zyngier u32 db; 822d011e4e6SMarc Zyngier 8233858d4dfSMarc Zyngier if (!is_v4_1(its) && desc->its_vmapti_cmd.db_enabled) 824d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 825d011e4e6SMarc Zyngier else 826d011e4e6SMarc Zyngier db = 1023; 827d011e4e6SMarc Zyngier 828d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 829d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 830d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 831d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 832d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 833d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 834d011e4e6SMarc Zyngier 835d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 836d011e4e6SMarc Zyngier 837205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 838d011e4e6SMarc Zyngier } 839d011e4e6SMarc Zyngier 84067047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 84167047f90SMarc Zyngier struct its_cmd_block *cmd, 842d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 843d011e4e6SMarc Zyngier { 844d011e4e6SMarc Zyngier u32 db; 845d011e4e6SMarc Zyngier 8463858d4dfSMarc Zyngier if (!is_v4_1(its) && desc->its_vmovi_cmd.db_enabled) 847d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 848d011e4e6SMarc Zyngier else 849d011e4e6SMarc Zyngier db = 1023; 850d011e4e6SMarc Zyngier 851d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 852d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 853d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 854d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 855d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 856d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 857d011e4e6SMarc Zyngier 858d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 859d011e4e6SMarc Zyngier 860205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 861d011e4e6SMarc Zyngier } 862d011e4e6SMarc Zyngier 86367047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 86467047f90SMarc Zyngier struct its_cmd_block *cmd, 8653171a47aSMarc Zyngier struct its_cmd_desc *desc) 8663171a47aSMarc Zyngier { 8675c9a882eSMarc Zyngier u64 target; 8685c9a882eSMarc Zyngier 8695c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 8703171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 8713171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 8723171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 8733171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 8745c9a882eSMarc Zyngier its_encode_target(cmd, target); 8753171a47aSMarc Zyngier 876dd3f050aSMarc Zyngier if (is_v4_1(its)) { 877dd3f050aSMarc Zyngier its_encode_db(cmd, true); 878dd3f050aSMarc Zyngier its_encode_vmovp_default_db(cmd, desc->its_vmovp_cmd.vpe->vpe_db_lpi); 879dd3f050aSMarc Zyngier } 880dd3f050aSMarc Zyngier 8813171a47aSMarc Zyngier its_fixup_cmd(cmd); 8823171a47aSMarc Zyngier 883205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 8843171a47aSMarc Zyngier } 8853171a47aSMarc Zyngier 88628614696SMarc Zyngier static struct its_vpe *its_build_vinv_cmd(struct its_node *its, 88728614696SMarc Zyngier struct its_cmd_block *cmd, 88828614696SMarc Zyngier struct its_cmd_desc *desc) 88928614696SMarc Zyngier { 89028614696SMarc Zyngier struct its_vlpi_map *map; 89128614696SMarc Zyngier 89228614696SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_inv_cmd.dev, 89328614696SMarc Zyngier desc->its_inv_cmd.event_id); 89428614696SMarc Zyngier 89528614696SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 89628614696SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 89728614696SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 89828614696SMarc Zyngier 89928614696SMarc Zyngier its_fixup_cmd(cmd); 90028614696SMarc Zyngier 90128614696SMarc Zyngier return valid_vpe(its, map->vpe); 90228614696SMarc Zyngier } 90328614696SMarc Zyngier 904ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vint_cmd(struct its_node *its, 905ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 906ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 907ed0e4aa9SMarc Zyngier { 908ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 909ed0e4aa9SMarc Zyngier 910ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_int_cmd.dev, 911ed0e4aa9SMarc Zyngier desc->its_int_cmd.event_id); 912ed0e4aa9SMarc Zyngier 913ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 914ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 915ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 916ed0e4aa9SMarc Zyngier 917ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 918ed0e4aa9SMarc Zyngier 919ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 920ed0e4aa9SMarc Zyngier } 921ed0e4aa9SMarc Zyngier 922ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vclear_cmd(struct its_node *its, 923ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 924ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 925ed0e4aa9SMarc Zyngier { 926ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 927ed0e4aa9SMarc Zyngier 928ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_clear_cmd.dev, 929ed0e4aa9SMarc Zyngier desc->its_clear_cmd.event_id); 930ed0e4aa9SMarc Zyngier 931ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 932ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 933ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 934ed0e4aa9SMarc Zyngier 935ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 936ed0e4aa9SMarc Zyngier 937ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 938ed0e4aa9SMarc Zyngier } 939ed0e4aa9SMarc Zyngier 940d97c97baSMarc Zyngier static struct its_vpe *its_build_invdb_cmd(struct its_node *its, 941d97c97baSMarc Zyngier struct its_cmd_block *cmd, 942d97c97baSMarc Zyngier struct its_cmd_desc *desc) 943d97c97baSMarc Zyngier { 944d97c97baSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 945d97c97baSMarc Zyngier return NULL; 946d97c97baSMarc Zyngier 947d97c97baSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVDB); 948d97c97baSMarc Zyngier its_encode_vpeid(cmd, desc->its_invdb_cmd.vpe->vpe_id); 949d97c97baSMarc Zyngier 950d97c97baSMarc Zyngier its_fixup_cmd(cmd); 951d97c97baSMarc Zyngier 952d97c97baSMarc Zyngier return valid_vpe(its, desc->its_invdb_cmd.vpe); 953d97c97baSMarc Zyngier } 954d97c97baSMarc Zyngier 955e252cf8aSMarc Zyngier static struct its_vpe *its_build_vsgi_cmd(struct its_node *its, 956e252cf8aSMarc Zyngier struct its_cmd_block *cmd, 957e252cf8aSMarc Zyngier struct its_cmd_desc *desc) 958e252cf8aSMarc Zyngier { 959e252cf8aSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 960e252cf8aSMarc Zyngier return NULL; 961e252cf8aSMarc Zyngier 962e252cf8aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VSGI); 963e252cf8aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vsgi_cmd.vpe->vpe_id); 964e252cf8aSMarc Zyngier its_encode_sgi_intid(cmd, desc->its_vsgi_cmd.sgi); 965e252cf8aSMarc Zyngier its_encode_sgi_priority(cmd, desc->its_vsgi_cmd.priority); 966e252cf8aSMarc Zyngier its_encode_sgi_group(cmd, desc->its_vsgi_cmd.group); 967e252cf8aSMarc Zyngier its_encode_sgi_clear(cmd, desc->its_vsgi_cmd.clear); 968e252cf8aSMarc Zyngier its_encode_sgi_enable(cmd, desc->its_vsgi_cmd.enable); 969e252cf8aSMarc Zyngier 970e252cf8aSMarc Zyngier its_fixup_cmd(cmd); 971e252cf8aSMarc Zyngier 972e252cf8aSMarc Zyngier return valid_vpe(its, desc->its_vsgi_cmd.vpe); 973e252cf8aSMarc Zyngier } 974e252cf8aSMarc Zyngier 975cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 976cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 977cc2d3216SMarc Zyngier { 978cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 979cc2d3216SMarc Zyngier } 980cc2d3216SMarc Zyngier 981cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 982cc2d3216SMarc Zyngier { 983cc2d3216SMarc Zyngier int widx; 984cc2d3216SMarc Zyngier int ridx; 985cc2d3216SMarc Zyngier 986cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 987cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 988cc2d3216SMarc Zyngier 989cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 990cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 991cc2d3216SMarc Zyngier return 1; 992cc2d3216SMarc Zyngier 993cc2d3216SMarc Zyngier return 0; 994cc2d3216SMarc Zyngier } 995cc2d3216SMarc Zyngier 996cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 997cc2d3216SMarc Zyngier { 998cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 999cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 1000cc2d3216SMarc Zyngier 1001cc2d3216SMarc Zyngier while (its_queue_full(its)) { 1002cc2d3216SMarc Zyngier count--; 1003cc2d3216SMarc Zyngier if (!count) { 1004cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 1005cc2d3216SMarc Zyngier return NULL; 1006cc2d3216SMarc Zyngier } 1007cc2d3216SMarc Zyngier cpu_relax(); 1008cc2d3216SMarc Zyngier udelay(1); 1009cc2d3216SMarc Zyngier } 1010cc2d3216SMarc Zyngier 1011cc2d3216SMarc Zyngier cmd = its->cmd_write++; 1012cc2d3216SMarc Zyngier 1013cc2d3216SMarc Zyngier /* Handle queue wrapping */ 1014cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 1015cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 1016cc2d3216SMarc Zyngier 101734d677a9SMarc Zyngier /* Clear command */ 101834d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 101934d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 102034d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 102134d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 102234d677a9SMarc Zyngier 1023cc2d3216SMarc Zyngier return cmd; 1024cc2d3216SMarc Zyngier } 1025cc2d3216SMarc Zyngier 1026cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 1027cc2d3216SMarc Zyngier { 1028cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 1029cc2d3216SMarc Zyngier 1030cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 1031cc2d3216SMarc Zyngier 1032cc2d3216SMarc Zyngier return its->cmd_write; 1033cc2d3216SMarc Zyngier } 1034cc2d3216SMarc Zyngier 1035cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 1036cc2d3216SMarc Zyngier { 1037cc2d3216SMarc Zyngier /* 1038cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 1039cc2d3216SMarc Zyngier * the ITS. 1040cc2d3216SMarc Zyngier */ 1041cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 1042328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 1043cc2d3216SMarc Zyngier else 1044cc2d3216SMarc Zyngier dsb(ishst); 1045cc2d3216SMarc Zyngier } 1046cc2d3216SMarc Zyngier 1047a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 1048a050fa54SHeyi Guo u64 prev_idx, 1049cc2d3216SMarc Zyngier struct its_cmd_block *to) 1050cc2d3216SMarc Zyngier { 1051a050fa54SHeyi Guo u64 rd_idx, to_idx, linear_idx; 1052cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 1053cc2d3216SMarc Zyngier 1054a050fa54SHeyi Guo /* Linearize to_idx if the command set has wrapped around */ 1055cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 1056a050fa54SHeyi Guo if (to_idx < prev_idx) 1057a050fa54SHeyi Guo to_idx += ITS_CMD_QUEUE_SZ; 1058a050fa54SHeyi Guo 1059a050fa54SHeyi Guo linear_idx = prev_idx; 1060cc2d3216SMarc Zyngier 1061cc2d3216SMarc Zyngier while (1) { 1062a050fa54SHeyi Guo s64 delta; 1063a050fa54SHeyi Guo 1064cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 10659bdd8b1cSMarc Zyngier 1066a050fa54SHeyi Guo /* 1067a050fa54SHeyi Guo * Compute the read pointer progress, taking the 1068a050fa54SHeyi Guo * potential wrap-around into account. 1069a050fa54SHeyi Guo */ 1070a050fa54SHeyi Guo delta = rd_idx - prev_idx; 1071a050fa54SHeyi Guo if (rd_idx < prev_idx) 1072a050fa54SHeyi Guo delta += ITS_CMD_QUEUE_SZ; 10739bdd8b1cSMarc Zyngier 1074a050fa54SHeyi Guo linear_idx += delta; 1075a050fa54SHeyi Guo if (linear_idx >= to_idx) 1076cc2d3216SMarc Zyngier break; 1077cc2d3216SMarc Zyngier 1078cc2d3216SMarc Zyngier count--; 1079cc2d3216SMarc Zyngier if (!count) { 1080a050fa54SHeyi Guo pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", 1081a050fa54SHeyi Guo to_idx, linear_idx); 1082a19b462fSMarc Zyngier return -1; 1083cc2d3216SMarc Zyngier } 1084a050fa54SHeyi Guo prev_idx = rd_idx; 1085cc2d3216SMarc Zyngier cpu_relax(); 1086cc2d3216SMarc Zyngier udelay(1); 1087cc2d3216SMarc Zyngier } 1088a19b462fSMarc Zyngier 1089a19b462fSMarc Zyngier return 0; 1090cc2d3216SMarc Zyngier } 1091cc2d3216SMarc Zyngier 1092e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 1093e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 1094e4f9094bSMarc Zyngier void name(struct its_node *its, \ 1095e4f9094bSMarc Zyngier buildtype builder, \ 1096e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 1097e4f9094bSMarc Zyngier { \ 1098e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 1099e4f9094bSMarc Zyngier synctype *sync_obj; \ 1100e4f9094bSMarc Zyngier unsigned long flags; \ 1101a050fa54SHeyi Guo u64 rd_idx; \ 1102e4f9094bSMarc Zyngier \ 1103e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 1104e4f9094bSMarc Zyngier \ 1105e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 1106e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 1107e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1108e4f9094bSMarc Zyngier return; \ 1109e4f9094bSMarc Zyngier } \ 111067047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 1111e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 1112e4f9094bSMarc Zyngier \ 1113e4f9094bSMarc Zyngier if (sync_obj) { \ 1114e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 1115e4f9094bSMarc Zyngier if (!sync_cmd) \ 1116e4f9094bSMarc Zyngier goto post; \ 1117e4f9094bSMarc Zyngier \ 111867047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 1119e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 1120e4f9094bSMarc Zyngier } \ 1121e4f9094bSMarc Zyngier \ 1122e4f9094bSMarc Zyngier post: \ 1123a050fa54SHeyi Guo rd_idx = readl_relaxed(its->base + GITS_CREADR); \ 1124e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 1125e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1126e4f9094bSMarc Zyngier \ 1127a050fa54SHeyi Guo if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \ 1128a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 1129e4f9094bSMarc Zyngier } 1130e4f9094bSMarc Zyngier 113167047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 113267047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1133e4f9094bSMarc Zyngier struct its_collection *sync_col) 1134cc2d3216SMarc Zyngier { 1135cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 1136cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 1137e4f9094bSMarc Zyngier 1138cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 1139cc2d3216SMarc Zyngier } 1140cc2d3216SMarc Zyngier 1141e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 1142e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 1143cc2d3216SMarc Zyngier 114467047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 114567047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1146d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 1147d011e4e6SMarc Zyngier { 1148d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 1149d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 1150d011e4e6SMarc Zyngier 1151d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 1152d011e4e6SMarc Zyngier } 1153d011e4e6SMarc Zyngier 1154d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 1155d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 1156d011e4e6SMarc Zyngier 11578d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 11588d85dcedSMarc Zyngier { 11598d85dcedSMarc Zyngier struct its_cmd_desc desc; 11608d85dcedSMarc Zyngier 11618d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 11628d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 11638d85dcedSMarc Zyngier 11648d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 11658d85dcedSMarc Zyngier } 11668d85dcedSMarc Zyngier 11678d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 11688d85dcedSMarc Zyngier { 11698d85dcedSMarc Zyngier struct its_cmd_desc desc; 11708d85dcedSMarc Zyngier 11718d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 11728d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 11738d85dcedSMarc Zyngier 11748d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 1175cc2d3216SMarc Zyngier } 1176cc2d3216SMarc Zyngier 1177cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 1178cc2d3216SMarc Zyngier { 1179cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1180cc2d3216SMarc Zyngier 1181cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 1182cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 1183cc2d3216SMarc Zyngier 1184cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 1185cc2d3216SMarc Zyngier } 1186cc2d3216SMarc Zyngier 1187cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 1188cc2d3216SMarc Zyngier { 1189cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1190cc2d3216SMarc Zyngier 1191cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 1192cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 1193cc2d3216SMarc Zyngier 1194cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 1195cc2d3216SMarc Zyngier } 1196cc2d3216SMarc Zyngier 1197cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 1198cc2d3216SMarc Zyngier int valid) 1199cc2d3216SMarc Zyngier { 1200cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1201cc2d3216SMarc Zyngier 1202cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 1203cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 1204cc2d3216SMarc Zyngier 1205cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 1206cc2d3216SMarc Zyngier } 1207cc2d3216SMarc Zyngier 12086a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 1209cc2d3216SMarc Zyngier { 1210cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1211cc2d3216SMarc Zyngier 12126a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 12136a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 12146a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 1215cc2d3216SMarc Zyngier 12166a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 1217cc2d3216SMarc Zyngier } 1218cc2d3216SMarc Zyngier 1219cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 1220cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 1221cc2d3216SMarc Zyngier { 1222cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1223cc2d3216SMarc Zyngier 1224cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 1225cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 1226591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 1227cc2d3216SMarc Zyngier 1228cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 1229cc2d3216SMarc Zyngier } 1230cc2d3216SMarc Zyngier 1231cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 1232cc2d3216SMarc Zyngier { 1233cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1234cc2d3216SMarc Zyngier 1235cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 1236cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 1237cc2d3216SMarc Zyngier 1238cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 1239cc2d3216SMarc Zyngier } 1240cc2d3216SMarc Zyngier 1241cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 1242cc2d3216SMarc Zyngier { 1243cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1244cc2d3216SMarc Zyngier 1245cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 1246cc2d3216SMarc Zyngier 1247cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 1248cc2d3216SMarc Zyngier } 1249c48ed51cSMarc Zyngier 1250d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 1251d011e4e6SMarc Zyngier { 1252c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1253d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1254d011e4e6SMarc Zyngier 1255d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 1256d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 1257d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 1258d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 1259d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 1260d011e4e6SMarc Zyngier 1261d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 1262d011e4e6SMarc Zyngier } 1263d011e4e6SMarc Zyngier 1264d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 1265d011e4e6SMarc Zyngier { 1266c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1267d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1268d011e4e6SMarc Zyngier 1269d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 1270d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 1271d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 1272d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 1273d011e4e6SMarc Zyngier 1274d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 1275d011e4e6SMarc Zyngier } 1276d011e4e6SMarc Zyngier 127775fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 127875fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 1279eb78192bSMarc Zyngier { 1280eb78192bSMarc Zyngier struct its_cmd_desc desc; 1281eb78192bSMarc Zyngier 1282eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 1283eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 1284eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 128575fd951bSMarc Zyngier 1286eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 1287eb78192bSMarc Zyngier } 1288eb78192bSMarc Zyngier 12893171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 12903171a47aSMarc Zyngier { 129184243125SZenghui Yu struct its_cmd_desc desc = {}; 12923171a47aSMarc Zyngier struct its_node *its; 12933171a47aSMarc Zyngier unsigned long flags; 12943171a47aSMarc Zyngier int col_id = vpe->col_idx; 12953171a47aSMarc Zyngier 12963171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 12973171a47aSMarc Zyngier 12983171a47aSMarc Zyngier if (!its_list_map) { 12993171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 13003171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 13013171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 13023171a47aSMarc Zyngier return; 13033171a47aSMarc Zyngier } 13043171a47aSMarc Zyngier 13053171a47aSMarc Zyngier /* 13063171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 13073171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 13083171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 13093171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 13103171a47aSMarc Zyngier * 13113171a47aSMarc Zyngier * Wall <-- Head. 13123171a47aSMarc Zyngier */ 13133171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 13143171a47aSMarc Zyngier 13153171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 131684243125SZenghui Yu desc.its_vmovp_cmd.its_list = get_its_list(vpe->its_vm); 13173171a47aSMarc Zyngier 13183171a47aSMarc Zyngier /* Emit VMOVPs */ 13193171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 13200dd57fedSMarc Zyngier if (!is_v4(its)) 13213171a47aSMarc Zyngier continue; 13223171a47aSMarc Zyngier 1323009384b3SMarc Zyngier if (!require_its_list_vmovp(vpe->its_vm, its)) 13242247e1bfSMarc Zyngier continue; 13252247e1bfSMarc Zyngier 13263171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 13273171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 13283171a47aSMarc Zyngier } 13293171a47aSMarc Zyngier 13303171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 13313171a47aSMarc Zyngier } 13323171a47aSMarc Zyngier 133340619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1334eb78192bSMarc Zyngier { 1335eb78192bSMarc Zyngier struct its_cmd_desc desc; 1336eb78192bSMarc Zyngier 1337eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1338eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1339eb78192bSMarc Zyngier } 1340eb78192bSMarc Zyngier 134128614696SMarc Zyngier static void its_send_vinv(struct its_device *dev, u32 event_id) 134228614696SMarc Zyngier { 134328614696SMarc Zyngier struct its_cmd_desc desc; 134428614696SMarc Zyngier 134528614696SMarc Zyngier /* 134628614696SMarc Zyngier * There is no real VINV command. This is just a normal INV, 134728614696SMarc Zyngier * with a VSYNC instead of a SYNC. 134828614696SMarc Zyngier */ 134928614696SMarc Zyngier desc.its_inv_cmd.dev = dev; 135028614696SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 135128614696SMarc Zyngier 135228614696SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); 135328614696SMarc Zyngier } 135428614696SMarc Zyngier 1355ed0e4aa9SMarc Zyngier static void its_send_vint(struct its_device *dev, u32 event_id) 1356ed0e4aa9SMarc Zyngier { 1357ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1358ed0e4aa9SMarc Zyngier 1359ed0e4aa9SMarc Zyngier /* 1360ed0e4aa9SMarc Zyngier * There is no real VINT command. This is just a normal INT, 1361ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1362ed0e4aa9SMarc Zyngier */ 1363ed0e4aa9SMarc Zyngier desc.its_int_cmd.dev = dev; 1364ed0e4aa9SMarc Zyngier desc.its_int_cmd.event_id = event_id; 1365ed0e4aa9SMarc Zyngier 1366ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); 1367ed0e4aa9SMarc Zyngier } 1368ed0e4aa9SMarc Zyngier 1369ed0e4aa9SMarc Zyngier static void its_send_vclear(struct its_device *dev, u32 event_id) 1370ed0e4aa9SMarc Zyngier { 1371ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1372ed0e4aa9SMarc Zyngier 1373ed0e4aa9SMarc Zyngier /* 1374ed0e4aa9SMarc Zyngier * There is no real VCLEAR command. This is just a normal CLEAR, 1375ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1376ed0e4aa9SMarc Zyngier */ 1377ed0e4aa9SMarc Zyngier desc.its_clear_cmd.dev = dev; 1378ed0e4aa9SMarc Zyngier desc.its_clear_cmd.event_id = event_id; 1379ed0e4aa9SMarc Zyngier 1380ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); 1381ed0e4aa9SMarc Zyngier } 1382ed0e4aa9SMarc Zyngier 1383d97c97baSMarc Zyngier static void its_send_invdb(struct its_node *its, struct its_vpe *vpe) 1384d97c97baSMarc Zyngier { 1385d97c97baSMarc Zyngier struct its_cmd_desc desc; 1386d97c97baSMarc Zyngier 1387d97c97baSMarc Zyngier desc.its_invdb_cmd.vpe = vpe; 1388d97c97baSMarc Zyngier its_send_single_vcommand(its, its_build_invdb_cmd, &desc); 1389d97c97baSMarc Zyngier } 1390d97c97baSMarc Zyngier 1391c48ed51cSMarc Zyngier /* 1392c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1393c48ed51cSMarc Zyngier */ 1394015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1395c48ed51cSMarc Zyngier { 1396c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1397015ec038SMarc Zyngier irq_hw_number_t hwirq; 1398e1a2e201SMarc Zyngier void *va; 1399adcdb94eSMarc Zyngier u8 *cfg; 1400c48ed51cSMarc Zyngier 1401c1d4d5cdSMarc Zyngier if (map) { 1402c1d4d5cdSMarc Zyngier va = page_address(map->vm->vprop_page); 1403d4d7b4adSMarc Zyngier hwirq = map->vintid; 1404d4d7b4adSMarc Zyngier 1405d4d7b4adSMarc Zyngier /* Remember the updated property */ 1406d4d7b4adSMarc Zyngier map->properties &= ~clr; 1407d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1408015ec038SMarc Zyngier } else { 1409e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1410015ec038SMarc Zyngier hwirq = d->hwirq; 1411015ec038SMarc Zyngier } 1412adcdb94eSMarc Zyngier 1413e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1414adcdb94eSMarc Zyngier *cfg &= ~clr; 1415015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1416c48ed51cSMarc Zyngier 1417c48ed51cSMarc Zyngier /* 1418c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1419c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1420c48ed51cSMarc Zyngier * Humpf... 1421c48ed51cSMarc Zyngier */ 1422c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1423328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1424c48ed51cSMarc Zyngier else 1425c48ed51cSMarc Zyngier dsb(ishst); 1426015ec038SMarc Zyngier } 1427015ec038SMarc Zyngier 14282f4f064bSMarc Zyngier static void wait_for_syncr(void __iomem *rdbase) 14292f4f064bSMarc Zyngier { 143004d80dbeSHeyi Guo while (readl_relaxed(rdbase + GICR_SYNCR) & 1) 14312f4f064bSMarc Zyngier cpu_relax(); 14322f4f064bSMarc Zyngier } 14332f4f064bSMarc Zyngier 1434425c09beSMarc Zyngier static void direct_lpi_inv(struct irq_data *d) 1435425c09beSMarc Zyngier { 1436f4a81f5aSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1437425c09beSMarc Zyngier void __iomem *rdbase; 1438f3a05921SMarc Zyngier unsigned long flags; 1439f4a81f5aSMarc Zyngier u64 val; 1440f3a05921SMarc Zyngier int cpu; 1441f4a81f5aSMarc Zyngier 1442f4a81f5aSMarc Zyngier if (map) { 1443f4a81f5aSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1444f4a81f5aSMarc Zyngier 1445f4a81f5aSMarc Zyngier WARN_ON(!is_v4_1(its_dev->its)); 1446f4a81f5aSMarc Zyngier 1447f4a81f5aSMarc Zyngier val = GICR_INVLPIR_V; 1448f4a81f5aSMarc Zyngier val |= FIELD_PREP(GICR_INVLPIR_VPEID, map->vpe->vpe_id); 1449f4a81f5aSMarc Zyngier val |= FIELD_PREP(GICR_INVLPIR_INTID, map->vintid); 1450f4a81f5aSMarc Zyngier } else { 1451f4a81f5aSMarc Zyngier val = d->hwirq; 1452f4a81f5aSMarc Zyngier } 1453425c09beSMarc Zyngier 1454425c09beSMarc Zyngier /* Target the redistributor this LPI is currently routed to */ 1455f3a05921SMarc Zyngier cpu = irq_to_cpuid_lock(d, &flags); 14569058a4e9SMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 1457f3a05921SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; 1458f4a81f5aSMarc Zyngier gic_write_lpir(val, rdbase + GICR_INVLPIR); 1459425c09beSMarc Zyngier 1460425c09beSMarc Zyngier wait_for_syncr(rdbase); 14619058a4e9SMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 1462f3a05921SMarc Zyngier irq_to_cpuid_unlock(d, flags); 1463425c09beSMarc Zyngier } 1464425c09beSMarc Zyngier 1465015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1466015ec038SMarc Zyngier { 1467015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1468015ec038SMarc Zyngier 1469015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1470f4a81f5aSMarc Zyngier if (gic_rdists->has_direct_lpi && 1471f4a81f5aSMarc Zyngier (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) 1472425c09beSMarc Zyngier direct_lpi_inv(d); 147328614696SMarc Zyngier else if (!irqd_is_forwarded_to_vcpu(d)) 1474adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 147528614696SMarc Zyngier else 147628614696SMarc Zyngier its_send_vinv(its_dev, its_get_event_id(d)); 1477c48ed51cSMarc Zyngier } 1478c48ed51cSMarc Zyngier 1479015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1480015ec038SMarc Zyngier { 1481015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1482015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1483c1d4d5cdSMarc Zyngier struct its_vlpi_map *map; 1484015ec038SMarc Zyngier 14853858d4dfSMarc Zyngier /* 14863858d4dfSMarc Zyngier * GICv4.1 does away with the per-LPI nonsense, nothing to do 14873858d4dfSMarc Zyngier * here. 14883858d4dfSMarc Zyngier */ 14893858d4dfSMarc Zyngier if (is_v4_1(its_dev->its)) 14903858d4dfSMarc Zyngier return; 14913858d4dfSMarc Zyngier 1492c1d4d5cdSMarc Zyngier map = dev_event_to_vlpi_map(its_dev, event); 1493c1d4d5cdSMarc Zyngier 1494c1d4d5cdSMarc Zyngier if (map->db_enabled == enable) 1495015ec038SMarc Zyngier return; 1496015ec038SMarc Zyngier 1497c1d4d5cdSMarc Zyngier map->db_enabled = enable; 1498015ec038SMarc Zyngier 1499015ec038SMarc Zyngier /* 1500015ec038SMarc Zyngier * More fun with the architecture: 1501015ec038SMarc Zyngier * 1502015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1503015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1504a359f757SIngo Molnar * would be issuing a mapping for an /existing/ DevID+EventID 1505015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1506015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1507015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1508015ec038SMarc Zyngier */ 1509015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1510c48ed51cSMarc Zyngier } 1511c48ed51cSMarc Zyngier 1512c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1513c48ed51cSMarc Zyngier { 1514015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1515015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1516015ec038SMarc Zyngier 1517adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1518c48ed51cSMarc Zyngier } 1519c48ed51cSMarc Zyngier 1520c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1521c48ed51cSMarc Zyngier { 1522015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1523015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1524015ec038SMarc Zyngier 1525adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1526c48ed51cSMarc Zyngier } 1527c48ed51cSMarc Zyngier 15282f13ff1dSMarc Zyngier static __maybe_unused u32 its_read_lpi_count(struct irq_data *d, int cpu) 15292f13ff1dSMarc Zyngier { 15302f13ff1dSMarc Zyngier if (irqd_affinity_is_managed(d)) 15312f13ff1dSMarc Zyngier return atomic_read(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); 15322f13ff1dSMarc Zyngier 15332f13ff1dSMarc Zyngier return atomic_read(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); 15342f13ff1dSMarc Zyngier } 15352f13ff1dSMarc Zyngier 15362f13ff1dSMarc Zyngier static void its_inc_lpi_count(struct irq_data *d, int cpu) 15372f13ff1dSMarc Zyngier { 15382f13ff1dSMarc Zyngier if (irqd_affinity_is_managed(d)) 15392f13ff1dSMarc Zyngier atomic_inc(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); 15402f13ff1dSMarc Zyngier else 15412f13ff1dSMarc Zyngier atomic_inc(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); 15422f13ff1dSMarc Zyngier } 15432f13ff1dSMarc Zyngier 15442f13ff1dSMarc Zyngier static void its_dec_lpi_count(struct irq_data *d, int cpu) 15452f13ff1dSMarc Zyngier { 15462f13ff1dSMarc Zyngier if (irqd_affinity_is_managed(d)) 15472f13ff1dSMarc Zyngier atomic_dec(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); 15482f13ff1dSMarc Zyngier else 15492f13ff1dSMarc Zyngier atomic_dec(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); 15502f13ff1dSMarc Zyngier } 15512f13ff1dSMarc Zyngier 1552c5d6082dSMarc Zyngier static unsigned int cpumask_pick_least_loaded(struct irq_data *d, 1553c5d6082dSMarc Zyngier const struct cpumask *cpu_mask) 1554c5d6082dSMarc Zyngier { 1555c5d6082dSMarc Zyngier unsigned int cpu = nr_cpu_ids, tmp; 1556c5d6082dSMarc Zyngier int count = S32_MAX; 1557c5d6082dSMarc Zyngier 1558c5d6082dSMarc Zyngier for_each_cpu(tmp, cpu_mask) { 1559c5d6082dSMarc Zyngier int this_count = its_read_lpi_count(d, tmp); 1560c5d6082dSMarc Zyngier if (this_count < count) { 1561c5d6082dSMarc Zyngier cpu = tmp; 1562c5d6082dSMarc Zyngier count = this_count; 1563c5d6082dSMarc Zyngier } 1564c5d6082dSMarc Zyngier } 1565c5d6082dSMarc Zyngier 1566c5d6082dSMarc Zyngier return cpu; 1567c5d6082dSMarc Zyngier } 1568c5d6082dSMarc Zyngier 1569c5d6082dSMarc Zyngier /* 1570c5d6082dSMarc Zyngier * As suggested by Thomas Gleixner in: 1571c5d6082dSMarc Zyngier * https://lore.kernel.org/r/87h80q2aoc.fsf@nanos.tec.linutronix.de 1572c5d6082dSMarc Zyngier */ 1573c5d6082dSMarc Zyngier static int its_select_cpu(struct irq_data *d, 1574c5d6082dSMarc Zyngier const struct cpumask *aff_mask) 1575c5d6082dSMarc Zyngier { 1576c5d6082dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1577c5d6082dSMarc Zyngier cpumask_var_t tmpmask; 1578c5d6082dSMarc Zyngier int cpu, node; 1579c5d6082dSMarc Zyngier 1580c5d6082dSMarc Zyngier if (!alloc_cpumask_var(&tmpmask, GFP_ATOMIC)) 1581c5d6082dSMarc Zyngier return -ENOMEM; 1582c5d6082dSMarc Zyngier 1583c5d6082dSMarc Zyngier node = its_dev->its->numa_node; 1584c5d6082dSMarc Zyngier 1585c5d6082dSMarc Zyngier if (!irqd_affinity_is_managed(d)) { 1586c5d6082dSMarc Zyngier /* First try the NUMA node */ 1587c5d6082dSMarc Zyngier if (node != NUMA_NO_NODE) { 1588c5d6082dSMarc Zyngier /* 1589c5d6082dSMarc Zyngier * Try the intersection of the affinity mask and the 1590c5d6082dSMarc Zyngier * node mask (and the online mask, just to be safe). 1591c5d6082dSMarc Zyngier */ 1592c5d6082dSMarc Zyngier cpumask_and(tmpmask, cpumask_of_node(node), aff_mask); 1593c5d6082dSMarc Zyngier cpumask_and(tmpmask, tmpmask, cpu_online_mask); 1594c5d6082dSMarc Zyngier 1595c5d6082dSMarc Zyngier /* 1596c5d6082dSMarc Zyngier * Ideally, we would check if the mask is empty, and 1597c5d6082dSMarc Zyngier * try again on the full node here. 1598c5d6082dSMarc Zyngier * 1599c5d6082dSMarc Zyngier * But it turns out that the way ACPI describes the 1600c5d6082dSMarc Zyngier * affinity for ITSs only deals about memory, and 1601c5d6082dSMarc Zyngier * not target CPUs, so it cannot describe a single 1602c5d6082dSMarc Zyngier * ITS placed next to two NUMA nodes. 1603c5d6082dSMarc Zyngier * 1604c5d6082dSMarc Zyngier * Instead, just fallback on the online mask. This 1605c5d6082dSMarc Zyngier * diverges from Thomas' suggestion above. 1606c5d6082dSMarc Zyngier */ 1607c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, tmpmask); 1608c5d6082dSMarc Zyngier if (cpu < nr_cpu_ids) 1609c5d6082dSMarc Zyngier goto out; 1610c5d6082dSMarc Zyngier 1611c5d6082dSMarc Zyngier /* If we can't cross sockets, give up */ 1612c5d6082dSMarc Zyngier if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144)) 1613c5d6082dSMarc Zyngier goto out; 1614c5d6082dSMarc Zyngier 1615c5d6082dSMarc Zyngier /* If the above failed, expand the search */ 1616c5d6082dSMarc Zyngier } 1617c5d6082dSMarc Zyngier 1618c5d6082dSMarc Zyngier /* Try the intersection of the affinity and online masks */ 1619c5d6082dSMarc Zyngier cpumask_and(tmpmask, aff_mask, cpu_online_mask); 1620c5d6082dSMarc Zyngier 1621c5d6082dSMarc Zyngier /* If that doesn't fly, the online mask is the last resort */ 1622c5d6082dSMarc Zyngier if (cpumask_empty(tmpmask)) 1623c5d6082dSMarc Zyngier cpumask_copy(tmpmask, cpu_online_mask); 1624c5d6082dSMarc Zyngier 1625c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, tmpmask); 1626c5d6082dSMarc Zyngier } else { 16273f893a59SMarc Zyngier cpumask_copy(tmpmask, aff_mask); 1628c5d6082dSMarc Zyngier 1629c5d6082dSMarc Zyngier /* If we cannot cross sockets, limit the search to that node */ 1630c5d6082dSMarc Zyngier if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) && 1631c5d6082dSMarc Zyngier node != NUMA_NO_NODE) 1632c5d6082dSMarc Zyngier cpumask_and(tmpmask, tmpmask, cpumask_of_node(node)); 1633c5d6082dSMarc Zyngier 1634c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, tmpmask); 1635c5d6082dSMarc Zyngier } 1636c5d6082dSMarc Zyngier out: 1637c5d6082dSMarc Zyngier free_cpumask_var(tmpmask); 1638c5d6082dSMarc Zyngier 1639c5d6082dSMarc Zyngier pr_debug("IRQ%d -> %*pbl CPU%d\n", d->irq, cpumask_pr_args(aff_mask), cpu); 1640c5d6082dSMarc Zyngier return cpu; 1641c5d6082dSMarc Zyngier } 1642c5d6082dSMarc Zyngier 1643c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1644c48ed51cSMarc Zyngier bool force) 1645c48ed51cSMarc Zyngier { 1646c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1647c48ed51cSMarc Zyngier struct its_collection *target_col; 1648c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1649c5d6082dSMarc Zyngier int cpu, prev_cpu; 1650c48ed51cSMarc Zyngier 1651015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1652015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1653015ec038SMarc Zyngier return -EINVAL; 1654015ec038SMarc Zyngier 16552f13ff1dSMarc Zyngier prev_cpu = its_dev->event_map.col_map[id]; 16562f13ff1dSMarc Zyngier its_dec_lpi_count(d, prev_cpu); 16572f13ff1dSMarc Zyngier 1658c5d6082dSMarc Zyngier if (!force) 1659c5d6082dSMarc Zyngier cpu = its_select_cpu(d, mask_val); 1660c5d6082dSMarc Zyngier else 1661c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, mask_val); 1662fbf8f40eSGanapatrao Kulkarni 1663c5d6082dSMarc Zyngier if (cpu < 0 || cpu >= nr_cpu_ids) 16642f13ff1dSMarc Zyngier goto err; 1665c48ed51cSMarc Zyngier 16668b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 16672f13ff1dSMarc Zyngier if (cpu != prev_cpu) { 1668c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1669c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1670591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 16710d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 16728b8d94a7SMaJun } 1673c48ed51cSMarc Zyngier 16742f13ff1dSMarc Zyngier its_inc_lpi_count(d, cpu); 16752f13ff1dSMarc Zyngier 1676c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 16772f13ff1dSMarc Zyngier 16782f13ff1dSMarc Zyngier err: 16792f13ff1dSMarc Zyngier its_inc_lpi_count(d, prev_cpu); 16802f13ff1dSMarc Zyngier return -EINVAL; 1681c48ed51cSMarc Zyngier } 1682c48ed51cSMarc Zyngier 1683558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1684558b0165SArd Biesheuvel { 1685558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1686558b0165SArd Biesheuvel 1687558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1688558b0165SArd Biesheuvel } 1689558b0165SArd Biesheuvel 1690b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1691b48ac83dSMarc Zyngier { 1692b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1693b48ac83dSMarc Zyngier struct its_node *its; 1694b48ac83dSMarc Zyngier u64 addr; 1695b48ac83dSMarc Zyngier 1696b48ac83dSMarc Zyngier its = its_dev->its; 1697558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1698b48ac83dSMarc Zyngier 1699b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1700b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1701b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 170244bb7e24SRobin Murphy 170335ae7df2SJulien Grall iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); 1704b48ac83dSMarc Zyngier } 1705b48ac83dSMarc Zyngier 17068d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 17078d85dcedSMarc Zyngier enum irqchip_irq_state which, 17088d85dcedSMarc Zyngier bool state) 17098d85dcedSMarc Zyngier { 17108d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 17118d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 17128d85dcedSMarc Zyngier 17138d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 17148d85dcedSMarc Zyngier return -EINVAL; 17158d85dcedSMarc Zyngier 1716ed0e4aa9SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1717ed0e4aa9SMarc Zyngier if (state) 1718ed0e4aa9SMarc Zyngier its_send_vint(its_dev, event); 1719ed0e4aa9SMarc Zyngier else 1720ed0e4aa9SMarc Zyngier its_send_vclear(its_dev, event); 1721ed0e4aa9SMarc Zyngier } else { 17228d85dcedSMarc Zyngier if (state) 17238d85dcedSMarc Zyngier its_send_int(its_dev, event); 17248d85dcedSMarc Zyngier else 17258d85dcedSMarc Zyngier its_send_clear(its_dev, event); 1726ed0e4aa9SMarc Zyngier } 17278d85dcedSMarc Zyngier 17288d85dcedSMarc Zyngier return 0; 17298d85dcedSMarc Zyngier } 17308d85dcedSMarc Zyngier 17315f774f5eSMarc Zyngier static int its_irq_retrigger(struct irq_data *d) 17325f774f5eSMarc Zyngier { 17335f774f5eSMarc Zyngier return !its_irq_set_irqchip_state(d, IRQCHIP_STATE_PENDING, true); 17345f774f5eSMarc Zyngier } 17355f774f5eSMarc Zyngier 1736009384b3SMarc Zyngier /* 1737009384b3SMarc Zyngier * Two favourable cases: 1738009384b3SMarc Zyngier * 1739009384b3SMarc Zyngier * (a) Either we have a GICv4.1, and all vPEs have to be mapped at all times 1740009384b3SMarc Zyngier * for vSGI delivery 1741009384b3SMarc Zyngier * 1742009384b3SMarc Zyngier * (b) Or the ITSs do not use a list map, meaning that VMOVP is cheap enough 1743009384b3SMarc Zyngier * and we're better off mapping all VPEs always 1744009384b3SMarc Zyngier * 1745009384b3SMarc Zyngier * If neither (a) nor (b) is true, then we map vPEs on demand. 1746009384b3SMarc Zyngier * 1747009384b3SMarc Zyngier */ 1748009384b3SMarc Zyngier static bool gic_requires_eager_mapping(void) 1749009384b3SMarc Zyngier { 1750009384b3SMarc Zyngier if (!its_list_map || gic_rdists->has_rvpeid) 1751009384b3SMarc Zyngier return true; 1752009384b3SMarc Zyngier 1753009384b3SMarc Zyngier return false; 1754009384b3SMarc Zyngier } 1755009384b3SMarc Zyngier 17562247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 17572247e1bfSMarc Zyngier { 17582247e1bfSMarc Zyngier unsigned long flags; 17592247e1bfSMarc Zyngier 1760009384b3SMarc Zyngier if (gic_requires_eager_mapping()) 17612247e1bfSMarc Zyngier return; 17622247e1bfSMarc Zyngier 17632247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 17642247e1bfSMarc Zyngier 17652247e1bfSMarc Zyngier /* 17662247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 17672247e1bfSMarc Zyngier * them mapped now. 17682247e1bfSMarc Zyngier */ 17692247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 17702247e1bfSMarc Zyngier 17712247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 17722247e1bfSMarc Zyngier int i; 17732247e1bfSMarc Zyngier 17742247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 17752247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 177644c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 17772247e1bfSMarc Zyngier 17782247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 17792247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 17802247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 17812247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 178244c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 17832247e1bfSMarc Zyngier } 17842247e1bfSMarc Zyngier } 17852247e1bfSMarc Zyngier 17862247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 17872247e1bfSMarc Zyngier } 17882247e1bfSMarc Zyngier 17892247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 17902247e1bfSMarc Zyngier { 17912247e1bfSMarc Zyngier unsigned long flags; 17922247e1bfSMarc Zyngier 17932247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 1794009384b3SMarc Zyngier if (gic_requires_eager_mapping()) 17952247e1bfSMarc Zyngier return; 17962247e1bfSMarc Zyngier 17972247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 17982247e1bfSMarc Zyngier 17992247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 18002247e1bfSMarc Zyngier int i; 18012247e1bfSMarc Zyngier 18022247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 18032247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 18042247e1bfSMarc Zyngier } 18052247e1bfSMarc Zyngier 18062247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 18072247e1bfSMarc Zyngier } 18082247e1bfSMarc Zyngier 1809d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1810d011e4e6SMarc Zyngier { 1811d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1812d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1813d011e4e6SMarc Zyngier int ret = 0; 1814d011e4e6SMarc Zyngier 1815d011e4e6SMarc Zyngier if (!info->map) 1816d011e4e6SMarc Zyngier return -EINVAL; 1817d011e4e6SMarc Zyngier 181811635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1819d011e4e6SMarc Zyngier 1820d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1821d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1822d011e4e6SMarc Zyngier 18236396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 182411635fa2SMarc Zyngier GFP_ATOMIC); 1825d011e4e6SMarc Zyngier if (!maps) { 1826d011e4e6SMarc Zyngier ret = -ENOMEM; 1827d011e4e6SMarc Zyngier goto out; 1828d011e4e6SMarc Zyngier } 1829d011e4e6SMarc Zyngier 1830d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1831d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1832d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1833d011e4e6SMarc Zyngier ret = -EINVAL; 1834d011e4e6SMarc Zyngier goto out; 1835d011e4e6SMarc Zyngier } 1836d011e4e6SMarc Zyngier 1837d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1838d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1839d011e4e6SMarc Zyngier 1840d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1841d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1842d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1843d011e4e6SMarc Zyngier } else { 18442247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 18452247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 18462247e1bfSMarc Zyngier 1847d4d7b4adSMarc Zyngier /* 1848d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1849d4d7b4adSMarc Zyngier * start poking the virtual property table. 1850d4d7b4adSMarc Zyngier */ 1851d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1852d4d7b4adSMarc Zyngier 1853d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1854d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1855d4d7b4adSMarc Zyngier 1856d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1857d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1858d011e4e6SMarc Zyngier 1859d011e4e6SMarc Zyngier /* and install the virtual one */ 1860d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1861d011e4e6SMarc Zyngier 1862d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1863d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1864d011e4e6SMarc Zyngier } 1865d011e4e6SMarc Zyngier 1866d011e4e6SMarc Zyngier out: 186711635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1868d011e4e6SMarc Zyngier return ret; 1869d011e4e6SMarc Zyngier } 1870d011e4e6SMarc Zyngier 1871d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1872d011e4e6SMarc Zyngier { 1873d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1874046b5054SMarc Zyngier struct its_vlpi_map *map; 1875d011e4e6SMarc Zyngier int ret = 0; 1876d011e4e6SMarc Zyngier 187711635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1878d011e4e6SMarc Zyngier 1879046b5054SMarc Zyngier map = get_vlpi_map(d); 1880046b5054SMarc Zyngier 1881046b5054SMarc Zyngier if (!its_dev->event_map.vm || !map) { 1882d011e4e6SMarc Zyngier ret = -EINVAL; 1883d011e4e6SMarc Zyngier goto out; 1884d011e4e6SMarc Zyngier } 1885d011e4e6SMarc Zyngier 1886d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1887c1d4d5cdSMarc Zyngier *info->map = *map; 1888d011e4e6SMarc Zyngier 1889d011e4e6SMarc Zyngier out: 189011635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1891d011e4e6SMarc Zyngier return ret; 1892d011e4e6SMarc Zyngier } 1893d011e4e6SMarc Zyngier 1894d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1895d011e4e6SMarc Zyngier { 1896d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1897d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1898d011e4e6SMarc Zyngier int ret = 0; 1899d011e4e6SMarc Zyngier 190011635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1901d011e4e6SMarc Zyngier 1902d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1903d011e4e6SMarc Zyngier ret = -EINVAL; 1904d011e4e6SMarc Zyngier goto out; 1905d011e4e6SMarc Zyngier } 1906d011e4e6SMarc Zyngier 1907d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1908d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1909d011e4e6SMarc Zyngier 1910d011e4e6SMarc Zyngier /* and restore the physical one */ 1911d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1912d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1913d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1914d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1915d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1916d011e4e6SMarc Zyngier 19172247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 19182247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 19192247e1bfSMarc Zyngier 1920d011e4e6SMarc Zyngier /* 1921d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1922d011e4e6SMarc Zyngier * this was the last VLPI. 1923d011e4e6SMarc Zyngier */ 1924d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1925d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1926d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1927d011e4e6SMarc Zyngier } 1928d011e4e6SMarc Zyngier 1929d011e4e6SMarc Zyngier out: 193011635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1931d011e4e6SMarc Zyngier return ret; 1932d011e4e6SMarc Zyngier } 1933d011e4e6SMarc Zyngier 1934015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1935015ec038SMarc Zyngier { 1936015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1937015ec038SMarc Zyngier 1938015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1939015ec038SMarc Zyngier return -EINVAL; 1940015ec038SMarc Zyngier 1941015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1942015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1943015ec038SMarc Zyngier else 1944015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1945015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1946015ec038SMarc Zyngier 1947015ec038SMarc Zyngier return 0; 1948015ec038SMarc Zyngier } 1949015ec038SMarc Zyngier 1950c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1951c808eea8SMarc Zyngier { 1952c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1953c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1954c808eea8SMarc Zyngier 1955c808eea8SMarc Zyngier /* Need a v4 ITS */ 19560dd57fedSMarc Zyngier if (!is_v4(its_dev->its)) 1957c808eea8SMarc Zyngier return -EINVAL; 1958c808eea8SMarc Zyngier 1959d011e4e6SMarc Zyngier /* Unmap request? */ 1960d011e4e6SMarc Zyngier if (!info) 1961d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1962d011e4e6SMarc Zyngier 1963c808eea8SMarc Zyngier switch (info->cmd_type) { 1964c808eea8SMarc Zyngier case MAP_VLPI: 1965d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1966c808eea8SMarc Zyngier 1967c808eea8SMarc Zyngier case GET_VLPI: 1968d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1969c808eea8SMarc Zyngier 1970c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1971c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1972015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1973c808eea8SMarc Zyngier 1974c808eea8SMarc Zyngier default: 1975c808eea8SMarc Zyngier return -EINVAL; 1976c808eea8SMarc Zyngier } 1977c808eea8SMarc Zyngier } 1978c808eea8SMarc Zyngier 1979c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1980c48ed51cSMarc Zyngier .name = "ITS", 1981c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1982c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1983004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1984c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1985b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 19868d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 19875f774f5eSMarc Zyngier .irq_retrigger = its_irq_retrigger, 1988c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1989b48ac83dSMarc Zyngier }; 1990b48ac83dSMarc Zyngier 1991880cb3cdSMarc Zyngier 1992bf9529f8SMarc Zyngier /* 1993bf9529f8SMarc Zyngier * How we allocate LPIs: 1994bf9529f8SMarc Zyngier * 1995880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1996880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1997880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1998880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1999bf9529f8SMarc Zyngier * 2000880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 2001880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 2002880cb3cdSMarc Zyngier * already free block. 2003880cb3cdSMarc Zyngier * 2004880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 2005880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 2006880cb3cdSMarc Zyngier */ 20074cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 2008880cb3cdSMarc Zyngier 2009880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 2010880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 2011bf9529f8SMarc Zyngier 2012880cb3cdSMarc Zyngier struct lpi_range { 2013880cb3cdSMarc Zyngier struct list_head entry; 2014880cb3cdSMarc Zyngier u32 base_id; 2015880cb3cdSMarc Zyngier u32 span; 2016880cb3cdSMarc Zyngier }; 2017880cb3cdSMarc Zyngier 2018880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 2019bf9529f8SMarc Zyngier { 2020880cb3cdSMarc Zyngier struct lpi_range *range; 2021880cb3cdSMarc Zyngier 20221c73fac5SRasmus Villemoes range = kmalloc(sizeof(*range), GFP_KERNEL); 2023880cb3cdSMarc Zyngier if (range) { 2024880cb3cdSMarc Zyngier range->base_id = base; 2025880cb3cdSMarc Zyngier range->span = span; 2026bf9529f8SMarc Zyngier } 2027bf9529f8SMarc Zyngier 2028880cb3cdSMarc Zyngier return range; 2029880cb3cdSMarc Zyngier } 2030880cb3cdSMarc Zyngier 2031880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 2032880cb3cdSMarc Zyngier { 2033880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 2034880cb3cdSMarc Zyngier int err = -ENOSPC; 2035880cb3cdSMarc Zyngier 2036880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 2037880cb3cdSMarc Zyngier 2038880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 2039880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 2040880cb3cdSMarc Zyngier *base = range->base_id; 2041880cb3cdSMarc Zyngier range->base_id += nr_lpis; 2042880cb3cdSMarc Zyngier range->span -= nr_lpis; 2043880cb3cdSMarc Zyngier 2044880cb3cdSMarc Zyngier if (range->span == 0) { 2045880cb3cdSMarc Zyngier list_del(&range->entry); 2046880cb3cdSMarc Zyngier kfree(range); 2047880cb3cdSMarc Zyngier } 2048880cb3cdSMarc Zyngier 2049880cb3cdSMarc Zyngier err = 0; 2050880cb3cdSMarc Zyngier break; 2051880cb3cdSMarc Zyngier } 2052880cb3cdSMarc Zyngier } 2053880cb3cdSMarc Zyngier 2054880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 2055880cb3cdSMarc Zyngier 2056880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 2057880cb3cdSMarc Zyngier return err; 2058880cb3cdSMarc Zyngier } 2059880cb3cdSMarc Zyngier 206012eade12SRasmus Villemoes static void merge_lpi_ranges(struct lpi_range *a, struct lpi_range *b) 206112eade12SRasmus Villemoes { 206212eade12SRasmus Villemoes if (&a->entry == &lpi_range_list || &b->entry == &lpi_range_list) 206312eade12SRasmus Villemoes return; 206412eade12SRasmus Villemoes if (a->base_id + a->span != b->base_id) 206512eade12SRasmus Villemoes return; 206612eade12SRasmus Villemoes b->base_id = a->base_id; 206712eade12SRasmus Villemoes b->span += a->span; 206812eade12SRasmus Villemoes list_del(&a->entry); 206912eade12SRasmus Villemoes kfree(a); 207012eade12SRasmus Villemoes } 207112eade12SRasmus Villemoes 2072880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 2073880cb3cdSMarc Zyngier { 207412eade12SRasmus Villemoes struct lpi_range *new, *old; 2075880cb3cdSMarc Zyngier 2076880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 2077b31a3838SRasmus Villemoes if (!new) 2078b31a3838SRasmus Villemoes return -ENOMEM; 2079880cb3cdSMarc Zyngier 2080880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 2081880cb3cdSMarc Zyngier 208212eade12SRasmus Villemoes list_for_each_entry_reverse(old, &lpi_range_list, entry) { 208312eade12SRasmus Villemoes if (old->base_id < base) 208412eade12SRasmus Villemoes break; 2085880cb3cdSMarc Zyngier } 208612eade12SRasmus Villemoes /* 208712eade12SRasmus Villemoes * old is the last element with ->base_id smaller than base, 208812eade12SRasmus Villemoes * so new goes right after it. If there are no elements with 208912eade12SRasmus Villemoes * ->base_id smaller than base, &old->entry ends up pointing 209012eade12SRasmus Villemoes * at the head of the list, and inserting new it the start of 209112eade12SRasmus Villemoes * the list is the right thing to do in that case as well. 209212eade12SRasmus Villemoes */ 209312eade12SRasmus Villemoes list_add(&new->entry, &old->entry); 209412eade12SRasmus Villemoes /* 209512eade12SRasmus Villemoes * Now check if we can merge with the preceding and/or 209612eade12SRasmus Villemoes * following ranges. 209712eade12SRasmus Villemoes */ 209812eade12SRasmus Villemoes merge_lpi_ranges(old, new); 209912eade12SRasmus Villemoes merge_lpi_ranges(new, list_next_entry(new, entry)); 2100880cb3cdSMarc Zyngier 2101880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 2102b31a3838SRasmus Villemoes return 0; 2103bf9529f8SMarc Zyngier } 2104bf9529f8SMarc Zyngier 210504a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 2106bf9529f8SMarc Zyngier { 2107880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 210812b2905aSMarc Zyngier u32 numlpis; 2109880cb3cdSMarc Zyngier int err; 2110bf9529f8SMarc Zyngier 211112b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 211212b2905aSMarc Zyngier 211312b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 211412b2905aSMarc Zyngier lpis = numlpis; 211512b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 211612b2905aSMarc Zyngier lpis); 211712b2905aSMarc Zyngier } 211812b2905aSMarc Zyngier 2119880cb3cdSMarc Zyngier /* 2120880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 2121880cb3cdSMarc Zyngier * full range of LPIs. 2122880cb3cdSMarc Zyngier */ 2123880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 2124880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 2125880cb3cdSMarc Zyngier return err; 2126bf9529f8SMarc Zyngier } 2127bf9529f8SMarc Zyngier 212838dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 2129bf9529f8SMarc Zyngier { 2130bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 2131880cb3cdSMarc Zyngier int err = 0; 2132bf9529f8SMarc Zyngier 2133bf9529f8SMarc Zyngier do { 213438dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 2135880cb3cdSMarc Zyngier if (!err) 2136bf9529f8SMarc Zyngier break; 2137bf9529f8SMarc Zyngier 213838dd7c49SMarc Zyngier nr_irqs /= 2; 213938dd7c49SMarc Zyngier } while (nr_irqs > 0); 2140bf9529f8SMarc Zyngier 214145725e0fSMarc Zyngier if (!nr_irqs) 214245725e0fSMarc Zyngier err = -ENOSPC; 214345725e0fSMarc Zyngier 2144880cb3cdSMarc Zyngier if (err) 2145bf9529f8SMarc Zyngier goto out; 2146bf9529f8SMarc Zyngier 2147ff5fe886SAndy Shevchenko bitmap = bitmap_zalloc(nr_irqs, GFP_ATOMIC); 2148bf9529f8SMarc Zyngier if (!bitmap) 2149bf9529f8SMarc Zyngier goto out; 2150bf9529f8SMarc Zyngier 215138dd7c49SMarc Zyngier *nr_ids = nr_irqs; 2152bf9529f8SMarc Zyngier 2153bf9529f8SMarc Zyngier out: 2154c8415b94SMarc Zyngier if (!bitmap) 2155c8415b94SMarc Zyngier *base = *nr_ids = 0; 2156c8415b94SMarc Zyngier 2157bf9529f8SMarc Zyngier return bitmap; 2158bf9529f8SMarc Zyngier } 2159bf9529f8SMarc Zyngier 216038dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 2161bf9529f8SMarc Zyngier { 2162880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 2163ff5fe886SAndy Shevchenko bitmap_free(bitmap); 2164bf9529f8SMarc Zyngier } 21651ac19ca6SMarc Zyngier 2166053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 2167053be485SMarc Zyngier { 2168053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 2169053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 2170053be485SMarc Zyngier 2171053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 2172053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 2173053be485SMarc Zyngier } 2174053be485SMarc Zyngier 21750e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 21760e5ccf91SMarc Zyngier { 21770e5ccf91SMarc Zyngier struct page *prop_page; 21781ac19ca6SMarc Zyngier 21790e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 21800e5ccf91SMarc Zyngier if (!prop_page) 21810e5ccf91SMarc Zyngier return NULL; 21820e5ccf91SMarc Zyngier 2183053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 21840e5ccf91SMarc Zyngier 21850e5ccf91SMarc Zyngier return prop_page; 21860e5ccf91SMarc Zyngier } 21870e5ccf91SMarc Zyngier 21887d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 21897d75bbb4SMarc Zyngier { 21907d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 21917d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 21927d75bbb4SMarc Zyngier } 21931ac19ca6SMarc Zyngier 21945e2c9f9aSMarc Zyngier static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) 21955e2c9f9aSMarc Zyngier { 21965e2c9f9aSMarc Zyngier phys_addr_t start, end, addr_end; 21975e2c9f9aSMarc Zyngier u64 i; 21985e2c9f9aSMarc Zyngier 21995e2c9f9aSMarc Zyngier /* 22005e2c9f9aSMarc Zyngier * We don't bother checking for a kdump kernel as by 22015e2c9f9aSMarc Zyngier * construction, the LPI tables are out of this kernel's 22025e2c9f9aSMarc Zyngier * memory map. 22035e2c9f9aSMarc Zyngier */ 22045e2c9f9aSMarc Zyngier if (is_kdump_kernel()) 22055e2c9f9aSMarc Zyngier return true; 22065e2c9f9aSMarc Zyngier 22075e2c9f9aSMarc Zyngier addr_end = addr + size - 1; 22085e2c9f9aSMarc Zyngier 22099f3d5eaaSMike Rapoport for_each_reserved_mem_range(i, &start, &end) { 22105e2c9f9aSMarc Zyngier if (addr >= start && addr_end <= end) 22115e2c9f9aSMarc Zyngier return true; 22125e2c9f9aSMarc Zyngier } 22135e2c9f9aSMarc Zyngier 22145e2c9f9aSMarc Zyngier /* Not found, not a good sign... */ 22155e2c9f9aSMarc Zyngier pr_warn("GICv3: Expected reserved range [%pa:%pa], not found\n", 22165e2c9f9aSMarc Zyngier &addr, &addr_end); 22175e2c9f9aSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 22185e2c9f9aSMarc Zyngier return false; 22195e2c9f9aSMarc Zyngier } 22205e2c9f9aSMarc Zyngier 22213fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 22223fb68faeSMarc Zyngier { 22233fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 22243fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 22253fb68faeSMarc Zyngier 22263fb68faeSMarc Zyngier return 0; 22273fb68faeSMarc Zyngier } 22283fb68faeSMarc Zyngier 222911e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 22301ac19ca6SMarc Zyngier { 2231c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 2232c440a9d9SMarc Zyngier u64 val; 2233c440a9d9SMarc Zyngier 2234c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 2235c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 2236c440a9d9SMarc Zyngier 2237c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 2238c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 2239c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 2240c440a9d9SMarc Zyngier MEMREMAP_WB); 2241c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 2242c440a9d9SMarc Zyngier } else { 2243e1a2e201SMarc Zyngier struct page *page; 22441ac19ca6SMarc Zyngier 2245c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 2246c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 22474cb205c0SJia He ITS_MAX_LPI_NRBITS); 2248e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 2249e1a2e201SMarc Zyngier if (!page) { 22501ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 22511ac19ca6SMarc Zyngier return -ENOMEM; 22521ac19ca6SMarc Zyngier } 22531ac19ca6SMarc Zyngier 2254e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 2255e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 22563fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 22573fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 2258c440a9d9SMarc Zyngier } 2259e1a2e201SMarc Zyngier 2260e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 2261e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 22621ac19ca6SMarc Zyngier 22636c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 22641ac19ca6SMarc Zyngier } 22651ac19ca6SMarc Zyngier 22661ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 22671ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 22681ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 22694f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 22701ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 22711ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 22721ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 22731ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 22741ac19ca6SMarc Zyngier }; 22751ac19ca6SMarc Zyngier 22762d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 22772d81d425SShanker Donthineni { 22782d81d425SShanker Donthineni u32 idx = baser - its->tables; 22792d81d425SShanker Donthineni 22800968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 22812d81d425SShanker Donthineni } 22822d81d425SShanker Donthineni 22832d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 22842d81d425SShanker Donthineni u64 val) 22852d81d425SShanker Donthineni { 22862d81d425SShanker Donthineni u32 idx = baser - its->tables; 22872d81d425SShanker Donthineni 22880968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 22892d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 22902d81d425SShanker Donthineni } 22912d81d425SShanker Donthineni 22929347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 2293d5df9dc9SMarc Zyngier u64 cache, u64 shr, u32 order, bool indirect) 22949347359aSShanker Donthineni { 22959347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 22969347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 22979347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 229830ae9610SShanker Donthineni u64 baser_phys, tmp; 2299d5df9dc9SMarc Zyngier u32 alloc_pages, psz; 2300539d3782SShanker Donthineni struct page *page; 23019347359aSShanker Donthineni void *base; 23029347359aSShanker Donthineni 2303d5df9dc9SMarc Zyngier psz = baser->psz; 23049347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 23059347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 23069347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 23079347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 23089347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 23099347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 23109347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 23119347359aSShanker Donthineni } 23129347359aSShanker Donthineni 2313539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); 2314539d3782SShanker Donthineni if (!page) 23159347359aSShanker Donthineni return -ENOMEM; 23169347359aSShanker Donthineni 2317539d3782SShanker Donthineni base = (void *)page_address(page); 231830ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 231930ae9610SShanker Donthineni 232030ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 232130ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 232230ae9610SShanker Donthineni 232330ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 232430ae9610SShanker Donthineni if (psz != SZ_64K) { 232530ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 232630ae9610SShanker Donthineni free_pages((unsigned long)base, order); 232730ae9610SShanker Donthineni return -ENXIO; 232830ae9610SShanker Donthineni } 232930ae9610SShanker Donthineni 233030ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 233130ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 233230ae9610SShanker Donthineni } 233330ae9610SShanker Donthineni 23349347359aSShanker Donthineni retry_baser: 233530ae9610SShanker Donthineni val = (baser_phys | 23369347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 23379347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 23389347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 23399347359aSShanker Donthineni cache | 23409347359aSShanker Donthineni shr | 23419347359aSShanker Donthineni GITS_BASER_VALID); 23429347359aSShanker Donthineni 23433faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 23443faf24eaSShanker Donthineni 23459347359aSShanker Donthineni switch (psz) { 23469347359aSShanker Donthineni case SZ_4K: 23479347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 23489347359aSShanker Donthineni break; 23499347359aSShanker Donthineni case SZ_16K: 23509347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 23519347359aSShanker Donthineni break; 23529347359aSShanker Donthineni case SZ_64K: 23539347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 23549347359aSShanker Donthineni break; 23559347359aSShanker Donthineni } 23569347359aSShanker Donthineni 23579347359aSShanker Donthineni its_write_baser(its, baser, val); 23589347359aSShanker Donthineni tmp = baser->val; 23599347359aSShanker Donthineni 23609347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 23619347359aSShanker Donthineni /* 23629347359aSShanker Donthineni * Shareability didn't stick. Just use 23639347359aSShanker Donthineni * whatever the read reported, which is likely 23649347359aSShanker Donthineni * to be the only thing this redistributor 23659347359aSShanker Donthineni * supports. If that's zero, make it 23669347359aSShanker Donthineni * non-cacheable as well. 23679347359aSShanker Donthineni */ 23689347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 23699347359aSShanker Donthineni if (!shr) { 23709347359aSShanker Donthineni cache = GITS_BASER_nC; 2371328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 23729347359aSShanker Donthineni } 23739347359aSShanker Donthineni goto retry_baser; 23749347359aSShanker Donthineni } 23759347359aSShanker Donthineni 23769347359aSShanker Donthineni if (val != tmp) { 2377b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 23789347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 2379b11283ebSVladimir Murzin val, tmp); 23809347359aSShanker Donthineni free_pages((unsigned long)base, order); 23819347359aSShanker Donthineni return -ENXIO; 23829347359aSShanker Donthineni } 23839347359aSShanker Donthineni 23849347359aSShanker Donthineni baser->order = order; 23859347359aSShanker Donthineni baser->base = base; 23869347359aSShanker Donthineni baser->psz = psz; 23873faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 23889347359aSShanker Donthineni 23893faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 2390d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 23919347359aSShanker Donthineni its_base_type_string[type], 23929347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 23933faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 23949347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 23959347359aSShanker Donthineni 23969347359aSShanker Donthineni return 0; 23979347359aSShanker Donthineni } 23989347359aSShanker Donthineni 23994cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 24004cacac57SMarc Zyngier struct its_baser *baser, 2401d5df9dc9SMarc Zyngier u32 *order, u32 ids) 24024b75c459SShanker Donthineni { 24034cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 24044cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 24054cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 24062fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 24074b75c459SShanker Donthineni u32 new_order = *order; 2408d5df9dc9SMarc Zyngier u32 psz = baser->psz; 24093faf24eaSShanker Donthineni bool indirect = false; 24103faf24eaSShanker Donthineni 24113faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 24123faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 24133faf24eaSShanker Donthineni /* 24143faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 24153faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 24163faf24eaSShanker Donthineni */ 24173faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 24183faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 24193faf24eaSShanker Donthineni 24203faf24eaSShanker Donthineni if (indirect) { 24213faf24eaSShanker Donthineni /* 24223faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 24233faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 24243faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 24253faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 24263faf24eaSShanker Donthineni * entry size. 24273faf24eaSShanker Donthineni */ 2428d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 24293faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 24303faf24eaSShanker Donthineni } 24313faf24eaSShanker Donthineni } 24324b75c459SShanker Donthineni 24334b75c459SShanker Donthineni /* 24344b75c459SShanker Donthineni * Allocate as many entries as required to fit the 24354b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 24364b75c459SShanker Donthineni * space being incredibly sparse, this results in a 24373faf24eaSShanker Donthineni * massive waste of memory if two-level device table 24383faf24eaSShanker Donthineni * feature is not supported by hardware. 24394b75c459SShanker Donthineni */ 24404b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 24414b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 24424b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 2443d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 2444576a8342SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", 24454cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 2446576a8342SMarc Zyngier device_ids(its), ids); 24474b75c459SShanker Donthineni } 24484b75c459SShanker Donthineni 24494b75c459SShanker Donthineni *order = new_order; 24503faf24eaSShanker Donthineni 24513faf24eaSShanker Donthineni return indirect; 24524b75c459SShanker Donthineni } 24534b75c459SShanker Donthineni 24545e516846SMarc Zyngier static u32 compute_common_aff(u64 val) 24555e516846SMarc Zyngier { 24565e516846SMarc Zyngier u32 aff, clpiaff; 24575e516846SMarc Zyngier 24585e516846SMarc Zyngier aff = FIELD_GET(GICR_TYPER_AFFINITY, val); 24595e516846SMarc Zyngier clpiaff = FIELD_GET(GICR_TYPER_COMMON_LPI_AFF, val); 24605e516846SMarc Zyngier 24615e516846SMarc Zyngier return aff & ~(GENMASK(31, 0) >> (clpiaff * 8)); 24625e516846SMarc Zyngier } 24635e516846SMarc Zyngier 24645e516846SMarc Zyngier static u32 compute_its_aff(struct its_node *its) 24655e516846SMarc Zyngier { 24665e516846SMarc Zyngier u64 val; 24675e516846SMarc Zyngier u32 svpet; 24685e516846SMarc Zyngier 24695e516846SMarc Zyngier /* 24705e516846SMarc Zyngier * Reencode the ITS SVPET and MPIDR as a GICR_TYPER, and compute 24715e516846SMarc Zyngier * the resulting affinity. We then use that to see if this match 24725e516846SMarc Zyngier * our own affinity. 24735e516846SMarc Zyngier */ 24745e516846SMarc Zyngier svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); 24755e516846SMarc Zyngier val = FIELD_PREP(GICR_TYPER_COMMON_LPI_AFF, svpet); 24765e516846SMarc Zyngier val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); 24775e516846SMarc Zyngier return compute_common_aff(val); 24785e516846SMarc Zyngier } 24795e516846SMarc Zyngier 24805e516846SMarc Zyngier static struct its_node *find_sibling_its(struct its_node *cur_its) 24815e516846SMarc Zyngier { 24825e516846SMarc Zyngier struct its_node *its; 24835e516846SMarc Zyngier u32 aff; 24845e516846SMarc Zyngier 24855e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, cur_its->typer)) 24865e516846SMarc Zyngier return NULL; 24875e516846SMarc Zyngier 24885e516846SMarc Zyngier aff = compute_its_aff(cur_its); 24895e516846SMarc Zyngier 24905e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 24915e516846SMarc Zyngier u64 baser; 24925e516846SMarc Zyngier 24935e516846SMarc Zyngier if (!is_v4_1(its) || its == cur_its) 24945e516846SMarc Zyngier continue; 24955e516846SMarc Zyngier 24965e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 24975e516846SMarc Zyngier continue; 24985e516846SMarc Zyngier 24995e516846SMarc Zyngier if (aff != compute_its_aff(its)) 25005e516846SMarc Zyngier continue; 25015e516846SMarc Zyngier 25025e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 25035e516846SMarc Zyngier baser = its->tables[2].val; 25045e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 25055e516846SMarc Zyngier continue; 25065e516846SMarc Zyngier 25075e516846SMarc Zyngier return its; 25085e516846SMarc Zyngier } 25095e516846SMarc Zyngier 25105e516846SMarc Zyngier return NULL; 25115e516846SMarc Zyngier } 25125e516846SMarc Zyngier 25131ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 25141ac19ca6SMarc Zyngier { 25151ac19ca6SMarc Zyngier int i; 25161ac19ca6SMarc Zyngier 25171ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 25181a485f4dSShanker Donthineni if (its->tables[i].base) { 25191a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 25201a485f4dSShanker Donthineni its->tables[i].order); 25211a485f4dSShanker Donthineni its->tables[i].base = NULL; 25221ac19ca6SMarc Zyngier } 25231ac19ca6SMarc Zyngier } 25241ac19ca6SMarc Zyngier } 25251ac19ca6SMarc Zyngier 2526d5df9dc9SMarc Zyngier static int its_probe_baser_psz(struct its_node *its, struct its_baser *baser) 2527d5df9dc9SMarc Zyngier { 2528d5df9dc9SMarc Zyngier u64 psz = SZ_64K; 2529d5df9dc9SMarc Zyngier 2530d5df9dc9SMarc Zyngier while (psz) { 2531d5df9dc9SMarc Zyngier u64 val, gpsz; 2532d5df9dc9SMarc Zyngier 2533d5df9dc9SMarc Zyngier val = its_read_baser(its, baser); 2534d5df9dc9SMarc Zyngier val &= ~GITS_BASER_PAGE_SIZE_MASK; 2535d5df9dc9SMarc Zyngier 2536d5df9dc9SMarc Zyngier switch (psz) { 2537d5df9dc9SMarc Zyngier case SZ_64K: 2538d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_64K; 2539d5df9dc9SMarc Zyngier break; 2540d5df9dc9SMarc Zyngier case SZ_16K: 2541d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_16K; 2542d5df9dc9SMarc Zyngier break; 2543d5df9dc9SMarc Zyngier case SZ_4K: 2544d5df9dc9SMarc Zyngier default: 2545d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_4K; 2546d5df9dc9SMarc Zyngier break; 2547d5df9dc9SMarc Zyngier } 2548d5df9dc9SMarc Zyngier 2549d5df9dc9SMarc Zyngier gpsz >>= GITS_BASER_PAGE_SIZE_SHIFT; 2550d5df9dc9SMarc Zyngier 2551d5df9dc9SMarc Zyngier val |= FIELD_PREP(GITS_BASER_PAGE_SIZE_MASK, gpsz); 2552d5df9dc9SMarc Zyngier its_write_baser(its, baser, val); 2553d5df9dc9SMarc Zyngier 2554d5df9dc9SMarc Zyngier if (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser->val) == gpsz) 2555d5df9dc9SMarc Zyngier break; 2556d5df9dc9SMarc Zyngier 2557d5df9dc9SMarc Zyngier switch (psz) { 2558d5df9dc9SMarc Zyngier case SZ_64K: 2559d5df9dc9SMarc Zyngier psz = SZ_16K; 2560d5df9dc9SMarc Zyngier break; 2561d5df9dc9SMarc Zyngier case SZ_16K: 2562d5df9dc9SMarc Zyngier psz = SZ_4K; 2563d5df9dc9SMarc Zyngier break; 2564d5df9dc9SMarc Zyngier case SZ_4K: 2565d5df9dc9SMarc Zyngier default: 2566d5df9dc9SMarc Zyngier return -1; 2567d5df9dc9SMarc Zyngier } 2568d5df9dc9SMarc Zyngier } 2569d5df9dc9SMarc Zyngier 2570d5df9dc9SMarc Zyngier baser->psz = psz; 2571d5df9dc9SMarc Zyngier return 0; 2572d5df9dc9SMarc Zyngier } 2573d5df9dc9SMarc Zyngier 25740e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 25751ac19ca6SMarc Zyngier { 25761ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 25772fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 25789347359aSShanker Donthineni int err, i; 257994100970SRobert Richter 2580fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 2581fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 25829347359aSShanker Donthineni cache = GITS_BASER_nCnB; 2583466b7d16SShanker Donthineni 25841ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 25852d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 25862d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 25871ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 25883faf24eaSShanker Donthineni bool indirect = false; 2589d5df9dc9SMarc Zyngier u32 order; 25901ac19ca6SMarc Zyngier 2591d5df9dc9SMarc Zyngier if (type == GITS_BASER_TYPE_NONE) 25921ac19ca6SMarc Zyngier continue; 25931ac19ca6SMarc Zyngier 2594d5df9dc9SMarc Zyngier if (its_probe_baser_psz(its, baser)) { 2595d5df9dc9SMarc Zyngier its_free_tables(its); 2596d5df9dc9SMarc Zyngier return -ENXIO; 2597d5df9dc9SMarc Zyngier } 2598d5df9dc9SMarc Zyngier 2599d5df9dc9SMarc Zyngier order = get_order(baser->psz); 2600d5df9dc9SMarc Zyngier 2601d5df9dc9SMarc Zyngier switch (type) { 26024cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 2603d5df9dc9SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, &order, 2604576a8342SMarc Zyngier device_ids(its)); 26058d565748SZenghui Yu break; 26068d565748SZenghui Yu 26074cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 26085e516846SMarc Zyngier if (is_v4_1(its)) { 26095e516846SMarc Zyngier struct its_node *sibling; 26105e516846SMarc Zyngier 26115e516846SMarc Zyngier WARN_ON(i != 2); 26125e516846SMarc Zyngier if ((sibling = find_sibling_its(its))) { 26135e516846SMarc Zyngier *baser = sibling->tables[2]; 26145e516846SMarc Zyngier its_write_baser(its, baser, baser->val); 26155e516846SMarc Zyngier continue; 26165e516846SMarc Zyngier } 26175e516846SMarc Zyngier } 26185e516846SMarc Zyngier 2619d5df9dc9SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, &order, 262032bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 26214cacac57SMarc Zyngier break; 26224cacac57SMarc Zyngier } 2623f54b97edSMarc Zyngier 2624d5df9dc9SMarc Zyngier err = its_setup_baser(its, baser, cache, shr, order, indirect); 26259347359aSShanker Donthineni if (err < 0) { 26269347359aSShanker Donthineni its_free_tables(its); 26279347359aSShanker Donthineni return err; 262830f21363SRobert Richter } 262930f21363SRobert Richter 26309347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 26319347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 26329347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 26331ac19ca6SMarc Zyngier } 26341ac19ca6SMarc Zyngier 26351ac19ca6SMarc Zyngier return 0; 26361ac19ca6SMarc Zyngier } 26371ac19ca6SMarc Zyngier 26385e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_its(void) 26395e516846SMarc Zyngier { 26405e516846SMarc Zyngier struct its_node *its; 26415e516846SMarc Zyngier u64 val; 26425e516846SMarc Zyngier u32 aff; 26435e516846SMarc Zyngier 26445e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 26455e516846SMarc Zyngier aff = compute_common_aff(val); 26465e516846SMarc Zyngier 26475e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 26485e516846SMarc Zyngier u64 baser, addr; 26495e516846SMarc Zyngier 26505e516846SMarc Zyngier if (!is_v4_1(its)) 26515e516846SMarc Zyngier continue; 26525e516846SMarc Zyngier 26535e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 26545e516846SMarc Zyngier continue; 26555e516846SMarc Zyngier 26565e516846SMarc Zyngier if (aff != compute_its_aff(its)) 26575e516846SMarc Zyngier continue; 26585e516846SMarc Zyngier 26595e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 26605e516846SMarc Zyngier baser = its->tables[2].val; 26615e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 26625e516846SMarc Zyngier continue; 26635e516846SMarc Zyngier 26645e516846SMarc Zyngier /* We have a winner! */ 26658b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = its->tables[2].base; 26668b718d40SZenghui Yu 26675e516846SMarc Zyngier val = GICR_VPROPBASER_4_1_VALID; 26685e516846SMarc Zyngier if (baser & GITS_BASER_INDIRECT) 26695e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 26705e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, 26715e516846SMarc Zyngier FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)); 26725e516846SMarc Zyngier switch (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)) { 26735e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 26745e516846SMarc Zyngier addr = GITS_BASER_ADDR_48_to_52(baser); 26755e516846SMarc Zyngier break; 26765e516846SMarc Zyngier default: 26775e516846SMarc Zyngier addr = baser & GENMASK_ULL(47, 12); 26785e516846SMarc Zyngier break; 26795e516846SMarc Zyngier } 26805e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, addr >> 12); 26815e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_SHAREABILITY_MASK, 26825e516846SMarc Zyngier FIELD_GET(GITS_BASER_SHAREABILITY_MASK, baser)); 26835e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_INNER_CACHEABILITY_MASK, 26845e516846SMarc Zyngier FIELD_GET(GITS_BASER_INNER_CACHEABILITY_MASK, baser)); 26855e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, GITS_BASER_NR_PAGES(baser) - 1); 26865e516846SMarc Zyngier 26875e516846SMarc Zyngier return val; 26885e516846SMarc Zyngier } 26895e516846SMarc Zyngier 26905e516846SMarc Zyngier return 0; 26915e516846SMarc Zyngier } 26925e516846SMarc Zyngier 26935e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_rd(cpumask_t **mask) 26945e516846SMarc Zyngier { 26955e516846SMarc Zyngier u32 aff; 26965e516846SMarc Zyngier u64 val; 26975e516846SMarc Zyngier int cpu; 26985e516846SMarc Zyngier 26995e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 27005e516846SMarc Zyngier aff = compute_common_aff(val); 27015e516846SMarc Zyngier 27025e516846SMarc Zyngier for_each_possible_cpu(cpu) { 27035e516846SMarc Zyngier void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 27045e516846SMarc Zyngier 27055e516846SMarc Zyngier if (!base || cpu == smp_processor_id()) 27065e516846SMarc Zyngier continue; 27075e516846SMarc Zyngier 27085e516846SMarc Zyngier val = gic_read_typer(base + GICR_TYPER); 27094bccf1d7SZenghui Yu if (aff != compute_common_aff(val)) 27105e516846SMarc Zyngier continue; 27115e516846SMarc Zyngier 27125e516846SMarc Zyngier /* 27135e516846SMarc Zyngier * At this point, we have a victim. This particular CPU 27145e516846SMarc Zyngier * has already booted, and has an affinity that matches 27155e516846SMarc Zyngier * ours wrt CommonLPIAff. Let's use its own VPROPBASER. 27165e516846SMarc Zyngier * Make sure we don't write the Z bit in that case. 27175e516846SMarc Zyngier */ 27185186a6ccSZenghui Yu val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 27195e516846SMarc Zyngier val &= ~GICR_VPROPBASER_4_1_Z; 27205e516846SMarc Zyngier 27218b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = gic_data_rdist_cpu(cpu)->vpe_l1_base; 27225e516846SMarc Zyngier *mask = gic_data_rdist_cpu(cpu)->vpe_table_mask; 27235e516846SMarc Zyngier 27245e516846SMarc Zyngier return val; 27255e516846SMarc Zyngier } 27265e516846SMarc Zyngier 27275e516846SMarc Zyngier return 0; 27285e516846SMarc Zyngier } 27295e516846SMarc Zyngier 27304e6437f1SZenghui Yu static bool allocate_vpe_l2_table(int cpu, u32 id) 27314e6437f1SZenghui Yu { 27324e6437f1SZenghui Yu void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 2733490d332eSMarc Zyngier unsigned int psz, esz, idx, npg, gpsz; 2734490d332eSMarc Zyngier u64 val; 27354e6437f1SZenghui Yu struct page *page; 27364e6437f1SZenghui Yu __le64 *table; 27374e6437f1SZenghui Yu 27384e6437f1SZenghui Yu if (!gic_rdists->has_rvpeid) 27394e6437f1SZenghui Yu return true; 27404e6437f1SZenghui Yu 274128d160deSMarc Zyngier /* Skip non-present CPUs */ 274228d160deSMarc Zyngier if (!base) 274328d160deSMarc Zyngier return true; 274428d160deSMarc Zyngier 27455186a6ccSZenghui Yu val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 27464e6437f1SZenghui Yu 27474e6437f1SZenghui Yu esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val) + 1; 27484e6437f1SZenghui Yu gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 27494e6437f1SZenghui Yu npg = FIELD_GET(GICR_VPROPBASER_4_1_SIZE, val) + 1; 27504e6437f1SZenghui Yu 27514e6437f1SZenghui Yu switch (gpsz) { 27524e6437f1SZenghui Yu default: 27534e6437f1SZenghui Yu WARN_ON(1); 2754df561f66SGustavo A. R. Silva fallthrough; 27554e6437f1SZenghui Yu case GIC_PAGE_SIZE_4K: 27564e6437f1SZenghui Yu psz = SZ_4K; 27574e6437f1SZenghui Yu break; 27584e6437f1SZenghui Yu case GIC_PAGE_SIZE_16K: 27594e6437f1SZenghui Yu psz = SZ_16K; 27604e6437f1SZenghui Yu break; 27614e6437f1SZenghui Yu case GIC_PAGE_SIZE_64K: 27624e6437f1SZenghui Yu psz = SZ_64K; 27634e6437f1SZenghui Yu break; 27644e6437f1SZenghui Yu } 27654e6437f1SZenghui Yu 27664e6437f1SZenghui Yu /* Don't allow vpe_id that exceeds single, flat table limit */ 27674e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_4_1_INDIRECT)) 27684e6437f1SZenghui Yu return (id < (npg * psz / (esz * SZ_8))); 27694e6437f1SZenghui Yu 27704e6437f1SZenghui Yu /* Compute 1st level table index & check if that exceeds table limit */ 27714e6437f1SZenghui Yu idx = id >> ilog2(psz / (esz * SZ_8)); 27724e6437f1SZenghui Yu if (idx >= (npg * psz / GITS_LVL1_ENTRY_SIZE)) 27734e6437f1SZenghui Yu return false; 27744e6437f1SZenghui Yu 27754e6437f1SZenghui Yu table = gic_data_rdist_cpu(cpu)->vpe_l1_base; 27764e6437f1SZenghui Yu 27774e6437f1SZenghui Yu /* Allocate memory for 2nd level table */ 27784e6437f1SZenghui Yu if (!table[idx]) { 27794e6437f1SZenghui Yu page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(psz)); 27804e6437f1SZenghui Yu if (!page) 27814e6437f1SZenghui Yu return false; 27824e6437f1SZenghui Yu 27834e6437f1SZenghui Yu /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 27844e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_SHAREABILITY_MASK)) 27854e6437f1SZenghui Yu gic_flush_dcache_to_poc(page_address(page), psz); 27864e6437f1SZenghui Yu 27874e6437f1SZenghui Yu table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 27884e6437f1SZenghui Yu 27894e6437f1SZenghui Yu /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 27904e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_SHAREABILITY_MASK)) 27914e6437f1SZenghui Yu gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 27924e6437f1SZenghui Yu 27934e6437f1SZenghui Yu /* Ensure updated table contents are visible to RD hardware */ 27944e6437f1SZenghui Yu dsb(sy); 27954e6437f1SZenghui Yu } 27964e6437f1SZenghui Yu 27974e6437f1SZenghui Yu return true; 27984e6437f1SZenghui Yu } 27994e6437f1SZenghui Yu 28005e516846SMarc Zyngier static int allocate_vpe_l1_table(void) 28015e516846SMarc Zyngier { 28025e516846SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 28035e516846SMarc Zyngier u64 val, gpsz, npg, pa; 28045e516846SMarc Zyngier unsigned int psz = SZ_64K; 28055e516846SMarc Zyngier unsigned int np, epp, esz; 28065e516846SMarc Zyngier struct page *page; 28075e516846SMarc Zyngier 28085e516846SMarc Zyngier if (!gic_rdists->has_rvpeid) 28095e516846SMarc Zyngier return 0; 28105e516846SMarc Zyngier 28115e516846SMarc Zyngier /* 28125e516846SMarc Zyngier * if VPENDBASER.Valid is set, disable any previously programmed 28135e516846SMarc Zyngier * VPE by setting PendingLast while clearing Valid. This has the 28145e516846SMarc Zyngier * effect of making sure no doorbell will be generated and we can 28155e516846SMarc Zyngier * then safely clear VPROPBASER.Valid. 28165e516846SMarc Zyngier */ 28175186a6ccSZenghui Yu if (gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER) & GICR_VPENDBASER_Valid) 28185186a6ccSZenghui Yu gicr_write_vpendbaser(GICR_VPENDBASER_PendingLast, 28195e516846SMarc Zyngier vlpi_base + GICR_VPENDBASER); 28205e516846SMarc Zyngier 28215e516846SMarc Zyngier /* 28225e516846SMarc Zyngier * If we can inherit the configuration from another RD, let's do 28235e516846SMarc Zyngier * so. Otherwise, we have to go through the allocation process. We 28245e516846SMarc Zyngier * assume that all RDs have the exact same requirements, as 28255e516846SMarc Zyngier * nothing will work otherwise. 28265e516846SMarc Zyngier */ 28275e516846SMarc Zyngier val = inherit_vpe_l1_table_from_rd(&gic_data_rdist()->vpe_table_mask); 28285e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 28295e516846SMarc Zyngier goto out; 28305e516846SMarc Zyngier 2831d1bd7e0bSZenghui Yu gic_data_rdist()->vpe_table_mask = kzalloc(sizeof(cpumask_t), GFP_ATOMIC); 28325e516846SMarc Zyngier if (!gic_data_rdist()->vpe_table_mask) 28335e516846SMarc Zyngier return -ENOMEM; 28345e516846SMarc Zyngier 28355e516846SMarc Zyngier val = inherit_vpe_l1_table_from_its(); 28365e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 28375e516846SMarc Zyngier goto out; 28385e516846SMarc Zyngier 28395e516846SMarc Zyngier /* First probe the page size */ 28405e516846SMarc Zyngier val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K); 28415186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 28425186a6ccSZenghui Yu val = gicr_read_vpropbaser(vlpi_base + GICR_VPROPBASER); 28435e516846SMarc Zyngier gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 28445e516846SMarc Zyngier esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val); 28455e516846SMarc Zyngier 28465e516846SMarc Zyngier switch (gpsz) { 28475e516846SMarc Zyngier default: 28485e516846SMarc Zyngier gpsz = GIC_PAGE_SIZE_4K; 2849df561f66SGustavo A. R. Silva fallthrough; 28505e516846SMarc Zyngier case GIC_PAGE_SIZE_4K: 28515e516846SMarc Zyngier psz = SZ_4K; 28525e516846SMarc Zyngier break; 28535e516846SMarc Zyngier case GIC_PAGE_SIZE_16K: 28545e516846SMarc Zyngier psz = SZ_16K; 28555e516846SMarc Zyngier break; 28565e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 28575e516846SMarc Zyngier psz = SZ_64K; 28585e516846SMarc Zyngier break; 28595e516846SMarc Zyngier } 28605e516846SMarc Zyngier 28615e516846SMarc Zyngier /* 28625e516846SMarc Zyngier * Start populating the register from scratch, including RO fields 28635e516846SMarc Zyngier * (which we want to print in debug cases...) 28645e516846SMarc Zyngier */ 28655e516846SMarc Zyngier val = 0; 28665e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, gpsz); 28675e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ENTRY_SIZE, esz); 28685e516846SMarc Zyngier 28695e516846SMarc Zyngier /* How many entries per GIC page? */ 28705e516846SMarc Zyngier esz++; 28715e516846SMarc Zyngier epp = psz / (esz * SZ_8); 28725e516846SMarc Zyngier 28735e516846SMarc Zyngier /* 28745e516846SMarc Zyngier * If we need more than just a single L1 page, flag the table 28755e516846SMarc Zyngier * as indirect and compute the number of required L1 pages. 28765e516846SMarc Zyngier */ 28775e516846SMarc Zyngier if (epp < ITS_MAX_VPEID) { 28785e516846SMarc Zyngier int nl2; 28795e516846SMarc Zyngier 28805e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 28815e516846SMarc Zyngier 28825e516846SMarc Zyngier /* Number of L2 pages required to cover the VPEID space */ 28835e516846SMarc Zyngier nl2 = DIV_ROUND_UP(ITS_MAX_VPEID, epp); 28845e516846SMarc Zyngier 28855e516846SMarc Zyngier /* Number of L1 pages to point to the L2 pages */ 28865e516846SMarc Zyngier npg = DIV_ROUND_UP(nl2 * SZ_8, psz); 28875e516846SMarc Zyngier } else { 28885e516846SMarc Zyngier npg = 1; 28895e516846SMarc Zyngier } 28905e516846SMarc Zyngier 2891e88bd316SZenghui Yu val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1); 28925e516846SMarc Zyngier 28935e516846SMarc Zyngier /* Right, that's the number of CPU pages we need for L1 */ 28945e516846SMarc Zyngier np = DIV_ROUND_UP(npg * psz, PAGE_SIZE); 28955e516846SMarc Zyngier 28965e516846SMarc Zyngier pr_debug("np = %d, npg = %lld, psz = %d, epp = %d, esz = %d\n", 28975e516846SMarc Zyngier np, npg, psz, epp, esz); 2898d1bd7e0bSZenghui Yu page = alloc_pages(GFP_ATOMIC | __GFP_ZERO, get_order(np * PAGE_SIZE)); 28995e516846SMarc Zyngier if (!page) 29005e516846SMarc Zyngier return -ENOMEM; 29015e516846SMarc Zyngier 29028b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = page_address(page); 29035e516846SMarc Zyngier pa = virt_to_phys(page_address(page)); 29045e516846SMarc Zyngier WARN_ON(!IS_ALIGNED(pa, psz)); 29055e516846SMarc Zyngier 29065e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, pa >> 12); 29075e516846SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 29085e516846SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 29095e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_Z; 29105e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_VALID; 29115e516846SMarc Zyngier 29125e516846SMarc Zyngier out: 29135186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 29145e516846SMarc Zyngier cpumask_set_cpu(smp_processor_id(), gic_data_rdist()->vpe_table_mask); 29155e516846SMarc Zyngier 29165e516846SMarc Zyngier pr_debug("CPU%d: VPROPBASER = %llx %*pbl\n", 29175e516846SMarc Zyngier smp_processor_id(), val, 29185e516846SMarc Zyngier cpumask_pr_args(gic_data_rdist()->vpe_table_mask)); 29195e516846SMarc Zyngier 29205e516846SMarc Zyngier return 0; 29215e516846SMarc Zyngier } 29225e516846SMarc Zyngier 29231ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 29241ac19ca6SMarc Zyngier { 292583559b47SMarc Zyngier int i; 292683559b47SMarc Zyngier 29276396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 29281ac19ca6SMarc Zyngier GFP_KERNEL); 29291ac19ca6SMarc Zyngier if (!its->collections) 29301ac19ca6SMarc Zyngier return -ENOMEM; 29311ac19ca6SMarc Zyngier 293283559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 293383559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 293483559b47SMarc Zyngier 29351ac19ca6SMarc Zyngier return 0; 29361ac19ca6SMarc Zyngier } 29371ac19ca6SMarc Zyngier 29387c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 29397c297a2dSMarc Zyngier { 29407c297a2dSMarc Zyngier struct page *pend_page; 2941adaab500SMarc Zyngier 29427c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 2943adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 29447c297a2dSMarc Zyngier if (!pend_page) 29457c297a2dSMarc Zyngier return NULL; 29467c297a2dSMarc Zyngier 29477c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 29487c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 29497c297a2dSMarc Zyngier 29507c297a2dSMarc Zyngier return pend_page; 29517c297a2dSMarc Zyngier } 29527c297a2dSMarc Zyngier 29537d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 29547d75bbb4SMarc Zyngier { 2955adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 29567d75bbb4SMarc Zyngier } 29577d75bbb4SMarc Zyngier 2958c6e2ccb6SMarc Zyngier /* 29595e2c9f9aSMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. Any other 29605e2c9f9aSMarc Zyngier * case is wrong in the absence of firmware/EFI support. 2961c6e2ccb6SMarc Zyngier */ 2962c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 2963c440a9d9SMarc Zyngier { 29645e2c9f9aSMarc Zyngier phys_addr_t addr; 29655e2c9f9aSMarc Zyngier u64 val; 2966c6e2ccb6SMarc Zyngier 29675e2c9f9aSMarc Zyngier /* Check whether the property table is in a reserved region */ 29685e2c9f9aSMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 29695e2c9f9aSMarc Zyngier addr = val & GENMASK_ULL(51, 12); 29705e2c9f9aSMarc Zyngier 29715e2c9f9aSMarc Zyngier return gic_check_reserved_range(addr, LPI_PROPBASE_SZ); 2972c440a9d9SMarc Zyngier } 2973c440a9d9SMarc Zyngier 297411e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 297511e37d35SMarc Zyngier { 2976c440a9d9SMarc Zyngier u64 val; 297711e37d35SMarc Zyngier int err, cpu; 297811e37d35SMarc Zyngier 2979c440a9d9SMarc Zyngier /* 2980c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 2981c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 2982c440a9d9SMarc Zyngier */ 2983c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 2984c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 2985c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 2986c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 2987c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 2988c440a9d9SMarc Zyngier } 2989c440a9d9SMarc Zyngier 299011e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 299111e37d35SMarc Zyngier if (err) 299211e37d35SMarc Zyngier return err; 299311e37d35SMarc Zyngier 299411e37d35SMarc Zyngier /* 299511e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 299611e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 299711e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 299811e37d35SMarc Zyngier */ 299911e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 300011e37d35SMarc Zyngier struct page *pend_page; 300111e37d35SMarc Zyngier 300211e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 300311e37d35SMarc Zyngier if (!pend_page) { 300411e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 300511e37d35SMarc Zyngier return -ENOMEM; 300611e37d35SMarc Zyngier } 300711e37d35SMarc Zyngier 300811e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 300911e37d35SMarc Zyngier } 301011e37d35SMarc Zyngier 301111e37d35SMarc Zyngier return 0; 301211e37d35SMarc Zyngier } 301311e37d35SMarc Zyngier 3014af27e416SMarc Zyngier static u64 read_vpend_dirty_clear(void __iomem *vlpi_base) 30156479450fSHeyi Guo { 30166479450fSHeyi Guo u32 count = 1000000; /* 1s! */ 30176479450fSHeyi Guo bool clean; 30186479450fSHeyi Guo u64 val; 30196479450fSHeyi Guo 30206479450fSHeyi Guo do { 30215186a6ccSZenghui Yu val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 30226479450fSHeyi Guo clean = !(val & GICR_VPENDBASER_Dirty); 30236479450fSHeyi Guo if (!clean) { 30246479450fSHeyi Guo count--; 30256479450fSHeyi Guo cpu_relax(); 30266479450fSHeyi Guo udelay(1); 30276479450fSHeyi Guo } 30286479450fSHeyi Guo } while (!clean && count); 30296479450fSHeyi Guo 3030af27e416SMarc Zyngier if (unlikely(!clean)) 3031e64fab1aSMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 3032af27e416SMarc Zyngier 3033af27e416SMarc Zyngier return val; 3034e64fab1aSMarc Zyngier } 3035e64fab1aSMarc Zyngier 3036af27e416SMarc Zyngier static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set) 3037af27e416SMarc Zyngier { 3038af27e416SMarc Zyngier u64 val; 3039af27e416SMarc Zyngier 3040af27e416SMarc Zyngier /* Make sure we wait until the RD is done with the initial scan */ 3041af27e416SMarc Zyngier val = read_vpend_dirty_clear(vlpi_base); 3042af27e416SMarc Zyngier val &= ~GICR_VPENDBASER_Valid; 3043af27e416SMarc Zyngier val &= ~clr; 3044af27e416SMarc Zyngier val |= set; 3045af27e416SMarc Zyngier gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 3046af27e416SMarc Zyngier 3047af27e416SMarc Zyngier val = read_vpend_dirty_clear(vlpi_base); 3048af27e416SMarc Zyngier if (unlikely(val & GICR_VPENDBASER_Dirty)) 3049af27e416SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 3050af27e416SMarc Zyngier 30516479450fSHeyi Guo return val; 30526479450fSHeyi Guo } 30536479450fSHeyi Guo 30541ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 30551ac19ca6SMarc Zyngier { 30561ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 30571ac19ca6SMarc Zyngier struct page *pend_page; 305811e37d35SMarc Zyngier phys_addr_t paddr; 30591ac19ca6SMarc Zyngier u64 val, tmp; 30601ac19ca6SMarc Zyngier 3061c0cdc890SValentin Schneider if (gic_data_rdist()->flags & RD_LOCAL_LPI_ENABLED) 30621ac19ca6SMarc Zyngier return; 30631ac19ca6SMarc Zyngier 3064c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 3065c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 3066c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 3067f842ca8eSMarc Zyngier /* 3068f842ca8eSMarc Zyngier * Check that we get the same property table on all 3069f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 3070f842ca8eSMarc Zyngier */ 3071f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 3072f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 3073f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 3074f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 3075f842ca8eSMarc Zyngier 3076c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 3077c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 3078c440a9d9SMarc Zyngier 30795e2c9f9aSMarc Zyngier WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ)); 3080d23bc2bcSValentin Schneider gic_data_rdist()->flags |= RD_LOCAL_PENDTABLE_PREALLOCATED; 3081c440a9d9SMarc Zyngier 3082c440a9d9SMarc Zyngier goto out; 3083c440a9d9SMarc Zyngier } 3084c440a9d9SMarc Zyngier 308511e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 30861ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 30871ac19ca6SMarc Zyngier 30881ac19ca6SMarc Zyngier /* set PROPBASE */ 3089e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 30901ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 30912fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 30921ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 30931ac19ca6SMarc Zyngier 30940968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 30950968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 30961ac19ca6SMarc Zyngier 30971ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 3098241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 3099241a386cSMarc Zyngier /* 3100241a386cSMarc Zyngier * The HW reports non-shareable, we must 3101241a386cSMarc Zyngier * remove the cacheability attributes as 3102241a386cSMarc Zyngier * well. 3103241a386cSMarc Zyngier */ 3104241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 3105241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 3106241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 31070968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 3108241a386cSMarc Zyngier } 31091ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 31101ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 31111ac19ca6SMarc Zyngier } 31121ac19ca6SMarc Zyngier 31131ac19ca6SMarc Zyngier /* set PENDBASE */ 31141ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 31154ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 31162fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 31171ac19ca6SMarc Zyngier 31180968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 31190968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 3120241a386cSMarc Zyngier 3121241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 3122241a386cSMarc Zyngier /* 3123241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 3124241a386cSMarc Zyngier * cacheability attributes as well. 3125241a386cSMarc Zyngier */ 3126241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 3127241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 3128241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 31290968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 3130241a386cSMarc Zyngier } 31311ac19ca6SMarc Zyngier 31321ac19ca6SMarc Zyngier /* Enable LPIs */ 31331ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 31341ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 31351ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 31361ac19ca6SMarc Zyngier 31375e516846SMarc Zyngier if (gic_rdists->has_vlpis && !gic_rdists->has_rvpeid) { 31386479450fSHeyi Guo void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 31396479450fSHeyi Guo 31406479450fSHeyi Guo /* 31416479450fSHeyi Guo * It's possible for CPU to receive VLPIs before it is 3142a359f757SIngo Molnar * scheduled as a vPE, especially for the first CPU, and the 31436479450fSHeyi Guo * VLPI with INTID larger than 2^(IDbits+1) will be considered 31446479450fSHeyi Guo * as out of range and dropped by GIC. 31456479450fSHeyi Guo * So we initialize IDbits to known value to avoid VLPI drop. 31466479450fSHeyi Guo */ 31476479450fSHeyi Guo val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 31486479450fSHeyi Guo pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n", 31496479450fSHeyi Guo smp_processor_id(), val); 31505186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 31516479450fSHeyi Guo 31526479450fSHeyi Guo /* 31536479450fSHeyi Guo * Also clear Valid bit of GICR_VPENDBASER, in case some 31546479450fSHeyi Guo * ancient programming gets left in and has possibility of 31556479450fSHeyi Guo * corrupting memory. 31566479450fSHeyi Guo */ 3157e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 31586479450fSHeyi Guo } 31596479450fSHeyi Guo 31605e516846SMarc Zyngier if (allocate_vpe_l1_table()) { 31615e516846SMarc Zyngier /* 31625e516846SMarc Zyngier * If the allocation has failed, we're in massive trouble. 31635e516846SMarc Zyngier * Disable direct injection, and pray that no VM was 31645e516846SMarc Zyngier * already running... 31655e516846SMarc Zyngier */ 31665e516846SMarc Zyngier gic_rdists->has_rvpeid = false; 31675e516846SMarc Zyngier gic_rdists->has_vlpis = false; 31685e516846SMarc Zyngier } 31695e516846SMarc Zyngier 31701ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 31711ac19ca6SMarc Zyngier dsb(sy); 3172c440a9d9SMarc Zyngier out: 3173c0cdc890SValentin Schneider gic_data_rdist()->flags |= RD_LOCAL_LPI_ENABLED; 3174c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 317511e37d35SMarc Zyngier smp_processor_id(), 3176d23bc2bcSValentin Schneider gic_data_rdist()->flags & RD_LOCAL_PENDTABLE_PREALLOCATED ? 3177d23bc2bcSValentin Schneider "reserved" : "allocated", 317811e37d35SMarc Zyngier &paddr); 31791ac19ca6SMarc Zyngier } 31801ac19ca6SMarc Zyngier 3181920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 31821ac19ca6SMarc Zyngier { 3183920181ceSDerek Basehore int cpu = smp_processor_id(); 31841ac19ca6SMarc Zyngier u64 target; 31851ac19ca6SMarc Zyngier 3186fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 3187fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 3188fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 3189fbf8f40eSGanapatrao Kulkarni 3190fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 3191fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 3192fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 3193920181ceSDerek Basehore return; 3194fbf8f40eSGanapatrao Kulkarni } 3195fbf8f40eSGanapatrao Kulkarni 31961ac19ca6SMarc Zyngier /* 31971ac19ca6SMarc Zyngier * We now have to bind each collection to its target 31981ac19ca6SMarc Zyngier * redistributor. 31991ac19ca6SMarc Zyngier */ 3200589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 32011ac19ca6SMarc Zyngier /* 32021ac19ca6SMarc Zyngier * This ITS wants the physical address of the 32031ac19ca6SMarc Zyngier * redistributor. 32041ac19ca6SMarc Zyngier */ 32051ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 32061ac19ca6SMarc Zyngier } else { 3207920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 3208589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 3209263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 32101ac19ca6SMarc Zyngier } 32111ac19ca6SMarc Zyngier 32121ac19ca6SMarc Zyngier /* Perform collection mapping */ 32131ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 32141ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 32151ac19ca6SMarc Zyngier 32161ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 32171ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 32181ac19ca6SMarc Zyngier } 32191ac19ca6SMarc Zyngier 3220920181ceSDerek Basehore static void its_cpu_init_collections(void) 3221920181ceSDerek Basehore { 3222920181ceSDerek Basehore struct its_node *its; 3223920181ceSDerek Basehore 3224a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3225920181ceSDerek Basehore 3226920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 3227920181ceSDerek Basehore its_cpu_init_collection(its); 3228920181ceSDerek Basehore 3229a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 32301ac19ca6SMarc Zyngier } 323184a6a2e7SMarc Zyngier 323284a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 323384a6a2e7SMarc Zyngier { 323484a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 32353e39e8f5SMarc Zyngier unsigned long flags; 323684a6a2e7SMarc Zyngier 32373e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 323884a6a2e7SMarc Zyngier 323984a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 324084a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 324184a6a2e7SMarc Zyngier its_dev = tmp; 324284a6a2e7SMarc Zyngier break; 324384a6a2e7SMarc Zyngier } 324484a6a2e7SMarc Zyngier } 324584a6a2e7SMarc Zyngier 32463e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 324784a6a2e7SMarc Zyngier 324884a6a2e7SMarc Zyngier return its_dev; 324984a6a2e7SMarc Zyngier } 325084a6a2e7SMarc Zyngier 3251466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 3252466b7d16SShanker Donthineni { 3253466b7d16SShanker Donthineni int i; 3254466b7d16SShanker Donthineni 3255466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3256466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 3257466b7d16SShanker Donthineni return &its->tables[i]; 3258466b7d16SShanker Donthineni } 3259466b7d16SShanker Donthineni 3260466b7d16SShanker Donthineni return NULL; 3261466b7d16SShanker Donthineni } 3262466b7d16SShanker Donthineni 3263539d3782SShanker Donthineni static bool its_alloc_table_entry(struct its_node *its, 3264539d3782SShanker Donthineni struct its_baser *baser, u32 id) 32653faf24eaSShanker Donthineni { 32663faf24eaSShanker Donthineni struct page *page; 32673faf24eaSShanker Donthineni u32 esz, idx; 32683faf24eaSShanker Donthineni __le64 *table; 32693faf24eaSShanker Donthineni 32703faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 32713faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 32723faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 327370cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 32743faf24eaSShanker Donthineni 32753faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 327670cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 32773faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 32783faf24eaSShanker Donthineni return false; 32793faf24eaSShanker Donthineni 32803faf24eaSShanker Donthineni table = baser->base; 32813faf24eaSShanker Donthineni 32823faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 32833faf24eaSShanker Donthineni if (!table[idx]) { 3284539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 3285539d3782SShanker Donthineni get_order(baser->psz)); 32863faf24eaSShanker Donthineni if (!page) 32873faf24eaSShanker Donthineni return false; 32883faf24eaSShanker Donthineni 32893faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 32903faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 3291328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 32923faf24eaSShanker Donthineni 32933faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 32943faf24eaSShanker Donthineni 32953faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 32963faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 3297328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 32983faf24eaSShanker Donthineni 32993faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 33003faf24eaSShanker Donthineni dsb(sy); 33013faf24eaSShanker Donthineni } 33023faf24eaSShanker Donthineni 33033faf24eaSShanker Donthineni return true; 33043faf24eaSShanker Donthineni } 33053faf24eaSShanker Donthineni 330670cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 330770cc81edSMarc Zyngier { 330870cc81edSMarc Zyngier struct its_baser *baser; 330970cc81edSMarc Zyngier 331070cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 331170cc81edSMarc Zyngier 331270cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 331370cc81edSMarc Zyngier if (!baser) 3314576a8342SMarc Zyngier return (ilog2(dev_id) < device_ids(its)); 331570cc81edSMarc Zyngier 3316539d3782SShanker Donthineni return its_alloc_table_entry(its, baser, dev_id); 331770cc81edSMarc Zyngier } 331870cc81edSMarc Zyngier 33197d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 33207d75bbb4SMarc Zyngier { 33217d75bbb4SMarc Zyngier struct its_node *its; 33224e6437f1SZenghui Yu int cpu; 33237d75bbb4SMarc Zyngier 33247d75bbb4SMarc Zyngier /* 33257d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 33267d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 33277d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 33287d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 33297d75bbb4SMarc Zyngier * anyway, right?). 33307d75bbb4SMarc Zyngier */ 33317d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 33327d75bbb4SMarc Zyngier struct its_baser *baser; 33337d75bbb4SMarc Zyngier 33340dd57fedSMarc Zyngier if (!is_v4(its)) 33357d75bbb4SMarc Zyngier continue; 33367d75bbb4SMarc Zyngier 33377d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 33387d75bbb4SMarc Zyngier if (!baser) 33397d75bbb4SMarc Zyngier return false; 33407d75bbb4SMarc Zyngier 3341539d3782SShanker Donthineni if (!its_alloc_table_entry(its, baser, vpe_id)) 33427d75bbb4SMarc Zyngier return false; 33437d75bbb4SMarc Zyngier } 33447d75bbb4SMarc Zyngier 33454e6437f1SZenghui Yu /* Non v4.1? No need to iterate RDs and go back early. */ 33464e6437f1SZenghui Yu if (!gic_rdists->has_rvpeid) 33474e6437f1SZenghui Yu return true; 33484e6437f1SZenghui Yu 33494e6437f1SZenghui Yu /* 33504e6437f1SZenghui Yu * Make sure the L2 tables are allocated for all copies of 33514e6437f1SZenghui Yu * the L1 table on *all* v4.1 RDs. 33524e6437f1SZenghui Yu */ 33534e6437f1SZenghui Yu for_each_possible_cpu(cpu) { 33544e6437f1SZenghui Yu if (!allocate_vpe_l2_table(cpu, vpe_id)) 33554e6437f1SZenghui Yu return false; 33564e6437f1SZenghui Yu } 33574e6437f1SZenghui Yu 33587d75bbb4SMarc Zyngier return true; 33597d75bbb4SMarc Zyngier } 33607d75bbb4SMarc Zyngier 336184a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 336293f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 336384a6a2e7SMarc Zyngier { 336484a6a2e7SMarc Zyngier struct its_device *dev; 336593f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 33663e39e8f5SMarc Zyngier unsigned long flags; 3367591e5becSMarc Zyngier u16 *col_map = NULL; 336884a6a2e7SMarc Zyngier void *itt; 336984a6a2e7SMarc Zyngier int lpi_base; 337084a6a2e7SMarc Zyngier int nr_lpis; 3371c8481267SMarc Zyngier int nr_ites; 337284a6a2e7SMarc Zyngier int sz; 337384a6a2e7SMarc Zyngier 33743faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 3375466b7d16SShanker Donthineni return NULL; 3376466b7d16SShanker Donthineni 3377147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 3378147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 3379147c8f37SMarc Zyngier 338084a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 3381c8481267SMarc Zyngier /* 3382147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 3383147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 3384c8481267SMarc Zyngier */ 3385147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 3386ffedbf0cSMarc Zyngier sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); 338784a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 3388539d3782SShanker Donthineni itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); 338993f94ea0SMarc Zyngier if (alloc_lpis) { 339038dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 3391591e5becSMarc Zyngier if (lpi_map) 33926396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 339393f94ea0SMarc Zyngier GFP_KERNEL); 339493f94ea0SMarc Zyngier } else { 33956396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 339693f94ea0SMarc Zyngier nr_lpis = 0; 339793f94ea0SMarc Zyngier lpi_base = 0; 339893f94ea0SMarc Zyngier } 339984a6a2e7SMarc Zyngier 340093f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 340184a6a2e7SMarc Zyngier kfree(dev); 340284a6a2e7SMarc Zyngier kfree(itt); 3403ff5fe886SAndy Shevchenko bitmap_free(lpi_map); 3404591e5becSMarc Zyngier kfree(col_map); 340584a6a2e7SMarc Zyngier return NULL; 340684a6a2e7SMarc Zyngier } 340784a6a2e7SMarc Zyngier 3408328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 34095a9a8915SMarc Zyngier 341084a6a2e7SMarc Zyngier dev->its = its; 341184a6a2e7SMarc Zyngier dev->itt = itt; 3412c8481267SMarc Zyngier dev->nr_ites = nr_ites; 3413591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 3414591e5becSMarc Zyngier dev->event_map.col_map = col_map; 3415591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 3416591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 341711635fa2SMarc Zyngier raw_spin_lock_init(&dev->event_map.vlpi_lock); 341884a6a2e7SMarc Zyngier dev->device_id = dev_id; 341984a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 342084a6a2e7SMarc Zyngier 34213e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 342284a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 34233e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 342484a6a2e7SMarc Zyngier 342584a6a2e7SMarc Zyngier /* Map device to its ITT */ 342684a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 342784a6a2e7SMarc Zyngier 342884a6a2e7SMarc Zyngier return dev; 342984a6a2e7SMarc Zyngier } 343084a6a2e7SMarc Zyngier 343184a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 343284a6a2e7SMarc Zyngier { 34333e39e8f5SMarc Zyngier unsigned long flags; 34343e39e8f5SMarc Zyngier 34353e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 343684a6a2e7SMarc Zyngier list_del(&its_dev->entry); 34373e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 3438898aa5ceSMarc Zyngier kfree(its_dev->event_map.col_map); 343984a6a2e7SMarc Zyngier kfree(its_dev->itt); 344084a6a2e7SMarc Zyngier kfree(its_dev); 344184a6a2e7SMarc Zyngier } 3442b48ac83dSMarc Zyngier 34438208d170SMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) 3444b48ac83dSMarc Zyngier { 3445b48ac83dSMarc Zyngier int idx; 3446b48ac83dSMarc Zyngier 3447342be106SZenghui Yu /* Find a free LPI region in lpi_map and allocate them. */ 34488208d170SMarc Zyngier idx = bitmap_find_free_region(dev->event_map.lpi_map, 34498208d170SMarc Zyngier dev->event_map.nr_lpis, 34508208d170SMarc Zyngier get_count_order(nvecs)); 34518208d170SMarc Zyngier if (idx < 0) 3452b48ac83dSMarc Zyngier return -ENOSPC; 3453b48ac83dSMarc Zyngier 3454591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 3455b48ac83dSMarc Zyngier 3456b48ac83dSMarc Zyngier return 0; 3457b48ac83dSMarc Zyngier } 3458b48ac83dSMarc Zyngier 345954456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 3460b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 3461b48ac83dSMarc Zyngier { 3462b48ac83dSMarc Zyngier struct its_node *its; 3463b48ac83dSMarc Zyngier struct its_device *its_dev; 346454456db9SMarc Zyngier struct msi_domain_info *msi_info; 346554456db9SMarc Zyngier u32 dev_id; 34669791ec7dSMarc Zyngier int err = 0; 3467b48ac83dSMarc Zyngier 346854456db9SMarc Zyngier /* 3469a7c90f51SJulien Grall * We ignore "dev" entirely, and rely on the dev_id that has 347054456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 347154456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 347254456db9SMarc Zyngier * are built on top of the ITS. 347354456db9SMarc Zyngier */ 347454456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 347554456db9SMarc Zyngier 347654456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 347754456db9SMarc Zyngier its = msi_info->data; 347854456db9SMarc Zyngier 347920b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 348020b3d54eSMarc Zyngier vpe_proxy.dev && 348120b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 348220b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 348320b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 348420b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 348520b3d54eSMarc Zyngier dev_id); 348620b3d54eSMarc Zyngier return -EINVAL; 348720b3d54eSMarc Zyngier } 348820b3d54eSMarc Zyngier 34899791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 3490f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 3491e8137f4fSMarc Zyngier if (its_dev) { 3492e8137f4fSMarc Zyngier /* 3493e8137f4fSMarc Zyngier * We already have seen this ID, probably through 3494e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 3495e8137f4fSMarc Zyngier * create the device. 3496e8137f4fSMarc Zyngier */ 34979791ec7dSMarc Zyngier its_dev->shared = true; 3498f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 3499e8137f4fSMarc Zyngier goto out; 3500e8137f4fSMarc Zyngier } 3501b48ac83dSMarc Zyngier 350293f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 35039791ec7dSMarc Zyngier if (!its_dev) { 35049791ec7dSMarc Zyngier err = -ENOMEM; 35059791ec7dSMarc Zyngier goto out; 35069791ec7dSMarc Zyngier } 3507b48ac83dSMarc Zyngier 35085fe71d27SMarc Zyngier if (info->flags & MSI_ALLOC_FLAGS_PROXY_DEVICE) 35095fe71d27SMarc Zyngier its_dev->shared = true; 35105fe71d27SMarc Zyngier 3511f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 3512e8137f4fSMarc Zyngier out: 35139791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 3514b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 35159791ec7dSMarc Zyngier return err; 3516b48ac83dSMarc Zyngier } 3517b48ac83dSMarc Zyngier 351854456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 351954456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 352054456db9SMarc Zyngier }; 352154456db9SMarc Zyngier 3522b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 3523b48ac83dSMarc Zyngier unsigned int virq, 3524b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 3525b48ac83dSMarc Zyngier { 3526f833f57fSMarc Zyngier struct irq_fwspec fwspec; 3527b48ac83dSMarc Zyngier 3528f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 3529f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 3530f833f57fSMarc Zyngier fwspec.param_count = 3; 3531f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 3532f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 3533f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 35343f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 35353f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 35363f010cf1STomasz Nowicki fwspec.param_count = 2; 35373f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 35383f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 3539f833f57fSMarc Zyngier } else { 3540f833f57fSMarc Zyngier return -EINVAL; 3541f833f57fSMarc Zyngier } 3542b48ac83dSMarc Zyngier 3543f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 3544b48ac83dSMarc Zyngier } 3545b48ac83dSMarc Zyngier 3546b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 3547b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 3548b48ac83dSMarc Zyngier { 3549b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 3550b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 355135ae7df2SJulien Grall struct its_node *its = its_dev->its; 3552f0c7bacaSThomas Gleixner struct irq_data *irqd; 3553b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 3554b48ac83dSMarc Zyngier int err; 3555b48ac83dSMarc Zyngier int i; 3556b48ac83dSMarc Zyngier 35578208d170SMarc Zyngier err = its_alloc_device_irq(its_dev, nr_irqs, &hwirq); 3558b48ac83dSMarc Zyngier if (err) 3559b48ac83dSMarc Zyngier return err; 3560b48ac83dSMarc Zyngier 356135ae7df2SJulien Grall err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); 356235ae7df2SJulien Grall if (err) 356335ae7df2SJulien Grall return err; 356435ae7df2SJulien Grall 35658208d170SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 35668208d170SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); 3567b48ac83dSMarc Zyngier if (err) 3568b48ac83dSMarc Zyngier return err; 3569b48ac83dSMarc Zyngier 3570b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 35718208d170SMarc Zyngier hwirq + i, &its_irq_chip, its_dev); 3572f0c7bacaSThomas Gleixner irqd = irq_get_irq_data(virq + i); 3573f0c7bacaSThomas Gleixner irqd_set_single_target(irqd); 3574f0c7bacaSThomas Gleixner irqd_set_affinity_on_activate(irqd); 3575f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 35768208d170SMarc Zyngier (int)(hwirq + i - its_dev->event_map.lpi_base), 35778208d170SMarc Zyngier (int)(hwirq + i), virq + i); 3578b48ac83dSMarc Zyngier } 3579b48ac83dSMarc Zyngier 3580b48ac83dSMarc Zyngier return 0; 3581b48ac83dSMarc Zyngier } 3582b48ac83dSMarc Zyngier 358372491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 3584702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3585aca268dfSMarc Zyngier { 3586aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3587aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 35880d224d35SMarc Zyngier int cpu; 3589fbf8f40eSGanapatrao Kulkarni 3590c5d6082dSMarc Zyngier cpu = its_select_cpu(d, cpu_online_mask); 3591c5d6082dSMarc Zyngier if (cpu < 0 || cpu >= nr_cpu_ids) 3592c1797b11SYang Yingliang return -EINVAL; 3593c1797b11SYang Yingliang 35942f13ff1dSMarc Zyngier its_inc_lpi_count(d, cpu); 35950d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 35960d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3597591e5becSMarc Zyngier 3598aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 35996a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 360072491643SThomas Gleixner return 0; 3601aca268dfSMarc Zyngier } 3602aca268dfSMarc Zyngier 3603aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 3604aca268dfSMarc Zyngier struct irq_data *d) 3605aca268dfSMarc Zyngier { 3606aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3607aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 3608aca268dfSMarc Zyngier 36092f13ff1dSMarc Zyngier its_dec_lpi_count(d, its_dev->event_map.col_map[event]); 3610aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 3611aca268dfSMarc Zyngier its_send_discard(its_dev, event); 3612aca268dfSMarc Zyngier } 3613aca268dfSMarc Zyngier 3614b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 3615b48ac83dSMarc Zyngier unsigned int nr_irqs) 3616b48ac83dSMarc Zyngier { 3617b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 3618b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 36199791ec7dSMarc Zyngier struct its_node *its = its_dev->its; 3620b48ac83dSMarc Zyngier int i; 3621b48ac83dSMarc Zyngier 3622c9c96e30SMarc Zyngier bitmap_release_region(its_dev->event_map.lpi_map, 3623c9c96e30SMarc Zyngier its_get_event_id(irq_domain_get_irq_data(domain, virq)), 3624c9c96e30SMarc Zyngier get_count_order(nr_irqs)); 3625c9c96e30SMarc Zyngier 3626b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 3627b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 3628b48ac83dSMarc Zyngier virq + i); 3629b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 36302da39949SMarc Zyngier irq_domain_reset_irq_data(data); 3631b48ac83dSMarc Zyngier } 3632b48ac83dSMarc Zyngier 36339791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 36349791ec7dSMarc Zyngier 36359791ec7dSMarc Zyngier /* 36369791ec7dSMarc Zyngier * If all interrupts have been freed, start mopping the 3637a359f757SIngo Molnar * floor. This is conditioned on the device not being shared. 36389791ec7dSMarc Zyngier */ 36399791ec7dSMarc Zyngier if (!its_dev->shared && 36409791ec7dSMarc Zyngier bitmap_empty(its_dev->event_map.lpi_map, 3641591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 364238dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 3643cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 3644cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 3645b48ac83dSMarc Zyngier 3646b48ac83dSMarc Zyngier /* Unmap device/itt */ 3647b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 3648b48ac83dSMarc Zyngier its_free_device(its_dev); 3649b48ac83dSMarc Zyngier } 3650b48ac83dSMarc Zyngier 36519791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 36529791ec7dSMarc Zyngier 3653b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 3654b48ac83dSMarc Zyngier } 3655b48ac83dSMarc Zyngier 3656b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 3657b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 3658b48ac83dSMarc Zyngier .free = its_irq_domain_free, 3659aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 3660aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 3661b48ac83dSMarc Zyngier }; 36624c21f3c2SMarc Zyngier 366320b3d54eSMarc Zyngier /* 366420b3d54eSMarc Zyngier * This is insane. 366520b3d54eSMarc Zyngier * 36660684c704SMarc Zyngier * If a GICv4.0 doesn't implement Direct LPIs (which is extremely 366720b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 366820b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 366920b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 367020b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 367120b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 367220b3d54eSMarc Zyngier * 367320b3d54eSMarc Zyngier * Broken by design(tm). 36740684c704SMarc Zyngier * 36750684c704SMarc Zyngier * GICv4.1, on the other hand, mandates that we're able to invalidate 36760684c704SMarc Zyngier * by writing to a MMIO register. It doesn't implement the whole of 36770684c704SMarc Zyngier * DirectLPI, but that's good enough. And most of the time, we don't 36780684c704SMarc Zyngier * even have to invalidate anything, as the redistributor can be told 36790684c704SMarc Zyngier * whether to generate a doorbell or not (we thus leave it enabled, 36800684c704SMarc Zyngier * always). 368120b3d54eSMarc Zyngier */ 368220b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 368320b3d54eSMarc Zyngier { 36840684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 36850684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 36860684c704SMarc Zyngier return; 36870684c704SMarc Zyngier 368820b3d54eSMarc Zyngier /* Already unmapped? */ 368920b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 369020b3d54eSMarc Zyngier return; 369120b3d54eSMarc Zyngier 369220b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 369320b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 369420b3d54eSMarc Zyngier 369520b3d54eSMarc Zyngier /* 369620b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 369720b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 369820b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 369920b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 370020b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 370120b3d54eSMarc Zyngier */ 370220b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 370320b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 370420b3d54eSMarc Zyngier 370520b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 370620b3d54eSMarc Zyngier } 370720b3d54eSMarc Zyngier 370820b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 370920b3d54eSMarc Zyngier { 37100684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37110684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37120684c704SMarc Zyngier return; 37130684c704SMarc Zyngier 371420b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 371520b3d54eSMarc Zyngier unsigned long flags; 371620b3d54eSMarc Zyngier 371720b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 371820b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 371920b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 372020b3d54eSMarc Zyngier } 372120b3d54eSMarc Zyngier } 372220b3d54eSMarc Zyngier 372320b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 372420b3d54eSMarc Zyngier { 37250684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37260684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37270684c704SMarc Zyngier return; 37280684c704SMarc Zyngier 372920b3d54eSMarc Zyngier /* Already mapped? */ 373020b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 373120b3d54eSMarc Zyngier return; 373220b3d54eSMarc Zyngier 373320b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 373420b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 373520b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 373620b3d54eSMarc Zyngier 373720b3d54eSMarc Zyngier /* Map the new VPE instead */ 373820b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 373920b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 374020b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 374120b3d54eSMarc Zyngier 374220b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 374320b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 374420b3d54eSMarc Zyngier } 374520b3d54eSMarc Zyngier 3746958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 3747958b90d1SMarc Zyngier { 3748958b90d1SMarc Zyngier unsigned long flags; 3749958b90d1SMarc Zyngier struct its_collection *target_col; 3750958b90d1SMarc Zyngier 37510684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37520684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37530684c704SMarc Zyngier return; 37540684c704SMarc Zyngier 3755958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3756958b90d1SMarc Zyngier void __iomem *rdbase; 3757958b90d1SMarc Zyngier 3758958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 3759958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 37602f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3761958b90d1SMarc Zyngier 3762958b90d1SMarc Zyngier return; 3763958b90d1SMarc Zyngier } 3764958b90d1SMarc Zyngier 3765958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 3766958b90d1SMarc Zyngier 3767958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 3768958b90d1SMarc Zyngier 3769958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 3770958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 3771958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 3772958b90d1SMarc Zyngier 3773958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 3774958b90d1SMarc Zyngier } 3775958b90d1SMarc Zyngier 37763171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 37773171a47aSMarc Zyngier const struct cpumask *mask_val, 37783171a47aSMarc Zyngier bool force) 37793171a47aSMarc Zyngier { 37803171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3781dd3f050aSMarc Zyngier int from, cpu = cpumask_first(mask_val); 3782f3a05921SMarc Zyngier unsigned long flags; 37833171a47aSMarc Zyngier 37843171a47aSMarc Zyngier /* 37853171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 378620b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 3787958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 3788958b90d1SMarc Zyngier * interrupt to its new location. 3789f3a05921SMarc Zyngier * 3790f3a05921SMarc Zyngier * Another thing is that changing the affinity of a vPE affects 3791f3a05921SMarc Zyngier * *other interrupts* such as all the vLPIs that are routed to 3792f3a05921SMarc Zyngier * this vPE. This means that the irq_desc lock is not enough to 3793f3a05921SMarc Zyngier * protect us, and that we must ensure nobody samples vpe->col_idx 3794f3a05921SMarc Zyngier * during the update, hence the lock below which must also be 3795f3a05921SMarc Zyngier * taken on any vLPI handling path that evaluates vpe->col_idx. 37963171a47aSMarc Zyngier */ 3797f3a05921SMarc Zyngier from = vpe_to_cpuid_lock(vpe, &flags); 3798f3a05921SMarc Zyngier if (from == cpu) 3799dd3f050aSMarc Zyngier goto out; 3800958b90d1SMarc Zyngier 38013171a47aSMarc Zyngier vpe->col_idx = cpu; 3802dd3f050aSMarc Zyngier 3803dd3f050aSMarc Zyngier /* 3804dd3f050aSMarc Zyngier * GICv4.1 allows us to skip VMOVP if moving to a cpu whose RD 3805dd3f050aSMarc Zyngier * is sharing its VPE table with the current one. 3806dd3f050aSMarc Zyngier */ 3807dd3f050aSMarc Zyngier if (gic_data_rdist_cpu(cpu)->vpe_table_mask && 3808dd3f050aSMarc Zyngier cpumask_test_cpu(from, gic_data_rdist_cpu(cpu)->vpe_table_mask)) 3809dd3f050aSMarc Zyngier goto out; 3810dd3f050aSMarc Zyngier 38113171a47aSMarc Zyngier its_send_vmovp(vpe); 3812958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 38133171a47aSMarc Zyngier 3814dd3f050aSMarc Zyngier out: 381544c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3816f3a05921SMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 381744c4c25eSMarc Zyngier 38183171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 38193171a47aSMarc Zyngier } 38203171a47aSMarc Zyngier 382196806229SMarc Zyngier static void its_wait_vpt_parse_complete(void) 382296806229SMarc Zyngier { 382396806229SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 382496806229SMarc Zyngier u64 val; 382596806229SMarc Zyngier 382696806229SMarc Zyngier if (!gic_rdists->has_vpend_valid_dirty) 382796806229SMarc Zyngier return; 382896806229SMarc Zyngier 382931dbb6b1SZenghui Yu WARN_ON_ONCE(readq_relaxed_poll_timeout_atomic(vlpi_base + GICR_VPENDBASER, 383096806229SMarc Zyngier val, 383196806229SMarc Zyngier !(val & GICR_VPENDBASER_Dirty), 38320b394982SShenming Lu 1, 500)); 383396806229SMarc Zyngier } 383496806229SMarc Zyngier 3835e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 3836e643d803SMarc Zyngier { 383750c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3838e643d803SMarc Zyngier u64 val; 3839e643d803SMarc Zyngier 3840e643d803SMarc Zyngier /* Schedule the VPE */ 3841e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 3842e643d803SMarc Zyngier GENMASK_ULL(51, 12); 3843e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 3844e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 3845e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 38465186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 3847e643d803SMarc Zyngier 3848e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 3849e643d803SMarc Zyngier GENMASK_ULL(51, 16); 3850e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 3851b2cb11f4SHeyi Guo val |= GICR_VPENDBASER_InnerShareable; 3852e643d803SMarc Zyngier /* 3853e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 3854e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 3855e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 3856e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 3857e643d803SMarc Zyngier * that the pending table is empty. A good implementation 3858e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 3859e643d803SMarc Zyngier * making this a tolerable issue. 3860e643d803SMarc Zyngier */ 3861e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 3862e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 3863e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 38645186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 3865e643d803SMarc Zyngier } 3866e643d803SMarc Zyngier 3867e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 3868e643d803SMarc Zyngier { 386950c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3870e643d803SMarc Zyngier u64 val; 3871e643d803SMarc Zyngier 3872e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 3873e643d803SMarc Zyngier 3874e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 3875e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 3876e643d803SMarc Zyngier } 3877e643d803SMarc Zyngier 387840619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 387940619a2eSMarc Zyngier { 388040619a2eSMarc Zyngier struct its_node *its; 388140619a2eSMarc Zyngier 388240619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 38830dd57fedSMarc Zyngier if (!is_v4(its)) 388440619a2eSMarc Zyngier continue; 388540619a2eSMarc Zyngier 38862247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 38872247e1bfSMarc Zyngier continue; 38882247e1bfSMarc Zyngier 38893c1cceebSMarc Zyngier /* 38903c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 38913c1cceebSMarc Zyngier * we need is to reach the redistributors. 38923c1cceebSMarc Zyngier */ 389340619a2eSMarc Zyngier its_send_vinvall(its, vpe); 38943c1cceebSMarc Zyngier return; 389540619a2eSMarc Zyngier } 389640619a2eSMarc Zyngier } 389740619a2eSMarc Zyngier 3898e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 3899e643d803SMarc Zyngier { 3900e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3901e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 3902e643d803SMarc Zyngier 3903e643d803SMarc Zyngier switch (info->cmd_type) { 3904e643d803SMarc Zyngier case SCHEDULE_VPE: 3905e643d803SMarc Zyngier its_vpe_schedule(vpe); 3906e643d803SMarc Zyngier return 0; 3907e643d803SMarc Zyngier 3908e643d803SMarc Zyngier case DESCHEDULE_VPE: 3909e643d803SMarc Zyngier its_vpe_deschedule(vpe); 3910e643d803SMarc Zyngier return 0; 3911e643d803SMarc Zyngier 391257e3cebdSShenming Lu case COMMIT_VPE: 391357e3cebdSShenming Lu its_wait_vpt_parse_complete(); 391457e3cebdSShenming Lu return 0; 391557e3cebdSShenming Lu 39165e2f7642SMarc Zyngier case INVALL_VPE: 391740619a2eSMarc Zyngier its_vpe_invall(vpe); 39185e2f7642SMarc Zyngier return 0; 39195e2f7642SMarc Zyngier 3920e643d803SMarc Zyngier default: 3921e643d803SMarc Zyngier return -EINVAL; 3922e643d803SMarc Zyngier } 3923e643d803SMarc Zyngier } 3924e643d803SMarc Zyngier 392520b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 392620b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 392720b3d54eSMarc Zyngier { 392820b3d54eSMarc Zyngier unsigned long flags; 392920b3d54eSMarc Zyngier 393020b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 393120b3d54eSMarc Zyngier 393220b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 393320b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 393420b3d54eSMarc Zyngier 393520b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 393620b3d54eSMarc Zyngier } 393720b3d54eSMarc Zyngier 3938f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 3939f6a91da7SMarc Zyngier { 3940f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 394120b3d54eSMarc Zyngier 394220b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 3943f6a91da7SMarc Zyngier void __iomem *rdbase; 3944f6a91da7SMarc Zyngier 3945425c09beSMarc Zyngier /* Target the redistributor this VPE is currently known on */ 39469058a4e9SMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 3947f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3948425c09beSMarc Zyngier gic_write_lpir(d->parent_data->hwirq, rdbase + GICR_INVLPIR); 39492f4f064bSMarc Zyngier wait_for_syncr(rdbase); 39509058a4e9SMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 395120b3d54eSMarc Zyngier } else { 395220b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 395320b3d54eSMarc Zyngier } 3954f6a91da7SMarc Zyngier } 3955f6a91da7SMarc Zyngier 3956f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 3957f6a91da7SMarc Zyngier { 3958f6a91da7SMarc Zyngier /* 3959f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 3960f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 3961f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 3962f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 3963f6a91da7SMarc Zyngier */ 3964f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 3965f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3966f6a91da7SMarc Zyngier } 3967f6a91da7SMarc Zyngier 3968f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 3969f6a91da7SMarc Zyngier { 3970f6a91da7SMarc Zyngier /* Same hack as above... */ 3971f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 3972f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3973f6a91da7SMarc Zyngier } 3974f6a91da7SMarc Zyngier 3975e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 3976e57a3e28SMarc Zyngier enum irqchip_irq_state which, 3977e57a3e28SMarc Zyngier bool state) 3978e57a3e28SMarc Zyngier { 3979e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3980e57a3e28SMarc Zyngier 3981e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 3982e57a3e28SMarc Zyngier return -EINVAL; 3983e57a3e28SMarc Zyngier 3984e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3985e57a3e28SMarc Zyngier void __iomem *rdbase; 3986e57a3e28SMarc Zyngier 3987e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3988e57a3e28SMarc Zyngier if (state) { 3989e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 3990e57a3e28SMarc Zyngier } else { 3991e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 39922f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3993e57a3e28SMarc Zyngier } 3994e57a3e28SMarc Zyngier } else { 3995e57a3e28SMarc Zyngier if (state) 3996e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 3997e57a3e28SMarc Zyngier else 3998e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 3999e57a3e28SMarc Zyngier } 4000e57a3e28SMarc Zyngier 4001e57a3e28SMarc Zyngier return 0; 4002e57a3e28SMarc Zyngier } 4003e57a3e28SMarc Zyngier 40047809f701SMarc Zyngier static int its_vpe_retrigger(struct irq_data *d) 40057809f701SMarc Zyngier { 40067809f701SMarc Zyngier return !its_vpe_set_irqchip_state(d, IRQCHIP_STATE_PENDING, true); 40077809f701SMarc Zyngier } 40087809f701SMarc Zyngier 40098fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 40108fff27aeSMarc Zyngier .name = "GICv4-vpe", 4011f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 4012f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 4013f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 40143171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 40157809f701SMarc Zyngier .irq_retrigger = its_vpe_retrigger, 4016e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 4017e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 40188fff27aeSMarc Zyngier }; 40198fff27aeSMarc Zyngier 4020d97c97baSMarc Zyngier static struct its_node *find_4_1_its(void) 4021d97c97baSMarc Zyngier { 4022d97c97baSMarc Zyngier static struct its_node *its = NULL; 4023d97c97baSMarc Zyngier 4024d97c97baSMarc Zyngier if (!its) { 4025d97c97baSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 4026d97c97baSMarc Zyngier if (is_v4_1(its)) 4027d97c97baSMarc Zyngier return its; 4028d97c97baSMarc Zyngier } 4029d97c97baSMarc Zyngier 4030d97c97baSMarc Zyngier /* Oops? */ 4031d97c97baSMarc Zyngier its = NULL; 4032d97c97baSMarc Zyngier } 4033d97c97baSMarc Zyngier 4034d97c97baSMarc Zyngier return its; 4035d97c97baSMarc Zyngier } 4036d97c97baSMarc Zyngier 4037d97c97baSMarc Zyngier static void its_vpe_4_1_send_inv(struct irq_data *d) 4038d97c97baSMarc Zyngier { 4039d97c97baSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4040d97c97baSMarc Zyngier struct its_node *its; 4041d97c97baSMarc Zyngier 4042d97c97baSMarc Zyngier /* 4043d97c97baSMarc Zyngier * GICv4.1 wants doorbells to be invalidated using the 4044d97c97baSMarc Zyngier * INVDB command in order to be broadcast to all RDs. Send 4045d97c97baSMarc Zyngier * it to the first valid ITS, and let the HW do its magic. 4046d97c97baSMarc Zyngier */ 4047d97c97baSMarc Zyngier its = find_4_1_its(); 4048d97c97baSMarc Zyngier if (its) 4049d97c97baSMarc Zyngier its_send_invdb(its, vpe); 4050d97c97baSMarc Zyngier } 4051d97c97baSMarc Zyngier 4052d97c97baSMarc Zyngier static void its_vpe_4_1_mask_irq(struct irq_data *d) 4053d97c97baSMarc Zyngier { 4054d97c97baSMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 4055d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 4056d97c97baSMarc Zyngier } 4057d97c97baSMarc Zyngier 4058d97c97baSMarc Zyngier static void its_vpe_4_1_unmask_irq(struct irq_data *d) 4059d97c97baSMarc Zyngier { 4060d97c97baSMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 4061d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 4062d97c97baSMarc Zyngier } 4063d97c97baSMarc Zyngier 406491bf6395SMarc Zyngier static void its_vpe_4_1_schedule(struct its_vpe *vpe, 406591bf6395SMarc Zyngier struct its_cmd_info *info) 406691bf6395SMarc Zyngier { 406791bf6395SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 406891bf6395SMarc Zyngier u64 val = 0; 406991bf6395SMarc Zyngier 407091bf6395SMarc Zyngier /* Schedule the VPE */ 407191bf6395SMarc Zyngier val |= GICR_VPENDBASER_Valid; 407291bf6395SMarc Zyngier val |= info->g0en ? GICR_VPENDBASER_4_1_VGRP0EN : 0; 407391bf6395SMarc Zyngier val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0; 407491bf6395SMarc Zyngier val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id); 407591bf6395SMarc Zyngier 40765186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 407791bf6395SMarc Zyngier } 407891bf6395SMarc Zyngier 4079e64fab1aSMarc Zyngier static void its_vpe_4_1_deschedule(struct its_vpe *vpe, 4080e64fab1aSMarc Zyngier struct its_cmd_info *info) 4081e64fab1aSMarc Zyngier { 4082e64fab1aSMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 4083e64fab1aSMarc Zyngier u64 val; 4084e64fab1aSMarc Zyngier 4085e64fab1aSMarc Zyngier if (info->req_db) { 4086a3f574cdSMarc Zyngier unsigned long flags; 4087a3f574cdSMarc Zyngier 4088e64fab1aSMarc Zyngier /* 4089e64fab1aSMarc Zyngier * vPE is going to block: make the vPE non-resident with 4090e64fab1aSMarc Zyngier * PendingLast clear and DB set. The GIC guarantees that if 4091e64fab1aSMarc Zyngier * we read-back PendingLast clear, then a doorbell will be 4092e64fab1aSMarc Zyngier * delivered when an interrupt comes. 4093a3f574cdSMarc Zyngier * 4094a3f574cdSMarc Zyngier * Note the locking to deal with the concurrent update of 4095a3f574cdSMarc Zyngier * pending_last from the doorbell interrupt handler that can 4096a3f574cdSMarc Zyngier * run concurrently. 4097e64fab1aSMarc Zyngier */ 4098a3f574cdSMarc Zyngier raw_spin_lock_irqsave(&vpe->vpe_lock, flags); 4099e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 4100e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast, 4101e64fab1aSMarc Zyngier GICR_VPENDBASER_4_1_DB); 4102e64fab1aSMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 4103a3f574cdSMarc Zyngier raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); 4104e64fab1aSMarc Zyngier } else { 4105e64fab1aSMarc Zyngier /* 4106e64fab1aSMarc Zyngier * We're not blocking, so just make the vPE non-resident 4107e64fab1aSMarc Zyngier * with PendingLast set, indicating that we'll be back. 4108e64fab1aSMarc Zyngier */ 4109e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 4110e64fab1aSMarc Zyngier 0, 4111e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast); 4112e64fab1aSMarc Zyngier vpe->pending_last = true; 4113e64fab1aSMarc Zyngier } 4114e64fab1aSMarc Zyngier } 4115e64fab1aSMarc Zyngier 4116b4a4bd0fSMarc Zyngier static void its_vpe_4_1_invall(struct its_vpe *vpe) 4117b4a4bd0fSMarc Zyngier { 4118b4a4bd0fSMarc Zyngier void __iomem *rdbase; 41193af9571cSZenghui Yu unsigned long flags; 4120b4a4bd0fSMarc Zyngier u64 val; 41213af9571cSZenghui Yu int cpu; 4122b4a4bd0fSMarc Zyngier 4123b4a4bd0fSMarc Zyngier val = GICR_INVALLR_V; 4124b4a4bd0fSMarc Zyngier val |= FIELD_PREP(GICR_INVALLR_VPEID, vpe->vpe_id); 4125b4a4bd0fSMarc Zyngier 4126b4a4bd0fSMarc Zyngier /* Target the redistributor this vPE is currently known on */ 41273af9571cSZenghui Yu cpu = vpe_to_cpuid_lock(vpe, &flags); 41283af9571cSZenghui Yu raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 41293af9571cSZenghui Yu rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; 4130b4a4bd0fSMarc Zyngier gic_write_lpir(val, rdbase + GICR_INVALLR); 4131b978c25fSZenghui Yu 4132b978c25fSZenghui Yu wait_for_syncr(rdbase); 41333af9571cSZenghui Yu raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 41343af9571cSZenghui Yu vpe_to_cpuid_unlock(vpe, flags); 4135b4a4bd0fSMarc Zyngier } 4136b4a4bd0fSMarc Zyngier 413729c647f3SMarc Zyngier static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 413829c647f3SMarc Zyngier { 413991bf6395SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 414029c647f3SMarc Zyngier struct its_cmd_info *info = vcpu_info; 414129c647f3SMarc Zyngier 414229c647f3SMarc Zyngier switch (info->cmd_type) { 414329c647f3SMarc Zyngier case SCHEDULE_VPE: 414491bf6395SMarc Zyngier its_vpe_4_1_schedule(vpe, info); 414529c647f3SMarc Zyngier return 0; 414629c647f3SMarc Zyngier 414729c647f3SMarc Zyngier case DESCHEDULE_VPE: 4148e64fab1aSMarc Zyngier its_vpe_4_1_deschedule(vpe, info); 414929c647f3SMarc Zyngier return 0; 415029c647f3SMarc Zyngier 415157e3cebdSShenming Lu case COMMIT_VPE: 415257e3cebdSShenming Lu its_wait_vpt_parse_complete(); 415357e3cebdSShenming Lu return 0; 415457e3cebdSShenming Lu 415529c647f3SMarc Zyngier case INVALL_VPE: 4156b4a4bd0fSMarc Zyngier its_vpe_4_1_invall(vpe); 415729c647f3SMarc Zyngier return 0; 415829c647f3SMarc Zyngier 415929c647f3SMarc Zyngier default: 416029c647f3SMarc Zyngier return -EINVAL; 416129c647f3SMarc Zyngier } 416229c647f3SMarc Zyngier } 416329c647f3SMarc Zyngier 416429c647f3SMarc Zyngier static struct irq_chip its_vpe_4_1_irq_chip = { 416529c647f3SMarc Zyngier .name = "GICv4.1-vpe", 4166d97c97baSMarc Zyngier .irq_mask = its_vpe_4_1_mask_irq, 4167d97c97baSMarc Zyngier .irq_unmask = its_vpe_4_1_unmask_irq, 416829c647f3SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 416929c647f3SMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 417029c647f3SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_4_1_set_vcpu_affinity, 417129c647f3SMarc Zyngier }; 417229c647f3SMarc Zyngier 4173e252cf8aSMarc Zyngier static void its_configure_sgi(struct irq_data *d, bool clear) 4174e252cf8aSMarc Zyngier { 4175e252cf8aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4176e252cf8aSMarc Zyngier struct its_cmd_desc desc; 4177e252cf8aSMarc Zyngier 4178e252cf8aSMarc Zyngier desc.its_vsgi_cmd.vpe = vpe; 4179e252cf8aSMarc Zyngier desc.its_vsgi_cmd.sgi = d->hwirq; 4180e252cf8aSMarc Zyngier desc.its_vsgi_cmd.priority = vpe->sgi_config[d->hwirq].priority; 4181e252cf8aSMarc Zyngier desc.its_vsgi_cmd.enable = vpe->sgi_config[d->hwirq].enabled; 4182e252cf8aSMarc Zyngier desc.its_vsgi_cmd.group = vpe->sgi_config[d->hwirq].group; 4183e252cf8aSMarc Zyngier desc.its_vsgi_cmd.clear = clear; 4184e252cf8aSMarc Zyngier 4185e252cf8aSMarc Zyngier /* 4186e252cf8aSMarc Zyngier * GICv4.1 allows us to send VSGI commands to any ITS as long as the 4187e252cf8aSMarc Zyngier * destination VPE is mapped there. Since we map them eagerly at 4188e252cf8aSMarc Zyngier * activation time, we're pretty sure the first GICv4.1 ITS will do. 4189e252cf8aSMarc Zyngier */ 4190e252cf8aSMarc Zyngier its_send_single_vcommand(find_4_1_its(), its_build_vsgi_cmd, &desc); 4191e252cf8aSMarc Zyngier } 4192e252cf8aSMarc Zyngier 4193b4e8d644SMarc Zyngier static void its_sgi_mask_irq(struct irq_data *d) 4194b4e8d644SMarc Zyngier { 4195b4e8d644SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4196b4e8d644SMarc Zyngier 4197b4e8d644SMarc Zyngier vpe->sgi_config[d->hwirq].enabled = false; 4198b4e8d644SMarc Zyngier its_configure_sgi(d, false); 4199b4e8d644SMarc Zyngier } 4200b4e8d644SMarc Zyngier 4201b4e8d644SMarc Zyngier static void its_sgi_unmask_irq(struct irq_data *d) 4202b4e8d644SMarc Zyngier { 4203b4e8d644SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4204b4e8d644SMarc Zyngier 4205b4e8d644SMarc Zyngier vpe->sgi_config[d->hwirq].enabled = true; 4206b4e8d644SMarc Zyngier its_configure_sgi(d, false); 4207b4e8d644SMarc Zyngier } 4208b4e8d644SMarc Zyngier 4209166cba71SMarc Zyngier static int its_sgi_set_affinity(struct irq_data *d, 4210166cba71SMarc Zyngier const struct cpumask *mask_val, 4211166cba71SMarc Zyngier bool force) 4212166cba71SMarc Zyngier { 4213166cba71SMarc Zyngier /* 4214166cba71SMarc Zyngier * There is no notion of affinity for virtual SGIs, at least 4215a359f757SIngo Molnar * not on the host (since they can only be targeting a vPE). 4216166cba71SMarc Zyngier * Tell the kernel we've done whatever it asked for. 4217166cba71SMarc Zyngier */ 42184b2dfe1eSMarc Zyngier irq_data_update_effective_affinity(d, mask_val); 4219166cba71SMarc Zyngier return IRQ_SET_MASK_OK; 4220166cba71SMarc Zyngier } 4221166cba71SMarc Zyngier 42227017ff0eSMarc Zyngier static int its_sgi_set_irqchip_state(struct irq_data *d, 42237017ff0eSMarc Zyngier enum irqchip_irq_state which, 42247017ff0eSMarc Zyngier bool state) 42257017ff0eSMarc Zyngier { 42267017ff0eSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 42277017ff0eSMarc Zyngier return -EINVAL; 42287017ff0eSMarc Zyngier 42297017ff0eSMarc Zyngier if (state) { 42307017ff0eSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 42317017ff0eSMarc Zyngier struct its_node *its = find_4_1_its(); 42327017ff0eSMarc Zyngier u64 val; 42337017ff0eSMarc Zyngier 42347017ff0eSMarc Zyngier val = FIELD_PREP(GITS_SGIR_VPEID, vpe->vpe_id); 42357017ff0eSMarc Zyngier val |= FIELD_PREP(GITS_SGIR_VINTID, d->hwirq); 42367017ff0eSMarc Zyngier writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); 42377017ff0eSMarc Zyngier } else { 42387017ff0eSMarc Zyngier its_configure_sgi(d, true); 42397017ff0eSMarc Zyngier } 42407017ff0eSMarc Zyngier 42417017ff0eSMarc Zyngier return 0; 42427017ff0eSMarc Zyngier } 42437017ff0eSMarc Zyngier 42447017ff0eSMarc Zyngier static int its_sgi_get_irqchip_state(struct irq_data *d, 42457017ff0eSMarc Zyngier enum irqchip_irq_state which, bool *val) 42467017ff0eSMarc Zyngier { 42477017ff0eSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 42487017ff0eSMarc Zyngier void __iomem *base; 42497017ff0eSMarc Zyngier unsigned long flags; 42507017ff0eSMarc Zyngier u32 count = 1000000; /* 1s! */ 42517017ff0eSMarc Zyngier u32 status; 42527017ff0eSMarc Zyngier int cpu; 42537017ff0eSMarc Zyngier 42547017ff0eSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 42557017ff0eSMarc Zyngier return -EINVAL; 42567017ff0eSMarc Zyngier 42577017ff0eSMarc Zyngier /* 42587017ff0eSMarc Zyngier * Locking galore! We can race against two different events: 42597017ff0eSMarc Zyngier * 4260a359f757SIngo Molnar * - Concurrent vPE affinity change: we must make sure it cannot 42617017ff0eSMarc Zyngier * happen, or we'll talk to the wrong redistributor. This is 42627017ff0eSMarc Zyngier * identical to what happens with vLPIs. 42637017ff0eSMarc Zyngier * 42647017ff0eSMarc Zyngier * - Concurrent VSGIPENDR access: As it involves accessing two 42657017ff0eSMarc Zyngier * MMIO registers, this must be made atomic one way or another. 42667017ff0eSMarc Zyngier */ 42677017ff0eSMarc Zyngier cpu = vpe_to_cpuid_lock(vpe, &flags); 42687017ff0eSMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 42697017ff0eSMarc Zyngier base = gic_data_rdist_cpu(cpu)->rd_base + SZ_128K; 42707017ff0eSMarc Zyngier writel_relaxed(vpe->vpe_id, base + GICR_VSGIR); 42717017ff0eSMarc Zyngier do { 42727017ff0eSMarc Zyngier status = readl_relaxed(base + GICR_VSGIPENDR); 42737017ff0eSMarc Zyngier if (!(status & GICR_VSGIPENDR_BUSY)) 42747017ff0eSMarc Zyngier goto out; 42757017ff0eSMarc Zyngier 42767017ff0eSMarc Zyngier count--; 42777017ff0eSMarc Zyngier if (!count) { 42787017ff0eSMarc Zyngier pr_err_ratelimited("Unable to get SGI status\n"); 42797017ff0eSMarc Zyngier goto out; 42807017ff0eSMarc Zyngier } 42817017ff0eSMarc Zyngier cpu_relax(); 42827017ff0eSMarc Zyngier udelay(1); 42837017ff0eSMarc Zyngier } while (count); 42847017ff0eSMarc Zyngier 42857017ff0eSMarc Zyngier out: 42867017ff0eSMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 42877017ff0eSMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 42887017ff0eSMarc Zyngier 42897017ff0eSMarc Zyngier if (!count) 42907017ff0eSMarc Zyngier return -ENXIO; 42917017ff0eSMarc Zyngier 42927017ff0eSMarc Zyngier *val = !!(status & (1 << d->hwirq)); 42937017ff0eSMarc Zyngier 42947017ff0eSMarc Zyngier return 0; 42957017ff0eSMarc Zyngier } 42967017ff0eSMarc Zyngier 429705d32df1SMarc Zyngier static int its_sgi_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 429805d32df1SMarc Zyngier { 429905d32df1SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 430005d32df1SMarc Zyngier struct its_cmd_info *info = vcpu_info; 430105d32df1SMarc Zyngier 430205d32df1SMarc Zyngier switch (info->cmd_type) { 430305d32df1SMarc Zyngier case PROP_UPDATE_VSGI: 430405d32df1SMarc Zyngier vpe->sgi_config[d->hwirq].priority = info->priority; 430505d32df1SMarc Zyngier vpe->sgi_config[d->hwirq].group = info->group; 430605d32df1SMarc Zyngier its_configure_sgi(d, false); 430705d32df1SMarc Zyngier return 0; 430805d32df1SMarc Zyngier 430905d32df1SMarc Zyngier default: 431005d32df1SMarc Zyngier return -EINVAL; 431105d32df1SMarc Zyngier } 431205d32df1SMarc Zyngier } 431305d32df1SMarc Zyngier 4314166cba71SMarc Zyngier static struct irq_chip its_sgi_irq_chip = { 4315166cba71SMarc Zyngier .name = "GICv4.1-sgi", 4316b4e8d644SMarc Zyngier .irq_mask = its_sgi_mask_irq, 4317b4e8d644SMarc Zyngier .irq_unmask = its_sgi_unmask_irq, 4318166cba71SMarc Zyngier .irq_set_affinity = its_sgi_set_affinity, 43197017ff0eSMarc Zyngier .irq_set_irqchip_state = its_sgi_set_irqchip_state, 43207017ff0eSMarc Zyngier .irq_get_irqchip_state = its_sgi_get_irqchip_state, 432105d32df1SMarc Zyngier .irq_set_vcpu_affinity = its_sgi_set_vcpu_affinity, 4322166cba71SMarc Zyngier }; 4323166cba71SMarc Zyngier 4324166cba71SMarc Zyngier static int its_sgi_irq_domain_alloc(struct irq_domain *domain, 4325166cba71SMarc Zyngier unsigned int virq, unsigned int nr_irqs, 4326166cba71SMarc Zyngier void *args) 4327166cba71SMarc Zyngier { 4328166cba71SMarc Zyngier struct its_vpe *vpe = args; 4329166cba71SMarc Zyngier int i; 4330166cba71SMarc Zyngier 4331166cba71SMarc Zyngier /* Yes, we do want 16 SGIs */ 4332166cba71SMarc Zyngier WARN_ON(nr_irqs != 16); 4333166cba71SMarc Zyngier 4334166cba71SMarc Zyngier for (i = 0; i < 16; i++) { 4335166cba71SMarc Zyngier vpe->sgi_config[i].priority = 0; 4336166cba71SMarc Zyngier vpe->sgi_config[i].enabled = false; 4337166cba71SMarc Zyngier vpe->sgi_config[i].group = false; 4338166cba71SMarc Zyngier 4339166cba71SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 4340166cba71SMarc Zyngier &its_sgi_irq_chip, vpe); 4341166cba71SMarc Zyngier irq_set_status_flags(virq + i, IRQ_DISABLE_UNLAZY); 4342166cba71SMarc Zyngier } 4343166cba71SMarc Zyngier 4344166cba71SMarc Zyngier return 0; 4345166cba71SMarc Zyngier } 4346166cba71SMarc Zyngier 4347166cba71SMarc Zyngier static void its_sgi_irq_domain_free(struct irq_domain *domain, 4348166cba71SMarc Zyngier unsigned int virq, 4349166cba71SMarc Zyngier unsigned int nr_irqs) 4350166cba71SMarc Zyngier { 4351166cba71SMarc Zyngier /* Nothing to do */ 4352166cba71SMarc Zyngier } 4353166cba71SMarc Zyngier 4354166cba71SMarc Zyngier static int its_sgi_irq_domain_activate(struct irq_domain *domain, 4355166cba71SMarc Zyngier struct irq_data *d, bool reserve) 4356166cba71SMarc Zyngier { 4357e252cf8aSMarc Zyngier /* Write out the initial SGI configuration */ 4358e252cf8aSMarc Zyngier its_configure_sgi(d, false); 4359166cba71SMarc Zyngier return 0; 4360166cba71SMarc Zyngier } 4361166cba71SMarc Zyngier 4362166cba71SMarc Zyngier static void its_sgi_irq_domain_deactivate(struct irq_domain *domain, 4363166cba71SMarc Zyngier struct irq_data *d) 4364166cba71SMarc Zyngier { 4365e252cf8aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4366e252cf8aSMarc Zyngier 4367e252cf8aSMarc Zyngier /* 4368e252cf8aSMarc Zyngier * The VSGI command is awkward: 4369e252cf8aSMarc Zyngier * 4370e252cf8aSMarc Zyngier * - To change the configuration, CLEAR must be set to false, 4371e252cf8aSMarc Zyngier * leaving the pending bit unchanged. 4372e252cf8aSMarc Zyngier * - To clear the pending bit, CLEAR must be set to true, leaving 4373e252cf8aSMarc Zyngier * the configuration unchanged. 4374e252cf8aSMarc Zyngier * 4375e252cf8aSMarc Zyngier * You just can't do both at once, hence the two commands below. 4376e252cf8aSMarc Zyngier */ 4377e252cf8aSMarc Zyngier vpe->sgi_config[d->hwirq].enabled = false; 4378e252cf8aSMarc Zyngier its_configure_sgi(d, false); 4379e252cf8aSMarc Zyngier its_configure_sgi(d, true); 4380166cba71SMarc Zyngier } 4381166cba71SMarc Zyngier 4382166cba71SMarc Zyngier static const struct irq_domain_ops its_sgi_domain_ops = { 4383166cba71SMarc Zyngier .alloc = its_sgi_irq_domain_alloc, 4384166cba71SMarc Zyngier .free = its_sgi_irq_domain_free, 4385166cba71SMarc Zyngier .activate = its_sgi_irq_domain_activate, 4386166cba71SMarc Zyngier .deactivate = its_sgi_irq_domain_deactivate, 4387166cba71SMarc Zyngier }; 4388166cba71SMarc Zyngier 43897d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 43907d75bbb4SMarc Zyngier { 439132bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 43927d75bbb4SMarc Zyngier } 43937d75bbb4SMarc Zyngier 43947d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 43957d75bbb4SMarc Zyngier { 43967d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 43977d75bbb4SMarc Zyngier } 43987d75bbb4SMarc Zyngier 43997d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 44007d75bbb4SMarc Zyngier { 44017d75bbb4SMarc Zyngier struct page *vpt_page; 44027d75bbb4SMarc Zyngier int vpe_id; 44037d75bbb4SMarc Zyngier 44047d75bbb4SMarc Zyngier /* Allocate vpe_id */ 44057d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 44067d75bbb4SMarc Zyngier if (vpe_id < 0) 44077d75bbb4SMarc Zyngier return vpe_id; 44087d75bbb4SMarc Zyngier 44097d75bbb4SMarc Zyngier /* Allocate VPT */ 44107d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 44117d75bbb4SMarc Zyngier if (!vpt_page) { 44127d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 44137d75bbb4SMarc Zyngier return -ENOMEM; 44147d75bbb4SMarc Zyngier } 44157d75bbb4SMarc Zyngier 44167d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 44177d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 441834f8eb92SNianyao Tang its_free_pending_table(vpt_page); 44197d75bbb4SMarc Zyngier return -ENOMEM; 44207d75bbb4SMarc Zyngier } 44217d75bbb4SMarc Zyngier 4422f3a05921SMarc Zyngier raw_spin_lock_init(&vpe->vpe_lock); 44237d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 44247d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 442564edfaa9SMarc Zyngier if (gic_rdists->has_rvpeid) 442664edfaa9SMarc Zyngier atomic_set(&vpe->vmapp_count, 0); 442764edfaa9SMarc Zyngier else 442820b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 44297d75bbb4SMarc Zyngier 44307d75bbb4SMarc Zyngier return 0; 44317d75bbb4SMarc Zyngier } 44327d75bbb4SMarc Zyngier 44337d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 44347d75bbb4SMarc Zyngier { 443520b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 44367d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 44377d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 44387d75bbb4SMarc Zyngier } 44397d75bbb4SMarc Zyngier 44407d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 44417d75bbb4SMarc Zyngier unsigned int virq, 44427d75bbb4SMarc Zyngier unsigned int nr_irqs) 44437d75bbb4SMarc Zyngier { 44447d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 44457d75bbb4SMarc Zyngier int i; 44467d75bbb4SMarc Zyngier 44477d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 44487d75bbb4SMarc Zyngier 44497d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 44507d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 44517d75bbb4SMarc Zyngier virq + i); 44527d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 44537d75bbb4SMarc Zyngier 44547d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 44557d75bbb4SMarc Zyngier 44567d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 44577d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 44587d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 44597d75bbb4SMarc Zyngier } 44607d75bbb4SMarc Zyngier 44617d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 446238dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 44637d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 44647d75bbb4SMarc Zyngier } 44657d75bbb4SMarc Zyngier } 44667d75bbb4SMarc Zyngier 44677d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 44687d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 44697d75bbb4SMarc Zyngier { 447029c647f3SMarc Zyngier struct irq_chip *irqchip = &its_vpe_irq_chip; 44717d75bbb4SMarc Zyngier struct its_vm *vm = args; 44727d75bbb4SMarc Zyngier unsigned long *bitmap; 44737d75bbb4SMarc Zyngier struct page *vprop_page; 44747d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 44757d75bbb4SMarc Zyngier 44767d75bbb4SMarc Zyngier BUG_ON(!vm); 44777d75bbb4SMarc Zyngier 447838dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 44797d75bbb4SMarc Zyngier if (!bitmap) 44807d75bbb4SMarc Zyngier return -ENOMEM; 44817d75bbb4SMarc Zyngier 44827d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 448338dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 44847d75bbb4SMarc Zyngier return -ENOMEM; 44857d75bbb4SMarc Zyngier } 44867d75bbb4SMarc Zyngier 44877d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 44887d75bbb4SMarc Zyngier if (!vprop_page) { 448938dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 44907d75bbb4SMarc Zyngier return -ENOMEM; 44917d75bbb4SMarc Zyngier } 44927d75bbb4SMarc Zyngier 44937d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 44947d75bbb4SMarc Zyngier vm->db_lpi_base = base; 44957d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 44967d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 44977d75bbb4SMarc Zyngier 449829c647f3SMarc Zyngier if (gic_rdists->has_rvpeid) 449929c647f3SMarc Zyngier irqchip = &its_vpe_4_1_irq_chip; 450029c647f3SMarc Zyngier 45017d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 45027d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 45037d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 45047d75bbb4SMarc Zyngier if (err) 45057d75bbb4SMarc Zyngier break; 45067d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 45077d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 45087d75bbb4SMarc Zyngier if (err) 45097d75bbb4SMarc Zyngier break; 45107d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 451129c647f3SMarc Zyngier irqchip, vm->vpes[i]); 45127d75bbb4SMarc Zyngier set_bit(i, bitmap); 45137d75bbb4SMarc Zyngier } 45147d75bbb4SMarc Zyngier 45157d75bbb4SMarc Zyngier if (err) { 45167d75bbb4SMarc Zyngier if (i > 0) 4517280bef51SKaige Fu its_vpe_irq_domain_free(domain, virq, i); 45187d75bbb4SMarc Zyngier 451938dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 45207d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 45217d75bbb4SMarc Zyngier } 45227d75bbb4SMarc Zyngier 45237d75bbb4SMarc Zyngier return err; 45247d75bbb4SMarc Zyngier } 45257d75bbb4SMarc Zyngier 452672491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 4527702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 4528eb78192bSMarc Zyngier { 4529eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 453040619a2eSMarc Zyngier struct its_node *its; 4531eb78192bSMarc Zyngier 4532009384b3SMarc Zyngier /* 4533009384b3SMarc Zyngier * If we use the list map, we issue VMAPP on demand... Unless 4534009384b3SMarc Zyngier * we're on a GICv4.1 and we eagerly map the VPE on all ITSs 4535009384b3SMarc Zyngier * so that VSGIs can work. 4536009384b3SMarc Zyngier */ 4537009384b3SMarc Zyngier if (!gic_requires_eager_mapping()) 45386ef930f2SMarc Zyngier return 0; 4539eb78192bSMarc Zyngier 4540eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 4541eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 454240619a2eSMarc Zyngier 454340619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 45440dd57fedSMarc Zyngier if (!is_v4(its)) 454540619a2eSMarc Zyngier continue; 454640619a2eSMarc Zyngier 454775fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 454840619a2eSMarc Zyngier its_send_vinvall(its, vpe); 454940619a2eSMarc Zyngier } 455040619a2eSMarc Zyngier 455144c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 455244c4c25eSMarc Zyngier 455372491643SThomas Gleixner return 0; 4554eb78192bSMarc Zyngier } 4555eb78192bSMarc Zyngier 4556eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 4557eb78192bSMarc Zyngier struct irq_data *d) 4558eb78192bSMarc Zyngier { 4559eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 456075fd951bSMarc Zyngier struct its_node *its; 4561eb78192bSMarc Zyngier 45622247e1bfSMarc Zyngier /* 4563009384b3SMarc Zyngier * If we use the list map on GICv4.0, we unmap the VPE once no 4564009384b3SMarc Zyngier * VLPIs are associated with the VM. 45652247e1bfSMarc Zyngier */ 4566009384b3SMarc Zyngier if (!gic_requires_eager_mapping()) 45672247e1bfSMarc Zyngier return; 45682247e1bfSMarc Zyngier 456975fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 45700dd57fedSMarc Zyngier if (!is_v4(its)) 457175fd951bSMarc Zyngier continue; 457275fd951bSMarc Zyngier 457375fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 457475fd951bSMarc Zyngier } 4575301beaf1SMarc Zyngier 4576301beaf1SMarc Zyngier /* 4577301beaf1SMarc Zyngier * There may be a direct read to the VPT after unmapping the 4578301beaf1SMarc Zyngier * vPE, to guarantee the validity of this, we make the VPT 4579301beaf1SMarc Zyngier * memory coherent with the CPU caches here. 4580301beaf1SMarc Zyngier */ 4581301beaf1SMarc Zyngier if (find_4_1_its() && !atomic_read(&vpe->vmapp_count)) 4582301beaf1SMarc Zyngier gic_flush_dcache_to_poc(page_address(vpe->vpt_page), 4583301beaf1SMarc Zyngier LPI_PENDBASE_SZ); 4584eb78192bSMarc Zyngier } 4585eb78192bSMarc Zyngier 45868fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 45877d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 45887d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 4589eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 4590eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 45918fff27aeSMarc Zyngier }; 45928fff27aeSMarc Zyngier 45934559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 45944559fbb3SYun Wu { 45954559fbb3SYun Wu u32 count = 1000000; /* 1s */ 45964559fbb3SYun Wu u32 val; 45974559fbb3SYun Wu 45984559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 45997611da86SDavid Daney /* 46007611da86SDavid Daney * GIC architecture specification requires the ITS to be both 46017611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 46027611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 46037611da86SDavid Daney */ 46047611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 46054559fbb3SYun Wu return 0; 46064559fbb3SYun Wu 46074559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 4608d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 46094559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 46104559fbb3SYun Wu 46114559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 46124559fbb3SYun Wu while (1) { 46134559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 46144559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 46154559fbb3SYun Wu return 0; 46164559fbb3SYun Wu 46174559fbb3SYun Wu count--; 46184559fbb3SYun Wu if (!count) 46194559fbb3SYun Wu return -EBUSY; 46204559fbb3SYun Wu 46214559fbb3SYun Wu cpu_relax(); 46224559fbb3SYun Wu udelay(1); 46234559fbb3SYun Wu } 46244559fbb3SYun Wu } 46254559fbb3SYun Wu 46269d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 462794100970SRobert Richter { 462894100970SRobert Richter struct its_node *its = data; 462994100970SRobert Richter 4630576a8342SMarc Zyngier /* erratum 22375: only alloc 8MB table size (20 bits) */ 4631576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 4632576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); 463394100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 46349d111d49SArd Biesheuvel 46359d111d49SArd Biesheuvel return true; 463694100970SRobert Richter } 463794100970SRobert Richter 46389d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 4639fbf8f40eSGanapatrao Kulkarni { 4640fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 4641fbf8f40eSGanapatrao Kulkarni 4642fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 46439d111d49SArd Biesheuvel 46449d111d49SArd Biesheuvel return true; 4645fbf8f40eSGanapatrao Kulkarni } 4646fbf8f40eSGanapatrao Kulkarni 46479d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 464890922a2dSShanker Donthineni { 464990922a2dSShanker Donthineni struct its_node *its = data; 465090922a2dSShanker Donthineni 465190922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 4652ffedbf0cSMarc Zyngier its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; 4653ffedbf0cSMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); 46549d111d49SArd Biesheuvel 46559d111d49SArd Biesheuvel return true; 465690922a2dSShanker Donthineni } 465790922a2dSShanker Donthineni 4658558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 4659558b0165SArd Biesheuvel { 4660558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 4661558b0165SArd Biesheuvel 4662558b0165SArd Biesheuvel /* 4663558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 4664558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 4665558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 4666558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 4667558b0165SArd Biesheuvel * the window offset. 4668558b0165SArd Biesheuvel */ 4669558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 4670558b0165SArd Biesheuvel } 4671558b0165SArd Biesheuvel 4672558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 4673558b0165SArd Biesheuvel { 4674558b0165SArd Biesheuvel struct its_node *its = data; 4675558b0165SArd Biesheuvel u32 pre_its_window[2]; 4676558b0165SArd Biesheuvel u32 ids; 4677558b0165SArd Biesheuvel 4678558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 4679558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 4680558b0165SArd Biesheuvel pre_its_window, 4681558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 4682558b0165SArd Biesheuvel 4683558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 4684558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 4685558b0165SArd Biesheuvel 4686558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 4687576a8342SMarc Zyngier if (device_ids(its) > ids) { 4688576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 4689576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); 4690576a8342SMarc Zyngier } 4691558b0165SArd Biesheuvel 4692558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 4693558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 4694558b0165SArd Biesheuvel return true; 4695558b0165SArd Biesheuvel } 4696558b0165SArd Biesheuvel return false; 4697558b0165SArd Biesheuvel } 4698558b0165SArd Biesheuvel 46995c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 47005c9a882eSMarc Zyngier { 47015c9a882eSMarc Zyngier struct its_node *its = data; 47025c9a882eSMarc Zyngier 47035c9a882eSMarc Zyngier /* 47045c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 47055c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 47065c9a882eSMarc Zyngier */ 47075c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 47085c9a882eSMarc Zyngier return true; 4709cc2d3216SMarc Zyngier } 47104c21f3c2SMarc Zyngier 471167510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 471294100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 471394100970SRobert Richter { 471494100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 471594100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 471694100970SRobert Richter .mask = 0xffff0fff, 471794100970SRobert Richter .init = its_enable_quirk_cavium_22375, 471894100970SRobert Richter }, 471994100970SRobert Richter #endif 4720fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 4721fbf8f40eSGanapatrao Kulkarni { 4722fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 4723fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 4724fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 4725fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 4726fbf8f40eSGanapatrao Kulkarni }, 4727fbf8f40eSGanapatrao Kulkarni #endif 472890922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 472990922a2dSShanker Donthineni { 473090922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 473190922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 473290922a2dSShanker Donthineni .mask = 0xffffffff, 473390922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 473490922a2dSShanker Donthineni }, 473590922a2dSShanker Donthineni #endif 4736558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 4737558b0165SArd Biesheuvel { 4738558b0165SArd Biesheuvel /* 4739558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 4740558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 4741558b0165SArd Biesheuvel * special handling in software. 4742558b0165SArd Biesheuvel */ 4743558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 4744558b0165SArd Biesheuvel .iidr = 0x0001143b, 4745558b0165SArd Biesheuvel .mask = 0xffffffff, 4746558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 4747558b0165SArd Biesheuvel }, 4748558b0165SArd Biesheuvel #endif 47495c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 47505c9a882eSMarc Zyngier { 47515c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 47525c9a882eSMarc Zyngier .iidr = 0x00000004, 47535c9a882eSMarc Zyngier .mask = 0xffffffff, 47545c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 47555c9a882eSMarc Zyngier }, 47565c9a882eSMarc Zyngier #endif 475767510ccaSRobert Richter { 475867510ccaSRobert Richter } 475967510ccaSRobert Richter }; 476067510ccaSRobert Richter 476167510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 476267510ccaSRobert Richter { 476367510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 476467510ccaSRobert Richter 476567510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 476667510ccaSRobert Richter } 476767510ccaSRobert Richter 4768dba0bc7bSDerek Basehore static int its_save_disable(void) 4769dba0bc7bSDerek Basehore { 4770dba0bc7bSDerek Basehore struct its_node *its; 4771dba0bc7bSDerek Basehore int err = 0; 4772dba0bc7bSDerek Basehore 4773a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4774dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4775dba0bc7bSDerek Basehore void __iomem *base; 4776dba0bc7bSDerek Basehore 4777dba0bc7bSDerek Basehore base = its->base; 4778dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 4779dba0bc7bSDerek Basehore err = its_force_quiescent(base); 4780dba0bc7bSDerek Basehore if (err) { 4781dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 4782dba0bc7bSDerek Basehore &its->phys_base, err); 4783dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4784dba0bc7bSDerek Basehore goto err; 4785dba0bc7bSDerek Basehore } 4786dba0bc7bSDerek Basehore 4787dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 4788dba0bc7bSDerek Basehore } 4789dba0bc7bSDerek Basehore 4790dba0bc7bSDerek Basehore err: 4791dba0bc7bSDerek Basehore if (err) { 4792dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 4793dba0bc7bSDerek Basehore void __iomem *base; 4794dba0bc7bSDerek Basehore 4795dba0bc7bSDerek Basehore base = its->base; 4796dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4797dba0bc7bSDerek Basehore } 4798dba0bc7bSDerek Basehore } 4799a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4800dba0bc7bSDerek Basehore 4801dba0bc7bSDerek Basehore return err; 4802dba0bc7bSDerek Basehore } 4803dba0bc7bSDerek Basehore 4804dba0bc7bSDerek Basehore static void its_restore_enable(void) 4805dba0bc7bSDerek Basehore { 4806dba0bc7bSDerek Basehore struct its_node *its; 4807dba0bc7bSDerek Basehore int ret; 4808dba0bc7bSDerek Basehore 4809a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4810dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4811dba0bc7bSDerek Basehore void __iomem *base; 4812dba0bc7bSDerek Basehore int i; 4813dba0bc7bSDerek Basehore 4814dba0bc7bSDerek Basehore base = its->base; 4815dba0bc7bSDerek Basehore 4816dba0bc7bSDerek Basehore /* 4817dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 4818dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 4819dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 4820dba0bc7bSDerek Basehore * Specification. 482174cde1a5SXu Qiang * 482274cde1a5SXu Qiang * Firmware resuming with the ITS enabled is terminally broken. 4823dba0bc7bSDerek Basehore */ 482474cde1a5SXu Qiang WARN_ON(readl_relaxed(base + GITS_CTLR) & GITS_CTLR_ENABLE); 4825dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 4826dba0bc7bSDerek Basehore if (ret) { 4827dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 4828dba0bc7bSDerek Basehore &its->phys_base, ret); 4829dba0bc7bSDerek Basehore continue; 4830dba0bc7bSDerek Basehore } 4831dba0bc7bSDerek Basehore 4832dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 4833dba0bc7bSDerek Basehore 4834dba0bc7bSDerek Basehore /* 4835dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 4836dba0bc7bSDerek Basehore * cmd_write line up with it. 4837dba0bc7bSDerek Basehore */ 4838dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 4839dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 4840dba0bc7bSDerek Basehore 4841dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 4842dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 4843dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 4844dba0bc7bSDerek Basehore 4845dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 4846dba0bc7bSDerek Basehore continue; 4847dba0bc7bSDerek Basehore 4848dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 4849dba0bc7bSDerek Basehore } 4850dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4851920181ceSDerek Basehore 4852920181ceSDerek Basehore /* 4853920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 4854920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 4855920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 4856920181ceSDerek Basehore */ 4857920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 4858920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 4859920181ceSDerek Basehore its_cpu_init_collection(its); 4860dba0bc7bSDerek Basehore } 4861a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4862dba0bc7bSDerek Basehore } 4863dba0bc7bSDerek Basehore 4864dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 4865dba0bc7bSDerek Basehore .suspend = its_save_disable, 4866dba0bc7bSDerek Basehore .resume = its_restore_enable, 4867dba0bc7bSDerek Basehore }; 4868dba0bc7bSDerek Basehore 4869c733ebb7SMarc Zyngier static void __init __iomem *its_map_one(struct resource *res, int *err) 4870c733ebb7SMarc Zyngier { 4871c733ebb7SMarc Zyngier void __iomem *its_base; 4872c733ebb7SMarc Zyngier u32 val; 4873c733ebb7SMarc Zyngier 4874c733ebb7SMarc Zyngier its_base = ioremap(res->start, SZ_64K); 4875c733ebb7SMarc Zyngier if (!its_base) { 4876c733ebb7SMarc Zyngier pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 4877c733ebb7SMarc Zyngier *err = -ENOMEM; 4878c733ebb7SMarc Zyngier return NULL; 4879c733ebb7SMarc Zyngier } 4880c733ebb7SMarc Zyngier 4881c733ebb7SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 4882c733ebb7SMarc Zyngier if (val != 0x30 && val != 0x40) { 4883c733ebb7SMarc Zyngier pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 4884c733ebb7SMarc Zyngier *err = -ENODEV; 4885c733ebb7SMarc Zyngier goto out_unmap; 4886c733ebb7SMarc Zyngier } 4887c733ebb7SMarc Zyngier 4888c733ebb7SMarc Zyngier *err = its_force_quiescent(its_base); 4889c733ebb7SMarc Zyngier if (*err) { 4890c733ebb7SMarc Zyngier pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 4891c733ebb7SMarc Zyngier goto out_unmap; 4892c733ebb7SMarc Zyngier } 4893c733ebb7SMarc Zyngier 4894c733ebb7SMarc Zyngier return its_base; 4895c733ebb7SMarc Zyngier 4896c733ebb7SMarc Zyngier out_unmap: 4897c733ebb7SMarc Zyngier iounmap(its_base); 4898c733ebb7SMarc Zyngier return NULL; 4899c733ebb7SMarc Zyngier } 4900c733ebb7SMarc Zyngier 4901db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 4902d14ae5e6STomasz Nowicki { 4903d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 4904d14ae5e6STomasz Nowicki struct msi_domain_info *info; 4905d14ae5e6STomasz Nowicki 4906d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 4907d14ae5e6STomasz Nowicki if (!info) 4908d14ae5e6STomasz Nowicki return -ENOMEM; 4909d14ae5e6STomasz Nowicki 4910db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 4911d14ae5e6STomasz Nowicki if (!inner_domain) { 4912d14ae5e6STomasz Nowicki kfree(info); 4913d14ae5e6STomasz Nowicki return -ENOMEM; 4914d14ae5e6STomasz Nowicki } 4915d14ae5e6STomasz Nowicki 4916db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 491796f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 4918558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 4919d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 4920d14ae5e6STomasz Nowicki info->data = its; 4921d14ae5e6STomasz Nowicki inner_domain->host_data = info; 4922d14ae5e6STomasz Nowicki 4923d14ae5e6STomasz Nowicki return 0; 4924d14ae5e6STomasz Nowicki } 4925d14ae5e6STomasz Nowicki 49268fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 49278fff27aeSMarc Zyngier { 492820b3d54eSMarc Zyngier struct its_node *its; 492920b3d54eSMarc Zyngier u32 devid; 493020b3d54eSMarc Zyngier int entries; 493120b3d54eSMarc Zyngier 493220b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 493320b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 493420b3d54eSMarc Zyngier return 0; 493520b3d54eSMarc Zyngier } 493620b3d54eSMarc Zyngier 493720b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 493820b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 493920b3d54eSMarc Zyngier 494020b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 49416396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 494220b3d54eSMarc Zyngier GFP_KERNEL); 4943944a1a17SZhen Lei if (!vpe_proxy.vpes) 494420b3d54eSMarc Zyngier return -ENOMEM; 494520b3d54eSMarc Zyngier 494620b3d54eSMarc Zyngier /* Use the last possible DevID */ 4947576a8342SMarc Zyngier devid = GENMASK(device_ids(its) - 1, 0); 494820b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 494920b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 495020b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 495120b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 495220b3d54eSMarc Zyngier return -ENOMEM; 495320b3d54eSMarc Zyngier } 495420b3d54eSMarc Zyngier 4955c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 495620b3d54eSMarc Zyngier 495720b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 495820b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 495920b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 496020b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 496120b3d54eSMarc Zyngier 49628fff27aeSMarc Zyngier return 0; 49638fff27aeSMarc Zyngier } 49648fff27aeSMarc Zyngier 49653dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 49663dfa576bSMarc Zyngier void __iomem *its_base) 49673dfa576bSMarc Zyngier { 49683dfa576bSMarc Zyngier int its_number; 49693dfa576bSMarc Zyngier u32 ctlr; 49703dfa576bSMarc Zyngier 49713dfa576bSMarc Zyngier /* 49723dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 49733dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 49743dfa576bSMarc Zyngier * locking. Should this change, we should address 49753dfa576bSMarc Zyngier * this. 49763dfa576bSMarc Zyngier */ 4977ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 4978ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 49793dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 49803dfa576bSMarc Zyngier &res->start); 49813dfa576bSMarc Zyngier return -EINVAL; 49823dfa576bSMarc Zyngier } 49833dfa576bSMarc Zyngier 49843dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 49853dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 49863dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 49873dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 49883dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 49893dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 49903dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 49913dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 49923dfa576bSMarc Zyngier } 49933dfa576bSMarc Zyngier 49943dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 49953dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 49963dfa576bSMarc Zyngier &res->start, its_number); 49973dfa576bSMarc Zyngier return -EINVAL; 49983dfa576bSMarc Zyngier } 49993dfa576bSMarc Zyngier 50003dfa576bSMarc Zyngier return its_number; 50013dfa576bSMarc Zyngier } 50023dfa576bSMarc Zyngier 5003db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 5004db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 50054c21f3c2SMarc Zyngier { 50064c21f3c2SMarc Zyngier struct its_node *its; 50074c21f3c2SMarc Zyngier void __iomem *its_base; 50083dfa576bSMarc Zyngier u64 baser, tmp, typer; 5009539d3782SShanker Donthineni struct page *page; 5010c733ebb7SMarc Zyngier u32 ctlr; 50114c21f3c2SMarc Zyngier int err; 50124c21f3c2SMarc Zyngier 5013c733ebb7SMarc Zyngier its_base = its_map_one(res, &err); 5014c733ebb7SMarc Zyngier if (!its_base) 5015c733ebb7SMarc Zyngier return err; 50164559fbb3SYun Wu 5017db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 50184c21f3c2SMarc Zyngier 50194c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 50204c21f3c2SMarc Zyngier if (!its) { 50214c21f3c2SMarc Zyngier err = -ENOMEM; 50224c21f3c2SMarc Zyngier goto out_unmap; 50234c21f3c2SMarc Zyngier } 50244c21f3c2SMarc Zyngier 50254c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 50269791ec7dSMarc Zyngier mutex_init(&its->dev_alloc_lock); 50274c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 50284c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 50293dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 50300dd57fedSMarc Zyngier its->typer = typer; 50314c21f3c2SMarc Zyngier its->base = its_base; 5032db40f0a7STomasz Nowicki its->phys_base = res->start; 50330dd57fedSMarc Zyngier if (is_v4(its)) { 50343dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 50353dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 50363dfa576bSMarc Zyngier if (err < 0) 50373dfa576bSMarc Zyngier goto out_free_its; 50383dfa576bSMarc Zyngier 5039debf6d02SMarc Zyngier its->list_nr = err; 5040debf6d02SMarc Zyngier 50413dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 50423dfa576bSMarc Zyngier &res->start, err); 50433dfa576bSMarc Zyngier } else { 50443dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 50453dfa576bSMarc Zyngier } 50465e516846SMarc Zyngier 50475e516846SMarc Zyngier if (is_v4_1(its)) { 50485e516846SMarc Zyngier u32 svpet = FIELD_GET(GITS_TYPER_SVPET, typer); 50495e46a484SMarc Zyngier 50505e46a484SMarc Zyngier its->sgir_base = ioremap(res->start + SZ_128K, SZ_64K); 50515e46a484SMarc Zyngier if (!its->sgir_base) { 50525e46a484SMarc Zyngier err = -ENOMEM; 50535e46a484SMarc Zyngier goto out_free_its; 50545e46a484SMarc Zyngier } 50555e46a484SMarc Zyngier 50565e516846SMarc Zyngier its->mpidr = readl_relaxed(its_base + GITS_MPIDR); 50575e516846SMarc Zyngier 50585e516846SMarc Zyngier pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n", 50595e516846SMarc Zyngier &res->start, its->mpidr, svpet); 50605e516846SMarc Zyngier } 50613dfa576bSMarc Zyngier } 50623dfa576bSMarc Zyngier 5063db40f0a7STomasz Nowicki its->numa_node = numa_node; 50644c21f3c2SMarc Zyngier 5065539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 50665bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 5067539d3782SShanker Donthineni if (!page) { 50684c21f3c2SMarc Zyngier err = -ENOMEM; 50695e46a484SMarc Zyngier goto out_unmap_sgir; 50704c21f3c2SMarc Zyngier } 5071539d3782SShanker Donthineni its->cmd_base = (void *)page_address(page); 50724c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 5073558b0165SArd Biesheuvel its->fwnode_handle = handle; 5074558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 5075558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 50764c21f3c2SMarc Zyngier 507767510ccaSRobert Richter its_enable_quirks(its); 507867510ccaSRobert Richter 50790e0b0f69SShanker Donthineni err = its_alloc_tables(its); 50804c21f3c2SMarc Zyngier if (err) 50814c21f3c2SMarc Zyngier goto out_free_cmd; 50824c21f3c2SMarc Zyngier 50834c21f3c2SMarc Zyngier err = its_alloc_collections(its); 50844c21f3c2SMarc Zyngier if (err) 50854c21f3c2SMarc Zyngier goto out_free_tables; 50864c21f3c2SMarc Zyngier 50874c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 50882fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 50894c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 50904c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 50914c21f3c2SMarc Zyngier GITS_CBASER_VALID); 50924c21f3c2SMarc Zyngier 50930968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 50940968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 50954c21f3c2SMarc Zyngier 50964ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 5097241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 5098241a386cSMarc Zyngier /* 5099241a386cSMarc Zyngier * The HW reports non-shareable, we must 5100241a386cSMarc Zyngier * remove the cacheability attributes as 5101241a386cSMarc Zyngier * well. 5102241a386cSMarc Zyngier */ 5103241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 5104241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 5105241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 51060968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 5107241a386cSMarc Zyngier } 51084c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 51094c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 51104c21f3c2SMarc Zyngier } 51114c21f3c2SMarc Zyngier 51120968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 51133dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 5114d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 51150dd57fedSMarc Zyngier if (is_v4(its)) 5116d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 5117d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 5118241a386cSMarc Zyngier 5119db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 5120d14ae5e6STomasz Nowicki if (err) 512154456db9SMarc Zyngier goto out_free_tables; 51224c21f3c2SMarc Zyngier 5123a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 51244c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 5125a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 51264c21f3c2SMarc Zyngier 51274c21f3c2SMarc Zyngier return 0; 51284c21f3c2SMarc Zyngier 51294c21f3c2SMarc Zyngier out_free_tables: 51304c21f3c2SMarc Zyngier its_free_tables(its); 51314c21f3c2SMarc Zyngier out_free_cmd: 51325bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 51335e46a484SMarc Zyngier out_unmap_sgir: 51345e46a484SMarc Zyngier if (its->sgir_base) 51355e46a484SMarc Zyngier iounmap(its->sgir_base); 51364c21f3c2SMarc Zyngier out_free_its: 51374c21f3c2SMarc Zyngier kfree(its); 51384c21f3c2SMarc Zyngier out_unmap: 51394c21f3c2SMarc Zyngier iounmap(its_base); 5140db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 51414c21f3c2SMarc Zyngier return err; 51424c21f3c2SMarc Zyngier } 51434c21f3c2SMarc Zyngier 51444c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 51454c21f3c2SMarc Zyngier { 5146589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 51474c21f3c2SMarc Zyngier } 51484c21f3c2SMarc Zyngier 51496eb486b6SShanker Donthineni static int redist_disable_lpis(void) 51504c21f3c2SMarc Zyngier { 51516eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 51526eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 51536eb486b6SShanker Donthineni u64 val; 51546eb486b6SShanker Donthineni 51554c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 51564c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 51574c21f3c2SMarc Zyngier return -ENXIO; 51584c21f3c2SMarc Zyngier } 51596eb486b6SShanker Donthineni 51606eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 51616eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 51626eb486b6SShanker Donthineni return 0; 51636eb486b6SShanker Donthineni 516411e37d35SMarc Zyngier /* 516511e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 516611e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 516711e37d35SMarc Zyngier * configured and all is well in the world. 5168c440a9d9SMarc Zyngier * 5169c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 517011e37d35SMarc Zyngier */ 5171c0cdc890SValentin Schneider if ((gic_data_rdist()->flags & RD_LOCAL_LPI_ENABLED) || 5172c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 517311e37d35SMarc Zyngier return 0; 517411e37d35SMarc Zyngier 517511e37d35SMarc Zyngier /* 517611e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 517711e37d35SMarc Zyngier */ 517811e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 51796eb486b6SShanker Donthineni smp_processor_id()); 51806eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 51816eb486b6SShanker Donthineni 51826eb486b6SShanker Donthineni /* Disable LPIs */ 51836eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 51846eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 51856eb486b6SShanker Donthineni 51866eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 51876eb486b6SShanker Donthineni dsb(sy); 51886eb486b6SShanker Donthineni 51896eb486b6SShanker Donthineni /* 51906eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 51916eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 51926eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 51936eb486b6SShanker Donthineni */ 51946eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 51956eb486b6SShanker Donthineni if (!timeout) { 51966eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 51976eb486b6SShanker Donthineni smp_processor_id()); 51986eb486b6SShanker Donthineni return -ETIMEDOUT; 51996eb486b6SShanker Donthineni } 52006eb486b6SShanker Donthineni udelay(1); 52016eb486b6SShanker Donthineni timeout--; 52026eb486b6SShanker Donthineni } 52036eb486b6SShanker Donthineni 52046eb486b6SShanker Donthineni /* 52056eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 52066eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 52076eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 52086eb486b6SShanker Donthineni */ 52096eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 52106eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 52116eb486b6SShanker Donthineni return -EBUSY; 52126eb486b6SShanker Donthineni } 52136eb486b6SShanker Donthineni 52146eb486b6SShanker Donthineni return 0; 52156eb486b6SShanker Donthineni } 52166eb486b6SShanker Donthineni 52176eb486b6SShanker Donthineni int its_cpu_init(void) 52186eb486b6SShanker Donthineni { 52196eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 52206eb486b6SShanker Donthineni int ret; 52216eb486b6SShanker Donthineni 52226eb486b6SShanker Donthineni ret = redist_disable_lpis(); 52236eb486b6SShanker Donthineni if (ret) 52246eb486b6SShanker Donthineni return ret; 52256eb486b6SShanker Donthineni 52264c21f3c2SMarc Zyngier its_cpu_init_lpis(); 5227920181ceSDerek Basehore its_cpu_init_collections(); 52284c21f3c2SMarc Zyngier } 52294c21f3c2SMarc Zyngier 52304c21f3c2SMarc Zyngier return 0; 52314c21f3c2SMarc Zyngier } 52324c21f3c2SMarc Zyngier 5233835f442fSValentin Schneider static void rdist_memreserve_cpuhp_cleanup_workfn(struct work_struct *work) 5234835f442fSValentin Schneider { 5235835f442fSValentin Schneider cpuhp_remove_state_nocalls(gic_rdists->cpuhp_memreserve_state); 5236835f442fSValentin Schneider gic_rdists->cpuhp_memreserve_state = CPUHP_INVALID; 5237835f442fSValentin Schneider } 5238835f442fSValentin Schneider 5239835f442fSValentin Schneider static DECLARE_WORK(rdist_memreserve_cpuhp_cleanup_work, 5240835f442fSValentin Schneider rdist_memreserve_cpuhp_cleanup_workfn); 5241835f442fSValentin Schneider 5242d23bc2bcSValentin Schneider static int its_cpu_memreserve_lpi(unsigned int cpu) 5243d23bc2bcSValentin Schneider { 5244d23bc2bcSValentin Schneider struct page *pend_page; 5245d23bc2bcSValentin Schneider int ret = 0; 5246d23bc2bcSValentin Schneider 5247d23bc2bcSValentin Schneider /* This gets to run exactly once per CPU */ 5248d23bc2bcSValentin Schneider if (gic_data_rdist()->flags & RD_LOCAL_MEMRESERVE_DONE) 5249d23bc2bcSValentin Schneider return 0; 5250d23bc2bcSValentin Schneider 5251d23bc2bcSValentin Schneider pend_page = gic_data_rdist()->pend_page; 5252d23bc2bcSValentin Schneider if (WARN_ON(!pend_page)) { 5253d23bc2bcSValentin Schneider ret = -ENOMEM; 5254d23bc2bcSValentin Schneider goto out; 5255d23bc2bcSValentin Schneider } 5256d23bc2bcSValentin Schneider /* 5257d23bc2bcSValentin Schneider * If the pending table was pre-programmed, free the memory we 5258d23bc2bcSValentin Schneider * preemptively allocated. Otherwise, reserve that memory for 5259d23bc2bcSValentin Schneider * later kexecs. 5260d23bc2bcSValentin Schneider */ 5261d23bc2bcSValentin Schneider if (gic_data_rdist()->flags & RD_LOCAL_PENDTABLE_PREALLOCATED) { 5262d23bc2bcSValentin Schneider its_free_pending_table(pend_page); 5263d23bc2bcSValentin Schneider gic_data_rdist()->pend_page = NULL; 5264d23bc2bcSValentin Schneider } else { 5265d23bc2bcSValentin Schneider phys_addr_t paddr = page_to_phys(pend_page); 5266d23bc2bcSValentin Schneider WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 5267d23bc2bcSValentin Schneider } 5268d23bc2bcSValentin Schneider 5269d23bc2bcSValentin Schneider out: 5270835f442fSValentin Schneider /* Last CPU being brought up gets to issue the cleanup */ 527116436f70SArd Biesheuvel if (!IS_ENABLED(CONFIG_SMP) || 527216436f70SArd Biesheuvel cpumask_equal(&cpus_booted_once_mask, cpu_possible_mask)) 5273835f442fSValentin Schneider schedule_work(&rdist_memreserve_cpuhp_cleanup_work); 5274835f442fSValentin Schneider 5275d23bc2bcSValentin Schneider gic_data_rdist()->flags |= RD_LOCAL_MEMRESERVE_DONE; 5276d23bc2bcSValentin Schneider return ret; 5277d23bc2bcSValentin Schneider } 5278d23bc2bcSValentin Schneider 5279c733ebb7SMarc Zyngier /* Mark all the BASER registers as invalid before they get reprogrammed */ 5280c733ebb7SMarc Zyngier static int __init its_reset_one(struct resource *res) 5281c733ebb7SMarc Zyngier { 5282c733ebb7SMarc Zyngier void __iomem *its_base; 5283c733ebb7SMarc Zyngier int err, i; 5284c733ebb7SMarc Zyngier 5285c733ebb7SMarc Zyngier its_base = its_map_one(res, &err); 5286c733ebb7SMarc Zyngier if (!its_base) 5287c733ebb7SMarc Zyngier return err; 5288c733ebb7SMarc Zyngier 5289c733ebb7SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) 5290c733ebb7SMarc Zyngier gits_write_baser(0, its_base + GITS_BASER + (i << 3)); 5291c733ebb7SMarc Zyngier 5292c733ebb7SMarc Zyngier iounmap(its_base); 5293c733ebb7SMarc Zyngier return 0; 5294c733ebb7SMarc Zyngier } 5295c733ebb7SMarc Zyngier 5296935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 52974c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 52984c21f3c2SMarc Zyngier {}, 52994c21f3c2SMarc Zyngier }; 53004c21f3c2SMarc Zyngier 5301db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 53024c21f3c2SMarc Zyngier { 53034c21f3c2SMarc Zyngier struct device_node *np; 5304db40f0a7STomasz Nowicki struct resource res; 53054c21f3c2SMarc Zyngier 5306c733ebb7SMarc Zyngier /* 5307c733ebb7SMarc Zyngier * Make sure *all* the ITS are reset before we probe any, as 5308c733ebb7SMarc Zyngier * they may be sharing memory. If any of the ITS fails to 5309c733ebb7SMarc Zyngier * reset, don't even try to go any further, as this could 5310c733ebb7SMarc Zyngier * result in something even worse. 5311c733ebb7SMarc Zyngier */ 5312c733ebb7SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 5313c733ebb7SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 5314c733ebb7SMarc Zyngier int err; 5315c733ebb7SMarc Zyngier 5316c733ebb7SMarc Zyngier if (!of_device_is_available(np) || 5317c733ebb7SMarc Zyngier !of_property_read_bool(np, "msi-controller") || 5318c733ebb7SMarc Zyngier of_address_to_resource(np, 0, &res)) 5319c733ebb7SMarc Zyngier continue; 5320c733ebb7SMarc Zyngier 5321c733ebb7SMarc Zyngier err = its_reset_one(&res); 5322c733ebb7SMarc Zyngier if (err) 5323c733ebb7SMarc Zyngier return err; 5324c733ebb7SMarc Zyngier } 5325c733ebb7SMarc Zyngier 53264c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 53274c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 532895a25625SStephen Boyd if (!of_device_is_available(np)) 532995a25625SStephen Boyd continue; 5330d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 5331e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 5332e81f54c6SRob Herring np); 5333d14ae5e6STomasz Nowicki continue; 5334d14ae5e6STomasz Nowicki } 5335d14ae5e6STomasz Nowicki 5336db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 5337e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 5338db40f0a7STomasz Nowicki continue; 53394c21f3c2SMarc Zyngier } 53404c21f3c2SMarc Zyngier 5341db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 5342db40f0a7STomasz Nowicki } 5343db40f0a7STomasz Nowicki return 0; 5344db40f0a7STomasz Nowicki } 5345db40f0a7STomasz Nowicki 53463f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 53473f010cf1STomasz Nowicki 53483f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 53493f010cf1STomasz Nowicki 5350d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 5351dbd2b826SGanapatrao Kulkarni struct its_srat_map { 5352dbd2b826SGanapatrao Kulkarni /* numa node id */ 5353dbd2b826SGanapatrao Kulkarni u32 numa_node; 5354dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 5355dbd2b826SGanapatrao Kulkarni u32 its_id; 5356dbd2b826SGanapatrao Kulkarni }; 5357dbd2b826SGanapatrao Kulkarni 5358fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 5359dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 5360dbd2b826SGanapatrao Kulkarni 5361dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 5362dbd2b826SGanapatrao Kulkarni { 5363dbd2b826SGanapatrao Kulkarni int i; 5364dbd2b826SGanapatrao Kulkarni 5365dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 5366dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 5367dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 5368dbd2b826SGanapatrao Kulkarni } 5369dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 5370dbd2b826SGanapatrao Kulkarni } 5371dbd2b826SGanapatrao Kulkarni 537260574d1eSKeith Busch static int __init gic_acpi_match_srat_its(union acpi_subtable_headers *header, 5373fdf6e7a8SHanjun Guo const unsigned long end) 5374fdf6e7a8SHanjun Guo { 5375fdf6e7a8SHanjun Guo return 0; 5376fdf6e7a8SHanjun Guo } 5377fdf6e7a8SHanjun Guo 537860574d1eSKeith Busch static int __init gic_acpi_parse_srat_its(union acpi_subtable_headers *header, 5379dbd2b826SGanapatrao Kulkarni const unsigned long end) 5380dbd2b826SGanapatrao Kulkarni { 5381dbd2b826SGanapatrao Kulkarni int node; 5382dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 5383dbd2b826SGanapatrao Kulkarni 5384dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 5385dbd2b826SGanapatrao Kulkarni if (!its_affinity) 5386dbd2b826SGanapatrao Kulkarni return -EINVAL; 5387dbd2b826SGanapatrao Kulkarni 5388dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 5389dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 5390dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 5391dbd2b826SGanapatrao Kulkarni return -EINVAL; 5392dbd2b826SGanapatrao Kulkarni } 5393dbd2b826SGanapatrao Kulkarni 539495ac5bf4SJonathan Cameron /* 539595ac5bf4SJonathan Cameron * Note that in theory a new proximity node could be created by this 539695ac5bf4SJonathan Cameron * entry as it is an SRAT resource allocation structure. 539795ac5bf4SJonathan Cameron * We do not currently support doing so. 539895ac5bf4SJonathan Cameron */ 539995ac5bf4SJonathan Cameron node = pxm_to_node(its_affinity->proximity_domain); 5400dbd2b826SGanapatrao Kulkarni 5401dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 5402dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 5403dbd2b826SGanapatrao Kulkarni return 0; 5404dbd2b826SGanapatrao Kulkarni } 5405dbd2b826SGanapatrao Kulkarni 5406dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 5407dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 5408dbd2b826SGanapatrao Kulkarni its_in_srat++; 5409dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 5410dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 5411dbd2b826SGanapatrao Kulkarni 5412dbd2b826SGanapatrao Kulkarni return 0; 5413dbd2b826SGanapatrao Kulkarni } 5414dbd2b826SGanapatrao Kulkarni 5415dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 5416dbd2b826SGanapatrao Kulkarni { 5417fdf6e7a8SHanjun Guo int count; 5418fdf6e7a8SHanjun Guo 5419fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 5420fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 5421fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 5422fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 5423fdf6e7a8SHanjun Guo if (count <= 0) 5424fdf6e7a8SHanjun Guo return; 5425fdf6e7a8SHanjun Guo 54266da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 5427fdf6e7a8SHanjun Guo GFP_KERNEL); 5428944a1a17SZhen Lei if (!its_srat_maps) 5429fdf6e7a8SHanjun Guo return; 5430fdf6e7a8SHanjun Guo 5431dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 5432dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 5433dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 5434dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 5435dbd2b826SGanapatrao Kulkarni } 5436fdf6e7a8SHanjun Guo 5437fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 5438fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 5439fdf6e7a8SHanjun Guo { 5440fdf6e7a8SHanjun Guo kfree(its_srat_maps); 5441fdf6e7a8SHanjun Guo } 5442dbd2b826SGanapatrao Kulkarni #else 5443dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 5444dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 5445fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 5446dbd2b826SGanapatrao Kulkarni #endif 5447dbd2b826SGanapatrao Kulkarni 544860574d1eSKeith Busch static int __init gic_acpi_parse_madt_its(union acpi_subtable_headers *header, 54493f010cf1STomasz Nowicki const unsigned long end) 54503f010cf1STomasz Nowicki { 54513f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 54523f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 54533f010cf1STomasz Nowicki struct resource res; 54543f010cf1STomasz Nowicki int err; 54553f010cf1STomasz Nowicki 54563f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 54573f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 54583f010cf1STomasz Nowicki res.start = its_entry->base_address; 54593f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 54603f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 54613f010cf1STomasz Nowicki 54625778cc77SMarc Zyngier dom_handle = irq_domain_alloc_fwnode(&res.start); 54633f010cf1STomasz Nowicki if (!dom_handle) { 54643f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 54653f010cf1STomasz Nowicki &res.start); 54663f010cf1STomasz Nowicki return -ENOMEM; 54673f010cf1STomasz Nowicki } 54683f010cf1STomasz Nowicki 54698b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 54708b4282e6SShameer Kolothum dom_handle); 54713f010cf1STomasz Nowicki if (err) { 54723f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 54733f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 54743f010cf1STomasz Nowicki goto dom_err; 54753f010cf1STomasz Nowicki } 54763f010cf1STomasz Nowicki 5477dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 5478dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 54793f010cf1STomasz Nowicki if (!err) 54803f010cf1STomasz Nowicki return 0; 54813f010cf1STomasz Nowicki 54823f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 54833f010cf1STomasz Nowicki dom_err: 54843f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 54853f010cf1STomasz Nowicki return err; 54863f010cf1STomasz Nowicki } 54873f010cf1STomasz Nowicki 5488c733ebb7SMarc Zyngier static int __init its_acpi_reset(union acpi_subtable_headers *header, 5489c733ebb7SMarc Zyngier const unsigned long end) 5490c733ebb7SMarc Zyngier { 5491c733ebb7SMarc Zyngier struct acpi_madt_generic_translator *its_entry; 5492c733ebb7SMarc Zyngier struct resource res; 5493c733ebb7SMarc Zyngier 5494c733ebb7SMarc Zyngier its_entry = (struct acpi_madt_generic_translator *)header; 5495c733ebb7SMarc Zyngier res = (struct resource) { 5496c733ebb7SMarc Zyngier .start = its_entry->base_address, 5497c733ebb7SMarc Zyngier .end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1, 5498c733ebb7SMarc Zyngier .flags = IORESOURCE_MEM, 5499c733ebb7SMarc Zyngier }; 5500c733ebb7SMarc Zyngier 5501c733ebb7SMarc Zyngier return its_reset_one(&res); 5502c733ebb7SMarc Zyngier } 5503c733ebb7SMarc Zyngier 55043f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 55053f010cf1STomasz Nowicki { 5506dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 5507c733ebb7SMarc Zyngier /* 5508c733ebb7SMarc Zyngier * Make sure *all* the ITS are reset before we probe any, as 5509c733ebb7SMarc Zyngier * they may be sharing memory. If any of the ITS fails to 5510c733ebb7SMarc Zyngier * reset, don't even try to go any further, as this could 5511c733ebb7SMarc Zyngier * result in something even worse. 5512c733ebb7SMarc Zyngier */ 5513c733ebb7SMarc Zyngier if (acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 5514c733ebb7SMarc Zyngier its_acpi_reset, 0) > 0) 55153f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 55163f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 5517fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 55183f010cf1STomasz Nowicki } 55193f010cf1STomasz Nowicki #else 55203f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 55213f010cf1STomasz Nowicki #endif 55223f010cf1STomasz Nowicki 5523d23bc2bcSValentin Schneider int __init its_lpi_memreserve_init(void) 5524d23bc2bcSValentin Schneider { 5525d23bc2bcSValentin Schneider int state; 5526d23bc2bcSValentin Schneider 5527d23bc2bcSValentin Schneider if (!efi_enabled(EFI_CONFIG_TABLES)) 5528d23bc2bcSValentin Schneider return 0; 5529d23bc2bcSValentin Schneider 5530eba1e44bSMarc Zyngier if (list_empty(&its_nodes)) 5531eba1e44bSMarc Zyngier return 0; 5532eba1e44bSMarc Zyngier 5533835f442fSValentin Schneider gic_rdists->cpuhp_memreserve_state = CPUHP_INVALID; 5534d23bc2bcSValentin Schneider state = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, 5535d23bc2bcSValentin Schneider "irqchip/arm/gicv3/memreserve:online", 5536d23bc2bcSValentin Schneider its_cpu_memreserve_lpi, 5537d23bc2bcSValentin Schneider NULL); 5538d23bc2bcSValentin Schneider if (state < 0) 5539d23bc2bcSValentin Schneider return state; 5540d23bc2bcSValentin Schneider 5541835f442fSValentin Schneider gic_rdists->cpuhp_memreserve_state = state; 5542835f442fSValentin Schneider 5543d23bc2bcSValentin Schneider return 0; 5544d23bc2bcSValentin Schneider } 5545d23bc2bcSValentin Schneider 5546db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 5547db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 5548db40f0a7STomasz Nowicki { 5549db40f0a7STomasz Nowicki struct device_node *of_node; 55508fff27aeSMarc Zyngier struct its_node *its; 55518fff27aeSMarc Zyngier bool has_v4 = false; 55523c40706dSMarc Zyngier bool has_v4_1 = false; 55538fff27aeSMarc Zyngier int err; 5554db40f0a7STomasz Nowicki 55555e516846SMarc Zyngier gic_rdists = rdists; 55565e516846SMarc Zyngier 5557db40f0a7STomasz Nowicki its_parent = parent_domain; 5558db40f0a7STomasz Nowicki of_node = to_of_node(handle); 5559db40f0a7STomasz Nowicki if (of_node) 5560db40f0a7STomasz Nowicki its_of_probe(of_node); 5561db40f0a7STomasz Nowicki else 55623f010cf1STomasz Nowicki its_acpi_probe(); 5563db40f0a7STomasz Nowicki 55644c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 55654c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 55664c21f3c2SMarc Zyngier return -ENXIO; 55674c21f3c2SMarc Zyngier } 55684c21f3c2SMarc Zyngier 556911e37d35SMarc Zyngier err = allocate_lpi_tables(); 55708fff27aeSMarc Zyngier if (err) 55718fff27aeSMarc Zyngier return err; 55728fff27aeSMarc Zyngier 55733c40706dSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 55740dd57fedSMarc Zyngier has_v4 |= is_v4(its); 55753c40706dSMarc Zyngier has_v4_1 |= is_v4_1(its); 55763c40706dSMarc Zyngier } 55773c40706dSMarc Zyngier 55783c40706dSMarc Zyngier /* Don't bother with inconsistent systems */ 55793c40706dSMarc Zyngier if (WARN_ON(!has_v4_1 && rdists->has_rvpeid)) 55803c40706dSMarc Zyngier rdists->has_rvpeid = false; 55818fff27aeSMarc Zyngier 55828fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 5583166cba71SMarc Zyngier const struct irq_domain_ops *sgi_ops; 5584166cba71SMarc Zyngier 5585166cba71SMarc Zyngier if (has_v4_1) 5586166cba71SMarc Zyngier sgi_ops = &its_sgi_domain_ops; 5587166cba71SMarc Zyngier else 5588166cba71SMarc Zyngier sgi_ops = NULL; 5589166cba71SMarc Zyngier 55903d63cb53SMarc Zyngier if (its_init_vpe_domain() || 5591166cba71SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops, sgi_ops)) { 55928fff27aeSMarc Zyngier rdists->has_vlpis = false; 55938fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 55948fff27aeSMarc Zyngier } 55958fff27aeSMarc Zyngier } 55968fff27aeSMarc Zyngier 5597dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 5598dba0bc7bSDerek Basehore 55998fff27aeSMarc Zyngier return 0; 56004c21f3c2SMarc Zyngier } 5601