1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2cc2d3216SMarc Zyngier /* 3d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 4cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 5cc2d3216SMarc Zyngier */ 6cc2d3216SMarc Zyngier 73f010cf1STomasz Nowicki #include <linux/acpi.h> 88d3554b8SHanjun Guo #include <linux/acpi_iort.h> 9ffedbf0cSMarc Zyngier #include <linux/bitfield.h> 10cc2d3216SMarc Zyngier #include <linux/bitmap.h> 11cc2d3216SMarc Zyngier #include <linux/cpu.h> 12c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 13cc2d3216SMarc Zyngier #include <linux/delay.h> 143fb68faeSMarc Zyngier #include <linux/efi.h> 15cc2d3216SMarc Zyngier #include <linux/interrupt.h> 16fa49364cSRobin Murphy #include <linux/iommu.h> 1796806229SMarc Zyngier #include <linux/iopoll.h> 183f010cf1STomasz Nowicki #include <linux/irqdomain.h> 19880cb3cdSMarc Zyngier #include <linux/list.h> 20cc2d3216SMarc Zyngier #include <linux/log2.h> 215e2c9f9aSMarc Zyngier #include <linux/memblock.h> 22cc2d3216SMarc Zyngier #include <linux/mm.h> 23cc2d3216SMarc Zyngier #include <linux/msi.h> 24cc2d3216SMarc Zyngier #include <linux/of.h> 25cc2d3216SMarc Zyngier #include <linux/of_address.h> 26cc2d3216SMarc Zyngier #include <linux/of_irq.h> 27cc2d3216SMarc Zyngier #include <linux/of_pci.h> 28cc2d3216SMarc Zyngier #include <linux/of_platform.h> 29cc2d3216SMarc Zyngier #include <linux/percpu.h> 30cc2d3216SMarc Zyngier #include <linux/slab.h> 31dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 32cc2d3216SMarc Zyngier 3341a83e06SJoel Porquet #include <linux/irqchip.h> 34cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 35c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 36cc2d3216SMarc Zyngier 37cc2d3216SMarc Zyngier #include <asm/cputype.h> 38cc2d3216SMarc Zyngier #include <asm/exception.h> 39cc2d3216SMarc Zyngier 4067510ccaSRobert Richter #include "irq-gic-common.h" 4167510ccaSRobert Richter 4294100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4394100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 44fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 45a8707f55SSebastian Reichel #define ITS_FLAGS_FORCE_NON_SHAREABLE (1ULL << 3) 46cc2d3216SMarc Zyngier 47c0cdc890SValentin Schneider #define RD_LOCAL_LPI_ENABLED BIT(0) 48d23bc2bcSValentin Schneider #define RD_LOCAL_PENDTABLE_PREALLOCATED BIT(1) 49d23bc2bcSValentin Schneider #define RD_LOCAL_MEMRESERVE_DONE BIT(2) 50c0cdc890SValentin Schneider 51a13b0404SMarc Zyngier static u32 lpi_id_bits; 52a13b0404SMarc Zyngier 53a13b0404SMarc Zyngier /* 54a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 55a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 56a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 57a13b0404SMarc Zyngier */ 58a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 59a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 60a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 61a13b0404SMarc Zyngier 622130b789SJulien Thierry #define LPI_PROP_DEFAULT_PRIO GICD_INT_DEF_PRI 63a13b0404SMarc Zyngier 64cc2d3216SMarc Zyngier /* 65cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 66cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 67cc2d3216SMarc Zyngier * CPU. 68cc2d3216SMarc Zyngier */ 69cc2d3216SMarc Zyngier struct its_collection { 70cc2d3216SMarc Zyngier u64 target_address; 71cc2d3216SMarc Zyngier u16 col_id; 72cc2d3216SMarc Zyngier }; 73cc2d3216SMarc Zyngier 74cc2d3216SMarc Zyngier /* 759347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 769347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 77466b7d16SShanker Donthineni */ 78466b7d16SShanker Donthineni struct its_baser { 79466b7d16SShanker Donthineni void *base; 80466b7d16SShanker Donthineni u64 val; 81466b7d16SShanker Donthineni u32 order; 829347359aSShanker Donthineni u32 psz; 83466b7d16SShanker Donthineni }; 84466b7d16SShanker Donthineni 85558b0165SArd Biesheuvel struct its_device; 86558b0165SArd Biesheuvel 87466b7d16SShanker Donthineni /* 88cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 89841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 90841514abSMarc Zyngier * list of devices writing to it. 919791ec7dSMarc Zyngier * 929791ec7dSMarc Zyngier * dev_alloc_lock has to be taken for device allocations, while the 939791ec7dSMarc Zyngier * spinlock must be taken to parse data structures such as the device 949791ec7dSMarc Zyngier * list. 95cc2d3216SMarc Zyngier */ 96cc2d3216SMarc Zyngier struct its_node { 97cc2d3216SMarc Zyngier raw_spinlock_t lock; 989791ec7dSMarc Zyngier struct mutex dev_alloc_lock; 99cc2d3216SMarc Zyngier struct list_head entry; 100cc2d3216SMarc Zyngier void __iomem *base; 1015e46a484SMarc Zyngier void __iomem *sgir_base; 102db40f0a7STomasz Nowicki phys_addr_t phys_base; 103cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 104cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 105466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 106cc2d3216SMarc Zyngier struct its_collection *collections; 107558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 108558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 1090dd57fedSMarc Zyngier u64 typer; 110dba0bc7bSDerek Basehore u64 cbaser_save; 111dba0bc7bSDerek Basehore u32 ctlr_save; 1125e516846SMarc Zyngier u32 mpidr; 113cc2d3216SMarc Zyngier struct list_head its_device_list; 114cc2d3216SMarc Zyngier u64 flags; 115debf6d02SMarc Zyngier unsigned long list_nr; 116fbf8f40eSGanapatrao Kulkarni int numa_node; 117558b0165SArd Biesheuvel unsigned int msi_domain_flags; 118558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1195c9a882eSMarc Zyngier int vlpi_redist_offset; 120cc2d3216SMarc Zyngier }; 121cc2d3216SMarc Zyngier 1220dd57fedSMarc Zyngier #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) 1235e516846SMarc Zyngier #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) 124576a8342SMarc Zyngier #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) 1250dd57fedSMarc Zyngier 126cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 127cc2d3216SMarc Zyngier 12832bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 129f2d83409SMarc Zyngier #define ITS_MAX_VPEID_BITS \ 130f2d83409SMarc Zyngier ({ \ 131f2d83409SMarc Zyngier int nvpeid = 16; \ 132f2d83409SMarc Zyngier if (gic_rdists->has_rvpeid && \ 133f2d83409SMarc Zyngier gic_rdists->gicd_typer2 & GICD_TYPER2_VIL) \ 134f2d83409SMarc Zyngier nvpeid = 1 + (gic_rdists->gicd_typer2 & \ 135f2d83409SMarc Zyngier GICD_TYPER2_VID); \ 136f2d83409SMarc Zyngier \ 137f2d83409SMarc Zyngier nvpeid; \ 138f2d83409SMarc Zyngier }) 13932bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 14032bd44dcSShanker Donthineni 1412eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1422eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1432eca0d6cSShanker Donthineni 144591e5becSMarc Zyngier struct event_lpi_map { 145591e5becSMarc Zyngier unsigned long *lpi_map; 146591e5becSMarc Zyngier u16 *col_map; 147591e5becSMarc Zyngier irq_hw_number_t lpi_base; 148591e5becSMarc Zyngier int nr_lpis; 14911635fa2SMarc Zyngier raw_spinlock_t vlpi_lock; 150d011e4e6SMarc Zyngier struct its_vm *vm; 151d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 152d011e4e6SMarc Zyngier int nr_vlpis; 153591e5becSMarc Zyngier }; 154591e5becSMarc Zyngier 155cc2d3216SMarc Zyngier /* 156d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 157d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 158d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 159d011e4e6SMarc Zyngier * indicates which one. 160cc2d3216SMarc Zyngier */ 161cc2d3216SMarc Zyngier struct its_device { 162cc2d3216SMarc Zyngier struct list_head entry; 163cc2d3216SMarc Zyngier struct its_node *its; 164591e5becSMarc Zyngier struct event_lpi_map event_map; 165cc2d3216SMarc Zyngier void *itt; 166cc2d3216SMarc Zyngier u32 nr_ites; 167cc2d3216SMarc Zyngier u32 device_id; 1689791ec7dSMarc Zyngier bool shared; 169cc2d3216SMarc Zyngier }; 170cc2d3216SMarc Zyngier 17120b3d54eSMarc Zyngier static struct { 17220b3d54eSMarc Zyngier raw_spinlock_t lock; 17320b3d54eSMarc Zyngier struct its_device *dev; 17420b3d54eSMarc Zyngier struct its_vpe **vpes; 17520b3d54eSMarc Zyngier int next_victim; 17620b3d54eSMarc Zyngier } vpe_proxy; 17720b3d54eSMarc Zyngier 1782f13ff1dSMarc Zyngier struct cpu_lpi_count { 1792f13ff1dSMarc Zyngier atomic_t managed; 1802f13ff1dSMarc Zyngier atomic_t unmanaged; 1812f13ff1dSMarc Zyngier }; 1822f13ff1dSMarc Zyngier 1832f13ff1dSMarc Zyngier static DEFINE_PER_CPU(struct cpu_lpi_count, cpu_lpi_count); 1842f13ff1dSMarc Zyngier 1851ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 186a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1871ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 188db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1891ac19ca6SMarc Zyngier 1903dfa576bSMarc Zyngier static unsigned long its_list_map; 1913171a47aSMarc Zyngier static u16 vmovp_seq_num; 1923171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1933171a47aSMarc Zyngier 1947d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1953dfa576bSMarc Zyngier 1961ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 19711e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1981ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 199e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 2001ac19ca6SMarc Zyngier 201009384b3SMarc Zyngier /* 202009384b3SMarc Zyngier * Skip ITSs that have no vLPIs mapped, unless we're on GICv4.1, as we 203009384b3SMarc Zyngier * always have vSGIs mapped. 204009384b3SMarc Zyngier */ 205009384b3SMarc Zyngier static bool require_its_list_vmovp(struct its_vm *vm, struct its_node *its) 206009384b3SMarc Zyngier { 207009384b3SMarc Zyngier return (gic_rdists->has_rvpeid || vm->vlpi_count[its->list_nr]); 208009384b3SMarc Zyngier } 209009384b3SMarc Zyngier 21084243125SZenghui Yu static u16 get_its_list(struct its_vm *vm) 21184243125SZenghui Yu { 21284243125SZenghui Yu struct its_node *its; 21384243125SZenghui Yu unsigned long its_list = 0; 21484243125SZenghui Yu 21584243125SZenghui Yu list_for_each_entry(its, &its_nodes, entry) { 2160dd57fedSMarc Zyngier if (!is_v4(its)) 21784243125SZenghui Yu continue; 21884243125SZenghui Yu 219009384b3SMarc Zyngier if (require_its_list_vmovp(vm, its)) 22084243125SZenghui Yu __set_bit(its->list_nr, &its_list); 22184243125SZenghui Yu } 22284243125SZenghui Yu 22384243125SZenghui Yu return (u16)its_list; 22484243125SZenghui Yu } 22584243125SZenghui Yu 226425c09beSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 227425c09beSMarc Zyngier { 228425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 229425c09beSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 230425c09beSMarc Zyngier } 231425c09beSMarc Zyngier 232591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 233591e5becSMarc Zyngier u32 event) 234591e5becSMarc Zyngier { 235591e5becSMarc Zyngier struct its_node *its = its_dev->its; 236591e5becSMarc Zyngier 237591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 238591e5becSMarc Zyngier } 239591e5becSMarc Zyngier 240c1d4d5cdSMarc Zyngier static struct its_vlpi_map *dev_event_to_vlpi_map(struct its_device *its_dev, 241c1d4d5cdSMarc Zyngier u32 event) 242c1d4d5cdSMarc Zyngier { 243c1d4d5cdSMarc Zyngier if (WARN_ON_ONCE(event >= its_dev->event_map.nr_lpis)) 244c1d4d5cdSMarc Zyngier return NULL; 245c1d4d5cdSMarc Zyngier 246c1d4d5cdSMarc Zyngier return &its_dev->event_map.vlpi_maps[event]; 247c1d4d5cdSMarc Zyngier } 248c1d4d5cdSMarc Zyngier 249f4a81f5aSMarc Zyngier static struct its_vlpi_map *get_vlpi_map(struct irq_data *d) 250f4a81f5aSMarc Zyngier { 251f4a81f5aSMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 252f4a81f5aSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 253f4a81f5aSMarc Zyngier u32 event = its_get_event_id(d); 254f4a81f5aSMarc Zyngier 255f4a81f5aSMarc Zyngier return dev_event_to_vlpi_map(its_dev, event); 256f4a81f5aSMarc Zyngier } 257f4a81f5aSMarc Zyngier 258f4a81f5aSMarc Zyngier return NULL; 259f4a81f5aSMarc Zyngier } 260f4a81f5aSMarc Zyngier 261f3a05921SMarc Zyngier static int vpe_to_cpuid_lock(struct its_vpe *vpe, unsigned long *flags) 262425c09beSMarc Zyngier { 263f3a05921SMarc Zyngier raw_spin_lock_irqsave(&vpe->vpe_lock, *flags); 264f3a05921SMarc Zyngier return vpe->col_idx; 265f3a05921SMarc Zyngier } 266f3a05921SMarc Zyngier 267f3a05921SMarc Zyngier static void vpe_to_cpuid_unlock(struct its_vpe *vpe, unsigned long flags) 268f3a05921SMarc Zyngier { 269f3a05921SMarc Zyngier raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); 270f3a05921SMarc Zyngier } 271f3a05921SMarc Zyngier 272926846a7SMarc Zyngier static struct irq_chip its_vpe_irq_chip; 273926846a7SMarc Zyngier 274f3a05921SMarc Zyngier static int irq_to_cpuid_lock(struct irq_data *d, unsigned long *flags) 275f3a05921SMarc Zyngier { 276926846a7SMarc Zyngier struct its_vpe *vpe = NULL; 277f3a05921SMarc Zyngier int cpu; 278f3a05921SMarc Zyngier 279926846a7SMarc Zyngier if (d->chip == &its_vpe_irq_chip) { 280926846a7SMarc Zyngier vpe = irq_data_get_irq_chip_data(d); 281926846a7SMarc Zyngier } else { 282926846a7SMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 283926846a7SMarc Zyngier if (map) 284926846a7SMarc Zyngier vpe = map->vpe; 285926846a7SMarc Zyngier } 286926846a7SMarc Zyngier 287926846a7SMarc Zyngier if (vpe) { 288926846a7SMarc Zyngier cpu = vpe_to_cpuid_lock(vpe, flags); 289f3a05921SMarc Zyngier } else { 290f3a05921SMarc Zyngier /* Physical LPIs are already locked via the irq_desc lock */ 291425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 292f3a05921SMarc Zyngier cpu = its_dev->event_map.col_map[its_get_event_id(d)]; 293f3a05921SMarc Zyngier /* Keep GCC quiet... */ 294f3a05921SMarc Zyngier *flags = 0; 295f3a05921SMarc Zyngier } 296f3a05921SMarc Zyngier 297f3a05921SMarc Zyngier return cpu; 298f3a05921SMarc Zyngier } 299f3a05921SMarc Zyngier 300f3a05921SMarc Zyngier static void irq_to_cpuid_unlock(struct irq_data *d, unsigned long flags) 301f3a05921SMarc Zyngier { 302926846a7SMarc Zyngier struct its_vpe *vpe = NULL; 303425c09beSMarc Zyngier 304926846a7SMarc Zyngier if (d->chip == &its_vpe_irq_chip) { 305926846a7SMarc Zyngier vpe = irq_data_get_irq_chip_data(d); 306926846a7SMarc Zyngier } else { 307926846a7SMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 308f4a81f5aSMarc Zyngier if (map) 309926846a7SMarc Zyngier vpe = map->vpe; 310926846a7SMarc Zyngier } 311926846a7SMarc Zyngier 312926846a7SMarc Zyngier if (vpe) 313926846a7SMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 314425c09beSMarc Zyngier } 315425c09beSMarc Zyngier 31683559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 31783559b47SMarc Zyngier { 31820faba84SJoe Perches if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(15, 0))) 31983559b47SMarc Zyngier return NULL; 32083559b47SMarc Zyngier 32183559b47SMarc Zyngier return col; 32283559b47SMarc Zyngier } 32383559b47SMarc Zyngier 324205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 325205e065dSMarc Zyngier { 326205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 327205e065dSMarc Zyngier return vpe; 328205e065dSMarc Zyngier 329205e065dSMarc Zyngier return NULL; 330205e065dSMarc Zyngier } 331205e065dSMarc Zyngier 332cc2d3216SMarc Zyngier /* 333cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 334cc2d3216SMarc Zyngier * block. 335cc2d3216SMarc Zyngier */ 336cc2d3216SMarc Zyngier struct its_cmd_desc { 337cc2d3216SMarc Zyngier union { 338cc2d3216SMarc Zyngier struct { 339cc2d3216SMarc Zyngier struct its_device *dev; 340cc2d3216SMarc Zyngier u32 event_id; 341cc2d3216SMarc Zyngier } its_inv_cmd; 342cc2d3216SMarc Zyngier 343cc2d3216SMarc Zyngier struct { 344cc2d3216SMarc Zyngier struct its_device *dev; 345cc2d3216SMarc Zyngier u32 event_id; 3468d85dcedSMarc Zyngier } its_clear_cmd; 3478d85dcedSMarc Zyngier 3488d85dcedSMarc Zyngier struct { 3498d85dcedSMarc Zyngier struct its_device *dev; 3508d85dcedSMarc Zyngier u32 event_id; 351cc2d3216SMarc Zyngier } its_int_cmd; 352cc2d3216SMarc Zyngier 353cc2d3216SMarc Zyngier struct { 354cc2d3216SMarc Zyngier struct its_device *dev; 355cc2d3216SMarc Zyngier int valid; 356cc2d3216SMarc Zyngier } its_mapd_cmd; 357cc2d3216SMarc Zyngier 358cc2d3216SMarc Zyngier struct { 359cc2d3216SMarc Zyngier struct its_collection *col; 360cc2d3216SMarc Zyngier int valid; 361cc2d3216SMarc Zyngier } its_mapc_cmd; 362cc2d3216SMarc Zyngier 363cc2d3216SMarc Zyngier struct { 364cc2d3216SMarc Zyngier struct its_device *dev; 365cc2d3216SMarc Zyngier u32 phys_id; 366cc2d3216SMarc Zyngier u32 event_id; 3676a25ad3aSMarc Zyngier } its_mapti_cmd; 368cc2d3216SMarc Zyngier 369cc2d3216SMarc Zyngier struct { 370cc2d3216SMarc Zyngier struct its_device *dev; 371cc2d3216SMarc Zyngier struct its_collection *col; 372591e5becSMarc Zyngier u32 event_id; 373cc2d3216SMarc Zyngier } its_movi_cmd; 374cc2d3216SMarc Zyngier 375cc2d3216SMarc Zyngier struct { 376cc2d3216SMarc Zyngier struct its_device *dev; 377cc2d3216SMarc Zyngier u32 event_id; 378cc2d3216SMarc Zyngier } its_discard_cmd; 379cc2d3216SMarc Zyngier 380cc2d3216SMarc Zyngier struct { 381cc2d3216SMarc Zyngier struct its_collection *col; 382cc2d3216SMarc Zyngier } its_invall_cmd; 383d011e4e6SMarc Zyngier 384d011e4e6SMarc Zyngier struct { 385d011e4e6SMarc Zyngier struct its_vpe *vpe; 386eb78192bSMarc Zyngier } its_vinvall_cmd; 387eb78192bSMarc Zyngier 388eb78192bSMarc Zyngier struct { 389eb78192bSMarc Zyngier struct its_vpe *vpe; 390eb78192bSMarc Zyngier struct its_collection *col; 391eb78192bSMarc Zyngier bool valid; 392eb78192bSMarc Zyngier } its_vmapp_cmd; 393eb78192bSMarc Zyngier 394eb78192bSMarc Zyngier struct { 395eb78192bSMarc Zyngier struct its_vpe *vpe; 396d011e4e6SMarc Zyngier struct its_device *dev; 397d011e4e6SMarc Zyngier u32 virt_id; 398d011e4e6SMarc Zyngier u32 event_id; 399d011e4e6SMarc Zyngier bool db_enabled; 400d011e4e6SMarc Zyngier } its_vmapti_cmd; 401d011e4e6SMarc Zyngier 402d011e4e6SMarc Zyngier struct { 403d011e4e6SMarc Zyngier struct its_vpe *vpe; 404d011e4e6SMarc Zyngier struct its_device *dev; 405d011e4e6SMarc Zyngier u32 event_id; 406d011e4e6SMarc Zyngier bool db_enabled; 407d011e4e6SMarc Zyngier } its_vmovi_cmd; 4083171a47aSMarc Zyngier 4093171a47aSMarc Zyngier struct { 4103171a47aSMarc Zyngier struct its_vpe *vpe; 4113171a47aSMarc Zyngier struct its_collection *col; 4123171a47aSMarc Zyngier u16 seq_num; 4133171a47aSMarc Zyngier u16 its_list; 4143171a47aSMarc Zyngier } its_vmovp_cmd; 415d97c97baSMarc Zyngier 416d97c97baSMarc Zyngier struct { 417d97c97baSMarc Zyngier struct its_vpe *vpe; 418d97c97baSMarc Zyngier } its_invdb_cmd; 419e252cf8aSMarc Zyngier 420e252cf8aSMarc Zyngier struct { 421e252cf8aSMarc Zyngier struct its_vpe *vpe; 422e252cf8aSMarc Zyngier u8 sgi; 423e252cf8aSMarc Zyngier u8 priority; 424e252cf8aSMarc Zyngier bool enable; 425e252cf8aSMarc Zyngier bool group; 426e252cf8aSMarc Zyngier bool clear; 427e252cf8aSMarc Zyngier } its_vsgi_cmd; 428cc2d3216SMarc Zyngier }; 429cc2d3216SMarc Zyngier }; 430cc2d3216SMarc Zyngier 431cc2d3216SMarc Zyngier /* 432cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 433cc2d3216SMarc Zyngier */ 434cc2d3216SMarc Zyngier struct its_cmd_block { 4352bbdfcc5SBen Dooks (Codethink) union { 436cc2d3216SMarc Zyngier u64 raw_cmd[4]; 4372bbdfcc5SBen Dooks (Codethink) __le64 raw_cmd_le[4]; 4382bbdfcc5SBen Dooks (Codethink) }; 439cc2d3216SMarc Zyngier }; 440cc2d3216SMarc Zyngier 441cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 442cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 443cc2d3216SMarc Zyngier 44467047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 44567047f90SMarc Zyngier struct its_cmd_block *, 446cc2d3216SMarc Zyngier struct its_cmd_desc *); 447cc2d3216SMarc Zyngier 44867047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 44967047f90SMarc Zyngier struct its_cmd_block *, 450d011e4e6SMarc Zyngier struct its_cmd_desc *); 451d011e4e6SMarc Zyngier 4524d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 4534d36f136SMarc Zyngier { 4544d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 4554d36f136SMarc Zyngier *raw_cmd &= ~mask; 4564d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 4574d36f136SMarc Zyngier } 4584d36f136SMarc Zyngier 459cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 460cc2d3216SMarc Zyngier { 4614d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 462cc2d3216SMarc Zyngier } 463cc2d3216SMarc Zyngier 464cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 465cc2d3216SMarc Zyngier { 4664d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 467cc2d3216SMarc Zyngier } 468cc2d3216SMarc Zyngier 469cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 470cc2d3216SMarc Zyngier { 4714d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 472cc2d3216SMarc Zyngier } 473cc2d3216SMarc Zyngier 474cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 475cc2d3216SMarc Zyngier { 4764d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 477cc2d3216SMarc Zyngier } 478cc2d3216SMarc Zyngier 479cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 480cc2d3216SMarc Zyngier { 4814d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 482cc2d3216SMarc Zyngier } 483cc2d3216SMarc Zyngier 484cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 485cc2d3216SMarc Zyngier { 48630ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 487cc2d3216SMarc Zyngier } 488cc2d3216SMarc Zyngier 489cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 490cc2d3216SMarc Zyngier { 4914d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 492cc2d3216SMarc Zyngier } 493cc2d3216SMarc Zyngier 494cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 495cc2d3216SMarc Zyngier { 49630ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 497cc2d3216SMarc Zyngier } 498cc2d3216SMarc Zyngier 499cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 500cc2d3216SMarc Zyngier { 5014d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 502cc2d3216SMarc Zyngier } 503cc2d3216SMarc Zyngier 504d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 505d011e4e6SMarc Zyngier { 506d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 507d011e4e6SMarc Zyngier } 508d011e4e6SMarc Zyngier 509d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 510d011e4e6SMarc Zyngier { 511d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 512d011e4e6SMarc Zyngier } 513d011e4e6SMarc Zyngier 514d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 515d011e4e6SMarc Zyngier { 516d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 517d011e4e6SMarc Zyngier } 518d011e4e6SMarc Zyngier 519d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 520d011e4e6SMarc Zyngier { 521d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 522d011e4e6SMarc Zyngier } 523d011e4e6SMarc Zyngier 5243171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 5253171a47aSMarc Zyngier { 5263171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 5273171a47aSMarc Zyngier } 5283171a47aSMarc Zyngier 5293171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 5303171a47aSMarc Zyngier { 5313171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 5323171a47aSMarc Zyngier } 5333171a47aSMarc Zyngier 534eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 535eb78192bSMarc Zyngier { 53630ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 537eb78192bSMarc Zyngier } 538eb78192bSMarc Zyngier 539eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 540eb78192bSMarc Zyngier { 541eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 542eb78192bSMarc Zyngier } 543eb78192bSMarc Zyngier 54464edfaa9SMarc Zyngier static void its_encode_vconf_addr(struct its_cmd_block *cmd, u64 vconf_pa) 54564edfaa9SMarc Zyngier { 54664edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], vconf_pa >> 16, 51, 16); 54764edfaa9SMarc Zyngier } 54864edfaa9SMarc Zyngier 54964edfaa9SMarc Zyngier static void its_encode_alloc(struct its_cmd_block *cmd, bool alloc) 55064edfaa9SMarc Zyngier { 55164edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], alloc, 8, 8); 55264edfaa9SMarc Zyngier } 55364edfaa9SMarc Zyngier 55464edfaa9SMarc Zyngier static void its_encode_ptz(struct its_cmd_block *cmd, bool ptz) 55564edfaa9SMarc Zyngier { 55664edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], ptz, 9, 9); 55764edfaa9SMarc Zyngier } 55864edfaa9SMarc Zyngier 55964edfaa9SMarc Zyngier static void its_encode_vmapp_default_db(struct its_cmd_block *cmd, 56064edfaa9SMarc Zyngier u32 vpe_db_lpi) 56164edfaa9SMarc Zyngier { 56264edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpe_db_lpi, 31, 0); 56364edfaa9SMarc Zyngier } 56464edfaa9SMarc Zyngier 565dd3f050aSMarc Zyngier static void its_encode_vmovp_default_db(struct its_cmd_block *cmd, 566dd3f050aSMarc Zyngier u32 vpe_db_lpi) 567dd3f050aSMarc Zyngier { 568dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpe_db_lpi, 31, 0); 569dd3f050aSMarc Zyngier } 570dd3f050aSMarc Zyngier 571dd3f050aSMarc Zyngier static void its_encode_db(struct its_cmd_block *cmd, bool db) 572dd3f050aSMarc Zyngier { 573dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db, 63, 63); 574dd3f050aSMarc Zyngier } 575dd3f050aSMarc Zyngier 576e252cf8aSMarc Zyngier static void its_encode_sgi_intid(struct its_cmd_block *cmd, u8 sgi) 577e252cf8aSMarc Zyngier { 578e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], sgi, 35, 32); 579e252cf8aSMarc Zyngier } 580e252cf8aSMarc Zyngier 581e252cf8aSMarc Zyngier static void its_encode_sgi_priority(struct its_cmd_block *cmd, u8 prio) 582e252cf8aSMarc Zyngier { 583e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], prio >> 4, 23, 20); 584e252cf8aSMarc Zyngier } 585e252cf8aSMarc Zyngier 586e252cf8aSMarc Zyngier static void its_encode_sgi_group(struct its_cmd_block *cmd, bool grp) 587e252cf8aSMarc Zyngier { 588e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], grp, 10, 10); 589e252cf8aSMarc Zyngier } 590e252cf8aSMarc Zyngier 591e252cf8aSMarc Zyngier static void its_encode_sgi_clear(struct its_cmd_block *cmd, bool clr) 592e252cf8aSMarc Zyngier { 593e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], clr, 9, 9); 594e252cf8aSMarc Zyngier } 595e252cf8aSMarc Zyngier 596e252cf8aSMarc Zyngier static void its_encode_sgi_enable(struct its_cmd_block *cmd, bool en) 597e252cf8aSMarc Zyngier { 598e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], en, 8, 8); 599e252cf8aSMarc Zyngier } 600e252cf8aSMarc Zyngier 601cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 602cc2d3216SMarc Zyngier { 603cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 6042bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[0] = cpu_to_le64(cmd->raw_cmd[0]); 6052bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[1] = cpu_to_le64(cmd->raw_cmd[1]); 6062bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[2] = cpu_to_le64(cmd->raw_cmd[2]); 6072bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[3] = cpu_to_le64(cmd->raw_cmd[3]); 608cc2d3216SMarc Zyngier } 609cc2d3216SMarc Zyngier 61067047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 61167047f90SMarc Zyngier struct its_cmd_block *cmd, 612cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 613cc2d3216SMarc Zyngier { 614cc2d3216SMarc Zyngier unsigned long itt_addr; 615c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 616cc2d3216SMarc Zyngier 617cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 618cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 619cc2d3216SMarc Zyngier 620cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 621cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 622cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 623cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 624cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 625cc2d3216SMarc Zyngier 626cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 627cc2d3216SMarc Zyngier 628591e5becSMarc Zyngier return NULL; 629cc2d3216SMarc Zyngier } 630cc2d3216SMarc Zyngier 63167047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 63267047f90SMarc Zyngier struct its_cmd_block *cmd, 633cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 634cc2d3216SMarc Zyngier { 635cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 636cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 637cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 638cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 639cc2d3216SMarc Zyngier 640cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 641cc2d3216SMarc Zyngier 642cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 643cc2d3216SMarc Zyngier } 644cc2d3216SMarc Zyngier 64567047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 64667047f90SMarc Zyngier struct its_cmd_block *cmd, 647cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 648cc2d3216SMarc Zyngier { 649591e5becSMarc Zyngier struct its_collection *col; 650591e5becSMarc Zyngier 6516a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 6526a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 653591e5becSMarc Zyngier 6546a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 6556a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 6566a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 6576a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 658591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 659cc2d3216SMarc Zyngier 660cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 661cc2d3216SMarc Zyngier 66283559b47SMarc Zyngier return valid_col(col); 663cc2d3216SMarc Zyngier } 664cc2d3216SMarc Zyngier 66567047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 66667047f90SMarc Zyngier struct its_cmd_block *cmd, 667cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 668cc2d3216SMarc Zyngier { 669591e5becSMarc Zyngier struct its_collection *col; 670591e5becSMarc Zyngier 671591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 672591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 673591e5becSMarc Zyngier 674cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 675cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 676591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 677cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 678cc2d3216SMarc Zyngier 679cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 680cc2d3216SMarc Zyngier 68183559b47SMarc Zyngier return valid_col(col); 682cc2d3216SMarc Zyngier } 683cc2d3216SMarc Zyngier 68467047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 68567047f90SMarc Zyngier struct its_cmd_block *cmd, 686cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 687cc2d3216SMarc Zyngier { 688591e5becSMarc Zyngier struct its_collection *col; 689591e5becSMarc Zyngier 690591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 691591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 692591e5becSMarc Zyngier 693cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 694cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 695cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 696cc2d3216SMarc Zyngier 697cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 698cc2d3216SMarc Zyngier 69983559b47SMarc Zyngier return valid_col(col); 700cc2d3216SMarc Zyngier } 701cc2d3216SMarc Zyngier 70267047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 70367047f90SMarc Zyngier struct its_cmd_block *cmd, 704cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 705cc2d3216SMarc Zyngier { 706591e5becSMarc Zyngier struct its_collection *col; 707591e5becSMarc Zyngier 708591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 709591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 710591e5becSMarc Zyngier 711cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 712cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 713cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 714cc2d3216SMarc Zyngier 715cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 716cc2d3216SMarc Zyngier 71783559b47SMarc Zyngier return valid_col(col); 718cc2d3216SMarc Zyngier } 719cc2d3216SMarc Zyngier 72067047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 72167047f90SMarc Zyngier struct its_cmd_block *cmd, 7228d85dcedSMarc Zyngier struct its_cmd_desc *desc) 7238d85dcedSMarc Zyngier { 7248d85dcedSMarc Zyngier struct its_collection *col; 7258d85dcedSMarc Zyngier 7268d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 7278d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 7288d85dcedSMarc Zyngier 7298d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 7308d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 7318d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 7328d85dcedSMarc Zyngier 7338d85dcedSMarc Zyngier its_fixup_cmd(cmd); 7348d85dcedSMarc Zyngier 73583559b47SMarc Zyngier return valid_col(col); 7368d85dcedSMarc Zyngier } 7378d85dcedSMarc Zyngier 73867047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 73967047f90SMarc Zyngier struct its_cmd_block *cmd, 7408d85dcedSMarc Zyngier struct its_cmd_desc *desc) 7418d85dcedSMarc Zyngier { 7428d85dcedSMarc Zyngier struct its_collection *col; 7438d85dcedSMarc Zyngier 7448d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 7458d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 7468d85dcedSMarc Zyngier 7478d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 7488d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 7498d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 7508d85dcedSMarc Zyngier 7518d85dcedSMarc Zyngier its_fixup_cmd(cmd); 7528d85dcedSMarc Zyngier 75383559b47SMarc Zyngier return valid_col(col); 7548d85dcedSMarc Zyngier } 7558d85dcedSMarc Zyngier 75667047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 75767047f90SMarc Zyngier struct its_cmd_block *cmd, 758cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 759cc2d3216SMarc Zyngier { 760cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 76110794522SZenghui Yu its_encode_collection(cmd, desc->its_invall_cmd.col->col_id); 762cc2d3216SMarc Zyngier 763cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 764cc2d3216SMarc Zyngier 765b383a42cSWudi Wang return desc->its_invall_cmd.col; 766cc2d3216SMarc Zyngier } 767cc2d3216SMarc Zyngier 76867047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 76967047f90SMarc Zyngier struct its_cmd_block *cmd, 770eb78192bSMarc Zyngier struct its_cmd_desc *desc) 771eb78192bSMarc Zyngier { 772eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 773eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 774eb78192bSMarc Zyngier 775eb78192bSMarc Zyngier its_fixup_cmd(cmd); 776eb78192bSMarc Zyngier 777205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 778eb78192bSMarc Zyngier } 779eb78192bSMarc Zyngier 78067047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 78167047f90SMarc Zyngier struct its_cmd_block *cmd, 782eb78192bSMarc Zyngier struct its_cmd_desc *desc) 783eb78192bSMarc Zyngier { 78464edfaa9SMarc Zyngier unsigned long vpt_addr, vconf_addr; 7855c9a882eSMarc Zyngier u64 target; 78664edfaa9SMarc Zyngier bool alloc; 787eb78192bSMarc Zyngier 788eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 789eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 790eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 79164edfaa9SMarc Zyngier 79264edfaa9SMarc Zyngier if (!desc->its_vmapp_cmd.valid) { 79364edfaa9SMarc Zyngier if (is_v4_1(its)) { 79464edfaa9SMarc Zyngier alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count); 79564edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 79664edfaa9SMarc Zyngier } 79764edfaa9SMarc Zyngier 79864edfaa9SMarc Zyngier goto out; 79964edfaa9SMarc Zyngier } 80064edfaa9SMarc Zyngier 80164edfaa9SMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 80264edfaa9SMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 80364edfaa9SMarc Zyngier 8045c9a882eSMarc Zyngier its_encode_target(cmd, target); 805eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 806eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 807eb78192bSMarc Zyngier 80864edfaa9SMarc Zyngier if (!is_v4_1(its)) 80964edfaa9SMarc Zyngier goto out; 81064edfaa9SMarc Zyngier 81164edfaa9SMarc Zyngier vconf_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->its_vm->vprop_page)); 81264edfaa9SMarc Zyngier 81364edfaa9SMarc Zyngier alloc = !atomic_fetch_inc(&desc->its_vmapp_cmd.vpe->vmapp_count); 81464edfaa9SMarc Zyngier 81564edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 81664edfaa9SMarc Zyngier 817c21bc068SShenming Lu /* 818c21bc068SShenming Lu * GICv4.1 provides a way to get the VLPI state, which needs the vPE 819c21bc068SShenming Lu * to be unmapped first, and in this case, we may remap the vPE 820c21bc068SShenming Lu * back while the VPT is not empty. So we can't assume that the 821c21bc068SShenming Lu * VPT is empty on map. This is why we never advertise PTZ. 822c21bc068SShenming Lu */ 823c21bc068SShenming Lu its_encode_ptz(cmd, false); 82464edfaa9SMarc Zyngier its_encode_vconf_addr(cmd, vconf_addr); 82564edfaa9SMarc Zyngier its_encode_vmapp_default_db(cmd, desc->its_vmapp_cmd.vpe->vpe_db_lpi); 82664edfaa9SMarc Zyngier 82764edfaa9SMarc Zyngier out: 828eb78192bSMarc Zyngier its_fixup_cmd(cmd); 829eb78192bSMarc Zyngier 830205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 831eb78192bSMarc Zyngier } 832eb78192bSMarc Zyngier 83367047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 83467047f90SMarc Zyngier struct its_cmd_block *cmd, 835d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 836d011e4e6SMarc Zyngier { 837d011e4e6SMarc Zyngier u32 db; 838d011e4e6SMarc Zyngier 8393858d4dfSMarc Zyngier if (!is_v4_1(its) && desc->its_vmapti_cmd.db_enabled) 840d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 841d011e4e6SMarc Zyngier else 842d011e4e6SMarc Zyngier db = 1023; 843d011e4e6SMarc Zyngier 844d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 845d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 846d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 847d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 848d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 849d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 850d011e4e6SMarc Zyngier 851d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 852d011e4e6SMarc Zyngier 853205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 854d011e4e6SMarc Zyngier } 855d011e4e6SMarc Zyngier 85667047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 85767047f90SMarc Zyngier struct its_cmd_block *cmd, 858d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 859d011e4e6SMarc Zyngier { 860d011e4e6SMarc Zyngier u32 db; 861d011e4e6SMarc Zyngier 8623858d4dfSMarc Zyngier if (!is_v4_1(its) && desc->its_vmovi_cmd.db_enabled) 863d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 864d011e4e6SMarc Zyngier else 865d011e4e6SMarc Zyngier db = 1023; 866d011e4e6SMarc Zyngier 867d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 868d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 869d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 870d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 871d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 872d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 873d011e4e6SMarc Zyngier 874d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 875d011e4e6SMarc Zyngier 876205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 877d011e4e6SMarc Zyngier } 878d011e4e6SMarc Zyngier 87967047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 88067047f90SMarc Zyngier struct its_cmd_block *cmd, 8813171a47aSMarc Zyngier struct its_cmd_desc *desc) 8823171a47aSMarc Zyngier { 8835c9a882eSMarc Zyngier u64 target; 8845c9a882eSMarc Zyngier 8855c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 8863171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 8873171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 8883171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 8893171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 8905c9a882eSMarc Zyngier its_encode_target(cmd, target); 8913171a47aSMarc Zyngier 892dd3f050aSMarc Zyngier if (is_v4_1(its)) { 893dd3f050aSMarc Zyngier its_encode_db(cmd, true); 894dd3f050aSMarc Zyngier its_encode_vmovp_default_db(cmd, desc->its_vmovp_cmd.vpe->vpe_db_lpi); 895dd3f050aSMarc Zyngier } 896dd3f050aSMarc Zyngier 8973171a47aSMarc Zyngier its_fixup_cmd(cmd); 8983171a47aSMarc Zyngier 899205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 9003171a47aSMarc Zyngier } 9013171a47aSMarc Zyngier 90228614696SMarc Zyngier static struct its_vpe *its_build_vinv_cmd(struct its_node *its, 90328614696SMarc Zyngier struct its_cmd_block *cmd, 90428614696SMarc Zyngier struct its_cmd_desc *desc) 90528614696SMarc Zyngier { 90628614696SMarc Zyngier struct its_vlpi_map *map; 90728614696SMarc Zyngier 90828614696SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_inv_cmd.dev, 90928614696SMarc Zyngier desc->its_inv_cmd.event_id); 91028614696SMarc Zyngier 91128614696SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 91228614696SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 91328614696SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 91428614696SMarc Zyngier 91528614696SMarc Zyngier its_fixup_cmd(cmd); 91628614696SMarc Zyngier 91728614696SMarc Zyngier return valid_vpe(its, map->vpe); 91828614696SMarc Zyngier } 91928614696SMarc Zyngier 920ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vint_cmd(struct its_node *its, 921ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 922ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 923ed0e4aa9SMarc Zyngier { 924ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 925ed0e4aa9SMarc Zyngier 926ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_int_cmd.dev, 927ed0e4aa9SMarc Zyngier desc->its_int_cmd.event_id); 928ed0e4aa9SMarc Zyngier 929ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 930ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 931ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 932ed0e4aa9SMarc Zyngier 933ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 934ed0e4aa9SMarc Zyngier 935ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 936ed0e4aa9SMarc Zyngier } 937ed0e4aa9SMarc Zyngier 938ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vclear_cmd(struct its_node *its, 939ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 940ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 941ed0e4aa9SMarc Zyngier { 942ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 943ed0e4aa9SMarc Zyngier 944ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_clear_cmd.dev, 945ed0e4aa9SMarc Zyngier desc->its_clear_cmd.event_id); 946ed0e4aa9SMarc Zyngier 947ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 948ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 949ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 950ed0e4aa9SMarc Zyngier 951ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 952ed0e4aa9SMarc Zyngier 953ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 954ed0e4aa9SMarc Zyngier } 955ed0e4aa9SMarc Zyngier 956d97c97baSMarc Zyngier static struct its_vpe *its_build_invdb_cmd(struct its_node *its, 957d97c97baSMarc Zyngier struct its_cmd_block *cmd, 958d97c97baSMarc Zyngier struct its_cmd_desc *desc) 959d97c97baSMarc Zyngier { 960d97c97baSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 961d97c97baSMarc Zyngier return NULL; 962d97c97baSMarc Zyngier 963d97c97baSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVDB); 964d97c97baSMarc Zyngier its_encode_vpeid(cmd, desc->its_invdb_cmd.vpe->vpe_id); 965d97c97baSMarc Zyngier 966d97c97baSMarc Zyngier its_fixup_cmd(cmd); 967d97c97baSMarc Zyngier 968d97c97baSMarc Zyngier return valid_vpe(its, desc->its_invdb_cmd.vpe); 969d97c97baSMarc Zyngier } 970d97c97baSMarc Zyngier 971e252cf8aSMarc Zyngier static struct its_vpe *its_build_vsgi_cmd(struct its_node *its, 972e252cf8aSMarc Zyngier struct its_cmd_block *cmd, 973e252cf8aSMarc Zyngier struct its_cmd_desc *desc) 974e252cf8aSMarc Zyngier { 975e252cf8aSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 976e252cf8aSMarc Zyngier return NULL; 977e252cf8aSMarc Zyngier 978e252cf8aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VSGI); 979e252cf8aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vsgi_cmd.vpe->vpe_id); 980e252cf8aSMarc Zyngier its_encode_sgi_intid(cmd, desc->its_vsgi_cmd.sgi); 981e252cf8aSMarc Zyngier its_encode_sgi_priority(cmd, desc->its_vsgi_cmd.priority); 982e252cf8aSMarc Zyngier its_encode_sgi_group(cmd, desc->its_vsgi_cmd.group); 983e252cf8aSMarc Zyngier its_encode_sgi_clear(cmd, desc->its_vsgi_cmd.clear); 984e252cf8aSMarc Zyngier its_encode_sgi_enable(cmd, desc->its_vsgi_cmd.enable); 985e252cf8aSMarc Zyngier 986e252cf8aSMarc Zyngier its_fixup_cmd(cmd); 987e252cf8aSMarc Zyngier 988e252cf8aSMarc Zyngier return valid_vpe(its, desc->its_vsgi_cmd.vpe); 989e252cf8aSMarc Zyngier } 990e252cf8aSMarc Zyngier 991cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 992cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 993cc2d3216SMarc Zyngier { 994cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 995cc2d3216SMarc Zyngier } 996cc2d3216SMarc Zyngier 997cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 998cc2d3216SMarc Zyngier { 999cc2d3216SMarc Zyngier int widx; 1000cc2d3216SMarc Zyngier int ridx; 1001cc2d3216SMarc Zyngier 1002cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 1003cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 1004cc2d3216SMarc Zyngier 1005cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 1006cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 1007cc2d3216SMarc Zyngier return 1; 1008cc2d3216SMarc Zyngier 1009cc2d3216SMarc Zyngier return 0; 1010cc2d3216SMarc Zyngier } 1011cc2d3216SMarc Zyngier 1012cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 1013cc2d3216SMarc Zyngier { 1014cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 1015cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 1016cc2d3216SMarc Zyngier 1017cc2d3216SMarc Zyngier while (its_queue_full(its)) { 1018cc2d3216SMarc Zyngier count--; 1019cc2d3216SMarc Zyngier if (!count) { 1020cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 1021cc2d3216SMarc Zyngier return NULL; 1022cc2d3216SMarc Zyngier } 1023cc2d3216SMarc Zyngier cpu_relax(); 1024cc2d3216SMarc Zyngier udelay(1); 1025cc2d3216SMarc Zyngier } 1026cc2d3216SMarc Zyngier 1027cc2d3216SMarc Zyngier cmd = its->cmd_write++; 1028cc2d3216SMarc Zyngier 1029cc2d3216SMarc Zyngier /* Handle queue wrapping */ 1030cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 1031cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 1032cc2d3216SMarc Zyngier 103334d677a9SMarc Zyngier /* Clear command */ 103434d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 103534d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 103634d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 103734d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 103834d677a9SMarc Zyngier 1039cc2d3216SMarc Zyngier return cmd; 1040cc2d3216SMarc Zyngier } 1041cc2d3216SMarc Zyngier 1042cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 1043cc2d3216SMarc Zyngier { 1044cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 1045cc2d3216SMarc Zyngier 1046cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 1047cc2d3216SMarc Zyngier 1048cc2d3216SMarc Zyngier return its->cmd_write; 1049cc2d3216SMarc Zyngier } 1050cc2d3216SMarc Zyngier 1051cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 1052cc2d3216SMarc Zyngier { 1053cc2d3216SMarc Zyngier /* 1054cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 1055cc2d3216SMarc Zyngier * the ITS. 1056cc2d3216SMarc Zyngier */ 1057cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 1058328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 1059cc2d3216SMarc Zyngier else 1060cc2d3216SMarc Zyngier dsb(ishst); 1061cc2d3216SMarc Zyngier } 1062cc2d3216SMarc Zyngier 1063a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 1064a050fa54SHeyi Guo u64 prev_idx, 1065cc2d3216SMarc Zyngier struct its_cmd_block *to) 1066cc2d3216SMarc Zyngier { 1067a050fa54SHeyi Guo u64 rd_idx, to_idx, linear_idx; 1068cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 1069cc2d3216SMarc Zyngier 1070a050fa54SHeyi Guo /* Linearize to_idx if the command set has wrapped around */ 1071cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 1072a050fa54SHeyi Guo if (to_idx < prev_idx) 1073a050fa54SHeyi Guo to_idx += ITS_CMD_QUEUE_SZ; 1074a050fa54SHeyi Guo 1075a050fa54SHeyi Guo linear_idx = prev_idx; 1076cc2d3216SMarc Zyngier 1077cc2d3216SMarc Zyngier while (1) { 1078a050fa54SHeyi Guo s64 delta; 1079a050fa54SHeyi Guo 1080cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 10819bdd8b1cSMarc Zyngier 1082a050fa54SHeyi Guo /* 1083a050fa54SHeyi Guo * Compute the read pointer progress, taking the 1084a050fa54SHeyi Guo * potential wrap-around into account. 1085a050fa54SHeyi Guo */ 1086a050fa54SHeyi Guo delta = rd_idx - prev_idx; 1087a050fa54SHeyi Guo if (rd_idx < prev_idx) 1088a050fa54SHeyi Guo delta += ITS_CMD_QUEUE_SZ; 10899bdd8b1cSMarc Zyngier 1090a050fa54SHeyi Guo linear_idx += delta; 1091a050fa54SHeyi Guo if (linear_idx >= to_idx) 1092cc2d3216SMarc Zyngier break; 1093cc2d3216SMarc Zyngier 1094cc2d3216SMarc Zyngier count--; 1095cc2d3216SMarc Zyngier if (!count) { 1096a050fa54SHeyi Guo pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", 1097a050fa54SHeyi Guo to_idx, linear_idx); 1098a19b462fSMarc Zyngier return -1; 1099cc2d3216SMarc Zyngier } 1100a050fa54SHeyi Guo prev_idx = rd_idx; 1101cc2d3216SMarc Zyngier cpu_relax(); 1102cc2d3216SMarc Zyngier udelay(1); 1103cc2d3216SMarc Zyngier } 1104a19b462fSMarc Zyngier 1105a19b462fSMarc Zyngier return 0; 1106cc2d3216SMarc Zyngier } 1107cc2d3216SMarc Zyngier 1108e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 1109e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 1110e4f9094bSMarc Zyngier void name(struct its_node *its, \ 1111e4f9094bSMarc Zyngier buildtype builder, \ 1112e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 1113e4f9094bSMarc Zyngier { \ 1114e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 1115e4f9094bSMarc Zyngier synctype *sync_obj; \ 1116e4f9094bSMarc Zyngier unsigned long flags; \ 1117a050fa54SHeyi Guo u64 rd_idx; \ 1118e4f9094bSMarc Zyngier \ 1119e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 1120e4f9094bSMarc Zyngier \ 1121e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 1122e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 1123e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1124e4f9094bSMarc Zyngier return; \ 1125e4f9094bSMarc Zyngier } \ 112667047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 1127e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 1128e4f9094bSMarc Zyngier \ 1129e4f9094bSMarc Zyngier if (sync_obj) { \ 1130e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 1131e4f9094bSMarc Zyngier if (!sync_cmd) \ 1132e4f9094bSMarc Zyngier goto post; \ 1133e4f9094bSMarc Zyngier \ 113467047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 1135e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 1136e4f9094bSMarc Zyngier } \ 1137e4f9094bSMarc Zyngier \ 1138e4f9094bSMarc Zyngier post: \ 1139a050fa54SHeyi Guo rd_idx = readl_relaxed(its->base + GITS_CREADR); \ 1140e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 1141e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1142e4f9094bSMarc Zyngier \ 1143a050fa54SHeyi Guo if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \ 1144a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 1145e4f9094bSMarc Zyngier } 1146e4f9094bSMarc Zyngier 114767047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 114867047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1149e4f9094bSMarc Zyngier struct its_collection *sync_col) 1150cc2d3216SMarc Zyngier { 1151cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 1152cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 1153e4f9094bSMarc Zyngier 1154cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 1155cc2d3216SMarc Zyngier } 1156cc2d3216SMarc Zyngier 1157e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 1158e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 1159cc2d3216SMarc Zyngier 116067047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 116167047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1162d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 1163d011e4e6SMarc Zyngier { 1164d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 1165d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 1166d011e4e6SMarc Zyngier 1167d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 1168d011e4e6SMarc Zyngier } 1169d011e4e6SMarc Zyngier 1170d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 1171d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 1172d011e4e6SMarc Zyngier 11738d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 11748d85dcedSMarc Zyngier { 11758d85dcedSMarc Zyngier struct its_cmd_desc desc; 11768d85dcedSMarc Zyngier 11778d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 11788d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 11798d85dcedSMarc Zyngier 11808d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 11818d85dcedSMarc Zyngier } 11828d85dcedSMarc Zyngier 11838d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 11848d85dcedSMarc Zyngier { 11858d85dcedSMarc Zyngier struct its_cmd_desc desc; 11868d85dcedSMarc Zyngier 11878d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 11888d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 11898d85dcedSMarc Zyngier 11908d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 1191cc2d3216SMarc Zyngier } 1192cc2d3216SMarc Zyngier 1193cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 1194cc2d3216SMarc Zyngier { 1195cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1196cc2d3216SMarc Zyngier 1197cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 1198cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 1199cc2d3216SMarc Zyngier 1200cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 1201cc2d3216SMarc Zyngier } 1202cc2d3216SMarc Zyngier 1203cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 1204cc2d3216SMarc Zyngier { 1205cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1206cc2d3216SMarc Zyngier 1207cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 1208cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 1209cc2d3216SMarc Zyngier 1210cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 1211cc2d3216SMarc Zyngier } 1212cc2d3216SMarc Zyngier 1213cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 1214cc2d3216SMarc Zyngier int valid) 1215cc2d3216SMarc Zyngier { 1216cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1217cc2d3216SMarc Zyngier 1218cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 1219cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 1220cc2d3216SMarc Zyngier 1221cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 1222cc2d3216SMarc Zyngier } 1223cc2d3216SMarc Zyngier 12246a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 1225cc2d3216SMarc Zyngier { 1226cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1227cc2d3216SMarc Zyngier 12286a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 12296a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 12306a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 1231cc2d3216SMarc Zyngier 12326a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 1233cc2d3216SMarc Zyngier } 1234cc2d3216SMarc Zyngier 1235cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 1236cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 1237cc2d3216SMarc Zyngier { 1238cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1239cc2d3216SMarc Zyngier 1240cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 1241cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 1242591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 1243cc2d3216SMarc Zyngier 1244cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 1245cc2d3216SMarc Zyngier } 1246cc2d3216SMarc Zyngier 1247cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 1248cc2d3216SMarc Zyngier { 1249cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1250cc2d3216SMarc Zyngier 1251cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 1252cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 1253cc2d3216SMarc Zyngier 1254cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 1255cc2d3216SMarc Zyngier } 1256cc2d3216SMarc Zyngier 1257cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 1258cc2d3216SMarc Zyngier { 1259cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1260cc2d3216SMarc Zyngier 1261cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 1262cc2d3216SMarc Zyngier 1263cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 1264cc2d3216SMarc Zyngier } 1265c48ed51cSMarc Zyngier 1266d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 1267d011e4e6SMarc Zyngier { 1268c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1269d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1270d011e4e6SMarc Zyngier 1271d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 1272d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 1273d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 1274d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 1275d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 1276d011e4e6SMarc Zyngier 1277d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 1278d011e4e6SMarc Zyngier } 1279d011e4e6SMarc Zyngier 1280d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 1281d011e4e6SMarc Zyngier { 1282c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1283d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1284d011e4e6SMarc Zyngier 1285d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 1286d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 1287d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 1288d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 1289d011e4e6SMarc Zyngier 1290d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 1291d011e4e6SMarc Zyngier } 1292d011e4e6SMarc Zyngier 129375fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 129475fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 1295eb78192bSMarc Zyngier { 1296eb78192bSMarc Zyngier struct its_cmd_desc desc; 1297eb78192bSMarc Zyngier 1298eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 1299eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 1300eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 130175fd951bSMarc Zyngier 1302eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 1303eb78192bSMarc Zyngier } 1304eb78192bSMarc Zyngier 13053171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 13063171a47aSMarc Zyngier { 130784243125SZenghui Yu struct its_cmd_desc desc = {}; 13083171a47aSMarc Zyngier struct its_node *its; 13093171a47aSMarc Zyngier unsigned long flags; 13103171a47aSMarc Zyngier int col_id = vpe->col_idx; 13113171a47aSMarc Zyngier 13123171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 13133171a47aSMarc Zyngier 13143171a47aSMarc Zyngier if (!its_list_map) { 13153171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 13163171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 13173171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 13183171a47aSMarc Zyngier return; 13193171a47aSMarc Zyngier } 13203171a47aSMarc Zyngier 13213171a47aSMarc Zyngier /* 13223171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 13233171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 13243171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 13253171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 13263171a47aSMarc Zyngier * 13273171a47aSMarc Zyngier * Wall <-- Head. 13283171a47aSMarc Zyngier */ 13293171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 13303171a47aSMarc Zyngier 13313171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 133284243125SZenghui Yu desc.its_vmovp_cmd.its_list = get_its_list(vpe->its_vm); 13333171a47aSMarc Zyngier 13343171a47aSMarc Zyngier /* Emit VMOVPs */ 13353171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 13360dd57fedSMarc Zyngier if (!is_v4(its)) 13373171a47aSMarc Zyngier continue; 13383171a47aSMarc Zyngier 1339009384b3SMarc Zyngier if (!require_its_list_vmovp(vpe->its_vm, its)) 13402247e1bfSMarc Zyngier continue; 13412247e1bfSMarc Zyngier 13423171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 13433171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 13443171a47aSMarc Zyngier } 13453171a47aSMarc Zyngier 13463171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 13473171a47aSMarc Zyngier } 13483171a47aSMarc Zyngier 134940619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1350eb78192bSMarc Zyngier { 1351eb78192bSMarc Zyngier struct its_cmd_desc desc; 1352eb78192bSMarc Zyngier 1353eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1354eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1355eb78192bSMarc Zyngier } 1356eb78192bSMarc Zyngier 135728614696SMarc Zyngier static void its_send_vinv(struct its_device *dev, u32 event_id) 135828614696SMarc Zyngier { 135928614696SMarc Zyngier struct its_cmd_desc desc; 136028614696SMarc Zyngier 136128614696SMarc Zyngier /* 136228614696SMarc Zyngier * There is no real VINV command. This is just a normal INV, 136328614696SMarc Zyngier * with a VSYNC instead of a SYNC. 136428614696SMarc Zyngier */ 136528614696SMarc Zyngier desc.its_inv_cmd.dev = dev; 136628614696SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 136728614696SMarc Zyngier 136828614696SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); 136928614696SMarc Zyngier } 137028614696SMarc Zyngier 1371ed0e4aa9SMarc Zyngier static void its_send_vint(struct its_device *dev, u32 event_id) 1372ed0e4aa9SMarc Zyngier { 1373ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1374ed0e4aa9SMarc Zyngier 1375ed0e4aa9SMarc Zyngier /* 1376ed0e4aa9SMarc Zyngier * There is no real VINT command. This is just a normal INT, 1377ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1378ed0e4aa9SMarc Zyngier */ 1379ed0e4aa9SMarc Zyngier desc.its_int_cmd.dev = dev; 1380ed0e4aa9SMarc Zyngier desc.its_int_cmd.event_id = event_id; 1381ed0e4aa9SMarc Zyngier 1382ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); 1383ed0e4aa9SMarc Zyngier } 1384ed0e4aa9SMarc Zyngier 1385ed0e4aa9SMarc Zyngier static void its_send_vclear(struct its_device *dev, u32 event_id) 1386ed0e4aa9SMarc Zyngier { 1387ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1388ed0e4aa9SMarc Zyngier 1389ed0e4aa9SMarc Zyngier /* 1390ed0e4aa9SMarc Zyngier * There is no real VCLEAR command. This is just a normal CLEAR, 1391ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1392ed0e4aa9SMarc Zyngier */ 1393ed0e4aa9SMarc Zyngier desc.its_clear_cmd.dev = dev; 1394ed0e4aa9SMarc Zyngier desc.its_clear_cmd.event_id = event_id; 1395ed0e4aa9SMarc Zyngier 1396ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); 1397ed0e4aa9SMarc Zyngier } 1398ed0e4aa9SMarc Zyngier 1399d97c97baSMarc Zyngier static void its_send_invdb(struct its_node *its, struct its_vpe *vpe) 1400d97c97baSMarc Zyngier { 1401d97c97baSMarc Zyngier struct its_cmd_desc desc; 1402d97c97baSMarc Zyngier 1403d97c97baSMarc Zyngier desc.its_invdb_cmd.vpe = vpe; 1404d97c97baSMarc Zyngier its_send_single_vcommand(its, its_build_invdb_cmd, &desc); 1405d97c97baSMarc Zyngier } 1406d97c97baSMarc Zyngier 1407c48ed51cSMarc Zyngier /* 1408c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1409c48ed51cSMarc Zyngier */ 1410015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1411c48ed51cSMarc Zyngier { 1412c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1413015ec038SMarc Zyngier irq_hw_number_t hwirq; 1414e1a2e201SMarc Zyngier void *va; 1415adcdb94eSMarc Zyngier u8 *cfg; 1416c48ed51cSMarc Zyngier 1417c1d4d5cdSMarc Zyngier if (map) { 1418c1d4d5cdSMarc Zyngier va = page_address(map->vm->vprop_page); 1419d4d7b4adSMarc Zyngier hwirq = map->vintid; 1420d4d7b4adSMarc Zyngier 1421d4d7b4adSMarc Zyngier /* Remember the updated property */ 1422d4d7b4adSMarc Zyngier map->properties &= ~clr; 1423d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1424015ec038SMarc Zyngier } else { 1425e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1426015ec038SMarc Zyngier hwirq = d->hwirq; 1427015ec038SMarc Zyngier } 1428adcdb94eSMarc Zyngier 1429e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1430adcdb94eSMarc Zyngier *cfg &= ~clr; 1431015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1432c48ed51cSMarc Zyngier 1433c48ed51cSMarc Zyngier /* 1434c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1435c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1436c48ed51cSMarc Zyngier * Humpf... 1437c48ed51cSMarc Zyngier */ 1438c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1439328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1440c48ed51cSMarc Zyngier else 1441c48ed51cSMarc Zyngier dsb(ishst); 1442015ec038SMarc Zyngier } 1443015ec038SMarc Zyngier 14442f4f064bSMarc Zyngier static void wait_for_syncr(void __iomem *rdbase) 14452f4f064bSMarc Zyngier { 144604d80dbeSHeyi Guo while (readl_relaxed(rdbase + GICR_SYNCR) & 1) 14472f4f064bSMarc Zyngier cpu_relax(); 14482f4f064bSMarc Zyngier } 14492f4f064bSMarc Zyngier 1450926846a7SMarc Zyngier static void __direct_lpi_inv(struct irq_data *d, u64 val) 1451926846a7SMarc Zyngier { 1452926846a7SMarc Zyngier void __iomem *rdbase; 1453926846a7SMarc Zyngier unsigned long flags; 1454926846a7SMarc Zyngier int cpu; 1455926846a7SMarc Zyngier 1456926846a7SMarc Zyngier /* Target the redistributor this LPI is currently routed to */ 1457926846a7SMarc Zyngier cpu = irq_to_cpuid_lock(d, &flags); 1458926846a7SMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 1459926846a7SMarc Zyngier 1460926846a7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; 1461926846a7SMarc Zyngier gic_write_lpir(val, rdbase + GICR_INVLPIR); 1462926846a7SMarc Zyngier wait_for_syncr(rdbase); 1463926846a7SMarc Zyngier 1464926846a7SMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 1465926846a7SMarc Zyngier irq_to_cpuid_unlock(d, flags); 1466926846a7SMarc Zyngier } 1467926846a7SMarc Zyngier 1468425c09beSMarc Zyngier static void direct_lpi_inv(struct irq_data *d) 1469425c09beSMarc Zyngier { 1470f4a81f5aSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1471f4a81f5aSMarc Zyngier u64 val; 1472f4a81f5aSMarc Zyngier 1473f4a81f5aSMarc Zyngier if (map) { 1474f4a81f5aSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1475f4a81f5aSMarc Zyngier 1476f4a81f5aSMarc Zyngier WARN_ON(!is_v4_1(its_dev->its)); 1477f4a81f5aSMarc Zyngier 1478f4a81f5aSMarc Zyngier val = GICR_INVLPIR_V; 1479f4a81f5aSMarc Zyngier val |= FIELD_PREP(GICR_INVLPIR_VPEID, map->vpe->vpe_id); 1480f4a81f5aSMarc Zyngier val |= FIELD_PREP(GICR_INVLPIR_INTID, map->vintid); 1481f4a81f5aSMarc Zyngier } else { 1482f4a81f5aSMarc Zyngier val = d->hwirq; 1483f4a81f5aSMarc Zyngier } 1484425c09beSMarc Zyngier 1485926846a7SMarc Zyngier __direct_lpi_inv(d, val); 1486425c09beSMarc Zyngier } 1487425c09beSMarc Zyngier 1488015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1489015ec038SMarc Zyngier { 1490015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1491015ec038SMarc Zyngier 1492015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1493f4a81f5aSMarc Zyngier if (gic_rdists->has_direct_lpi && 1494f4a81f5aSMarc Zyngier (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) 1495425c09beSMarc Zyngier direct_lpi_inv(d); 149628614696SMarc Zyngier else if (!irqd_is_forwarded_to_vcpu(d)) 1497adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 149828614696SMarc Zyngier else 149928614696SMarc Zyngier its_send_vinv(its_dev, its_get_event_id(d)); 1500c48ed51cSMarc Zyngier } 1501c48ed51cSMarc Zyngier 1502015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1503015ec038SMarc Zyngier { 1504015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1505015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1506c1d4d5cdSMarc Zyngier struct its_vlpi_map *map; 1507015ec038SMarc Zyngier 15083858d4dfSMarc Zyngier /* 15093858d4dfSMarc Zyngier * GICv4.1 does away with the per-LPI nonsense, nothing to do 15103858d4dfSMarc Zyngier * here. 15113858d4dfSMarc Zyngier */ 15123858d4dfSMarc Zyngier if (is_v4_1(its_dev->its)) 15133858d4dfSMarc Zyngier return; 15143858d4dfSMarc Zyngier 1515c1d4d5cdSMarc Zyngier map = dev_event_to_vlpi_map(its_dev, event); 1516c1d4d5cdSMarc Zyngier 1517c1d4d5cdSMarc Zyngier if (map->db_enabled == enable) 1518015ec038SMarc Zyngier return; 1519015ec038SMarc Zyngier 1520c1d4d5cdSMarc Zyngier map->db_enabled = enable; 1521015ec038SMarc Zyngier 1522015ec038SMarc Zyngier /* 1523015ec038SMarc Zyngier * More fun with the architecture: 1524015ec038SMarc Zyngier * 1525015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1526015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1527a359f757SIngo Molnar * would be issuing a mapping for an /existing/ DevID+EventID 1528015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1529015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1530015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1531015ec038SMarc Zyngier */ 1532015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1533c48ed51cSMarc Zyngier } 1534c48ed51cSMarc Zyngier 1535c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1536c48ed51cSMarc Zyngier { 1537015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1538015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1539015ec038SMarc Zyngier 1540adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1541c48ed51cSMarc Zyngier } 1542c48ed51cSMarc Zyngier 1543c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1544c48ed51cSMarc Zyngier { 1545015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1546015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1547015ec038SMarc Zyngier 1548adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1549c48ed51cSMarc Zyngier } 1550c48ed51cSMarc Zyngier 15512f13ff1dSMarc Zyngier static __maybe_unused u32 its_read_lpi_count(struct irq_data *d, int cpu) 15522f13ff1dSMarc Zyngier { 15532f13ff1dSMarc Zyngier if (irqd_affinity_is_managed(d)) 15542f13ff1dSMarc Zyngier return atomic_read(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); 15552f13ff1dSMarc Zyngier 15562f13ff1dSMarc Zyngier return atomic_read(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); 15572f13ff1dSMarc Zyngier } 15582f13ff1dSMarc Zyngier 15592f13ff1dSMarc Zyngier static void its_inc_lpi_count(struct irq_data *d, int cpu) 15602f13ff1dSMarc Zyngier { 15612f13ff1dSMarc Zyngier if (irqd_affinity_is_managed(d)) 15622f13ff1dSMarc Zyngier atomic_inc(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); 15632f13ff1dSMarc Zyngier else 15642f13ff1dSMarc Zyngier atomic_inc(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); 15652f13ff1dSMarc Zyngier } 15662f13ff1dSMarc Zyngier 15672f13ff1dSMarc Zyngier static void its_dec_lpi_count(struct irq_data *d, int cpu) 15682f13ff1dSMarc Zyngier { 15692f13ff1dSMarc Zyngier if (irqd_affinity_is_managed(d)) 15702f13ff1dSMarc Zyngier atomic_dec(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); 15712f13ff1dSMarc Zyngier else 15722f13ff1dSMarc Zyngier atomic_dec(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); 15732f13ff1dSMarc Zyngier } 15742f13ff1dSMarc Zyngier 1575c5d6082dSMarc Zyngier static unsigned int cpumask_pick_least_loaded(struct irq_data *d, 1576c5d6082dSMarc Zyngier const struct cpumask *cpu_mask) 1577c5d6082dSMarc Zyngier { 1578c5d6082dSMarc Zyngier unsigned int cpu = nr_cpu_ids, tmp; 1579c5d6082dSMarc Zyngier int count = S32_MAX; 1580c5d6082dSMarc Zyngier 1581c5d6082dSMarc Zyngier for_each_cpu(tmp, cpu_mask) { 1582c5d6082dSMarc Zyngier int this_count = its_read_lpi_count(d, tmp); 1583c5d6082dSMarc Zyngier if (this_count < count) { 1584c5d6082dSMarc Zyngier cpu = tmp; 1585c5d6082dSMarc Zyngier count = this_count; 1586c5d6082dSMarc Zyngier } 1587c5d6082dSMarc Zyngier } 1588c5d6082dSMarc Zyngier 1589c5d6082dSMarc Zyngier return cpu; 1590c5d6082dSMarc Zyngier } 1591c5d6082dSMarc Zyngier 1592c5d6082dSMarc Zyngier /* 1593c5d6082dSMarc Zyngier * As suggested by Thomas Gleixner in: 1594c5d6082dSMarc Zyngier * https://lore.kernel.org/r/87h80q2aoc.fsf@nanos.tec.linutronix.de 1595c5d6082dSMarc Zyngier */ 1596c5d6082dSMarc Zyngier static int its_select_cpu(struct irq_data *d, 1597c5d6082dSMarc Zyngier const struct cpumask *aff_mask) 1598c5d6082dSMarc Zyngier { 1599c5d6082dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1600f55a9b59SPierre Gondois static DEFINE_RAW_SPINLOCK(tmpmask_lock); 1601f55a9b59SPierre Gondois static struct cpumask __tmpmask; 1602f55a9b59SPierre Gondois struct cpumask *tmpmask; 1603f55a9b59SPierre Gondois unsigned long flags; 1604c5d6082dSMarc Zyngier int cpu, node; 1605c5d6082dSMarc Zyngier node = its_dev->its->numa_node; 1606f55a9b59SPierre Gondois tmpmask = &__tmpmask; 1607f55a9b59SPierre Gondois 1608f55a9b59SPierre Gondois raw_spin_lock_irqsave(&tmpmask_lock, flags); 1609c5d6082dSMarc Zyngier 1610c5d6082dSMarc Zyngier if (!irqd_affinity_is_managed(d)) { 1611c5d6082dSMarc Zyngier /* First try the NUMA node */ 1612c5d6082dSMarc Zyngier if (node != NUMA_NO_NODE) { 1613c5d6082dSMarc Zyngier /* 1614c5d6082dSMarc Zyngier * Try the intersection of the affinity mask and the 1615c5d6082dSMarc Zyngier * node mask (and the online mask, just to be safe). 1616c5d6082dSMarc Zyngier */ 1617c5d6082dSMarc Zyngier cpumask_and(tmpmask, cpumask_of_node(node), aff_mask); 1618c5d6082dSMarc Zyngier cpumask_and(tmpmask, tmpmask, cpu_online_mask); 1619c5d6082dSMarc Zyngier 1620c5d6082dSMarc Zyngier /* 1621c5d6082dSMarc Zyngier * Ideally, we would check if the mask is empty, and 1622c5d6082dSMarc Zyngier * try again on the full node here. 1623c5d6082dSMarc Zyngier * 1624c5d6082dSMarc Zyngier * But it turns out that the way ACPI describes the 1625c5d6082dSMarc Zyngier * affinity for ITSs only deals about memory, and 1626c5d6082dSMarc Zyngier * not target CPUs, so it cannot describe a single 1627c5d6082dSMarc Zyngier * ITS placed next to two NUMA nodes. 1628c5d6082dSMarc Zyngier * 1629c5d6082dSMarc Zyngier * Instead, just fallback on the online mask. This 1630c5d6082dSMarc Zyngier * diverges from Thomas' suggestion above. 1631c5d6082dSMarc Zyngier */ 1632c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, tmpmask); 1633c5d6082dSMarc Zyngier if (cpu < nr_cpu_ids) 1634c5d6082dSMarc Zyngier goto out; 1635c5d6082dSMarc Zyngier 1636c5d6082dSMarc Zyngier /* If we can't cross sockets, give up */ 1637c5d6082dSMarc Zyngier if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144)) 1638c5d6082dSMarc Zyngier goto out; 1639c5d6082dSMarc Zyngier 1640c5d6082dSMarc Zyngier /* If the above failed, expand the search */ 1641c5d6082dSMarc Zyngier } 1642c5d6082dSMarc Zyngier 1643c5d6082dSMarc Zyngier /* Try the intersection of the affinity and online masks */ 1644c5d6082dSMarc Zyngier cpumask_and(tmpmask, aff_mask, cpu_online_mask); 1645c5d6082dSMarc Zyngier 1646c5d6082dSMarc Zyngier /* If that doesn't fly, the online mask is the last resort */ 1647c5d6082dSMarc Zyngier if (cpumask_empty(tmpmask)) 1648c5d6082dSMarc Zyngier cpumask_copy(tmpmask, cpu_online_mask); 1649c5d6082dSMarc Zyngier 1650c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, tmpmask); 1651c5d6082dSMarc Zyngier } else { 16523f893a59SMarc Zyngier cpumask_copy(tmpmask, aff_mask); 1653c5d6082dSMarc Zyngier 1654c5d6082dSMarc Zyngier /* If we cannot cross sockets, limit the search to that node */ 1655c5d6082dSMarc Zyngier if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) && 1656c5d6082dSMarc Zyngier node != NUMA_NO_NODE) 1657c5d6082dSMarc Zyngier cpumask_and(tmpmask, tmpmask, cpumask_of_node(node)); 1658c5d6082dSMarc Zyngier 1659c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, tmpmask); 1660c5d6082dSMarc Zyngier } 1661c5d6082dSMarc Zyngier out: 1662f55a9b59SPierre Gondois raw_spin_unlock_irqrestore(&tmpmask_lock, flags); 1663c5d6082dSMarc Zyngier 1664c5d6082dSMarc Zyngier pr_debug("IRQ%d -> %*pbl CPU%d\n", d->irq, cpumask_pr_args(aff_mask), cpu); 1665c5d6082dSMarc Zyngier return cpu; 1666c5d6082dSMarc Zyngier } 1667c5d6082dSMarc Zyngier 1668c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1669c48ed51cSMarc Zyngier bool force) 1670c48ed51cSMarc Zyngier { 1671c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1672c48ed51cSMarc Zyngier struct its_collection *target_col; 1673c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1674c5d6082dSMarc Zyngier int cpu, prev_cpu; 1675c48ed51cSMarc Zyngier 1676015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1677015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1678015ec038SMarc Zyngier return -EINVAL; 1679015ec038SMarc Zyngier 16802f13ff1dSMarc Zyngier prev_cpu = its_dev->event_map.col_map[id]; 16812f13ff1dSMarc Zyngier its_dec_lpi_count(d, prev_cpu); 16822f13ff1dSMarc Zyngier 1683c5d6082dSMarc Zyngier if (!force) 1684c5d6082dSMarc Zyngier cpu = its_select_cpu(d, mask_val); 1685c5d6082dSMarc Zyngier else 1686c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, mask_val); 1687fbf8f40eSGanapatrao Kulkarni 1688c5d6082dSMarc Zyngier if (cpu < 0 || cpu >= nr_cpu_ids) 16892f13ff1dSMarc Zyngier goto err; 1690c48ed51cSMarc Zyngier 16918b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 16922f13ff1dSMarc Zyngier if (cpu != prev_cpu) { 1693c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1694c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1695591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 16960d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 16978b8d94a7SMaJun } 1698c48ed51cSMarc Zyngier 16992f13ff1dSMarc Zyngier its_inc_lpi_count(d, cpu); 17002f13ff1dSMarc Zyngier 1701c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 17022f13ff1dSMarc Zyngier 17032f13ff1dSMarc Zyngier err: 17042f13ff1dSMarc Zyngier its_inc_lpi_count(d, prev_cpu); 17052f13ff1dSMarc Zyngier return -EINVAL; 1706c48ed51cSMarc Zyngier } 1707c48ed51cSMarc Zyngier 1708558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1709558b0165SArd Biesheuvel { 1710558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1711558b0165SArd Biesheuvel 1712558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1713558b0165SArd Biesheuvel } 1714558b0165SArd Biesheuvel 1715b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1716b48ac83dSMarc Zyngier { 1717b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1718b48ac83dSMarc Zyngier struct its_node *its; 1719b48ac83dSMarc Zyngier u64 addr; 1720b48ac83dSMarc Zyngier 1721b48ac83dSMarc Zyngier its = its_dev->its; 1722558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1723b48ac83dSMarc Zyngier 1724b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1725b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1726b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 172744bb7e24SRobin Murphy 172835ae7df2SJulien Grall iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); 1729b48ac83dSMarc Zyngier } 1730b48ac83dSMarc Zyngier 17318d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 17328d85dcedSMarc Zyngier enum irqchip_irq_state which, 17338d85dcedSMarc Zyngier bool state) 17348d85dcedSMarc Zyngier { 17358d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 17368d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 17378d85dcedSMarc Zyngier 17388d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 17398d85dcedSMarc Zyngier return -EINVAL; 17408d85dcedSMarc Zyngier 1741ed0e4aa9SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1742ed0e4aa9SMarc Zyngier if (state) 1743ed0e4aa9SMarc Zyngier its_send_vint(its_dev, event); 1744ed0e4aa9SMarc Zyngier else 1745ed0e4aa9SMarc Zyngier its_send_vclear(its_dev, event); 1746ed0e4aa9SMarc Zyngier } else { 17478d85dcedSMarc Zyngier if (state) 17488d85dcedSMarc Zyngier its_send_int(its_dev, event); 17498d85dcedSMarc Zyngier else 17508d85dcedSMarc Zyngier its_send_clear(its_dev, event); 1751ed0e4aa9SMarc Zyngier } 17528d85dcedSMarc Zyngier 17538d85dcedSMarc Zyngier return 0; 17548d85dcedSMarc Zyngier } 17558d85dcedSMarc Zyngier 17565f774f5eSMarc Zyngier static int its_irq_retrigger(struct irq_data *d) 17575f774f5eSMarc Zyngier { 17585f774f5eSMarc Zyngier return !its_irq_set_irqchip_state(d, IRQCHIP_STATE_PENDING, true); 17595f774f5eSMarc Zyngier } 17605f774f5eSMarc Zyngier 1761009384b3SMarc Zyngier /* 1762009384b3SMarc Zyngier * Two favourable cases: 1763009384b3SMarc Zyngier * 1764009384b3SMarc Zyngier * (a) Either we have a GICv4.1, and all vPEs have to be mapped at all times 1765009384b3SMarc Zyngier * for vSGI delivery 1766009384b3SMarc Zyngier * 1767009384b3SMarc Zyngier * (b) Or the ITSs do not use a list map, meaning that VMOVP is cheap enough 1768009384b3SMarc Zyngier * and we're better off mapping all VPEs always 1769009384b3SMarc Zyngier * 1770009384b3SMarc Zyngier * If neither (a) nor (b) is true, then we map vPEs on demand. 1771009384b3SMarc Zyngier * 1772009384b3SMarc Zyngier */ 1773009384b3SMarc Zyngier static bool gic_requires_eager_mapping(void) 1774009384b3SMarc Zyngier { 1775009384b3SMarc Zyngier if (!its_list_map || gic_rdists->has_rvpeid) 1776009384b3SMarc Zyngier return true; 1777009384b3SMarc Zyngier 1778009384b3SMarc Zyngier return false; 1779009384b3SMarc Zyngier } 1780009384b3SMarc Zyngier 17812247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 17822247e1bfSMarc Zyngier { 17832247e1bfSMarc Zyngier unsigned long flags; 17842247e1bfSMarc Zyngier 1785009384b3SMarc Zyngier if (gic_requires_eager_mapping()) 17862247e1bfSMarc Zyngier return; 17872247e1bfSMarc Zyngier 17882247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 17892247e1bfSMarc Zyngier 17902247e1bfSMarc Zyngier /* 17912247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 17922247e1bfSMarc Zyngier * them mapped now. 17932247e1bfSMarc Zyngier */ 17942247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 17952247e1bfSMarc Zyngier 17962247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 17972247e1bfSMarc Zyngier int i; 17982247e1bfSMarc Zyngier 17992247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 18002247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 180144c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 18022247e1bfSMarc Zyngier 18032247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 18042247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 18052247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 18062247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 180744c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 18082247e1bfSMarc Zyngier } 18092247e1bfSMarc Zyngier } 18102247e1bfSMarc Zyngier 18112247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 18122247e1bfSMarc Zyngier } 18132247e1bfSMarc Zyngier 18142247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 18152247e1bfSMarc Zyngier { 18162247e1bfSMarc Zyngier unsigned long flags; 18172247e1bfSMarc Zyngier 18182247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 1819009384b3SMarc Zyngier if (gic_requires_eager_mapping()) 18202247e1bfSMarc Zyngier return; 18212247e1bfSMarc Zyngier 18222247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 18232247e1bfSMarc Zyngier 18242247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 18252247e1bfSMarc Zyngier int i; 18262247e1bfSMarc Zyngier 18272247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 18282247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 18292247e1bfSMarc Zyngier } 18302247e1bfSMarc Zyngier 18312247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 18322247e1bfSMarc Zyngier } 18332247e1bfSMarc Zyngier 1834d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1835d011e4e6SMarc Zyngier { 1836d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1837d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1838d011e4e6SMarc Zyngier int ret = 0; 1839d011e4e6SMarc Zyngier 1840d011e4e6SMarc Zyngier if (!info->map) 1841d011e4e6SMarc Zyngier return -EINVAL; 1842d011e4e6SMarc Zyngier 184311635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1844d011e4e6SMarc Zyngier 1845d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1846d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1847d011e4e6SMarc Zyngier 18486396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 184911635fa2SMarc Zyngier GFP_ATOMIC); 1850d011e4e6SMarc Zyngier if (!maps) { 1851d011e4e6SMarc Zyngier ret = -ENOMEM; 1852d011e4e6SMarc Zyngier goto out; 1853d011e4e6SMarc Zyngier } 1854d011e4e6SMarc Zyngier 1855d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1856d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1857d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1858d011e4e6SMarc Zyngier ret = -EINVAL; 1859d011e4e6SMarc Zyngier goto out; 1860d011e4e6SMarc Zyngier } 1861d011e4e6SMarc Zyngier 1862d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1863d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1864d011e4e6SMarc Zyngier 1865d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1866d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1867d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1868d011e4e6SMarc Zyngier } else { 18692247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 18702247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 18712247e1bfSMarc Zyngier 1872d4d7b4adSMarc Zyngier /* 1873d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1874d4d7b4adSMarc Zyngier * start poking the virtual property table. 1875d4d7b4adSMarc Zyngier */ 1876d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1877d4d7b4adSMarc Zyngier 1878d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1879d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1880d4d7b4adSMarc Zyngier 1881d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1882d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1883d011e4e6SMarc Zyngier 1884d011e4e6SMarc Zyngier /* and install the virtual one */ 1885d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1886d011e4e6SMarc Zyngier 1887d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1888d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1889d011e4e6SMarc Zyngier } 1890d011e4e6SMarc Zyngier 1891d011e4e6SMarc Zyngier out: 189211635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1893d011e4e6SMarc Zyngier return ret; 1894d011e4e6SMarc Zyngier } 1895d011e4e6SMarc Zyngier 1896d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1897d011e4e6SMarc Zyngier { 1898d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1899046b5054SMarc Zyngier struct its_vlpi_map *map; 1900d011e4e6SMarc Zyngier int ret = 0; 1901d011e4e6SMarc Zyngier 190211635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1903d011e4e6SMarc Zyngier 1904046b5054SMarc Zyngier map = get_vlpi_map(d); 1905046b5054SMarc Zyngier 1906046b5054SMarc Zyngier if (!its_dev->event_map.vm || !map) { 1907d011e4e6SMarc Zyngier ret = -EINVAL; 1908d011e4e6SMarc Zyngier goto out; 1909d011e4e6SMarc Zyngier } 1910d011e4e6SMarc Zyngier 1911d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1912c1d4d5cdSMarc Zyngier *info->map = *map; 1913d011e4e6SMarc Zyngier 1914d011e4e6SMarc Zyngier out: 191511635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1916d011e4e6SMarc Zyngier return ret; 1917d011e4e6SMarc Zyngier } 1918d011e4e6SMarc Zyngier 1919d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1920d011e4e6SMarc Zyngier { 1921d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1922d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1923d011e4e6SMarc Zyngier int ret = 0; 1924d011e4e6SMarc Zyngier 192511635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1926d011e4e6SMarc Zyngier 1927d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1928d011e4e6SMarc Zyngier ret = -EINVAL; 1929d011e4e6SMarc Zyngier goto out; 1930d011e4e6SMarc Zyngier } 1931d011e4e6SMarc Zyngier 1932d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1933d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1934d011e4e6SMarc Zyngier 1935d011e4e6SMarc Zyngier /* and restore the physical one */ 1936d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1937d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1938d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1939d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1940d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1941d011e4e6SMarc Zyngier 19422247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 19432247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 19442247e1bfSMarc Zyngier 1945d011e4e6SMarc Zyngier /* 1946d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1947d011e4e6SMarc Zyngier * this was the last VLPI. 1948d011e4e6SMarc Zyngier */ 1949d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1950d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1951d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1952d011e4e6SMarc Zyngier } 1953d011e4e6SMarc Zyngier 1954d011e4e6SMarc Zyngier out: 195511635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1956d011e4e6SMarc Zyngier return ret; 1957d011e4e6SMarc Zyngier } 1958d011e4e6SMarc Zyngier 1959015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1960015ec038SMarc Zyngier { 1961015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1962015ec038SMarc Zyngier 1963015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1964015ec038SMarc Zyngier return -EINVAL; 1965015ec038SMarc Zyngier 1966015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1967015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1968015ec038SMarc Zyngier else 1969015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1970015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1971015ec038SMarc Zyngier 1972015ec038SMarc Zyngier return 0; 1973015ec038SMarc Zyngier } 1974015ec038SMarc Zyngier 1975c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1976c808eea8SMarc Zyngier { 1977c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1978c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1979c808eea8SMarc Zyngier 1980c808eea8SMarc Zyngier /* Need a v4 ITS */ 19810dd57fedSMarc Zyngier if (!is_v4(its_dev->its)) 1982c808eea8SMarc Zyngier return -EINVAL; 1983c808eea8SMarc Zyngier 1984d011e4e6SMarc Zyngier /* Unmap request? */ 1985d011e4e6SMarc Zyngier if (!info) 1986d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1987d011e4e6SMarc Zyngier 1988c808eea8SMarc Zyngier switch (info->cmd_type) { 1989c808eea8SMarc Zyngier case MAP_VLPI: 1990d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1991c808eea8SMarc Zyngier 1992c808eea8SMarc Zyngier case GET_VLPI: 1993d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1994c808eea8SMarc Zyngier 1995c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1996c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1997015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1998c808eea8SMarc Zyngier 1999c808eea8SMarc Zyngier default: 2000c808eea8SMarc Zyngier return -EINVAL; 2001c808eea8SMarc Zyngier } 2002c808eea8SMarc Zyngier } 2003c808eea8SMarc Zyngier 2004c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 2005c48ed51cSMarc Zyngier .name = "ITS", 2006c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 2007c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 2008004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 2009c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 2010b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 20118d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 20125f774f5eSMarc Zyngier .irq_retrigger = its_irq_retrigger, 2013c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 2014b48ac83dSMarc Zyngier }; 2015b48ac83dSMarc Zyngier 2016880cb3cdSMarc Zyngier 2017bf9529f8SMarc Zyngier /* 2018bf9529f8SMarc Zyngier * How we allocate LPIs: 2019bf9529f8SMarc Zyngier * 2020880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 2021880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 2022880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 2023880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 2024bf9529f8SMarc Zyngier * 2025880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 2026880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 2027880cb3cdSMarc Zyngier * already free block. 2028880cb3cdSMarc Zyngier * 2029880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 2030880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 2031880cb3cdSMarc Zyngier */ 20324cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 2033880cb3cdSMarc Zyngier 2034880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 2035880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 2036bf9529f8SMarc Zyngier 2037880cb3cdSMarc Zyngier struct lpi_range { 2038880cb3cdSMarc Zyngier struct list_head entry; 2039880cb3cdSMarc Zyngier u32 base_id; 2040880cb3cdSMarc Zyngier u32 span; 2041880cb3cdSMarc Zyngier }; 2042880cb3cdSMarc Zyngier 2043880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 2044bf9529f8SMarc Zyngier { 2045880cb3cdSMarc Zyngier struct lpi_range *range; 2046880cb3cdSMarc Zyngier 20471c73fac5SRasmus Villemoes range = kmalloc(sizeof(*range), GFP_KERNEL); 2048880cb3cdSMarc Zyngier if (range) { 2049880cb3cdSMarc Zyngier range->base_id = base; 2050880cb3cdSMarc Zyngier range->span = span; 2051bf9529f8SMarc Zyngier } 2052bf9529f8SMarc Zyngier 2053880cb3cdSMarc Zyngier return range; 2054880cb3cdSMarc Zyngier } 2055880cb3cdSMarc Zyngier 2056880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 2057880cb3cdSMarc Zyngier { 2058880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 2059880cb3cdSMarc Zyngier int err = -ENOSPC; 2060880cb3cdSMarc Zyngier 2061880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 2062880cb3cdSMarc Zyngier 2063880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 2064880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 2065880cb3cdSMarc Zyngier *base = range->base_id; 2066880cb3cdSMarc Zyngier range->base_id += nr_lpis; 2067880cb3cdSMarc Zyngier range->span -= nr_lpis; 2068880cb3cdSMarc Zyngier 2069880cb3cdSMarc Zyngier if (range->span == 0) { 2070880cb3cdSMarc Zyngier list_del(&range->entry); 2071880cb3cdSMarc Zyngier kfree(range); 2072880cb3cdSMarc Zyngier } 2073880cb3cdSMarc Zyngier 2074880cb3cdSMarc Zyngier err = 0; 2075880cb3cdSMarc Zyngier break; 2076880cb3cdSMarc Zyngier } 2077880cb3cdSMarc Zyngier } 2078880cb3cdSMarc Zyngier 2079880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 2080880cb3cdSMarc Zyngier 2081880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 2082880cb3cdSMarc Zyngier return err; 2083880cb3cdSMarc Zyngier } 2084880cb3cdSMarc Zyngier 208512eade12SRasmus Villemoes static void merge_lpi_ranges(struct lpi_range *a, struct lpi_range *b) 208612eade12SRasmus Villemoes { 208712eade12SRasmus Villemoes if (&a->entry == &lpi_range_list || &b->entry == &lpi_range_list) 208812eade12SRasmus Villemoes return; 208912eade12SRasmus Villemoes if (a->base_id + a->span != b->base_id) 209012eade12SRasmus Villemoes return; 209112eade12SRasmus Villemoes b->base_id = a->base_id; 209212eade12SRasmus Villemoes b->span += a->span; 209312eade12SRasmus Villemoes list_del(&a->entry); 209412eade12SRasmus Villemoes kfree(a); 209512eade12SRasmus Villemoes } 209612eade12SRasmus Villemoes 2097880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 2098880cb3cdSMarc Zyngier { 209912eade12SRasmus Villemoes struct lpi_range *new, *old; 2100880cb3cdSMarc Zyngier 2101880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 2102b31a3838SRasmus Villemoes if (!new) 2103b31a3838SRasmus Villemoes return -ENOMEM; 2104880cb3cdSMarc Zyngier 2105880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 2106880cb3cdSMarc Zyngier 210712eade12SRasmus Villemoes list_for_each_entry_reverse(old, &lpi_range_list, entry) { 210812eade12SRasmus Villemoes if (old->base_id < base) 210912eade12SRasmus Villemoes break; 2110880cb3cdSMarc Zyngier } 211112eade12SRasmus Villemoes /* 211212eade12SRasmus Villemoes * old is the last element with ->base_id smaller than base, 211312eade12SRasmus Villemoes * so new goes right after it. If there are no elements with 211412eade12SRasmus Villemoes * ->base_id smaller than base, &old->entry ends up pointing 211512eade12SRasmus Villemoes * at the head of the list, and inserting new it the start of 211612eade12SRasmus Villemoes * the list is the right thing to do in that case as well. 211712eade12SRasmus Villemoes */ 211812eade12SRasmus Villemoes list_add(&new->entry, &old->entry); 211912eade12SRasmus Villemoes /* 212012eade12SRasmus Villemoes * Now check if we can merge with the preceding and/or 212112eade12SRasmus Villemoes * following ranges. 212212eade12SRasmus Villemoes */ 212312eade12SRasmus Villemoes merge_lpi_ranges(old, new); 212412eade12SRasmus Villemoes merge_lpi_ranges(new, list_next_entry(new, entry)); 2125880cb3cdSMarc Zyngier 2126880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 2127b31a3838SRasmus Villemoes return 0; 2128bf9529f8SMarc Zyngier } 2129bf9529f8SMarc Zyngier 213004a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 2131bf9529f8SMarc Zyngier { 2132880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 213312b2905aSMarc Zyngier u32 numlpis; 2134880cb3cdSMarc Zyngier int err; 2135bf9529f8SMarc Zyngier 213612b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 213712b2905aSMarc Zyngier 213812b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 213912b2905aSMarc Zyngier lpis = numlpis; 214012b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 214112b2905aSMarc Zyngier lpis); 214212b2905aSMarc Zyngier } 214312b2905aSMarc Zyngier 2144880cb3cdSMarc Zyngier /* 2145880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 2146880cb3cdSMarc Zyngier * full range of LPIs. 2147880cb3cdSMarc Zyngier */ 2148880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 2149880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 2150880cb3cdSMarc Zyngier return err; 2151bf9529f8SMarc Zyngier } 2152bf9529f8SMarc Zyngier 215338dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 2154bf9529f8SMarc Zyngier { 2155bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 2156880cb3cdSMarc Zyngier int err = 0; 2157bf9529f8SMarc Zyngier 2158bf9529f8SMarc Zyngier do { 215938dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 2160880cb3cdSMarc Zyngier if (!err) 2161bf9529f8SMarc Zyngier break; 2162bf9529f8SMarc Zyngier 216338dd7c49SMarc Zyngier nr_irqs /= 2; 216438dd7c49SMarc Zyngier } while (nr_irqs > 0); 2165bf9529f8SMarc Zyngier 216645725e0fSMarc Zyngier if (!nr_irqs) 216745725e0fSMarc Zyngier err = -ENOSPC; 216845725e0fSMarc Zyngier 2169880cb3cdSMarc Zyngier if (err) 2170bf9529f8SMarc Zyngier goto out; 2171bf9529f8SMarc Zyngier 2172ff5fe886SAndy Shevchenko bitmap = bitmap_zalloc(nr_irqs, GFP_ATOMIC); 2173bf9529f8SMarc Zyngier if (!bitmap) 2174bf9529f8SMarc Zyngier goto out; 2175bf9529f8SMarc Zyngier 217638dd7c49SMarc Zyngier *nr_ids = nr_irqs; 2177bf9529f8SMarc Zyngier 2178bf9529f8SMarc Zyngier out: 2179c8415b94SMarc Zyngier if (!bitmap) 2180c8415b94SMarc Zyngier *base = *nr_ids = 0; 2181c8415b94SMarc Zyngier 2182bf9529f8SMarc Zyngier return bitmap; 2183bf9529f8SMarc Zyngier } 2184bf9529f8SMarc Zyngier 218538dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 2186bf9529f8SMarc Zyngier { 2187880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 2188ff5fe886SAndy Shevchenko bitmap_free(bitmap); 2189bf9529f8SMarc Zyngier } 21901ac19ca6SMarc Zyngier 2191053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 2192053be485SMarc Zyngier { 2193053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 2194053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 2195053be485SMarc Zyngier 2196053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 2197053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 2198053be485SMarc Zyngier } 2199053be485SMarc Zyngier 22000e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 22010e5ccf91SMarc Zyngier { 22020e5ccf91SMarc Zyngier struct page *prop_page; 22031ac19ca6SMarc Zyngier 22040e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 22050e5ccf91SMarc Zyngier if (!prop_page) 22060e5ccf91SMarc Zyngier return NULL; 22070e5ccf91SMarc Zyngier 2208053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 22090e5ccf91SMarc Zyngier 22100e5ccf91SMarc Zyngier return prop_page; 22110e5ccf91SMarc Zyngier } 22120e5ccf91SMarc Zyngier 22137d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 22147d75bbb4SMarc Zyngier { 22157d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 22167d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 22177d75bbb4SMarc Zyngier } 22181ac19ca6SMarc Zyngier 22195e2c9f9aSMarc Zyngier static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) 22205e2c9f9aSMarc Zyngier { 22215e2c9f9aSMarc Zyngier phys_addr_t start, end, addr_end; 22225e2c9f9aSMarc Zyngier u64 i; 22235e2c9f9aSMarc Zyngier 22245e2c9f9aSMarc Zyngier /* 22255e2c9f9aSMarc Zyngier * We don't bother checking for a kdump kernel as by 22265e2c9f9aSMarc Zyngier * construction, the LPI tables are out of this kernel's 22275e2c9f9aSMarc Zyngier * memory map. 22285e2c9f9aSMarc Zyngier */ 22295e2c9f9aSMarc Zyngier if (is_kdump_kernel()) 22305e2c9f9aSMarc Zyngier return true; 22315e2c9f9aSMarc Zyngier 22325e2c9f9aSMarc Zyngier addr_end = addr + size - 1; 22335e2c9f9aSMarc Zyngier 22349f3d5eaaSMike Rapoport for_each_reserved_mem_range(i, &start, &end) { 22355e2c9f9aSMarc Zyngier if (addr >= start && addr_end <= end) 22365e2c9f9aSMarc Zyngier return true; 22375e2c9f9aSMarc Zyngier } 22385e2c9f9aSMarc Zyngier 22395e2c9f9aSMarc Zyngier /* Not found, not a good sign... */ 22405e2c9f9aSMarc Zyngier pr_warn("GICv3: Expected reserved range [%pa:%pa], not found\n", 22415e2c9f9aSMarc Zyngier &addr, &addr_end); 22425e2c9f9aSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 22435e2c9f9aSMarc Zyngier return false; 22445e2c9f9aSMarc Zyngier } 22455e2c9f9aSMarc Zyngier 22463fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 22473fb68faeSMarc Zyngier { 22483fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 22493fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 22503fb68faeSMarc Zyngier 22513fb68faeSMarc Zyngier return 0; 22523fb68faeSMarc Zyngier } 22533fb68faeSMarc Zyngier 225411e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 22551ac19ca6SMarc Zyngier { 2256c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 2257c440a9d9SMarc Zyngier u64 val; 2258c440a9d9SMarc Zyngier 2259c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 2260c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 2261c440a9d9SMarc Zyngier 2262c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 2263c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 2264c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 2265c440a9d9SMarc Zyngier MEMREMAP_WB); 2266c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 2267c440a9d9SMarc Zyngier } else { 2268e1a2e201SMarc Zyngier struct page *page; 22691ac19ca6SMarc Zyngier 2270c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 2271c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 22724cb205c0SJia He ITS_MAX_LPI_NRBITS); 2273e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 2274e1a2e201SMarc Zyngier if (!page) { 22751ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 22761ac19ca6SMarc Zyngier return -ENOMEM; 22771ac19ca6SMarc Zyngier } 22781ac19ca6SMarc Zyngier 2279e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 2280e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 22813fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 22823fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 2283c440a9d9SMarc Zyngier } 2284e1a2e201SMarc Zyngier 2285e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 2286e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 22871ac19ca6SMarc Zyngier 22886c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 22891ac19ca6SMarc Zyngier } 22901ac19ca6SMarc Zyngier 22911ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 22921ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 22931ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 22944f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 22951ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 22961ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 22971ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 22981ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 22991ac19ca6SMarc Zyngier }; 23001ac19ca6SMarc Zyngier 23012d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 23022d81d425SShanker Donthineni { 23032d81d425SShanker Donthineni u32 idx = baser - its->tables; 23042d81d425SShanker Donthineni 23050968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 23062d81d425SShanker Donthineni } 23072d81d425SShanker Donthineni 23082d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 23092d81d425SShanker Donthineni u64 val) 23102d81d425SShanker Donthineni { 23112d81d425SShanker Donthineni u32 idx = baser - its->tables; 23122d81d425SShanker Donthineni 23130968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 23142d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 23152d81d425SShanker Donthineni } 23162d81d425SShanker Donthineni 23179347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 2318d5df9dc9SMarc Zyngier u64 cache, u64 shr, u32 order, bool indirect) 23199347359aSShanker Donthineni { 23209347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 23219347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 23229347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 232330ae9610SShanker Donthineni u64 baser_phys, tmp; 2324d5df9dc9SMarc Zyngier u32 alloc_pages, psz; 2325539d3782SShanker Donthineni struct page *page; 23269347359aSShanker Donthineni void *base; 23279347359aSShanker Donthineni 2328d5df9dc9SMarc Zyngier psz = baser->psz; 23299347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 23309347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 23319347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 23329347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 23339347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 23349347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 23359347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 23369347359aSShanker Donthineni } 23379347359aSShanker Donthineni 2338539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); 2339539d3782SShanker Donthineni if (!page) 23409347359aSShanker Donthineni return -ENOMEM; 23419347359aSShanker Donthineni 2342539d3782SShanker Donthineni base = (void *)page_address(page); 234330ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 234430ae9610SShanker Donthineni 234530ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 234630ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 234730ae9610SShanker Donthineni 234830ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 234930ae9610SShanker Donthineni if (psz != SZ_64K) { 235030ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 235130ae9610SShanker Donthineni free_pages((unsigned long)base, order); 235230ae9610SShanker Donthineni return -ENXIO; 235330ae9610SShanker Donthineni } 235430ae9610SShanker Donthineni 235530ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 235630ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 235730ae9610SShanker Donthineni } 235830ae9610SShanker Donthineni 23599347359aSShanker Donthineni retry_baser: 236030ae9610SShanker Donthineni val = (baser_phys | 23619347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 23629347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 23639347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 23649347359aSShanker Donthineni cache | 23659347359aSShanker Donthineni shr | 23669347359aSShanker Donthineni GITS_BASER_VALID); 23679347359aSShanker Donthineni 23683faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 23693faf24eaSShanker Donthineni 23709347359aSShanker Donthineni switch (psz) { 23719347359aSShanker Donthineni case SZ_4K: 23729347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 23739347359aSShanker Donthineni break; 23749347359aSShanker Donthineni case SZ_16K: 23759347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 23769347359aSShanker Donthineni break; 23779347359aSShanker Donthineni case SZ_64K: 23789347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 23799347359aSShanker Donthineni break; 23809347359aSShanker Donthineni } 23819347359aSShanker Donthineni 23829347359aSShanker Donthineni its_write_baser(its, baser, val); 23839347359aSShanker Donthineni tmp = baser->val; 23849347359aSShanker Donthineni 2385a8707f55SSebastian Reichel if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) 2386a8707f55SSebastian Reichel tmp &= ~GITS_BASER_SHAREABILITY_MASK; 2387a8707f55SSebastian Reichel 23889347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 23899347359aSShanker Donthineni /* 23909347359aSShanker Donthineni * Shareability didn't stick. Just use 23919347359aSShanker Donthineni * whatever the read reported, which is likely 23929347359aSShanker Donthineni * to be the only thing this redistributor 23939347359aSShanker Donthineni * supports. If that's zero, make it 23949347359aSShanker Donthineni * non-cacheable as well. 23959347359aSShanker Donthineni */ 23969347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 23979347359aSShanker Donthineni if (!shr) { 23989347359aSShanker Donthineni cache = GITS_BASER_nC; 2399328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 24009347359aSShanker Donthineni } 24019347359aSShanker Donthineni goto retry_baser; 24029347359aSShanker Donthineni } 24039347359aSShanker Donthineni 24049347359aSShanker Donthineni if (val != tmp) { 2405b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 24069347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 2407b11283ebSVladimir Murzin val, tmp); 24089347359aSShanker Donthineni free_pages((unsigned long)base, order); 24099347359aSShanker Donthineni return -ENXIO; 24109347359aSShanker Donthineni } 24119347359aSShanker Donthineni 24129347359aSShanker Donthineni baser->order = order; 24139347359aSShanker Donthineni baser->base = base; 24149347359aSShanker Donthineni baser->psz = psz; 24153faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 24169347359aSShanker Donthineni 24173faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 2418d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 24199347359aSShanker Donthineni its_base_type_string[type], 24209347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 24213faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 24229347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 24239347359aSShanker Donthineni 24249347359aSShanker Donthineni return 0; 24259347359aSShanker Donthineni } 24269347359aSShanker Donthineni 24274cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 24284cacac57SMarc Zyngier struct its_baser *baser, 2429d5df9dc9SMarc Zyngier u32 *order, u32 ids) 24304b75c459SShanker Donthineni { 24314cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 24324cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 24334cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 24342fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 24354b75c459SShanker Donthineni u32 new_order = *order; 2436d5df9dc9SMarc Zyngier u32 psz = baser->psz; 24373faf24eaSShanker Donthineni bool indirect = false; 24383faf24eaSShanker Donthineni 24393faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 24403faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 24413faf24eaSShanker Donthineni /* 24423faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 24433faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 24443faf24eaSShanker Donthineni */ 24453faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 24463faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 24473faf24eaSShanker Donthineni 24483faf24eaSShanker Donthineni if (indirect) { 24493faf24eaSShanker Donthineni /* 24503faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 24513faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 24523faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 24533faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 24543faf24eaSShanker Donthineni * entry size. 24553faf24eaSShanker Donthineni */ 2456d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 24573faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 24583faf24eaSShanker Donthineni } 24593faf24eaSShanker Donthineni } 24604b75c459SShanker Donthineni 24614b75c459SShanker Donthineni /* 24624b75c459SShanker Donthineni * Allocate as many entries as required to fit the 24634b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 24644b75c459SShanker Donthineni * space being incredibly sparse, this results in a 24653faf24eaSShanker Donthineni * massive waste of memory if two-level device table 24663faf24eaSShanker Donthineni * feature is not supported by hardware. 24674b75c459SShanker Donthineni */ 24684b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 246923baf831SKirill A. Shutemov if (new_order > MAX_ORDER) { 247023baf831SKirill A. Shutemov new_order = MAX_ORDER; 2471d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 2472576a8342SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", 24734cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 2474576a8342SMarc Zyngier device_ids(its), ids); 24754b75c459SShanker Donthineni } 24764b75c459SShanker Donthineni 24774b75c459SShanker Donthineni *order = new_order; 24783faf24eaSShanker Donthineni 24793faf24eaSShanker Donthineni return indirect; 24804b75c459SShanker Donthineni } 24814b75c459SShanker Donthineni 24825e516846SMarc Zyngier static u32 compute_common_aff(u64 val) 24835e516846SMarc Zyngier { 24845e516846SMarc Zyngier u32 aff, clpiaff; 24855e516846SMarc Zyngier 24865e516846SMarc Zyngier aff = FIELD_GET(GICR_TYPER_AFFINITY, val); 24875e516846SMarc Zyngier clpiaff = FIELD_GET(GICR_TYPER_COMMON_LPI_AFF, val); 24885e516846SMarc Zyngier 24895e516846SMarc Zyngier return aff & ~(GENMASK(31, 0) >> (clpiaff * 8)); 24905e516846SMarc Zyngier } 24915e516846SMarc Zyngier 24925e516846SMarc Zyngier static u32 compute_its_aff(struct its_node *its) 24935e516846SMarc Zyngier { 24945e516846SMarc Zyngier u64 val; 24955e516846SMarc Zyngier u32 svpet; 24965e516846SMarc Zyngier 24975e516846SMarc Zyngier /* 24985e516846SMarc Zyngier * Reencode the ITS SVPET and MPIDR as a GICR_TYPER, and compute 24995e516846SMarc Zyngier * the resulting affinity. We then use that to see if this match 25005e516846SMarc Zyngier * our own affinity. 25015e516846SMarc Zyngier */ 25025e516846SMarc Zyngier svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); 25035e516846SMarc Zyngier val = FIELD_PREP(GICR_TYPER_COMMON_LPI_AFF, svpet); 25045e516846SMarc Zyngier val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); 25055e516846SMarc Zyngier return compute_common_aff(val); 25065e516846SMarc Zyngier } 25075e516846SMarc Zyngier 25085e516846SMarc Zyngier static struct its_node *find_sibling_its(struct its_node *cur_its) 25095e516846SMarc Zyngier { 25105e516846SMarc Zyngier struct its_node *its; 25115e516846SMarc Zyngier u32 aff; 25125e516846SMarc Zyngier 25135e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, cur_its->typer)) 25145e516846SMarc Zyngier return NULL; 25155e516846SMarc Zyngier 25165e516846SMarc Zyngier aff = compute_its_aff(cur_its); 25175e516846SMarc Zyngier 25185e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 25195e516846SMarc Zyngier u64 baser; 25205e516846SMarc Zyngier 25215e516846SMarc Zyngier if (!is_v4_1(its) || its == cur_its) 25225e516846SMarc Zyngier continue; 25235e516846SMarc Zyngier 25245e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 25255e516846SMarc Zyngier continue; 25265e516846SMarc Zyngier 25275e516846SMarc Zyngier if (aff != compute_its_aff(its)) 25285e516846SMarc Zyngier continue; 25295e516846SMarc Zyngier 25305e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 25315e516846SMarc Zyngier baser = its->tables[2].val; 25325e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 25335e516846SMarc Zyngier continue; 25345e516846SMarc Zyngier 25355e516846SMarc Zyngier return its; 25365e516846SMarc Zyngier } 25375e516846SMarc Zyngier 25385e516846SMarc Zyngier return NULL; 25395e516846SMarc Zyngier } 25405e516846SMarc Zyngier 25411ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 25421ac19ca6SMarc Zyngier { 25431ac19ca6SMarc Zyngier int i; 25441ac19ca6SMarc Zyngier 25451ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 25461a485f4dSShanker Donthineni if (its->tables[i].base) { 25471a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 25481a485f4dSShanker Donthineni its->tables[i].order); 25491a485f4dSShanker Donthineni its->tables[i].base = NULL; 25501ac19ca6SMarc Zyngier } 25511ac19ca6SMarc Zyngier } 25521ac19ca6SMarc Zyngier } 25531ac19ca6SMarc Zyngier 2554d5df9dc9SMarc Zyngier static int its_probe_baser_psz(struct its_node *its, struct its_baser *baser) 2555d5df9dc9SMarc Zyngier { 2556d5df9dc9SMarc Zyngier u64 psz = SZ_64K; 2557d5df9dc9SMarc Zyngier 2558d5df9dc9SMarc Zyngier while (psz) { 2559d5df9dc9SMarc Zyngier u64 val, gpsz; 2560d5df9dc9SMarc Zyngier 2561d5df9dc9SMarc Zyngier val = its_read_baser(its, baser); 2562d5df9dc9SMarc Zyngier val &= ~GITS_BASER_PAGE_SIZE_MASK; 2563d5df9dc9SMarc Zyngier 2564d5df9dc9SMarc Zyngier switch (psz) { 2565d5df9dc9SMarc Zyngier case SZ_64K: 2566d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_64K; 2567d5df9dc9SMarc Zyngier break; 2568d5df9dc9SMarc Zyngier case SZ_16K: 2569d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_16K; 2570d5df9dc9SMarc Zyngier break; 2571d5df9dc9SMarc Zyngier case SZ_4K: 2572d5df9dc9SMarc Zyngier default: 2573d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_4K; 2574d5df9dc9SMarc Zyngier break; 2575d5df9dc9SMarc Zyngier } 2576d5df9dc9SMarc Zyngier 2577d5df9dc9SMarc Zyngier gpsz >>= GITS_BASER_PAGE_SIZE_SHIFT; 2578d5df9dc9SMarc Zyngier 2579d5df9dc9SMarc Zyngier val |= FIELD_PREP(GITS_BASER_PAGE_SIZE_MASK, gpsz); 2580d5df9dc9SMarc Zyngier its_write_baser(its, baser, val); 2581d5df9dc9SMarc Zyngier 2582d5df9dc9SMarc Zyngier if (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser->val) == gpsz) 2583d5df9dc9SMarc Zyngier break; 2584d5df9dc9SMarc Zyngier 2585d5df9dc9SMarc Zyngier switch (psz) { 2586d5df9dc9SMarc Zyngier case SZ_64K: 2587d5df9dc9SMarc Zyngier psz = SZ_16K; 2588d5df9dc9SMarc Zyngier break; 2589d5df9dc9SMarc Zyngier case SZ_16K: 2590d5df9dc9SMarc Zyngier psz = SZ_4K; 2591d5df9dc9SMarc Zyngier break; 2592d5df9dc9SMarc Zyngier case SZ_4K: 2593d5df9dc9SMarc Zyngier default: 2594d5df9dc9SMarc Zyngier return -1; 2595d5df9dc9SMarc Zyngier } 2596d5df9dc9SMarc Zyngier } 2597d5df9dc9SMarc Zyngier 2598d5df9dc9SMarc Zyngier baser->psz = psz; 2599d5df9dc9SMarc Zyngier return 0; 2600d5df9dc9SMarc Zyngier } 2601d5df9dc9SMarc Zyngier 26020e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 26031ac19ca6SMarc Zyngier { 26041ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 26052fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 26069347359aSShanker Donthineni int err, i; 260794100970SRobert Richter 2608fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 2609fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 26109347359aSShanker Donthineni cache = GITS_BASER_nCnB; 2611466b7d16SShanker Donthineni 26121ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 26132d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 26142d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 26151ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 26163faf24eaSShanker Donthineni bool indirect = false; 2617d5df9dc9SMarc Zyngier u32 order; 26181ac19ca6SMarc Zyngier 2619d5df9dc9SMarc Zyngier if (type == GITS_BASER_TYPE_NONE) 26201ac19ca6SMarc Zyngier continue; 26211ac19ca6SMarc Zyngier 2622d5df9dc9SMarc Zyngier if (its_probe_baser_psz(its, baser)) { 2623d5df9dc9SMarc Zyngier its_free_tables(its); 2624d5df9dc9SMarc Zyngier return -ENXIO; 2625d5df9dc9SMarc Zyngier } 2626d5df9dc9SMarc Zyngier 2627d5df9dc9SMarc Zyngier order = get_order(baser->psz); 2628d5df9dc9SMarc Zyngier 2629d5df9dc9SMarc Zyngier switch (type) { 26304cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 2631d5df9dc9SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, &order, 2632576a8342SMarc Zyngier device_ids(its)); 26338d565748SZenghui Yu break; 26348d565748SZenghui Yu 26354cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 26365e516846SMarc Zyngier if (is_v4_1(its)) { 26375e516846SMarc Zyngier struct its_node *sibling; 26385e516846SMarc Zyngier 26395e516846SMarc Zyngier WARN_ON(i != 2); 26405e516846SMarc Zyngier if ((sibling = find_sibling_its(its))) { 26415e516846SMarc Zyngier *baser = sibling->tables[2]; 26425e516846SMarc Zyngier its_write_baser(its, baser, baser->val); 26435e516846SMarc Zyngier continue; 26445e516846SMarc Zyngier } 26455e516846SMarc Zyngier } 26465e516846SMarc Zyngier 2647d5df9dc9SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, &order, 264832bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 26494cacac57SMarc Zyngier break; 26504cacac57SMarc Zyngier } 2651f54b97edSMarc Zyngier 2652d5df9dc9SMarc Zyngier err = its_setup_baser(its, baser, cache, shr, order, indirect); 26539347359aSShanker Donthineni if (err < 0) { 26549347359aSShanker Donthineni its_free_tables(its); 26559347359aSShanker Donthineni return err; 265630f21363SRobert Richter } 265730f21363SRobert Richter 26589347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 26599347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 26609347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 26611ac19ca6SMarc Zyngier } 26621ac19ca6SMarc Zyngier 26631ac19ca6SMarc Zyngier return 0; 26641ac19ca6SMarc Zyngier } 26651ac19ca6SMarc Zyngier 26665e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_its(void) 26675e516846SMarc Zyngier { 26685e516846SMarc Zyngier struct its_node *its; 26695e516846SMarc Zyngier u64 val; 26705e516846SMarc Zyngier u32 aff; 26715e516846SMarc Zyngier 26725e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 26735e516846SMarc Zyngier aff = compute_common_aff(val); 26745e516846SMarc Zyngier 26755e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 26765e516846SMarc Zyngier u64 baser, addr; 26775e516846SMarc Zyngier 26785e516846SMarc Zyngier if (!is_v4_1(its)) 26795e516846SMarc Zyngier continue; 26805e516846SMarc Zyngier 26815e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 26825e516846SMarc Zyngier continue; 26835e516846SMarc Zyngier 26845e516846SMarc Zyngier if (aff != compute_its_aff(its)) 26855e516846SMarc Zyngier continue; 26865e516846SMarc Zyngier 26875e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 26885e516846SMarc Zyngier baser = its->tables[2].val; 26895e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 26905e516846SMarc Zyngier continue; 26915e516846SMarc Zyngier 26925e516846SMarc Zyngier /* We have a winner! */ 26938b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = its->tables[2].base; 26948b718d40SZenghui Yu 26955e516846SMarc Zyngier val = GICR_VPROPBASER_4_1_VALID; 26965e516846SMarc Zyngier if (baser & GITS_BASER_INDIRECT) 26975e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 26985e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, 26995e516846SMarc Zyngier FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)); 27005e516846SMarc Zyngier switch (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)) { 27015e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 27025e516846SMarc Zyngier addr = GITS_BASER_ADDR_48_to_52(baser); 27035e516846SMarc Zyngier break; 27045e516846SMarc Zyngier default: 27055e516846SMarc Zyngier addr = baser & GENMASK_ULL(47, 12); 27065e516846SMarc Zyngier break; 27075e516846SMarc Zyngier } 27085e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, addr >> 12); 27095e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_SHAREABILITY_MASK, 27105e516846SMarc Zyngier FIELD_GET(GITS_BASER_SHAREABILITY_MASK, baser)); 27115e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_INNER_CACHEABILITY_MASK, 27125e516846SMarc Zyngier FIELD_GET(GITS_BASER_INNER_CACHEABILITY_MASK, baser)); 27135e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, GITS_BASER_NR_PAGES(baser) - 1); 27145e516846SMarc Zyngier 27155e516846SMarc Zyngier return val; 27165e516846SMarc Zyngier } 27175e516846SMarc Zyngier 27185e516846SMarc Zyngier return 0; 27195e516846SMarc Zyngier } 27205e516846SMarc Zyngier 27215e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_rd(cpumask_t **mask) 27225e516846SMarc Zyngier { 27235e516846SMarc Zyngier u32 aff; 27245e516846SMarc Zyngier u64 val; 27255e516846SMarc Zyngier int cpu; 27265e516846SMarc Zyngier 27275e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 27285e516846SMarc Zyngier aff = compute_common_aff(val); 27295e516846SMarc Zyngier 27305e516846SMarc Zyngier for_each_possible_cpu(cpu) { 27315e516846SMarc Zyngier void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 27325e516846SMarc Zyngier 27335e516846SMarc Zyngier if (!base || cpu == smp_processor_id()) 27345e516846SMarc Zyngier continue; 27355e516846SMarc Zyngier 27365e516846SMarc Zyngier val = gic_read_typer(base + GICR_TYPER); 27374bccf1d7SZenghui Yu if (aff != compute_common_aff(val)) 27385e516846SMarc Zyngier continue; 27395e516846SMarc Zyngier 27405e516846SMarc Zyngier /* 27415e516846SMarc Zyngier * At this point, we have a victim. This particular CPU 27425e516846SMarc Zyngier * has already booted, and has an affinity that matches 27435e516846SMarc Zyngier * ours wrt CommonLPIAff. Let's use its own VPROPBASER. 27445e516846SMarc Zyngier * Make sure we don't write the Z bit in that case. 27455e516846SMarc Zyngier */ 27465186a6ccSZenghui Yu val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 27475e516846SMarc Zyngier val &= ~GICR_VPROPBASER_4_1_Z; 27485e516846SMarc Zyngier 27498b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = gic_data_rdist_cpu(cpu)->vpe_l1_base; 27505e516846SMarc Zyngier *mask = gic_data_rdist_cpu(cpu)->vpe_table_mask; 27515e516846SMarc Zyngier 27525e516846SMarc Zyngier return val; 27535e516846SMarc Zyngier } 27545e516846SMarc Zyngier 27555e516846SMarc Zyngier return 0; 27565e516846SMarc Zyngier } 27575e516846SMarc Zyngier 27584e6437f1SZenghui Yu static bool allocate_vpe_l2_table(int cpu, u32 id) 27594e6437f1SZenghui Yu { 27604e6437f1SZenghui Yu void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 2761490d332eSMarc Zyngier unsigned int psz, esz, idx, npg, gpsz; 2762490d332eSMarc Zyngier u64 val; 27634e6437f1SZenghui Yu struct page *page; 27644e6437f1SZenghui Yu __le64 *table; 27654e6437f1SZenghui Yu 27664e6437f1SZenghui Yu if (!gic_rdists->has_rvpeid) 27674e6437f1SZenghui Yu return true; 27684e6437f1SZenghui Yu 276928d160deSMarc Zyngier /* Skip non-present CPUs */ 277028d160deSMarc Zyngier if (!base) 277128d160deSMarc Zyngier return true; 277228d160deSMarc Zyngier 27735186a6ccSZenghui Yu val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 27744e6437f1SZenghui Yu 27754e6437f1SZenghui Yu esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val) + 1; 27764e6437f1SZenghui Yu gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 27774e6437f1SZenghui Yu npg = FIELD_GET(GICR_VPROPBASER_4_1_SIZE, val) + 1; 27784e6437f1SZenghui Yu 27794e6437f1SZenghui Yu switch (gpsz) { 27804e6437f1SZenghui Yu default: 27814e6437f1SZenghui Yu WARN_ON(1); 2782df561f66SGustavo A. R. Silva fallthrough; 27834e6437f1SZenghui Yu case GIC_PAGE_SIZE_4K: 27844e6437f1SZenghui Yu psz = SZ_4K; 27854e6437f1SZenghui Yu break; 27864e6437f1SZenghui Yu case GIC_PAGE_SIZE_16K: 27874e6437f1SZenghui Yu psz = SZ_16K; 27884e6437f1SZenghui Yu break; 27894e6437f1SZenghui Yu case GIC_PAGE_SIZE_64K: 27904e6437f1SZenghui Yu psz = SZ_64K; 27914e6437f1SZenghui Yu break; 27924e6437f1SZenghui Yu } 27934e6437f1SZenghui Yu 27944e6437f1SZenghui Yu /* Don't allow vpe_id that exceeds single, flat table limit */ 27954e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_4_1_INDIRECT)) 27964e6437f1SZenghui Yu return (id < (npg * psz / (esz * SZ_8))); 27974e6437f1SZenghui Yu 27984e6437f1SZenghui Yu /* Compute 1st level table index & check if that exceeds table limit */ 27994e6437f1SZenghui Yu idx = id >> ilog2(psz / (esz * SZ_8)); 28004e6437f1SZenghui Yu if (idx >= (npg * psz / GITS_LVL1_ENTRY_SIZE)) 28014e6437f1SZenghui Yu return false; 28024e6437f1SZenghui Yu 28034e6437f1SZenghui Yu table = gic_data_rdist_cpu(cpu)->vpe_l1_base; 28044e6437f1SZenghui Yu 28054e6437f1SZenghui Yu /* Allocate memory for 2nd level table */ 28064e6437f1SZenghui Yu if (!table[idx]) { 28074e6437f1SZenghui Yu page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(psz)); 28084e6437f1SZenghui Yu if (!page) 28094e6437f1SZenghui Yu return false; 28104e6437f1SZenghui Yu 28114e6437f1SZenghui Yu /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 28124e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_SHAREABILITY_MASK)) 28134e6437f1SZenghui Yu gic_flush_dcache_to_poc(page_address(page), psz); 28144e6437f1SZenghui Yu 28154e6437f1SZenghui Yu table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 28164e6437f1SZenghui Yu 28174e6437f1SZenghui Yu /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 28184e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_SHAREABILITY_MASK)) 28194e6437f1SZenghui Yu gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 28204e6437f1SZenghui Yu 28214e6437f1SZenghui Yu /* Ensure updated table contents are visible to RD hardware */ 28224e6437f1SZenghui Yu dsb(sy); 28234e6437f1SZenghui Yu } 28244e6437f1SZenghui Yu 28254e6437f1SZenghui Yu return true; 28264e6437f1SZenghui Yu } 28274e6437f1SZenghui Yu 28285e516846SMarc Zyngier static int allocate_vpe_l1_table(void) 28295e516846SMarc Zyngier { 28305e516846SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 28315e516846SMarc Zyngier u64 val, gpsz, npg, pa; 28325e516846SMarc Zyngier unsigned int psz = SZ_64K; 28335e516846SMarc Zyngier unsigned int np, epp, esz; 28345e516846SMarc Zyngier struct page *page; 28355e516846SMarc Zyngier 28365e516846SMarc Zyngier if (!gic_rdists->has_rvpeid) 28375e516846SMarc Zyngier return 0; 28385e516846SMarc Zyngier 28395e516846SMarc Zyngier /* 28405e516846SMarc Zyngier * if VPENDBASER.Valid is set, disable any previously programmed 28415e516846SMarc Zyngier * VPE by setting PendingLast while clearing Valid. This has the 28425e516846SMarc Zyngier * effect of making sure no doorbell will be generated and we can 28435e516846SMarc Zyngier * then safely clear VPROPBASER.Valid. 28445e516846SMarc Zyngier */ 28455186a6ccSZenghui Yu if (gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER) & GICR_VPENDBASER_Valid) 28465186a6ccSZenghui Yu gicr_write_vpendbaser(GICR_VPENDBASER_PendingLast, 28475e516846SMarc Zyngier vlpi_base + GICR_VPENDBASER); 28485e516846SMarc Zyngier 28495e516846SMarc Zyngier /* 28505e516846SMarc Zyngier * If we can inherit the configuration from another RD, let's do 28515e516846SMarc Zyngier * so. Otherwise, we have to go through the allocation process. We 28525e516846SMarc Zyngier * assume that all RDs have the exact same requirements, as 28535e516846SMarc Zyngier * nothing will work otherwise. 28545e516846SMarc Zyngier */ 28555e516846SMarc Zyngier val = inherit_vpe_l1_table_from_rd(&gic_data_rdist()->vpe_table_mask); 28565e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 28575e516846SMarc Zyngier goto out; 28585e516846SMarc Zyngier 2859d1bd7e0bSZenghui Yu gic_data_rdist()->vpe_table_mask = kzalloc(sizeof(cpumask_t), GFP_ATOMIC); 28605e516846SMarc Zyngier if (!gic_data_rdist()->vpe_table_mask) 28615e516846SMarc Zyngier return -ENOMEM; 28625e516846SMarc Zyngier 28635e516846SMarc Zyngier val = inherit_vpe_l1_table_from_its(); 28645e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 28655e516846SMarc Zyngier goto out; 28665e516846SMarc Zyngier 28675e516846SMarc Zyngier /* First probe the page size */ 28685e516846SMarc Zyngier val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K); 28695186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 28705186a6ccSZenghui Yu val = gicr_read_vpropbaser(vlpi_base + GICR_VPROPBASER); 28715e516846SMarc Zyngier gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 28725e516846SMarc Zyngier esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val); 28735e516846SMarc Zyngier 28745e516846SMarc Zyngier switch (gpsz) { 28755e516846SMarc Zyngier default: 28765e516846SMarc Zyngier gpsz = GIC_PAGE_SIZE_4K; 2877df561f66SGustavo A. R. Silva fallthrough; 28785e516846SMarc Zyngier case GIC_PAGE_SIZE_4K: 28795e516846SMarc Zyngier psz = SZ_4K; 28805e516846SMarc Zyngier break; 28815e516846SMarc Zyngier case GIC_PAGE_SIZE_16K: 28825e516846SMarc Zyngier psz = SZ_16K; 28835e516846SMarc Zyngier break; 28845e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 28855e516846SMarc Zyngier psz = SZ_64K; 28865e516846SMarc Zyngier break; 28875e516846SMarc Zyngier } 28885e516846SMarc Zyngier 28895e516846SMarc Zyngier /* 28905e516846SMarc Zyngier * Start populating the register from scratch, including RO fields 28915e516846SMarc Zyngier * (which we want to print in debug cases...) 28925e516846SMarc Zyngier */ 28935e516846SMarc Zyngier val = 0; 28945e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, gpsz); 28955e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ENTRY_SIZE, esz); 28965e516846SMarc Zyngier 28975e516846SMarc Zyngier /* How many entries per GIC page? */ 28985e516846SMarc Zyngier esz++; 28995e516846SMarc Zyngier epp = psz / (esz * SZ_8); 29005e516846SMarc Zyngier 29015e516846SMarc Zyngier /* 29025e516846SMarc Zyngier * If we need more than just a single L1 page, flag the table 29035e516846SMarc Zyngier * as indirect and compute the number of required L1 pages. 29045e516846SMarc Zyngier */ 29055e516846SMarc Zyngier if (epp < ITS_MAX_VPEID) { 29065e516846SMarc Zyngier int nl2; 29075e516846SMarc Zyngier 29085e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 29095e516846SMarc Zyngier 29105e516846SMarc Zyngier /* Number of L2 pages required to cover the VPEID space */ 29115e516846SMarc Zyngier nl2 = DIV_ROUND_UP(ITS_MAX_VPEID, epp); 29125e516846SMarc Zyngier 29135e516846SMarc Zyngier /* Number of L1 pages to point to the L2 pages */ 29145e516846SMarc Zyngier npg = DIV_ROUND_UP(nl2 * SZ_8, psz); 29155e516846SMarc Zyngier } else { 29165e516846SMarc Zyngier npg = 1; 29175e516846SMarc Zyngier } 29185e516846SMarc Zyngier 2919e88bd316SZenghui Yu val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1); 29205e516846SMarc Zyngier 29215e516846SMarc Zyngier /* Right, that's the number of CPU pages we need for L1 */ 29225e516846SMarc Zyngier np = DIV_ROUND_UP(npg * psz, PAGE_SIZE); 29235e516846SMarc Zyngier 29245e516846SMarc Zyngier pr_debug("np = %d, npg = %lld, psz = %d, epp = %d, esz = %d\n", 29255e516846SMarc Zyngier np, npg, psz, epp, esz); 2926d1bd7e0bSZenghui Yu page = alloc_pages(GFP_ATOMIC | __GFP_ZERO, get_order(np * PAGE_SIZE)); 29275e516846SMarc Zyngier if (!page) 29285e516846SMarc Zyngier return -ENOMEM; 29295e516846SMarc Zyngier 29308b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = page_address(page); 29315e516846SMarc Zyngier pa = virt_to_phys(page_address(page)); 29325e516846SMarc Zyngier WARN_ON(!IS_ALIGNED(pa, psz)); 29335e516846SMarc Zyngier 29345e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, pa >> 12); 29355e516846SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 29365e516846SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 29375e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_Z; 29385e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_VALID; 29395e516846SMarc Zyngier 29405e516846SMarc Zyngier out: 29415186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 29425e516846SMarc Zyngier cpumask_set_cpu(smp_processor_id(), gic_data_rdist()->vpe_table_mask); 29435e516846SMarc Zyngier 29445e516846SMarc Zyngier pr_debug("CPU%d: VPROPBASER = %llx %*pbl\n", 29455e516846SMarc Zyngier smp_processor_id(), val, 29465e516846SMarc Zyngier cpumask_pr_args(gic_data_rdist()->vpe_table_mask)); 29475e516846SMarc Zyngier 29485e516846SMarc Zyngier return 0; 29495e516846SMarc Zyngier } 29505e516846SMarc Zyngier 29511ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 29521ac19ca6SMarc Zyngier { 295383559b47SMarc Zyngier int i; 295483559b47SMarc Zyngier 29556396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 29561ac19ca6SMarc Zyngier GFP_KERNEL); 29571ac19ca6SMarc Zyngier if (!its->collections) 29581ac19ca6SMarc Zyngier return -ENOMEM; 29591ac19ca6SMarc Zyngier 296083559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 296183559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 296283559b47SMarc Zyngier 29631ac19ca6SMarc Zyngier return 0; 29641ac19ca6SMarc Zyngier } 29651ac19ca6SMarc Zyngier 29667c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 29677c297a2dSMarc Zyngier { 29687c297a2dSMarc Zyngier struct page *pend_page; 2969adaab500SMarc Zyngier 29707c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 2971adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 29727c297a2dSMarc Zyngier if (!pend_page) 29737c297a2dSMarc Zyngier return NULL; 29747c297a2dSMarc Zyngier 29757c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 29767c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 29777c297a2dSMarc Zyngier 29787c297a2dSMarc Zyngier return pend_page; 29797c297a2dSMarc Zyngier } 29807c297a2dSMarc Zyngier 29817d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 29827d75bbb4SMarc Zyngier { 2983adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 29847d75bbb4SMarc Zyngier } 29857d75bbb4SMarc Zyngier 2986c6e2ccb6SMarc Zyngier /* 29875e2c9f9aSMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. Any other 29885e2c9f9aSMarc Zyngier * case is wrong in the absence of firmware/EFI support. 2989c6e2ccb6SMarc Zyngier */ 2990c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 2991c440a9d9SMarc Zyngier { 29925e2c9f9aSMarc Zyngier phys_addr_t addr; 29935e2c9f9aSMarc Zyngier u64 val; 2994c6e2ccb6SMarc Zyngier 29955e2c9f9aSMarc Zyngier /* Check whether the property table is in a reserved region */ 29965e2c9f9aSMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 29975e2c9f9aSMarc Zyngier addr = val & GENMASK_ULL(51, 12); 29985e2c9f9aSMarc Zyngier 29995e2c9f9aSMarc Zyngier return gic_check_reserved_range(addr, LPI_PROPBASE_SZ); 3000c440a9d9SMarc Zyngier } 3001c440a9d9SMarc Zyngier 300211e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 300311e37d35SMarc Zyngier { 3004c440a9d9SMarc Zyngier u64 val; 300511e37d35SMarc Zyngier int err, cpu; 300611e37d35SMarc Zyngier 3007c440a9d9SMarc Zyngier /* 3008c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 3009c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 3010c440a9d9SMarc Zyngier */ 3011c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 3012c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 3013c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 3014c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 3015c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 3016c440a9d9SMarc Zyngier } 3017c440a9d9SMarc Zyngier 301811e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 301911e37d35SMarc Zyngier if (err) 302011e37d35SMarc Zyngier return err; 302111e37d35SMarc Zyngier 302211e37d35SMarc Zyngier /* 302311e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 302411e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 302511e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 302611e37d35SMarc Zyngier */ 302711e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 302811e37d35SMarc Zyngier struct page *pend_page; 302911e37d35SMarc Zyngier 303011e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 303111e37d35SMarc Zyngier if (!pend_page) { 303211e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 303311e37d35SMarc Zyngier return -ENOMEM; 303411e37d35SMarc Zyngier } 303511e37d35SMarc Zyngier 303611e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 303711e37d35SMarc Zyngier } 303811e37d35SMarc Zyngier 303911e37d35SMarc Zyngier return 0; 304011e37d35SMarc Zyngier } 304111e37d35SMarc Zyngier 3042af27e416SMarc Zyngier static u64 read_vpend_dirty_clear(void __iomem *vlpi_base) 30436479450fSHeyi Guo { 30446479450fSHeyi Guo u32 count = 1000000; /* 1s! */ 30456479450fSHeyi Guo bool clean; 30466479450fSHeyi Guo u64 val; 30476479450fSHeyi Guo 30486479450fSHeyi Guo do { 30495186a6ccSZenghui Yu val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 30506479450fSHeyi Guo clean = !(val & GICR_VPENDBASER_Dirty); 30516479450fSHeyi Guo if (!clean) { 30526479450fSHeyi Guo count--; 30536479450fSHeyi Guo cpu_relax(); 30546479450fSHeyi Guo udelay(1); 30556479450fSHeyi Guo } 30566479450fSHeyi Guo } while (!clean && count); 30576479450fSHeyi Guo 3058af27e416SMarc Zyngier if (unlikely(!clean)) 3059e64fab1aSMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 3060af27e416SMarc Zyngier 3061af27e416SMarc Zyngier return val; 3062e64fab1aSMarc Zyngier } 3063e64fab1aSMarc Zyngier 3064af27e416SMarc Zyngier static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set) 3065af27e416SMarc Zyngier { 3066af27e416SMarc Zyngier u64 val; 3067af27e416SMarc Zyngier 3068af27e416SMarc Zyngier /* Make sure we wait until the RD is done with the initial scan */ 3069af27e416SMarc Zyngier val = read_vpend_dirty_clear(vlpi_base); 3070af27e416SMarc Zyngier val &= ~GICR_VPENDBASER_Valid; 3071af27e416SMarc Zyngier val &= ~clr; 3072af27e416SMarc Zyngier val |= set; 3073af27e416SMarc Zyngier gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 3074af27e416SMarc Zyngier 3075af27e416SMarc Zyngier val = read_vpend_dirty_clear(vlpi_base); 3076af27e416SMarc Zyngier if (unlikely(val & GICR_VPENDBASER_Dirty)) 3077af27e416SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 3078af27e416SMarc Zyngier 30796479450fSHeyi Guo return val; 30806479450fSHeyi Guo } 30816479450fSHeyi Guo 30821ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 30831ac19ca6SMarc Zyngier { 30841ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 30851ac19ca6SMarc Zyngier struct page *pend_page; 308611e37d35SMarc Zyngier phys_addr_t paddr; 30871ac19ca6SMarc Zyngier u64 val, tmp; 30881ac19ca6SMarc Zyngier 3089c0cdc890SValentin Schneider if (gic_data_rdist()->flags & RD_LOCAL_LPI_ENABLED) 30901ac19ca6SMarc Zyngier return; 30911ac19ca6SMarc Zyngier 3092c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 3093c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 3094c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 3095f842ca8eSMarc Zyngier /* 3096f842ca8eSMarc Zyngier * Check that we get the same property table on all 3097f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 3098f842ca8eSMarc Zyngier */ 3099f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 3100f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 3101f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 3102f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 3103f842ca8eSMarc Zyngier 3104c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 3105c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 3106c440a9d9SMarc Zyngier 31075e2c9f9aSMarc Zyngier WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ)); 3108d23bc2bcSValentin Schneider gic_data_rdist()->flags |= RD_LOCAL_PENDTABLE_PREALLOCATED; 3109c440a9d9SMarc Zyngier 3110c440a9d9SMarc Zyngier goto out; 3111c440a9d9SMarc Zyngier } 3112c440a9d9SMarc Zyngier 311311e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 31141ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 31151ac19ca6SMarc Zyngier 31161ac19ca6SMarc Zyngier /* set PROPBASE */ 3117e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 31181ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 31192fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 31201ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 31211ac19ca6SMarc Zyngier 31220968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 31230968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 31241ac19ca6SMarc Zyngier 3125a8707f55SSebastian Reichel if (gic_rdists->flags & RDIST_FLAGS_FORCE_NON_SHAREABLE) 3126a8707f55SSebastian Reichel tmp &= ~GICR_PROPBASER_SHAREABILITY_MASK; 3127a8707f55SSebastian Reichel 31281ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 3129241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 3130241a386cSMarc Zyngier /* 3131241a386cSMarc Zyngier * The HW reports non-shareable, we must 3132241a386cSMarc Zyngier * remove the cacheability attributes as 3133241a386cSMarc Zyngier * well. 3134241a386cSMarc Zyngier */ 3135241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 3136241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 3137241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 31380968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 3139241a386cSMarc Zyngier } 31401ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 31411ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 31421ac19ca6SMarc Zyngier } 31431ac19ca6SMarc Zyngier 31441ac19ca6SMarc Zyngier /* set PENDBASE */ 31451ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 31464ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 31472fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 31481ac19ca6SMarc Zyngier 31490968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 31500968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 3151241a386cSMarc Zyngier 3152a8707f55SSebastian Reichel if (gic_rdists->flags & RDIST_FLAGS_FORCE_NON_SHAREABLE) 3153a8707f55SSebastian Reichel tmp &= ~GICR_PENDBASER_SHAREABILITY_MASK; 3154a8707f55SSebastian Reichel 3155241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 3156241a386cSMarc Zyngier /* 3157241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 3158241a386cSMarc Zyngier * cacheability attributes as well. 3159241a386cSMarc Zyngier */ 3160241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 3161241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 3162241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 31630968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 3164241a386cSMarc Zyngier } 31651ac19ca6SMarc Zyngier 31661ac19ca6SMarc Zyngier /* Enable LPIs */ 31671ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 31681ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 31691ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 31701ac19ca6SMarc Zyngier 31715e516846SMarc Zyngier if (gic_rdists->has_vlpis && !gic_rdists->has_rvpeid) { 31726479450fSHeyi Guo void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 31736479450fSHeyi Guo 31746479450fSHeyi Guo /* 31756479450fSHeyi Guo * It's possible for CPU to receive VLPIs before it is 3176a359f757SIngo Molnar * scheduled as a vPE, especially for the first CPU, and the 31776479450fSHeyi Guo * VLPI with INTID larger than 2^(IDbits+1) will be considered 31786479450fSHeyi Guo * as out of range and dropped by GIC. 31796479450fSHeyi Guo * So we initialize IDbits to known value to avoid VLPI drop. 31806479450fSHeyi Guo */ 31816479450fSHeyi Guo val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 31826479450fSHeyi Guo pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n", 31836479450fSHeyi Guo smp_processor_id(), val); 31845186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 31856479450fSHeyi Guo 31866479450fSHeyi Guo /* 31876479450fSHeyi Guo * Also clear Valid bit of GICR_VPENDBASER, in case some 31886479450fSHeyi Guo * ancient programming gets left in and has possibility of 31896479450fSHeyi Guo * corrupting memory. 31906479450fSHeyi Guo */ 3191e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 31926479450fSHeyi Guo } 31936479450fSHeyi Guo 31945e516846SMarc Zyngier if (allocate_vpe_l1_table()) { 31955e516846SMarc Zyngier /* 31965e516846SMarc Zyngier * If the allocation has failed, we're in massive trouble. 31975e516846SMarc Zyngier * Disable direct injection, and pray that no VM was 31985e516846SMarc Zyngier * already running... 31995e516846SMarc Zyngier */ 32005e516846SMarc Zyngier gic_rdists->has_rvpeid = false; 32015e516846SMarc Zyngier gic_rdists->has_vlpis = false; 32025e516846SMarc Zyngier } 32035e516846SMarc Zyngier 32041ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 32051ac19ca6SMarc Zyngier dsb(sy); 3206c440a9d9SMarc Zyngier out: 3207c0cdc890SValentin Schneider gic_data_rdist()->flags |= RD_LOCAL_LPI_ENABLED; 3208c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 320911e37d35SMarc Zyngier smp_processor_id(), 3210d23bc2bcSValentin Schneider gic_data_rdist()->flags & RD_LOCAL_PENDTABLE_PREALLOCATED ? 3211d23bc2bcSValentin Schneider "reserved" : "allocated", 321211e37d35SMarc Zyngier &paddr); 32131ac19ca6SMarc Zyngier } 32141ac19ca6SMarc Zyngier 3215920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 32161ac19ca6SMarc Zyngier { 3217920181ceSDerek Basehore int cpu = smp_processor_id(); 32181ac19ca6SMarc Zyngier u64 target; 32191ac19ca6SMarc Zyngier 3220fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 3221fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 3222fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 3223fbf8f40eSGanapatrao Kulkarni 3224fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 3225fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 3226fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 3227920181ceSDerek Basehore return; 3228fbf8f40eSGanapatrao Kulkarni } 3229fbf8f40eSGanapatrao Kulkarni 32301ac19ca6SMarc Zyngier /* 32311ac19ca6SMarc Zyngier * We now have to bind each collection to its target 32321ac19ca6SMarc Zyngier * redistributor. 32331ac19ca6SMarc Zyngier */ 3234589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 32351ac19ca6SMarc Zyngier /* 32361ac19ca6SMarc Zyngier * This ITS wants the physical address of the 32371ac19ca6SMarc Zyngier * redistributor. 32381ac19ca6SMarc Zyngier */ 32391ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 32401ac19ca6SMarc Zyngier } else { 3241920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 3242589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 3243263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 32441ac19ca6SMarc Zyngier } 32451ac19ca6SMarc Zyngier 32461ac19ca6SMarc Zyngier /* Perform collection mapping */ 32471ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 32481ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 32491ac19ca6SMarc Zyngier 32501ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 32511ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 32521ac19ca6SMarc Zyngier } 32531ac19ca6SMarc Zyngier 3254920181ceSDerek Basehore static void its_cpu_init_collections(void) 3255920181ceSDerek Basehore { 3256920181ceSDerek Basehore struct its_node *its; 3257920181ceSDerek Basehore 3258a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3259920181ceSDerek Basehore 3260920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 3261920181ceSDerek Basehore its_cpu_init_collection(its); 3262920181ceSDerek Basehore 3263a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 32641ac19ca6SMarc Zyngier } 326584a6a2e7SMarc Zyngier 326684a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 326784a6a2e7SMarc Zyngier { 326884a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 32693e39e8f5SMarc Zyngier unsigned long flags; 327084a6a2e7SMarc Zyngier 32713e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 327284a6a2e7SMarc Zyngier 327384a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 327484a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 327584a6a2e7SMarc Zyngier its_dev = tmp; 327684a6a2e7SMarc Zyngier break; 327784a6a2e7SMarc Zyngier } 327884a6a2e7SMarc Zyngier } 327984a6a2e7SMarc Zyngier 32803e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 328184a6a2e7SMarc Zyngier 328284a6a2e7SMarc Zyngier return its_dev; 328384a6a2e7SMarc Zyngier } 328484a6a2e7SMarc Zyngier 3285466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 3286466b7d16SShanker Donthineni { 3287466b7d16SShanker Donthineni int i; 3288466b7d16SShanker Donthineni 3289466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3290466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 3291466b7d16SShanker Donthineni return &its->tables[i]; 3292466b7d16SShanker Donthineni } 3293466b7d16SShanker Donthineni 3294466b7d16SShanker Donthineni return NULL; 3295466b7d16SShanker Donthineni } 3296466b7d16SShanker Donthineni 3297539d3782SShanker Donthineni static bool its_alloc_table_entry(struct its_node *its, 3298539d3782SShanker Donthineni struct its_baser *baser, u32 id) 32993faf24eaSShanker Donthineni { 33003faf24eaSShanker Donthineni struct page *page; 33013faf24eaSShanker Donthineni u32 esz, idx; 33023faf24eaSShanker Donthineni __le64 *table; 33033faf24eaSShanker Donthineni 33043faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 33053faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 33063faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 330770cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 33083faf24eaSShanker Donthineni 33093faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 331070cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 33113faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 33123faf24eaSShanker Donthineni return false; 33133faf24eaSShanker Donthineni 33143faf24eaSShanker Donthineni table = baser->base; 33153faf24eaSShanker Donthineni 33163faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 33173faf24eaSShanker Donthineni if (!table[idx]) { 3318539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 3319539d3782SShanker Donthineni get_order(baser->psz)); 33203faf24eaSShanker Donthineni if (!page) 33213faf24eaSShanker Donthineni return false; 33223faf24eaSShanker Donthineni 33233faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 33243faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 3325328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 33263faf24eaSShanker Donthineni 33273faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 33283faf24eaSShanker Donthineni 33293faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 33303faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 3331328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 33323faf24eaSShanker Donthineni 33333faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 33343faf24eaSShanker Donthineni dsb(sy); 33353faf24eaSShanker Donthineni } 33363faf24eaSShanker Donthineni 33373faf24eaSShanker Donthineni return true; 33383faf24eaSShanker Donthineni } 33393faf24eaSShanker Donthineni 334070cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 334170cc81edSMarc Zyngier { 334270cc81edSMarc Zyngier struct its_baser *baser; 334370cc81edSMarc Zyngier 334470cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 334570cc81edSMarc Zyngier 334670cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 334770cc81edSMarc Zyngier if (!baser) 3348576a8342SMarc Zyngier return (ilog2(dev_id) < device_ids(its)); 334970cc81edSMarc Zyngier 3350539d3782SShanker Donthineni return its_alloc_table_entry(its, baser, dev_id); 335170cc81edSMarc Zyngier } 335270cc81edSMarc Zyngier 33537d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 33547d75bbb4SMarc Zyngier { 33557d75bbb4SMarc Zyngier struct its_node *its; 33564e6437f1SZenghui Yu int cpu; 33577d75bbb4SMarc Zyngier 33587d75bbb4SMarc Zyngier /* 33597d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 33607d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 33617d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 33627d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 33637d75bbb4SMarc Zyngier * anyway, right?). 33647d75bbb4SMarc Zyngier */ 33657d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 33667d75bbb4SMarc Zyngier struct its_baser *baser; 33677d75bbb4SMarc Zyngier 33680dd57fedSMarc Zyngier if (!is_v4(its)) 33697d75bbb4SMarc Zyngier continue; 33707d75bbb4SMarc Zyngier 33717d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 33727d75bbb4SMarc Zyngier if (!baser) 33737d75bbb4SMarc Zyngier return false; 33747d75bbb4SMarc Zyngier 3375539d3782SShanker Donthineni if (!its_alloc_table_entry(its, baser, vpe_id)) 33767d75bbb4SMarc Zyngier return false; 33777d75bbb4SMarc Zyngier } 33787d75bbb4SMarc Zyngier 33794e6437f1SZenghui Yu /* Non v4.1? No need to iterate RDs and go back early. */ 33804e6437f1SZenghui Yu if (!gic_rdists->has_rvpeid) 33814e6437f1SZenghui Yu return true; 33824e6437f1SZenghui Yu 33834e6437f1SZenghui Yu /* 33844e6437f1SZenghui Yu * Make sure the L2 tables are allocated for all copies of 33854e6437f1SZenghui Yu * the L1 table on *all* v4.1 RDs. 33864e6437f1SZenghui Yu */ 33874e6437f1SZenghui Yu for_each_possible_cpu(cpu) { 33884e6437f1SZenghui Yu if (!allocate_vpe_l2_table(cpu, vpe_id)) 33894e6437f1SZenghui Yu return false; 33904e6437f1SZenghui Yu } 33914e6437f1SZenghui Yu 33927d75bbb4SMarc Zyngier return true; 33937d75bbb4SMarc Zyngier } 33947d75bbb4SMarc Zyngier 339584a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 339693f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 339784a6a2e7SMarc Zyngier { 339884a6a2e7SMarc Zyngier struct its_device *dev; 339993f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 34003e39e8f5SMarc Zyngier unsigned long flags; 3401591e5becSMarc Zyngier u16 *col_map = NULL; 340284a6a2e7SMarc Zyngier void *itt; 340384a6a2e7SMarc Zyngier int lpi_base; 340484a6a2e7SMarc Zyngier int nr_lpis; 3405c8481267SMarc Zyngier int nr_ites; 340684a6a2e7SMarc Zyngier int sz; 340784a6a2e7SMarc Zyngier 34083faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 3409466b7d16SShanker Donthineni return NULL; 3410466b7d16SShanker Donthineni 3411147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 3412147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 3413147c8f37SMarc Zyngier 341484a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 3415c8481267SMarc Zyngier /* 3416147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 3417147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 3418c8481267SMarc Zyngier */ 3419147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 3420ffedbf0cSMarc Zyngier sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); 342184a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 3422539d3782SShanker Donthineni itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); 342393f94ea0SMarc Zyngier if (alloc_lpis) { 342438dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 3425591e5becSMarc Zyngier if (lpi_map) 34266396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 342793f94ea0SMarc Zyngier GFP_KERNEL); 342893f94ea0SMarc Zyngier } else { 34296396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 343093f94ea0SMarc Zyngier nr_lpis = 0; 343193f94ea0SMarc Zyngier lpi_base = 0; 343293f94ea0SMarc Zyngier } 343384a6a2e7SMarc Zyngier 343493f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 343584a6a2e7SMarc Zyngier kfree(dev); 343684a6a2e7SMarc Zyngier kfree(itt); 3437ff5fe886SAndy Shevchenko bitmap_free(lpi_map); 3438591e5becSMarc Zyngier kfree(col_map); 343984a6a2e7SMarc Zyngier return NULL; 344084a6a2e7SMarc Zyngier } 344184a6a2e7SMarc Zyngier 3442328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 34435a9a8915SMarc Zyngier 344484a6a2e7SMarc Zyngier dev->its = its; 344584a6a2e7SMarc Zyngier dev->itt = itt; 3446c8481267SMarc Zyngier dev->nr_ites = nr_ites; 3447591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 3448591e5becSMarc Zyngier dev->event_map.col_map = col_map; 3449591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 3450591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 345111635fa2SMarc Zyngier raw_spin_lock_init(&dev->event_map.vlpi_lock); 345284a6a2e7SMarc Zyngier dev->device_id = dev_id; 345384a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 345484a6a2e7SMarc Zyngier 34553e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 345684a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 34573e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 345884a6a2e7SMarc Zyngier 345984a6a2e7SMarc Zyngier /* Map device to its ITT */ 346084a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 346184a6a2e7SMarc Zyngier 346284a6a2e7SMarc Zyngier return dev; 346384a6a2e7SMarc Zyngier } 346484a6a2e7SMarc Zyngier 346584a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 346684a6a2e7SMarc Zyngier { 34673e39e8f5SMarc Zyngier unsigned long flags; 34683e39e8f5SMarc Zyngier 34693e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 347084a6a2e7SMarc Zyngier list_del(&its_dev->entry); 34713e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 3472898aa5ceSMarc Zyngier kfree(its_dev->event_map.col_map); 347384a6a2e7SMarc Zyngier kfree(its_dev->itt); 347484a6a2e7SMarc Zyngier kfree(its_dev); 347584a6a2e7SMarc Zyngier } 3476b48ac83dSMarc Zyngier 34778208d170SMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) 3478b48ac83dSMarc Zyngier { 3479b48ac83dSMarc Zyngier int idx; 3480b48ac83dSMarc Zyngier 3481342be106SZenghui Yu /* Find a free LPI region in lpi_map and allocate them. */ 34828208d170SMarc Zyngier idx = bitmap_find_free_region(dev->event_map.lpi_map, 34838208d170SMarc Zyngier dev->event_map.nr_lpis, 34848208d170SMarc Zyngier get_count_order(nvecs)); 34858208d170SMarc Zyngier if (idx < 0) 3486b48ac83dSMarc Zyngier return -ENOSPC; 3487b48ac83dSMarc Zyngier 3488591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 3489b48ac83dSMarc Zyngier 3490b48ac83dSMarc Zyngier return 0; 3491b48ac83dSMarc Zyngier } 3492b48ac83dSMarc Zyngier 349354456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 3494b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 3495b48ac83dSMarc Zyngier { 3496b48ac83dSMarc Zyngier struct its_node *its; 3497b48ac83dSMarc Zyngier struct its_device *its_dev; 349854456db9SMarc Zyngier struct msi_domain_info *msi_info; 349954456db9SMarc Zyngier u32 dev_id; 35009791ec7dSMarc Zyngier int err = 0; 3501b48ac83dSMarc Zyngier 350254456db9SMarc Zyngier /* 3503a7c90f51SJulien Grall * We ignore "dev" entirely, and rely on the dev_id that has 350454456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 350554456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 350654456db9SMarc Zyngier * are built on top of the ITS. 350754456db9SMarc Zyngier */ 350854456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 350954456db9SMarc Zyngier 351054456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 351154456db9SMarc Zyngier its = msi_info->data; 351254456db9SMarc Zyngier 351320b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 351420b3d54eSMarc Zyngier vpe_proxy.dev && 351520b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 351620b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 351720b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 351820b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 351920b3d54eSMarc Zyngier dev_id); 352020b3d54eSMarc Zyngier return -EINVAL; 352120b3d54eSMarc Zyngier } 352220b3d54eSMarc Zyngier 35239791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 3524f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 3525e8137f4fSMarc Zyngier if (its_dev) { 3526e8137f4fSMarc Zyngier /* 3527e8137f4fSMarc Zyngier * We already have seen this ID, probably through 3528e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 3529e8137f4fSMarc Zyngier * create the device. 3530e8137f4fSMarc Zyngier */ 35319791ec7dSMarc Zyngier its_dev->shared = true; 3532f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 3533e8137f4fSMarc Zyngier goto out; 3534e8137f4fSMarc Zyngier } 3535b48ac83dSMarc Zyngier 353693f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 35379791ec7dSMarc Zyngier if (!its_dev) { 35389791ec7dSMarc Zyngier err = -ENOMEM; 35399791ec7dSMarc Zyngier goto out; 35409791ec7dSMarc Zyngier } 3541b48ac83dSMarc Zyngier 35425fe71d27SMarc Zyngier if (info->flags & MSI_ALLOC_FLAGS_PROXY_DEVICE) 35435fe71d27SMarc Zyngier its_dev->shared = true; 35445fe71d27SMarc Zyngier 3545f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 3546e8137f4fSMarc Zyngier out: 35479791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 3548b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 35499791ec7dSMarc Zyngier return err; 3550b48ac83dSMarc Zyngier } 3551b48ac83dSMarc Zyngier 355254456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 355354456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 355454456db9SMarc Zyngier }; 355554456db9SMarc Zyngier 3556b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 3557b48ac83dSMarc Zyngier unsigned int virq, 3558b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 3559b48ac83dSMarc Zyngier { 3560f833f57fSMarc Zyngier struct irq_fwspec fwspec; 3561b48ac83dSMarc Zyngier 3562f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 3563f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 3564f833f57fSMarc Zyngier fwspec.param_count = 3; 3565f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 3566f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 3567f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 35683f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 35693f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 35703f010cf1STomasz Nowicki fwspec.param_count = 2; 35713f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 35723f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 3573f833f57fSMarc Zyngier } else { 3574f833f57fSMarc Zyngier return -EINVAL; 3575f833f57fSMarc Zyngier } 3576b48ac83dSMarc Zyngier 3577f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 3578b48ac83dSMarc Zyngier } 3579b48ac83dSMarc Zyngier 3580b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 3581b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 3582b48ac83dSMarc Zyngier { 3583b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 3584b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 358535ae7df2SJulien Grall struct its_node *its = its_dev->its; 3586f0c7bacaSThomas Gleixner struct irq_data *irqd; 3587b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 3588b48ac83dSMarc Zyngier int err; 3589b48ac83dSMarc Zyngier int i; 3590b48ac83dSMarc Zyngier 35918208d170SMarc Zyngier err = its_alloc_device_irq(its_dev, nr_irqs, &hwirq); 3592b48ac83dSMarc Zyngier if (err) 3593b48ac83dSMarc Zyngier return err; 3594b48ac83dSMarc Zyngier 359535ae7df2SJulien Grall err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); 359635ae7df2SJulien Grall if (err) 359735ae7df2SJulien Grall return err; 359835ae7df2SJulien Grall 35998208d170SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 36008208d170SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); 3601b48ac83dSMarc Zyngier if (err) 3602b48ac83dSMarc Zyngier return err; 3603b48ac83dSMarc Zyngier 3604b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 36058208d170SMarc Zyngier hwirq + i, &its_irq_chip, its_dev); 3606f0c7bacaSThomas Gleixner irqd = irq_get_irq_data(virq + i); 3607f0c7bacaSThomas Gleixner irqd_set_single_target(irqd); 3608f0c7bacaSThomas Gleixner irqd_set_affinity_on_activate(irqd); 36098f4b5895SJames Gowans irqd_set_resend_when_in_progress(irqd); 3610f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 36118208d170SMarc Zyngier (int)(hwirq + i - its_dev->event_map.lpi_base), 36128208d170SMarc Zyngier (int)(hwirq + i), virq + i); 3613b48ac83dSMarc Zyngier } 3614b48ac83dSMarc Zyngier 3615b48ac83dSMarc Zyngier return 0; 3616b48ac83dSMarc Zyngier } 3617b48ac83dSMarc Zyngier 361872491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 3619702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3620aca268dfSMarc Zyngier { 3621aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3622aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 36230d224d35SMarc Zyngier int cpu; 3624fbf8f40eSGanapatrao Kulkarni 3625c5d6082dSMarc Zyngier cpu = its_select_cpu(d, cpu_online_mask); 3626c5d6082dSMarc Zyngier if (cpu < 0 || cpu >= nr_cpu_ids) 3627c1797b11SYang Yingliang return -EINVAL; 3628c1797b11SYang Yingliang 36292f13ff1dSMarc Zyngier its_inc_lpi_count(d, cpu); 36300d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 36310d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3632591e5becSMarc Zyngier 3633aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 36346a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 363572491643SThomas Gleixner return 0; 3636aca268dfSMarc Zyngier } 3637aca268dfSMarc Zyngier 3638aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 3639aca268dfSMarc Zyngier struct irq_data *d) 3640aca268dfSMarc Zyngier { 3641aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3642aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 3643aca268dfSMarc Zyngier 36442f13ff1dSMarc Zyngier its_dec_lpi_count(d, its_dev->event_map.col_map[event]); 3645aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 3646aca268dfSMarc Zyngier its_send_discard(its_dev, event); 3647aca268dfSMarc Zyngier } 3648aca268dfSMarc Zyngier 3649b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 3650b48ac83dSMarc Zyngier unsigned int nr_irqs) 3651b48ac83dSMarc Zyngier { 3652b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 3653b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 36549791ec7dSMarc Zyngier struct its_node *its = its_dev->its; 3655b48ac83dSMarc Zyngier int i; 3656b48ac83dSMarc Zyngier 3657c9c96e30SMarc Zyngier bitmap_release_region(its_dev->event_map.lpi_map, 3658c9c96e30SMarc Zyngier its_get_event_id(irq_domain_get_irq_data(domain, virq)), 3659c9c96e30SMarc Zyngier get_count_order(nr_irqs)); 3660c9c96e30SMarc Zyngier 3661b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 3662b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 3663b48ac83dSMarc Zyngier virq + i); 3664b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 36652da39949SMarc Zyngier irq_domain_reset_irq_data(data); 3666b48ac83dSMarc Zyngier } 3667b48ac83dSMarc Zyngier 36689791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 36699791ec7dSMarc Zyngier 36709791ec7dSMarc Zyngier /* 36719791ec7dSMarc Zyngier * If all interrupts have been freed, start mopping the 3672a359f757SIngo Molnar * floor. This is conditioned on the device not being shared. 36739791ec7dSMarc Zyngier */ 36749791ec7dSMarc Zyngier if (!its_dev->shared && 36759791ec7dSMarc Zyngier bitmap_empty(its_dev->event_map.lpi_map, 3676591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 367738dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 3678cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 3679cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 3680b48ac83dSMarc Zyngier 3681b48ac83dSMarc Zyngier /* Unmap device/itt */ 3682b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 3683b48ac83dSMarc Zyngier its_free_device(its_dev); 3684b48ac83dSMarc Zyngier } 3685b48ac83dSMarc Zyngier 36869791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 36879791ec7dSMarc Zyngier 3688b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 3689b48ac83dSMarc Zyngier } 3690b48ac83dSMarc Zyngier 3691b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 3692b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 3693b48ac83dSMarc Zyngier .free = its_irq_domain_free, 3694aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 3695aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 3696b48ac83dSMarc Zyngier }; 36974c21f3c2SMarc Zyngier 369820b3d54eSMarc Zyngier /* 369920b3d54eSMarc Zyngier * This is insane. 370020b3d54eSMarc Zyngier * 37010684c704SMarc Zyngier * If a GICv4.0 doesn't implement Direct LPIs (which is extremely 370220b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 370320b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 370420b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 370520b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 370620b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 370720b3d54eSMarc Zyngier * 370820b3d54eSMarc Zyngier * Broken by design(tm). 37090684c704SMarc Zyngier * 37100684c704SMarc Zyngier * GICv4.1, on the other hand, mandates that we're able to invalidate 37110684c704SMarc Zyngier * by writing to a MMIO register. It doesn't implement the whole of 37120684c704SMarc Zyngier * DirectLPI, but that's good enough. And most of the time, we don't 37130684c704SMarc Zyngier * even have to invalidate anything, as the redistributor can be told 37140684c704SMarc Zyngier * whether to generate a doorbell or not (we thus leave it enabled, 37150684c704SMarc Zyngier * always). 371620b3d54eSMarc Zyngier */ 371720b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 371820b3d54eSMarc Zyngier { 37190684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37200684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37210684c704SMarc Zyngier return; 37220684c704SMarc Zyngier 372320b3d54eSMarc Zyngier /* Already unmapped? */ 372420b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 372520b3d54eSMarc Zyngier return; 372620b3d54eSMarc Zyngier 372720b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 372820b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 372920b3d54eSMarc Zyngier 373020b3d54eSMarc Zyngier /* 373120b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 373220b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 373320b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 373420b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 373520b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 373620b3d54eSMarc Zyngier */ 373720b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 373820b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 373920b3d54eSMarc Zyngier 374020b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 374120b3d54eSMarc Zyngier } 374220b3d54eSMarc Zyngier 374320b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 374420b3d54eSMarc Zyngier { 37450684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37460684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37470684c704SMarc Zyngier return; 37480684c704SMarc Zyngier 374920b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 375020b3d54eSMarc Zyngier unsigned long flags; 375120b3d54eSMarc Zyngier 375220b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 375320b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 375420b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 375520b3d54eSMarc Zyngier } 375620b3d54eSMarc Zyngier } 375720b3d54eSMarc Zyngier 375820b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 375920b3d54eSMarc Zyngier { 37600684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37610684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37620684c704SMarc Zyngier return; 37630684c704SMarc Zyngier 376420b3d54eSMarc Zyngier /* Already mapped? */ 376520b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 376620b3d54eSMarc Zyngier return; 376720b3d54eSMarc Zyngier 376820b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 376920b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 377020b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 377120b3d54eSMarc Zyngier 377220b3d54eSMarc Zyngier /* Map the new VPE instead */ 377320b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 377420b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 377520b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 377620b3d54eSMarc Zyngier 377720b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 377820b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 377920b3d54eSMarc Zyngier } 378020b3d54eSMarc Zyngier 3781958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 3782958b90d1SMarc Zyngier { 3783958b90d1SMarc Zyngier unsigned long flags; 3784958b90d1SMarc Zyngier struct its_collection *target_col; 3785958b90d1SMarc Zyngier 37860684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37870684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37880684c704SMarc Zyngier return; 37890684c704SMarc Zyngier 3790958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3791958b90d1SMarc Zyngier void __iomem *rdbase; 3792958b90d1SMarc Zyngier 3793958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 3794958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 37952f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3796958b90d1SMarc Zyngier 3797958b90d1SMarc Zyngier return; 3798958b90d1SMarc Zyngier } 3799958b90d1SMarc Zyngier 3800958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 3801958b90d1SMarc Zyngier 3802958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 3803958b90d1SMarc Zyngier 3804958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 3805958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 3806958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 3807958b90d1SMarc Zyngier 3808958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 3809958b90d1SMarc Zyngier } 3810958b90d1SMarc Zyngier 38113171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 38123171a47aSMarc Zyngier const struct cpumask *mask_val, 38133171a47aSMarc Zyngier bool force) 38143171a47aSMarc Zyngier { 38153171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3816dd3f050aSMarc Zyngier int from, cpu = cpumask_first(mask_val); 3817f3a05921SMarc Zyngier unsigned long flags; 38183171a47aSMarc Zyngier 38193171a47aSMarc Zyngier /* 38203171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 382120b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 3822958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 3823958b90d1SMarc Zyngier * interrupt to its new location. 3824f3a05921SMarc Zyngier * 3825f3a05921SMarc Zyngier * Another thing is that changing the affinity of a vPE affects 3826f3a05921SMarc Zyngier * *other interrupts* such as all the vLPIs that are routed to 3827f3a05921SMarc Zyngier * this vPE. This means that the irq_desc lock is not enough to 3828f3a05921SMarc Zyngier * protect us, and that we must ensure nobody samples vpe->col_idx 3829f3a05921SMarc Zyngier * during the update, hence the lock below which must also be 3830f3a05921SMarc Zyngier * taken on any vLPI handling path that evaluates vpe->col_idx. 38313171a47aSMarc Zyngier */ 3832f3a05921SMarc Zyngier from = vpe_to_cpuid_lock(vpe, &flags); 3833f3a05921SMarc Zyngier if (from == cpu) 3834dd3f050aSMarc Zyngier goto out; 3835958b90d1SMarc Zyngier 38363171a47aSMarc Zyngier vpe->col_idx = cpu; 3837dd3f050aSMarc Zyngier 3838dd3f050aSMarc Zyngier /* 3839dd3f050aSMarc Zyngier * GICv4.1 allows us to skip VMOVP if moving to a cpu whose RD 3840dd3f050aSMarc Zyngier * is sharing its VPE table with the current one. 3841dd3f050aSMarc Zyngier */ 3842dd3f050aSMarc Zyngier if (gic_data_rdist_cpu(cpu)->vpe_table_mask && 3843dd3f050aSMarc Zyngier cpumask_test_cpu(from, gic_data_rdist_cpu(cpu)->vpe_table_mask)) 3844dd3f050aSMarc Zyngier goto out; 3845dd3f050aSMarc Zyngier 38463171a47aSMarc Zyngier its_send_vmovp(vpe); 3847958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 38483171a47aSMarc Zyngier 3849dd3f050aSMarc Zyngier out: 385044c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3851f3a05921SMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 385244c4c25eSMarc Zyngier 38533171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 38543171a47aSMarc Zyngier } 38553171a47aSMarc Zyngier 385696806229SMarc Zyngier static void its_wait_vpt_parse_complete(void) 385796806229SMarc Zyngier { 385896806229SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 385996806229SMarc Zyngier u64 val; 386096806229SMarc Zyngier 386196806229SMarc Zyngier if (!gic_rdists->has_vpend_valid_dirty) 386296806229SMarc Zyngier return; 386396806229SMarc Zyngier 386431dbb6b1SZenghui Yu WARN_ON_ONCE(readq_relaxed_poll_timeout_atomic(vlpi_base + GICR_VPENDBASER, 386596806229SMarc Zyngier val, 386696806229SMarc Zyngier !(val & GICR_VPENDBASER_Dirty), 38670b394982SShenming Lu 1, 500)); 386896806229SMarc Zyngier } 386996806229SMarc Zyngier 3870e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 3871e643d803SMarc Zyngier { 387250c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3873e643d803SMarc Zyngier u64 val; 3874e643d803SMarc Zyngier 3875e643d803SMarc Zyngier /* Schedule the VPE */ 3876e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 3877e643d803SMarc Zyngier GENMASK_ULL(51, 12); 3878e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 3879e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 3880e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 38815186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 3882e643d803SMarc Zyngier 3883e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 3884e643d803SMarc Zyngier GENMASK_ULL(51, 16); 3885e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 3886b2cb11f4SHeyi Guo val |= GICR_VPENDBASER_InnerShareable; 3887e643d803SMarc Zyngier /* 3888e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 3889e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 3890e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 3891e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 3892e643d803SMarc Zyngier * that the pending table is empty. A good implementation 3893e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 3894e643d803SMarc Zyngier * making this a tolerable issue. 3895e643d803SMarc Zyngier */ 3896e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 3897e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 3898e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 38995186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 3900e643d803SMarc Zyngier } 3901e643d803SMarc Zyngier 3902e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 3903e643d803SMarc Zyngier { 390450c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3905e643d803SMarc Zyngier u64 val; 3906e643d803SMarc Zyngier 3907e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 3908e643d803SMarc Zyngier 3909e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 3910e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 3911e643d803SMarc Zyngier } 3912e643d803SMarc Zyngier 391340619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 391440619a2eSMarc Zyngier { 391540619a2eSMarc Zyngier struct its_node *its; 391640619a2eSMarc Zyngier 391740619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 39180dd57fedSMarc Zyngier if (!is_v4(its)) 391940619a2eSMarc Zyngier continue; 392040619a2eSMarc Zyngier 39212247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 39222247e1bfSMarc Zyngier continue; 39232247e1bfSMarc Zyngier 39243c1cceebSMarc Zyngier /* 39253c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 39263c1cceebSMarc Zyngier * we need is to reach the redistributors. 39273c1cceebSMarc Zyngier */ 392840619a2eSMarc Zyngier its_send_vinvall(its, vpe); 39293c1cceebSMarc Zyngier return; 393040619a2eSMarc Zyngier } 393140619a2eSMarc Zyngier } 393240619a2eSMarc Zyngier 3933e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 3934e643d803SMarc Zyngier { 3935e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3936e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 3937e643d803SMarc Zyngier 3938e643d803SMarc Zyngier switch (info->cmd_type) { 3939e643d803SMarc Zyngier case SCHEDULE_VPE: 3940e643d803SMarc Zyngier its_vpe_schedule(vpe); 3941e643d803SMarc Zyngier return 0; 3942e643d803SMarc Zyngier 3943e643d803SMarc Zyngier case DESCHEDULE_VPE: 3944e643d803SMarc Zyngier its_vpe_deschedule(vpe); 3945e643d803SMarc Zyngier return 0; 3946e643d803SMarc Zyngier 394757e3cebdSShenming Lu case COMMIT_VPE: 394857e3cebdSShenming Lu its_wait_vpt_parse_complete(); 394957e3cebdSShenming Lu return 0; 395057e3cebdSShenming Lu 39515e2f7642SMarc Zyngier case INVALL_VPE: 395240619a2eSMarc Zyngier its_vpe_invall(vpe); 39535e2f7642SMarc Zyngier return 0; 39545e2f7642SMarc Zyngier 3955e643d803SMarc Zyngier default: 3956e643d803SMarc Zyngier return -EINVAL; 3957e643d803SMarc Zyngier } 3958e643d803SMarc Zyngier } 3959e643d803SMarc Zyngier 396020b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 396120b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 396220b3d54eSMarc Zyngier { 396320b3d54eSMarc Zyngier unsigned long flags; 396420b3d54eSMarc Zyngier 396520b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 396620b3d54eSMarc Zyngier 396720b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 396820b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 396920b3d54eSMarc Zyngier 397020b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 397120b3d54eSMarc Zyngier } 397220b3d54eSMarc Zyngier 3973f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 3974f6a91da7SMarc Zyngier { 3975f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 397620b3d54eSMarc Zyngier 3977926846a7SMarc Zyngier if (gic_rdists->has_direct_lpi) 3978926846a7SMarc Zyngier __direct_lpi_inv(d, d->parent_data->hwirq); 3979926846a7SMarc Zyngier else 398020b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 398120b3d54eSMarc Zyngier } 3982f6a91da7SMarc Zyngier 3983f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 3984f6a91da7SMarc Zyngier { 3985f6a91da7SMarc Zyngier /* 3986f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 3987f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 3988f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 3989f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 3990f6a91da7SMarc Zyngier */ 3991f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 3992f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3993f6a91da7SMarc Zyngier } 3994f6a91da7SMarc Zyngier 3995f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 3996f6a91da7SMarc Zyngier { 3997f6a91da7SMarc Zyngier /* Same hack as above... */ 3998f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 3999f6a91da7SMarc Zyngier its_vpe_send_inv(d); 4000f6a91da7SMarc Zyngier } 4001f6a91da7SMarc Zyngier 4002e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 4003e57a3e28SMarc Zyngier enum irqchip_irq_state which, 4004e57a3e28SMarc Zyngier bool state) 4005e57a3e28SMarc Zyngier { 4006e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4007e57a3e28SMarc Zyngier 4008e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 4009e57a3e28SMarc Zyngier return -EINVAL; 4010e57a3e28SMarc Zyngier 4011e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 4012e57a3e28SMarc Zyngier void __iomem *rdbase; 4013e57a3e28SMarc Zyngier 4014e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 4015e57a3e28SMarc Zyngier if (state) { 4016e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 4017e57a3e28SMarc Zyngier } else { 4018e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 40192f4f064bSMarc Zyngier wait_for_syncr(rdbase); 4020e57a3e28SMarc Zyngier } 4021e57a3e28SMarc Zyngier } else { 4022e57a3e28SMarc Zyngier if (state) 4023e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 4024e57a3e28SMarc Zyngier else 4025e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 4026e57a3e28SMarc Zyngier } 4027e57a3e28SMarc Zyngier 4028e57a3e28SMarc Zyngier return 0; 4029e57a3e28SMarc Zyngier } 4030e57a3e28SMarc Zyngier 40317809f701SMarc Zyngier static int its_vpe_retrigger(struct irq_data *d) 40327809f701SMarc Zyngier { 40337809f701SMarc Zyngier return !its_vpe_set_irqchip_state(d, IRQCHIP_STATE_PENDING, true); 40347809f701SMarc Zyngier } 40357809f701SMarc Zyngier 40368fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 40378fff27aeSMarc Zyngier .name = "GICv4-vpe", 4038f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 4039f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 4040f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 40413171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 40427809f701SMarc Zyngier .irq_retrigger = its_vpe_retrigger, 4043e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 4044e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 40458fff27aeSMarc Zyngier }; 40468fff27aeSMarc Zyngier 4047d97c97baSMarc Zyngier static struct its_node *find_4_1_its(void) 4048d97c97baSMarc Zyngier { 4049d97c97baSMarc Zyngier static struct its_node *its = NULL; 4050d97c97baSMarc Zyngier 4051d97c97baSMarc Zyngier if (!its) { 4052d97c97baSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 4053d97c97baSMarc Zyngier if (is_v4_1(its)) 4054d97c97baSMarc Zyngier return its; 4055d97c97baSMarc Zyngier } 4056d97c97baSMarc Zyngier 4057d97c97baSMarc Zyngier /* Oops? */ 4058d97c97baSMarc Zyngier its = NULL; 4059d97c97baSMarc Zyngier } 4060d97c97baSMarc Zyngier 4061d97c97baSMarc Zyngier return its; 4062d97c97baSMarc Zyngier } 4063d97c97baSMarc Zyngier 4064d97c97baSMarc Zyngier static void its_vpe_4_1_send_inv(struct irq_data *d) 4065d97c97baSMarc Zyngier { 4066d97c97baSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4067d97c97baSMarc Zyngier struct its_node *its; 4068d97c97baSMarc Zyngier 4069d97c97baSMarc Zyngier /* 4070d97c97baSMarc Zyngier * GICv4.1 wants doorbells to be invalidated using the 4071d97c97baSMarc Zyngier * INVDB command in order to be broadcast to all RDs. Send 4072d97c97baSMarc Zyngier * it to the first valid ITS, and let the HW do its magic. 4073d97c97baSMarc Zyngier */ 4074d97c97baSMarc Zyngier its = find_4_1_its(); 4075d97c97baSMarc Zyngier if (its) 4076d97c97baSMarc Zyngier its_send_invdb(its, vpe); 4077d97c97baSMarc Zyngier } 4078d97c97baSMarc Zyngier 4079d97c97baSMarc Zyngier static void its_vpe_4_1_mask_irq(struct irq_data *d) 4080d97c97baSMarc Zyngier { 4081d97c97baSMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 4082d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 4083d97c97baSMarc Zyngier } 4084d97c97baSMarc Zyngier 4085d97c97baSMarc Zyngier static void its_vpe_4_1_unmask_irq(struct irq_data *d) 4086d97c97baSMarc Zyngier { 4087d97c97baSMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 4088d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 4089d97c97baSMarc Zyngier } 4090d97c97baSMarc Zyngier 409191bf6395SMarc Zyngier static void its_vpe_4_1_schedule(struct its_vpe *vpe, 409291bf6395SMarc Zyngier struct its_cmd_info *info) 409391bf6395SMarc Zyngier { 409491bf6395SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 409591bf6395SMarc Zyngier u64 val = 0; 409691bf6395SMarc Zyngier 409791bf6395SMarc Zyngier /* Schedule the VPE */ 409891bf6395SMarc Zyngier val |= GICR_VPENDBASER_Valid; 409991bf6395SMarc Zyngier val |= info->g0en ? GICR_VPENDBASER_4_1_VGRP0EN : 0; 410091bf6395SMarc Zyngier val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0; 410191bf6395SMarc Zyngier val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id); 410291bf6395SMarc Zyngier 41035186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 410491bf6395SMarc Zyngier } 410591bf6395SMarc Zyngier 4106e64fab1aSMarc Zyngier static void its_vpe_4_1_deschedule(struct its_vpe *vpe, 4107e64fab1aSMarc Zyngier struct its_cmd_info *info) 4108e64fab1aSMarc Zyngier { 4109e64fab1aSMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 4110e64fab1aSMarc Zyngier u64 val; 4111e64fab1aSMarc Zyngier 4112e64fab1aSMarc Zyngier if (info->req_db) { 4113a3f574cdSMarc Zyngier unsigned long flags; 4114a3f574cdSMarc Zyngier 4115e64fab1aSMarc Zyngier /* 4116e64fab1aSMarc Zyngier * vPE is going to block: make the vPE non-resident with 4117e64fab1aSMarc Zyngier * PendingLast clear and DB set. The GIC guarantees that if 4118e64fab1aSMarc Zyngier * we read-back PendingLast clear, then a doorbell will be 4119e64fab1aSMarc Zyngier * delivered when an interrupt comes. 4120a3f574cdSMarc Zyngier * 4121a3f574cdSMarc Zyngier * Note the locking to deal with the concurrent update of 4122a3f574cdSMarc Zyngier * pending_last from the doorbell interrupt handler that can 4123a3f574cdSMarc Zyngier * run concurrently. 4124e64fab1aSMarc Zyngier */ 4125a3f574cdSMarc Zyngier raw_spin_lock_irqsave(&vpe->vpe_lock, flags); 4126e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 4127e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast, 4128e64fab1aSMarc Zyngier GICR_VPENDBASER_4_1_DB); 4129e64fab1aSMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 4130a3f574cdSMarc Zyngier raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); 4131e64fab1aSMarc Zyngier } else { 4132e64fab1aSMarc Zyngier /* 4133e64fab1aSMarc Zyngier * We're not blocking, so just make the vPE non-resident 4134e64fab1aSMarc Zyngier * with PendingLast set, indicating that we'll be back. 4135e64fab1aSMarc Zyngier */ 4136e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 4137e64fab1aSMarc Zyngier 0, 4138e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast); 4139e64fab1aSMarc Zyngier vpe->pending_last = true; 4140e64fab1aSMarc Zyngier } 4141e64fab1aSMarc Zyngier } 4142e64fab1aSMarc Zyngier 4143b4a4bd0fSMarc Zyngier static void its_vpe_4_1_invall(struct its_vpe *vpe) 4144b4a4bd0fSMarc Zyngier { 4145b4a4bd0fSMarc Zyngier void __iomem *rdbase; 41463af9571cSZenghui Yu unsigned long flags; 4147b4a4bd0fSMarc Zyngier u64 val; 41483af9571cSZenghui Yu int cpu; 4149b4a4bd0fSMarc Zyngier 4150b4a4bd0fSMarc Zyngier val = GICR_INVALLR_V; 4151b4a4bd0fSMarc Zyngier val |= FIELD_PREP(GICR_INVALLR_VPEID, vpe->vpe_id); 4152b4a4bd0fSMarc Zyngier 4153b4a4bd0fSMarc Zyngier /* Target the redistributor this vPE is currently known on */ 41543af9571cSZenghui Yu cpu = vpe_to_cpuid_lock(vpe, &flags); 41553af9571cSZenghui Yu raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 41563af9571cSZenghui Yu rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; 4157b4a4bd0fSMarc Zyngier gic_write_lpir(val, rdbase + GICR_INVALLR); 4158b978c25fSZenghui Yu 4159b978c25fSZenghui Yu wait_for_syncr(rdbase); 41603af9571cSZenghui Yu raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 41613af9571cSZenghui Yu vpe_to_cpuid_unlock(vpe, flags); 4162b4a4bd0fSMarc Zyngier } 4163b4a4bd0fSMarc Zyngier 416429c647f3SMarc Zyngier static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 416529c647f3SMarc Zyngier { 416691bf6395SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 416729c647f3SMarc Zyngier struct its_cmd_info *info = vcpu_info; 416829c647f3SMarc Zyngier 416929c647f3SMarc Zyngier switch (info->cmd_type) { 417029c647f3SMarc Zyngier case SCHEDULE_VPE: 417191bf6395SMarc Zyngier its_vpe_4_1_schedule(vpe, info); 417229c647f3SMarc Zyngier return 0; 417329c647f3SMarc Zyngier 417429c647f3SMarc Zyngier case DESCHEDULE_VPE: 4175e64fab1aSMarc Zyngier its_vpe_4_1_deschedule(vpe, info); 417629c647f3SMarc Zyngier return 0; 417729c647f3SMarc Zyngier 417857e3cebdSShenming Lu case COMMIT_VPE: 417957e3cebdSShenming Lu its_wait_vpt_parse_complete(); 418057e3cebdSShenming Lu return 0; 418157e3cebdSShenming Lu 418229c647f3SMarc Zyngier case INVALL_VPE: 4183b4a4bd0fSMarc Zyngier its_vpe_4_1_invall(vpe); 418429c647f3SMarc Zyngier return 0; 418529c647f3SMarc Zyngier 418629c647f3SMarc Zyngier default: 418729c647f3SMarc Zyngier return -EINVAL; 418829c647f3SMarc Zyngier } 418929c647f3SMarc Zyngier } 419029c647f3SMarc Zyngier 419129c647f3SMarc Zyngier static struct irq_chip its_vpe_4_1_irq_chip = { 419229c647f3SMarc Zyngier .name = "GICv4.1-vpe", 4193d97c97baSMarc Zyngier .irq_mask = its_vpe_4_1_mask_irq, 4194d97c97baSMarc Zyngier .irq_unmask = its_vpe_4_1_unmask_irq, 419529c647f3SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 419629c647f3SMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 419729c647f3SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_4_1_set_vcpu_affinity, 419829c647f3SMarc Zyngier }; 419929c647f3SMarc Zyngier 4200e252cf8aSMarc Zyngier static void its_configure_sgi(struct irq_data *d, bool clear) 4201e252cf8aSMarc Zyngier { 4202e252cf8aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4203e252cf8aSMarc Zyngier struct its_cmd_desc desc; 4204e252cf8aSMarc Zyngier 4205e252cf8aSMarc Zyngier desc.its_vsgi_cmd.vpe = vpe; 4206e252cf8aSMarc Zyngier desc.its_vsgi_cmd.sgi = d->hwirq; 4207e252cf8aSMarc Zyngier desc.its_vsgi_cmd.priority = vpe->sgi_config[d->hwirq].priority; 4208e252cf8aSMarc Zyngier desc.its_vsgi_cmd.enable = vpe->sgi_config[d->hwirq].enabled; 4209e252cf8aSMarc Zyngier desc.its_vsgi_cmd.group = vpe->sgi_config[d->hwirq].group; 4210e252cf8aSMarc Zyngier desc.its_vsgi_cmd.clear = clear; 4211e252cf8aSMarc Zyngier 4212e252cf8aSMarc Zyngier /* 4213e252cf8aSMarc Zyngier * GICv4.1 allows us to send VSGI commands to any ITS as long as the 4214e252cf8aSMarc Zyngier * destination VPE is mapped there. Since we map them eagerly at 4215e252cf8aSMarc Zyngier * activation time, we're pretty sure the first GICv4.1 ITS will do. 4216e252cf8aSMarc Zyngier */ 4217e252cf8aSMarc Zyngier its_send_single_vcommand(find_4_1_its(), its_build_vsgi_cmd, &desc); 4218e252cf8aSMarc Zyngier } 4219e252cf8aSMarc Zyngier 4220b4e8d644SMarc Zyngier static void its_sgi_mask_irq(struct irq_data *d) 4221b4e8d644SMarc Zyngier { 4222b4e8d644SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4223b4e8d644SMarc Zyngier 4224b4e8d644SMarc Zyngier vpe->sgi_config[d->hwirq].enabled = false; 4225b4e8d644SMarc Zyngier its_configure_sgi(d, false); 4226b4e8d644SMarc Zyngier } 4227b4e8d644SMarc Zyngier 4228b4e8d644SMarc Zyngier static void its_sgi_unmask_irq(struct irq_data *d) 4229b4e8d644SMarc Zyngier { 4230b4e8d644SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4231b4e8d644SMarc Zyngier 4232b4e8d644SMarc Zyngier vpe->sgi_config[d->hwirq].enabled = true; 4233b4e8d644SMarc Zyngier its_configure_sgi(d, false); 4234b4e8d644SMarc Zyngier } 4235b4e8d644SMarc Zyngier 4236166cba71SMarc Zyngier static int its_sgi_set_affinity(struct irq_data *d, 4237166cba71SMarc Zyngier const struct cpumask *mask_val, 4238166cba71SMarc Zyngier bool force) 4239166cba71SMarc Zyngier { 4240166cba71SMarc Zyngier /* 4241166cba71SMarc Zyngier * There is no notion of affinity for virtual SGIs, at least 4242a359f757SIngo Molnar * not on the host (since they can only be targeting a vPE). 4243166cba71SMarc Zyngier * Tell the kernel we've done whatever it asked for. 4244166cba71SMarc Zyngier */ 42454b2dfe1eSMarc Zyngier irq_data_update_effective_affinity(d, mask_val); 4246166cba71SMarc Zyngier return IRQ_SET_MASK_OK; 4247166cba71SMarc Zyngier } 4248166cba71SMarc Zyngier 42497017ff0eSMarc Zyngier static int its_sgi_set_irqchip_state(struct irq_data *d, 42507017ff0eSMarc Zyngier enum irqchip_irq_state which, 42517017ff0eSMarc Zyngier bool state) 42527017ff0eSMarc Zyngier { 42537017ff0eSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 42547017ff0eSMarc Zyngier return -EINVAL; 42557017ff0eSMarc Zyngier 42567017ff0eSMarc Zyngier if (state) { 42577017ff0eSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 42587017ff0eSMarc Zyngier struct its_node *its = find_4_1_its(); 42597017ff0eSMarc Zyngier u64 val; 42607017ff0eSMarc Zyngier 42617017ff0eSMarc Zyngier val = FIELD_PREP(GITS_SGIR_VPEID, vpe->vpe_id); 42627017ff0eSMarc Zyngier val |= FIELD_PREP(GITS_SGIR_VINTID, d->hwirq); 42637017ff0eSMarc Zyngier writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); 42647017ff0eSMarc Zyngier } else { 42657017ff0eSMarc Zyngier its_configure_sgi(d, true); 42667017ff0eSMarc Zyngier } 42677017ff0eSMarc Zyngier 42687017ff0eSMarc Zyngier return 0; 42697017ff0eSMarc Zyngier } 42707017ff0eSMarc Zyngier 42717017ff0eSMarc Zyngier static int its_sgi_get_irqchip_state(struct irq_data *d, 42727017ff0eSMarc Zyngier enum irqchip_irq_state which, bool *val) 42737017ff0eSMarc Zyngier { 42747017ff0eSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 42757017ff0eSMarc Zyngier void __iomem *base; 42767017ff0eSMarc Zyngier unsigned long flags; 42777017ff0eSMarc Zyngier u32 count = 1000000; /* 1s! */ 42787017ff0eSMarc Zyngier u32 status; 42797017ff0eSMarc Zyngier int cpu; 42807017ff0eSMarc Zyngier 42817017ff0eSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 42827017ff0eSMarc Zyngier return -EINVAL; 42837017ff0eSMarc Zyngier 42847017ff0eSMarc Zyngier /* 42857017ff0eSMarc Zyngier * Locking galore! We can race against two different events: 42867017ff0eSMarc Zyngier * 4287a359f757SIngo Molnar * - Concurrent vPE affinity change: we must make sure it cannot 42887017ff0eSMarc Zyngier * happen, or we'll talk to the wrong redistributor. This is 42897017ff0eSMarc Zyngier * identical to what happens with vLPIs. 42907017ff0eSMarc Zyngier * 42917017ff0eSMarc Zyngier * - Concurrent VSGIPENDR access: As it involves accessing two 42927017ff0eSMarc Zyngier * MMIO registers, this must be made atomic one way or another. 42937017ff0eSMarc Zyngier */ 42947017ff0eSMarc Zyngier cpu = vpe_to_cpuid_lock(vpe, &flags); 42957017ff0eSMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 42967017ff0eSMarc Zyngier base = gic_data_rdist_cpu(cpu)->rd_base + SZ_128K; 42977017ff0eSMarc Zyngier writel_relaxed(vpe->vpe_id, base + GICR_VSGIR); 42987017ff0eSMarc Zyngier do { 42997017ff0eSMarc Zyngier status = readl_relaxed(base + GICR_VSGIPENDR); 43007017ff0eSMarc Zyngier if (!(status & GICR_VSGIPENDR_BUSY)) 43017017ff0eSMarc Zyngier goto out; 43027017ff0eSMarc Zyngier 43037017ff0eSMarc Zyngier count--; 43047017ff0eSMarc Zyngier if (!count) { 43057017ff0eSMarc Zyngier pr_err_ratelimited("Unable to get SGI status\n"); 43067017ff0eSMarc Zyngier goto out; 43077017ff0eSMarc Zyngier } 43087017ff0eSMarc Zyngier cpu_relax(); 43097017ff0eSMarc Zyngier udelay(1); 43107017ff0eSMarc Zyngier } while (count); 43117017ff0eSMarc Zyngier 43127017ff0eSMarc Zyngier out: 43137017ff0eSMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 43147017ff0eSMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 43157017ff0eSMarc Zyngier 43167017ff0eSMarc Zyngier if (!count) 43177017ff0eSMarc Zyngier return -ENXIO; 43187017ff0eSMarc Zyngier 43197017ff0eSMarc Zyngier *val = !!(status & (1 << d->hwirq)); 43207017ff0eSMarc Zyngier 43217017ff0eSMarc Zyngier return 0; 43227017ff0eSMarc Zyngier } 43237017ff0eSMarc Zyngier 432405d32df1SMarc Zyngier static int its_sgi_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 432505d32df1SMarc Zyngier { 432605d32df1SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 432705d32df1SMarc Zyngier struct its_cmd_info *info = vcpu_info; 432805d32df1SMarc Zyngier 432905d32df1SMarc Zyngier switch (info->cmd_type) { 433005d32df1SMarc Zyngier case PROP_UPDATE_VSGI: 433105d32df1SMarc Zyngier vpe->sgi_config[d->hwirq].priority = info->priority; 433205d32df1SMarc Zyngier vpe->sgi_config[d->hwirq].group = info->group; 433305d32df1SMarc Zyngier its_configure_sgi(d, false); 433405d32df1SMarc Zyngier return 0; 433505d32df1SMarc Zyngier 433605d32df1SMarc Zyngier default: 433705d32df1SMarc Zyngier return -EINVAL; 433805d32df1SMarc Zyngier } 433905d32df1SMarc Zyngier } 434005d32df1SMarc Zyngier 4341166cba71SMarc Zyngier static struct irq_chip its_sgi_irq_chip = { 4342166cba71SMarc Zyngier .name = "GICv4.1-sgi", 4343b4e8d644SMarc Zyngier .irq_mask = its_sgi_mask_irq, 4344b4e8d644SMarc Zyngier .irq_unmask = its_sgi_unmask_irq, 4345166cba71SMarc Zyngier .irq_set_affinity = its_sgi_set_affinity, 43467017ff0eSMarc Zyngier .irq_set_irqchip_state = its_sgi_set_irqchip_state, 43477017ff0eSMarc Zyngier .irq_get_irqchip_state = its_sgi_get_irqchip_state, 434805d32df1SMarc Zyngier .irq_set_vcpu_affinity = its_sgi_set_vcpu_affinity, 4349166cba71SMarc Zyngier }; 4350166cba71SMarc Zyngier 4351166cba71SMarc Zyngier static int its_sgi_irq_domain_alloc(struct irq_domain *domain, 4352166cba71SMarc Zyngier unsigned int virq, unsigned int nr_irqs, 4353166cba71SMarc Zyngier void *args) 4354166cba71SMarc Zyngier { 4355166cba71SMarc Zyngier struct its_vpe *vpe = args; 4356166cba71SMarc Zyngier int i; 4357166cba71SMarc Zyngier 4358166cba71SMarc Zyngier /* Yes, we do want 16 SGIs */ 4359166cba71SMarc Zyngier WARN_ON(nr_irqs != 16); 4360166cba71SMarc Zyngier 4361166cba71SMarc Zyngier for (i = 0; i < 16; i++) { 4362166cba71SMarc Zyngier vpe->sgi_config[i].priority = 0; 4363166cba71SMarc Zyngier vpe->sgi_config[i].enabled = false; 4364166cba71SMarc Zyngier vpe->sgi_config[i].group = false; 4365166cba71SMarc Zyngier 4366166cba71SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 4367166cba71SMarc Zyngier &its_sgi_irq_chip, vpe); 4368166cba71SMarc Zyngier irq_set_status_flags(virq + i, IRQ_DISABLE_UNLAZY); 4369166cba71SMarc Zyngier } 4370166cba71SMarc Zyngier 4371166cba71SMarc Zyngier return 0; 4372166cba71SMarc Zyngier } 4373166cba71SMarc Zyngier 4374166cba71SMarc Zyngier static void its_sgi_irq_domain_free(struct irq_domain *domain, 4375166cba71SMarc Zyngier unsigned int virq, 4376166cba71SMarc Zyngier unsigned int nr_irqs) 4377166cba71SMarc Zyngier { 4378166cba71SMarc Zyngier /* Nothing to do */ 4379166cba71SMarc Zyngier } 4380166cba71SMarc Zyngier 4381166cba71SMarc Zyngier static int its_sgi_irq_domain_activate(struct irq_domain *domain, 4382166cba71SMarc Zyngier struct irq_data *d, bool reserve) 4383166cba71SMarc Zyngier { 4384e252cf8aSMarc Zyngier /* Write out the initial SGI configuration */ 4385e252cf8aSMarc Zyngier its_configure_sgi(d, false); 4386166cba71SMarc Zyngier return 0; 4387166cba71SMarc Zyngier } 4388166cba71SMarc Zyngier 4389166cba71SMarc Zyngier static void its_sgi_irq_domain_deactivate(struct irq_domain *domain, 4390166cba71SMarc Zyngier struct irq_data *d) 4391166cba71SMarc Zyngier { 4392e252cf8aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4393e252cf8aSMarc Zyngier 4394e252cf8aSMarc Zyngier /* 4395e252cf8aSMarc Zyngier * The VSGI command is awkward: 4396e252cf8aSMarc Zyngier * 4397e252cf8aSMarc Zyngier * - To change the configuration, CLEAR must be set to false, 4398e252cf8aSMarc Zyngier * leaving the pending bit unchanged. 4399e252cf8aSMarc Zyngier * - To clear the pending bit, CLEAR must be set to true, leaving 4400e252cf8aSMarc Zyngier * the configuration unchanged. 4401e252cf8aSMarc Zyngier * 4402e252cf8aSMarc Zyngier * You just can't do both at once, hence the two commands below. 4403e252cf8aSMarc Zyngier */ 4404e252cf8aSMarc Zyngier vpe->sgi_config[d->hwirq].enabled = false; 4405e252cf8aSMarc Zyngier its_configure_sgi(d, false); 4406e252cf8aSMarc Zyngier its_configure_sgi(d, true); 4407166cba71SMarc Zyngier } 4408166cba71SMarc Zyngier 4409166cba71SMarc Zyngier static const struct irq_domain_ops its_sgi_domain_ops = { 4410166cba71SMarc Zyngier .alloc = its_sgi_irq_domain_alloc, 4411166cba71SMarc Zyngier .free = its_sgi_irq_domain_free, 4412166cba71SMarc Zyngier .activate = its_sgi_irq_domain_activate, 4413166cba71SMarc Zyngier .deactivate = its_sgi_irq_domain_deactivate, 4414166cba71SMarc Zyngier }; 4415166cba71SMarc Zyngier 44167d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 44177d75bbb4SMarc Zyngier { 441832bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 44197d75bbb4SMarc Zyngier } 44207d75bbb4SMarc Zyngier 44217d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 44227d75bbb4SMarc Zyngier { 44237d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 44247d75bbb4SMarc Zyngier } 44257d75bbb4SMarc Zyngier 44267d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 44277d75bbb4SMarc Zyngier { 44287d75bbb4SMarc Zyngier struct page *vpt_page; 44297d75bbb4SMarc Zyngier int vpe_id; 44307d75bbb4SMarc Zyngier 44317d75bbb4SMarc Zyngier /* Allocate vpe_id */ 44327d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 44337d75bbb4SMarc Zyngier if (vpe_id < 0) 44347d75bbb4SMarc Zyngier return vpe_id; 44357d75bbb4SMarc Zyngier 44367d75bbb4SMarc Zyngier /* Allocate VPT */ 44377d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 44387d75bbb4SMarc Zyngier if (!vpt_page) { 44397d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 44407d75bbb4SMarc Zyngier return -ENOMEM; 44417d75bbb4SMarc Zyngier } 44427d75bbb4SMarc Zyngier 44437d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 44447d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 444534f8eb92SNianyao Tang its_free_pending_table(vpt_page); 44467d75bbb4SMarc Zyngier return -ENOMEM; 44477d75bbb4SMarc Zyngier } 44487d75bbb4SMarc Zyngier 4449f3a05921SMarc Zyngier raw_spin_lock_init(&vpe->vpe_lock); 44507d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 44517d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 445264edfaa9SMarc Zyngier if (gic_rdists->has_rvpeid) 445364edfaa9SMarc Zyngier atomic_set(&vpe->vmapp_count, 0); 445464edfaa9SMarc Zyngier else 445520b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 44567d75bbb4SMarc Zyngier 44577d75bbb4SMarc Zyngier return 0; 44587d75bbb4SMarc Zyngier } 44597d75bbb4SMarc Zyngier 44607d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 44617d75bbb4SMarc Zyngier { 446220b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 44637d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 44647d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 44657d75bbb4SMarc Zyngier } 44667d75bbb4SMarc Zyngier 44677d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 44687d75bbb4SMarc Zyngier unsigned int virq, 44697d75bbb4SMarc Zyngier unsigned int nr_irqs) 44707d75bbb4SMarc Zyngier { 44717d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 44727d75bbb4SMarc Zyngier int i; 44737d75bbb4SMarc Zyngier 44747d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 44757d75bbb4SMarc Zyngier 44767d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 44777d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 44787d75bbb4SMarc Zyngier virq + i); 44797d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 44807d75bbb4SMarc Zyngier 44817d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 44827d75bbb4SMarc Zyngier 44837d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 44847d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 44857d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 44867d75bbb4SMarc Zyngier } 44877d75bbb4SMarc Zyngier 44887d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 448938dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 44907d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 44917d75bbb4SMarc Zyngier } 44927d75bbb4SMarc Zyngier } 44937d75bbb4SMarc Zyngier 44947d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 44957d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 44967d75bbb4SMarc Zyngier { 449729c647f3SMarc Zyngier struct irq_chip *irqchip = &its_vpe_irq_chip; 44987d75bbb4SMarc Zyngier struct its_vm *vm = args; 44997d75bbb4SMarc Zyngier unsigned long *bitmap; 45007d75bbb4SMarc Zyngier struct page *vprop_page; 45017d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 45027d75bbb4SMarc Zyngier 45037d75bbb4SMarc Zyngier BUG_ON(!vm); 45047d75bbb4SMarc Zyngier 450538dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 45067d75bbb4SMarc Zyngier if (!bitmap) 45077d75bbb4SMarc Zyngier return -ENOMEM; 45087d75bbb4SMarc Zyngier 45097d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 451038dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 45117d75bbb4SMarc Zyngier return -ENOMEM; 45127d75bbb4SMarc Zyngier } 45137d75bbb4SMarc Zyngier 45147d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 45157d75bbb4SMarc Zyngier if (!vprop_page) { 451638dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 45177d75bbb4SMarc Zyngier return -ENOMEM; 45187d75bbb4SMarc Zyngier } 45197d75bbb4SMarc Zyngier 45207d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 45217d75bbb4SMarc Zyngier vm->db_lpi_base = base; 45227d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 45237d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 45247d75bbb4SMarc Zyngier 452529c647f3SMarc Zyngier if (gic_rdists->has_rvpeid) 452629c647f3SMarc Zyngier irqchip = &its_vpe_4_1_irq_chip; 452729c647f3SMarc Zyngier 45287d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 45297d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 45307d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 45317d75bbb4SMarc Zyngier if (err) 45327d75bbb4SMarc Zyngier break; 45337d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 45347d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 45357d75bbb4SMarc Zyngier if (err) 45367d75bbb4SMarc Zyngier break; 45377d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 453829c647f3SMarc Zyngier irqchip, vm->vpes[i]); 45397d75bbb4SMarc Zyngier set_bit(i, bitmap); 45408f4b5895SJames Gowans irqd_set_resend_when_in_progress(irq_get_irq_data(virq + i)); 45417d75bbb4SMarc Zyngier } 45427d75bbb4SMarc Zyngier 45437d75bbb4SMarc Zyngier if (err) { 45447d75bbb4SMarc Zyngier if (i > 0) 4545280bef51SKaige Fu its_vpe_irq_domain_free(domain, virq, i); 45467d75bbb4SMarc Zyngier 454738dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 45487d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 45497d75bbb4SMarc Zyngier } 45507d75bbb4SMarc Zyngier 45517d75bbb4SMarc Zyngier return err; 45527d75bbb4SMarc Zyngier } 45537d75bbb4SMarc Zyngier 455472491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 4555702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 4556eb78192bSMarc Zyngier { 4557eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 455840619a2eSMarc Zyngier struct its_node *its; 4559eb78192bSMarc Zyngier 4560009384b3SMarc Zyngier /* 4561009384b3SMarc Zyngier * If we use the list map, we issue VMAPP on demand... Unless 4562009384b3SMarc Zyngier * we're on a GICv4.1 and we eagerly map the VPE on all ITSs 4563009384b3SMarc Zyngier * so that VSGIs can work. 4564009384b3SMarc Zyngier */ 4565009384b3SMarc Zyngier if (!gic_requires_eager_mapping()) 45666ef930f2SMarc Zyngier return 0; 4567eb78192bSMarc Zyngier 4568eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 4569eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 457040619a2eSMarc Zyngier 457140619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 45720dd57fedSMarc Zyngier if (!is_v4(its)) 457340619a2eSMarc Zyngier continue; 457440619a2eSMarc Zyngier 457575fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 457640619a2eSMarc Zyngier its_send_vinvall(its, vpe); 457740619a2eSMarc Zyngier } 457840619a2eSMarc Zyngier 457944c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 458044c4c25eSMarc Zyngier 458172491643SThomas Gleixner return 0; 4582eb78192bSMarc Zyngier } 4583eb78192bSMarc Zyngier 4584eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 4585eb78192bSMarc Zyngier struct irq_data *d) 4586eb78192bSMarc Zyngier { 4587eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 458875fd951bSMarc Zyngier struct its_node *its; 4589eb78192bSMarc Zyngier 45902247e1bfSMarc Zyngier /* 4591009384b3SMarc Zyngier * If we use the list map on GICv4.0, we unmap the VPE once no 4592009384b3SMarc Zyngier * VLPIs are associated with the VM. 45932247e1bfSMarc Zyngier */ 4594009384b3SMarc Zyngier if (!gic_requires_eager_mapping()) 45952247e1bfSMarc Zyngier return; 45962247e1bfSMarc Zyngier 459775fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 45980dd57fedSMarc Zyngier if (!is_v4(its)) 459975fd951bSMarc Zyngier continue; 460075fd951bSMarc Zyngier 460175fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 460275fd951bSMarc Zyngier } 4603301beaf1SMarc Zyngier 4604301beaf1SMarc Zyngier /* 4605301beaf1SMarc Zyngier * There may be a direct read to the VPT after unmapping the 4606301beaf1SMarc Zyngier * vPE, to guarantee the validity of this, we make the VPT 4607301beaf1SMarc Zyngier * memory coherent with the CPU caches here. 4608301beaf1SMarc Zyngier */ 4609301beaf1SMarc Zyngier if (find_4_1_its() && !atomic_read(&vpe->vmapp_count)) 4610301beaf1SMarc Zyngier gic_flush_dcache_to_poc(page_address(vpe->vpt_page), 4611301beaf1SMarc Zyngier LPI_PENDBASE_SZ); 4612eb78192bSMarc Zyngier } 4613eb78192bSMarc Zyngier 46148fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 46157d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 46167d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 4617eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 4618eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 46198fff27aeSMarc Zyngier }; 46208fff27aeSMarc Zyngier 46214559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 46224559fbb3SYun Wu { 46234559fbb3SYun Wu u32 count = 1000000; /* 1s */ 46244559fbb3SYun Wu u32 val; 46254559fbb3SYun Wu 46264559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 46277611da86SDavid Daney /* 46287611da86SDavid Daney * GIC architecture specification requires the ITS to be both 46297611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 46307611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 46317611da86SDavid Daney */ 46327611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 46334559fbb3SYun Wu return 0; 46344559fbb3SYun Wu 46354559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 4636d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 46374559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 46384559fbb3SYun Wu 46394559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 46404559fbb3SYun Wu while (1) { 46414559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 46424559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 46434559fbb3SYun Wu return 0; 46444559fbb3SYun Wu 46454559fbb3SYun Wu count--; 46464559fbb3SYun Wu if (!count) 46474559fbb3SYun Wu return -EBUSY; 46484559fbb3SYun Wu 46494559fbb3SYun Wu cpu_relax(); 46504559fbb3SYun Wu udelay(1); 46514559fbb3SYun Wu } 46524559fbb3SYun Wu } 46534559fbb3SYun Wu 46549d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 465594100970SRobert Richter { 465694100970SRobert Richter struct its_node *its = data; 465794100970SRobert Richter 4658576a8342SMarc Zyngier /* erratum 22375: only alloc 8MB table size (20 bits) */ 4659576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 4660576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); 466194100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 46629d111d49SArd Biesheuvel 46639d111d49SArd Biesheuvel return true; 466494100970SRobert Richter } 466594100970SRobert Richter 46669d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 4667fbf8f40eSGanapatrao Kulkarni { 4668fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 4669fbf8f40eSGanapatrao Kulkarni 4670fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 46719d111d49SArd Biesheuvel 46729d111d49SArd Biesheuvel return true; 4673fbf8f40eSGanapatrao Kulkarni } 4674fbf8f40eSGanapatrao Kulkarni 46759d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 467690922a2dSShanker Donthineni { 467790922a2dSShanker Donthineni struct its_node *its = data; 467890922a2dSShanker Donthineni 467990922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 4680ffedbf0cSMarc Zyngier its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; 4681ffedbf0cSMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); 46829d111d49SArd Biesheuvel 46839d111d49SArd Biesheuvel return true; 468490922a2dSShanker Donthineni } 468590922a2dSShanker Donthineni 4686558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 4687558b0165SArd Biesheuvel { 4688558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 4689558b0165SArd Biesheuvel 4690558b0165SArd Biesheuvel /* 4691558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 4692558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 4693558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 4694558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 4695558b0165SArd Biesheuvel * the window offset. 4696558b0165SArd Biesheuvel */ 4697558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 4698558b0165SArd Biesheuvel } 4699558b0165SArd Biesheuvel 4700558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 4701558b0165SArd Biesheuvel { 4702558b0165SArd Biesheuvel struct its_node *its = data; 4703558b0165SArd Biesheuvel u32 pre_its_window[2]; 4704558b0165SArd Biesheuvel u32 ids; 4705558b0165SArd Biesheuvel 4706558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 4707558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 4708558b0165SArd Biesheuvel pre_its_window, 4709558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 4710558b0165SArd Biesheuvel 4711558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 4712558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 4713558b0165SArd Biesheuvel 4714558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 4715576a8342SMarc Zyngier if (device_ids(its) > ids) { 4716576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 4717576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); 4718576a8342SMarc Zyngier } 4719558b0165SArd Biesheuvel 4720558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 4721dcb83f6eSJason Gunthorpe its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_ISOLATED_MSI; 4722558b0165SArd Biesheuvel return true; 4723558b0165SArd Biesheuvel } 4724558b0165SArd Biesheuvel return false; 4725558b0165SArd Biesheuvel } 4726558b0165SArd Biesheuvel 47275c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 47285c9a882eSMarc Zyngier { 47295c9a882eSMarc Zyngier struct its_node *its = data; 47305c9a882eSMarc Zyngier 47315c9a882eSMarc Zyngier /* 47325c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 47335c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 47345c9a882eSMarc Zyngier */ 47355c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 47365c9a882eSMarc Zyngier return true; 4737cc2d3216SMarc Zyngier } 47384c21f3c2SMarc Zyngier 4739a8707f55SSebastian Reichel static bool __maybe_unused its_enable_rk3588001(void *data) 4740a8707f55SSebastian Reichel { 4741a8707f55SSebastian Reichel struct its_node *its = data; 4742a8707f55SSebastian Reichel 4743567f67acSSebastian Reichel if (!of_machine_is_compatible("rockchip,rk3588") && 4744567f67acSSebastian Reichel !of_machine_is_compatible("rockchip,rk3588s")) 4745a8707f55SSebastian Reichel return false; 4746a8707f55SSebastian Reichel 4747a8707f55SSebastian Reichel its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; 4748a8707f55SSebastian Reichel gic_rdists->flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE; 4749a8707f55SSebastian Reichel 4750a8707f55SSebastian Reichel return true; 4751a8707f55SSebastian Reichel } 4752a8707f55SSebastian Reichel 47533a0fff0fSLorenzo Pieralisi static bool its_set_non_coherent(void *data) 47543a0fff0fSLorenzo Pieralisi { 47553a0fff0fSLorenzo Pieralisi struct its_node *its = data; 47563a0fff0fSLorenzo Pieralisi 47573a0fff0fSLorenzo Pieralisi its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; 47583a0fff0fSLorenzo Pieralisi return true; 47593a0fff0fSLorenzo Pieralisi } 47603a0fff0fSLorenzo Pieralisi 476167510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 476294100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 476394100970SRobert Richter { 476494100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 476594100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 476694100970SRobert Richter .mask = 0xffff0fff, 476794100970SRobert Richter .init = its_enable_quirk_cavium_22375, 476894100970SRobert Richter }, 476994100970SRobert Richter #endif 4770fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 4771fbf8f40eSGanapatrao Kulkarni { 4772fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 4773fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 4774fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 4775fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 4776fbf8f40eSGanapatrao Kulkarni }, 4777fbf8f40eSGanapatrao Kulkarni #endif 477890922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 477990922a2dSShanker Donthineni { 478090922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 478190922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 478290922a2dSShanker Donthineni .mask = 0xffffffff, 478390922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 478490922a2dSShanker Donthineni }, 478590922a2dSShanker Donthineni #endif 4786558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 4787558b0165SArd Biesheuvel { 4788558b0165SArd Biesheuvel /* 4789558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 4790558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 4791558b0165SArd Biesheuvel * special handling in software. 4792558b0165SArd Biesheuvel */ 4793558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 4794558b0165SArd Biesheuvel .iidr = 0x0001143b, 4795558b0165SArd Biesheuvel .mask = 0xffffffff, 4796558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 4797558b0165SArd Biesheuvel }, 4798558b0165SArd Biesheuvel #endif 47995c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 48005c9a882eSMarc Zyngier { 48015c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 48025c9a882eSMarc Zyngier .iidr = 0x00000004, 48035c9a882eSMarc Zyngier .mask = 0xffffffff, 48045c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 48055c9a882eSMarc Zyngier }, 48065c9a882eSMarc Zyngier #endif 4807a8707f55SSebastian Reichel #ifdef CONFIG_ROCKCHIP_ERRATUM_3588001 4808a8707f55SSebastian Reichel { 4809a8707f55SSebastian Reichel .desc = "ITS: Rockchip erratum RK3588001", 4810a8707f55SSebastian Reichel .iidr = 0x0201743b, 4811a8707f55SSebastian Reichel .mask = 0xffffffff, 4812a8707f55SSebastian Reichel .init = its_enable_rk3588001, 4813a8707f55SSebastian Reichel }, 4814a8707f55SSebastian Reichel #endif 481567510ccaSRobert Richter { 48163a0fff0fSLorenzo Pieralisi .desc = "ITS: non-coherent attribute", 48173a0fff0fSLorenzo Pieralisi .property = "dma-noncoherent", 48183a0fff0fSLorenzo Pieralisi .init = its_set_non_coherent, 48193a0fff0fSLorenzo Pieralisi }, 48203a0fff0fSLorenzo Pieralisi { 482167510ccaSRobert Richter } 482267510ccaSRobert Richter }; 482367510ccaSRobert Richter 482467510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 482567510ccaSRobert Richter { 482667510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 482767510ccaSRobert Richter 482867510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 48293a0fff0fSLorenzo Pieralisi 48303a0fff0fSLorenzo Pieralisi if (is_of_node(its->fwnode_handle)) 48313a0fff0fSLorenzo Pieralisi gic_enable_of_quirks(to_of_node(its->fwnode_handle), 48323a0fff0fSLorenzo Pieralisi its_quirks, its); 483367510ccaSRobert Richter } 483467510ccaSRobert Richter 4835dba0bc7bSDerek Basehore static int its_save_disable(void) 4836dba0bc7bSDerek Basehore { 4837dba0bc7bSDerek Basehore struct its_node *its; 4838dba0bc7bSDerek Basehore int err = 0; 4839dba0bc7bSDerek Basehore 4840a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4841dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4842dba0bc7bSDerek Basehore void __iomem *base; 4843dba0bc7bSDerek Basehore 4844dba0bc7bSDerek Basehore base = its->base; 4845dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 4846dba0bc7bSDerek Basehore err = its_force_quiescent(base); 4847dba0bc7bSDerek Basehore if (err) { 4848dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 4849dba0bc7bSDerek Basehore &its->phys_base, err); 4850dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4851dba0bc7bSDerek Basehore goto err; 4852dba0bc7bSDerek Basehore } 4853dba0bc7bSDerek Basehore 4854dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 4855dba0bc7bSDerek Basehore } 4856dba0bc7bSDerek Basehore 4857dba0bc7bSDerek Basehore err: 4858dba0bc7bSDerek Basehore if (err) { 4859dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 4860dba0bc7bSDerek Basehore void __iomem *base; 4861dba0bc7bSDerek Basehore 4862dba0bc7bSDerek Basehore base = its->base; 4863dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4864dba0bc7bSDerek Basehore } 4865dba0bc7bSDerek Basehore } 4866a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4867dba0bc7bSDerek Basehore 4868dba0bc7bSDerek Basehore return err; 4869dba0bc7bSDerek Basehore } 4870dba0bc7bSDerek Basehore 4871dba0bc7bSDerek Basehore static void its_restore_enable(void) 4872dba0bc7bSDerek Basehore { 4873dba0bc7bSDerek Basehore struct its_node *its; 4874dba0bc7bSDerek Basehore int ret; 4875dba0bc7bSDerek Basehore 4876a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4877dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4878dba0bc7bSDerek Basehore void __iomem *base; 4879dba0bc7bSDerek Basehore int i; 4880dba0bc7bSDerek Basehore 4881dba0bc7bSDerek Basehore base = its->base; 4882dba0bc7bSDerek Basehore 4883dba0bc7bSDerek Basehore /* 4884dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 4885dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 4886dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 4887dba0bc7bSDerek Basehore * Specification. 488874cde1a5SXu Qiang * 488974cde1a5SXu Qiang * Firmware resuming with the ITS enabled is terminally broken. 4890dba0bc7bSDerek Basehore */ 489174cde1a5SXu Qiang WARN_ON(readl_relaxed(base + GITS_CTLR) & GITS_CTLR_ENABLE); 4892dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 4893dba0bc7bSDerek Basehore if (ret) { 4894dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 4895dba0bc7bSDerek Basehore &its->phys_base, ret); 4896dba0bc7bSDerek Basehore continue; 4897dba0bc7bSDerek Basehore } 4898dba0bc7bSDerek Basehore 4899dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 4900dba0bc7bSDerek Basehore 4901dba0bc7bSDerek Basehore /* 4902dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 4903dba0bc7bSDerek Basehore * cmd_write line up with it. 4904dba0bc7bSDerek Basehore */ 4905dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 4906dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 4907dba0bc7bSDerek Basehore 4908dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 4909dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 4910dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 4911dba0bc7bSDerek Basehore 4912dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 4913dba0bc7bSDerek Basehore continue; 4914dba0bc7bSDerek Basehore 4915dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 4916dba0bc7bSDerek Basehore } 4917dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4918920181ceSDerek Basehore 4919920181ceSDerek Basehore /* 4920920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 4921920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 4922920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 4923920181ceSDerek Basehore */ 4924920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 4925920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 4926920181ceSDerek Basehore its_cpu_init_collection(its); 4927dba0bc7bSDerek Basehore } 4928a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4929dba0bc7bSDerek Basehore } 4930dba0bc7bSDerek Basehore 4931dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 4932dba0bc7bSDerek Basehore .suspend = its_save_disable, 4933dba0bc7bSDerek Basehore .resume = its_restore_enable, 4934dba0bc7bSDerek Basehore }; 4935dba0bc7bSDerek Basehore 4936c733ebb7SMarc Zyngier static void __init __iomem *its_map_one(struct resource *res, int *err) 4937c733ebb7SMarc Zyngier { 4938c733ebb7SMarc Zyngier void __iomem *its_base; 4939c733ebb7SMarc Zyngier u32 val; 4940c733ebb7SMarc Zyngier 4941c733ebb7SMarc Zyngier its_base = ioremap(res->start, SZ_64K); 4942c733ebb7SMarc Zyngier if (!its_base) { 4943c733ebb7SMarc Zyngier pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 4944c733ebb7SMarc Zyngier *err = -ENOMEM; 4945c733ebb7SMarc Zyngier return NULL; 4946c733ebb7SMarc Zyngier } 4947c733ebb7SMarc Zyngier 4948c733ebb7SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 4949c733ebb7SMarc Zyngier if (val != 0x30 && val != 0x40) { 4950c733ebb7SMarc Zyngier pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 4951c733ebb7SMarc Zyngier *err = -ENODEV; 4952c733ebb7SMarc Zyngier goto out_unmap; 4953c733ebb7SMarc Zyngier } 4954c733ebb7SMarc Zyngier 4955c733ebb7SMarc Zyngier *err = its_force_quiescent(its_base); 4956c733ebb7SMarc Zyngier if (*err) { 4957c733ebb7SMarc Zyngier pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 4958c733ebb7SMarc Zyngier goto out_unmap; 4959c733ebb7SMarc Zyngier } 4960c733ebb7SMarc Zyngier 4961c733ebb7SMarc Zyngier return its_base; 4962c733ebb7SMarc Zyngier 4963c733ebb7SMarc Zyngier out_unmap: 4964c733ebb7SMarc Zyngier iounmap(its_base); 4965c733ebb7SMarc Zyngier return NULL; 4966c733ebb7SMarc Zyngier } 4967c733ebb7SMarc Zyngier 49689585a495SMarc Zyngier static int its_init_domain(struct its_node *its) 4969d14ae5e6STomasz Nowicki { 4970d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 4971d14ae5e6STomasz Nowicki struct msi_domain_info *info; 4972d14ae5e6STomasz Nowicki 4973d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 4974d14ae5e6STomasz Nowicki if (!info) 4975d14ae5e6STomasz Nowicki return -ENOMEM; 4976d14ae5e6STomasz Nowicki 49771e46e040SJohan Hovold info->ops = &its_msi_domain_ops; 49781e46e040SJohan Hovold info->data = its; 49791e46e040SJohan Hovold 49801e46e040SJohan Hovold inner_domain = irq_domain_create_hierarchy(its_parent, 49811e46e040SJohan Hovold its->msi_domain_flags, 0, 49829585a495SMarc Zyngier its->fwnode_handle, &its_domain_ops, 49831e46e040SJohan Hovold info); 4984d14ae5e6STomasz Nowicki if (!inner_domain) { 4985d14ae5e6STomasz Nowicki kfree(info); 4986d14ae5e6STomasz Nowicki return -ENOMEM; 4987d14ae5e6STomasz Nowicki } 4988d14ae5e6STomasz Nowicki 498996f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 4990d14ae5e6STomasz Nowicki 4991d14ae5e6STomasz Nowicki return 0; 4992d14ae5e6STomasz Nowicki } 4993d14ae5e6STomasz Nowicki 49948fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 49958fff27aeSMarc Zyngier { 499620b3d54eSMarc Zyngier struct its_node *its; 499720b3d54eSMarc Zyngier u32 devid; 499820b3d54eSMarc Zyngier int entries; 499920b3d54eSMarc Zyngier 500020b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 500120b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 500220b3d54eSMarc Zyngier return 0; 500320b3d54eSMarc Zyngier } 500420b3d54eSMarc Zyngier 500520b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 500620b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 500720b3d54eSMarc Zyngier 500820b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 50096396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 501020b3d54eSMarc Zyngier GFP_KERNEL); 5011944a1a17SZhen Lei if (!vpe_proxy.vpes) 501220b3d54eSMarc Zyngier return -ENOMEM; 501320b3d54eSMarc Zyngier 501420b3d54eSMarc Zyngier /* Use the last possible DevID */ 5015576a8342SMarc Zyngier devid = GENMASK(device_ids(its) - 1, 0); 501620b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 501720b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 501820b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 501920b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 502020b3d54eSMarc Zyngier return -ENOMEM; 502120b3d54eSMarc Zyngier } 502220b3d54eSMarc Zyngier 5023c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 502420b3d54eSMarc Zyngier 502520b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 502620b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 502720b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 502820b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 502920b3d54eSMarc Zyngier 50308fff27aeSMarc Zyngier return 0; 50318fff27aeSMarc Zyngier } 50328fff27aeSMarc Zyngier 50339585a495SMarc Zyngier static int __init its_compute_its_list_map(struct its_node *its) 50343dfa576bSMarc Zyngier { 50353dfa576bSMarc Zyngier int its_number; 50363dfa576bSMarc Zyngier u32 ctlr; 50373dfa576bSMarc Zyngier 50383dfa576bSMarc Zyngier /* 50393dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 50403dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 50413dfa576bSMarc Zyngier * locking. Should this change, we should address 50423dfa576bSMarc Zyngier * this. 50433dfa576bSMarc Zyngier */ 5044ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 5045ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 50463dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 50479585a495SMarc Zyngier &its->phys_base); 50483dfa576bSMarc Zyngier return -EINVAL; 50493dfa576bSMarc Zyngier } 50503dfa576bSMarc Zyngier 50519585a495SMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 50523dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 50533dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 50549585a495SMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 50559585a495SMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 50563dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 50573dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 50583dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 50593dfa576bSMarc Zyngier } 50603dfa576bSMarc Zyngier 50613dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 50623dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 50639585a495SMarc Zyngier &its->phys_base, its_number); 50643dfa576bSMarc Zyngier return -EINVAL; 50653dfa576bSMarc Zyngier } 50663dfa576bSMarc Zyngier 50673dfa576bSMarc Zyngier return its_number; 50683dfa576bSMarc Zyngier } 50693dfa576bSMarc Zyngier 50709585a495SMarc Zyngier static int __init its_probe_one(struct its_node *its) 50714c21f3c2SMarc Zyngier { 50729585a495SMarc Zyngier u64 baser, tmp; 5073539d3782SShanker Donthineni struct page *page; 5074c733ebb7SMarc Zyngier u32 ctlr; 50754c21f3c2SMarc Zyngier int err; 50764c21f3c2SMarc Zyngier 50770dd57fedSMarc Zyngier if (is_v4(its)) { 50789585a495SMarc Zyngier if (!(its->typer & GITS_TYPER_VMOVP)) { 50799585a495SMarc Zyngier err = its_compute_its_list_map(its); 50803dfa576bSMarc Zyngier if (err < 0) 50819585a495SMarc Zyngier goto out; 50823dfa576bSMarc Zyngier 5083debf6d02SMarc Zyngier its->list_nr = err; 5084debf6d02SMarc Zyngier 50853dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 50869585a495SMarc Zyngier &its->phys_base, err); 50873dfa576bSMarc Zyngier } else { 50889585a495SMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &its->phys_base); 50893dfa576bSMarc Zyngier } 50905e516846SMarc Zyngier 50915e516846SMarc Zyngier if (is_v4_1(its)) { 50929585a495SMarc Zyngier u32 svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); 50935e46a484SMarc Zyngier 50949585a495SMarc Zyngier its->sgir_base = ioremap(its->phys_base + SZ_128K, SZ_64K); 50955e46a484SMarc Zyngier if (!its->sgir_base) { 50965e46a484SMarc Zyngier err = -ENOMEM; 50979585a495SMarc Zyngier goto out; 50985e46a484SMarc Zyngier } 50995e46a484SMarc Zyngier 51009585a495SMarc Zyngier its->mpidr = readl_relaxed(its->base + GITS_MPIDR); 51015e516846SMarc Zyngier 51025e516846SMarc Zyngier pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n", 51039585a495SMarc Zyngier &its->phys_base, its->mpidr, svpet); 51045e516846SMarc Zyngier } 51053dfa576bSMarc Zyngier } 51063dfa576bSMarc Zyngier 5107539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 51085bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 5109539d3782SShanker Donthineni if (!page) { 51104c21f3c2SMarc Zyngier err = -ENOMEM; 51115e46a484SMarc Zyngier goto out_unmap_sgir; 51124c21f3c2SMarc Zyngier } 5113539d3782SShanker Donthineni its->cmd_base = (void *)page_address(page); 51144c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 51154c21f3c2SMarc Zyngier 51160e0b0f69SShanker Donthineni err = its_alloc_tables(its); 51174c21f3c2SMarc Zyngier if (err) 51184c21f3c2SMarc Zyngier goto out_free_cmd; 51194c21f3c2SMarc Zyngier 51204c21f3c2SMarc Zyngier err = its_alloc_collections(its); 51214c21f3c2SMarc Zyngier if (err) 51224c21f3c2SMarc Zyngier goto out_free_tables; 51234c21f3c2SMarc Zyngier 51244c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 51252fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 51264c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 51274c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 51284c21f3c2SMarc Zyngier GITS_CBASER_VALID); 51294c21f3c2SMarc Zyngier 51300968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 51310968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 51324c21f3c2SMarc Zyngier 5133a8707f55SSebastian Reichel if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) 5134a8707f55SSebastian Reichel tmp &= ~GITS_CBASER_SHAREABILITY_MASK; 5135a8707f55SSebastian Reichel 51364ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 5137241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 5138241a386cSMarc Zyngier /* 5139241a386cSMarc Zyngier * The HW reports non-shareable, we must 5140241a386cSMarc Zyngier * remove the cacheability attributes as 5141241a386cSMarc Zyngier * well. 5142241a386cSMarc Zyngier */ 5143241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 5144241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 5145241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 51460968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 5147241a386cSMarc Zyngier } 51484c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 51494c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 51504c21f3c2SMarc Zyngier } 51514c21f3c2SMarc Zyngier 51520968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 51533dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 5154d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 51550dd57fedSMarc Zyngier if (is_v4(its)) 5156d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 5157d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 5158241a386cSMarc Zyngier 51599585a495SMarc Zyngier err = its_init_domain(its); 5160d14ae5e6STomasz Nowicki if (err) 516154456db9SMarc Zyngier goto out_free_tables; 51624c21f3c2SMarc Zyngier 5163a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 51644c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 5165a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 51664c21f3c2SMarc Zyngier 51674c21f3c2SMarc Zyngier return 0; 51684c21f3c2SMarc Zyngier 51694c21f3c2SMarc Zyngier out_free_tables: 51704c21f3c2SMarc Zyngier its_free_tables(its); 51714c21f3c2SMarc Zyngier out_free_cmd: 51725bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 51735e46a484SMarc Zyngier out_unmap_sgir: 51745e46a484SMarc Zyngier if (its->sgir_base) 51755e46a484SMarc Zyngier iounmap(its->sgir_base); 51769585a495SMarc Zyngier out: 51779585a495SMarc Zyngier pr_err("ITS@%pa: failed probing (%d)\n", &its->phys_base, err); 51784c21f3c2SMarc Zyngier return err; 51794c21f3c2SMarc Zyngier } 51804c21f3c2SMarc Zyngier 51814c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 51824c21f3c2SMarc Zyngier { 5183589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 51844c21f3c2SMarc Zyngier } 51854c21f3c2SMarc Zyngier 51866eb486b6SShanker Donthineni static int redist_disable_lpis(void) 51874c21f3c2SMarc Zyngier { 51886eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 51896eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 51906eb486b6SShanker Donthineni u64 val; 51916eb486b6SShanker Donthineni 51924c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 51934c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 51944c21f3c2SMarc Zyngier return -ENXIO; 51954c21f3c2SMarc Zyngier } 51966eb486b6SShanker Donthineni 51976eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 51986eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 51996eb486b6SShanker Donthineni return 0; 52006eb486b6SShanker Donthineni 520111e37d35SMarc Zyngier /* 520211e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 520311e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 520411e37d35SMarc Zyngier * configured and all is well in the world. 5205c440a9d9SMarc Zyngier * 5206c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 520711e37d35SMarc Zyngier */ 5208c0cdc890SValentin Schneider if ((gic_data_rdist()->flags & RD_LOCAL_LPI_ENABLED) || 5209c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 521011e37d35SMarc Zyngier return 0; 521111e37d35SMarc Zyngier 521211e37d35SMarc Zyngier /* 521311e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 521411e37d35SMarc Zyngier */ 521511e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 52166eb486b6SShanker Donthineni smp_processor_id()); 52176eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 52186eb486b6SShanker Donthineni 52196eb486b6SShanker Donthineni /* Disable LPIs */ 52206eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 52216eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 52226eb486b6SShanker Donthineni 52236eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 52246eb486b6SShanker Donthineni dsb(sy); 52256eb486b6SShanker Donthineni 52266eb486b6SShanker Donthineni /* 52276eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 52286eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 52296eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 52306eb486b6SShanker Donthineni */ 52316eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 52326eb486b6SShanker Donthineni if (!timeout) { 52336eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 52346eb486b6SShanker Donthineni smp_processor_id()); 52356eb486b6SShanker Donthineni return -ETIMEDOUT; 52366eb486b6SShanker Donthineni } 52376eb486b6SShanker Donthineni udelay(1); 52386eb486b6SShanker Donthineni timeout--; 52396eb486b6SShanker Donthineni } 52406eb486b6SShanker Donthineni 52416eb486b6SShanker Donthineni /* 52426eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 52436eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 52446eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 52456eb486b6SShanker Donthineni */ 52466eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 52476eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 52486eb486b6SShanker Donthineni return -EBUSY; 52496eb486b6SShanker Donthineni } 52506eb486b6SShanker Donthineni 52516eb486b6SShanker Donthineni return 0; 52526eb486b6SShanker Donthineni } 52536eb486b6SShanker Donthineni 52546eb486b6SShanker Donthineni int its_cpu_init(void) 52556eb486b6SShanker Donthineni { 52566eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 52576eb486b6SShanker Donthineni int ret; 52586eb486b6SShanker Donthineni 52596eb486b6SShanker Donthineni ret = redist_disable_lpis(); 52606eb486b6SShanker Donthineni if (ret) 52616eb486b6SShanker Donthineni return ret; 52626eb486b6SShanker Donthineni 52634c21f3c2SMarc Zyngier its_cpu_init_lpis(); 5264920181ceSDerek Basehore its_cpu_init_collections(); 52654c21f3c2SMarc Zyngier } 52664c21f3c2SMarc Zyngier 52674c21f3c2SMarc Zyngier return 0; 52684c21f3c2SMarc Zyngier } 52694c21f3c2SMarc Zyngier 5270835f442fSValentin Schneider static void rdist_memreserve_cpuhp_cleanup_workfn(struct work_struct *work) 5271835f442fSValentin Schneider { 5272835f442fSValentin Schneider cpuhp_remove_state_nocalls(gic_rdists->cpuhp_memreserve_state); 5273835f442fSValentin Schneider gic_rdists->cpuhp_memreserve_state = CPUHP_INVALID; 5274835f442fSValentin Schneider } 5275835f442fSValentin Schneider 5276835f442fSValentin Schneider static DECLARE_WORK(rdist_memreserve_cpuhp_cleanup_work, 5277835f442fSValentin Schneider rdist_memreserve_cpuhp_cleanup_workfn); 5278835f442fSValentin Schneider 5279d23bc2bcSValentin Schneider static int its_cpu_memreserve_lpi(unsigned int cpu) 5280d23bc2bcSValentin Schneider { 5281d23bc2bcSValentin Schneider struct page *pend_page; 5282d23bc2bcSValentin Schneider int ret = 0; 5283d23bc2bcSValentin Schneider 5284d23bc2bcSValentin Schneider /* This gets to run exactly once per CPU */ 5285d23bc2bcSValentin Schneider if (gic_data_rdist()->flags & RD_LOCAL_MEMRESERVE_DONE) 5286d23bc2bcSValentin Schneider return 0; 5287d23bc2bcSValentin Schneider 5288d23bc2bcSValentin Schneider pend_page = gic_data_rdist()->pend_page; 5289d23bc2bcSValentin Schneider if (WARN_ON(!pend_page)) { 5290d23bc2bcSValentin Schneider ret = -ENOMEM; 5291d23bc2bcSValentin Schneider goto out; 5292d23bc2bcSValentin Schneider } 5293d23bc2bcSValentin Schneider /* 5294d23bc2bcSValentin Schneider * If the pending table was pre-programmed, free the memory we 5295d23bc2bcSValentin Schneider * preemptively allocated. Otherwise, reserve that memory for 5296d23bc2bcSValentin Schneider * later kexecs. 5297d23bc2bcSValentin Schneider */ 5298d23bc2bcSValentin Schneider if (gic_data_rdist()->flags & RD_LOCAL_PENDTABLE_PREALLOCATED) { 5299d23bc2bcSValentin Schneider its_free_pending_table(pend_page); 5300d23bc2bcSValentin Schneider gic_data_rdist()->pend_page = NULL; 5301d23bc2bcSValentin Schneider } else { 5302d23bc2bcSValentin Schneider phys_addr_t paddr = page_to_phys(pend_page); 5303d23bc2bcSValentin Schneider WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 5304d23bc2bcSValentin Schneider } 5305d23bc2bcSValentin Schneider 5306d23bc2bcSValentin Schneider out: 5307835f442fSValentin Schneider /* Last CPU being brought up gets to issue the cleanup */ 530816436f70SArd Biesheuvel if (!IS_ENABLED(CONFIG_SMP) || 530916436f70SArd Biesheuvel cpumask_equal(&cpus_booted_once_mask, cpu_possible_mask)) 5310835f442fSValentin Schneider schedule_work(&rdist_memreserve_cpuhp_cleanup_work); 5311835f442fSValentin Schneider 5312d23bc2bcSValentin Schneider gic_data_rdist()->flags |= RD_LOCAL_MEMRESERVE_DONE; 5313d23bc2bcSValentin Schneider return ret; 5314d23bc2bcSValentin Schneider } 5315d23bc2bcSValentin Schneider 5316c733ebb7SMarc Zyngier /* Mark all the BASER registers as invalid before they get reprogrammed */ 5317c733ebb7SMarc Zyngier static int __init its_reset_one(struct resource *res) 5318c733ebb7SMarc Zyngier { 5319c733ebb7SMarc Zyngier void __iomem *its_base; 5320c733ebb7SMarc Zyngier int err, i; 5321c733ebb7SMarc Zyngier 5322c733ebb7SMarc Zyngier its_base = its_map_one(res, &err); 5323c733ebb7SMarc Zyngier if (!its_base) 5324c733ebb7SMarc Zyngier return err; 5325c733ebb7SMarc Zyngier 5326c733ebb7SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) 5327c733ebb7SMarc Zyngier gits_write_baser(0, its_base + GITS_BASER + (i << 3)); 5328c733ebb7SMarc Zyngier 5329c733ebb7SMarc Zyngier iounmap(its_base); 5330c733ebb7SMarc Zyngier return 0; 5331c733ebb7SMarc Zyngier } 5332c733ebb7SMarc Zyngier 5333935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 53344c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 53354c21f3c2SMarc Zyngier {}, 53364c21f3c2SMarc Zyngier }; 53374c21f3c2SMarc Zyngier 53389585a495SMarc Zyngier static struct its_node __init *its_node_init(struct resource *res, 53399585a495SMarc Zyngier struct fwnode_handle *handle, int numa_node) 53409585a495SMarc Zyngier { 53419585a495SMarc Zyngier void __iomem *its_base; 53429585a495SMarc Zyngier struct its_node *its; 53439585a495SMarc Zyngier int err; 53449585a495SMarc Zyngier 53459585a495SMarc Zyngier its_base = its_map_one(res, &err); 53469585a495SMarc Zyngier if (!its_base) 53479585a495SMarc Zyngier return NULL; 53489585a495SMarc Zyngier 53499585a495SMarc Zyngier pr_info("ITS %pR\n", res); 53509585a495SMarc Zyngier 53519585a495SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 53529585a495SMarc Zyngier if (!its) 53539585a495SMarc Zyngier goto out_unmap; 53549585a495SMarc Zyngier 53559585a495SMarc Zyngier raw_spin_lock_init(&its->lock); 53569585a495SMarc Zyngier mutex_init(&its->dev_alloc_lock); 53579585a495SMarc Zyngier INIT_LIST_HEAD(&its->entry); 53589585a495SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 53599585a495SMarc Zyngier 53609585a495SMarc Zyngier its->typer = gic_read_typer(its_base + GITS_TYPER); 53619585a495SMarc Zyngier its->base = its_base; 53629585a495SMarc Zyngier its->phys_base = res->start; 5363*f199bf5bSMarc Zyngier its->get_msi_base = its_irq_get_msi_base; 5364*f199bf5bSMarc Zyngier its->msi_domain_flags = IRQ_DOMAIN_FLAG_ISOLATED_MSI; 53659585a495SMarc Zyngier 53669585a495SMarc Zyngier its->numa_node = numa_node; 53679585a495SMarc Zyngier its->fwnode_handle = handle; 53689585a495SMarc Zyngier 53699585a495SMarc Zyngier return its; 53709585a495SMarc Zyngier 53719585a495SMarc Zyngier out_unmap: 53729585a495SMarc Zyngier iounmap(its_base); 53739585a495SMarc Zyngier return NULL; 53749585a495SMarc Zyngier } 53759585a495SMarc Zyngier 53769585a495SMarc Zyngier static void its_node_destroy(struct its_node *its) 53779585a495SMarc Zyngier { 53789585a495SMarc Zyngier iounmap(its->base); 53799585a495SMarc Zyngier kfree(its); 53809585a495SMarc Zyngier } 53819585a495SMarc Zyngier 5382db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 53834c21f3c2SMarc Zyngier { 53844c21f3c2SMarc Zyngier struct device_node *np; 5385db40f0a7STomasz Nowicki struct resource res; 53869585a495SMarc Zyngier int err; 53874c21f3c2SMarc Zyngier 5388c733ebb7SMarc Zyngier /* 5389c733ebb7SMarc Zyngier * Make sure *all* the ITS are reset before we probe any, as 5390c733ebb7SMarc Zyngier * they may be sharing memory. If any of the ITS fails to 5391c733ebb7SMarc Zyngier * reset, don't even try to go any further, as this could 5392c733ebb7SMarc Zyngier * result in something even worse. 5393c733ebb7SMarc Zyngier */ 5394c733ebb7SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 5395c733ebb7SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 5396c733ebb7SMarc Zyngier if (!of_device_is_available(np) || 5397c733ebb7SMarc Zyngier !of_property_read_bool(np, "msi-controller") || 5398c733ebb7SMarc Zyngier of_address_to_resource(np, 0, &res)) 5399c733ebb7SMarc Zyngier continue; 5400c733ebb7SMarc Zyngier 5401c733ebb7SMarc Zyngier err = its_reset_one(&res); 5402c733ebb7SMarc Zyngier if (err) 5403c733ebb7SMarc Zyngier return err; 5404c733ebb7SMarc Zyngier } 5405c733ebb7SMarc Zyngier 54064c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 54074c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 54089585a495SMarc Zyngier struct its_node *its; 54099585a495SMarc Zyngier 541095a25625SStephen Boyd if (!of_device_is_available(np)) 541195a25625SStephen Boyd continue; 5412d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 5413e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 5414e81f54c6SRob Herring np); 5415d14ae5e6STomasz Nowicki continue; 5416d14ae5e6STomasz Nowicki } 5417d14ae5e6STomasz Nowicki 5418db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 5419e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 5420db40f0a7STomasz Nowicki continue; 54214c21f3c2SMarc Zyngier } 54224c21f3c2SMarc Zyngier 54239585a495SMarc Zyngier 54249585a495SMarc Zyngier its = its_node_init(&res, &np->fwnode, of_node_to_nid(np)); 54259585a495SMarc Zyngier if (!its) 54269585a495SMarc Zyngier return -ENOMEM; 54279585a495SMarc Zyngier 54289585a495SMarc Zyngier its_enable_quirks(its); 54299585a495SMarc Zyngier err = its_probe_one(its); 54309585a495SMarc Zyngier if (err) { 54319585a495SMarc Zyngier its_node_destroy(its); 54329585a495SMarc Zyngier return err; 54339585a495SMarc Zyngier } 5434db40f0a7STomasz Nowicki } 5435db40f0a7STomasz Nowicki return 0; 5436db40f0a7STomasz Nowicki } 5437db40f0a7STomasz Nowicki 54383f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 54393f010cf1STomasz Nowicki 54403f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 54413f010cf1STomasz Nowicki 5442d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 5443dbd2b826SGanapatrao Kulkarni struct its_srat_map { 5444dbd2b826SGanapatrao Kulkarni /* numa node id */ 5445dbd2b826SGanapatrao Kulkarni u32 numa_node; 5446dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 5447dbd2b826SGanapatrao Kulkarni u32 its_id; 5448dbd2b826SGanapatrao Kulkarni }; 5449dbd2b826SGanapatrao Kulkarni 5450fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 5451dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 5452dbd2b826SGanapatrao Kulkarni 5453dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 5454dbd2b826SGanapatrao Kulkarni { 5455dbd2b826SGanapatrao Kulkarni int i; 5456dbd2b826SGanapatrao Kulkarni 5457dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 5458dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 5459dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 5460dbd2b826SGanapatrao Kulkarni } 5461dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 5462dbd2b826SGanapatrao Kulkarni } 5463dbd2b826SGanapatrao Kulkarni 546460574d1eSKeith Busch static int __init gic_acpi_match_srat_its(union acpi_subtable_headers *header, 5465fdf6e7a8SHanjun Guo const unsigned long end) 5466fdf6e7a8SHanjun Guo { 5467fdf6e7a8SHanjun Guo return 0; 5468fdf6e7a8SHanjun Guo } 5469fdf6e7a8SHanjun Guo 547060574d1eSKeith Busch static int __init gic_acpi_parse_srat_its(union acpi_subtable_headers *header, 5471dbd2b826SGanapatrao Kulkarni const unsigned long end) 5472dbd2b826SGanapatrao Kulkarni { 5473dbd2b826SGanapatrao Kulkarni int node; 5474dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 5475dbd2b826SGanapatrao Kulkarni 5476dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 5477dbd2b826SGanapatrao Kulkarni if (!its_affinity) 5478dbd2b826SGanapatrao Kulkarni return -EINVAL; 5479dbd2b826SGanapatrao Kulkarni 5480dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 5481dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 5482dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 5483dbd2b826SGanapatrao Kulkarni return -EINVAL; 5484dbd2b826SGanapatrao Kulkarni } 5485dbd2b826SGanapatrao Kulkarni 548695ac5bf4SJonathan Cameron /* 548795ac5bf4SJonathan Cameron * Note that in theory a new proximity node could be created by this 548895ac5bf4SJonathan Cameron * entry as it is an SRAT resource allocation structure. 548995ac5bf4SJonathan Cameron * We do not currently support doing so. 549095ac5bf4SJonathan Cameron */ 549195ac5bf4SJonathan Cameron node = pxm_to_node(its_affinity->proximity_domain); 5492dbd2b826SGanapatrao Kulkarni 5493dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 5494dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 5495dbd2b826SGanapatrao Kulkarni return 0; 5496dbd2b826SGanapatrao Kulkarni } 5497dbd2b826SGanapatrao Kulkarni 5498dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 5499dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 5500dbd2b826SGanapatrao Kulkarni its_in_srat++; 5501dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 5502dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 5503dbd2b826SGanapatrao Kulkarni 5504dbd2b826SGanapatrao Kulkarni return 0; 5505dbd2b826SGanapatrao Kulkarni } 5506dbd2b826SGanapatrao Kulkarni 5507dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 5508dbd2b826SGanapatrao Kulkarni { 5509fdf6e7a8SHanjun Guo int count; 5510fdf6e7a8SHanjun Guo 5511fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 5512fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 5513fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 5514fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 5515fdf6e7a8SHanjun Guo if (count <= 0) 5516fdf6e7a8SHanjun Guo return; 5517fdf6e7a8SHanjun Guo 55186da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 5519fdf6e7a8SHanjun Guo GFP_KERNEL); 5520944a1a17SZhen Lei if (!its_srat_maps) 5521fdf6e7a8SHanjun Guo return; 5522fdf6e7a8SHanjun Guo 5523dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 5524dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 5525dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 5526dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 5527dbd2b826SGanapatrao Kulkarni } 5528fdf6e7a8SHanjun Guo 5529fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 5530fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 5531fdf6e7a8SHanjun Guo { 5532fdf6e7a8SHanjun Guo kfree(its_srat_maps); 5533fdf6e7a8SHanjun Guo } 5534dbd2b826SGanapatrao Kulkarni #else 5535dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 5536dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 5537fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 5538dbd2b826SGanapatrao Kulkarni #endif 5539dbd2b826SGanapatrao Kulkarni 554060574d1eSKeith Busch static int __init gic_acpi_parse_madt_its(union acpi_subtable_headers *header, 55413f010cf1STomasz Nowicki const unsigned long end) 55423f010cf1STomasz Nowicki { 55433f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 55443f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 55459585a495SMarc Zyngier struct its_node *its; 55463f010cf1STomasz Nowicki struct resource res; 55473f010cf1STomasz Nowicki int err; 55483f010cf1STomasz Nowicki 55493f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 55503f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 55513f010cf1STomasz Nowicki res.start = its_entry->base_address; 55523f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 55533f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 55543f010cf1STomasz Nowicki 55555778cc77SMarc Zyngier dom_handle = irq_domain_alloc_fwnode(&res.start); 55563f010cf1STomasz Nowicki if (!dom_handle) { 55573f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 55583f010cf1STomasz Nowicki &res.start); 55593f010cf1STomasz Nowicki return -ENOMEM; 55603f010cf1STomasz Nowicki } 55613f010cf1STomasz Nowicki 55628b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 55638b4282e6SShameer Kolothum dom_handle); 55643f010cf1STomasz Nowicki if (err) { 55653f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 55663f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 55673f010cf1STomasz Nowicki goto dom_err; 55683f010cf1STomasz Nowicki } 55693f010cf1STomasz Nowicki 55709585a495SMarc Zyngier its = its_node_init(&res, dom_handle, 5571dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 55729585a495SMarc Zyngier if (!its) { 55739585a495SMarc Zyngier err = -ENOMEM; 55749585a495SMarc Zyngier goto node_err; 55759585a495SMarc Zyngier } 55769585a495SMarc Zyngier 55779585a495SMarc Zyngier err = its_probe_one(its); 55783f010cf1STomasz Nowicki if (!err) 55793f010cf1STomasz Nowicki return 0; 55803f010cf1STomasz Nowicki 55819585a495SMarc Zyngier node_err: 55823f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 55833f010cf1STomasz Nowicki dom_err: 55843f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 55853f010cf1STomasz Nowicki return err; 55863f010cf1STomasz Nowicki } 55873f010cf1STomasz Nowicki 5588c733ebb7SMarc Zyngier static int __init its_acpi_reset(union acpi_subtable_headers *header, 5589c733ebb7SMarc Zyngier const unsigned long end) 5590c733ebb7SMarc Zyngier { 5591c733ebb7SMarc Zyngier struct acpi_madt_generic_translator *its_entry; 5592c733ebb7SMarc Zyngier struct resource res; 5593c733ebb7SMarc Zyngier 5594c733ebb7SMarc Zyngier its_entry = (struct acpi_madt_generic_translator *)header; 5595c733ebb7SMarc Zyngier res = (struct resource) { 5596c733ebb7SMarc Zyngier .start = its_entry->base_address, 5597c733ebb7SMarc Zyngier .end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1, 5598c733ebb7SMarc Zyngier .flags = IORESOURCE_MEM, 5599c733ebb7SMarc Zyngier }; 5600c733ebb7SMarc Zyngier 5601c733ebb7SMarc Zyngier return its_reset_one(&res); 5602c733ebb7SMarc Zyngier } 5603c733ebb7SMarc Zyngier 56043f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 56053f010cf1STomasz Nowicki { 5606dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 5607c733ebb7SMarc Zyngier /* 5608c733ebb7SMarc Zyngier * Make sure *all* the ITS are reset before we probe any, as 5609c733ebb7SMarc Zyngier * they may be sharing memory. If any of the ITS fails to 5610c733ebb7SMarc Zyngier * reset, don't even try to go any further, as this could 5611c733ebb7SMarc Zyngier * result in something even worse. 5612c733ebb7SMarc Zyngier */ 5613c733ebb7SMarc Zyngier if (acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 5614c733ebb7SMarc Zyngier its_acpi_reset, 0) > 0) 56153f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 56163f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 5617fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 56183f010cf1STomasz Nowicki } 56193f010cf1STomasz Nowicki #else 56203f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 56213f010cf1STomasz Nowicki #endif 56223f010cf1STomasz Nowicki 5623d23bc2bcSValentin Schneider int __init its_lpi_memreserve_init(void) 5624d23bc2bcSValentin Schneider { 5625d23bc2bcSValentin Schneider int state; 5626d23bc2bcSValentin Schneider 5627d23bc2bcSValentin Schneider if (!efi_enabled(EFI_CONFIG_TABLES)) 5628d23bc2bcSValentin Schneider return 0; 5629d23bc2bcSValentin Schneider 5630eba1e44bSMarc Zyngier if (list_empty(&its_nodes)) 5631eba1e44bSMarc Zyngier return 0; 5632eba1e44bSMarc Zyngier 5633835f442fSValentin Schneider gic_rdists->cpuhp_memreserve_state = CPUHP_INVALID; 5634d23bc2bcSValentin Schneider state = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, 5635d23bc2bcSValentin Schneider "irqchip/arm/gicv3/memreserve:online", 5636d23bc2bcSValentin Schneider its_cpu_memreserve_lpi, 5637d23bc2bcSValentin Schneider NULL); 5638d23bc2bcSValentin Schneider if (state < 0) 5639d23bc2bcSValentin Schneider return state; 5640d23bc2bcSValentin Schneider 5641835f442fSValentin Schneider gic_rdists->cpuhp_memreserve_state = state; 5642835f442fSValentin Schneider 5643d23bc2bcSValentin Schneider return 0; 5644d23bc2bcSValentin Schneider } 5645d23bc2bcSValentin Schneider 5646db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 5647db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 5648db40f0a7STomasz Nowicki { 5649db40f0a7STomasz Nowicki struct device_node *of_node; 56508fff27aeSMarc Zyngier struct its_node *its; 56518fff27aeSMarc Zyngier bool has_v4 = false; 56523c40706dSMarc Zyngier bool has_v4_1 = false; 56538fff27aeSMarc Zyngier int err; 5654db40f0a7STomasz Nowicki 56555e516846SMarc Zyngier gic_rdists = rdists; 56565e516846SMarc Zyngier 5657db40f0a7STomasz Nowicki its_parent = parent_domain; 5658db40f0a7STomasz Nowicki of_node = to_of_node(handle); 5659db40f0a7STomasz Nowicki if (of_node) 5660db40f0a7STomasz Nowicki its_of_probe(of_node); 5661db40f0a7STomasz Nowicki else 56623f010cf1STomasz Nowicki its_acpi_probe(); 5663db40f0a7STomasz Nowicki 56644c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 56654c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 56664c21f3c2SMarc Zyngier return -ENXIO; 56674c21f3c2SMarc Zyngier } 56684c21f3c2SMarc Zyngier 566911e37d35SMarc Zyngier err = allocate_lpi_tables(); 56708fff27aeSMarc Zyngier if (err) 56718fff27aeSMarc Zyngier return err; 56728fff27aeSMarc Zyngier 56733c40706dSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 56740dd57fedSMarc Zyngier has_v4 |= is_v4(its); 56753c40706dSMarc Zyngier has_v4_1 |= is_v4_1(its); 56763c40706dSMarc Zyngier } 56773c40706dSMarc Zyngier 56783c40706dSMarc Zyngier /* Don't bother with inconsistent systems */ 56793c40706dSMarc Zyngier if (WARN_ON(!has_v4_1 && rdists->has_rvpeid)) 56803c40706dSMarc Zyngier rdists->has_rvpeid = false; 56818fff27aeSMarc Zyngier 56828fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 5683166cba71SMarc Zyngier const struct irq_domain_ops *sgi_ops; 5684166cba71SMarc Zyngier 5685166cba71SMarc Zyngier if (has_v4_1) 5686166cba71SMarc Zyngier sgi_ops = &its_sgi_domain_ops; 5687166cba71SMarc Zyngier else 5688166cba71SMarc Zyngier sgi_ops = NULL; 5689166cba71SMarc Zyngier 56903d63cb53SMarc Zyngier if (its_init_vpe_domain() || 5691166cba71SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops, sgi_ops)) { 56928fff27aeSMarc Zyngier rdists->has_vlpis = false; 56938fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 56948fff27aeSMarc Zyngier } 56958fff27aeSMarc Zyngier } 56968fff27aeSMarc Zyngier 5697dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 5698dba0bc7bSDerek Basehore 56998fff27aeSMarc Zyngier return 0; 57004c21f3c2SMarc Zyngier } 5701