1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2cc2d3216SMarc Zyngier /* 3d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 4cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 5cc2d3216SMarc Zyngier */ 6cc2d3216SMarc Zyngier 73f010cf1STomasz Nowicki #include <linux/acpi.h> 88d3554b8SHanjun Guo #include <linux/acpi_iort.h> 9ffedbf0cSMarc Zyngier #include <linux/bitfield.h> 10cc2d3216SMarc Zyngier #include <linux/bitmap.h> 11cc2d3216SMarc Zyngier #include <linux/cpu.h> 12c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 13cc2d3216SMarc Zyngier #include <linux/delay.h> 1444bb7e24SRobin Murphy #include <linux/dma-iommu.h> 153fb68faeSMarc Zyngier #include <linux/efi.h> 16cc2d3216SMarc Zyngier #include <linux/interrupt.h> 173f010cf1STomasz Nowicki #include <linux/irqdomain.h> 18880cb3cdSMarc Zyngier #include <linux/list.h> 19cc2d3216SMarc Zyngier #include <linux/log2.h> 205e2c9f9aSMarc Zyngier #include <linux/memblock.h> 21cc2d3216SMarc Zyngier #include <linux/mm.h> 22cc2d3216SMarc Zyngier #include <linux/msi.h> 23cc2d3216SMarc Zyngier #include <linux/of.h> 24cc2d3216SMarc Zyngier #include <linux/of_address.h> 25cc2d3216SMarc Zyngier #include <linux/of_irq.h> 26cc2d3216SMarc Zyngier #include <linux/of_pci.h> 27cc2d3216SMarc Zyngier #include <linux/of_platform.h> 28cc2d3216SMarc Zyngier #include <linux/percpu.h> 29cc2d3216SMarc Zyngier #include <linux/slab.h> 30dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 31cc2d3216SMarc Zyngier 3241a83e06SJoel Porquet #include <linux/irqchip.h> 33cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 34c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 35cc2d3216SMarc Zyngier 36cc2d3216SMarc Zyngier #include <asm/cputype.h> 37cc2d3216SMarc Zyngier #include <asm/exception.h> 38cc2d3216SMarc Zyngier 3967510ccaSRobert Richter #include "irq-gic-common.h" 4067510ccaSRobert Richter 4194100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4294100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 43fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 44dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 45cc2d3216SMarc Zyngier 46c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 47c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 48c48ed51cSMarc Zyngier 49a13b0404SMarc Zyngier static u32 lpi_id_bits; 50a13b0404SMarc Zyngier 51a13b0404SMarc Zyngier /* 52a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 53a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 54a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 55a13b0404SMarc Zyngier */ 56a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 57a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 58a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 59a13b0404SMarc Zyngier 602130b789SJulien Thierry #define LPI_PROP_DEFAULT_PRIO GICD_INT_DEF_PRI 61a13b0404SMarc Zyngier 62cc2d3216SMarc Zyngier /* 63cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 64cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 65cc2d3216SMarc Zyngier * CPU. 66cc2d3216SMarc Zyngier */ 67cc2d3216SMarc Zyngier struct its_collection { 68cc2d3216SMarc Zyngier u64 target_address; 69cc2d3216SMarc Zyngier u16 col_id; 70cc2d3216SMarc Zyngier }; 71cc2d3216SMarc Zyngier 72cc2d3216SMarc Zyngier /* 739347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 749347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 75466b7d16SShanker Donthineni */ 76466b7d16SShanker Donthineni struct its_baser { 77466b7d16SShanker Donthineni void *base; 78466b7d16SShanker Donthineni u64 val; 79466b7d16SShanker Donthineni u32 order; 809347359aSShanker Donthineni u32 psz; 81466b7d16SShanker Donthineni }; 82466b7d16SShanker Donthineni 83558b0165SArd Biesheuvel struct its_device; 84558b0165SArd Biesheuvel 85466b7d16SShanker Donthineni /* 86cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 87841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 88841514abSMarc Zyngier * list of devices writing to it. 899791ec7dSMarc Zyngier * 909791ec7dSMarc Zyngier * dev_alloc_lock has to be taken for device allocations, while the 919791ec7dSMarc Zyngier * spinlock must be taken to parse data structures such as the device 929791ec7dSMarc Zyngier * list. 93cc2d3216SMarc Zyngier */ 94cc2d3216SMarc Zyngier struct its_node { 95cc2d3216SMarc Zyngier raw_spinlock_t lock; 969791ec7dSMarc Zyngier struct mutex dev_alloc_lock; 97cc2d3216SMarc Zyngier struct list_head entry; 98cc2d3216SMarc Zyngier void __iomem *base; 99db40f0a7STomasz Nowicki phys_addr_t phys_base; 100cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 101cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 102466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 103cc2d3216SMarc Zyngier struct its_collection *collections; 104558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 105558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 1060dd57fedSMarc Zyngier u64 typer; 107dba0bc7bSDerek Basehore u64 cbaser_save; 108dba0bc7bSDerek Basehore u32 ctlr_save; 1095e516846SMarc Zyngier u32 mpidr; 110cc2d3216SMarc Zyngier struct list_head its_device_list; 111cc2d3216SMarc Zyngier u64 flags; 112debf6d02SMarc Zyngier unsigned long list_nr; 113fbf8f40eSGanapatrao Kulkarni int numa_node; 114558b0165SArd Biesheuvel unsigned int msi_domain_flags; 115558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1165c9a882eSMarc Zyngier int vlpi_redist_offset; 117cc2d3216SMarc Zyngier }; 118cc2d3216SMarc Zyngier 1190dd57fedSMarc Zyngier #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) 1205e516846SMarc Zyngier #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) 121576a8342SMarc Zyngier #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) 1220dd57fedSMarc Zyngier 123cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 124cc2d3216SMarc Zyngier 12532bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 126f2d83409SMarc Zyngier #define ITS_MAX_VPEID_BITS \ 127f2d83409SMarc Zyngier ({ \ 128f2d83409SMarc Zyngier int nvpeid = 16; \ 129f2d83409SMarc Zyngier if (gic_rdists->has_rvpeid && \ 130f2d83409SMarc Zyngier gic_rdists->gicd_typer2 & GICD_TYPER2_VIL) \ 131f2d83409SMarc Zyngier nvpeid = 1 + (gic_rdists->gicd_typer2 & \ 132f2d83409SMarc Zyngier GICD_TYPER2_VID); \ 133f2d83409SMarc Zyngier \ 134f2d83409SMarc Zyngier nvpeid; \ 135f2d83409SMarc Zyngier }) 13632bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 13732bd44dcSShanker Donthineni 1382eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1392eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1402eca0d6cSShanker Donthineni 141591e5becSMarc Zyngier struct event_lpi_map { 142591e5becSMarc Zyngier unsigned long *lpi_map; 143591e5becSMarc Zyngier u16 *col_map; 144591e5becSMarc Zyngier irq_hw_number_t lpi_base; 145591e5becSMarc Zyngier int nr_lpis; 14611635fa2SMarc Zyngier raw_spinlock_t vlpi_lock; 147d011e4e6SMarc Zyngier struct its_vm *vm; 148d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 149d011e4e6SMarc Zyngier int nr_vlpis; 150591e5becSMarc Zyngier }; 151591e5becSMarc Zyngier 152cc2d3216SMarc Zyngier /* 153d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 154d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 155d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 156d011e4e6SMarc Zyngier * indicates which one. 157cc2d3216SMarc Zyngier */ 158cc2d3216SMarc Zyngier struct its_device { 159cc2d3216SMarc Zyngier struct list_head entry; 160cc2d3216SMarc Zyngier struct its_node *its; 161591e5becSMarc Zyngier struct event_lpi_map event_map; 162cc2d3216SMarc Zyngier void *itt; 163cc2d3216SMarc Zyngier u32 nr_ites; 164cc2d3216SMarc Zyngier u32 device_id; 1659791ec7dSMarc Zyngier bool shared; 166cc2d3216SMarc Zyngier }; 167cc2d3216SMarc Zyngier 16820b3d54eSMarc Zyngier static struct { 16920b3d54eSMarc Zyngier raw_spinlock_t lock; 17020b3d54eSMarc Zyngier struct its_device *dev; 17120b3d54eSMarc Zyngier struct its_vpe **vpes; 17220b3d54eSMarc Zyngier int next_victim; 17320b3d54eSMarc Zyngier } vpe_proxy; 17420b3d54eSMarc Zyngier 1751ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 176a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1771ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 178db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1791ac19ca6SMarc Zyngier 1803dfa576bSMarc Zyngier static unsigned long its_list_map; 1813171a47aSMarc Zyngier static u16 vmovp_seq_num; 1823171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1833171a47aSMarc Zyngier 1847d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1853dfa576bSMarc Zyngier 1861ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 18711e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1881ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 189e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1901ac19ca6SMarc Zyngier 19184243125SZenghui Yu static u16 get_its_list(struct its_vm *vm) 19284243125SZenghui Yu { 19384243125SZenghui Yu struct its_node *its; 19484243125SZenghui Yu unsigned long its_list = 0; 19584243125SZenghui Yu 19684243125SZenghui Yu list_for_each_entry(its, &its_nodes, entry) { 1970dd57fedSMarc Zyngier if (!is_v4(its)) 19884243125SZenghui Yu continue; 19984243125SZenghui Yu 20084243125SZenghui Yu if (vm->vlpi_count[its->list_nr]) 20184243125SZenghui Yu __set_bit(its->list_nr, &its_list); 20284243125SZenghui Yu } 20384243125SZenghui Yu 20484243125SZenghui Yu return (u16)its_list; 20584243125SZenghui Yu } 20684243125SZenghui Yu 207425c09beSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 208425c09beSMarc Zyngier { 209425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 210425c09beSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 211425c09beSMarc Zyngier } 212425c09beSMarc Zyngier 213591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 214591e5becSMarc Zyngier u32 event) 215591e5becSMarc Zyngier { 216591e5becSMarc Zyngier struct its_node *its = its_dev->its; 217591e5becSMarc Zyngier 218591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 219591e5becSMarc Zyngier } 220591e5becSMarc Zyngier 221c1d4d5cdSMarc Zyngier static struct its_vlpi_map *dev_event_to_vlpi_map(struct its_device *its_dev, 222c1d4d5cdSMarc Zyngier u32 event) 223c1d4d5cdSMarc Zyngier { 224c1d4d5cdSMarc Zyngier if (WARN_ON_ONCE(event >= its_dev->event_map.nr_lpis)) 225c1d4d5cdSMarc Zyngier return NULL; 226c1d4d5cdSMarc Zyngier 227c1d4d5cdSMarc Zyngier return &its_dev->event_map.vlpi_maps[event]; 228c1d4d5cdSMarc Zyngier } 229c1d4d5cdSMarc Zyngier 230425c09beSMarc Zyngier static struct its_collection *irq_to_col(struct irq_data *d) 231425c09beSMarc Zyngier { 232425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 233425c09beSMarc Zyngier 234425c09beSMarc Zyngier return dev_event_to_col(its_dev, its_get_event_id(d)); 235425c09beSMarc Zyngier } 236425c09beSMarc Zyngier 23783559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 23883559b47SMarc Zyngier { 23920faba84SJoe Perches if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(15, 0))) 24083559b47SMarc Zyngier return NULL; 24183559b47SMarc Zyngier 24283559b47SMarc Zyngier return col; 24383559b47SMarc Zyngier } 24483559b47SMarc Zyngier 245205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 246205e065dSMarc Zyngier { 247205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 248205e065dSMarc Zyngier return vpe; 249205e065dSMarc Zyngier 250205e065dSMarc Zyngier return NULL; 251205e065dSMarc Zyngier } 252205e065dSMarc Zyngier 253cc2d3216SMarc Zyngier /* 254cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 255cc2d3216SMarc Zyngier * block. 256cc2d3216SMarc Zyngier */ 257cc2d3216SMarc Zyngier struct its_cmd_desc { 258cc2d3216SMarc Zyngier union { 259cc2d3216SMarc Zyngier struct { 260cc2d3216SMarc Zyngier struct its_device *dev; 261cc2d3216SMarc Zyngier u32 event_id; 262cc2d3216SMarc Zyngier } its_inv_cmd; 263cc2d3216SMarc Zyngier 264cc2d3216SMarc Zyngier struct { 265cc2d3216SMarc Zyngier struct its_device *dev; 266cc2d3216SMarc Zyngier u32 event_id; 2678d85dcedSMarc Zyngier } its_clear_cmd; 2688d85dcedSMarc Zyngier 2698d85dcedSMarc Zyngier struct { 2708d85dcedSMarc Zyngier struct its_device *dev; 2718d85dcedSMarc Zyngier u32 event_id; 272cc2d3216SMarc Zyngier } its_int_cmd; 273cc2d3216SMarc Zyngier 274cc2d3216SMarc Zyngier struct { 275cc2d3216SMarc Zyngier struct its_device *dev; 276cc2d3216SMarc Zyngier int valid; 277cc2d3216SMarc Zyngier } its_mapd_cmd; 278cc2d3216SMarc Zyngier 279cc2d3216SMarc Zyngier struct { 280cc2d3216SMarc Zyngier struct its_collection *col; 281cc2d3216SMarc Zyngier int valid; 282cc2d3216SMarc Zyngier } its_mapc_cmd; 283cc2d3216SMarc Zyngier 284cc2d3216SMarc Zyngier struct { 285cc2d3216SMarc Zyngier struct its_device *dev; 286cc2d3216SMarc Zyngier u32 phys_id; 287cc2d3216SMarc Zyngier u32 event_id; 2886a25ad3aSMarc Zyngier } its_mapti_cmd; 289cc2d3216SMarc Zyngier 290cc2d3216SMarc Zyngier struct { 291cc2d3216SMarc Zyngier struct its_device *dev; 292cc2d3216SMarc Zyngier struct its_collection *col; 293591e5becSMarc Zyngier u32 event_id; 294cc2d3216SMarc Zyngier } its_movi_cmd; 295cc2d3216SMarc Zyngier 296cc2d3216SMarc Zyngier struct { 297cc2d3216SMarc Zyngier struct its_device *dev; 298cc2d3216SMarc Zyngier u32 event_id; 299cc2d3216SMarc Zyngier } its_discard_cmd; 300cc2d3216SMarc Zyngier 301cc2d3216SMarc Zyngier struct { 302cc2d3216SMarc Zyngier struct its_collection *col; 303cc2d3216SMarc Zyngier } its_invall_cmd; 304d011e4e6SMarc Zyngier 305d011e4e6SMarc Zyngier struct { 306d011e4e6SMarc Zyngier struct its_vpe *vpe; 307eb78192bSMarc Zyngier } its_vinvall_cmd; 308eb78192bSMarc Zyngier 309eb78192bSMarc Zyngier struct { 310eb78192bSMarc Zyngier struct its_vpe *vpe; 311eb78192bSMarc Zyngier struct its_collection *col; 312eb78192bSMarc Zyngier bool valid; 313eb78192bSMarc Zyngier } its_vmapp_cmd; 314eb78192bSMarc Zyngier 315eb78192bSMarc Zyngier struct { 316eb78192bSMarc Zyngier struct its_vpe *vpe; 317d011e4e6SMarc Zyngier struct its_device *dev; 318d011e4e6SMarc Zyngier u32 virt_id; 319d011e4e6SMarc Zyngier u32 event_id; 320d011e4e6SMarc Zyngier bool db_enabled; 321d011e4e6SMarc Zyngier } its_vmapti_cmd; 322d011e4e6SMarc Zyngier 323d011e4e6SMarc Zyngier struct { 324d011e4e6SMarc Zyngier struct its_vpe *vpe; 325d011e4e6SMarc Zyngier struct its_device *dev; 326d011e4e6SMarc Zyngier u32 event_id; 327d011e4e6SMarc Zyngier bool db_enabled; 328d011e4e6SMarc Zyngier } its_vmovi_cmd; 3293171a47aSMarc Zyngier 3303171a47aSMarc Zyngier struct { 3313171a47aSMarc Zyngier struct its_vpe *vpe; 3323171a47aSMarc Zyngier struct its_collection *col; 3333171a47aSMarc Zyngier u16 seq_num; 3343171a47aSMarc Zyngier u16 its_list; 3353171a47aSMarc Zyngier } its_vmovp_cmd; 336d97c97baSMarc Zyngier 337d97c97baSMarc Zyngier struct { 338d97c97baSMarc Zyngier struct its_vpe *vpe; 339d97c97baSMarc Zyngier } its_invdb_cmd; 340cc2d3216SMarc Zyngier }; 341cc2d3216SMarc Zyngier }; 342cc2d3216SMarc Zyngier 343cc2d3216SMarc Zyngier /* 344cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 345cc2d3216SMarc Zyngier */ 346cc2d3216SMarc Zyngier struct its_cmd_block { 3472bbdfcc5SBen Dooks (Codethink) union { 348cc2d3216SMarc Zyngier u64 raw_cmd[4]; 3492bbdfcc5SBen Dooks (Codethink) __le64 raw_cmd_le[4]; 3502bbdfcc5SBen Dooks (Codethink) }; 351cc2d3216SMarc Zyngier }; 352cc2d3216SMarc Zyngier 353cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 354cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 355cc2d3216SMarc Zyngier 35667047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 35767047f90SMarc Zyngier struct its_cmd_block *, 358cc2d3216SMarc Zyngier struct its_cmd_desc *); 359cc2d3216SMarc Zyngier 36067047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 36167047f90SMarc Zyngier struct its_cmd_block *, 362d011e4e6SMarc Zyngier struct its_cmd_desc *); 363d011e4e6SMarc Zyngier 3644d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 3654d36f136SMarc Zyngier { 3664d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 3674d36f136SMarc Zyngier *raw_cmd &= ~mask; 3684d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 3694d36f136SMarc Zyngier } 3704d36f136SMarc Zyngier 371cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 372cc2d3216SMarc Zyngier { 3734d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 374cc2d3216SMarc Zyngier } 375cc2d3216SMarc Zyngier 376cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 377cc2d3216SMarc Zyngier { 3784d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 379cc2d3216SMarc Zyngier } 380cc2d3216SMarc Zyngier 381cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 382cc2d3216SMarc Zyngier { 3834d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 384cc2d3216SMarc Zyngier } 385cc2d3216SMarc Zyngier 386cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 387cc2d3216SMarc Zyngier { 3884d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 389cc2d3216SMarc Zyngier } 390cc2d3216SMarc Zyngier 391cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 392cc2d3216SMarc Zyngier { 3934d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 394cc2d3216SMarc Zyngier } 395cc2d3216SMarc Zyngier 396cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 397cc2d3216SMarc Zyngier { 39830ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 399cc2d3216SMarc Zyngier } 400cc2d3216SMarc Zyngier 401cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 402cc2d3216SMarc Zyngier { 4034d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 404cc2d3216SMarc Zyngier } 405cc2d3216SMarc Zyngier 406cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 407cc2d3216SMarc Zyngier { 40830ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 409cc2d3216SMarc Zyngier } 410cc2d3216SMarc Zyngier 411cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 412cc2d3216SMarc Zyngier { 4134d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 414cc2d3216SMarc Zyngier } 415cc2d3216SMarc Zyngier 416d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 417d011e4e6SMarc Zyngier { 418d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 419d011e4e6SMarc Zyngier } 420d011e4e6SMarc Zyngier 421d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 422d011e4e6SMarc Zyngier { 423d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 424d011e4e6SMarc Zyngier } 425d011e4e6SMarc Zyngier 426d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 427d011e4e6SMarc Zyngier { 428d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 429d011e4e6SMarc Zyngier } 430d011e4e6SMarc Zyngier 431d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 432d011e4e6SMarc Zyngier { 433d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 434d011e4e6SMarc Zyngier } 435d011e4e6SMarc Zyngier 4363171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 4373171a47aSMarc Zyngier { 4383171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 4393171a47aSMarc Zyngier } 4403171a47aSMarc Zyngier 4413171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 4423171a47aSMarc Zyngier { 4433171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 4443171a47aSMarc Zyngier } 4453171a47aSMarc Zyngier 446eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 447eb78192bSMarc Zyngier { 44830ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 449eb78192bSMarc Zyngier } 450eb78192bSMarc Zyngier 451eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 452eb78192bSMarc Zyngier { 453eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 454eb78192bSMarc Zyngier } 455eb78192bSMarc Zyngier 45664edfaa9SMarc Zyngier static void its_encode_vconf_addr(struct its_cmd_block *cmd, u64 vconf_pa) 45764edfaa9SMarc Zyngier { 45864edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], vconf_pa >> 16, 51, 16); 45964edfaa9SMarc Zyngier } 46064edfaa9SMarc Zyngier 46164edfaa9SMarc Zyngier static void its_encode_alloc(struct its_cmd_block *cmd, bool alloc) 46264edfaa9SMarc Zyngier { 46364edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], alloc, 8, 8); 46464edfaa9SMarc Zyngier } 46564edfaa9SMarc Zyngier 46664edfaa9SMarc Zyngier static void its_encode_ptz(struct its_cmd_block *cmd, bool ptz) 46764edfaa9SMarc Zyngier { 46864edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], ptz, 9, 9); 46964edfaa9SMarc Zyngier } 47064edfaa9SMarc Zyngier 47164edfaa9SMarc Zyngier static void its_encode_vmapp_default_db(struct its_cmd_block *cmd, 47264edfaa9SMarc Zyngier u32 vpe_db_lpi) 47364edfaa9SMarc Zyngier { 47464edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpe_db_lpi, 31, 0); 47564edfaa9SMarc Zyngier } 47664edfaa9SMarc Zyngier 477dd3f050aSMarc Zyngier static void its_encode_vmovp_default_db(struct its_cmd_block *cmd, 478dd3f050aSMarc Zyngier u32 vpe_db_lpi) 479dd3f050aSMarc Zyngier { 480dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpe_db_lpi, 31, 0); 481dd3f050aSMarc Zyngier } 482dd3f050aSMarc Zyngier 483dd3f050aSMarc Zyngier static void its_encode_db(struct its_cmd_block *cmd, bool db) 484dd3f050aSMarc Zyngier { 485dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db, 63, 63); 486dd3f050aSMarc Zyngier } 487dd3f050aSMarc Zyngier 488cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 489cc2d3216SMarc Zyngier { 490cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 4912bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[0] = cpu_to_le64(cmd->raw_cmd[0]); 4922bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[1] = cpu_to_le64(cmd->raw_cmd[1]); 4932bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[2] = cpu_to_le64(cmd->raw_cmd[2]); 4942bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[3] = cpu_to_le64(cmd->raw_cmd[3]); 495cc2d3216SMarc Zyngier } 496cc2d3216SMarc Zyngier 49767047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 49867047f90SMarc Zyngier struct its_cmd_block *cmd, 499cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 500cc2d3216SMarc Zyngier { 501cc2d3216SMarc Zyngier unsigned long itt_addr; 502c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 503cc2d3216SMarc Zyngier 504cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 505cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 506cc2d3216SMarc Zyngier 507cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 508cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 509cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 510cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 511cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 512cc2d3216SMarc Zyngier 513cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 514cc2d3216SMarc Zyngier 515591e5becSMarc Zyngier return NULL; 516cc2d3216SMarc Zyngier } 517cc2d3216SMarc Zyngier 51867047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 51967047f90SMarc Zyngier struct its_cmd_block *cmd, 520cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 521cc2d3216SMarc Zyngier { 522cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 523cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 524cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 525cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 526cc2d3216SMarc Zyngier 527cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 528cc2d3216SMarc Zyngier 529cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 530cc2d3216SMarc Zyngier } 531cc2d3216SMarc Zyngier 53267047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 53367047f90SMarc Zyngier struct its_cmd_block *cmd, 534cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 535cc2d3216SMarc Zyngier { 536591e5becSMarc Zyngier struct its_collection *col; 537591e5becSMarc Zyngier 5386a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 5396a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 540591e5becSMarc Zyngier 5416a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 5426a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 5436a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 5446a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 545591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 546cc2d3216SMarc Zyngier 547cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 548cc2d3216SMarc Zyngier 54983559b47SMarc Zyngier return valid_col(col); 550cc2d3216SMarc Zyngier } 551cc2d3216SMarc Zyngier 55267047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 55367047f90SMarc Zyngier struct its_cmd_block *cmd, 554cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 555cc2d3216SMarc Zyngier { 556591e5becSMarc Zyngier struct its_collection *col; 557591e5becSMarc Zyngier 558591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 559591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 560591e5becSMarc Zyngier 561cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 562cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 563591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 564cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 565cc2d3216SMarc Zyngier 566cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 567cc2d3216SMarc Zyngier 56883559b47SMarc Zyngier return valid_col(col); 569cc2d3216SMarc Zyngier } 570cc2d3216SMarc Zyngier 57167047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 57267047f90SMarc Zyngier struct its_cmd_block *cmd, 573cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 574cc2d3216SMarc Zyngier { 575591e5becSMarc Zyngier struct its_collection *col; 576591e5becSMarc Zyngier 577591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 578591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 579591e5becSMarc Zyngier 580cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 581cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 582cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 583cc2d3216SMarc Zyngier 584cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 585cc2d3216SMarc Zyngier 58683559b47SMarc Zyngier return valid_col(col); 587cc2d3216SMarc Zyngier } 588cc2d3216SMarc Zyngier 58967047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 59067047f90SMarc Zyngier struct its_cmd_block *cmd, 591cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 592cc2d3216SMarc Zyngier { 593591e5becSMarc Zyngier struct its_collection *col; 594591e5becSMarc Zyngier 595591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 596591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 597591e5becSMarc Zyngier 598cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 599cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 600cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 601cc2d3216SMarc Zyngier 602cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 603cc2d3216SMarc Zyngier 60483559b47SMarc Zyngier return valid_col(col); 605cc2d3216SMarc Zyngier } 606cc2d3216SMarc Zyngier 60767047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 60867047f90SMarc Zyngier struct its_cmd_block *cmd, 6098d85dcedSMarc Zyngier struct its_cmd_desc *desc) 6108d85dcedSMarc Zyngier { 6118d85dcedSMarc Zyngier struct its_collection *col; 6128d85dcedSMarc Zyngier 6138d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 6148d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 6158d85dcedSMarc Zyngier 6168d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 6178d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 6188d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 6198d85dcedSMarc Zyngier 6208d85dcedSMarc Zyngier its_fixup_cmd(cmd); 6218d85dcedSMarc Zyngier 62283559b47SMarc Zyngier return valid_col(col); 6238d85dcedSMarc Zyngier } 6248d85dcedSMarc Zyngier 62567047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 62667047f90SMarc Zyngier struct its_cmd_block *cmd, 6278d85dcedSMarc Zyngier struct its_cmd_desc *desc) 6288d85dcedSMarc Zyngier { 6298d85dcedSMarc Zyngier struct its_collection *col; 6308d85dcedSMarc Zyngier 6318d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 6328d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 6338d85dcedSMarc Zyngier 6348d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 6358d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 6368d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 6378d85dcedSMarc Zyngier 6388d85dcedSMarc Zyngier its_fixup_cmd(cmd); 6398d85dcedSMarc Zyngier 64083559b47SMarc Zyngier return valid_col(col); 6418d85dcedSMarc Zyngier } 6428d85dcedSMarc Zyngier 64367047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 64467047f90SMarc Zyngier struct its_cmd_block *cmd, 645cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 646cc2d3216SMarc Zyngier { 647cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 648cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 649cc2d3216SMarc Zyngier 650cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 651cc2d3216SMarc Zyngier 652cc2d3216SMarc Zyngier return NULL; 653cc2d3216SMarc Zyngier } 654cc2d3216SMarc Zyngier 65567047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 65667047f90SMarc Zyngier struct its_cmd_block *cmd, 657eb78192bSMarc Zyngier struct its_cmd_desc *desc) 658eb78192bSMarc Zyngier { 659eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 660eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 661eb78192bSMarc Zyngier 662eb78192bSMarc Zyngier its_fixup_cmd(cmd); 663eb78192bSMarc Zyngier 664205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 665eb78192bSMarc Zyngier } 666eb78192bSMarc Zyngier 66767047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 66867047f90SMarc Zyngier struct its_cmd_block *cmd, 669eb78192bSMarc Zyngier struct its_cmd_desc *desc) 670eb78192bSMarc Zyngier { 67164edfaa9SMarc Zyngier unsigned long vpt_addr, vconf_addr; 6725c9a882eSMarc Zyngier u64 target; 67364edfaa9SMarc Zyngier bool alloc; 674eb78192bSMarc Zyngier 675eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 676eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 677eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 67864edfaa9SMarc Zyngier 67964edfaa9SMarc Zyngier if (!desc->its_vmapp_cmd.valid) { 68064edfaa9SMarc Zyngier if (is_v4_1(its)) { 68164edfaa9SMarc Zyngier alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count); 68264edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 68364edfaa9SMarc Zyngier } 68464edfaa9SMarc Zyngier 68564edfaa9SMarc Zyngier goto out; 68664edfaa9SMarc Zyngier } 68764edfaa9SMarc Zyngier 68864edfaa9SMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 68964edfaa9SMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 69064edfaa9SMarc Zyngier 6915c9a882eSMarc Zyngier its_encode_target(cmd, target); 692eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 693eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 694eb78192bSMarc Zyngier 69564edfaa9SMarc Zyngier if (!is_v4_1(its)) 69664edfaa9SMarc Zyngier goto out; 69764edfaa9SMarc Zyngier 69864edfaa9SMarc Zyngier vconf_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->its_vm->vprop_page)); 69964edfaa9SMarc Zyngier 70064edfaa9SMarc Zyngier alloc = !atomic_fetch_inc(&desc->its_vmapp_cmd.vpe->vmapp_count); 70164edfaa9SMarc Zyngier 70264edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 70364edfaa9SMarc Zyngier 70464edfaa9SMarc Zyngier /* We can only signal PTZ when alloc==1. Why do we have two bits? */ 70564edfaa9SMarc Zyngier its_encode_ptz(cmd, alloc); 70664edfaa9SMarc Zyngier its_encode_vconf_addr(cmd, vconf_addr); 70764edfaa9SMarc Zyngier its_encode_vmapp_default_db(cmd, desc->its_vmapp_cmd.vpe->vpe_db_lpi); 70864edfaa9SMarc Zyngier 70964edfaa9SMarc Zyngier out: 710eb78192bSMarc Zyngier its_fixup_cmd(cmd); 711eb78192bSMarc Zyngier 712205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 713eb78192bSMarc Zyngier } 714eb78192bSMarc Zyngier 71567047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 71667047f90SMarc Zyngier struct its_cmd_block *cmd, 717d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 718d011e4e6SMarc Zyngier { 719d011e4e6SMarc Zyngier u32 db; 720d011e4e6SMarc Zyngier 721d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 722d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 723d011e4e6SMarc Zyngier else 724d011e4e6SMarc Zyngier db = 1023; 725d011e4e6SMarc Zyngier 726d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 727d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 728d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 729d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 730d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 731d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 732d011e4e6SMarc Zyngier 733d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 734d011e4e6SMarc Zyngier 735205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 736d011e4e6SMarc Zyngier } 737d011e4e6SMarc Zyngier 73867047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 73967047f90SMarc Zyngier struct its_cmd_block *cmd, 740d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 741d011e4e6SMarc Zyngier { 742d011e4e6SMarc Zyngier u32 db; 743d011e4e6SMarc Zyngier 744d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 745d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 746d011e4e6SMarc Zyngier else 747d011e4e6SMarc Zyngier db = 1023; 748d011e4e6SMarc Zyngier 749d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 750d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 751d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 752d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 753d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 754d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 755d011e4e6SMarc Zyngier 756d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 757d011e4e6SMarc Zyngier 758205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 759d011e4e6SMarc Zyngier } 760d011e4e6SMarc Zyngier 76167047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 76267047f90SMarc Zyngier struct its_cmd_block *cmd, 7633171a47aSMarc Zyngier struct its_cmd_desc *desc) 7643171a47aSMarc Zyngier { 7655c9a882eSMarc Zyngier u64 target; 7665c9a882eSMarc Zyngier 7675c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 7683171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 7693171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 7703171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 7713171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 7725c9a882eSMarc Zyngier its_encode_target(cmd, target); 7733171a47aSMarc Zyngier 774dd3f050aSMarc Zyngier if (is_v4_1(its)) { 775dd3f050aSMarc Zyngier its_encode_db(cmd, true); 776dd3f050aSMarc Zyngier its_encode_vmovp_default_db(cmd, desc->its_vmovp_cmd.vpe->vpe_db_lpi); 777dd3f050aSMarc Zyngier } 778dd3f050aSMarc Zyngier 7793171a47aSMarc Zyngier its_fixup_cmd(cmd); 7803171a47aSMarc Zyngier 781205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 7823171a47aSMarc Zyngier } 7833171a47aSMarc Zyngier 78428614696SMarc Zyngier static struct its_vpe *its_build_vinv_cmd(struct its_node *its, 78528614696SMarc Zyngier struct its_cmd_block *cmd, 78628614696SMarc Zyngier struct its_cmd_desc *desc) 78728614696SMarc Zyngier { 78828614696SMarc Zyngier struct its_vlpi_map *map; 78928614696SMarc Zyngier 79028614696SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_inv_cmd.dev, 79128614696SMarc Zyngier desc->its_inv_cmd.event_id); 79228614696SMarc Zyngier 79328614696SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 79428614696SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 79528614696SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 79628614696SMarc Zyngier 79728614696SMarc Zyngier its_fixup_cmd(cmd); 79828614696SMarc Zyngier 79928614696SMarc Zyngier return valid_vpe(its, map->vpe); 80028614696SMarc Zyngier } 80128614696SMarc Zyngier 802ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vint_cmd(struct its_node *its, 803ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 804ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 805ed0e4aa9SMarc Zyngier { 806ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 807ed0e4aa9SMarc Zyngier 808ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_int_cmd.dev, 809ed0e4aa9SMarc Zyngier desc->its_int_cmd.event_id); 810ed0e4aa9SMarc Zyngier 811ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 812ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 813ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 814ed0e4aa9SMarc Zyngier 815ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 816ed0e4aa9SMarc Zyngier 817ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 818ed0e4aa9SMarc Zyngier } 819ed0e4aa9SMarc Zyngier 820ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vclear_cmd(struct its_node *its, 821ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 822ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 823ed0e4aa9SMarc Zyngier { 824ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 825ed0e4aa9SMarc Zyngier 826ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_clear_cmd.dev, 827ed0e4aa9SMarc Zyngier desc->its_clear_cmd.event_id); 828ed0e4aa9SMarc Zyngier 829ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 830ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 831ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 832ed0e4aa9SMarc Zyngier 833ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 834ed0e4aa9SMarc Zyngier 835ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 836ed0e4aa9SMarc Zyngier } 837ed0e4aa9SMarc Zyngier 838d97c97baSMarc Zyngier static struct its_vpe *its_build_invdb_cmd(struct its_node *its, 839d97c97baSMarc Zyngier struct its_cmd_block *cmd, 840d97c97baSMarc Zyngier struct its_cmd_desc *desc) 841d97c97baSMarc Zyngier { 842d97c97baSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 843d97c97baSMarc Zyngier return NULL; 844d97c97baSMarc Zyngier 845d97c97baSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVDB); 846d97c97baSMarc Zyngier its_encode_vpeid(cmd, desc->its_invdb_cmd.vpe->vpe_id); 847d97c97baSMarc Zyngier 848d97c97baSMarc Zyngier its_fixup_cmd(cmd); 849d97c97baSMarc Zyngier 850d97c97baSMarc Zyngier return valid_vpe(its, desc->its_invdb_cmd.vpe); 851d97c97baSMarc Zyngier } 852d97c97baSMarc Zyngier 853cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 854cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 855cc2d3216SMarc Zyngier { 856cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 857cc2d3216SMarc Zyngier } 858cc2d3216SMarc Zyngier 859cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 860cc2d3216SMarc Zyngier { 861cc2d3216SMarc Zyngier int widx; 862cc2d3216SMarc Zyngier int ridx; 863cc2d3216SMarc Zyngier 864cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 865cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 866cc2d3216SMarc Zyngier 867cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 868cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 869cc2d3216SMarc Zyngier return 1; 870cc2d3216SMarc Zyngier 871cc2d3216SMarc Zyngier return 0; 872cc2d3216SMarc Zyngier } 873cc2d3216SMarc Zyngier 874cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 875cc2d3216SMarc Zyngier { 876cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 877cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 878cc2d3216SMarc Zyngier 879cc2d3216SMarc Zyngier while (its_queue_full(its)) { 880cc2d3216SMarc Zyngier count--; 881cc2d3216SMarc Zyngier if (!count) { 882cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 883cc2d3216SMarc Zyngier return NULL; 884cc2d3216SMarc Zyngier } 885cc2d3216SMarc Zyngier cpu_relax(); 886cc2d3216SMarc Zyngier udelay(1); 887cc2d3216SMarc Zyngier } 888cc2d3216SMarc Zyngier 889cc2d3216SMarc Zyngier cmd = its->cmd_write++; 890cc2d3216SMarc Zyngier 891cc2d3216SMarc Zyngier /* Handle queue wrapping */ 892cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 893cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 894cc2d3216SMarc Zyngier 89534d677a9SMarc Zyngier /* Clear command */ 89634d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 89734d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 89834d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 89934d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 90034d677a9SMarc Zyngier 901cc2d3216SMarc Zyngier return cmd; 902cc2d3216SMarc Zyngier } 903cc2d3216SMarc Zyngier 904cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 905cc2d3216SMarc Zyngier { 906cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 907cc2d3216SMarc Zyngier 908cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 909cc2d3216SMarc Zyngier 910cc2d3216SMarc Zyngier return its->cmd_write; 911cc2d3216SMarc Zyngier } 912cc2d3216SMarc Zyngier 913cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 914cc2d3216SMarc Zyngier { 915cc2d3216SMarc Zyngier /* 916cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 917cc2d3216SMarc Zyngier * the ITS. 918cc2d3216SMarc Zyngier */ 919cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 920328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 921cc2d3216SMarc Zyngier else 922cc2d3216SMarc Zyngier dsb(ishst); 923cc2d3216SMarc Zyngier } 924cc2d3216SMarc Zyngier 925a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 926a050fa54SHeyi Guo u64 prev_idx, 927cc2d3216SMarc Zyngier struct its_cmd_block *to) 928cc2d3216SMarc Zyngier { 929a050fa54SHeyi Guo u64 rd_idx, to_idx, linear_idx; 930cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 931cc2d3216SMarc Zyngier 932a050fa54SHeyi Guo /* Linearize to_idx if the command set has wrapped around */ 933cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 934a050fa54SHeyi Guo if (to_idx < prev_idx) 935a050fa54SHeyi Guo to_idx += ITS_CMD_QUEUE_SZ; 936a050fa54SHeyi Guo 937a050fa54SHeyi Guo linear_idx = prev_idx; 938cc2d3216SMarc Zyngier 939cc2d3216SMarc Zyngier while (1) { 940a050fa54SHeyi Guo s64 delta; 941a050fa54SHeyi Guo 942cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 9439bdd8b1cSMarc Zyngier 944a050fa54SHeyi Guo /* 945a050fa54SHeyi Guo * Compute the read pointer progress, taking the 946a050fa54SHeyi Guo * potential wrap-around into account. 947a050fa54SHeyi Guo */ 948a050fa54SHeyi Guo delta = rd_idx - prev_idx; 949a050fa54SHeyi Guo if (rd_idx < prev_idx) 950a050fa54SHeyi Guo delta += ITS_CMD_QUEUE_SZ; 9519bdd8b1cSMarc Zyngier 952a050fa54SHeyi Guo linear_idx += delta; 953a050fa54SHeyi Guo if (linear_idx >= to_idx) 954cc2d3216SMarc Zyngier break; 955cc2d3216SMarc Zyngier 956cc2d3216SMarc Zyngier count--; 957cc2d3216SMarc Zyngier if (!count) { 958a050fa54SHeyi Guo pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", 959a050fa54SHeyi Guo to_idx, linear_idx); 960a19b462fSMarc Zyngier return -1; 961cc2d3216SMarc Zyngier } 962a050fa54SHeyi Guo prev_idx = rd_idx; 963cc2d3216SMarc Zyngier cpu_relax(); 964cc2d3216SMarc Zyngier udelay(1); 965cc2d3216SMarc Zyngier } 966a19b462fSMarc Zyngier 967a19b462fSMarc Zyngier return 0; 968cc2d3216SMarc Zyngier } 969cc2d3216SMarc Zyngier 970e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 971e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 972e4f9094bSMarc Zyngier void name(struct its_node *its, \ 973e4f9094bSMarc Zyngier buildtype builder, \ 974e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 975e4f9094bSMarc Zyngier { \ 976e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 977e4f9094bSMarc Zyngier synctype *sync_obj; \ 978e4f9094bSMarc Zyngier unsigned long flags; \ 979a050fa54SHeyi Guo u64 rd_idx; \ 980e4f9094bSMarc Zyngier \ 981e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 982e4f9094bSMarc Zyngier \ 983e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 984e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 985e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 986e4f9094bSMarc Zyngier return; \ 987e4f9094bSMarc Zyngier } \ 98867047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 989e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 990e4f9094bSMarc Zyngier \ 991e4f9094bSMarc Zyngier if (sync_obj) { \ 992e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 993e4f9094bSMarc Zyngier if (!sync_cmd) \ 994e4f9094bSMarc Zyngier goto post; \ 995e4f9094bSMarc Zyngier \ 99667047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 997e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 998e4f9094bSMarc Zyngier } \ 999e4f9094bSMarc Zyngier \ 1000e4f9094bSMarc Zyngier post: \ 1001a050fa54SHeyi Guo rd_idx = readl_relaxed(its->base + GITS_CREADR); \ 1002e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 1003e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1004e4f9094bSMarc Zyngier \ 1005a050fa54SHeyi Guo if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \ 1006a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 1007e4f9094bSMarc Zyngier } 1008e4f9094bSMarc Zyngier 100967047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 101067047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1011e4f9094bSMarc Zyngier struct its_collection *sync_col) 1012cc2d3216SMarc Zyngier { 1013cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 1014cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 1015e4f9094bSMarc Zyngier 1016cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 1017cc2d3216SMarc Zyngier } 1018cc2d3216SMarc Zyngier 1019e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 1020e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 1021cc2d3216SMarc Zyngier 102267047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 102367047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1024d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 1025d011e4e6SMarc Zyngier { 1026d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 1027d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 1028d011e4e6SMarc Zyngier 1029d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 1030d011e4e6SMarc Zyngier } 1031d011e4e6SMarc Zyngier 1032d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 1033d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 1034d011e4e6SMarc Zyngier 10358d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 10368d85dcedSMarc Zyngier { 10378d85dcedSMarc Zyngier struct its_cmd_desc desc; 10388d85dcedSMarc Zyngier 10398d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 10408d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 10418d85dcedSMarc Zyngier 10428d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 10438d85dcedSMarc Zyngier } 10448d85dcedSMarc Zyngier 10458d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 10468d85dcedSMarc Zyngier { 10478d85dcedSMarc Zyngier struct its_cmd_desc desc; 10488d85dcedSMarc Zyngier 10498d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 10508d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 10518d85dcedSMarc Zyngier 10528d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 1053cc2d3216SMarc Zyngier } 1054cc2d3216SMarc Zyngier 1055cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 1056cc2d3216SMarc Zyngier { 1057cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1058cc2d3216SMarc Zyngier 1059cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 1060cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 1061cc2d3216SMarc Zyngier 1062cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 1063cc2d3216SMarc Zyngier } 1064cc2d3216SMarc Zyngier 1065cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 1066cc2d3216SMarc Zyngier { 1067cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1068cc2d3216SMarc Zyngier 1069cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 1070cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 1071cc2d3216SMarc Zyngier 1072cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 1073cc2d3216SMarc Zyngier } 1074cc2d3216SMarc Zyngier 1075cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 1076cc2d3216SMarc Zyngier int valid) 1077cc2d3216SMarc Zyngier { 1078cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1079cc2d3216SMarc Zyngier 1080cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 1081cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 1082cc2d3216SMarc Zyngier 1083cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 1084cc2d3216SMarc Zyngier } 1085cc2d3216SMarc Zyngier 10866a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 1087cc2d3216SMarc Zyngier { 1088cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1089cc2d3216SMarc Zyngier 10906a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 10916a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 10926a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 1093cc2d3216SMarc Zyngier 10946a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 1095cc2d3216SMarc Zyngier } 1096cc2d3216SMarc Zyngier 1097cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 1098cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 1099cc2d3216SMarc Zyngier { 1100cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1101cc2d3216SMarc Zyngier 1102cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 1103cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 1104591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 1105cc2d3216SMarc Zyngier 1106cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 1107cc2d3216SMarc Zyngier } 1108cc2d3216SMarc Zyngier 1109cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 1110cc2d3216SMarc Zyngier { 1111cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1112cc2d3216SMarc Zyngier 1113cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 1114cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 1115cc2d3216SMarc Zyngier 1116cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 1117cc2d3216SMarc Zyngier } 1118cc2d3216SMarc Zyngier 1119cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 1120cc2d3216SMarc Zyngier { 1121cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1122cc2d3216SMarc Zyngier 1123cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 1124cc2d3216SMarc Zyngier 1125cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 1126cc2d3216SMarc Zyngier } 1127c48ed51cSMarc Zyngier 1128d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 1129d011e4e6SMarc Zyngier { 1130c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1131d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1132d011e4e6SMarc Zyngier 1133d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 1134d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 1135d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 1136d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 1137d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 1138d011e4e6SMarc Zyngier 1139d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 1140d011e4e6SMarc Zyngier } 1141d011e4e6SMarc Zyngier 1142d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 1143d011e4e6SMarc Zyngier { 1144c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1145d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1146d011e4e6SMarc Zyngier 1147d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 1148d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 1149d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 1150d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 1151d011e4e6SMarc Zyngier 1152d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 1153d011e4e6SMarc Zyngier } 1154d011e4e6SMarc Zyngier 115575fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 115675fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 1157eb78192bSMarc Zyngier { 1158eb78192bSMarc Zyngier struct its_cmd_desc desc; 1159eb78192bSMarc Zyngier 1160eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 1161eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 1162eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 116375fd951bSMarc Zyngier 1164eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 1165eb78192bSMarc Zyngier } 1166eb78192bSMarc Zyngier 11673171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 11683171a47aSMarc Zyngier { 116984243125SZenghui Yu struct its_cmd_desc desc = {}; 11703171a47aSMarc Zyngier struct its_node *its; 11713171a47aSMarc Zyngier unsigned long flags; 11723171a47aSMarc Zyngier int col_id = vpe->col_idx; 11733171a47aSMarc Zyngier 11743171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 11753171a47aSMarc Zyngier 11763171a47aSMarc Zyngier if (!its_list_map) { 11773171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 11783171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 11793171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 11803171a47aSMarc Zyngier return; 11813171a47aSMarc Zyngier } 11823171a47aSMarc Zyngier 11833171a47aSMarc Zyngier /* 11843171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 11853171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 11863171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 11873171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 11883171a47aSMarc Zyngier * 11893171a47aSMarc Zyngier * Wall <-- Head. 11903171a47aSMarc Zyngier */ 11913171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 11923171a47aSMarc Zyngier 11933171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 119484243125SZenghui Yu desc.its_vmovp_cmd.its_list = get_its_list(vpe->its_vm); 11953171a47aSMarc Zyngier 11963171a47aSMarc Zyngier /* Emit VMOVPs */ 11973171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 11980dd57fedSMarc Zyngier if (!is_v4(its)) 11993171a47aSMarc Zyngier continue; 12003171a47aSMarc Zyngier 12012247e1bfSMarc Zyngier if (!vpe->its_vm->vlpi_count[its->list_nr]) 12022247e1bfSMarc Zyngier continue; 12032247e1bfSMarc Zyngier 12043171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 12053171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 12063171a47aSMarc Zyngier } 12073171a47aSMarc Zyngier 12083171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12093171a47aSMarc Zyngier } 12103171a47aSMarc Zyngier 121140619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1212eb78192bSMarc Zyngier { 1213eb78192bSMarc Zyngier struct its_cmd_desc desc; 1214eb78192bSMarc Zyngier 1215eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1216eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1217eb78192bSMarc Zyngier } 1218eb78192bSMarc Zyngier 121928614696SMarc Zyngier static void its_send_vinv(struct its_device *dev, u32 event_id) 122028614696SMarc Zyngier { 122128614696SMarc Zyngier struct its_cmd_desc desc; 122228614696SMarc Zyngier 122328614696SMarc Zyngier /* 122428614696SMarc Zyngier * There is no real VINV command. This is just a normal INV, 122528614696SMarc Zyngier * with a VSYNC instead of a SYNC. 122628614696SMarc Zyngier */ 122728614696SMarc Zyngier desc.its_inv_cmd.dev = dev; 122828614696SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 122928614696SMarc Zyngier 123028614696SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); 123128614696SMarc Zyngier } 123228614696SMarc Zyngier 1233ed0e4aa9SMarc Zyngier static void its_send_vint(struct its_device *dev, u32 event_id) 1234ed0e4aa9SMarc Zyngier { 1235ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1236ed0e4aa9SMarc Zyngier 1237ed0e4aa9SMarc Zyngier /* 1238ed0e4aa9SMarc Zyngier * There is no real VINT command. This is just a normal INT, 1239ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1240ed0e4aa9SMarc Zyngier */ 1241ed0e4aa9SMarc Zyngier desc.its_int_cmd.dev = dev; 1242ed0e4aa9SMarc Zyngier desc.its_int_cmd.event_id = event_id; 1243ed0e4aa9SMarc Zyngier 1244ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); 1245ed0e4aa9SMarc Zyngier } 1246ed0e4aa9SMarc Zyngier 1247ed0e4aa9SMarc Zyngier static void its_send_vclear(struct its_device *dev, u32 event_id) 1248ed0e4aa9SMarc Zyngier { 1249ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1250ed0e4aa9SMarc Zyngier 1251ed0e4aa9SMarc Zyngier /* 1252ed0e4aa9SMarc Zyngier * There is no real VCLEAR command. This is just a normal CLEAR, 1253ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1254ed0e4aa9SMarc Zyngier */ 1255ed0e4aa9SMarc Zyngier desc.its_clear_cmd.dev = dev; 1256ed0e4aa9SMarc Zyngier desc.its_clear_cmd.event_id = event_id; 1257ed0e4aa9SMarc Zyngier 1258ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); 1259ed0e4aa9SMarc Zyngier } 1260ed0e4aa9SMarc Zyngier 1261d97c97baSMarc Zyngier static void its_send_invdb(struct its_node *its, struct its_vpe *vpe) 1262d97c97baSMarc Zyngier { 1263d97c97baSMarc Zyngier struct its_cmd_desc desc; 1264d97c97baSMarc Zyngier 1265d97c97baSMarc Zyngier desc.its_invdb_cmd.vpe = vpe; 1266d97c97baSMarc Zyngier its_send_single_vcommand(its, its_build_invdb_cmd, &desc); 1267d97c97baSMarc Zyngier } 1268d97c97baSMarc Zyngier 1269c48ed51cSMarc Zyngier /* 1270c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1271c48ed51cSMarc Zyngier */ 1272c1d4d5cdSMarc Zyngier static struct its_vlpi_map *get_vlpi_map(struct irq_data *d) 1273c1d4d5cdSMarc Zyngier { 1274093bf439SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1275c1d4d5cdSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1276c1d4d5cdSMarc Zyngier u32 event = its_get_event_id(d); 1277c1d4d5cdSMarc Zyngier 1278c1d4d5cdSMarc Zyngier return dev_event_to_vlpi_map(its_dev, event); 1279c1d4d5cdSMarc Zyngier } 1280c48ed51cSMarc Zyngier 1281093bf439SMarc Zyngier return NULL; 1282093bf439SMarc Zyngier } 1283093bf439SMarc Zyngier 1284015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1285c48ed51cSMarc Zyngier { 1286c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1287015ec038SMarc Zyngier irq_hw_number_t hwirq; 1288e1a2e201SMarc Zyngier void *va; 1289adcdb94eSMarc Zyngier u8 *cfg; 1290c48ed51cSMarc Zyngier 1291c1d4d5cdSMarc Zyngier if (map) { 1292c1d4d5cdSMarc Zyngier va = page_address(map->vm->vprop_page); 1293d4d7b4adSMarc Zyngier hwirq = map->vintid; 1294d4d7b4adSMarc Zyngier 1295d4d7b4adSMarc Zyngier /* Remember the updated property */ 1296d4d7b4adSMarc Zyngier map->properties &= ~clr; 1297d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1298015ec038SMarc Zyngier } else { 1299e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1300015ec038SMarc Zyngier hwirq = d->hwirq; 1301015ec038SMarc Zyngier } 1302adcdb94eSMarc Zyngier 1303e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1304adcdb94eSMarc Zyngier *cfg &= ~clr; 1305015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1306c48ed51cSMarc Zyngier 1307c48ed51cSMarc Zyngier /* 1308c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1309c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1310c48ed51cSMarc Zyngier * Humpf... 1311c48ed51cSMarc Zyngier */ 1312c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1313328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1314c48ed51cSMarc Zyngier else 1315c48ed51cSMarc Zyngier dsb(ishst); 1316015ec038SMarc Zyngier } 1317015ec038SMarc Zyngier 13182f4f064bSMarc Zyngier static void wait_for_syncr(void __iomem *rdbase) 13192f4f064bSMarc Zyngier { 13202f4f064bSMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 13212f4f064bSMarc Zyngier cpu_relax(); 13222f4f064bSMarc Zyngier } 13232f4f064bSMarc Zyngier 1324425c09beSMarc Zyngier static void direct_lpi_inv(struct irq_data *d) 1325425c09beSMarc Zyngier { 1326425c09beSMarc Zyngier struct its_collection *col; 1327425c09beSMarc Zyngier void __iomem *rdbase; 1328425c09beSMarc Zyngier 1329425c09beSMarc Zyngier /* Target the redistributor this LPI is currently routed to */ 1330425c09beSMarc Zyngier col = irq_to_col(d); 1331425c09beSMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, col->col_id)->rd_base; 1332425c09beSMarc Zyngier gic_write_lpir(d->hwirq, rdbase + GICR_INVLPIR); 1333425c09beSMarc Zyngier 1334425c09beSMarc Zyngier wait_for_syncr(rdbase); 1335425c09beSMarc Zyngier } 1336425c09beSMarc Zyngier 1337015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1338015ec038SMarc Zyngier { 1339015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1340015ec038SMarc Zyngier 1341015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1342425c09beSMarc Zyngier if (gic_rdists->has_direct_lpi && !irqd_is_forwarded_to_vcpu(d)) 1343425c09beSMarc Zyngier direct_lpi_inv(d); 134428614696SMarc Zyngier else if (!irqd_is_forwarded_to_vcpu(d)) 1345adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 134628614696SMarc Zyngier else 134728614696SMarc Zyngier its_send_vinv(its_dev, its_get_event_id(d)); 1348c48ed51cSMarc Zyngier } 1349c48ed51cSMarc Zyngier 1350015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1351015ec038SMarc Zyngier { 1352015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1353015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1354c1d4d5cdSMarc Zyngier struct its_vlpi_map *map; 1355015ec038SMarc Zyngier 1356c1d4d5cdSMarc Zyngier map = dev_event_to_vlpi_map(its_dev, event); 1357c1d4d5cdSMarc Zyngier 1358c1d4d5cdSMarc Zyngier if (map->db_enabled == enable) 1359015ec038SMarc Zyngier return; 1360015ec038SMarc Zyngier 1361c1d4d5cdSMarc Zyngier map->db_enabled = enable; 1362015ec038SMarc Zyngier 1363015ec038SMarc Zyngier /* 1364015ec038SMarc Zyngier * More fun with the architecture: 1365015ec038SMarc Zyngier * 1366015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1367015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1368015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1369015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1370015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1371015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1372015ec038SMarc Zyngier */ 1373015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1374c48ed51cSMarc Zyngier } 1375c48ed51cSMarc Zyngier 1376c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1377c48ed51cSMarc Zyngier { 1378015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1379015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1380015ec038SMarc Zyngier 1381adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1382c48ed51cSMarc Zyngier } 1383c48ed51cSMarc Zyngier 1384c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1385c48ed51cSMarc Zyngier { 1386015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1387015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1388015ec038SMarc Zyngier 1389adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1390c48ed51cSMarc Zyngier } 1391c48ed51cSMarc Zyngier 1392c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1393c48ed51cSMarc Zyngier bool force) 1394c48ed51cSMarc Zyngier { 1395fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1396fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1397c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1398c48ed51cSMarc Zyngier struct its_collection *target_col; 1399c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1400c48ed51cSMarc Zyngier 1401015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1402015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1403015ec038SMarc Zyngier return -EINVAL; 1404015ec038SMarc Zyngier 1405fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1406fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1407fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1408fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1409fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1410fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1411fbf8f40eSGanapatrao Kulkarni } 1412fbf8f40eSGanapatrao Kulkarni } 1413fbf8f40eSGanapatrao Kulkarni 1414fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1415fbf8f40eSGanapatrao Kulkarni 1416c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1417c48ed51cSMarc Zyngier return -EINVAL; 1418c48ed51cSMarc Zyngier 14198b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 14208b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1421c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1422c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1423591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 14240d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 14258b8d94a7SMaJun } 1426c48ed51cSMarc Zyngier 1427c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1428c48ed51cSMarc Zyngier } 1429c48ed51cSMarc Zyngier 1430558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1431558b0165SArd Biesheuvel { 1432558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1433558b0165SArd Biesheuvel 1434558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1435558b0165SArd Biesheuvel } 1436558b0165SArd Biesheuvel 1437b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1438b48ac83dSMarc Zyngier { 1439b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1440b48ac83dSMarc Zyngier struct its_node *its; 1441b48ac83dSMarc Zyngier u64 addr; 1442b48ac83dSMarc Zyngier 1443b48ac83dSMarc Zyngier its = its_dev->its; 1444558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1445b48ac83dSMarc Zyngier 1446b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1447b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1448b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 144944bb7e24SRobin Murphy 145035ae7df2SJulien Grall iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); 1451b48ac83dSMarc Zyngier } 1452b48ac83dSMarc Zyngier 14538d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 14548d85dcedSMarc Zyngier enum irqchip_irq_state which, 14558d85dcedSMarc Zyngier bool state) 14568d85dcedSMarc Zyngier { 14578d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 14588d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 14598d85dcedSMarc Zyngier 14608d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 14618d85dcedSMarc Zyngier return -EINVAL; 14628d85dcedSMarc Zyngier 1463ed0e4aa9SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1464ed0e4aa9SMarc Zyngier if (state) 1465ed0e4aa9SMarc Zyngier its_send_vint(its_dev, event); 1466ed0e4aa9SMarc Zyngier else 1467ed0e4aa9SMarc Zyngier its_send_vclear(its_dev, event); 1468ed0e4aa9SMarc Zyngier } else { 14698d85dcedSMarc Zyngier if (state) 14708d85dcedSMarc Zyngier its_send_int(its_dev, event); 14718d85dcedSMarc Zyngier else 14728d85dcedSMarc Zyngier its_send_clear(its_dev, event); 1473ed0e4aa9SMarc Zyngier } 14748d85dcedSMarc Zyngier 14758d85dcedSMarc Zyngier return 0; 14768d85dcedSMarc Zyngier } 14778d85dcedSMarc Zyngier 14782247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 14792247e1bfSMarc Zyngier { 14802247e1bfSMarc Zyngier unsigned long flags; 14812247e1bfSMarc Zyngier 14822247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 14832247e1bfSMarc Zyngier if (!its_list_map) 14842247e1bfSMarc Zyngier return; 14852247e1bfSMarc Zyngier 14862247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 14872247e1bfSMarc Zyngier 14882247e1bfSMarc Zyngier /* 14892247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 14902247e1bfSMarc Zyngier * them mapped now. 14912247e1bfSMarc Zyngier */ 14922247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 14932247e1bfSMarc Zyngier 14942247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 14952247e1bfSMarc Zyngier int i; 14962247e1bfSMarc Zyngier 14972247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 14982247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 149944c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 15002247e1bfSMarc Zyngier 15012247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 15022247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 15032247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 15042247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 150544c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 15062247e1bfSMarc Zyngier } 15072247e1bfSMarc Zyngier } 15082247e1bfSMarc Zyngier 15092247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 15102247e1bfSMarc Zyngier } 15112247e1bfSMarc Zyngier 15122247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 15132247e1bfSMarc Zyngier { 15142247e1bfSMarc Zyngier unsigned long flags; 15152247e1bfSMarc Zyngier 15162247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 15172247e1bfSMarc Zyngier if (!its_list_map) 15182247e1bfSMarc Zyngier return; 15192247e1bfSMarc Zyngier 15202247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 15212247e1bfSMarc Zyngier 15222247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 15232247e1bfSMarc Zyngier int i; 15242247e1bfSMarc Zyngier 15252247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 15262247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 15272247e1bfSMarc Zyngier } 15282247e1bfSMarc Zyngier 15292247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 15302247e1bfSMarc Zyngier } 15312247e1bfSMarc Zyngier 1532d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1533d011e4e6SMarc Zyngier { 1534d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1535d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1536d011e4e6SMarc Zyngier int ret = 0; 1537d011e4e6SMarc Zyngier 1538d011e4e6SMarc Zyngier if (!info->map) 1539d011e4e6SMarc Zyngier return -EINVAL; 1540d011e4e6SMarc Zyngier 154111635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1542d011e4e6SMarc Zyngier 1543d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1544d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1545d011e4e6SMarc Zyngier 15466396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 154711635fa2SMarc Zyngier GFP_ATOMIC); 1548d011e4e6SMarc Zyngier if (!maps) { 1549d011e4e6SMarc Zyngier ret = -ENOMEM; 1550d011e4e6SMarc Zyngier goto out; 1551d011e4e6SMarc Zyngier } 1552d011e4e6SMarc Zyngier 1553d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1554d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1555d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1556d011e4e6SMarc Zyngier ret = -EINVAL; 1557d011e4e6SMarc Zyngier goto out; 1558d011e4e6SMarc Zyngier } 1559d011e4e6SMarc Zyngier 1560d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1561d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1562d011e4e6SMarc Zyngier 1563d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1564d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1565d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1566d011e4e6SMarc Zyngier } else { 15672247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 15682247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 15692247e1bfSMarc Zyngier 1570d4d7b4adSMarc Zyngier /* 1571d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1572d4d7b4adSMarc Zyngier * start poking the virtual property table. 1573d4d7b4adSMarc Zyngier */ 1574d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1575d4d7b4adSMarc Zyngier 1576d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1577d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1578d4d7b4adSMarc Zyngier 1579d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1580d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1581d011e4e6SMarc Zyngier 1582d011e4e6SMarc Zyngier /* and install the virtual one */ 1583d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1584d011e4e6SMarc Zyngier 1585d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1586d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1587d011e4e6SMarc Zyngier } 1588d011e4e6SMarc Zyngier 1589d011e4e6SMarc Zyngier out: 159011635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1591d011e4e6SMarc Zyngier return ret; 1592d011e4e6SMarc Zyngier } 1593d011e4e6SMarc Zyngier 1594d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1595d011e4e6SMarc Zyngier { 1596d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1597046b5054SMarc Zyngier struct its_vlpi_map *map; 1598d011e4e6SMarc Zyngier int ret = 0; 1599d011e4e6SMarc Zyngier 160011635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1601d011e4e6SMarc Zyngier 1602046b5054SMarc Zyngier map = get_vlpi_map(d); 1603046b5054SMarc Zyngier 1604046b5054SMarc Zyngier if (!its_dev->event_map.vm || !map) { 1605d011e4e6SMarc Zyngier ret = -EINVAL; 1606d011e4e6SMarc Zyngier goto out; 1607d011e4e6SMarc Zyngier } 1608d011e4e6SMarc Zyngier 1609d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1610c1d4d5cdSMarc Zyngier *info->map = *map; 1611d011e4e6SMarc Zyngier 1612d011e4e6SMarc Zyngier out: 161311635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1614d011e4e6SMarc Zyngier return ret; 1615d011e4e6SMarc Zyngier } 1616d011e4e6SMarc Zyngier 1617d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1618d011e4e6SMarc Zyngier { 1619d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1620d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1621d011e4e6SMarc Zyngier int ret = 0; 1622d011e4e6SMarc Zyngier 162311635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1624d011e4e6SMarc Zyngier 1625d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1626d011e4e6SMarc Zyngier ret = -EINVAL; 1627d011e4e6SMarc Zyngier goto out; 1628d011e4e6SMarc Zyngier } 1629d011e4e6SMarc Zyngier 1630d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1631d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1632d011e4e6SMarc Zyngier 1633d011e4e6SMarc Zyngier /* and restore the physical one */ 1634d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1635d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1636d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1637d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1638d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1639d011e4e6SMarc Zyngier 16402247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 16412247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 16422247e1bfSMarc Zyngier 1643d011e4e6SMarc Zyngier /* 1644d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1645d011e4e6SMarc Zyngier * this was the last VLPI. 1646d011e4e6SMarc Zyngier */ 1647d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1648d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1649d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1650d011e4e6SMarc Zyngier } 1651d011e4e6SMarc Zyngier 1652d011e4e6SMarc Zyngier out: 165311635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1654d011e4e6SMarc Zyngier return ret; 1655d011e4e6SMarc Zyngier } 1656d011e4e6SMarc Zyngier 1657015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1658015ec038SMarc Zyngier { 1659015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1660015ec038SMarc Zyngier 1661015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1662015ec038SMarc Zyngier return -EINVAL; 1663015ec038SMarc Zyngier 1664015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1665015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1666015ec038SMarc Zyngier else 1667015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1668015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1669015ec038SMarc Zyngier 1670015ec038SMarc Zyngier return 0; 1671015ec038SMarc Zyngier } 1672015ec038SMarc Zyngier 1673c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1674c808eea8SMarc Zyngier { 1675c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1676c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1677c808eea8SMarc Zyngier 1678c808eea8SMarc Zyngier /* Need a v4 ITS */ 16790dd57fedSMarc Zyngier if (!is_v4(its_dev->its)) 1680c808eea8SMarc Zyngier return -EINVAL; 1681c808eea8SMarc Zyngier 1682d011e4e6SMarc Zyngier /* Unmap request? */ 1683d011e4e6SMarc Zyngier if (!info) 1684d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1685d011e4e6SMarc Zyngier 1686c808eea8SMarc Zyngier switch (info->cmd_type) { 1687c808eea8SMarc Zyngier case MAP_VLPI: 1688d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1689c808eea8SMarc Zyngier 1690c808eea8SMarc Zyngier case GET_VLPI: 1691d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1692c808eea8SMarc Zyngier 1693c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1694c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1695015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1696c808eea8SMarc Zyngier 1697c808eea8SMarc Zyngier default: 1698c808eea8SMarc Zyngier return -EINVAL; 1699c808eea8SMarc Zyngier } 1700c808eea8SMarc Zyngier } 1701c808eea8SMarc Zyngier 1702c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1703c48ed51cSMarc Zyngier .name = "ITS", 1704c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1705c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1706004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1707c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1708b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 17098d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1710c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1711b48ac83dSMarc Zyngier }; 1712b48ac83dSMarc Zyngier 1713880cb3cdSMarc Zyngier 1714bf9529f8SMarc Zyngier /* 1715bf9529f8SMarc Zyngier * How we allocate LPIs: 1716bf9529f8SMarc Zyngier * 1717880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1718880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1719880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1720880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1721bf9529f8SMarc Zyngier * 1722880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1723880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1724880cb3cdSMarc Zyngier * already free block. 1725880cb3cdSMarc Zyngier * 1726880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1727880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1728880cb3cdSMarc Zyngier */ 17294cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1730880cb3cdSMarc Zyngier 1731880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 1732880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 1733bf9529f8SMarc Zyngier 1734880cb3cdSMarc Zyngier struct lpi_range { 1735880cb3cdSMarc Zyngier struct list_head entry; 1736880cb3cdSMarc Zyngier u32 base_id; 1737880cb3cdSMarc Zyngier u32 span; 1738880cb3cdSMarc Zyngier }; 1739880cb3cdSMarc Zyngier 1740880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 1741bf9529f8SMarc Zyngier { 1742880cb3cdSMarc Zyngier struct lpi_range *range; 1743880cb3cdSMarc Zyngier 17441c73fac5SRasmus Villemoes range = kmalloc(sizeof(*range), GFP_KERNEL); 1745880cb3cdSMarc Zyngier if (range) { 1746880cb3cdSMarc Zyngier range->base_id = base; 1747880cb3cdSMarc Zyngier range->span = span; 1748bf9529f8SMarc Zyngier } 1749bf9529f8SMarc Zyngier 1750880cb3cdSMarc Zyngier return range; 1751880cb3cdSMarc Zyngier } 1752880cb3cdSMarc Zyngier 1753880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 1754880cb3cdSMarc Zyngier { 1755880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1756880cb3cdSMarc Zyngier int err = -ENOSPC; 1757880cb3cdSMarc Zyngier 1758880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1759880cb3cdSMarc Zyngier 1760880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1761880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 1762880cb3cdSMarc Zyngier *base = range->base_id; 1763880cb3cdSMarc Zyngier range->base_id += nr_lpis; 1764880cb3cdSMarc Zyngier range->span -= nr_lpis; 1765880cb3cdSMarc Zyngier 1766880cb3cdSMarc Zyngier if (range->span == 0) { 1767880cb3cdSMarc Zyngier list_del(&range->entry); 1768880cb3cdSMarc Zyngier kfree(range); 1769880cb3cdSMarc Zyngier } 1770880cb3cdSMarc Zyngier 1771880cb3cdSMarc Zyngier err = 0; 1772880cb3cdSMarc Zyngier break; 1773880cb3cdSMarc Zyngier } 1774880cb3cdSMarc Zyngier } 1775880cb3cdSMarc Zyngier 1776880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1777880cb3cdSMarc Zyngier 1778880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 1779880cb3cdSMarc Zyngier return err; 1780880cb3cdSMarc Zyngier } 1781880cb3cdSMarc Zyngier 178212eade12SRasmus Villemoes static void merge_lpi_ranges(struct lpi_range *a, struct lpi_range *b) 178312eade12SRasmus Villemoes { 178412eade12SRasmus Villemoes if (&a->entry == &lpi_range_list || &b->entry == &lpi_range_list) 178512eade12SRasmus Villemoes return; 178612eade12SRasmus Villemoes if (a->base_id + a->span != b->base_id) 178712eade12SRasmus Villemoes return; 178812eade12SRasmus Villemoes b->base_id = a->base_id; 178912eade12SRasmus Villemoes b->span += a->span; 179012eade12SRasmus Villemoes list_del(&a->entry); 179112eade12SRasmus Villemoes kfree(a); 179212eade12SRasmus Villemoes } 179312eade12SRasmus Villemoes 1794880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 1795880cb3cdSMarc Zyngier { 179612eade12SRasmus Villemoes struct lpi_range *new, *old; 1797880cb3cdSMarc Zyngier 1798880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 1799b31a3838SRasmus Villemoes if (!new) 1800b31a3838SRasmus Villemoes return -ENOMEM; 1801880cb3cdSMarc Zyngier 1802880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1803880cb3cdSMarc Zyngier 180412eade12SRasmus Villemoes list_for_each_entry_reverse(old, &lpi_range_list, entry) { 180512eade12SRasmus Villemoes if (old->base_id < base) 180612eade12SRasmus Villemoes break; 1807880cb3cdSMarc Zyngier } 180812eade12SRasmus Villemoes /* 180912eade12SRasmus Villemoes * old is the last element with ->base_id smaller than base, 181012eade12SRasmus Villemoes * so new goes right after it. If there are no elements with 181112eade12SRasmus Villemoes * ->base_id smaller than base, &old->entry ends up pointing 181212eade12SRasmus Villemoes * at the head of the list, and inserting new it the start of 181312eade12SRasmus Villemoes * the list is the right thing to do in that case as well. 181412eade12SRasmus Villemoes */ 181512eade12SRasmus Villemoes list_add(&new->entry, &old->entry); 181612eade12SRasmus Villemoes /* 181712eade12SRasmus Villemoes * Now check if we can merge with the preceding and/or 181812eade12SRasmus Villemoes * following ranges. 181912eade12SRasmus Villemoes */ 182012eade12SRasmus Villemoes merge_lpi_ranges(old, new); 182112eade12SRasmus Villemoes merge_lpi_ranges(new, list_next_entry(new, entry)); 1822880cb3cdSMarc Zyngier 1823880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1824b31a3838SRasmus Villemoes return 0; 1825bf9529f8SMarc Zyngier } 1826bf9529f8SMarc Zyngier 182704a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1828bf9529f8SMarc Zyngier { 1829880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 183012b2905aSMarc Zyngier u32 numlpis; 1831880cb3cdSMarc Zyngier int err; 1832bf9529f8SMarc Zyngier 183312b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 183412b2905aSMarc Zyngier 183512b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 183612b2905aSMarc Zyngier lpis = numlpis; 183712b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 183812b2905aSMarc Zyngier lpis); 183912b2905aSMarc Zyngier } 184012b2905aSMarc Zyngier 1841880cb3cdSMarc Zyngier /* 1842880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 1843880cb3cdSMarc Zyngier * full range of LPIs. 1844880cb3cdSMarc Zyngier */ 1845880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 1846880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 1847880cb3cdSMarc Zyngier return err; 1848bf9529f8SMarc Zyngier } 1849bf9529f8SMarc Zyngier 185038dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 1851bf9529f8SMarc Zyngier { 1852bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1853880cb3cdSMarc Zyngier int err = 0; 1854bf9529f8SMarc Zyngier 1855bf9529f8SMarc Zyngier do { 185638dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 1857880cb3cdSMarc Zyngier if (!err) 1858bf9529f8SMarc Zyngier break; 1859bf9529f8SMarc Zyngier 186038dd7c49SMarc Zyngier nr_irqs /= 2; 186138dd7c49SMarc Zyngier } while (nr_irqs > 0); 1862bf9529f8SMarc Zyngier 186345725e0fSMarc Zyngier if (!nr_irqs) 186445725e0fSMarc Zyngier err = -ENOSPC; 186545725e0fSMarc Zyngier 1866880cb3cdSMarc Zyngier if (err) 1867bf9529f8SMarc Zyngier goto out; 1868bf9529f8SMarc Zyngier 186938dd7c49SMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_irqs), sizeof (long), GFP_ATOMIC); 1870bf9529f8SMarc Zyngier if (!bitmap) 1871bf9529f8SMarc Zyngier goto out; 1872bf9529f8SMarc Zyngier 187338dd7c49SMarc Zyngier *nr_ids = nr_irqs; 1874bf9529f8SMarc Zyngier 1875bf9529f8SMarc Zyngier out: 1876c8415b94SMarc Zyngier if (!bitmap) 1877c8415b94SMarc Zyngier *base = *nr_ids = 0; 1878c8415b94SMarc Zyngier 1879bf9529f8SMarc Zyngier return bitmap; 1880bf9529f8SMarc Zyngier } 1881bf9529f8SMarc Zyngier 188238dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 1883bf9529f8SMarc Zyngier { 1884880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 1885cf2be8baSMarc Zyngier kfree(bitmap); 1886bf9529f8SMarc Zyngier } 18871ac19ca6SMarc Zyngier 1888053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 1889053be485SMarc Zyngier { 1890053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 1891053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 1892053be485SMarc Zyngier 1893053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 1894053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 1895053be485SMarc Zyngier } 1896053be485SMarc Zyngier 18970e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 18980e5ccf91SMarc Zyngier { 18990e5ccf91SMarc Zyngier struct page *prop_page; 19001ac19ca6SMarc Zyngier 19010e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 19020e5ccf91SMarc Zyngier if (!prop_page) 19030e5ccf91SMarc Zyngier return NULL; 19040e5ccf91SMarc Zyngier 1905053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 19060e5ccf91SMarc Zyngier 19070e5ccf91SMarc Zyngier return prop_page; 19080e5ccf91SMarc Zyngier } 19090e5ccf91SMarc Zyngier 19107d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 19117d75bbb4SMarc Zyngier { 19127d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 19137d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 19147d75bbb4SMarc Zyngier } 19151ac19ca6SMarc Zyngier 19165e2c9f9aSMarc Zyngier static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) 19175e2c9f9aSMarc Zyngier { 19185e2c9f9aSMarc Zyngier phys_addr_t start, end, addr_end; 19195e2c9f9aSMarc Zyngier u64 i; 19205e2c9f9aSMarc Zyngier 19215e2c9f9aSMarc Zyngier /* 19225e2c9f9aSMarc Zyngier * We don't bother checking for a kdump kernel as by 19235e2c9f9aSMarc Zyngier * construction, the LPI tables are out of this kernel's 19245e2c9f9aSMarc Zyngier * memory map. 19255e2c9f9aSMarc Zyngier */ 19265e2c9f9aSMarc Zyngier if (is_kdump_kernel()) 19275e2c9f9aSMarc Zyngier return true; 19285e2c9f9aSMarc Zyngier 19295e2c9f9aSMarc Zyngier addr_end = addr + size - 1; 19305e2c9f9aSMarc Zyngier 19315e2c9f9aSMarc Zyngier for_each_reserved_mem_region(i, &start, &end) { 19325e2c9f9aSMarc Zyngier if (addr >= start && addr_end <= end) 19335e2c9f9aSMarc Zyngier return true; 19345e2c9f9aSMarc Zyngier } 19355e2c9f9aSMarc Zyngier 19365e2c9f9aSMarc Zyngier /* Not found, not a good sign... */ 19375e2c9f9aSMarc Zyngier pr_warn("GICv3: Expected reserved range [%pa:%pa], not found\n", 19385e2c9f9aSMarc Zyngier &addr, &addr_end); 19395e2c9f9aSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 19405e2c9f9aSMarc Zyngier return false; 19415e2c9f9aSMarc Zyngier } 19425e2c9f9aSMarc Zyngier 19433fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 19443fb68faeSMarc Zyngier { 19453fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 19463fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 19473fb68faeSMarc Zyngier 19483fb68faeSMarc Zyngier return 0; 19493fb68faeSMarc Zyngier } 19503fb68faeSMarc Zyngier 195111e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 19521ac19ca6SMarc Zyngier { 1953c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 1954c440a9d9SMarc Zyngier u64 val; 1955c440a9d9SMarc Zyngier 1956c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 1957c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 1958c440a9d9SMarc Zyngier 1959c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 1960c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 1961c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 1962c440a9d9SMarc Zyngier MEMREMAP_WB); 1963c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 1964c440a9d9SMarc Zyngier } else { 1965e1a2e201SMarc Zyngier struct page *page; 19661ac19ca6SMarc Zyngier 1967c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 1968c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 19694cb205c0SJia He ITS_MAX_LPI_NRBITS); 1970e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 1971e1a2e201SMarc Zyngier if (!page) { 19721ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 19731ac19ca6SMarc Zyngier return -ENOMEM; 19741ac19ca6SMarc Zyngier } 19751ac19ca6SMarc Zyngier 1976e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 1977e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 19783fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 19793fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 1980c440a9d9SMarc Zyngier } 1981e1a2e201SMarc Zyngier 1982e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 1983e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 19841ac19ca6SMarc Zyngier 19856c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 19861ac19ca6SMarc Zyngier } 19871ac19ca6SMarc Zyngier 19881ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 19891ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 19901ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 19914f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 19921ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 19931ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 19941ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 19951ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 19961ac19ca6SMarc Zyngier }; 19971ac19ca6SMarc Zyngier 19982d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 19992d81d425SShanker Donthineni { 20002d81d425SShanker Donthineni u32 idx = baser - its->tables; 20012d81d425SShanker Donthineni 20020968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 20032d81d425SShanker Donthineni } 20042d81d425SShanker Donthineni 20052d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 20062d81d425SShanker Donthineni u64 val) 20072d81d425SShanker Donthineni { 20082d81d425SShanker Donthineni u32 idx = baser - its->tables; 20092d81d425SShanker Donthineni 20100968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 20112d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 20122d81d425SShanker Donthineni } 20132d81d425SShanker Donthineni 20149347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 20153faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 20163faf24eaSShanker Donthineni bool indirect) 20179347359aSShanker Donthineni { 20189347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 20199347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 20209347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 202130ae9610SShanker Donthineni u64 baser_phys, tmp; 20229347359aSShanker Donthineni u32 alloc_pages; 2023539d3782SShanker Donthineni struct page *page; 20249347359aSShanker Donthineni void *base; 20259347359aSShanker Donthineni 20269347359aSShanker Donthineni retry_alloc_baser: 20279347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 20289347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 20299347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 20309347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 20319347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 20329347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 20339347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 20349347359aSShanker Donthineni } 20359347359aSShanker Donthineni 2036539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); 2037539d3782SShanker Donthineni if (!page) 20389347359aSShanker Donthineni return -ENOMEM; 20399347359aSShanker Donthineni 2040539d3782SShanker Donthineni base = (void *)page_address(page); 204130ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 204230ae9610SShanker Donthineni 204330ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 204430ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 204530ae9610SShanker Donthineni 204630ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 204730ae9610SShanker Donthineni if (psz != SZ_64K) { 204830ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 204930ae9610SShanker Donthineni free_pages((unsigned long)base, order); 205030ae9610SShanker Donthineni return -ENXIO; 205130ae9610SShanker Donthineni } 205230ae9610SShanker Donthineni 205330ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 205430ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 205530ae9610SShanker Donthineni } 205630ae9610SShanker Donthineni 20579347359aSShanker Donthineni retry_baser: 205830ae9610SShanker Donthineni val = (baser_phys | 20599347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 20609347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 20619347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 20629347359aSShanker Donthineni cache | 20639347359aSShanker Donthineni shr | 20649347359aSShanker Donthineni GITS_BASER_VALID); 20659347359aSShanker Donthineni 20663faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 20673faf24eaSShanker Donthineni 20689347359aSShanker Donthineni switch (psz) { 20699347359aSShanker Donthineni case SZ_4K: 20709347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 20719347359aSShanker Donthineni break; 20729347359aSShanker Donthineni case SZ_16K: 20739347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 20749347359aSShanker Donthineni break; 20759347359aSShanker Donthineni case SZ_64K: 20769347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 20779347359aSShanker Donthineni break; 20789347359aSShanker Donthineni } 20799347359aSShanker Donthineni 20809347359aSShanker Donthineni its_write_baser(its, baser, val); 20819347359aSShanker Donthineni tmp = baser->val; 20829347359aSShanker Donthineni 20839347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 20849347359aSShanker Donthineni /* 20859347359aSShanker Donthineni * Shareability didn't stick. Just use 20869347359aSShanker Donthineni * whatever the read reported, which is likely 20879347359aSShanker Donthineni * to be the only thing this redistributor 20889347359aSShanker Donthineni * supports. If that's zero, make it 20899347359aSShanker Donthineni * non-cacheable as well. 20909347359aSShanker Donthineni */ 20919347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 20929347359aSShanker Donthineni if (!shr) { 20939347359aSShanker Donthineni cache = GITS_BASER_nC; 2094328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 20959347359aSShanker Donthineni } 20969347359aSShanker Donthineni goto retry_baser; 20979347359aSShanker Donthineni } 20989347359aSShanker Donthineni 20999347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 21009347359aSShanker Donthineni /* 21019347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 21029347359aSShanker Donthineni * size and retry. If we reach 4K, then 21039347359aSShanker Donthineni * something is horribly wrong... 21049347359aSShanker Donthineni */ 21059347359aSShanker Donthineni free_pages((unsigned long)base, order); 21069347359aSShanker Donthineni baser->base = NULL; 21079347359aSShanker Donthineni 21089347359aSShanker Donthineni switch (psz) { 21099347359aSShanker Donthineni case SZ_16K: 21109347359aSShanker Donthineni psz = SZ_4K; 21119347359aSShanker Donthineni goto retry_alloc_baser; 21129347359aSShanker Donthineni case SZ_64K: 21139347359aSShanker Donthineni psz = SZ_16K; 21149347359aSShanker Donthineni goto retry_alloc_baser; 21159347359aSShanker Donthineni } 21169347359aSShanker Donthineni } 21179347359aSShanker Donthineni 21189347359aSShanker Donthineni if (val != tmp) { 2119b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 21209347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 2121b11283ebSVladimir Murzin val, tmp); 21229347359aSShanker Donthineni free_pages((unsigned long)base, order); 21239347359aSShanker Donthineni return -ENXIO; 21249347359aSShanker Donthineni } 21259347359aSShanker Donthineni 21269347359aSShanker Donthineni baser->order = order; 21279347359aSShanker Donthineni baser->base = base; 21289347359aSShanker Donthineni baser->psz = psz; 21293faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 21309347359aSShanker Donthineni 21313faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 2132d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 21339347359aSShanker Donthineni its_base_type_string[type], 21349347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 21353faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 21369347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 21379347359aSShanker Donthineni 21389347359aSShanker Donthineni return 0; 21399347359aSShanker Donthineni } 21409347359aSShanker Donthineni 21414cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 21424cacac57SMarc Zyngier struct its_baser *baser, 214332bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 21444b75c459SShanker Donthineni { 21454cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 21464cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 21474cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 21482fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 21494b75c459SShanker Donthineni u32 new_order = *order; 21503faf24eaSShanker Donthineni bool indirect = false; 21513faf24eaSShanker Donthineni 21523faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 21533faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 21543faf24eaSShanker Donthineni /* 21553faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 21563faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 21573faf24eaSShanker Donthineni */ 21583faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 21593faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 21603faf24eaSShanker Donthineni 21613faf24eaSShanker Donthineni if (indirect) { 21623faf24eaSShanker Donthineni /* 21633faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 21643faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 21653faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 21663faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 21673faf24eaSShanker Donthineni * entry size. 21683faf24eaSShanker Donthineni */ 2169d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 21703faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 21713faf24eaSShanker Donthineni } 21723faf24eaSShanker Donthineni } 21734b75c459SShanker Donthineni 21744b75c459SShanker Donthineni /* 21754b75c459SShanker Donthineni * Allocate as many entries as required to fit the 21764b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 21774b75c459SShanker Donthineni * space being incredibly sparse, this results in a 21783faf24eaSShanker Donthineni * massive waste of memory if two-level device table 21793faf24eaSShanker Donthineni * feature is not supported by hardware. 21804b75c459SShanker Donthineni */ 21814b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 21824b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 21834b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 2184d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 2185576a8342SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", 21864cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 2187576a8342SMarc Zyngier device_ids(its), ids); 21884b75c459SShanker Donthineni } 21894b75c459SShanker Donthineni 21904b75c459SShanker Donthineni *order = new_order; 21913faf24eaSShanker Donthineni 21923faf24eaSShanker Donthineni return indirect; 21934b75c459SShanker Donthineni } 21944b75c459SShanker Donthineni 21955e516846SMarc Zyngier static u32 compute_common_aff(u64 val) 21965e516846SMarc Zyngier { 21975e516846SMarc Zyngier u32 aff, clpiaff; 21985e516846SMarc Zyngier 21995e516846SMarc Zyngier aff = FIELD_GET(GICR_TYPER_AFFINITY, val); 22005e516846SMarc Zyngier clpiaff = FIELD_GET(GICR_TYPER_COMMON_LPI_AFF, val); 22015e516846SMarc Zyngier 22025e516846SMarc Zyngier return aff & ~(GENMASK(31, 0) >> (clpiaff * 8)); 22035e516846SMarc Zyngier } 22045e516846SMarc Zyngier 22055e516846SMarc Zyngier static u32 compute_its_aff(struct its_node *its) 22065e516846SMarc Zyngier { 22075e516846SMarc Zyngier u64 val; 22085e516846SMarc Zyngier u32 svpet; 22095e516846SMarc Zyngier 22105e516846SMarc Zyngier /* 22115e516846SMarc Zyngier * Reencode the ITS SVPET and MPIDR as a GICR_TYPER, and compute 22125e516846SMarc Zyngier * the resulting affinity. We then use that to see if this match 22135e516846SMarc Zyngier * our own affinity. 22145e516846SMarc Zyngier */ 22155e516846SMarc Zyngier svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); 22165e516846SMarc Zyngier val = FIELD_PREP(GICR_TYPER_COMMON_LPI_AFF, svpet); 22175e516846SMarc Zyngier val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); 22185e516846SMarc Zyngier return compute_common_aff(val); 22195e516846SMarc Zyngier } 22205e516846SMarc Zyngier 22215e516846SMarc Zyngier static struct its_node *find_sibling_its(struct its_node *cur_its) 22225e516846SMarc Zyngier { 22235e516846SMarc Zyngier struct its_node *its; 22245e516846SMarc Zyngier u32 aff; 22255e516846SMarc Zyngier 22265e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, cur_its->typer)) 22275e516846SMarc Zyngier return NULL; 22285e516846SMarc Zyngier 22295e516846SMarc Zyngier aff = compute_its_aff(cur_its); 22305e516846SMarc Zyngier 22315e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 22325e516846SMarc Zyngier u64 baser; 22335e516846SMarc Zyngier 22345e516846SMarc Zyngier if (!is_v4_1(its) || its == cur_its) 22355e516846SMarc Zyngier continue; 22365e516846SMarc Zyngier 22375e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 22385e516846SMarc Zyngier continue; 22395e516846SMarc Zyngier 22405e516846SMarc Zyngier if (aff != compute_its_aff(its)) 22415e516846SMarc Zyngier continue; 22425e516846SMarc Zyngier 22435e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 22445e516846SMarc Zyngier baser = its->tables[2].val; 22455e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 22465e516846SMarc Zyngier continue; 22475e516846SMarc Zyngier 22485e516846SMarc Zyngier return its; 22495e516846SMarc Zyngier } 22505e516846SMarc Zyngier 22515e516846SMarc Zyngier return NULL; 22525e516846SMarc Zyngier } 22535e516846SMarc Zyngier 22541ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 22551ac19ca6SMarc Zyngier { 22561ac19ca6SMarc Zyngier int i; 22571ac19ca6SMarc Zyngier 22581ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 22591a485f4dSShanker Donthineni if (its->tables[i].base) { 22601a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 22611a485f4dSShanker Donthineni its->tables[i].order); 22621a485f4dSShanker Donthineni its->tables[i].base = NULL; 22631ac19ca6SMarc Zyngier } 22641ac19ca6SMarc Zyngier } 22651ac19ca6SMarc Zyngier } 22661ac19ca6SMarc Zyngier 22670e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 22681ac19ca6SMarc Zyngier { 22691ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 22702fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 22719347359aSShanker Donthineni u32 psz = SZ_64K; 22729347359aSShanker Donthineni int err, i; 227394100970SRobert Richter 2274fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 2275fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 22769347359aSShanker Donthineni cache = GITS_BASER_nCnB; 2277466b7d16SShanker Donthineni 22781ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 22792d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 22802d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 22811ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 22829347359aSShanker Donthineni u32 order = get_order(psz); 22833faf24eaSShanker Donthineni bool indirect = false; 22841ac19ca6SMarc Zyngier 22854cacac57SMarc Zyngier switch (type) { 22864cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 22871ac19ca6SMarc Zyngier continue; 22881ac19ca6SMarc Zyngier 22894cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 229032bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 229132bd44dcSShanker Donthineni psz, &order, 2292576a8342SMarc Zyngier device_ids(its)); 22938d565748SZenghui Yu break; 22948d565748SZenghui Yu 22954cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 22965e516846SMarc Zyngier if (is_v4_1(its)) { 22975e516846SMarc Zyngier struct its_node *sibling; 22985e516846SMarc Zyngier 22995e516846SMarc Zyngier WARN_ON(i != 2); 23005e516846SMarc Zyngier if ((sibling = find_sibling_its(its))) { 23015e516846SMarc Zyngier *baser = sibling->tables[2]; 23025e516846SMarc Zyngier its_write_baser(its, baser, baser->val); 23035e516846SMarc Zyngier continue; 23045e516846SMarc Zyngier } 23055e516846SMarc Zyngier } 23065e516846SMarc Zyngier 23074cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 230832bd44dcSShanker Donthineni psz, &order, 230932bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 23104cacac57SMarc Zyngier break; 23114cacac57SMarc Zyngier } 2312f54b97edSMarc Zyngier 23133faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 23149347359aSShanker Donthineni if (err < 0) { 23159347359aSShanker Donthineni its_free_tables(its); 23169347359aSShanker Donthineni return err; 231730f21363SRobert Richter } 231830f21363SRobert Richter 23199347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 23209347359aSShanker Donthineni psz = baser->psz; 23219347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 23229347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 23231ac19ca6SMarc Zyngier } 23241ac19ca6SMarc Zyngier 23251ac19ca6SMarc Zyngier return 0; 23261ac19ca6SMarc Zyngier } 23271ac19ca6SMarc Zyngier 23285e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_its(void) 23295e516846SMarc Zyngier { 23305e516846SMarc Zyngier struct its_node *its; 23315e516846SMarc Zyngier u64 val; 23325e516846SMarc Zyngier u32 aff; 23335e516846SMarc Zyngier 23345e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 23355e516846SMarc Zyngier aff = compute_common_aff(val); 23365e516846SMarc Zyngier 23375e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 23385e516846SMarc Zyngier u64 baser, addr; 23395e516846SMarc Zyngier 23405e516846SMarc Zyngier if (!is_v4_1(its)) 23415e516846SMarc Zyngier continue; 23425e516846SMarc Zyngier 23435e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 23445e516846SMarc Zyngier continue; 23455e516846SMarc Zyngier 23465e516846SMarc Zyngier if (aff != compute_its_aff(its)) 23475e516846SMarc Zyngier continue; 23485e516846SMarc Zyngier 23495e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 23505e516846SMarc Zyngier baser = its->tables[2].val; 23515e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 23525e516846SMarc Zyngier continue; 23535e516846SMarc Zyngier 23545e516846SMarc Zyngier /* We have a winner! */ 23555e516846SMarc Zyngier val = GICR_VPROPBASER_4_1_VALID; 23565e516846SMarc Zyngier if (baser & GITS_BASER_INDIRECT) 23575e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 23585e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, 23595e516846SMarc Zyngier FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)); 23605e516846SMarc Zyngier switch (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)) { 23615e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 23625e516846SMarc Zyngier addr = GITS_BASER_ADDR_48_to_52(baser); 23635e516846SMarc Zyngier break; 23645e516846SMarc Zyngier default: 23655e516846SMarc Zyngier addr = baser & GENMASK_ULL(47, 12); 23665e516846SMarc Zyngier break; 23675e516846SMarc Zyngier } 23685e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, addr >> 12); 23695e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_SHAREABILITY_MASK, 23705e516846SMarc Zyngier FIELD_GET(GITS_BASER_SHAREABILITY_MASK, baser)); 23715e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_INNER_CACHEABILITY_MASK, 23725e516846SMarc Zyngier FIELD_GET(GITS_BASER_INNER_CACHEABILITY_MASK, baser)); 23735e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, GITS_BASER_NR_PAGES(baser) - 1); 23745e516846SMarc Zyngier 23755e516846SMarc Zyngier return val; 23765e516846SMarc Zyngier } 23775e516846SMarc Zyngier 23785e516846SMarc Zyngier return 0; 23795e516846SMarc Zyngier } 23805e516846SMarc Zyngier 23815e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_rd(cpumask_t **mask) 23825e516846SMarc Zyngier { 23835e516846SMarc Zyngier u32 aff; 23845e516846SMarc Zyngier u64 val; 23855e516846SMarc Zyngier int cpu; 23865e516846SMarc Zyngier 23875e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 23885e516846SMarc Zyngier aff = compute_common_aff(val); 23895e516846SMarc Zyngier 23905e516846SMarc Zyngier for_each_possible_cpu(cpu) { 23915e516846SMarc Zyngier void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 23925e516846SMarc Zyngier u32 tmp; 23935e516846SMarc Zyngier 23945e516846SMarc Zyngier if (!base || cpu == smp_processor_id()) 23955e516846SMarc Zyngier continue; 23965e516846SMarc Zyngier 23975e516846SMarc Zyngier val = gic_read_typer(base + GICR_TYPER); 23985e516846SMarc Zyngier tmp = compute_common_aff(val); 23995e516846SMarc Zyngier if (tmp != aff) 24005e516846SMarc Zyngier continue; 24015e516846SMarc Zyngier 24025e516846SMarc Zyngier /* 24035e516846SMarc Zyngier * At this point, we have a victim. This particular CPU 24045e516846SMarc Zyngier * has already booted, and has an affinity that matches 24055e516846SMarc Zyngier * ours wrt CommonLPIAff. Let's use its own VPROPBASER. 24065e516846SMarc Zyngier * Make sure we don't write the Z bit in that case. 24075e516846SMarc Zyngier */ 24085e516846SMarc Zyngier val = gits_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 24095e516846SMarc Zyngier val &= ~GICR_VPROPBASER_4_1_Z; 24105e516846SMarc Zyngier 24115e516846SMarc Zyngier *mask = gic_data_rdist_cpu(cpu)->vpe_table_mask; 24125e516846SMarc Zyngier 24135e516846SMarc Zyngier return val; 24145e516846SMarc Zyngier } 24155e516846SMarc Zyngier 24165e516846SMarc Zyngier return 0; 24175e516846SMarc Zyngier } 24185e516846SMarc Zyngier 24195e516846SMarc Zyngier static int allocate_vpe_l1_table(void) 24205e516846SMarc Zyngier { 24215e516846SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 24225e516846SMarc Zyngier u64 val, gpsz, npg, pa; 24235e516846SMarc Zyngier unsigned int psz = SZ_64K; 24245e516846SMarc Zyngier unsigned int np, epp, esz; 24255e516846SMarc Zyngier struct page *page; 24265e516846SMarc Zyngier 24275e516846SMarc Zyngier if (!gic_rdists->has_rvpeid) 24285e516846SMarc Zyngier return 0; 24295e516846SMarc Zyngier 24305e516846SMarc Zyngier /* 24315e516846SMarc Zyngier * if VPENDBASER.Valid is set, disable any previously programmed 24325e516846SMarc Zyngier * VPE by setting PendingLast while clearing Valid. This has the 24335e516846SMarc Zyngier * effect of making sure no doorbell will be generated and we can 24345e516846SMarc Zyngier * then safely clear VPROPBASER.Valid. 24355e516846SMarc Zyngier */ 24365e516846SMarc Zyngier if (gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER) & GICR_VPENDBASER_Valid) 24375e516846SMarc Zyngier gits_write_vpendbaser(GICR_VPENDBASER_PendingLast, 24385e516846SMarc Zyngier vlpi_base + GICR_VPENDBASER); 24395e516846SMarc Zyngier 24405e516846SMarc Zyngier /* 24415e516846SMarc Zyngier * If we can inherit the configuration from another RD, let's do 24425e516846SMarc Zyngier * so. Otherwise, we have to go through the allocation process. We 24435e516846SMarc Zyngier * assume that all RDs have the exact same requirements, as 24445e516846SMarc Zyngier * nothing will work otherwise. 24455e516846SMarc Zyngier */ 24465e516846SMarc Zyngier val = inherit_vpe_l1_table_from_rd(&gic_data_rdist()->vpe_table_mask); 24475e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 24485e516846SMarc Zyngier goto out; 24495e516846SMarc Zyngier 24505e516846SMarc Zyngier gic_data_rdist()->vpe_table_mask = kzalloc(sizeof(cpumask_t), GFP_KERNEL); 24515e516846SMarc Zyngier if (!gic_data_rdist()->vpe_table_mask) 24525e516846SMarc Zyngier return -ENOMEM; 24535e516846SMarc Zyngier 24545e516846SMarc Zyngier val = inherit_vpe_l1_table_from_its(); 24555e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 24565e516846SMarc Zyngier goto out; 24575e516846SMarc Zyngier 24585e516846SMarc Zyngier /* First probe the page size */ 24595e516846SMarc Zyngier val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K); 24605e516846SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 24615e516846SMarc Zyngier val = gits_read_vpropbaser(vlpi_base + GICR_VPROPBASER); 24625e516846SMarc Zyngier gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 24635e516846SMarc Zyngier esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val); 24645e516846SMarc Zyngier 24655e516846SMarc Zyngier switch (gpsz) { 24665e516846SMarc Zyngier default: 24675e516846SMarc Zyngier gpsz = GIC_PAGE_SIZE_4K; 24685e516846SMarc Zyngier /* fall through */ 24695e516846SMarc Zyngier case GIC_PAGE_SIZE_4K: 24705e516846SMarc Zyngier psz = SZ_4K; 24715e516846SMarc Zyngier break; 24725e516846SMarc Zyngier case GIC_PAGE_SIZE_16K: 24735e516846SMarc Zyngier psz = SZ_16K; 24745e516846SMarc Zyngier break; 24755e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 24765e516846SMarc Zyngier psz = SZ_64K; 24775e516846SMarc Zyngier break; 24785e516846SMarc Zyngier } 24795e516846SMarc Zyngier 24805e516846SMarc Zyngier /* 24815e516846SMarc Zyngier * Start populating the register from scratch, including RO fields 24825e516846SMarc Zyngier * (which we want to print in debug cases...) 24835e516846SMarc Zyngier */ 24845e516846SMarc Zyngier val = 0; 24855e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, gpsz); 24865e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ENTRY_SIZE, esz); 24875e516846SMarc Zyngier 24885e516846SMarc Zyngier /* How many entries per GIC page? */ 24895e516846SMarc Zyngier esz++; 24905e516846SMarc Zyngier epp = psz / (esz * SZ_8); 24915e516846SMarc Zyngier 24925e516846SMarc Zyngier /* 24935e516846SMarc Zyngier * If we need more than just a single L1 page, flag the table 24945e516846SMarc Zyngier * as indirect and compute the number of required L1 pages. 24955e516846SMarc Zyngier */ 24965e516846SMarc Zyngier if (epp < ITS_MAX_VPEID) { 24975e516846SMarc Zyngier int nl2; 24985e516846SMarc Zyngier 24995e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 25005e516846SMarc Zyngier 25015e516846SMarc Zyngier /* Number of L2 pages required to cover the VPEID space */ 25025e516846SMarc Zyngier nl2 = DIV_ROUND_UP(ITS_MAX_VPEID, epp); 25035e516846SMarc Zyngier 25045e516846SMarc Zyngier /* Number of L1 pages to point to the L2 pages */ 25055e516846SMarc Zyngier npg = DIV_ROUND_UP(nl2 * SZ_8, psz); 25065e516846SMarc Zyngier } else { 25075e516846SMarc Zyngier npg = 1; 25085e516846SMarc Zyngier } 25095e516846SMarc Zyngier 25105e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg); 25115e516846SMarc Zyngier 25125e516846SMarc Zyngier /* Right, that's the number of CPU pages we need for L1 */ 25135e516846SMarc Zyngier np = DIV_ROUND_UP(npg * psz, PAGE_SIZE); 25145e516846SMarc Zyngier 25155e516846SMarc Zyngier pr_debug("np = %d, npg = %lld, psz = %d, epp = %d, esz = %d\n", 25165e516846SMarc Zyngier np, npg, psz, epp, esz); 25175e516846SMarc Zyngier page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(np * PAGE_SIZE)); 25185e516846SMarc Zyngier if (!page) 25195e516846SMarc Zyngier return -ENOMEM; 25205e516846SMarc Zyngier 25215e516846SMarc Zyngier gic_data_rdist()->vpe_l1_page = page; 25225e516846SMarc Zyngier pa = virt_to_phys(page_address(page)); 25235e516846SMarc Zyngier WARN_ON(!IS_ALIGNED(pa, psz)); 25245e516846SMarc Zyngier 25255e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, pa >> 12); 25265e516846SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 25275e516846SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 25285e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_Z; 25295e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_VALID; 25305e516846SMarc Zyngier 25315e516846SMarc Zyngier out: 25325e516846SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 25335e516846SMarc Zyngier cpumask_set_cpu(smp_processor_id(), gic_data_rdist()->vpe_table_mask); 25345e516846SMarc Zyngier 25355e516846SMarc Zyngier pr_debug("CPU%d: VPROPBASER = %llx %*pbl\n", 25365e516846SMarc Zyngier smp_processor_id(), val, 25375e516846SMarc Zyngier cpumask_pr_args(gic_data_rdist()->vpe_table_mask)); 25385e516846SMarc Zyngier 25395e516846SMarc Zyngier return 0; 25405e516846SMarc Zyngier } 25415e516846SMarc Zyngier 25421ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 25431ac19ca6SMarc Zyngier { 254483559b47SMarc Zyngier int i; 254583559b47SMarc Zyngier 25466396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 25471ac19ca6SMarc Zyngier GFP_KERNEL); 25481ac19ca6SMarc Zyngier if (!its->collections) 25491ac19ca6SMarc Zyngier return -ENOMEM; 25501ac19ca6SMarc Zyngier 255183559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 255283559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 255383559b47SMarc Zyngier 25541ac19ca6SMarc Zyngier return 0; 25551ac19ca6SMarc Zyngier } 25561ac19ca6SMarc Zyngier 25577c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 25587c297a2dSMarc Zyngier { 25597c297a2dSMarc Zyngier struct page *pend_page; 2560adaab500SMarc Zyngier 25617c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 2562adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 25637c297a2dSMarc Zyngier if (!pend_page) 25647c297a2dSMarc Zyngier return NULL; 25657c297a2dSMarc Zyngier 25667c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 25677c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 25687c297a2dSMarc Zyngier 25697c297a2dSMarc Zyngier return pend_page; 25707c297a2dSMarc Zyngier } 25717c297a2dSMarc Zyngier 25727d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 25737d75bbb4SMarc Zyngier { 2574adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 25757d75bbb4SMarc Zyngier } 25767d75bbb4SMarc Zyngier 2577c6e2ccb6SMarc Zyngier /* 25785e2c9f9aSMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. Any other 25795e2c9f9aSMarc Zyngier * case is wrong in the absence of firmware/EFI support. 2580c6e2ccb6SMarc Zyngier */ 2581c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 2582c440a9d9SMarc Zyngier { 25835e2c9f9aSMarc Zyngier phys_addr_t addr; 25845e2c9f9aSMarc Zyngier u64 val; 2585c6e2ccb6SMarc Zyngier 25865e2c9f9aSMarc Zyngier /* Check whether the property table is in a reserved region */ 25875e2c9f9aSMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 25885e2c9f9aSMarc Zyngier addr = val & GENMASK_ULL(51, 12); 25895e2c9f9aSMarc Zyngier 25905e2c9f9aSMarc Zyngier return gic_check_reserved_range(addr, LPI_PROPBASE_SZ); 2591c440a9d9SMarc Zyngier } 2592c440a9d9SMarc Zyngier 259311e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 259411e37d35SMarc Zyngier { 2595c440a9d9SMarc Zyngier u64 val; 259611e37d35SMarc Zyngier int err, cpu; 259711e37d35SMarc Zyngier 2598c440a9d9SMarc Zyngier /* 2599c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 2600c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 2601c440a9d9SMarc Zyngier */ 2602c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 2603c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 2604c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 2605c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 2606c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 2607c440a9d9SMarc Zyngier } 2608c440a9d9SMarc Zyngier 260911e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 261011e37d35SMarc Zyngier if (err) 261111e37d35SMarc Zyngier return err; 261211e37d35SMarc Zyngier 261311e37d35SMarc Zyngier /* 261411e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 261511e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 261611e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 261711e37d35SMarc Zyngier */ 261811e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 261911e37d35SMarc Zyngier struct page *pend_page; 262011e37d35SMarc Zyngier 262111e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 262211e37d35SMarc Zyngier if (!pend_page) { 262311e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 262411e37d35SMarc Zyngier return -ENOMEM; 262511e37d35SMarc Zyngier } 262611e37d35SMarc Zyngier 262711e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 262811e37d35SMarc Zyngier } 262911e37d35SMarc Zyngier 263011e37d35SMarc Zyngier return 0; 263111e37d35SMarc Zyngier } 263211e37d35SMarc Zyngier 2633e64fab1aSMarc Zyngier static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set) 26346479450fSHeyi Guo { 26356479450fSHeyi Guo u32 count = 1000000; /* 1s! */ 26366479450fSHeyi Guo bool clean; 26376479450fSHeyi Guo u64 val; 26386479450fSHeyi Guo 26396479450fSHeyi Guo val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 26406479450fSHeyi Guo val &= ~GICR_VPENDBASER_Valid; 2641e64fab1aSMarc Zyngier val &= ~clr; 2642e64fab1aSMarc Zyngier val |= set; 26436479450fSHeyi Guo gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 26446479450fSHeyi Guo 26456479450fSHeyi Guo do { 26466479450fSHeyi Guo val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 26476479450fSHeyi Guo clean = !(val & GICR_VPENDBASER_Dirty); 26486479450fSHeyi Guo if (!clean) { 26496479450fSHeyi Guo count--; 26506479450fSHeyi Guo cpu_relax(); 26516479450fSHeyi Guo udelay(1); 26526479450fSHeyi Guo } 26536479450fSHeyi Guo } while (!clean && count); 26546479450fSHeyi Guo 2655e64fab1aSMarc Zyngier if (unlikely(val & GICR_VPENDBASER_Dirty)) { 2656e64fab1aSMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2657e64fab1aSMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2658e64fab1aSMarc Zyngier } 2659e64fab1aSMarc Zyngier 26606479450fSHeyi Guo return val; 26616479450fSHeyi Guo } 26626479450fSHeyi Guo 26631ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 26641ac19ca6SMarc Zyngier { 26651ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 26661ac19ca6SMarc Zyngier struct page *pend_page; 266711e37d35SMarc Zyngier phys_addr_t paddr; 26681ac19ca6SMarc Zyngier u64 val, tmp; 26691ac19ca6SMarc Zyngier 267011e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 26711ac19ca6SMarc Zyngier return; 26721ac19ca6SMarc Zyngier 2673c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 2674c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 2675c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 2676f842ca8eSMarc Zyngier /* 2677f842ca8eSMarc Zyngier * Check that we get the same property table on all 2678f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 2679f842ca8eSMarc Zyngier */ 2680f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 2681f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 2682f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 2683f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 2684f842ca8eSMarc Zyngier 2685c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2686c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 2687c440a9d9SMarc Zyngier 26885e2c9f9aSMarc Zyngier WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ)); 2689c440a9d9SMarc Zyngier its_free_pending_table(gic_data_rdist()->pend_page); 2690c440a9d9SMarc Zyngier gic_data_rdist()->pend_page = NULL; 2691c440a9d9SMarc Zyngier 2692c440a9d9SMarc Zyngier goto out; 2693c440a9d9SMarc Zyngier } 2694c440a9d9SMarc Zyngier 269511e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 26961ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 26973fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 26981ac19ca6SMarc Zyngier 26991ac19ca6SMarc Zyngier /* set PROPBASE */ 2700e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 27011ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 27022fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 27031ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 27041ac19ca6SMarc Zyngier 27050968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 27060968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 27071ac19ca6SMarc Zyngier 27081ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 2709241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 2710241a386cSMarc Zyngier /* 2711241a386cSMarc Zyngier * The HW reports non-shareable, we must 2712241a386cSMarc Zyngier * remove the cacheability attributes as 2713241a386cSMarc Zyngier * well. 2714241a386cSMarc Zyngier */ 2715241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 2716241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 2717241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 27180968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 2719241a386cSMarc Zyngier } 27201ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 27211ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 27221ac19ca6SMarc Zyngier } 27231ac19ca6SMarc Zyngier 27241ac19ca6SMarc Zyngier /* set PENDBASE */ 27251ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 27264ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 27272fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 27281ac19ca6SMarc Zyngier 27290968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 27300968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2731241a386cSMarc Zyngier 2732241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 2733241a386cSMarc Zyngier /* 2734241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 2735241a386cSMarc Zyngier * cacheability attributes as well. 2736241a386cSMarc Zyngier */ 2737241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 2738241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 2739241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 27400968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 2741241a386cSMarc Zyngier } 27421ac19ca6SMarc Zyngier 27431ac19ca6SMarc Zyngier /* Enable LPIs */ 27441ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 27451ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 27461ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 27471ac19ca6SMarc Zyngier 27485e516846SMarc Zyngier if (gic_rdists->has_vlpis && !gic_rdists->has_rvpeid) { 27496479450fSHeyi Guo void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 27506479450fSHeyi Guo 27516479450fSHeyi Guo /* 27526479450fSHeyi Guo * It's possible for CPU to receive VLPIs before it is 27536479450fSHeyi Guo * sheduled as a vPE, especially for the first CPU, and the 27546479450fSHeyi Guo * VLPI with INTID larger than 2^(IDbits+1) will be considered 27556479450fSHeyi Guo * as out of range and dropped by GIC. 27566479450fSHeyi Guo * So we initialize IDbits to known value to avoid VLPI drop. 27576479450fSHeyi Guo */ 27586479450fSHeyi Guo val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 27596479450fSHeyi Guo pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n", 27606479450fSHeyi Guo smp_processor_id(), val); 27616479450fSHeyi Guo gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 27626479450fSHeyi Guo 27636479450fSHeyi Guo /* 27646479450fSHeyi Guo * Also clear Valid bit of GICR_VPENDBASER, in case some 27656479450fSHeyi Guo * ancient programming gets left in and has possibility of 27666479450fSHeyi Guo * corrupting memory. 27676479450fSHeyi Guo */ 2768e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 27696479450fSHeyi Guo WARN_ON(val & GICR_VPENDBASER_Dirty); 27706479450fSHeyi Guo } 27716479450fSHeyi Guo 27725e516846SMarc Zyngier if (allocate_vpe_l1_table()) { 27735e516846SMarc Zyngier /* 27745e516846SMarc Zyngier * If the allocation has failed, we're in massive trouble. 27755e516846SMarc Zyngier * Disable direct injection, and pray that no VM was 27765e516846SMarc Zyngier * already running... 27775e516846SMarc Zyngier */ 27785e516846SMarc Zyngier gic_rdists->has_rvpeid = false; 27795e516846SMarc Zyngier gic_rdists->has_vlpis = false; 27805e516846SMarc Zyngier } 27815e516846SMarc Zyngier 27821ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 27831ac19ca6SMarc Zyngier dsb(sy); 2784c440a9d9SMarc Zyngier out: 278511e37d35SMarc Zyngier gic_data_rdist()->lpi_enabled = true; 2786c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 278711e37d35SMarc Zyngier smp_processor_id(), 2788c440a9d9SMarc Zyngier gic_data_rdist()->pend_page ? "allocated" : "reserved", 278911e37d35SMarc Zyngier &paddr); 27901ac19ca6SMarc Zyngier } 27911ac19ca6SMarc Zyngier 2792920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 27931ac19ca6SMarc Zyngier { 2794920181ceSDerek Basehore int cpu = smp_processor_id(); 27951ac19ca6SMarc Zyngier u64 target; 27961ac19ca6SMarc Zyngier 2797fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 2798fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 2799fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 2800fbf8f40eSGanapatrao Kulkarni 2801fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 2802fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 2803fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 2804920181ceSDerek Basehore return; 2805fbf8f40eSGanapatrao Kulkarni } 2806fbf8f40eSGanapatrao Kulkarni 28071ac19ca6SMarc Zyngier /* 28081ac19ca6SMarc Zyngier * We now have to bind each collection to its target 28091ac19ca6SMarc Zyngier * redistributor. 28101ac19ca6SMarc Zyngier */ 2811589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 28121ac19ca6SMarc Zyngier /* 28131ac19ca6SMarc Zyngier * This ITS wants the physical address of the 28141ac19ca6SMarc Zyngier * redistributor. 28151ac19ca6SMarc Zyngier */ 28161ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 28171ac19ca6SMarc Zyngier } else { 2818920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 2819589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 2820263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 28211ac19ca6SMarc Zyngier } 28221ac19ca6SMarc Zyngier 28231ac19ca6SMarc Zyngier /* Perform collection mapping */ 28241ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 28251ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 28261ac19ca6SMarc Zyngier 28271ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 28281ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 28291ac19ca6SMarc Zyngier } 28301ac19ca6SMarc Zyngier 2831920181ceSDerek Basehore static void its_cpu_init_collections(void) 2832920181ceSDerek Basehore { 2833920181ceSDerek Basehore struct its_node *its; 2834920181ceSDerek Basehore 2835a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 2836920181ceSDerek Basehore 2837920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 2838920181ceSDerek Basehore its_cpu_init_collection(its); 2839920181ceSDerek Basehore 2840a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 28411ac19ca6SMarc Zyngier } 284284a6a2e7SMarc Zyngier 284384a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 284484a6a2e7SMarc Zyngier { 284584a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 28463e39e8f5SMarc Zyngier unsigned long flags; 284784a6a2e7SMarc Zyngier 28483e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 284984a6a2e7SMarc Zyngier 285084a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 285184a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 285284a6a2e7SMarc Zyngier its_dev = tmp; 285384a6a2e7SMarc Zyngier break; 285484a6a2e7SMarc Zyngier } 285584a6a2e7SMarc Zyngier } 285684a6a2e7SMarc Zyngier 28573e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 285884a6a2e7SMarc Zyngier 285984a6a2e7SMarc Zyngier return its_dev; 286084a6a2e7SMarc Zyngier } 286184a6a2e7SMarc Zyngier 2862466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 2863466b7d16SShanker Donthineni { 2864466b7d16SShanker Donthineni int i; 2865466b7d16SShanker Donthineni 2866466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 2867466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 2868466b7d16SShanker Donthineni return &its->tables[i]; 2869466b7d16SShanker Donthineni } 2870466b7d16SShanker Donthineni 2871466b7d16SShanker Donthineni return NULL; 2872466b7d16SShanker Donthineni } 2873466b7d16SShanker Donthineni 2874539d3782SShanker Donthineni static bool its_alloc_table_entry(struct its_node *its, 2875539d3782SShanker Donthineni struct its_baser *baser, u32 id) 28763faf24eaSShanker Donthineni { 28773faf24eaSShanker Donthineni struct page *page; 28783faf24eaSShanker Donthineni u32 esz, idx; 28793faf24eaSShanker Donthineni __le64 *table; 28803faf24eaSShanker Donthineni 28813faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 28823faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 28833faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 288470cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 28853faf24eaSShanker Donthineni 28863faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 288770cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 28883faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 28893faf24eaSShanker Donthineni return false; 28903faf24eaSShanker Donthineni 28913faf24eaSShanker Donthineni table = baser->base; 28923faf24eaSShanker Donthineni 28933faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 28943faf24eaSShanker Donthineni if (!table[idx]) { 2895539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 2896539d3782SShanker Donthineni get_order(baser->psz)); 28973faf24eaSShanker Donthineni if (!page) 28983faf24eaSShanker Donthineni return false; 28993faf24eaSShanker Donthineni 29003faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 29013faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2902328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 29033faf24eaSShanker Donthineni 29043faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 29053faf24eaSShanker Donthineni 29063faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 29073faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2908328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 29093faf24eaSShanker Donthineni 29103faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 29113faf24eaSShanker Donthineni dsb(sy); 29123faf24eaSShanker Donthineni } 29133faf24eaSShanker Donthineni 29143faf24eaSShanker Donthineni return true; 29153faf24eaSShanker Donthineni } 29163faf24eaSShanker Donthineni 291770cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 291870cc81edSMarc Zyngier { 291970cc81edSMarc Zyngier struct its_baser *baser; 292070cc81edSMarc Zyngier 292170cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 292270cc81edSMarc Zyngier 292370cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 292470cc81edSMarc Zyngier if (!baser) 2925576a8342SMarc Zyngier return (ilog2(dev_id) < device_ids(its)); 292670cc81edSMarc Zyngier 2927539d3782SShanker Donthineni return its_alloc_table_entry(its, baser, dev_id); 292870cc81edSMarc Zyngier } 292970cc81edSMarc Zyngier 29307d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 29317d75bbb4SMarc Zyngier { 29327d75bbb4SMarc Zyngier struct its_node *its; 29337d75bbb4SMarc Zyngier 29347d75bbb4SMarc Zyngier /* 29357d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 29367d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 29377d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 29387d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 29397d75bbb4SMarc Zyngier * anyway, right?). 29407d75bbb4SMarc Zyngier */ 29417d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 29427d75bbb4SMarc Zyngier struct its_baser *baser; 29437d75bbb4SMarc Zyngier 29440dd57fedSMarc Zyngier if (!is_v4(its)) 29457d75bbb4SMarc Zyngier continue; 29467d75bbb4SMarc Zyngier 29477d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 29487d75bbb4SMarc Zyngier if (!baser) 29497d75bbb4SMarc Zyngier return false; 29507d75bbb4SMarc Zyngier 2951539d3782SShanker Donthineni if (!its_alloc_table_entry(its, baser, vpe_id)) 29527d75bbb4SMarc Zyngier return false; 29537d75bbb4SMarc Zyngier } 29547d75bbb4SMarc Zyngier 29557d75bbb4SMarc Zyngier return true; 29567d75bbb4SMarc Zyngier } 29577d75bbb4SMarc Zyngier 295884a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 295993f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 296084a6a2e7SMarc Zyngier { 296184a6a2e7SMarc Zyngier struct its_device *dev; 296293f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 29633e39e8f5SMarc Zyngier unsigned long flags; 2964591e5becSMarc Zyngier u16 *col_map = NULL; 296584a6a2e7SMarc Zyngier void *itt; 296684a6a2e7SMarc Zyngier int lpi_base; 296784a6a2e7SMarc Zyngier int nr_lpis; 2968c8481267SMarc Zyngier int nr_ites; 296984a6a2e7SMarc Zyngier int sz; 297084a6a2e7SMarc Zyngier 29713faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2972466b7d16SShanker Donthineni return NULL; 2973466b7d16SShanker Donthineni 2974147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 2975147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 2976147c8f37SMarc Zyngier 297784a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2978c8481267SMarc Zyngier /* 2979147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 2980147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 2981c8481267SMarc Zyngier */ 2982147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 2983ffedbf0cSMarc Zyngier sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); 298484a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 2985539d3782SShanker Donthineni itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); 298693f94ea0SMarc Zyngier if (alloc_lpis) { 298738dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 2988591e5becSMarc Zyngier if (lpi_map) 29896396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 299093f94ea0SMarc Zyngier GFP_KERNEL); 299193f94ea0SMarc Zyngier } else { 29926396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 299393f94ea0SMarc Zyngier nr_lpis = 0; 299493f94ea0SMarc Zyngier lpi_base = 0; 299593f94ea0SMarc Zyngier } 299684a6a2e7SMarc Zyngier 299793f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 299884a6a2e7SMarc Zyngier kfree(dev); 299984a6a2e7SMarc Zyngier kfree(itt); 300084a6a2e7SMarc Zyngier kfree(lpi_map); 3001591e5becSMarc Zyngier kfree(col_map); 300284a6a2e7SMarc Zyngier return NULL; 300384a6a2e7SMarc Zyngier } 300484a6a2e7SMarc Zyngier 3005328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 30065a9a8915SMarc Zyngier 300784a6a2e7SMarc Zyngier dev->its = its; 300884a6a2e7SMarc Zyngier dev->itt = itt; 3009c8481267SMarc Zyngier dev->nr_ites = nr_ites; 3010591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 3011591e5becSMarc Zyngier dev->event_map.col_map = col_map; 3012591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 3013591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 301411635fa2SMarc Zyngier raw_spin_lock_init(&dev->event_map.vlpi_lock); 301584a6a2e7SMarc Zyngier dev->device_id = dev_id; 301684a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 301784a6a2e7SMarc Zyngier 30183e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 301984a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 30203e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 302184a6a2e7SMarc Zyngier 302284a6a2e7SMarc Zyngier /* Map device to its ITT */ 302384a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 302484a6a2e7SMarc Zyngier 302584a6a2e7SMarc Zyngier return dev; 302684a6a2e7SMarc Zyngier } 302784a6a2e7SMarc Zyngier 302884a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 302984a6a2e7SMarc Zyngier { 30303e39e8f5SMarc Zyngier unsigned long flags; 30313e39e8f5SMarc Zyngier 30323e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 303384a6a2e7SMarc Zyngier list_del(&its_dev->entry); 30343e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 3035898aa5ceSMarc Zyngier kfree(its_dev->event_map.col_map); 303684a6a2e7SMarc Zyngier kfree(its_dev->itt); 303784a6a2e7SMarc Zyngier kfree(its_dev); 303884a6a2e7SMarc Zyngier } 3039b48ac83dSMarc Zyngier 30408208d170SMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) 3041b48ac83dSMarc Zyngier { 3042b48ac83dSMarc Zyngier int idx; 3043b48ac83dSMarc Zyngier 3044342be106SZenghui Yu /* Find a free LPI region in lpi_map and allocate them. */ 30458208d170SMarc Zyngier idx = bitmap_find_free_region(dev->event_map.lpi_map, 30468208d170SMarc Zyngier dev->event_map.nr_lpis, 30478208d170SMarc Zyngier get_count_order(nvecs)); 30488208d170SMarc Zyngier if (idx < 0) 3049b48ac83dSMarc Zyngier return -ENOSPC; 3050b48ac83dSMarc Zyngier 3051591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 3052b48ac83dSMarc Zyngier 3053b48ac83dSMarc Zyngier return 0; 3054b48ac83dSMarc Zyngier } 3055b48ac83dSMarc Zyngier 305654456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 3057b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 3058b48ac83dSMarc Zyngier { 3059b48ac83dSMarc Zyngier struct its_node *its; 3060b48ac83dSMarc Zyngier struct its_device *its_dev; 306154456db9SMarc Zyngier struct msi_domain_info *msi_info; 306254456db9SMarc Zyngier u32 dev_id; 30639791ec7dSMarc Zyngier int err = 0; 3064b48ac83dSMarc Zyngier 306554456db9SMarc Zyngier /* 3066a7c90f51SJulien Grall * We ignore "dev" entirely, and rely on the dev_id that has 306754456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 306854456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 306954456db9SMarc Zyngier * are built on top of the ITS. 307054456db9SMarc Zyngier */ 307154456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 307254456db9SMarc Zyngier 307354456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 307454456db9SMarc Zyngier its = msi_info->data; 307554456db9SMarc Zyngier 307620b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 307720b3d54eSMarc Zyngier vpe_proxy.dev && 307820b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 307920b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 308020b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 308120b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 308220b3d54eSMarc Zyngier dev_id); 308320b3d54eSMarc Zyngier return -EINVAL; 308420b3d54eSMarc Zyngier } 308520b3d54eSMarc Zyngier 30869791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 3087f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 3088e8137f4fSMarc Zyngier if (its_dev) { 3089e8137f4fSMarc Zyngier /* 3090e8137f4fSMarc Zyngier * We already have seen this ID, probably through 3091e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 3092e8137f4fSMarc Zyngier * create the device. 3093e8137f4fSMarc Zyngier */ 30949791ec7dSMarc Zyngier its_dev->shared = true; 3095f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 3096e8137f4fSMarc Zyngier goto out; 3097e8137f4fSMarc Zyngier } 3098b48ac83dSMarc Zyngier 309993f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 31009791ec7dSMarc Zyngier if (!its_dev) { 31019791ec7dSMarc Zyngier err = -ENOMEM; 31029791ec7dSMarc Zyngier goto out; 31039791ec7dSMarc Zyngier } 3104b48ac83dSMarc Zyngier 3105f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 3106e8137f4fSMarc Zyngier out: 31079791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 3108b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 31099791ec7dSMarc Zyngier return err; 3110b48ac83dSMarc Zyngier } 3111b48ac83dSMarc Zyngier 311254456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 311354456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 311454456db9SMarc Zyngier }; 311554456db9SMarc Zyngier 3116b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 3117b48ac83dSMarc Zyngier unsigned int virq, 3118b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 3119b48ac83dSMarc Zyngier { 3120f833f57fSMarc Zyngier struct irq_fwspec fwspec; 3121b48ac83dSMarc Zyngier 3122f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 3123f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 3124f833f57fSMarc Zyngier fwspec.param_count = 3; 3125f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 3126f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 3127f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 31283f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 31293f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 31303f010cf1STomasz Nowicki fwspec.param_count = 2; 31313f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 31323f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 3133f833f57fSMarc Zyngier } else { 3134f833f57fSMarc Zyngier return -EINVAL; 3135f833f57fSMarc Zyngier } 3136b48ac83dSMarc Zyngier 3137f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 3138b48ac83dSMarc Zyngier } 3139b48ac83dSMarc Zyngier 3140b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 3141b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 3142b48ac83dSMarc Zyngier { 3143b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 3144b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 314535ae7df2SJulien Grall struct its_node *its = its_dev->its; 3146b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 3147b48ac83dSMarc Zyngier int err; 3148b48ac83dSMarc Zyngier int i; 3149b48ac83dSMarc Zyngier 31508208d170SMarc Zyngier err = its_alloc_device_irq(its_dev, nr_irqs, &hwirq); 3151b48ac83dSMarc Zyngier if (err) 3152b48ac83dSMarc Zyngier return err; 3153b48ac83dSMarc Zyngier 315435ae7df2SJulien Grall err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); 315535ae7df2SJulien Grall if (err) 315635ae7df2SJulien Grall return err; 315735ae7df2SJulien Grall 31588208d170SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 31598208d170SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); 3160b48ac83dSMarc Zyngier if (err) 3161b48ac83dSMarc Zyngier return err; 3162b48ac83dSMarc Zyngier 3163b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 31648208d170SMarc Zyngier hwirq + i, &its_irq_chip, its_dev); 31650d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 3166f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 31678208d170SMarc Zyngier (int)(hwirq + i - its_dev->event_map.lpi_base), 31688208d170SMarc Zyngier (int)(hwirq + i), virq + i); 3169b48ac83dSMarc Zyngier } 3170b48ac83dSMarc Zyngier 3171b48ac83dSMarc Zyngier return 0; 3172b48ac83dSMarc Zyngier } 3173b48ac83dSMarc Zyngier 317472491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 3175702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3176aca268dfSMarc Zyngier { 3177aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3178aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 3179fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 31800d224d35SMarc Zyngier int cpu; 3181fbf8f40eSGanapatrao Kulkarni 3182fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 3183fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 3184fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 3185aca268dfSMarc Zyngier 3186591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 3187c1797b11SYang Yingliang cpu = cpumask_first_and(cpu_mask, cpu_online_mask); 3188c1797b11SYang Yingliang if (cpu >= nr_cpu_ids) { 3189c1797b11SYang Yingliang if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) 3190c1797b11SYang Yingliang return -EINVAL; 3191c1797b11SYang Yingliang 3192c1797b11SYang Yingliang cpu = cpumask_first(cpu_online_mask); 3193c1797b11SYang Yingliang } 3194c1797b11SYang Yingliang 31950d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 31960d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3197591e5becSMarc Zyngier 3198aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 31996a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 320072491643SThomas Gleixner return 0; 3201aca268dfSMarc Zyngier } 3202aca268dfSMarc Zyngier 3203aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 3204aca268dfSMarc Zyngier struct irq_data *d) 3205aca268dfSMarc Zyngier { 3206aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3207aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 3208aca268dfSMarc Zyngier 3209aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 3210aca268dfSMarc Zyngier its_send_discard(its_dev, event); 3211aca268dfSMarc Zyngier } 3212aca268dfSMarc Zyngier 3213b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 3214b48ac83dSMarc Zyngier unsigned int nr_irqs) 3215b48ac83dSMarc Zyngier { 3216b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 3217b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 32189791ec7dSMarc Zyngier struct its_node *its = its_dev->its; 3219b48ac83dSMarc Zyngier int i; 3220b48ac83dSMarc Zyngier 3221c9c96e30SMarc Zyngier bitmap_release_region(its_dev->event_map.lpi_map, 3222c9c96e30SMarc Zyngier its_get_event_id(irq_domain_get_irq_data(domain, virq)), 3223c9c96e30SMarc Zyngier get_count_order(nr_irqs)); 3224c9c96e30SMarc Zyngier 3225b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 3226b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 3227b48ac83dSMarc Zyngier virq + i); 3228b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 32292da39949SMarc Zyngier irq_domain_reset_irq_data(data); 3230b48ac83dSMarc Zyngier } 3231b48ac83dSMarc Zyngier 32329791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 32339791ec7dSMarc Zyngier 32349791ec7dSMarc Zyngier /* 32359791ec7dSMarc Zyngier * If all interrupts have been freed, start mopping the 32369791ec7dSMarc Zyngier * floor. This is conditionned on the device not being shared. 32379791ec7dSMarc Zyngier */ 32389791ec7dSMarc Zyngier if (!its_dev->shared && 32399791ec7dSMarc Zyngier bitmap_empty(its_dev->event_map.lpi_map, 3240591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 324138dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 3242cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 3243cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 3244b48ac83dSMarc Zyngier 3245b48ac83dSMarc Zyngier /* Unmap device/itt */ 3246b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 3247b48ac83dSMarc Zyngier its_free_device(its_dev); 3248b48ac83dSMarc Zyngier } 3249b48ac83dSMarc Zyngier 32509791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 32519791ec7dSMarc Zyngier 3252b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 3253b48ac83dSMarc Zyngier } 3254b48ac83dSMarc Zyngier 3255b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 3256b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 3257b48ac83dSMarc Zyngier .free = its_irq_domain_free, 3258aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 3259aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 3260b48ac83dSMarc Zyngier }; 32614c21f3c2SMarc Zyngier 326220b3d54eSMarc Zyngier /* 326320b3d54eSMarc Zyngier * This is insane. 326420b3d54eSMarc Zyngier * 32650684c704SMarc Zyngier * If a GICv4.0 doesn't implement Direct LPIs (which is extremely 326620b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 326720b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 326820b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 326920b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 327020b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 327120b3d54eSMarc Zyngier * 327220b3d54eSMarc Zyngier * Broken by design(tm). 32730684c704SMarc Zyngier * 32740684c704SMarc Zyngier * GICv4.1, on the other hand, mandates that we're able to invalidate 32750684c704SMarc Zyngier * by writing to a MMIO register. It doesn't implement the whole of 32760684c704SMarc Zyngier * DirectLPI, but that's good enough. And most of the time, we don't 32770684c704SMarc Zyngier * even have to invalidate anything, as the redistributor can be told 32780684c704SMarc Zyngier * whether to generate a doorbell or not (we thus leave it enabled, 32790684c704SMarc Zyngier * always). 328020b3d54eSMarc Zyngier */ 328120b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 328220b3d54eSMarc Zyngier { 32830684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 32840684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 32850684c704SMarc Zyngier return; 32860684c704SMarc Zyngier 328720b3d54eSMarc Zyngier /* Already unmapped? */ 328820b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 328920b3d54eSMarc Zyngier return; 329020b3d54eSMarc Zyngier 329120b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 329220b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 329320b3d54eSMarc Zyngier 329420b3d54eSMarc Zyngier /* 329520b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 329620b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 329720b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 329820b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 329920b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 330020b3d54eSMarc Zyngier */ 330120b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 330220b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 330320b3d54eSMarc Zyngier 330420b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 330520b3d54eSMarc Zyngier } 330620b3d54eSMarc Zyngier 330720b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 330820b3d54eSMarc Zyngier { 33090684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 33100684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 33110684c704SMarc Zyngier return; 33120684c704SMarc Zyngier 331320b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 331420b3d54eSMarc Zyngier unsigned long flags; 331520b3d54eSMarc Zyngier 331620b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 331720b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 331820b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 331920b3d54eSMarc Zyngier } 332020b3d54eSMarc Zyngier } 332120b3d54eSMarc Zyngier 332220b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 332320b3d54eSMarc Zyngier { 33240684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 33250684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 33260684c704SMarc Zyngier return; 33270684c704SMarc Zyngier 332820b3d54eSMarc Zyngier /* Already mapped? */ 332920b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 333020b3d54eSMarc Zyngier return; 333120b3d54eSMarc Zyngier 333220b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 333320b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 333420b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 333520b3d54eSMarc Zyngier 333620b3d54eSMarc Zyngier /* Map the new VPE instead */ 333720b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 333820b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 333920b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 334020b3d54eSMarc Zyngier 334120b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 334220b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 334320b3d54eSMarc Zyngier } 334420b3d54eSMarc Zyngier 3345958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 3346958b90d1SMarc Zyngier { 3347958b90d1SMarc Zyngier unsigned long flags; 3348958b90d1SMarc Zyngier struct its_collection *target_col; 3349958b90d1SMarc Zyngier 33500684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 33510684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 33520684c704SMarc Zyngier return; 33530684c704SMarc Zyngier 3354958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3355958b90d1SMarc Zyngier void __iomem *rdbase; 3356958b90d1SMarc Zyngier 3357958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 3358958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 33592f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3360958b90d1SMarc Zyngier 3361958b90d1SMarc Zyngier return; 3362958b90d1SMarc Zyngier } 3363958b90d1SMarc Zyngier 3364958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 3365958b90d1SMarc Zyngier 3366958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 3367958b90d1SMarc Zyngier 3368958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 3369958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 3370958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 3371958b90d1SMarc Zyngier 3372958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 3373958b90d1SMarc Zyngier } 3374958b90d1SMarc Zyngier 33753171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 33763171a47aSMarc Zyngier const struct cpumask *mask_val, 33773171a47aSMarc Zyngier bool force) 33783171a47aSMarc Zyngier { 33793171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3380dd3f050aSMarc Zyngier int from, cpu = cpumask_first(mask_val); 33813171a47aSMarc Zyngier 33823171a47aSMarc Zyngier /* 33833171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 338420b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 3385958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 3386958b90d1SMarc Zyngier * interrupt to its new location. 33873171a47aSMarc Zyngier */ 3388dd3f050aSMarc Zyngier if (vpe->col_idx == cpu) 3389dd3f050aSMarc Zyngier goto out; 3390958b90d1SMarc Zyngier 3391dd3f050aSMarc Zyngier from = vpe->col_idx; 33923171a47aSMarc Zyngier vpe->col_idx = cpu; 3393dd3f050aSMarc Zyngier 3394dd3f050aSMarc Zyngier /* 3395dd3f050aSMarc Zyngier * GICv4.1 allows us to skip VMOVP if moving to a cpu whose RD 3396dd3f050aSMarc Zyngier * is sharing its VPE table with the current one. 3397dd3f050aSMarc Zyngier */ 3398dd3f050aSMarc Zyngier if (gic_data_rdist_cpu(cpu)->vpe_table_mask && 3399dd3f050aSMarc Zyngier cpumask_test_cpu(from, gic_data_rdist_cpu(cpu)->vpe_table_mask)) 3400dd3f050aSMarc Zyngier goto out; 3401dd3f050aSMarc Zyngier 34023171a47aSMarc Zyngier its_send_vmovp(vpe); 3403958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 34043171a47aSMarc Zyngier 3405dd3f050aSMarc Zyngier out: 340644c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 340744c4c25eSMarc Zyngier 34083171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 34093171a47aSMarc Zyngier } 34103171a47aSMarc Zyngier 3411e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 3412e643d803SMarc Zyngier { 341350c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3414e643d803SMarc Zyngier u64 val; 3415e643d803SMarc Zyngier 3416e643d803SMarc Zyngier /* Schedule the VPE */ 3417e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 3418e643d803SMarc Zyngier GENMASK_ULL(51, 12); 3419e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 3420e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 3421e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 3422e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 3423e643d803SMarc Zyngier 3424e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 3425e643d803SMarc Zyngier GENMASK_ULL(51, 16); 3426e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 3427e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 3428e643d803SMarc Zyngier /* 3429e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 3430e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 3431e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 3432e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 3433e643d803SMarc Zyngier * that the pending table is empty. A good implementation 3434e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 3435e643d803SMarc Zyngier * making this a tolerable issue. 3436e643d803SMarc Zyngier */ 3437e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 3438e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 3439e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 3440e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 3441e643d803SMarc Zyngier } 3442e643d803SMarc Zyngier 3443e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 3444e643d803SMarc Zyngier { 344550c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3446e643d803SMarc Zyngier u64 val; 3447e643d803SMarc Zyngier 3448e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 3449e643d803SMarc Zyngier 3450e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 3451e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 3452e643d803SMarc Zyngier } 3453e643d803SMarc Zyngier 345440619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 345540619a2eSMarc Zyngier { 345640619a2eSMarc Zyngier struct its_node *its; 345740619a2eSMarc Zyngier 345840619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 34590dd57fedSMarc Zyngier if (!is_v4(its)) 346040619a2eSMarc Zyngier continue; 346140619a2eSMarc Zyngier 34622247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 34632247e1bfSMarc Zyngier continue; 34642247e1bfSMarc Zyngier 34653c1cceebSMarc Zyngier /* 34663c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 34673c1cceebSMarc Zyngier * we need is to reach the redistributors. 34683c1cceebSMarc Zyngier */ 346940619a2eSMarc Zyngier its_send_vinvall(its, vpe); 34703c1cceebSMarc Zyngier return; 347140619a2eSMarc Zyngier } 347240619a2eSMarc Zyngier } 347340619a2eSMarc Zyngier 3474e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 3475e643d803SMarc Zyngier { 3476e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3477e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 3478e643d803SMarc Zyngier 3479e643d803SMarc Zyngier switch (info->cmd_type) { 3480e643d803SMarc Zyngier case SCHEDULE_VPE: 3481e643d803SMarc Zyngier its_vpe_schedule(vpe); 3482e643d803SMarc Zyngier return 0; 3483e643d803SMarc Zyngier 3484e643d803SMarc Zyngier case DESCHEDULE_VPE: 3485e643d803SMarc Zyngier its_vpe_deschedule(vpe); 3486e643d803SMarc Zyngier return 0; 3487e643d803SMarc Zyngier 34885e2f7642SMarc Zyngier case INVALL_VPE: 348940619a2eSMarc Zyngier its_vpe_invall(vpe); 34905e2f7642SMarc Zyngier return 0; 34915e2f7642SMarc Zyngier 3492e643d803SMarc Zyngier default: 3493e643d803SMarc Zyngier return -EINVAL; 3494e643d803SMarc Zyngier } 3495e643d803SMarc Zyngier } 3496e643d803SMarc Zyngier 349720b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 349820b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 349920b3d54eSMarc Zyngier { 350020b3d54eSMarc Zyngier unsigned long flags; 350120b3d54eSMarc Zyngier 350220b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 350320b3d54eSMarc Zyngier 350420b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 350520b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 350620b3d54eSMarc Zyngier 350720b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 350820b3d54eSMarc Zyngier } 350920b3d54eSMarc Zyngier 3510f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 3511f6a91da7SMarc Zyngier { 3512f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 351320b3d54eSMarc Zyngier 351420b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 3515f6a91da7SMarc Zyngier void __iomem *rdbase; 3516f6a91da7SMarc Zyngier 3517425c09beSMarc Zyngier /* Target the redistributor this VPE is currently known on */ 3518f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3519425c09beSMarc Zyngier gic_write_lpir(d->parent_data->hwirq, rdbase + GICR_INVLPIR); 35202f4f064bSMarc Zyngier wait_for_syncr(rdbase); 352120b3d54eSMarc Zyngier } else { 352220b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 352320b3d54eSMarc Zyngier } 3524f6a91da7SMarc Zyngier } 3525f6a91da7SMarc Zyngier 3526f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 3527f6a91da7SMarc Zyngier { 3528f6a91da7SMarc Zyngier /* 3529f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 3530f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 3531f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 3532f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 3533f6a91da7SMarc Zyngier */ 3534f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 3535f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3536f6a91da7SMarc Zyngier } 3537f6a91da7SMarc Zyngier 3538f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 3539f6a91da7SMarc Zyngier { 3540f6a91da7SMarc Zyngier /* Same hack as above... */ 3541f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 3542f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3543f6a91da7SMarc Zyngier } 3544f6a91da7SMarc Zyngier 3545e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 3546e57a3e28SMarc Zyngier enum irqchip_irq_state which, 3547e57a3e28SMarc Zyngier bool state) 3548e57a3e28SMarc Zyngier { 3549e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3550e57a3e28SMarc Zyngier 3551e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 3552e57a3e28SMarc Zyngier return -EINVAL; 3553e57a3e28SMarc Zyngier 3554e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3555e57a3e28SMarc Zyngier void __iomem *rdbase; 3556e57a3e28SMarc Zyngier 3557e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3558e57a3e28SMarc Zyngier if (state) { 3559e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 3560e57a3e28SMarc Zyngier } else { 3561e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 35622f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3563e57a3e28SMarc Zyngier } 3564e57a3e28SMarc Zyngier } else { 3565e57a3e28SMarc Zyngier if (state) 3566e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 3567e57a3e28SMarc Zyngier else 3568e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 3569e57a3e28SMarc Zyngier } 3570e57a3e28SMarc Zyngier 3571e57a3e28SMarc Zyngier return 0; 3572e57a3e28SMarc Zyngier } 3573e57a3e28SMarc Zyngier 35748fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 35758fff27aeSMarc Zyngier .name = "GICv4-vpe", 3576f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 3577f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 3578f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 35793171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 3580e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 3581e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 35828fff27aeSMarc Zyngier }; 35838fff27aeSMarc Zyngier 3584d97c97baSMarc Zyngier static struct its_node *find_4_1_its(void) 3585d97c97baSMarc Zyngier { 3586d97c97baSMarc Zyngier static struct its_node *its = NULL; 3587d97c97baSMarc Zyngier 3588d97c97baSMarc Zyngier if (!its) { 3589d97c97baSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 3590d97c97baSMarc Zyngier if (is_v4_1(its)) 3591d97c97baSMarc Zyngier return its; 3592d97c97baSMarc Zyngier } 3593d97c97baSMarc Zyngier 3594d97c97baSMarc Zyngier /* Oops? */ 3595d97c97baSMarc Zyngier its = NULL; 3596d97c97baSMarc Zyngier } 3597d97c97baSMarc Zyngier 3598d97c97baSMarc Zyngier return its; 3599d97c97baSMarc Zyngier } 3600d97c97baSMarc Zyngier 3601d97c97baSMarc Zyngier static void its_vpe_4_1_send_inv(struct irq_data *d) 3602d97c97baSMarc Zyngier { 3603d97c97baSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3604d97c97baSMarc Zyngier struct its_node *its; 3605d97c97baSMarc Zyngier 3606d97c97baSMarc Zyngier /* 3607d97c97baSMarc Zyngier * GICv4.1 wants doorbells to be invalidated using the 3608d97c97baSMarc Zyngier * INVDB command in order to be broadcast to all RDs. Send 3609d97c97baSMarc Zyngier * it to the first valid ITS, and let the HW do its magic. 3610d97c97baSMarc Zyngier */ 3611d97c97baSMarc Zyngier its = find_4_1_its(); 3612d97c97baSMarc Zyngier if (its) 3613d97c97baSMarc Zyngier its_send_invdb(its, vpe); 3614d97c97baSMarc Zyngier } 3615d97c97baSMarc Zyngier 3616d97c97baSMarc Zyngier static void its_vpe_4_1_mask_irq(struct irq_data *d) 3617d97c97baSMarc Zyngier { 3618d97c97baSMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 3619d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 3620d97c97baSMarc Zyngier } 3621d97c97baSMarc Zyngier 3622d97c97baSMarc Zyngier static void its_vpe_4_1_unmask_irq(struct irq_data *d) 3623d97c97baSMarc Zyngier { 3624d97c97baSMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 3625d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 3626d97c97baSMarc Zyngier } 3627d97c97baSMarc Zyngier 362891bf6395SMarc Zyngier static void its_vpe_4_1_schedule(struct its_vpe *vpe, 362991bf6395SMarc Zyngier struct its_cmd_info *info) 363091bf6395SMarc Zyngier { 363191bf6395SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 363291bf6395SMarc Zyngier u64 val = 0; 363391bf6395SMarc Zyngier 363491bf6395SMarc Zyngier /* Schedule the VPE */ 363591bf6395SMarc Zyngier val |= GICR_VPENDBASER_Valid; 363691bf6395SMarc Zyngier val |= info->g0en ? GICR_VPENDBASER_4_1_VGRP0EN : 0; 363791bf6395SMarc Zyngier val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0; 363891bf6395SMarc Zyngier val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id); 363991bf6395SMarc Zyngier 364091bf6395SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 364191bf6395SMarc Zyngier } 364291bf6395SMarc Zyngier 3643e64fab1aSMarc Zyngier static void its_vpe_4_1_deschedule(struct its_vpe *vpe, 3644e64fab1aSMarc Zyngier struct its_cmd_info *info) 3645e64fab1aSMarc Zyngier { 3646e64fab1aSMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3647e64fab1aSMarc Zyngier u64 val; 3648e64fab1aSMarc Zyngier 3649e64fab1aSMarc Zyngier if (info->req_db) { 3650e64fab1aSMarc Zyngier /* 3651e64fab1aSMarc Zyngier * vPE is going to block: make the vPE non-resident with 3652e64fab1aSMarc Zyngier * PendingLast clear and DB set. The GIC guarantees that if 3653e64fab1aSMarc Zyngier * we read-back PendingLast clear, then a doorbell will be 3654e64fab1aSMarc Zyngier * delivered when an interrupt comes. 3655e64fab1aSMarc Zyngier */ 3656e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 3657e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast, 3658e64fab1aSMarc Zyngier GICR_VPENDBASER_4_1_DB); 3659e64fab1aSMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 3660e64fab1aSMarc Zyngier } else { 3661e64fab1aSMarc Zyngier /* 3662e64fab1aSMarc Zyngier * We're not blocking, so just make the vPE non-resident 3663e64fab1aSMarc Zyngier * with PendingLast set, indicating that we'll be back. 3664e64fab1aSMarc Zyngier */ 3665e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 3666e64fab1aSMarc Zyngier 0, 3667e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast); 3668e64fab1aSMarc Zyngier vpe->pending_last = true; 3669e64fab1aSMarc Zyngier } 3670e64fab1aSMarc Zyngier } 3671e64fab1aSMarc Zyngier 367229c647f3SMarc Zyngier static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 367329c647f3SMarc Zyngier { 367491bf6395SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 367529c647f3SMarc Zyngier struct its_cmd_info *info = vcpu_info; 367629c647f3SMarc Zyngier 367729c647f3SMarc Zyngier switch (info->cmd_type) { 367829c647f3SMarc Zyngier case SCHEDULE_VPE: 367991bf6395SMarc Zyngier its_vpe_4_1_schedule(vpe, info); 368029c647f3SMarc Zyngier return 0; 368129c647f3SMarc Zyngier 368229c647f3SMarc Zyngier case DESCHEDULE_VPE: 3683e64fab1aSMarc Zyngier its_vpe_4_1_deschedule(vpe, info); 368429c647f3SMarc Zyngier return 0; 368529c647f3SMarc Zyngier 368629c647f3SMarc Zyngier case INVALL_VPE: 368729c647f3SMarc Zyngier return 0; 368829c647f3SMarc Zyngier 368929c647f3SMarc Zyngier default: 369029c647f3SMarc Zyngier return -EINVAL; 369129c647f3SMarc Zyngier } 369229c647f3SMarc Zyngier } 369329c647f3SMarc Zyngier 369429c647f3SMarc Zyngier static struct irq_chip its_vpe_4_1_irq_chip = { 369529c647f3SMarc Zyngier .name = "GICv4.1-vpe", 3696d97c97baSMarc Zyngier .irq_mask = its_vpe_4_1_mask_irq, 3697d97c97baSMarc Zyngier .irq_unmask = its_vpe_4_1_unmask_irq, 369829c647f3SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 369929c647f3SMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 370029c647f3SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_4_1_set_vcpu_affinity, 370129c647f3SMarc Zyngier }; 370229c647f3SMarc Zyngier 37037d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 37047d75bbb4SMarc Zyngier { 370532bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 37067d75bbb4SMarc Zyngier } 37077d75bbb4SMarc Zyngier 37087d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 37097d75bbb4SMarc Zyngier { 37107d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 37117d75bbb4SMarc Zyngier } 37127d75bbb4SMarc Zyngier 37137d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 37147d75bbb4SMarc Zyngier { 37157d75bbb4SMarc Zyngier struct page *vpt_page; 37167d75bbb4SMarc Zyngier int vpe_id; 37177d75bbb4SMarc Zyngier 37187d75bbb4SMarc Zyngier /* Allocate vpe_id */ 37197d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 37207d75bbb4SMarc Zyngier if (vpe_id < 0) 37217d75bbb4SMarc Zyngier return vpe_id; 37227d75bbb4SMarc Zyngier 37237d75bbb4SMarc Zyngier /* Allocate VPT */ 37247d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 37257d75bbb4SMarc Zyngier if (!vpt_page) { 37267d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 37277d75bbb4SMarc Zyngier return -ENOMEM; 37287d75bbb4SMarc Zyngier } 37297d75bbb4SMarc Zyngier 37307d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 37317d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 373234f8eb92SNianyao Tang its_free_pending_table(vpt_page); 37337d75bbb4SMarc Zyngier return -ENOMEM; 37347d75bbb4SMarc Zyngier } 37357d75bbb4SMarc Zyngier 37367d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 37377d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 373864edfaa9SMarc Zyngier if (gic_rdists->has_rvpeid) 373964edfaa9SMarc Zyngier atomic_set(&vpe->vmapp_count, 0); 374064edfaa9SMarc Zyngier else 374120b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 37427d75bbb4SMarc Zyngier 37437d75bbb4SMarc Zyngier return 0; 37447d75bbb4SMarc Zyngier } 37457d75bbb4SMarc Zyngier 37467d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 37477d75bbb4SMarc Zyngier { 374820b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 37497d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 37507d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 37517d75bbb4SMarc Zyngier } 37527d75bbb4SMarc Zyngier 37537d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 37547d75bbb4SMarc Zyngier unsigned int virq, 37557d75bbb4SMarc Zyngier unsigned int nr_irqs) 37567d75bbb4SMarc Zyngier { 37577d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 37587d75bbb4SMarc Zyngier int i; 37597d75bbb4SMarc Zyngier 37607d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 37617d75bbb4SMarc Zyngier 37627d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 37637d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 37647d75bbb4SMarc Zyngier virq + i); 37657d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 37667d75bbb4SMarc Zyngier 37677d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 37687d75bbb4SMarc Zyngier 37697d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 37707d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 37717d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 37727d75bbb4SMarc Zyngier } 37737d75bbb4SMarc Zyngier 37747d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 377538dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 37767d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 37777d75bbb4SMarc Zyngier } 37787d75bbb4SMarc Zyngier } 37797d75bbb4SMarc Zyngier 37807d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 37817d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 37827d75bbb4SMarc Zyngier { 378329c647f3SMarc Zyngier struct irq_chip *irqchip = &its_vpe_irq_chip; 37847d75bbb4SMarc Zyngier struct its_vm *vm = args; 37857d75bbb4SMarc Zyngier unsigned long *bitmap; 37867d75bbb4SMarc Zyngier struct page *vprop_page; 37877d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 37887d75bbb4SMarc Zyngier 37897d75bbb4SMarc Zyngier BUG_ON(!vm); 37907d75bbb4SMarc Zyngier 379138dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 37927d75bbb4SMarc Zyngier if (!bitmap) 37937d75bbb4SMarc Zyngier return -ENOMEM; 37947d75bbb4SMarc Zyngier 37957d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 379638dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 37977d75bbb4SMarc Zyngier return -ENOMEM; 37987d75bbb4SMarc Zyngier } 37997d75bbb4SMarc Zyngier 38007d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 38017d75bbb4SMarc Zyngier if (!vprop_page) { 380238dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 38037d75bbb4SMarc Zyngier return -ENOMEM; 38047d75bbb4SMarc Zyngier } 38057d75bbb4SMarc Zyngier 38067d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 38077d75bbb4SMarc Zyngier vm->db_lpi_base = base; 38087d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 38097d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 38107d75bbb4SMarc Zyngier 381129c647f3SMarc Zyngier if (gic_rdists->has_rvpeid) 381229c647f3SMarc Zyngier irqchip = &its_vpe_4_1_irq_chip; 381329c647f3SMarc Zyngier 38147d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 38157d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 38167d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 38177d75bbb4SMarc Zyngier if (err) 38187d75bbb4SMarc Zyngier break; 38197d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 38207d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 38217d75bbb4SMarc Zyngier if (err) 38227d75bbb4SMarc Zyngier break; 38237d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 382429c647f3SMarc Zyngier irqchip, vm->vpes[i]); 38257d75bbb4SMarc Zyngier set_bit(i, bitmap); 38267d75bbb4SMarc Zyngier } 38277d75bbb4SMarc Zyngier 38287d75bbb4SMarc Zyngier if (err) { 38297d75bbb4SMarc Zyngier if (i > 0) 38307d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 38317d75bbb4SMarc Zyngier 383238dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 38337d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 38347d75bbb4SMarc Zyngier } 38357d75bbb4SMarc Zyngier 38367d75bbb4SMarc Zyngier return err; 38377d75bbb4SMarc Zyngier } 38387d75bbb4SMarc Zyngier 383972491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 3840702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3841eb78192bSMarc Zyngier { 3842eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 384340619a2eSMarc Zyngier struct its_node *its; 3844eb78192bSMarc Zyngier 38452247e1bfSMarc Zyngier /* If we use the list map, we issue VMAPP on demand... */ 38462247e1bfSMarc Zyngier if (its_list_map) 38476ef930f2SMarc Zyngier return 0; 3848eb78192bSMarc Zyngier 3849eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 3850eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 385140619a2eSMarc Zyngier 385240619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 38530dd57fedSMarc Zyngier if (!is_v4(its)) 385440619a2eSMarc Zyngier continue; 385540619a2eSMarc Zyngier 385675fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 385740619a2eSMarc Zyngier its_send_vinvall(its, vpe); 385840619a2eSMarc Zyngier } 385940619a2eSMarc Zyngier 386044c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 386144c4c25eSMarc Zyngier 386272491643SThomas Gleixner return 0; 3863eb78192bSMarc Zyngier } 3864eb78192bSMarc Zyngier 3865eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 3866eb78192bSMarc Zyngier struct irq_data *d) 3867eb78192bSMarc Zyngier { 3868eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 386975fd951bSMarc Zyngier struct its_node *its; 3870eb78192bSMarc Zyngier 38712247e1bfSMarc Zyngier /* 38722247e1bfSMarc Zyngier * If we use the list map, we unmap the VPE once no VLPIs are 38732247e1bfSMarc Zyngier * associated with the VM. 38742247e1bfSMarc Zyngier */ 38752247e1bfSMarc Zyngier if (its_list_map) 38762247e1bfSMarc Zyngier return; 38772247e1bfSMarc Zyngier 387875fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 38790dd57fedSMarc Zyngier if (!is_v4(its)) 388075fd951bSMarc Zyngier continue; 388175fd951bSMarc Zyngier 388275fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 388375fd951bSMarc Zyngier } 3884eb78192bSMarc Zyngier } 3885eb78192bSMarc Zyngier 38868fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 38877d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 38887d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 3889eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 3890eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 38918fff27aeSMarc Zyngier }; 38928fff27aeSMarc Zyngier 38934559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 38944559fbb3SYun Wu { 38954559fbb3SYun Wu u32 count = 1000000; /* 1s */ 38964559fbb3SYun Wu u32 val; 38974559fbb3SYun Wu 38984559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 38997611da86SDavid Daney /* 39007611da86SDavid Daney * GIC architecture specification requires the ITS to be both 39017611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 39027611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 39037611da86SDavid Daney */ 39047611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 39054559fbb3SYun Wu return 0; 39064559fbb3SYun Wu 39074559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 3908d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 39094559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 39104559fbb3SYun Wu 39114559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 39124559fbb3SYun Wu while (1) { 39134559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 39144559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 39154559fbb3SYun Wu return 0; 39164559fbb3SYun Wu 39174559fbb3SYun Wu count--; 39184559fbb3SYun Wu if (!count) 39194559fbb3SYun Wu return -EBUSY; 39204559fbb3SYun Wu 39214559fbb3SYun Wu cpu_relax(); 39224559fbb3SYun Wu udelay(1); 39234559fbb3SYun Wu } 39244559fbb3SYun Wu } 39254559fbb3SYun Wu 39269d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 392794100970SRobert Richter { 392894100970SRobert Richter struct its_node *its = data; 392994100970SRobert Richter 3930576a8342SMarc Zyngier /* erratum 22375: only alloc 8MB table size (20 bits) */ 3931576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 3932576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); 393394100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 39349d111d49SArd Biesheuvel 39359d111d49SArd Biesheuvel return true; 393694100970SRobert Richter } 393794100970SRobert Richter 39389d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 3939fbf8f40eSGanapatrao Kulkarni { 3940fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 3941fbf8f40eSGanapatrao Kulkarni 3942fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 39439d111d49SArd Biesheuvel 39449d111d49SArd Biesheuvel return true; 3945fbf8f40eSGanapatrao Kulkarni } 3946fbf8f40eSGanapatrao Kulkarni 39479d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 394890922a2dSShanker Donthineni { 394990922a2dSShanker Donthineni struct its_node *its = data; 395090922a2dSShanker Donthineni 395190922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 3952ffedbf0cSMarc Zyngier its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; 3953ffedbf0cSMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); 39549d111d49SArd Biesheuvel 39559d111d49SArd Biesheuvel return true; 395690922a2dSShanker Donthineni } 395790922a2dSShanker Donthineni 3958558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 3959558b0165SArd Biesheuvel { 3960558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 3961558b0165SArd Biesheuvel 3962558b0165SArd Biesheuvel /* 3963558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 3964558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 3965558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 3966558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 3967558b0165SArd Biesheuvel * the window offset. 3968558b0165SArd Biesheuvel */ 3969558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 3970558b0165SArd Biesheuvel } 3971558b0165SArd Biesheuvel 3972558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 3973558b0165SArd Biesheuvel { 3974558b0165SArd Biesheuvel struct its_node *its = data; 3975558b0165SArd Biesheuvel u32 pre_its_window[2]; 3976558b0165SArd Biesheuvel u32 ids; 3977558b0165SArd Biesheuvel 3978558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 3979558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 3980558b0165SArd Biesheuvel pre_its_window, 3981558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 3982558b0165SArd Biesheuvel 3983558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 3984558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 3985558b0165SArd Biesheuvel 3986558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 3987576a8342SMarc Zyngier if (device_ids(its) > ids) { 3988576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 3989576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); 3990576a8342SMarc Zyngier } 3991558b0165SArd Biesheuvel 3992558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 3993558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 3994558b0165SArd Biesheuvel return true; 3995558b0165SArd Biesheuvel } 3996558b0165SArd Biesheuvel return false; 3997558b0165SArd Biesheuvel } 3998558b0165SArd Biesheuvel 39995c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 40005c9a882eSMarc Zyngier { 40015c9a882eSMarc Zyngier struct its_node *its = data; 40025c9a882eSMarc Zyngier 40035c9a882eSMarc Zyngier /* 40045c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 40055c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 40065c9a882eSMarc Zyngier */ 40075c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 40085c9a882eSMarc Zyngier return true; 4009cc2d3216SMarc Zyngier } 40104c21f3c2SMarc Zyngier 401167510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 401294100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 401394100970SRobert Richter { 401494100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 401594100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 401694100970SRobert Richter .mask = 0xffff0fff, 401794100970SRobert Richter .init = its_enable_quirk_cavium_22375, 401894100970SRobert Richter }, 401994100970SRobert Richter #endif 4020fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 4021fbf8f40eSGanapatrao Kulkarni { 4022fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 4023fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 4024fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 4025fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 4026fbf8f40eSGanapatrao Kulkarni }, 4027fbf8f40eSGanapatrao Kulkarni #endif 402890922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 402990922a2dSShanker Donthineni { 403090922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 403190922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 403290922a2dSShanker Donthineni .mask = 0xffffffff, 403390922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 403490922a2dSShanker Donthineni }, 403590922a2dSShanker Donthineni #endif 4036558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 4037558b0165SArd Biesheuvel { 4038558b0165SArd Biesheuvel /* 4039558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 4040558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 4041558b0165SArd Biesheuvel * special handling in software. 4042558b0165SArd Biesheuvel */ 4043558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 4044558b0165SArd Biesheuvel .iidr = 0x0001143b, 4045558b0165SArd Biesheuvel .mask = 0xffffffff, 4046558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 4047558b0165SArd Biesheuvel }, 4048558b0165SArd Biesheuvel #endif 40495c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 40505c9a882eSMarc Zyngier { 40515c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 40525c9a882eSMarc Zyngier .iidr = 0x00000004, 40535c9a882eSMarc Zyngier .mask = 0xffffffff, 40545c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 40555c9a882eSMarc Zyngier }, 40565c9a882eSMarc Zyngier #endif 405767510ccaSRobert Richter { 405867510ccaSRobert Richter } 405967510ccaSRobert Richter }; 406067510ccaSRobert Richter 406167510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 406267510ccaSRobert Richter { 406367510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 406467510ccaSRobert Richter 406567510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 406667510ccaSRobert Richter } 406767510ccaSRobert Richter 4068dba0bc7bSDerek Basehore static int its_save_disable(void) 4069dba0bc7bSDerek Basehore { 4070dba0bc7bSDerek Basehore struct its_node *its; 4071dba0bc7bSDerek Basehore int err = 0; 4072dba0bc7bSDerek Basehore 4073a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4074dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4075dba0bc7bSDerek Basehore void __iomem *base; 4076dba0bc7bSDerek Basehore 4077dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 4078dba0bc7bSDerek Basehore continue; 4079dba0bc7bSDerek Basehore 4080dba0bc7bSDerek Basehore base = its->base; 4081dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 4082dba0bc7bSDerek Basehore err = its_force_quiescent(base); 4083dba0bc7bSDerek Basehore if (err) { 4084dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 4085dba0bc7bSDerek Basehore &its->phys_base, err); 4086dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4087dba0bc7bSDerek Basehore goto err; 4088dba0bc7bSDerek Basehore } 4089dba0bc7bSDerek Basehore 4090dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 4091dba0bc7bSDerek Basehore } 4092dba0bc7bSDerek Basehore 4093dba0bc7bSDerek Basehore err: 4094dba0bc7bSDerek Basehore if (err) { 4095dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 4096dba0bc7bSDerek Basehore void __iomem *base; 4097dba0bc7bSDerek Basehore 4098dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 4099dba0bc7bSDerek Basehore continue; 4100dba0bc7bSDerek Basehore 4101dba0bc7bSDerek Basehore base = its->base; 4102dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4103dba0bc7bSDerek Basehore } 4104dba0bc7bSDerek Basehore } 4105a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4106dba0bc7bSDerek Basehore 4107dba0bc7bSDerek Basehore return err; 4108dba0bc7bSDerek Basehore } 4109dba0bc7bSDerek Basehore 4110dba0bc7bSDerek Basehore static void its_restore_enable(void) 4111dba0bc7bSDerek Basehore { 4112dba0bc7bSDerek Basehore struct its_node *its; 4113dba0bc7bSDerek Basehore int ret; 4114dba0bc7bSDerek Basehore 4115a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4116dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4117dba0bc7bSDerek Basehore void __iomem *base; 4118dba0bc7bSDerek Basehore int i; 4119dba0bc7bSDerek Basehore 4120dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 4121dba0bc7bSDerek Basehore continue; 4122dba0bc7bSDerek Basehore 4123dba0bc7bSDerek Basehore base = its->base; 4124dba0bc7bSDerek Basehore 4125dba0bc7bSDerek Basehore /* 4126dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 4127dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 4128dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 4129dba0bc7bSDerek Basehore * Specification. 4130dba0bc7bSDerek Basehore */ 4131dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 4132dba0bc7bSDerek Basehore if (ret) { 4133dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 4134dba0bc7bSDerek Basehore &its->phys_base, ret); 4135dba0bc7bSDerek Basehore continue; 4136dba0bc7bSDerek Basehore } 4137dba0bc7bSDerek Basehore 4138dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 4139dba0bc7bSDerek Basehore 4140dba0bc7bSDerek Basehore /* 4141dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 4142dba0bc7bSDerek Basehore * cmd_write line up with it. 4143dba0bc7bSDerek Basehore */ 4144dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 4145dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 4146dba0bc7bSDerek Basehore 4147dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 4148dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 4149dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 4150dba0bc7bSDerek Basehore 4151dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 4152dba0bc7bSDerek Basehore continue; 4153dba0bc7bSDerek Basehore 4154dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 4155dba0bc7bSDerek Basehore } 4156dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4157920181ceSDerek Basehore 4158920181ceSDerek Basehore /* 4159920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 4160920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 4161920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 4162920181ceSDerek Basehore */ 4163920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 4164920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 4165920181ceSDerek Basehore its_cpu_init_collection(its); 4166dba0bc7bSDerek Basehore } 4167a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4168dba0bc7bSDerek Basehore } 4169dba0bc7bSDerek Basehore 4170dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 4171dba0bc7bSDerek Basehore .suspend = its_save_disable, 4172dba0bc7bSDerek Basehore .resume = its_restore_enable, 4173dba0bc7bSDerek Basehore }; 4174dba0bc7bSDerek Basehore 4175db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 4176d14ae5e6STomasz Nowicki { 4177d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 4178d14ae5e6STomasz Nowicki struct msi_domain_info *info; 4179d14ae5e6STomasz Nowicki 4180d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 4181d14ae5e6STomasz Nowicki if (!info) 4182d14ae5e6STomasz Nowicki return -ENOMEM; 4183d14ae5e6STomasz Nowicki 4184db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 4185d14ae5e6STomasz Nowicki if (!inner_domain) { 4186d14ae5e6STomasz Nowicki kfree(info); 4187d14ae5e6STomasz Nowicki return -ENOMEM; 4188d14ae5e6STomasz Nowicki } 4189d14ae5e6STomasz Nowicki 4190db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 419196f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 4192558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 4193d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 4194d14ae5e6STomasz Nowicki info->data = its; 4195d14ae5e6STomasz Nowicki inner_domain->host_data = info; 4196d14ae5e6STomasz Nowicki 4197d14ae5e6STomasz Nowicki return 0; 4198d14ae5e6STomasz Nowicki } 4199d14ae5e6STomasz Nowicki 42008fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 42018fff27aeSMarc Zyngier { 420220b3d54eSMarc Zyngier struct its_node *its; 420320b3d54eSMarc Zyngier u32 devid; 420420b3d54eSMarc Zyngier int entries; 420520b3d54eSMarc Zyngier 420620b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 420720b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 420820b3d54eSMarc Zyngier return 0; 420920b3d54eSMarc Zyngier } 421020b3d54eSMarc Zyngier 421120b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 421220b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 421320b3d54eSMarc Zyngier 421420b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 42156396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 421620b3d54eSMarc Zyngier GFP_KERNEL); 421720b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 421820b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 421920b3d54eSMarc Zyngier return -ENOMEM; 422020b3d54eSMarc Zyngier } 422120b3d54eSMarc Zyngier 422220b3d54eSMarc Zyngier /* Use the last possible DevID */ 4223576a8342SMarc Zyngier devid = GENMASK(device_ids(its) - 1, 0); 422420b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 422520b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 422620b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 422720b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 422820b3d54eSMarc Zyngier return -ENOMEM; 422920b3d54eSMarc Zyngier } 423020b3d54eSMarc Zyngier 4231c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 423220b3d54eSMarc Zyngier 423320b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 423420b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 423520b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 423620b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 423720b3d54eSMarc Zyngier 42388fff27aeSMarc Zyngier return 0; 42398fff27aeSMarc Zyngier } 42408fff27aeSMarc Zyngier 42413dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 42423dfa576bSMarc Zyngier void __iomem *its_base) 42433dfa576bSMarc Zyngier { 42443dfa576bSMarc Zyngier int its_number; 42453dfa576bSMarc Zyngier u32 ctlr; 42463dfa576bSMarc Zyngier 42473dfa576bSMarc Zyngier /* 42483dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 42493dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 42503dfa576bSMarc Zyngier * locking. Should this change, we should address 42513dfa576bSMarc Zyngier * this. 42523dfa576bSMarc Zyngier */ 4253ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 4254ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 42553dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 42563dfa576bSMarc Zyngier &res->start); 42573dfa576bSMarc Zyngier return -EINVAL; 42583dfa576bSMarc Zyngier } 42593dfa576bSMarc Zyngier 42603dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 42613dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 42623dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 42633dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 42643dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 42653dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 42663dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 42673dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 42683dfa576bSMarc Zyngier } 42693dfa576bSMarc Zyngier 42703dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 42713dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 42723dfa576bSMarc Zyngier &res->start, its_number); 42733dfa576bSMarc Zyngier return -EINVAL; 42743dfa576bSMarc Zyngier } 42753dfa576bSMarc Zyngier 42763dfa576bSMarc Zyngier return its_number; 42773dfa576bSMarc Zyngier } 42783dfa576bSMarc Zyngier 4279db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 4280db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 42814c21f3c2SMarc Zyngier { 42824c21f3c2SMarc Zyngier struct its_node *its; 42834c21f3c2SMarc Zyngier void __iomem *its_base; 42843dfa576bSMarc Zyngier u32 val, ctlr; 42853dfa576bSMarc Zyngier u64 baser, tmp, typer; 4286539d3782SShanker Donthineni struct page *page; 42874c21f3c2SMarc Zyngier int err; 42884c21f3c2SMarc Zyngier 4289db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 42904c21f3c2SMarc Zyngier if (!its_base) { 4291db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 42924c21f3c2SMarc Zyngier return -ENOMEM; 42934c21f3c2SMarc Zyngier } 42944c21f3c2SMarc Zyngier 42954c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 42964c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 4297db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 42984c21f3c2SMarc Zyngier err = -ENODEV; 42994c21f3c2SMarc Zyngier goto out_unmap; 43004c21f3c2SMarc Zyngier } 43014c21f3c2SMarc Zyngier 43024559fbb3SYun Wu err = its_force_quiescent(its_base); 43034559fbb3SYun Wu if (err) { 4304db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 43054559fbb3SYun Wu goto out_unmap; 43064559fbb3SYun Wu } 43074559fbb3SYun Wu 4308db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 43094c21f3c2SMarc Zyngier 43104c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 43114c21f3c2SMarc Zyngier if (!its) { 43124c21f3c2SMarc Zyngier err = -ENOMEM; 43134c21f3c2SMarc Zyngier goto out_unmap; 43144c21f3c2SMarc Zyngier } 43154c21f3c2SMarc Zyngier 43164c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 43179791ec7dSMarc Zyngier mutex_init(&its->dev_alloc_lock); 43184c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 43194c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 43203dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 43210dd57fedSMarc Zyngier its->typer = typer; 43224c21f3c2SMarc Zyngier its->base = its_base; 4323db40f0a7STomasz Nowicki its->phys_base = res->start; 43240dd57fedSMarc Zyngier if (is_v4(its)) { 43253dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 43263dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 43273dfa576bSMarc Zyngier if (err < 0) 43283dfa576bSMarc Zyngier goto out_free_its; 43293dfa576bSMarc Zyngier 4330debf6d02SMarc Zyngier its->list_nr = err; 4331debf6d02SMarc Zyngier 43323dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 43333dfa576bSMarc Zyngier &res->start, err); 43343dfa576bSMarc Zyngier } else { 43353dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 43363dfa576bSMarc Zyngier } 43375e516846SMarc Zyngier 43385e516846SMarc Zyngier if (is_v4_1(its)) { 43395e516846SMarc Zyngier u32 svpet = FIELD_GET(GITS_TYPER_SVPET, typer); 43405e516846SMarc Zyngier its->mpidr = readl_relaxed(its_base + GITS_MPIDR); 43415e516846SMarc Zyngier 43425e516846SMarc Zyngier pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n", 43435e516846SMarc Zyngier &res->start, its->mpidr, svpet); 43445e516846SMarc Zyngier } 43453dfa576bSMarc Zyngier } 43463dfa576bSMarc Zyngier 4347db40f0a7STomasz Nowicki its->numa_node = numa_node; 43484c21f3c2SMarc Zyngier 4349539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 43505bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 4351539d3782SShanker Donthineni if (!page) { 43524c21f3c2SMarc Zyngier err = -ENOMEM; 43534c21f3c2SMarc Zyngier goto out_free_its; 43544c21f3c2SMarc Zyngier } 4355539d3782SShanker Donthineni its->cmd_base = (void *)page_address(page); 43564c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 4357558b0165SArd Biesheuvel its->fwnode_handle = handle; 4358558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 4359558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 43604c21f3c2SMarc Zyngier 436167510ccaSRobert Richter its_enable_quirks(its); 436267510ccaSRobert Richter 43630e0b0f69SShanker Donthineni err = its_alloc_tables(its); 43644c21f3c2SMarc Zyngier if (err) 43654c21f3c2SMarc Zyngier goto out_free_cmd; 43664c21f3c2SMarc Zyngier 43674c21f3c2SMarc Zyngier err = its_alloc_collections(its); 43684c21f3c2SMarc Zyngier if (err) 43694c21f3c2SMarc Zyngier goto out_free_tables; 43704c21f3c2SMarc Zyngier 43714c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 43722fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 43734c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 43744c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 43754c21f3c2SMarc Zyngier GITS_CBASER_VALID); 43764c21f3c2SMarc Zyngier 43770968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 43780968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 43794c21f3c2SMarc Zyngier 43804ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 4381241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 4382241a386cSMarc Zyngier /* 4383241a386cSMarc Zyngier * The HW reports non-shareable, we must 4384241a386cSMarc Zyngier * remove the cacheability attributes as 4385241a386cSMarc Zyngier * well. 4386241a386cSMarc Zyngier */ 4387241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 4388241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 4389241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 43900968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 4391241a386cSMarc Zyngier } 43924c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 43934c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 43944c21f3c2SMarc Zyngier } 43954c21f3c2SMarc Zyngier 43960968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 43973dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 4398d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 43990dd57fedSMarc Zyngier if (is_v4(its)) 4400d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 4401d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 4402241a386cSMarc Zyngier 4403dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 4404dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 4405dba0bc7bSDerek Basehore 4406db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 4407d14ae5e6STomasz Nowicki if (err) 440854456db9SMarc Zyngier goto out_free_tables; 44094c21f3c2SMarc Zyngier 4410a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 44114c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 4412a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 44134c21f3c2SMarc Zyngier 44144c21f3c2SMarc Zyngier return 0; 44154c21f3c2SMarc Zyngier 44164c21f3c2SMarc Zyngier out_free_tables: 44174c21f3c2SMarc Zyngier its_free_tables(its); 44184c21f3c2SMarc Zyngier out_free_cmd: 44195bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 44204c21f3c2SMarc Zyngier out_free_its: 44214c21f3c2SMarc Zyngier kfree(its); 44224c21f3c2SMarc Zyngier out_unmap: 44234c21f3c2SMarc Zyngier iounmap(its_base); 4424db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 44254c21f3c2SMarc Zyngier return err; 44264c21f3c2SMarc Zyngier } 44274c21f3c2SMarc Zyngier 44284c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 44294c21f3c2SMarc Zyngier { 4430589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 44314c21f3c2SMarc Zyngier } 44324c21f3c2SMarc Zyngier 44336eb486b6SShanker Donthineni static int redist_disable_lpis(void) 44344c21f3c2SMarc Zyngier { 44356eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 44366eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 44376eb486b6SShanker Donthineni u64 val; 44386eb486b6SShanker Donthineni 44394c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 44404c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 44414c21f3c2SMarc Zyngier return -ENXIO; 44424c21f3c2SMarc Zyngier } 44436eb486b6SShanker Donthineni 44446eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 44456eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 44466eb486b6SShanker Donthineni return 0; 44476eb486b6SShanker Donthineni 444811e37d35SMarc Zyngier /* 444911e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 445011e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 445111e37d35SMarc Zyngier * configured and all is well in the world. 4452c440a9d9SMarc Zyngier * 4453c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 445411e37d35SMarc Zyngier */ 4455c440a9d9SMarc Zyngier if (gic_data_rdist()->lpi_enabled || 4456c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 445711e37d35SMarc Zyngier return 0; 445811e37d35SMarc Zyngier 445911e37d35SMarc Zyngier /* 446011e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 446111e37d35SMarc Zyngier */ 446211e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 44636eb486b6SShanker Donthineni smp_processor_id()); 44646eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 44656eb486b6SShanker Donthineni 44666eb486b6SShanker Donthineni /* Disable LPIs */ 44676eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 44686eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 44696eb486b6SShanker Donthineni 44706eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 44716eb486b6SShanker Donthineni dsb(sy); 44726eb486b6SShanker Donthineni 44736eb486b6SShanker Donthineni /* 44746eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 44756eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 44766eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 44776eb486b6SShanker Donthineni */ 44786eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 44796eb486b6SShanker Donthineni if (!timeout) { 44806eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 44816eb486b6SShanker Donthineni smp_processor_id()); 44826eb486b6SShanker Donthineni return -ETIMEDOUT; 44836eb486b6SShanker Donthineni } 44846eb486b6SShanker Donthineni udelay(1); 44856eb486b6SShanker Donthineni timeout--; 44866eb486b6SShanker Donthineni } 44876eb486b6SShanker Donthineni 44886eb486b6SShanker Donthineni /* 44896eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 44906eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 44916eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 44926eb486b6SShanker Donthineni */ 44936eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 44946eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 44956eb486b6SShanker Donthineni return -EBUSY; 44966eb486b6SShanker Donthineni } 44976eb486b6SShanker Donthineni 44986eb486b6SShanker Donthineni return 0; 44996eb486b6SShanker Donthineni } 45006eb486b6SShanker Donthineni 45016eb486b6SShanker Donthineni int its_cpu_init(void) 45026eb486b6SShanker Donthineni { 45036eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 45046eb486b6SShanker Donthineni int ret; 45056eb486b6SShanker Donthineni 45066eb486b6SShanker Donthineni ret = redist_disable_lpis(); 45076eb486b6SShanker Donthineni if (ret) 45086eb486b6SShanker Donthineni return ret; 45096eb486b6SShanker Donthineni 45104c21f3c2SMarc Zyngier its_cpu_init_lpis(); 4511920181ceSDerek Basehore its_cpu_init_collections(); 45124c21f3c2SMarc Zyngier } 45134c21f3c2SMarc Zyngier 45144c21f3c2SMarc Zyngier return 0; 45154c21f3c2SMarc Zyngier } 45164c21f3c2SMarc Zyngier 4517935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 45184c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 45194c21f3c2SMarc Zyngier {}, 45204c21f3c2SMarc Zyngier }; 45214c21f3c2SMarc Zyngier 4522db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 45234c21f3c2SMarc Zyngier { 45244c21f3c2SMarc Zyngier struct device_node *np; 4525db40f0a7STomasz Nowicki struct resource res; 45264c21f3c2SMarc Zyngier 45274c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 45284c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 452995a25625SStephen Boyd if (!of_device_is_available(np)) 453095a25625SStephen Boyd continue; 4531d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 4532e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 4533e81f54c6SRob Herring np); 4534d14ae5e6STomasz Nowicki continue; 4535d14ae5e6STomasz Nowicki } 4536d14ae5e6STomasz Nowicki 4537db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 4538e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 4539db40f0a7STomasz Nowicki continue; 45404c21f3c2SMarc Zyngier } 45414c21f3c2SMarc Zyngier 4542db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 4543db40f0a7STomasz Nowicki } 4544db40f0a7STomasz Nowicki return 0; 4545db40f0a7STomasz Nowicki } 4546db40f0a7STomasz Nowicki 45473f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 45483f010cf1STomasz Nowicki 45493f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 45503f010cf1STomasz Nowicki 4551d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 4552dbd2b826SGanapatrao Kulkarni struct its_srat_map { 4553dbd2b826SGanapatrao Kulkarni /* numa node id */ 4554dbd2b826SGanapatrao Kulkarni u32 numa_node; 4555dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 4556dbd2b826SGanapatrao Kulkarni u32 its_id; 4557dbd2b826SGanapatrao Kulkarni }; 4558dbd2b826SGanapatrao Kulkarni 4559fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 4560dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 4561dbd2b826SGanapatrao Kulkarni 4562dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 4563dbd2b826SGanapatrao Kulkarni { 4564dbd2b826SGanapatrao Kulkarni int i; 4565dbd2b826SGanapatrao Kulkarni 4566dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 4567dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 4568dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 4569dbd2b826SGanapatrao Kulkarni } 4570dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 4571dbd2b826SGanapatrao Kulkarni } 4572dbd2b826SGanapatrao Kulkarni 457360574d1eSKeith Busch static int __init gic_acpi_match_srat_its(union acpi_subtable_headers *header, 4574fdf6e7a8SHanjun Guo const unsigned long end) 4575fdf6e7a8SHanjun Guo { 4576fdf6e7a8SHanjun Guo return 0; 4577fdf6e7a8SHanjun Guo } 4578fdf6e7a8SHanjun Guo 457960574d1eSKeith Busch static int __init gic_acpi_parse_srat_its(union acpi_subtable_headers *header, 4580dbd2b826SGanapatrao Kulkarni const unsigned long end) 4581dbd2b826SGanapatrao Kulkarni { 4582dbd2b826SGanapatrao Kulkarni int node; 4583dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 4584dbd2b826SGanapatrao Kulkarni 4585dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 4586dbd2b826SGanapatrao Kulkarni if (!its_affinity) 4587dbd2b826SGanapatrao Kulkarni return -EINVAL; 4588dbd2b826SGanapatrao Kulkarni 4589dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 4590dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 4591dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 4592dbd2b826SGanapatrao Kulkarni return -EINVAL; 4593dbd2b826SGanapatrao Kulkarni } 4594dbd2b826SGanapatrao Kulkarni 4595dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 4596dbd2b826SGanapatrao Kulkarni 4597dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 4598dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 4599dbd2b826SGanapatrao Kulkarni return 0; 4600dbd2b826SGanapatrao Kulkarni } 4601dbd2b826SGanapatrao Kulkarni 4602dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 4603dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 4604dbd2b826SGanapatrao Kulkarni its_in_srat++; 4605dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 4606dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 4607dbd2b826SGanapatrao Kulkarni 4608dbd2b826SGanapatrao Kulkarni return 0; 4609dbd2b826SGanapatrao Kulkarni } 4610dbd2b826SGanapatrao Kulkarni 4611dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 4612dbd2b826SGanapatrao Kulkarni { 4613fdf6e7a8SHanjun Guo int count; 4614fdf6e7a8SHanjun Guo 4615fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 4616fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 4617fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 4618fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 4619fdf6e7a8SHanjun Guo if (count <= 0) 4620fdf6e7a8SHanjun Guo return; 4621fdf6e7a8SHanjun Guo 46226da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 4623fdf6e7a8SHanjun Guo GFP_KERNEL); 4624fdf6e7a8SHanjun Guo if (!its_srat_maps) { 4625fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 4626fdf6e7a8SHanjun Guo return; 4627fdf6e7a8SHanjun Guo } 4628fdf6e7a8SHanjun Guo 4629dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 4630dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 4631dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 4632dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 4633dbd2b826SGanapatrao Kulkarni } 4634fdf6e7a8SHanjun Guo 4635fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 4636fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 4637fdf6e7a8SHanjun Guo { 4638fdf6e7a8SHanjun Guo kfree(its_srat_maps); 4639fdf6e7a8SHanjun Guo } 4640dbd2b826SGanapatrao Kulkarni #else 4641dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 4642dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 4643fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 4644dbd2b826SGanapatrao Kulkarni #endif 4645dbd2b826SGanapatrao Kulkarni 464660574d1eSKeith Busch static int __init gic_acpi_parse_madt_its(union acpi_subtable_headers *header, 46473f010cf1STomasz Nowicki const unsigned long end) 46483f010cf1STomasz Nowicki { 46493f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 46503f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 46513f010cf1STomasz Nowicki struct resource res; 46523f010cf1STomasz Nowicki int err; 46533f010cf1STomasz Nowicki 46543f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 46553f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 46563f010cf1STomasz Nowicki res.start = its_entry->base_address; 46573f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 46583f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 46593f010cf1STomasz Nowicki 46605778cc77SMarc Zyngier dom_handle = irq_domain_alloc_fwnode(&res.start); 46613f010cf1STomasz Nowicki if (!dom_handle) { 46623f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 46633f010cf1STomasz Nowicki &res.start); 46643f010cf1STomasz Nowicki return -ENOMEM; 46653f010cf1STomasz Nowicki } 46663f010cf1STomasz Nowicki 46678b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 46688b4282e6SShameer Kolothum dom_handle); 46693f010cf1STomasz Nowicki if (err) { 46703f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 46713f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 46723f010cf1STomasz Nowicki goto dom_err; 46733f010cf1STomasz Nowicki } 46743f010cf1STomasz Nowicki 4675dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 4676dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 46773f010cf1STomasz Nowicki if (!err) 46783f010cf1STomasz Nowicki return 0; 46793f010cf1STomasz Nowicki 46803f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 46813f010cf1STomasz Nowicki dom_err: 46823f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 46833f010cf1STomasz Nowicki return err; 46843f010cf1STomasz Nowicki } 46853f010cf1STomasz Nowicki 46863f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 46873f010cf1STomasz Nowicki { 4688dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 46893f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 46903f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 4691fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 46923f010cf1STomasz Nowicki } 46933f010cf1STomasz Nowicki #else 46943f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 46953f010cf1STomasz Nowicki #endif 46963f010cf1STomasz Nowicki 4697db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 4698db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 4699db40f0a7STomasz Nowicki { 4700db40f0a7STomasz Nowicki struct device_node *of_node; 47018fff27aeSMarc Zyngier struct its_node *its; 47028fff27aeSMarc Zyngier bool has_v4 = false; 47038fff27aeSMarc Zyngier int err; 4704db40f0a7STomasz Nowicki 47055e516846SMarc Zyngier gic_rdists = rdists; 47065e516846SMarc Zyngier 4707db40f0a7STomasz Nowicki its_parent = parent_domain; 4708db40f0a7STomasz Nowicki of_node = to_of_node(handle); 4709db40f0a7STomasz Nowicki if (of_node) 4710db40f0a7STomasz Nowicki its_of_probe(of_node); 4711db40f0a7STomasz Nowicki else 47123f010cf1STomasz Nowicki its_acpi_probe(); 4713db40f0a7STomasz Nowicki 47144c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 47154c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 47164c21f3c2SMarc Zyngier return -ENXIO; 47174c21f3c2SMarc Zyngier } 47184c21f3c2SMarc Zyngier 471911e37d35SMarc Zyngier err = allocate_lpi_tables(); 47208fff27aeSMarc Zyngier if (err) 47218fff27aeSMarc Zyngier return err; 47228fff27aeSMarc Zyngier 47238fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 47240dd57fedSMarc Zyngier has_v4 |= is_v4(its); 47258fff27aeSMarc Zyngier 47268fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 47273d63cb53SMarc Zyngier if (its_init_vpe_domain() || 47283d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 47298fff27aeSMarc Zyngier rdists->has_vlpis = false; 47308fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 47318fff27aeSMarc Zyngier } 47328fff27aeSMarc Zyngier } 47338fff27aeSMarc Zyngier 4734dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 4735dba0bc7bSDerek Basehore 47368fff27aeSMarc Zyngier return 0; 47374c21f3c2SMarc Zyngier } 4738