1cc2d3216SMarc Zyngier /* 2d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 183f010cf1STomasz Nowicki #include <linux/acpi.h> 198d3554b8SHanjun Guo #include <linux/acpi_iort.h> 20cc2d3216SMarc Zyngier #include <linux/bitmap.h> 21cc2d3216SMarc Zyngier #include <linux/cpu.h> 22cc2d3216SMarc Zyngier #include <linux/delay.h> 2344bb7e24SRobin Murphy #include <linux/dma-iommu.h> 24cc2d3216SMarc Zyngier #include <linux/interrupt.h> 253f010cf1STomasz Nowicki #include <linux/irqdomain.h> 26880cb3cdSMarc Zyngier #include <linux/list.h> 27880cb3cdSMarc Zyngier #include <linux/list_sort.h> 28cc2d3216SMarc Zyngier #include <linux/log2.h> 29cc2d3216SMarc Zyngier #include <linux/mm.h> 30cc2d3216SMarc Zyngier #include <linux/msi.h> 31cc2d3216SMarc Zyngier #include <linux/of.h> 32cc2d3216SMarc Zyngier #include <linux/of_address.h> 33cc2d3216SMarc Zyngier #include <linux/of_irq.h> 34cc2d3216SMarc Zyngier #include <linux/of_pci.h> 35cc2d3216SMarc Zyngier #include <linux/of_platform.h> 36cc2d3216SMarc Zyngier #include <linux/percpu.h> 37cc2d3216SMarc Zyngier #include <linux/slab.h> 38dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 39cc2d3216SMarc Zyngier 4041a83e06SJoel Porquet #include <linux/irqchip.h> 41cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 42c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 43cc2d3216SMarc Zyngier 44cc2d3216SMarc Zyngier #include <asm/cputype.h> 45cc2d3216SMarc Zyngier #include <asm/exception.h> 46cc2d3216SMarc Zyngier 4767510ccaSRobert Richter #include "irq-gic-common.h" 4867510ccaSRobert Richter 4994100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 5094100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 51fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 52dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 53cc2d3216SMarc Zyngier 54c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 55c48ed51cSMarc Zyngier 56a13b0404SMarc Zyngier static u32 lpi_id_bits; 57a13b0404SMarc Zyngier 58a13b0404SMarc Zyngier /* 59a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 60a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 61a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 62a13b0404SMarc Zyngier */ 63a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 64a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 65a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 66a13b0404SMarc Zyngier 67a13b0404SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 68a13b0404SMarc Zyngier 69cc2d3216SMarc Zyngier /* 70cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 71cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 72cc2d3216SMarc Zyngier * CPU. 73cc2d3216SMarc Zyngier */ 74cc2d3216SMarc Zyngier struct its_collection { 75cc2d3216SMarc Zyngier u64 target_address; 76cc2d3216SMarc Zyngier u16 col_id; 77cc2d3216SMarc Zyngier }; 78cc2d3216SMarc Zyngier 79cc2d3216SMarc Zyngier /* 809347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 819347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 82466b7d16SShanker Donthineni */ 83466b7d16SShanker Donthineni struct its_baser { 84466b7d16SShanker Donthineni void *base; 85466b7d16SShanker Donthineni u64 val; 86466b7d16SShanker Donthineni u32 order; 879347359aSShanker Donthineni u32 psz; 88466b7d16SShanker Donthineni }; 89466b7d16SShanker Donthineni 90558b0165SArd Biesheuvel struct its_device; 91558b0165SArd Biesheuvel 92466b7d16SShanker Donthineni /* 93cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 94841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 95841514abSMarc Zyngier * list of devices writing to it. 96cc2d3216SMarc Zyngier */ 97cc2d3216SMarc Zyngier struct its_node { 98cc2d3216SMarc Zyngier raw_spinlock_t lock; 99cc2d3216SMarc Zyngier struct list_head entry; 100cc2d3216SMarc Zyngier void __iomem *base; 101db40f0a7STomasz Nowicki phys_addr_t phys_base; 102cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 103cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 104466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 105cc2d3216SMarc Zyngier struct its_collection *collections; 106558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 107558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 108dba0bc7bSDerek Basehore u64 cbaser_save; 109dba0bc7bSDerek Basehore u32 ctlr_save; 110cc2d3216SMarc Zyngier struct list_head its_device_list; 111cc2d3216SMarc Zyngier u64 flags; 112debf6d02SMarc Zyngier unsigned long list_nr; 113cc2d3216SMarc Zyngier u32 ite_size; 114466b7d16SShanker Donthineni u32 device_ids; 115fbf8f40eSGanapatrao Kulkarni int numa_node; 116558b0165SArd Biesheuvel unsigned int msi_domain_flags; 117558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1183dfa576bSMarc Zyngier bool is_v4; 1195c9a882eSMarc Zyngier int vlpi_redist_offset; 120cc2d3216SMarc Zyngier }; 121cc2d3216SMarc Zyngier 122cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 123cc2d3216SMarc Zyngier 12432bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 12532bd44dcSShanker Donthineni #define ITS_MAX_VPEID_BITS (16) 12632bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 12732bd44dcSShanker Donthineni 1282eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1292eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1302eca0d6cSShanker Donthineni 131591e5becSMarc Zyngier struct event_lpi_map { 132591e5becSMarc Zyngier unsigned long *lpi_map; 133591e5becSMarc Zyngier u16 *col_map; 134591e5becSMarc Zyngier irq_hw_number_t lpi_base; 135591e5becSMarc Zyngier int nr_lpis; 136d011e4e6SMarc Zyngier struct mutex vlpi_lock; 137d011e4e6SMarc Zyngier struct its_vm *vm; 138d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 139d011e4e6SMarc Zyngier int nr_vlpis; 140591e5becSMarc Zyngier }; 141591e5becSMarc Zyngier 142cc2d3216SMarc Zyngier /* 143d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 144d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 145d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 146d011e4e6SMarc Zyngier * indicates which one. 147cc2d3216SMarc Zyngier */ 148cc2d3216SMarc Zyngier struct its_device { 149cc2d3216SMarc Zyngier struct list_head entry; 150cc2d3216SMarc Zyngier struct its_node *its; 151591e5becSMarc Zyngier struct event_lpi_map event_map; 152cc2d3216SMarc Zyngier void *itt; 153cc2d3216SMarc Zyngier u32 nr_ites; 154cc2d3216SMarc Zyngier u32 device_id; 155cc2d3216SMarc Zyngier }; 156cc2d3216SMarc Zyngier 15720b3d54eSMarc Zyngier static struct { 15820b3d54eSMarc Zyngier raw_spinlock_t lock; 15920b3d54eSMarc Zyngier struct its_device *dev; 16020b3d54eSMarc Zyngier struct its_vpe **vpes; 16120b3d54eSMarc Zyngier int next_victim; 16220b3d54eSMarc Zyngier } vpe_proxy; 16320b3d54eSMarc Zyngier 1641ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 165a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1661ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 167db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1681ac19ca6SMarc Zyngier 1693dfa576bSMarc Zyngier static unsigned long its_list_map; 1703171a47aSMarc Zyngier static u16 vmovp_seq_num; 1713171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1723171a47aSMarc Zyngier 1737d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1743dfa576bSMarc Zyngier 1751ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 17611e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1771ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 178e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1791ac19ca6SMarc Zyngier 180591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 181591e5becSMarc Zyngier u32 event) 182591e5becSMarc Zyngier { 183591e5becSMarc Zyngier struct its_node *its = its_dev->its; 184591e5becSMarc Zyngier 185591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 186591e5becSMarc Zyngier } 187591e5becSMarc Zyngier 18883559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 18983559b47SMarc Zyngier { 19083559b47SMarc Zyngier if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(0, 15))) 19183559b47SMarc Zyngier return NULL; 19283559b47SMarc Zyngier 19383559b47SMarc Zyngier return col; 19483559b47SMarc Zyngier } 19583559b47SMarc Zyngier 196205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 197205e065dSMarc Zyngier { 198205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 199205e065dSMarc Zyngier return vpe; 200205e065dSMarc Zyngier 201205e065dSMarc Zyngier return NULL; 202205e065dSMarc Zyngier } 203205e065dSMarc Zyngier 204cc2d3216SMarc Zyngier /* 205cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 206cc2d3216SMarc Zyngier * block. 207cc2d3216SMarc Zyngier */ 208cc2d3216SMarc Zyngier struct its_cmd_desc { 209cc2d3216SMarc Zyngier union { 210cc2d3216SMarc Zyngier struct { 211cc2d3216SMarc Zyngier struct its_device *dev; 212cc2d3216SMarc Zyngier u32 event_id; 213cc2d3216SMarc Zyngier } its_inv_cmd; 214cc2d3216SMarc Zyngier 215cc2d3216SMarc Zyngier struct { 216cc2d3216SMarc Zyngier struct its_device *dev; 217cc2d3216SMarc Zyngier u32 event_id; 2188d85dcedSMarc Zyngier } its_clear_cmd; 2198d85dcedSMarc Zyngier 2208d85dcedSMarc Zyngier struct { 2218d85dcedSMarc Zyngier struct its_device *dev; 2228d85dcedSMarc Zyngier u32 event_id; 223cc2d3216SMarc Zyngier } its_int_cmd; 224cc2d3216SMarc Zyngier 225cc2d3216SMarc Zyngier struct { 226cc2d3216SMarc Zyngier struct its_device *dev; 227cc2d3216SMarc Zyngier int valid; 228cc2d3216SMarc Zyngier } its_mapd_cmd; 229cc2d3216SMarc Zyngier 230cc2d3216SMarc Zyngier struct { 231cc2d3216SMarc Zyngier struct its_collection *col; 232cc2d3216SMarc Zyngier int valid; 233cc2d3216SMarc Zyngier } its_mapc_cmd; 234cc2d3216SMarc Zyngier 235cc2d3216SMarc Zyngier struct { 236cc2d3216SMarc Zyngier struct its_device *dev; 237cc2d3216SMarc Zyngier u32 phys_id; 238cc2d3216SMarc Zyngier u32 event_id; 2396a25ad3aSMarc Zyngier } its_mapti_cmd; 240cc2d3216SMarc Zyngier 241cc2d3216SMarc Zyngier struct { 242cc2d3216SMarc Zyngier struct its_device *dev; 243cc2d3216SMarc Zyngier struct its_collection *col; 244591e5becSMarc Zyngier u32 event_id; 245cc2d3216SMarc Zyngier } its_movi_cmd; 246cc2d3216SMarc Zyngier 247cc2d3216SMarc Zyngier struct { 248cc2d3216SMarc Zyngier struct its_device *dev; 249cc2d3216SMarc Zyngier u32 event_id; 250cc2d3216SMarc Zyngier } its_discard_cmd; 251cc2d3216SMarc Zyngier 252cc2d3216SMarc Zyngier struct { 253cc2d3216SMarc Zyngier struct its_collection *col; 254cc2d3216SMarc Zyngier } its_invall_cmd; 255d011e4e6SMarc Zyngier 256d011e4e6SMarc Zyngier struct { 257d011e4e6SMarc Zyngier struct its_vpe *vpe; 258eb78192bSMarc Zyngier } its_vinvall_cmd; 259eb78192bSMarc Zyngier 260eb78192bSMarc Zyngier struct { 261eb78192bSMarc Zyngier struct its_vpe *vpe; 262eb78192bSMarc Zyngier struct its_collection *col; 263eb78192bSMarc Zyngier bool valid; 264eb78192bSMarc Zyngier } its_vmapp_cmd; 265eb78192bSMarc Zyngier 266eb78192bSMarc Zyngier struct { 267eb78192bSMarc Zyngier struct its_vpe *vpe; 268d011e4e6SMarc Zyngier struct its_device *dev; 269d011e4e6SMarc Zyngier u32 virt_id; 270d011e4e6SMarc Zyngier u32 event_id; 271d011e4e6SMarc Zyngier bool db_enabled; 272d011e4e6SMarc Zyngier } its_vmapti_cmd; 273d011e4e6SMarc Zyngier 274d011e4e6SMarc Zyngier struct { 275d011e4e6SMarc Zyngier struct its_vpe *vpe; 276d011e4e6SMarc Zyngier struct its_device *dev; 277d011e4e6SMarc Zyngier u32 event_id; 278d011e4e6SMarc Zyngier bool db_enabled; 279d011e4e6SMarc Zyngier } its_vmovi_cmd; 2803171a47aSMarc Zyngier 2813171a47aSMarc Zyngier struct { 2823171a47aSMarc Zyngier struct its_vpe *vpe; 2833171a47aSMarc Zyngier struct its_collection *col; 2843171a47aSMarc Zyngier u16 seq_num; 2853171a47aSMarc Zyngier u16 its_list; 2863171a47aSMarc Zyngier } its_vmovp_cmd; 287cc2d3216SMarc Zyngier }; 288cc2d3216SMarc Zyngier }; 289cc2d3216SMarc Zyngier 290cc2d3216SMarc Zyngier /* 291cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 292cc2d3216SMarc Zyngier */ 293cc2d3216SMarc Zyngier struct its_cmd_block { 294cc2d3216SMarc Zyngier u64 raw_cmd[4]; 295cc2d3216SMarc Zyngier }; 296cc2d3216SMarc Zyngier 297cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 298cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 299cc2d3216SMarc Zyngier 30067047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 30167047f90SMarc Zyngier struct its_cmd_block *, 302cc2d3216SMarc Zyngier struct its_cmd_desc *); 303cc2d3216SMarc Zyngier 30467047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 30567047f90SMarc Zyngier struct its_cmd_block *, 306d011e4e6SMarc Zyngier struct its_cmd_desc *); 307d011e4e6SMarc Zyngier 3084d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 3094d36f136SMarc Zyngier { 3104d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 3114d36f136SMarc Zyngier *raw_cmd &= ~mask; 3124d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 3134d36f136SMarc Zyngier } 3144d36f136SMarc Zyngier 315cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 316cc2d3216SMarc Zyngier { 3174d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 318cc2d3216SMarc Zyngier } 319cc2d3216SMarc Zyngier 320cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 321cc2d3216SMarc Zyngier { 3224d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 323cc2d3216SMarc Zyngier } 324cc2d3216SMarc Zyngier 325cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 326cc2d3216SMarc Zyngier { 3274d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 328cc2d3216SMarc Zyngier } 329cc2d3216SMarc Zyngier 330cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 331cc2d3216SMarc Zyngier { 3324d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 333cc2d3216SMarc Zyngier } 334cc2d3216SMarc Zyngier 335cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 336cc2d3216SMarc Zyngier { 3374d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 338cc2d3216SMarc Zyngier } 339cc2d3216SMarc Zyngier 340cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 341cc2d3216SMarc Zyngier { 34230ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 343cc2d3216SMarc Zyngier } 344cc2d3216SMarc Zyngier 345cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 346cc2d3216SMarc Zyngier { 3474d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 348cc2d3216SMarc Zyngier } 349cc2d3216SMarc Zyngier 350cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 351cc2d3216SMarc Zyngier { 35230ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 353cc2d3216SMarc Zyngier } 354cc2d3216SMarc Zyngier 355cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 356cc2d3216SMarc Zyngier { 3574d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 358cc2d3216SMarc Zyngier } 359cc2d3216SMarc Zyngier 360d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 361d011e4e6SMarc Zyngier { 362d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 363d011e4e6SMarc Zyngier } 364d011e4e6SMarc Zyngier 365d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 366d011e4e6SMarc Zyngier { 367d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 368d011e4e6SMarc Zyngier } 369d011e4e6SMarc Zyngier 370d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 371d011e4e6SMarc Zyngier { 372d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 373d011e4e6SMarc Zyngier } 374d011e4e6SMarc Zyngier 375d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 376d011e4e6SMarc Zyngier { 377d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 378d011e4e6SMarc Zyngier } 379d011e4e6SMarc Zyngier 3803171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 3813171a47aSMarc Zyngier { 3823171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 3833171a47aSMarc Zyngier } 3843171a47aSMarc Zyngier 3853171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 3863171a47aSMarc Zyngier { 3873171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 3883171a47aSMarc Zyngier } 3893171a47aSMarc Zyngier 390eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 391eb78192bSMarc Zyngier { 39230ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 393eb78192bSMarc Zyngier } 394eb78192bSMarc Zyngier 395eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 396eb78192bSMarc Zyngier { 397eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 398eb78192bSMarc Zyngier } 399eb78192bSMarc Zyngier 400cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 401cc2d3216SMarc Zyngier { 402cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 403cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 404cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 405cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 406cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 407cc2d3216SMarc Zyngier } 408cc2d3216SMarc Zyngier 40967047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 41067047f90SMarc Zyngier struct its_cmd_block *cmd, 411cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 412cc2d3216SMarc Zyngier { 413cc2d3216SMarc Zyngier unsigned long itt_addr; 414c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 415cc2d3216SMarc Zyngier 416cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 417cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 418cc2d3216SMarc Zyngier 419cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 420cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 421cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 422cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 423cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 424cc2d3216SMarc Zyngier 425cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 426cc2d3216SMarc Zyngier 427591e5becSMarc Zyngier return NULL; 428cc2d3216SMarc Zyngier } 429cc2d3216SMarc Zyngier 43067047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 43167047f90SMarc Zyngier struct its_cmd_block *cmd, 432cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 433cc2d3216SMarc Zyngier { 434cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 435cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 436cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 437cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 438cc2d3216SMarc Zyngier 439cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 440cc2d3216SMarc Zyngier 441cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 442cc2d3216SMarc Zyngier } 443cc2d3216SMarc Zyngier 44467047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 44567047f90SMarc Zyngier struct its_cmd_block *cmd, 446cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 447cc2d3216SMarc Zyngier { 448591e5becSMarc Zyngier struct its_collection *col; 449591e5becSMarc Zyngier 4506a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 4516a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 452591e5becSMarc Zyngier 4536a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 4546a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 4556a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 4566a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 457591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 458cc2d3216SMarc Zyngier 459cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 460cc2d3216SMarc Zyngier 46183559b47SMarc Zyngier return valid_col(col); 462cc2d3216SMarc Zyngier } 463cc2d3216SMarc Zyngier 46467047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 46567047f90SMarc Zyngier struct its_cmd_block *cmd, 466cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 467cc2d3216SMarc Zyngier { 468591e5becSMarc Zyngier struct its_collection *col; 469591e5becSMarc Zyngier 470591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 471591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 472591e5becSMarc Zyngier 473cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 474cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 475591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 476cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 477cc2d3216SMarc Zyngier 478cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 479cc2d3216SMarc Zyngier 48083559b47SMarc Zyngier return valid_col(col); 481cc2d3216SMarc Zyngier } 482cc2d3216SMarc Zyngier 48367047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 48467047f90SMarc Zyngier struct its_cmd_block *cmd, 485cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 486cc2d3216SMarc Zyngier { 487591e5becSMarc Zyngier struct its_collection *col; 488591e5becSMarc Zyngier 489591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 490591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 491591e5becSMarc Zyngier 492cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 493cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 494cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 495cc2d3216SMarc Zyngier 496cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 497cc2d3216SMarc Zyngier 49883559b47SMarc Zyngier return valid_col(col); 499cc2d3216SMarc Zyngier } 500cc2d3216SMarc Zyngier 50167047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 50267047f90SMarc Zyngier struct its_cmd_block *cmd, 503cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 504cc2d3216SMarc Zyngier { 505591e5becSMarc Zyngier struct its_collection *col; 506591e5becSMarc Zyngier 507591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 508591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 509591e5becSMarc Zyngier 510cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 511cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 512cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 513cc2d3216SMarc Zyngier 514cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 515cc2d3216SMarc Zyngier 51683559b47SMarc Zyngier return valid_col(col); 517cc2d3216SMarc Zyngier } 518cc2d3216SMarc Zyngier 51967047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 52067047f90SMarc Zyngier struct its_cmd_block *cmd, 5218d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5228d85dcedSMarc Zyngier { 5238d85dcedSMarc Zyngier struct its_collection *col; 5248d85dcedSMarc Zyngier 5258d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 5268d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 5278d85dcedSMarc Zyngier 5288d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 5298d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 5308d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 5318d85dcedSMarc Zyngier 5328d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5338d85dcedSMarc Zyngier 53483559b47SMarc Zyngier return valid_col(col); 5358d85dcedSMarc Zyngier } 5368d85dcedSMarc Zyngier 53767047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 53867047f90SMarc Zyngier struct its_cmd_block *cmd, 5398d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5408d85dcedSMarc Zyngier { 5418d85dcedSMarc Zyngier struct its_collection *col; 5428d85dcedSMarc Zyngier 5438d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 5448d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 5458d85dcedSMarc Zyngier 5468d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 5478d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 5488d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 5498d85dcedSMarc Zyngier 5508d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5518d85dcedSMarc Zyngier 55283559b47SMarc Zyngier return valid_col(col); 5538d85dcedSMarc Zyngier } 5548d85dcedSMarc Zyngier 55567047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 55667047f90SMarc Zyngier struct its_cmd_block *cmd, 557cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 558cc2d3216SMarc Zyngier { 559cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 560cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 561cc2d3216SMarc Zyngier 562cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 563cc2d3216SMarc Zyngier 564cc2d3216SMarc Zyngier return NULL; 565cc2d3216SMarc Zyngier } 566cc2d3216SMarc Zyngier 56767047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 56867047f90SMarc Zyngier struct its_cmd_block *cmd, 569eb78192bSMarc Zyngier struct its_cmd_desc *desc) 570eb78192bSMarc Zyngier { 571eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 572eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 573eb78192bSMarc Zyngier 574eb78192bSMarc Zyngier its_fixup_cmd(cmd); 575eb78192bSMarc Zyngier 576205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 577eb78192bSMarc Zyngier } 578eb78192bSMarc Zyngier 57967047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 58067047f90SMarc Zyngier struct its_cmd_block *cmd, 581eb78192bSMarc Zyngier struct its_cmd_desc *desc) 582eb78192bSMarc Zyngier { 583eb78192bSMarc Zyngier unsigned long vpt_addr; 5845c9a882eSMarc Zyngier u64 target; 585eb78192bSMarc Zyngier 586eb78192bSMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 5875c9a882eSMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 588eb78192bSMarc Zyngier 589eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 590eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 591eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 5925c9a882eSMarc Zyngier its_encode_target(cmd, target); 593eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 594eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 595eb78192bSMarc Zyngier 596eb78192bSMarc Zyngier its_fixup_cmd(cmd); 597eb78192bSMarc Zyngier 598205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 599eb78192bSMarc Zyngier } 600eb78192bSMarc Zyngier 60167047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 60267047f90SMarc Zyngier struct its_cmd_block *cmd, 603d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 604d011e4e6SMarc Zyngier { 605d011e4e6SMarc Zyngier u32 db; 606d011e4e6SMarc Zyngier 607d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 608d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 609d011e4e6SMarc Zyngier else 610d011e4e6SMarc Zyngier db = 1023; 611d011e4e6SMarc Zyngier 612d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 613d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 614d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 615d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 616d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 617d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 618d011e4e6SMarc Zyngier 619d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 620d011e4e6SMarc Zyngier 621205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 622d011e4e6SMarc Zyngier } 623d011e4e6SMarc Zyngier 62467047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 62567047f90SMarc Zyngier struct its_cmd_block *cmd, 626d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 627d011e4e6SMarc Zyngier { 628d011e4e6SMarc Zyngier u32 db; 629d011e4e6SMarc Zyngier 630d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 631d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 632d011e4e6SMarc Zyngier else 633d011e4e6SMarc Zyngier db = 1023; 634d011e4e6SMarc Zyngier 635d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 636d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 637d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 638d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 639d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 640d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 641d011e4e6SMarc Zyngier 642d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 643d011e4e6SMarc Zyngier 644205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 645d011e4e6SMarc Zyngier } 646d011e4e6SMarc Zyngier 64767047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 64867047f90SMarc Zyngier struct its_cmd_block *cmd, 6493171a47aSMarc Zyngier struct its_cmd_desc *desc) 6503171a47aSMarc Zyngier { 6515c9a882eSMarc Zyngier u64 target; 6525c9a882eSMarc Zyngier 6535c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 6543171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 6553171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 6563171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 6573171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 6585c9a882eSMarc Zyngier its_encode_target(cmd, target); 6593171a47aSMarc Zyngier 6603171a47aSMarc Zyngier its_fixup_cmd(cmd); 6613171a47aSMarc Zyngier 662205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 6633171a47aSMarc Zyngier } 6643171a47aSMarc Zyngier 665cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 666cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 667cc2d3216SMarc Zyngier { 668cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 669cc2d3216SMarc Zyngier } 670cc2d3216SMarc Zyngier 671cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 672cc2d3216SMarc Zyngier { 673cc2d3216SMarc Zyngier int widx; 674cc2d3216SMarc Zyngier int ridx; 675cc2d3216SMarc Zyngier 676cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 677cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 678cc2d3216SMarc Zyngier 679cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 680cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 681cc2d3216SMarc Zyngier return 1; 682cc2d3216SMarc Zyngier 683cc2d3216SMarc Zyngier return 0; 684cc2d3216SMarc Zyngier } 685cc2d3216SMarc Zyngier 686cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 687cc2d3216SMarc Zyngier { 688cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 689cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 690cc2d3216SMarc Zyngier 691cc2d3216SMarc Zyngier while (its_queue_full(its)) { 692cc2d3216SMarc Zyngier count--; 693cc2d3216SMarc Zyngier if (!count) { 694cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 695cc2d3216SMarc Zyngier return NULL; 696cc2d3216SMarc Zyngier } 697cc2d3216SMarc Zyngier cpu_relax(); 698cc2d3216SMarc Zyngier udelay(1); 699cc2d3216SMarc Zyngier } 700cc2d3216SMarc Zyngier 701cc2d3216SMarc Zyngier cmd = its->cmd_write++; 702cc2d3216SMarc Zyngier 703cc2d3216SMarc Zyngier /* Handle queue wrapping */ 704cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 705cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 706cc2d3216SMarc Zyngier 70734d677a9SMarc Zyngier /* Clear command */ 70834d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 70934d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 71034d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 71134d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 71234d677a9SMarc Zyngier 713cc2d3216SMarc Zyngier return cmd; 714cc2d3216SMarc Zyngier } 715cc2d3216SMarc Zyngier 716cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 717cc2d3216SMarc Zyngier { 718cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 719cc2d3216SMarc Zyngier 720cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 721cc2d3216SMarc Zyngier 722cc2d3216SMarc Zyngier return its->cmd_write; 723cc2d3216SMarc Zyngier } 724cc2d3216SMarc Zyngier 725cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 726cc2d3216SMarc Zyngier { 727cc2d3216SMarc Zyngier /* 728cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 729cc2d3216SMarc Zyngier * the ITS. 730cc2d3216SMarc Zyngier */ 731cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 732328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 733cc2d3216SMarc Zyngier else 734cc2d3216SMarc Zyngier dsb(ishst); 735cc2d3216SMarc Zyngier } 736cc2d3216SMarc Zyngier 737a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 738cc2d3216SMarc Zyngier struct its_cmd_block *from, 739cc2d3216SMarc Zyngier struct its_cmd_block *to) 740cc2d3216SMarc Zyngier { 741cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 742cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 743cc2d3216SMarc Zyngier 744cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 745cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 746cc2d3216SMarc Zyngier 747cc2d3216SMarc Zyngier while (1) { 748cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 7499bdd8b1cSMarc Zyngier 7509bdd8b1cSMarc Zyngier /* Direct case */ 7519bdd8b1cSMarc Zyngier if (from_idx < to_idx && rd_idx >= to_idx) 7529bdd8b1cSMarc Zyngier break; 7539bdd8b1cSMarc Zyngier 7549bdd8b1cSMarc Zyngier /* Wrapped case */ 7559bdd8b1cSMarc Zyngier if (from_idx >= to_idx && rd_idx >= to_idx && rd_idx < from_idx) 756cc2d3216SMarc Zyngier break; 757cc2d3216SMarc Zyngier 758cc2d3216SMarc Zyngier count--; 759cc2d3216SMarc Zyngier if (!count) { 760a19b462fSMarc Zyngier pr_err_ratelimited("ITS queue timeout (%llu %llu %llu)\n", 761a19b462fSMarc Zyngier from_idx, to_idx, rd_idx); 762a19b462fSMarc Zyngier return -1; 763cc2d3216SMarc Zyngier } 764cc2d3216SMarc Zyngier cpu_relax(); 765cc2d3216SMarc Zyngier udelay(1); 766cc2d3216SMarc Zyngier } 767a19b462fSMarc Zyngier 768a19b462fSMarc Zyngier return 0; 769cc2d3216SMarc Zyngier } 770cc2d3216SMarc Zyngier 771e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 772e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 773e4f9094bSMarc Zyngier void name(struct its_node *its, \ 774e4f9094bSMarc Zyngier buildtype builder, \ 775e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 776e4f9094bSMarc Zyngier { \ 777e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 778e4f9094bSMarc Zyngier synctype *sync_obj; \ 779e4f9094bSMarc Zyngier unsigned long flags; \ 780e4f9094bSMarc Zyngier \ 781e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 782e4f9094bSMarc Zyngier \ 783e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 784e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 785e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 786e4f9094bSMarc Zyngier return; \ 787e4f9094bSMarc Zyngier } \ 78867047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 789e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 790e4f9094bSMarc Zyngier \ 791e4f9094bSMarc Zyngier if (sync_obj) { \ 792e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 793e4f9094bSMarc Zyngier if (!sync_cmd) \ 794e4f9094bSMarc Zyngier goto post; \ 795e4f9094bSMarc Zyngier \ 79667047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 797e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 798e4f9094bSMarc Zyngier } \ 799e4f9094bSMarc Zyngier \ 800e4f9094bSMarc Zyngier post: \ 801e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 802e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 803e4f9094bSMarc Zyngier \ 804a19b462fSMarc Zyngier if (its_wait_for_range_completion(its, cmd, next_cmd)) \ 805a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 806e4f9094bSMarc Zyngier } 807e4f9094bSMarc Zyngier 80867047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 80967047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 810e4f9094bSMarc Zyngier struct its_collection *sync_col) 811cc2d3216SMarc Zyngier { 812cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 813cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 814e4f9094bSMarc Zyngier 815cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 816cc2d3216SMarc Zyngier } 817cc2d3216SMarc Zyngier 818e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 819e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 820cc2d3216SMarc Zyngier 82167047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 82267047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 823d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 824d011e4e6SMarc Zyngier { 825d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 826d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 827d011e4e6SMarc Zyngier 828d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 829d011e4e6SMarc Zyngier } 830d011e4e6SMarc Zyngier 831d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 832d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 833d011e4e6SMarc Zyngier 8348d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 8358d85dcedSMarc Zyngier { 8368d85dcedSMarc Zyngier struct its_cmd_desc desc; 8378d85dcedSMarc Zyngier 8388d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 8398d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 8408d85dcedSMarc Zyngier 8418d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 8428d85dcedSMarc Zyngier } 8438d85dcedSMarc Zyngier 8448d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 8458d85dcedSMarc Zyngier { 8468d85dcedSMarc Zyngier struct its_cmd_desc desc; 8478d85dcedSMarc Zyngier 8488d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 8498d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 8508d85dcedSMarc Zyngier 8518d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 852cc2d3216SMarc Zyngier } 853cc2d3216SMarc Zyngier 854cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 855cc2d3216SMarc Zyngier { 856cc2d3216SMarc Zyngier struct its_cmd_desc desc; 857cc2d3216SMarc Zyngier 858cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 859cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 860cc2d3216SMarc Zyngier 861cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 862cc2d3216SMarc Zyngier } 863cc2d3216SMarc Zyngier 864cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 865cc2d3216SMarc Zyngier { 866cc2d3216SMarc Zyngier struct its_cmd_desc desc; 867cc2d3216SMarc Zyngier 868cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 869cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 870cc2d3216SMarc Zyngier 871cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 872cc2d3216SMarc Zyngier } 873cc2d3216SMarc Zyngier 874cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 875cc2d3216SMarc Zyngier int valid) 876cc2d3216SMarc Zyngier { 877cc2d3216SMarc Zyngier struct its_cmd_desc desc; 878cc2d3216SMarc Zyngier 879cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 880cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 881cc2d3216SMarc Zyngier 882cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 883cc2d3216SMarc Zyngier } 884cc2d3216SMarc Zyngier 8856a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 886cc2d3216SMarc Zyngier { 887cc2d3216SMarc Zyngier struct its_cmd_desc desc; 888cc2d3216SMarc Zyngier 8896a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 8906a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 8916a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 892cc2d3216SMarc Zyngier 8936a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 894cc2d3216SMarc Zyngier } 895cc2d3216SMarc Zyngier 896cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 897cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 898cc2d3216SMarc Zyngier { 899cc2d3216SMarc Zyngier struct its_cmd_desc desc; 900cc2d3216SMarc Zyngier 901cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 902cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 903591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 904cc2d3216SMarc Zyngier 905cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 906cc2d3216SMarc Zyngier } 907cc2d3216SMarc Zyngier 908cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 909cc2d3216SMarc Zyngier { 910cc2d3216SMarc Zyngier struct its_cmd_desc desc; 911cc2d3216SMarc Zyngier 912cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 913cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 914cc2d3216SMarc Zyngier 915cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 916cc2d3216SMarc Zyngier } 917cc2d3216SMarc Zyngier 918cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 919cc2d3216SMarc Zyngier { 920cc2d3216SMarc Zyngier struct its_cmd_desc desc; 921cc2d3216SMarc Zyngier 922cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 923cc2d3216SMarc Zyngier 924cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 925cc2d3216SMarc Zyngier } 926c48ed51cSMarc Zyngier 927d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 928d011e4e6SMarc Zyngier { 929d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 930d011e4e6SMarc Zyngier struct its_cmd_desc desc; 931d011e4e6SMarc Zyngier 932d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 933d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 934d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 935d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 936d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 937d011e4e6SMarc Zyngier 938d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 939d011e4e6SMarc Zyngier } 940d011e4e6SMarc Zyngier 941d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 942d011e4e6SMarc Zyngier { 943d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 944d011e4e6SMarc Zyngier struct its_cmd_desc desc; 945d011e4e6SMarc Zyngier 946d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 947d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 948d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 949d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 950d011e4e6SMarc Zyngier 951d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 952d011e4e6SMarc Zyngier } 953d011e4e6SMarc Zyngier 95475fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 95575fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 956eb78192bSMarc Zyngier { 957eb78192bSMarc Zyngier struct its_cmd_desc desc; 958eb78192bSMarc Zyngier 959eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 960eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 961eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 96275fd951bSMarc Zyngier 963eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 964eb78192bSMarc Zyngier } 965eb78192bSMarc Zyngier 9663171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 9673171a47aSMarc Zyngier { 9683171a47aSMarc Zyngier struct its_cmd_desc desc; 9693171a47aSMarc Zyngier struct its_node *its; 9703171a47aSMarc Zyngier unsigned long flags; 9713171a47aSMarc Zyngier int col_id = vpe->col_idx; 9723171a47aSMarc Zyngier 9733171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 9743171a47aSMarc Zyngier desc.its_vmovp_cmd.its_list = (u16)its_list_map; 9753171a47aSMarc Zyngier 9763171a47aSMarc Zyngier if (!its_list_map) { 9773171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 9783171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = 0; 9793171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9803171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9813171a47aSMarc Zyngier return; 9823171a47aSMarc Zyngier } 9833171a47aSMarc Zyngier 9843171a47aSMarc Zyngier /* 9853171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 9863171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 9873171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 9883171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 9893171a47aSMarc Zyngier * 9903171a47aSMarc Zyngier * Wall <-- Head. 9913171a47aSMarc Zyngier */ 9923171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 9933171a47aSMarc Zyngier 9943171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 9953171a47aSMarc Zyngier 9963171a47aSMarc Zyngier /* Emit VMOVPs */ 9973171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 9983171a47aSMarc Zyngier if (!its->is_v4) 9993171a47aSMarc Zyngier continue; 10003171a47aSMarc Zyngier 10012247e1bfSMarc Zyngier if (!vpe->its_vm->vlpi_count[its->list_nr]) 10022247e1bfSMarc Zyngier continue; 10032247e1bfSMarc Zyngier 10043171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 10053171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 10063171a47aSMarc Zyngier } 10073171a47aSMarc Zyngier 10083171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 10093171a47aSMarc Zyngier } 10103171a47aSMarc Zyngier 101140619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1012eb78192bSMarc Zyngier { 1013eb78192bSMarc Zyngier struct its_cmd_desc desc; 1014eb78192bSMarc Zyngier 1015eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1016eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1017eb78192bSMarc Zyngier } 1018eb78192bSMarc Zyngier 1019c48ed51cSMarc Zyngier /* 1020c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1021c48ed51cSMarc Zyngier */ 1022c48ed51cSMarc Zyngier 1023c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 1024c48ed51cSMarc Zyngier { 1025c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1026591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 1027c48ed51cSMarc Zyngier } 1028c48ed51cSMarc Zyngier 1029015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1030c48ed51cSMarc Zyngier { 1031015ec038SMarc Zyngier irq_hw_number_t hwirq; 1032*e1a2e201SMarc Zyngier void *va; 1033adcdb94eSMarc Zyngier u8 *cfg; 1034c48ed51cSMarc Zyngier 1035015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1036015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1037015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1038d4d7b4adSMarc Zyngier struct its_vlpi_map *map; 1039015ec038SMarc Zyngier 1040*e1a2e201SMarc Zyngier va = page_address(its_dev->event_map.vm->vprop_page); 1041d4d7b4adSMarc Zyngier map = &its_dev->event_map.vlpi_maps[event]; 1042d4d7b4adSMarc Zyngier hwirq = map->vintid; 1043d4d7b4adSMarc Zyngier 1044d4d7b4adSMarc Zyngier /* Remember the updated property */ 1045d4d7b4adSMarc Zyngier map->properties &= ~clr; 1046d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1047015ec038SMarc Zyngier } else { 1048*e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1049015ec038SMarc Zyngier hwirq = d->hwirq; 1050015ec038SMarc Zyngier } 1051adcdb94eSMarc Zyngier 1052*e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1053adcdb94eSMarc Zyngier *cfg &= ~clr; 1054015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1055c48ed51cSMarc Zyngier 1056c48ed51cSMarc Zyngier /* 1057c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1058c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1059c48ed51cSMarc Zyngier * Humpf... 1060c48ed51cSMarc Zyngier */ 1061c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1062328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1063c48ed51cSMarc Zyngier else 1064c48ed51cSMarc Zyngier dsb(ishst); 1065015ec038SMarc Zyngier } 1066015ec038SMarc Zyngier 1067015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1068015ec038SMarc Zyngier { 1069015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1070015ec038SMarc Zyngier 1071015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1072adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 1073c48ed51cSMarc Zyngier } 1074c48ed51cSMarc Zyngier 1075015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1076015ec038SMarc Zyngier { 1077015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1078015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1079015ec038SMarc Zyngier 1080015ec038SMarc Zyngier if (its_dev->event_map.vlpi_maps[event].db_enabled == enable) 1081015ec038SMarc Zyngier return; 1082015ec038SMarc Zyngier 1083015ec038SMarc Zyngier its_dev->event_map.vlpi_maps[event].db_enabled = enable; 1084015ec038SMarc Zyngier 1085015ec038SMarc Zyngier /* 1086015ec038SMarc Zyngier * More fun with the architecture: 1087015ec038SMarc Zyngier * 1088015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1089015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1090015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1091015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1092015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1093015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1094015ec038SMarc Zyngier */ 1095015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1096c48ed51cSMarc Zyngier } 1097c48ed51cSMarc Zyngier 1098c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1099c48ed51cSMarc Zyngier { 1100015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1101015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1102015ec038SMarc Zyngier 1103adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1104c48ed51cSMarc Zyngier } 1105c48ed51cSMarc Zyngier 1106c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1107c48ed51cSMarc Zyngier { 1108015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1109015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1110015ec038SMarc Zyngier 1111adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1112c48ed51cSMarc Zyngier } 1113c48ed51cSMarc Zyngier 1114c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1115c48ed51cSMarc Zyngier bool force) 1116c48ed51cSMarc Zyngier { 1117fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1118fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1119c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1120c48ed51cSMarc Zyngier struct its_collection *target_col; 1121c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1122c48ed51cSMarc Zyngier 1123015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1124015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1125015ec038SMarc Zyngier return -EINVAL; 1126015ec038SMarc Zyngier 1127fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1128fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1129fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1130fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1131fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1132fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1133fbf8f40eSGanapatrao Kulkarni } 1134fbf8f40eSGanapatrao Kulkarni } 1135fbf8f40eSGanapatrao Kulkarni 1136fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1137fbf8f40eSGanapatrao Kulkarni 1138c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1139c48ed51cSMarc Zyngier return -EINVAL; 1140c48ed51cSMarc Zyngier 11418b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 11428b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1143c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1144c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1145591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 11460d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 11478b8d94a7SMaJun } 1148c48ed51cSMarc Zyngier 1149c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1150c48ed51cSMarc Zyngier } 1151c48ed51cSMarc Zyngier 1152558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1153558b0165SArd Biesheuvel { 1154558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1155558b0165SArd Biesheuvel 1156558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1157558b0165SArd Biesheuvel } 1158558b0165SArd Biesheuvel 1159b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1160b48ac83dSMarc Zyngier { 1161b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1162b48ac83dSMarc Zyngier struct its_node *its; 1163b48ac83dSMarc Zyngier u64 addr; 1164b48ac83dSMarc Zyngier 1165b48ac83dSMarc Zyngier its = its_dev->its; 1166558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1167b48ac83dSMarc Zyngier 1168b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1169b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1170b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 117144bb7e24SRobin Murphy 117244bb7e24SRobin Murphy iommu_dma_map_msi_msg(d->irq, msg); 1173b48ac83dSMarc Zyngier } 1174b48ac83dSMarc Zyngier 11758d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 11768d85dcedSMarc Zyngier enum irqchip_irq_state which, 11778d85dcedSMarc Zyngier bool state) 11788d85dcedSMarc Zyngier { 11798d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 11808d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 11818d85dcedSMarc Zyngier 11828d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 11838d85dcedSMarc Zyngier return -EINVAL; 11848d85dcedSMarc Zyngier 11858d85dcedSMarc Zyngier if (state) 11868d85dcedSMarc Zyngier its_send_int(its_dev, event); 11878d85dcedSMarc Zyngier else 11888d85dcedSMarc Zyngier its_send_clear(its_dev, event); 11898d85dcedSMarc Zyngier 11908d85dcedSMarc Zyngier return 0; 11918d85dcedSMarc Zyngier } 11928d85dcedSMarc Zyngier 11932247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 11942247e1bfSMarc Zyngier { 11952247e1bfSMarc Zyngier unsigned long flags; 11962247e1bfSMarc Zyngier 11972247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 11982247e1bfSMarc Zyngier if (!its_list_map) 11992247e1bfSMarc Zyngier return; 12002247e1bfSMarc Zyngier 12012247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12022247e1bfSMarc Zyngier 12032247e1bfSMarc Zyngier /* 12042247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 12052247e1bfSMarc Zyngier * them mapped now. 12062247e1bfSMarc Zyngier */ 12072247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 12082247e1bfSMarc Zyngier 12092247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 12102247e1bfSMarc Zyngier int i; 12112247e1bfSMarc Zyngier 12122247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 12132247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 121444c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 12152247e1bfSMarc Zyngier 12162247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 12172247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 12182247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 12192247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 122044c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 12212247e1bfSMarc Zyngier } 12222247e1bfSMarc Zyngier } 12232247e1bfSMarc Zyngier 12242247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12252247e1bfSMarc Zyngier } 12262247e1bfSMarc Zyngier 12272247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 12282247e1bfSMarc Zyngier { 12292247e1bfSMarc Zyngier unsigned long flags; 12302247e1bfSMarc Zyngier 12312247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12322247e1bfSMarc Zyngier if (!its_list_map) 12332247e1bfSMarc Zyngier return; 12342247e1bfSMarc Zyngier 12352247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12362247e1bfSMarc Zyngier 12372247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 12382247e1bfSMarc Zyngier int i; 12392247e1bfSMarc Zyngier 12402247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 12412247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 12422247e1bfSMarc Zyngier } 12432247e1bfSMarc Zyngier 12442247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12452247e1bfSMarc Zyngier } 12462247e1bfSMarc Zyngier 1247d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1248d011e4e6SMarc Zyngier { 1249d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1250d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1251d011e4e6SMarc Zyngier int ret = 0; 1252d011e4e6SMarc Zyngier 1253d011e4e6SMarc Zyngier if (!info->map) 1254d011e4e6SMarc Zyngier return -EINVAL; 1255d011e4e6SMarc Zyngier 1256d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1257d011e4e6SMarc Zyngier 1258d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1259d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1260d011e4e6SMarc Zyngier 12616396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 1262d011e4e6SMarc Zyngier GFP_KERNEL); 1263d011e4e6SMarc Zyngier if (!maps) { 1264d011e4e6SMarc Zyngier ret = -ENOMEM; 1265d011e4e6SMarc Zyngier goto out; 1266d011e4e6SMarc Zyngier } 1267d011e4e6SMarc Zyngier 1268d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1269d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1270d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1271d011e4e6SMarc Zyngier ret = -EINVAL; 1272d011e4e6SMarc Zyngier goto out; 1273d011e4e6SMarc Zyngier } 1274d011e4e6SMarc Zyngier 1275d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1276d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1277d011e4e6SMarc Zyngier 1278d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1279d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1280d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1281d011e4e6SMarc Zyngier } else { 12822247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 12832247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 12842247e1bfSMarc Zyngier 1285d4d7b4adSMarc Zyngier /* 1286d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1287d4d7b4adSMarc Zyngier * start poking the virtual property table. 1288d4d7b4adSMarc Zyngier */ 1289d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1290d4d7b4adSMarc Zyngier 1291d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1292d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1293d4d7b4adSMarc Zyngier 1294d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1295d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1296d011e4e6SMarc Zyngier 1297d011e4e6SMarc Zyngier /* and install the virtual one */ 1298d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1299d011e4e6SMarc Zyngier 1300d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1301d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1302d011e4e6SMarc Zyngier } 1303d011e4e6SMarc Zyngier 1304d011e4e6SMarc Zyngier out: 1305d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1306d011e4e6SMarc Zyngier return ret; 1307d011e4e6SMarc Zyngier } 1308d011e4e6SMarc Zyngier 1309d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1310d011e4e6SMarc Zyngier { 1311d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1312d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1313d011e4e6SMarc Zyngier int ret = 0; 1314d011e4e6SMarc Zyngier 1315d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1316d011e4e6SMarc Zyngier 1317d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || 1318d011e4e6SMarc Zyngier !its_dev->event_map.vlpi_maps[event].vm) { 1319d011e4e6SMarc Zyngier ret = -EINVAL; 1320d011e4e6SMarc Zyngier goto out; 1321d011e4e6SMarc Zyngier } 1322d011e4e6SMarc Zyngier 1323d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1324d011e4e6SMarc Zyngier *info->map = its_dev->event_map.vlpi_maps[event]; 1325d011e4e6SMarc Zyngier 1326d011e4e6SMarc Zyngier out: 1327d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1328d011e4e6SMarc Zyngier return ret; 1329d011e4e6SMarc Zyngier } 1330d011e4e6SMarc Zyngier 1331d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1332d011e4e6SMarc Zyngier { 1333d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1334d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1335d011e4e6SMarc Zyngier int ret = 0; 1336d011e4e6SMarc Zyngier 1337d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1338d011e4e6SMarc Zyngier 1339d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1340d011e4e6SMarc Zyngier ret = -EINVAL; 1341d011e4e6SMarc Zyngier goto out; 1342d011e4e6SMarc Zyngier } 1343d011e4e6SMarc Zyngier 1344d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1345d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1346d011e4e6SMarc Zyngier 1347d011e4e6SMarc Zyngier /* and restore the physical one */ 1348d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1349d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1350d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1351d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1352d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1353d011e4e6SMarc Zyngier 13542247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 13552247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 13562247e1bfSMarc Zyngier 1357d011e4e6SMarc Zyngier /* 1358d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1359d011e4e6SMarc Zyngier * this was the last VLPI. 1360d011e4e6SMarc Zyngier */ 1361d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1362d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1363d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1364d011e4e6SMarc Zyngier } 1365d011e4e6SMarc Zyngier 1366d011e4e6SMarc Zyngier out: 1367d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1368d011e4e6SMarc Zyngier return ret; 1369d011e4e6SMarc Zyngier } 1370d011e4e6SMarc Zyngier 1371015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1372015ec038SMarc Zyngier { 1373015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1374015ec038SMarc Zyngier 1375015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1376015ec038SMarc Zyngier return -EINVAL; 1377015ec038SMarc Zyngier 1378015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1379015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1380015ec038SMarc Zyngier else 1381015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1382015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1383015ec038SMarc Zyngier 1384015ec038SMarc Zyngier return 0; 1385015ec038SMarc Zyngier } 1386015ec038SMarc Zyngier 1387c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1388c808eea8SMarc Zyngier { 1389c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1390c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1391c808eea8SMarc Zyngier 1392c808eea8SMarc Zyngier /* Need a v4 ITS */ 1393d011e4e6SMarc Zyngier if (!its_dev->its->is_v4) 1394c808eea8SMarc Zyngier return -EINVAL; 1395c808eea8SMarc Zyngier 1396d011e4e6SMarc Zyngier /* Unmap request? */ 1397d011e4e6SMarc Zyngier if (!info) 1398d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1399d011e4e6SMarc Zyngier 1400c808eea8SMarc Zyngier switch (info->cmd_type) { 1401c808eea8SMarc Zyngier case MAP_VLPI: 1402d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1403c808eea8SMarc Zyngier 1404c808eea8SMarc Zyngier case GET_VLPI: 1405d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1406c808eea8SMarc Zyngier 1407c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1408c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1409015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1410c808eea8SMarc Zyngier 1411c808eea8SMarc Zyngier default: 1412c808eea8SMarc Zyngier return -EINVAL; 1413c808eea8SMarc Zyngier } 1414c808eea8SMarc Zyngier } 1415c808eea8SMarc Zyngier 1416c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1417c48ed51cSMarc Zyngier .name = "ITS", 1418c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1419c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1420004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1421c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1422b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 14238d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1424c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1425b48ac83dSMarc Zyngier }; 1426b48ac83dSMarc Zyngier 1427880cb3cdSMarc Zyngier 1428bf9529f8SMarc Zyngier /* 1429bf9529f8SMarc Zyngier * How we allocate LPIs: 1430bf9529f8SMarc Zyngier * 1431880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1432880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1433880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1434880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1435bf9529f8SMarc Zyngier * 1436880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1437880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1438880cb3cdSMarc Zyngier * already free block. 1439880cb3cdSMarc Zyngier * 1440880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1441880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1442880cb3cdSMarc Zyngier */ 14434cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1444880cb3cdSMarc Zyngier 1445880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 1446880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 1447bf9529f8SMarc Zyngier 1448880cb3cdSMarc Zyngier struct lpi_range { 1449880cb3cdSMarc Zyngier struct list_head entry; 1450880cb3cdSMarc Zyngier u32 base_id; 1451880cb3cdSMarc Zyngier u32 span; 1452880cb3cdSMarc Zyngier }; 1453880cb3cdSMarc Zyngier 1454880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 1455bf9529f8SMarc Zyngier { 1456880cb3cdSMarc Zyngier struct lpi_range *range; 1457880cb3cdSMarc Zyngier 1458880cb3cdSMarc Zyngier range = kzalloc(sizeof(*range), GFP_KERNEL); 1459880cb3cdSMarc Zyngier if (range) { 1460880cb3cdSMarc Zyngier INIT_LIST_HEAD(&range->entry); 1461880cb3cdSMarc Zyngier range->base_id = base; 1462880cb3cdSMarc Zyngier range->span = span; 1463bf9529f8SMarc Zyngier } 1464bf9529f8SMarc Zyngier 1465880cb3cdSMarc Zyngier return range; 1466880cb3cdSMarc Zyngier } 1467880cb3cdSMarc Zyngier 1468880cb3cdSMarc Zyngier static int lpi_range_cmp(void *priv, struct list_head *a, struct list_head *b) 1469bf9529f8SMarc Zyngier { 1470880cb3cdSMarc Zyngier struct lpi_range *ra, *rb; 1471880cb3cdSMarc Zyngier 1472880cb3cdSMarc Zyngier ra = container_of(a, struct lpi_range, entry); 1473880cb3cdSMarc Zyngier rb = container_of(b, struct lpi_range, entry); 1474880cb3cdSMarc Zyngier 1475880cb3cdSMarc Zyngier return rb->base_id - ra->base_id; 1476880cb3cdSMarc Zyngier } 1477880cb3cdSMarc Zyngier 1478880cb3cdSMarc Zyngier static void merge_lpi_ranges(void) 1479880cb3cdSMarc Zyngier { 1480880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1481880cb3cdSMarc Zyngier 1482880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1483880cb3cdSMarc Zyngier if (!list_is_last(&range->entry, &lpi_range_list) && 1484880cb3cdSMarc Zyngier (tmp->base_id == (range->base_id + range->span))) { 1485880cb3cdSMarc Zyngier tmp->base_id = range->base_id; 1486880cb3cdSMarc Zyngier tmp->span += range->span; 1487880cb3cdSMarc Zyngier list_del(&range->entry); 1488880cb3cdSMarc Zyngier kfree(range); 1489880cb3cdSMarc Zyngier } 1490880cb3cdSMarc Zyngier } 1491880cb3cdSMarc Zyngier } 1492880cb3cdSMarc Zyngier 1493880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 1494880cb3cdSMarc Zyngier { 1495880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1496880cb3cdSMarc Zyngier int err = -ENOSPC; 1497880cb3cdSMarc Zyngier 1498880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1499880cb3cdSMarc Zyngier 1500880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1501880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 1502880cb3cdSMarc Zyngier *base = range->base_id; 1503880cb3cdSMarc Zyngier range->base_id += nr_lpis; 1504880cb3cdSMarc Zyngier range->span -= nr_lpis; 1505880cb3cdSMarc Zyngier 1506880cb3cdSMarc Zyngier if (range->span == 0) { 1507880cb3cdSMarc Zyngier list_del(&range->entry); 1508880cb3cdSMarc Zyngier kfree(range); 1509880cb3cdSMarc Zyngier } 1510880cb3cdSMarc Zyngier 1511880cb3cdSMarc Zyngier err = 0; 1512880cb3cdSMarc Zyngier break; 1513880cb3cdSMarc Zyngier } 1514880cb3cdSMarc Zyngier } 1515880cb3cdSMarc Zyngier 1516880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1517880cb3cdSMarc Zyngier 1518880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 1519880cb3cdSMarc Zyngier return err; 1520880cb3cdSMarc Zyngier } 1521880cb3cdSMarc Zyngier 1522880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 1523880cb3cdSMarc Zyngier { 1524880cb3cdSMarc Zyngier struct lpi_range *new; 1525880cb3cdSMarc Zyngier int err = 0; 1526880cb3cdSMarc Zyngier 1527880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1528880cb3cdSMarc Zyngier 1529880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 1530880cb3cdSMarc Zyngier if (!new) { 1531880cb3cdSMarc Zyngier err = -ENOMEM; 1532880cb3cdSMarc Zyngier goto out; 1533880cb3cdSMarc Zyngier } 1534880cb3cdSMarc Zyngier 1535880cb3cdSMarc Zyngier list_add(&new->entry, &lpi_range_list); 1536880cb3cdSMarc Zyngier list_sort(NULL, &lpi_range_list, lpi_range_cmp); 1537880cb3cdSMarc Zyngier merge_lpi_ranges(); 1538880cb3cdSMarc Zyngier out: 1539880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1540880cb3cdSMarc Zyngier return err; 1541bf9529f8SMarc Zyngier } 1542bf9529f8SMarc Zyngier 154304a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1544bf9529f8SMarc Zyngier { 1545880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 154612b2905aSMarc Zyngier u32 numlpis; 1547880cb3cdSMarc Zyngier int err; 1548bf9529f8SMarc Zyngier 154912b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 155012b2905aSMarc Zyngier 155112b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 155212b2905aSMarc Zyngier lpis = numlpis; 155312b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 155412b2905aSMarc Zyngier lpis); 155512b2905aSMarc Zyngier } 155612b2905aSMarc Zyngier 1557880cb3cdSMarc Zyngier /* 1558880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 1559880cb3cdSMarc Zyngier * full range of LPIs. 1560880cb3cdSMarc Zyngier */ 1561880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 1562880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 1563880cb3cdSMarc Zyngier return err; 1564bf9529f8SMarc Zyngier } 1565bf9529f8SMarc Zyngier 156638dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 1567bf9529f8SMarc Zyngier { 1568bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1569880cb3cdSMarc Zyngier int err = 0; 1570bf9529f8SMarc Zyngier 1571bf9529f8SMarc Zyngier do { 157238dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 1573880cb3cdSMarc Zyngier if (!err) 1574bf9529f8SMarc Zyngier break; 1575bf9529f8SMarc Zyngier 157638dd7c49SMarc Zyngier nr_irqs /= 2; 157738dd7c49SMarc Zyngier } while (nr_irqs > 0); 1578bf9529f8SMarc Zyngier 1579880cb3cdSMarc Zyngier if (err) 1580bf9529f8SMarc Zyngier goto out; 1581bf9529f8SMarc Zyngier 158238dd7c49SMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_irqs), sizeof (long), GFP_ATOMIC); 1583bf9529f8SMarc Zyngier if (!bitmap) 1584bf9529f8SMarc Zyngier goto out; 1585bf9529f8SMarc Zyngier 158638dd7c49SMarc Zyngier *nr_ids = nr_irqs; 1587bf9529f8SMarc Zyngier 1588bf9529f8SMarc Zyngier out: 1589c8415b94SMarc Zyngier if (!bitmap) 1590c8415b94SMarc Zyngier *base = *nr_ids = 0; 1591c8415b94SMarc Zyngier 1592bf9529f8SMarc Zyngier return bitmap; 1593bf9529f8SMarc Zyngier } 1594bf9529f8SMarc Zyngier 159538dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 1596bf9529f8SMarc Zyngier { 1597880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 1598cf2be8baSMarc Zyngier kfree(bitmap); 1599bf9529f8SMarc Zyngier } 16001ac19ca6SMarc Zyngier 1601053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 1602053be485SMarc Zyngier { 1603053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 1604053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 1605053be485SMarc Zyngier 1606053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 1607053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 1608053be485SMarc Zyngier } 1609053be485SMarc Zyngier 16100e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 16110e5ccf91SMarc Zyngier { 16120e5ccf91SMarc Zyngier struct page *prop_page; 16131ac19ca6SMarc Zyngier 16140e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 16150e5ccf91SMarc Zyngier if (!prop_page) 16160e5ccf91SMarc Zyngier return NULL; 16170e5ccf91SMarc Zyngier 1618053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 16190e5ccf91SMarc Zyngier 16200e5ccf91SMarc Zyngier return prop_page; 16210e5ccf91SMarc Zyngier } 16220e5ccf91SMarc Zyngier 16237d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 16247d75bbb4SMarc Zyngier { 16257d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 16267d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 16277d75bbb4SMarc Zyngier } 16281ac19ca6SMarc Zyngier 162911e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 16301ac19ca6SMarc Zyngier { 1631*e1a2e201SMarc Zyngier struct page *page; 16321ac19ca6SMarc Zyngier 16334cb205c0SJia He lpi_id_bits = min_t(u32, GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 16344cb205c0SJia He ITS_MAX_LPI_NRBITS); 1635*e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 1636*e1a2e201SMarc Zyngier if (!page) { 16371ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 16381ac19ca6SMarc Zyngier return -ENOMEM; 16391ac19ca6SMarc Zyngier } 16401ac19ca6SMarc Zyngier 1641*e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 1642*e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 1643*e1a2e201SMarc Zyngier 1644*e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 1645*e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 16461ac19ca6SMarc Zyngier 16476c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 16481ac19ca6SMarc Zyngier } 16491ac19ca6SMarc Zyngier 16501ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 16511ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 16521ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 16534f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 16541ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 16551ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 16561ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 16571ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 16581ac19ca6SMarc Zyngier }; 16591ac19ca6SMarc Zyngier 16602d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 16612d81d425SShanker Donthineni { 16622d81d425SShanker Donthineni u32 idx = baser - its->tables; 16632d81d425SShanker Donthineni 16640968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 16652d81d425SShanker Donthineni } 16662d81d425SShanker Donthineni 16672d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 16682d81d425SShanker Donthineni u64 val) 16692d81d425SShanker Donthineni { 16702d81d425SShanker Donthineni u32 idx = baser - its->tables; 16712d81d425SShanker Donthineni 16720968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 16732d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 16742d81d425SShanker Donthineni } 16752d81d425SShanker Donthineni 16769347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 16773faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 16783faf24eaSShanker Donthineni bool indirect) 16799347359aSShanker Donthineni { 16809347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 16819347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 16829347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 168330ae9610SShanker Donthineni u64 baser_phys, tmp; 16849347359aSShanker Donthineni u32 alloc_pages; 16859347359aSShanker Donthineni void *base; 16869347359aSShanker Donthineni 16879347359aSShanker Donthineni retry_alloc_baser: 16889347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 16899347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 16909347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 16919347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 16929347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 16939347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 16949347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 16959347359aSShanker Donthineni } 16969347359aSShanker Donthineni 16979347359aSShanker Donthineni base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 16989347359aSShanker Donthineni if (!base) 16999347359aSShanker Donthineni return -ENOMEM; 17009347359aSShanker Donthineni 170130ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 170230ae9610SShanker Donthineni 170330ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 170430ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 170530ae9610SShanker Donthineni 170630ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 170730ae9610SShanker Donthineni if (psz != SZ_64K) { 170830ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 170930ae9610SShanker Donthineni free_pages((unsigned long)base, order); 171030ae9610SShanker Donthineni return -ENXIO; 171130ae9610SShanker Donthineni } 171230ae9610SShanker Donthineni 171330ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 171430ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 171530ae9610SShanker Donthineni } 171630ae9610SShanker Donthineni 17179347359aSShanker Donthineni retry_baser: 171830ae9610SShanker Donthineni val = (baser_phys | 17199347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 17209347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 17219347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 17229347359aSShanker Donthineni cache | 17239347359aSShanker Donthineni shr | 17249347359aSShanker Donthineni GITS_BASER_VALID); 17259347359aSShanker Donthineni 17263faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 17273faf24eaSShanker Donthineni 17289347359aSShanker Donthineni switch (psz) { 17299347359aSShanker Donthineni case SZ_4K: 17309347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 17319347359aSShanker Donthineni break; 17329347359aSShanker Donthineni case SZ_16K: 17339347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 17349347359aSShanker Donthineni break; 17359347359aSShanker Donthineni case SZ_64K: 17369347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 17379347359aSShanker Donthineni break; 17389347359aSShanker Donthineni } 17399347359aSShanker Donthineni 17409347359aSShanker Donthineni its_write_baser(its, baser, val); 17419347359aSShanker Donthineni tmp = baser->val; 17429347359aSShanker Donthineni 17439347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 17449347359aSShanker Donthineni /* 17459347359aSShanker Donthineni * Shareability didn't stick. Just use 17469347359aSShanker Donthineni * whatever the read reported, which is likely 17479347359aSShanker Donthineni * to be the only thing this redistributor 17489347359aSShanker Donthineni * supports. If that's zero, make it 17499347359aSShanker Donthineni * non-cacheable as well. 17509347359aSShanker Donthineni */ 17519347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 17529347359aSShanker Donthineni if (!shr) { 17539347359aSShanker Donthineni cache = GITS_BASER_nC; 1754328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 17559347359aSShanker Donthineni } 17569347359aSShanker Donthineni goto retry_baser; 17579347359aSShanker Donthineni } 17589347359aSShanker Donthineni 17599347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 17609347359aSShanker Donthineni /* 17619347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 17629347359aSShanker Donthineni * size and retry. If we reach 4K, then 17639347359aSShanker Donthineni * something is horribly wrong... 17649347359aSShanker Donthineni */ 17659347359aSShanker Donthineni free_pages((unsigned long)base, order); 17669347359aSShanker Donthineni baser->base = NULL; 17679347359aSShanker Donthineni 17689347359aSShanker Donthineni switch (psz) { 17699347359aSShanker Donthineni case SZ_16K: 17709347359aSShanker Donthineni psz = SZ_4K; 17719347359aSShanker Donthineni goto retry_alloc_baser; 17729347359aSShanker Donthineni case SZ_64K: 17739347359aSShanker Donthineni psz = SZ_16K; 17749347359aSShanker Donthineni goto retry_alloc_baser; 17759347359aSShanker Donthineni } 17769347359aSShanker Donthineni } 17779347359aSShanker Donthineni 17789347359aSShanker Donthineni if (val != tmp) { 1779b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 17809347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1781b11283ebSVladimir Murzin val, tmp); 17829347359aSShanker Donthineni free_pages((unsigned long)base, order); 17839347359aSShanker Donthineni return -ENXIO; 17849347359aSShanker Donthineni } 17859347359aSShanker Donthineni 17869347359aSShanker Donthineni baser->order = order; 17879347359aSShanker Donthineni baser->base = base; 17889347359aSShanker Donthineni baser->psz = psz; 17893faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 17909347359aSShanker Donthineni 17913faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1792d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 17939347359aSShanker Donthineni its_base_type_string[type], 17949347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 17953faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 17969347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 17979347359aSShanker Donthineni 17989347359aSShanker Donthineni return 0; 17999347359aSShanker Donthineni } 18009347359aSShanker Donthineni 18014cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 18024cacac57SMarc Zyngier struct its_baser *baser, 180332bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 18044b75c459SShanker Donthineni { 18054cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 18064cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 18074cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 18082fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 18094b75c459SShanker Donthineni u32 new_order = *order; 18103faf24eaSShanker Donthineni bool indirect = false; 18113faf24eaSShanker Donthineni 18123faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 18133faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 18143faf24eaSShanker Donthineni /* 18153faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 18163faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 18173faf24eaSShanker Donthineni */ 18183faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 18193faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 18203faf24eaSShanker Donthineni 18213faf24eaSShanker Donthineni if (indirect) { 18223faf24eaSShanker Donthineni /* 18233faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 18243faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 18253faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 18263faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 18273faf24eaSShanker Donthineni * entry size. 18283faf24eaSShanker Donthineni */ 1829d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 18303faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 18313faf24eaSShanker Donthineni } 18323faf24eaSShanker Donthineni } 18334b75c459SShanker Donthineni 18344b75c459SShanker Donthineni /* 18354b75c459SShanker Donthineni * Allocate as many entries as required to fit the 18364b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 18374b75c459SShanker Donthineni * space being incredibly sparse, this results in a 18383faf24eaSShanker Donthineni * massive waste of memory if two-level device table 18393faf24eaSShanker Donthineni * feature is not supported by hardware. 18404b75c459SShanker Donthineni */ 18414b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 18424b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 18434b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1844d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 18454cacac57SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %u->%u\n", 18464cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 18474cacac57SMarc Zyngier its->device_ids, ids); 18484b75c459SShanker Donthineni } 18494b75c459SShanker Donthineni 18504b75c459SShanker Donthineni *order = new_order; 18513faf24eaSShanker Donthineni 18523faf24eaSShanker Donthineni return indirect; 18534b75c459SShanker Donthineni } 18544b75c459SShanker Donthineni 18551ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 18561ac19ca6SMarc Zyngier { 18571ac19ca6SMarc Zyngier int i; 18581ac19ca6SMarc Zyngier 18591ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 18601a485f4dSShanker Donthineni if (its->tables[i].base) { 18611a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 18621a485f4dSShanker Donthineni its->tables[i].order); 18631a485f4dSShanker Donthineni its->tables[i].base = NULL; 18641ac19ca6SMarc Zyngier } 18651ac19ca6SMarc Zyngier } 18661ac19ca6SMarc Zyngier } 18671ac19ca6SMarc Zyngier 18680e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 18691ac19ca6SMarc Zyngier { 18701ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 18712fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 18729347359aSShanker Donthineni u32 psz = SZ_64K; 18739347359aSShanker Donthineni int err, i; 187494100970SRobert Richter 1875fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 1876fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 18779347359aSShanker Donthineni cache = GITS_BASER_nCnB; 1878466b7d16SShanker Donthineni 18791ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 18802d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 18812d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 18821ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 18839347359aSShanker Donthineni u32 order = get_order(psz); 18843faf24eaSShanker Donthineni bool indirect = false; 18851ac19ca6SMarc Zyngier 18864cacac57SMarc Zyngier switch (type) { 18874cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 18881ac19ca6SMarc Zyngier continue; 18891ac19ca6SMarc Zyngier 18904cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 189132bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 189232bd44dcSShanker Donthineni psz, &order, 189332bd44dcSShanker Donthineni its->device_ids); 18944cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 18954cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 189632bd44dcSShanker Donthineni psz, &order, 189732bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 18984cacac57SMarc Zyngier break; 18994cacac57SMarc Zyngier } 1900f54b97edSMarc Zyngier 19013faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 19029347359aSShanker Donthineni if (err < 0) { 19039347359aSShanker Donthineni its_free_tables(its); 19049347359aSShanker Donthineni return err; 190530f21363SRobert Richter } 190630f21363SRobert Richter 19079347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 19089347359aSShanker Donthineni psz = baser->psz; 19099347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 19109347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 19111ac19ca6SMarc Zyngier } 19121ac19ca6SMarc Zyngier 19131ac19ca6SMarc Zyngier return 0; 19141ac19ca6SMarc Zyngier } 19151ac19ca6SMarc Zyngier 19161ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 19171ac19ca6SMarc Zyngier { 191883559b47SMarc Zyngier int i; 191983559b47SMarc Zyngier 19206396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 19211ac19ca6SMarc Zyngier GFP_KERNEL); 19221ac19ca6SMarc Zyngier if (!its->collections) 19231ac19ca6SMarc Zyngier return -ENOMEM; 19241ac19ca6SMarc Zyngier 192583559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 192683559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 192783559b47SMarc Zyngier 19281ac19ca6SMarc Zyngier return 0; 19291ac19ca6SMarc Zyngier } 19301ac19ca6SMarc Zyngier 19317c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 19327c297a2dSMarc Zyngier { 19337c297a2dSMarc Zyngier struct page *pend_page; 1934adaab500SMarc Zyngier 19357c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 1936adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 19377c297a2dSMarc Zyngier if (!pend_page) 19387c297a2dSMarc Zyngier return NULL; 19397c297a2dSMarc Zyngier 19407c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 19417c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 19427c297a2dSMarc Zyngier 19437c297a2dSMarc Zyngier return pend_page; 19447c297a2dSMarc Zyngier } 19457c297a2dSMarc Zyngier 19467d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 19477d75bbb4SMarc Zyngier { 1948adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 19497d75bbb4SMarc Zyngier } 19507d75bbb4SMarc Zyngier 195111e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 195211e37d35SMarc Zyngier { 195311e37d35SMarc Zyngier int err, cpu; 195411e37d35SMarc Zyngier 195511e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 195611e37d35SMarc Zyngier if (err) 195711e37d35SMarc Zyngier return err; 195811e37d35SMarc Zyngier 195911e37d35SMarc Zyngier /* 196011e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 196111e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 196211e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 196311e37d35SMarc Zyngier */ 196411e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 196511e37d35SMarc Zyngier struct page *pend_page; 196611e37d35SMarc Zyngier 196711e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 196811e37d35SMarc Zyngier if (!pend_page) { 196911e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 197011e37d35SMarc Zyngier return -ENOMEM; 197111e37d35SMarc Zyngier } 197211e37d35SMarc Zyngier 197311e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 197411e37d35SMarc Zyngier } 197511e37d35SMarc Zyngier 197611e37d35SMarc Zyngier return 0; 197711e37d35SMarc Zyngier } 197811e37d35SMarc Zyngier 19791ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 19801ac19ca6SMarc Zyngier { 19811ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 19821ac19ca6SMarc Zyngier struct page *pend_page; 198311e37d35SMarc Zyngier phys_addr_t paddr; 19841ac19ca6SMarc Zyngier u64 val, tmp; 19851ac19ca6SMarc Zyngier 198611e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 19871ac19ca6SMarc Zyngier return; 19881ac19ca6SMarc Zyngier 198911e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 19901ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 19911ac19ca6SMarc Zyngier 19921ac19ca6SMarc Zyngier /* set PROPBASE */ 1993*e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 19941ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 19952fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 19961ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 19971ac19ca6SMarc Zyngier 19980968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 19990968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 20001ac19ca6SMarc Zyngier 20011ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 2002241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 2003241a386cSMarc Zyngier /* 2004241a386cSMarc Zyngier * The HW reports non-shareable, we must 2005241a386cSMarc Zyngier * remove the cacheability attributes as 2006241a386cSMarc Zyngier * well. 2007241a386cSMarc Zyngier */ 2008241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 2009241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 2010241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 20110968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 2012241a386cSMarc Zyngier } 20131ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 20141ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 20151ac19ca6SMarc Zyngier } 20161ac19ca6SMarc Zyngier 20171ac19ca6SMarc Zyngier /* set PENDBASE */ 20181ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 20194ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 20202fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 20211ac19ca6SMarc Zyngier 20220968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 20230968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2024241a386cSMarc Zyngier 2025241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 2026241a386cSMarc Zyngier /* 2027241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 2028241a386cSMarc Zyngier * cacheability attributes as well. 2029241a386cSMarc Zyngier */ 2030241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 2031241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 2032241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 20330968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 2034241a386cSMarc Zyngier } 20351ac19ca6SMarc Zyngier 20361ac19ca6SMarc Zyngier /* Enable LPIs */ 20371ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 20381ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 20391ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 20401ac19ca6SMarc Zyngier 20411ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 20421ac19ca6SMarc Zyngier dsb(sy); 204311e37d35SMarc Zyngier gic_data_rdist()->lpi_enabled = true; 204411e37d35SMarc Zyngier pr_info("GICv3: CPU%d: using LPI pending table @%pa\n", 204511e37d35SMarc Zyngier smp_processor_id(), 204611e37d35SMarc Zyngier &paddr); 20471ac19ca6SMarc Zyngier } 20481ac19ca6SMarc Zyngier 2049920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 20501ac19ca6SMarc Zyngier { 2051920181ceSDerek Basehore int cpu = smp_processor_id(); 20521ac19ca6SMarc Zyngier u64 target; 20531ac19ca6SMarc Zyngier 2054fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 2055fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 2056fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 2057fbf8f40eSGanapatrao Kulkarni 2058fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 2059fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 2060fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 2061920181ceSDerek Basehore return; 2062fbf8f40eSGanapatrao Kulkarni } 2063fbf8f40eSGanapatrao Kulkarni 20641ac19ca6SMarc Zyngier /* 20651ac19ca6SMarc Zyngier * We now have to bind each collection to its target 20661ac19ca6SMarc Zyngier * redistributor. 20671ac19ca6SMarc Zyngier */ 2068589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 20691ac19ca6SMarc Zyngier /* 20701ac19ca6SMarc Zyngier * This ITS wants the physical address of the 20711ac19ca6SMarc Zyngier * redistributor. 20721ac19ca6SMarc Zyngier */ 20731ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 20741ac19ca6SMarc Zyngier } else { 2075920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 2076589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 2077263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 20781ac19ca6SMarc Zyngier } 20791ac19ca6SMarc Zyngier 20801ac19ca6SMarc Zyngier /* Perform collection mapping */ 20811ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 20821ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 20831ac19ca6SMarc Zyngier 20841ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 20851ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 20861ac19ca6SMarc Zyngier } 20871ac19ca6SMarc Zyngier 2088920181ceSDerek Basehore static void its_cpu_init_collections(void) 2089920181ceSDerek Basehore { 2090920181ceSDerek Basehore struct its_node *its; 2091920181ceSDerek Basehore 2092a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 2093920181ceSDerek Basehore 2094920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 2095920181ceSDerek Basehore its_cpu_init_collection(its); 2096920181ceSDerek Basehore 2097a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 20981ac19ca6SMarc Zyngier } 209984a6a2e7SMarc Zyngier 210084a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 210184a6a2e7SMarc Zyngier { 210284a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 21033e39e8f5SMarc Zyngier unsigned long flags; 210484a6a2e7SMarc Zyngier 21053e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 210684a6a2e7SMarc Zyngier 210784a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 210884a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 210984a6a2e7SMarc Zyngier its_dev = tmp; 211084a6a2e7SMarc Zyngier break; 211184a6a2e7SMarc Zyngier } 211284a6a2e7SMarc Zyngier } 211384a6a2e7SMarc Zyngier 21143e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 211584a6a2e7SMarc Zyngier 211684a6a2e7SMarc Zyngier return its_dev; 211784a6a2e7SMarc Zyngier } 211884a6a2e7SMarc Zyngier 2119466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 2120466b7d16SShanker Donthineni { 2121466b7d16SShanker Donthineni int i; 2122466b7d16SShanker Donthineni 2123466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 2124466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 2125466b7d16SShanker Donthineni return &its->tables[i]; 2126466b7d16SShanker Donthineni } 2127466b7d16SShanker Donthineni 2128466b7d16SShanker Donthineni return NULL; 2129466b7d16SShanker Donthineni } 2130466b7d16SShanker Donthineni 213170cc81edSMarc Zyngier static bool its_alloc_table_entry(struct its_baser *baser, u32 id) 21323faf24eaSShanker Donthineni { 21333faf24eaSShanker Donthineni struct page *page; 21343faf24eaSShanker Donthineni u32 esz, idx; 21353faf24eaSShanker Donthineni __le64 *table; 21363faf24eaSShanker Donthineni 21373faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 21383faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 21393faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 214070cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 21413faf24eaSShanker Donthineni 21423faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 214370cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 21443faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 21453faf24eaSShanker Donthineni return false; 21463faf24eaSShanker Donthineni 21473faf24eaSShanker Donthineni table = baser->base; 21483faf24eaSShanker Donthineni 21493faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 21503faf24eaSShanker Donthineni if (!table[idx]) { 21513faf24eaSShanker Donthineni page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(baser->psz)); 21523faf24eaSShanker Donthineni if (!page) 21533faf24eaSShanker Donthineni return false; 21543faf24eaSShanker Donthineni 21553faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 21563faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2157328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 21583faf24eaSShanker Donthineni 21593faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 21603faf24eaSShanker Donthineni 21613faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 21623faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2163328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 21643faf24eaSShanker Donthineni 21653faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 21663faf24eaSShanker Donthineni dsb(sy); 21673faf24eaSShanker Donthineni } 21683faf24eaSShanker Donthineni 21693faf24eaSShanker Donthineni return true; 21703faf24eaSShanker Donthineni } 21713faf24eaSShanker Donthineni 217270cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 217370cc81edSMarc Zyngier { 217470cc81edSMarc Zyngier struct its_baser *baser; 217570cc81edSMarc Zyngier 217670cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 217770cc81edSMarc Zyngier 217870cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 217970cc81edSMarc Zyngier if (!baser) 218070cc81edSMarc Zyngier return (ilog2(dev_id) < its->device_ids); 218170cc81edSMarc Zyngier 218270cc81edSMarc Zyngier return its_alloc_table_entry(baser, dev_id); 218370cc81edSMarc Zyngier } 218470cc81edSMarc Zyngier 21857d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 21867d75bbb4SMarc Zyngier { 21877d75bbb4SMarc Zyngier struct its_node *its; 21887d75bbb4SMarc Zyngier 21897d75bbb4SMarc Zyngier /* 21907d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 21917d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 21927d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 21937d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 21947d75bbb4SMarc Zyngier * anyway, right?). 21957d75bbb4SMarc Zyngier */ 21967d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 21977d75bbb4SMarc Zyngier struct its_baser *baser; 21987d75bbb4SMarc Zyngier 21997d75bbb4SMarc Zyngier if (!its->is_v4) 22007d75bbb4SMarc Zyngier continue; 22017d75bbb4SMarc Zyngier 22027d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 22037d75bbb4SMarc Zyngier if (!baser) 22047d75bbb4SMarc Zyngier return false; 22057d75bbb4SMarc Zyngier 22067d75bbb4SMarc Zyngier if (!its_alloc_table_entry(baser, vpe_id)) 22077d75bbb4SMarc Zyngier return false; 22087d75bbb4SMarc Zyngier } 22097d75bbb4SMarc Zyngier 22107d75bbb4SMarc Zyngier return true; 22117d75bbb4SMarc Zyngier } 22127d75bbb4SMarc Zyngier 221384a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 221493f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 221584a6a2e7SMarc Zyngier { 221684a6a2e7SMarc Zyngier struct its_device *dev; 221793f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 22183e39e8f5SMarc Zyngier unsigned long flags; 2219591e5becSMarc Zyngier u16 *col_map = NULL; 222084a6a2e7SMarc Zyngier void *itt; 222184a6a2e7SMarc Zyngier int lpi_base; 222284a6a2e7SMarc Zyngier int nr_lpis; 2223c8481267SMarc Zyngier int nr_ites; 222484a6a2e7SMarc Zyngier int sz; 222584a6a2e7SMarc Zyngier 22263faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2227466b7d16SShanker Donthineni return NULL; 2228466b7d16SShanker Donthineni 2229147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 2230147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 2231147c8f37SMarc Zyngier 223284a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2233c8481267SMarc Zyngier /* 2234147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 2235147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 2236c8481267SMarc Zyngier */ 2237147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 2238c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 223984a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 22406c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 224193f94ea0SMarc Zyngier if (alloc_lpis) { 224238dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 2243591e5becSMarc Zyngier if (lpi_map) 22446396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 224593f94ea0SMarc Zyngier GFP_KERNEL); 224693f94ea0SMarc Zyngier } else { 22476396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 224893f94ea0SMarc Zyngier nr_lpis = 0; 224993f94ea0SMarc Zyngier lpi_base = 0; 225093f94ea0SMarc Zyngier } 225184a6a2e7SMarc Zyngier 225293f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 225384a6a2e7SMarc Zyngier kfree(dev); 225484a6a2e7SMarc Zyngier kfree(itt); 225584a6a2e7SMarc Zyngier kfree(lpi_map); 2256591e5becSMarc Zyngier kfree(col_map); 225784a6a2e7SMarc Zyngier return NULL; 225884a6a2e7SMarc Zyngier } 225984a6a2e7SMarc Zyngier 2260328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 22615a9a8915SMarc Zyngier 226284a6a2e7SMarc Zyngier dev->its = its; 226384a6a2e7SMarc Zyngier dev->itt = itt; 2264c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2265591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2266591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2267591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2268591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 2269d011e4e6SMarc Zyngier mutex_init(&dev->event_map.vlpi_lock); 227084a6a2e7SMarc Zyngier dev->device_id = dev_id; 227184a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 227284a6a2e7SMarc Zyngier 22733e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 227484a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 22753e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 227684a6a2e7SMarc Zyngier 227784a6a2e7SMarc Zyngier /* Map device to its ITT */ 227884a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 227984a6a2e7SMarc Zyngier 228084a6a2e7SMarc Zyngier return dev; 228184a6a2e7SMarc Zyngier } 228284a6a2e7SMarc Zyngier 228384a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 228484a6a2e7SMarc Zyngier { 22853e39e8f5SMarc Zyngier unsigned long flags; 22863e39e8f5SMarc Zyngier 22873e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 228884a6a2e7SMarc Zyngier list_del(&its_dev->entry); 22893e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 229084a6a2e7SMarc Zyngier kfree(its_dev->itt); 229184a6a2e7SMarc Zyngier kfree(its_dev); 229284a6a2e7SMarc Zyngier } 2293b48ac83dSMarc Zyngier 2294b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 2295b48ac83dSMarc Zyngier { 2296b48ac83dSMarc Zyngier int idx; 2297b48ac83dSMarc Zyngier 2298591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 2299591e5becSMarc Zyngier dev->event_map.nr_lpis); 2300591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 2301b48ac83dSMarc Zyngier return -ENOSPC; 2302b48ac83dSMarc Zyngier 2303591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 2304591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 2305b48ac83dSMarc Zyngier 2306b48ac83dSMarc Zyngier return 0; 2307b48ac83dSMarc Zyngier } 2308b48ac83dSMarc Zyngier 230954456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 2310b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 2311b48ac83dSMarc Zyngier { 2312b48ac83dSMarc Zyngier struct its_node *its; 2313b48ac83dSMarc Zyngier struct its_device *its_dev; 231454456db9SMarc Zyngier struct msi_domain_info *msi_info; 231554456db9SMarc Zyngier u32 dev_id; 2316b48ac83dSMarc Zyngier 231754456db9SMarc Zyngier /* 231854456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 231954456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 232054456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 232154456db9SMarc Zyngier * are built on top of the ITS. 232254456db9SMarc Zyngier */ 232354456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 232454456db9SMarc Zyngier 232554456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 232654456db9SMarc Zyngier its = msi_info->data; 232754456db9SMarc Zyngier 232820b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 232920b3d54eSMarc Zyngier vpe_proxy.dev && 233020b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 233120b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 233220b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 233320b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 233420b3d54eSMarc Zyngier dev_id); 233520b3d54eSMarc Zyngier return -EINVAL; 233620b3d54eSMarc Zyngier } 233720b3d54eSMarc Zyngier 2338f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 2339e8137f4fSMarc Zyngier if (its_dev) { 2340e8137f4fSMarc Zyngier /* 2341e8137f4fSMarc Zyngier * We already have seen this ID, probably through 2342e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 2343e8137f4fSMarc Zyngier * create the device. 2344e8137f4fSMarc Zyngier */ 2345f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 2346e8137f4fSMarc Zyngier goto out; 2347e8137f4fSMarc Zyngier } 2348b48ac83dSMarc Zyngier 234993f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 2350b48ac83dSMarc Zyngier if (!its_dev) 2351b48ac83dSMarc Zyngier return -ENOMEM; 2352b48ac83dSMarc Zyngier 2353f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 2354e8137f4fSMarc Zyngier out: 2355b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 2356b48ac83dSMarc Zyngier return 0; 2357b48ac83dSMarc Zyngier } 2358b48ac83dSMarc Zyngier 235954456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 236054456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 236154456db9SMarc Zyngier }; 236254456db9SMarc Zyngier 2363b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 2364b48ac83dSMarc Zyngier unsigned int virq, 2365b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 2366b48ac83dSMarc Zyngier { 2367f833f57fSMarc Zyngier struct irq_fwspec fwspec; 2368b48ac83dSMarc Zyngier 2369f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 2370f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 2371f833f57fSMarc Zyngier fwspec.param_count = 3; 2372f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 2373f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 2374f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 23753f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 23763f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 23773f010cf1STomasz Nowicki fwspec.param_count = 2; 23783f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 23793f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 2380f833f57fSMarc Zyngier } else { 2381f833f57fSMarc Zyngier return -EINVAL; 2382f833f57fSMarc Zyngier } 2383b48ac83dSMarc Zyngier 2384f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 2385b48ac83dSMarc Zyngier } 2386b48ac83dSMarc Zyngier 2387b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 2388b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 2389b48ac83dSMarc Zyngier { 2390b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 2391b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 2392b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 2393b48ac83dSMarc Zyngier int err; 2394b48ac83dSMarc Zyngier int i; 2395b48ac83dSMarc Zyngier 2396b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2397b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 2398b48ac83dSMarc Zyngier if (err) 2399b48ac83dSMarc Zyngier return err; 2400b48ac83dSMarc Zyngier 2401b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 2402b48ac83dSMarc Zyngier if (err) 2403b48ac83dSMarc Zyngier return err; 2404b48ac83dSMarc Zyngier 2405b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 2406b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 24070d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 2408f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 2409591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 2410591e5becSMarc Zyngier (int) hwirq, virq + i); 2411b48ac83dSMarc Zyngier } 2412b48ac83dSMarc Zyngier 2413b48ac83dSMarc Zyngier return 0; 2414b48ac83dSMarc Zyngier } 2415b48ac83dSMarc Zyngier 241672491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 2417702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2418aca268dfSMarc Zyngier { 2419aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2420aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2421fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 24220d224d35SMarc Zyngier int cpu; 2423fbf8f40eSGanapatrao Kulkarni 2424fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 2425fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 2426fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 2427aca268dfSMarc Zyngier 2428591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 2429c1797b11SYang Yingliang cpu = cpumask_first_and(cpu_mask, cpu_online_mask); 2430c1797b11SYang Yingliang if (cpu >= nr_cpu_ids) { 2431c1797b11SYang Yingliang if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) 2432c1797b11SYang Yingliang return -EINVAL; 2433c1797b11SYang Yingliang 2434c1797b11SYang Yingliang cpu = cpumask_first(cpu_online_mask); 2435c1797b11SYang Yingliang } 2436c1797b11SYang Yingliang 24370d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 24380d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 2439591e5becSMarc Zyngier 2440aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 24416a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 244272491643SThomas Gleixner return 0; 2443aca268dfSMarc Zyngier } 2444aca268dfSMarc Zyngier 2445aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 2446aca268dfSMarc Zyngier struct irq_data *d) 2447aca268dfSMarc Zyngier { 2448aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2449aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2450aca268dfSMarc Zyngier 2451aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 2452aca268dfSMarc Zyngier its_send_discard(its_dev, event); 2453aca268dfSMarc Zyngier } 2454aca268dfSMarc Zyngier 2455b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 2456b48ac83dSMarc Zyngier unsigned int nr_irqs) 2457b48ac83dSMarc Zyngier { 2458b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 2459b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2460b48ac83dSMarc Zyngier int i; 2461b48ac83dSMarc Zyngier 2462b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2463b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 2464b48ac83dSMarc Zyngier virq + i); 2465aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 2466b48ac83dSMarc Zyngier 2467b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 2468591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 2469b48ac83dSMarc Zyngier 2470b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 24712da39949SMarc Zyngier irq_domain_reset_irq_data(data); 2472b48ac83dSMarc Zyngier } 2473b48ac83dSMarc Zyngier 2474b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 2475591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 2476591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 247738dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 2478cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 2479cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 2480cf2be8baSMarc Zyngier kfree(its_dev->event_map.col_map); 2481b48ac83dSMarc Zyngier 2482b48ac83dSMarc Zyngier /* Unmap device/itt */ 2483b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 2484b48ac83dSMarc Zyngier its_free_device(its_dev); 2485b48ac83dSMarc Zyngier } 2486b48ac83dSMarc Zyngier 2487b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 2488b48ac83dSMarc Zyngier } 2489b48ac83dSMarc Zyngier 2490b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 2491b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 2492b48ac83dSMarc Zyngier .free = its_irq_domain_free, 2493aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 2494aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 2495b48ac83dSMarc Zyngier }; 24964c21f3c2SMarc Zyngier 249720b3d54eSMarc Zyngier /* 249820b3d54eSMarc Zyngier * This is insane. 249920b3d54eSMarc Zyngier * 250020b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 250120b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 250220b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 250320b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 250420b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 250520b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 250620b3d54eSMarc Zyngier * 250720b3d54eSMarc Zyngier * Broken by design(tm). 250820b3d54eSMarc Zyngier */ 250920b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 251020b3d54eSMarc Zyngier { 251120b3d54eSMarc Zyngier /* Already unmapped? */ 251220b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 251320b3d54eSMarc Zyngier return; 251420b3d54eSMarc Zyngier 251520b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 251620b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 251720b3d54eSMarc Zyngier 251820b3d54eSMarc Zyngier /* 251920b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 252020b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 252120b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 252220b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 252320b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 252420b3d54eSMarc Zyngier */ 252520b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 252620b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 252720b3d54eSMarc Zyngier 252820b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 252920b3d54eSMarc Zyngier } 253020b3d54eSMarc Zyngier 253120b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 253220b3d54eSMarc Zyngier { 253320b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 253420b3d54eSMarc Zyngier unsigned long flags; 253520b3d54eSMarc Zyngier 253620b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 253720b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 253820b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 253920b3d54eSMarc Zyngier } 254020b3d54eSMarc Zyngier } 254120b3d54eSMarc Zyngier 254220b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 254320b3d54eSMarc Zyngier { 254420b3d54eSMarc Zyngier /* Already mapped? */ 254520b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 254620b3d54eSMarc Zyngier return; 254720b3d54eSMarc Zyngier 254820b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 254920b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 255020b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 255120b3d54eSMarc Zyngier 255220b3d54eSMarc Zyngier /* Map the new VPE instead */ 255320b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 255420b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 255520b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 255620b3d54eSMarc Zyngier 255720b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 255820b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 255920b3d54eSMarc Zyngier } 256020b3d54eSMarc Zyngier 2561958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 2562958b90d1SMarc Zyngier { 2563958b90d1SMarc Zyngier unsigned long flags; 2564958b90d1SMarc Zyngier struct its_collection *target_col; 2565958b90d1SMarc Zyngier 2566958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2567958b90d1SMarc Zyngier void __iomem *rdbase; 2568958b90d1SMarc Zyngier 2569958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 2570958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2571958b90d1SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2572958b90d1SMarc Zyngier cpu_relax(); 2573958b90d1SMarc Zyngier 2574958b90d1SMarc Zyngier return; 2575958b90d1SMarc Zyngier } 2576958b90d1SMarc Zyngier 2577958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 2578958b90d1SMarc Zyngier 2579958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 2580958b90d1SMarc Zyngier 2581958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 2582958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 2583958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 2584958b90d1SMarc Zyngier 2585958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 2586958b90d1SMarc Zyngier } 2587958b90d1SMarc Zyngier 25883171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 25893171a47aSMarc Zyngier const struct cpumask *mask_val, 25903171a47aSMarc Zyngier bool force) 25913171a47aSMarc Zyngier { 25923171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 25933171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 25943171a47aSMarc Zyngier 25953171a47aSMarc Zyngier /* 25963171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 259720b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 2598958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 2599958b90d1SMarc Zyngier * interrupt to its new location. 26003171a47aSMarc Zyngier */ 26013171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 2602958b90d1SMarc Zyngier int from = vpe->col_idx; 2603958b90d1SMarc Zyngier 26043171a47aSMarc Zyngier vpe->col_idx = cpu; 26053171a47aSMarc Zyngier its_send_vmovp(vpe); 2606958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 26073171a47aSMarc Zyngier } 26083171a47aSMarc Zyngier 260944c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 261044c4c25eSMarc Zyngier 26113171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 26123171a47aSMarc Zyngier } 26133171a47aSMarc Zyngier 2614e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 2615e643d803SMarc Zyngier { 261650c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2617e643d803SMarc Zyngier u64 val; 2618e643d803SMarc Zyngier 2619e643d803SMarc Zyngier /* Schedule the VPE */ 2620e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 2621e643d803SMarc Zyngier GENMASK_ULL(51, 12); 2622e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 2623e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 2624e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 2625e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 2626e643d803SMarc Zyngier 2627e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 2628e643d803SMarc Zyngier GENMASK_ULL(51, 16); 2629e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 2630e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 2631e643d803SMarc Zyngier /* 2632e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 2633e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 2634e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 2635e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 2636e643d803SMarc Zyngier * that the pending table is empty. A good implementation 2637e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 2638e643d803SMarc Zyngier * making this a tolerable issue. 2639e643d803SMarc Zyngier */ 2640e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2641e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 2642e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 2643e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2644e643d803SMarc Zyngier } 2645e643d803SMarc Zyngier 2646e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 2647e643d803SMarc Zyngier { 264850c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2649e643d803SMarc Zyngier u32 count = 1000000; /* 1s! */ 2650e643d803SMarc Zyngier bool clean; 2651e643d803SMarc Zyngier u64 val; 2652e643d803SMarc Zyngier 2653e643d803SMarc Zyngier /* We're being scheduled out */ 2654e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2655e643d803SMarc Zyngier val &= ~GICR_VPENDBASER_Valid; 2656e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2657e643d803SMarc Zyngier 2658e643d803SMarc Zyngier do { 2659e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2660e643d803SMarc Zyngier clean = !(val & GICR_VPENDBASER_Dirty); 2661e643d803SMarc Zyngier if (!clean) { 2662e643d803SMarc Zyngier count--; 2663e643d803SMarc Zyngier cpu_relax(); 2664e643d803SMarc Zyngier udelay(1); 2665e643d803SMarc Zyngier } 2666e643d803SMarc Zyngier } while (!clean && count); 2667e643d803SMarc Zyngier 2668e643d803SMarc Zyngier if (unlikely(!clean && !count)) { 2669e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2670e643d803SMarc Zyngier vpe->idai = false; 2671e643d803SMarc Zyngier vpe->pending_last = true; 2672e643d803SMarc Zyngier } else { 2673e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 2674e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 2675e643d803SMarc Zyngier } 2676e643d803SMarc Zyngier } 2677e643d803SMarc Zyngier 267840619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 267940619a2eSMarc Zyngier { 268040619a2eSMarc Zyngier struct its_node *its; 268140619a2eSMarc Zyngier 268240619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 268340619a2eSMarc Zyngier if (!its->is_v4) 268440619a2eSMarc Zyngier continue; 268540619a2eSMarc Zyngier 26862247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 26872247e1bfSMarc Zyngier continue; 26882247e1bfSMarc Zyngier 26893c1cceebSMarc Zyngier /* 26903c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 26913c1cceebSMarc Zyngier * we need is to reach the redistributors. 26923c1cceebSMarc Zyngier */ 269340619a2eSMarc Zyngier its_send_vinvall(its, vpe); 26943c1cceebSMarc Zyngier return; 269540619a2eSMarc Zyngier } 269640619a2eSMarc Zyngier } 269740619a2eSMarc Zyngier 2698e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 2699e643d803SMarc Zyngier { 2700e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2701e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 2702e643d803SMarc Zyngier 2703e643d803SMarc Zyngier switch (info->cmd_type) { 2704e643d803SMarc Zyngier case SCHEDULE_VPE: 2705e643d803SMarc Zyngier its_vpe_schedule(vpe); 2706e643d803SMarc Zyngier return 0; 2707e643d803SMarc Zyngier 2708e643d803SMarc Zyngier case DESCHEDULE_VPE: 2709e643d803SMarc Zyngier its_vpe_deschedule(vpe); 2710e643d803SMarc Zyngier return 0; 2711e643d803SMarc Zyngier 27125e2f7642SMarc Zyngier case INVALL_VPE: 271340619a2eSMarc Zyngier its_vpe_invall(vpe); 27145e2f7642SMarc Zyngier return 0; 27155e2f7642SMarc Zyngier 2716e643d803SMarc Zyngier default: 2717e643d803SMarc Zyngier return -EINVAL; 2718e643d803SMarc Zyngier } 2719e643d803SMarc Zyngier } 2720e643d803SMarc Zyngier 272120b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 272220b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 272320b3d54eSMarc Zyngier { 272420b3d54eSMarc Zyngier unsigned long flags; 272520b3d54eSMarc Zyngier 272620b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 272720b3d54eSMarc Zyngier 272820b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 272920b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 273020b3d54eSMarc Zyngier 273120b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 273220b3d54eSMarc Zyngier } 273320b3d54eSMarc Zyngier 2734f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 2735f6a91da7SMarc Zyngier { 2736f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 273720b3d54eSMarc Zyngier 273820b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 2739f6a91da7SMarc Zyngier void __iomem *rdbase; 2740f6a91da7SMarc Zyngier 2741f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2742f6a91da7SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_INVLPIR); 2743f6a91da7SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2744f6a91da7SMarc Zyngier cpu_relax(); 274520b3d54eSMarc Zyngier } else { 274620b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 274720b3d54eSMarc Zyngier } 2748f6a91da7SMarc Zyngier } 2749f6a91da7SMarc Zyngier 2750f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 2751f6a91da7SMarc Zyngier { 2752f6a91da7SMarc Zyngier /* 2753f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 2754f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 2755f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 2756f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 2757f6a91da7SMarc Zyngier */ 2758f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 2759f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2760f6a91da7SMarc Zyngier } 2761f6a91da7SMarc Zyngier 2762f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 2763f6a91da7SMarc Zyngier { 2764f6a91da7SMarc Zyngier /* Same hack as above... */ 2765f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 2766f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2767f6a91da7SMarc Zyngier } 2768f6a91da7SMarc Zyngier 2769e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 2770e57a3e28SMarc Zyngier enum irqchip_irq_state which, 2771e57a3e28SMarc Zyngier bool state) 2772e57a3e28SMarc Zyngier { 2773e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2774e57a3e28SMarc Zyngier 2775e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 2776e57a3e28SMarc Zyngier return -EINVAL; 2777e57a3e28SMarc Zyngier 2778e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2779e57a3e28SMarc Zyngier void __iomem *rdbase; 2780e57a3e28SMarc Zyngier 2781e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2782e57a3e28SMarc Zyngier if (state) { 2783e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 2784e57a3e28SMarc Zyngier } else { 2785e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2786e57a3e28SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2787e57a3e28SMarc Zyngier cpu_relax(); 2788e57a3e28SMarc Zyngier } 2789e57a3e28SMarc Zyngier } else { 2790e57a3e28SMarc Zyngier if (state) 2791e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 2792e57a3e28SMarc Zyngier else 2793e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 2794e57a3e28SMarc Zyngier } 2795e57a3e28SMarc Zyngier 2796e57a3e28SMarc Zyngier return 0; 2797e57a3e28SMarc Zyngier } 2798e57a3e28SMarc Zyngier 27998fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 28008fff27aeSMarc Zyngier .name = "GICv4-vpe", 2801f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 2802f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 2803f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 28043171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 2805e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 2806e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 28078fff27aeSMarc Zyngier }; 28088fff27aeSMarc Zyngier 28097d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 28107d75bbb4SMarc Zyngier { 281132bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 28127d75bbb4SMarc Zyngier } 28137d75bbb4SMarc Zyngier 28147d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 28157d75bbb4SMarc Zyngier { 28167d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 28177d75bbb4SMarc Zyngier } 28187d75bbb4SMarc Zyngier 28197d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 28207d75bbb4SMarc Zyngier { 28217d75bbb4SMarc Zyngier struct page *vpt_page; 28227d75bbb4SMarc Zyngier int vpe_id; 28237d75bbb4SMarc Zyngier 28247d75bbb4SMarc Zyngier /* Allocate vpe_id */ 28257d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 28267d75bbb4SMarc Zyngier if (vpe_id < 0) 28277d75bbb4SMarc Zyngier return vpe_id; 28287d75bbb4SMarc Zyngier 28297d75bbb4SMarc Zyngier /* Allocate VPT */ 28307d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 28317d75bbb4SMarc Zyngier if (!vpt_page) { 28327d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 28337d75bbb4SMarc Zyngier return -ENOMEM; 28347d75bbb4SMarc Zyngier } 28357d75bbb4SMarc Zyngier 28367d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 28377d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 28387d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 28397d75bbb4SMarc Zyngier return -ENOMEM; 28407d75bbb4SMarc Zyngier } 28417d75bbb4SMarc Zyngier 28427d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 28437d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 284420b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 28457d75bbb4SMarc Zyngier 28467d75bbb4SMarc Zyngier return 0; 28477d75bbb4SMarc Zyngier } 28487d75bbb4SMarc Zyngier 28497d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 28507d75bbb4SMarc Zyngier { 285120b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 28527d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 28537d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 28547d75bbb4SMarc Zyngier } 28557d75bbb4SMarc Zyngier 28567d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 28577d75bbb4SMarc Zyngier unsigned int virq, 28587d75bbb4SMarc Zyngier unsigned int nr_irqs) 28597d75bbb4SMarc Zyngier { 28607d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 28617d75bbb4SMarc Zyngier int i; 28627d75bbb4SMarc Zyngier 28637d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 28647d75bbb4SMarc Zyngier 28657d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 28667d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 28677d75bbb4SMarc Zyngier virq + i); 28687d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 28697d75bbb4SMarc Zyngier 28707d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 28717d75bbb4SMarc Zyngier 28727d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 28737d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 28747d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 28757d75bbb4SMarc Zyngier } 28767d75bbb4SMarc Zyngier 28777d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 287838dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 28797d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 28807d75bbb4SMarc Zyngier } 28817d75bbb4SMarc Zyngier } 28827d75bbb4SMarc Zyngier 28837d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 28847d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 28857d75bbb4SMarc Zyngier { 28867d75bbb4SMarc Zyngier struct its_vm *vm = args; 28877d75bbb4SMarc Zyngier unsigned long *bitmap; 28887d75bbb4SMarc Zyngier struct page *vprop_page; 28897d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 28907d75bbb4SMarc Zyngier 28917d75bbb4SMarc Zyngier BUG_ON(!vm); 28927d75bbb4SMarc Zyngier 289338dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 28947d75bbb4SMarc Zyngier if (!bitmap) 28957d75bbb4SMarc Zyngier return -ENOMEM; 28967d75bbb4SMarc Zyngier 28977d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 289838dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 28997d75bbb4SMarc Zyngier return -ENOMEM; 29007d75bbb4SMarc Zyngier } 29017d75bbb4SMarc Zyngier 29027d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 29037d75bbb4SMarc Zyngier if (!vprop_page) { 290438dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 29057d75bbb4SMarc Zyngier return -ENOMEM; 29067d75bbb4SMarc Zyngier } 29077d75bbb4SMarc Zyngier 29087d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 29097d75bbb4SMarc Zyngier vm->db_lpi_base = base; 29107d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 29117d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 29127d75bbb4SMarc Zyngier 29137d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 29147d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 29157d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 29167d75bbb4SMarc Zyngier if (err) 29177d75bbb4SMarc Zyngier break; 29187d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 29197d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 29207d75bbb4SMarc Zyngier if (err) 29217d75bbb4SMarc Zyngier break; 29227d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 29237d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 29247d75bbb4SMarc Zyngier set_bit(i, bitmap); 29257d75bbb4SMarc Zyngier } 29267d75bbb4SMarc Zyngier 29277d75bbb4SMarc Zyngier if (err) { 29287d75bbb4SMarc Zyngier if (i > 0) 29297d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 29307d75bbb4SMarc Zyngier 293138dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 29327d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 29337d75bbb4SMarc Zyngier } 29347d75bbb4SMarc Zyngier 29357d75bbb4SMarc Zyngier return err; 29367d75bbb4SMarc Zyngier } 29377d75bbb4SMarc Zyngier 293872491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 2939702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2940eb78192bSMarc Zyngier { 2941eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 294240619a2eSMarc Zyngier struct its_node *its; 2943eb78192bSMarc Zyngier 29442247e1bfSMarc Zyngier /* If we use the list map, we issue VMAPP on demand... */ 29452247e1bfSMarc Zyngier if (its_list_map) 29466ef930f2SMarc Zyngier return 0; 2947eb78192bSMarc Zyngier 2948eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 2949eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 295040619a2eSMarc Zyngier 295140619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 295240619a2eSMarc Zyngier if (!its->is_v4) 295340619a2eSMarc Zyngier continue; 295440619a2eSMarc Zyngier 295575fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 295640619a2eSMarc Zyngier its_send_vinvall(its, vpe); 295740619a2eSMarc Zyngier } 295840619a2eSMarc Zyngier 295944c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 296044c4c25eSMarc Zyngier 296172491643SThomas Gleixner return 0; 2962eb78192bSMarc Zyngier } 2963eb78192bSMarc Zyngier 2964eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 2965eb78192bSMarc Zyngier struct irq_data *d) 2966eb78192bSMarc Zyngier { 2967eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 296875fd951bSMarc Zyngier struct its_node *its; 2969eb78192bSMarc Zyngier 29702247e1bfSMarc Zyngier /* 29712247e1bfSMarc Zyngier * If we use the list map, we unmap the VPE once no VLPIs are 29722247e1bfSMarc Zyngier * associated with the VM. 29732247e1bfSMarc Zyngier */ 29742247e1bfSMarc Zyngier if (its_list_map) 29752247e1bfSMarc Zyngier return; 29762247e1bfSMarc Zyngier 297775fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 297875fd951bSMarc Zyngier if (!its->is_v4) 297975fd951bSMarc Zyngier continue; 298075fd951bSMarc Zyngier 298175fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 298275fd951bSMarc Zyngier } 2983eb78192bSMarc Zyngier } 2984eb78192bSMarc Zyngier 29858fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 29867d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 29877d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 2988eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 2989eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 29908fff27aeSMarc Zyngier }; 29918fff27aeSMarc Zyngier 29924559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 29934559fbb3SYun Wu { 29944559fbb3SYun Wu u32 count = 1000000; /* 1s */ 29954559fbb3SYun Wu u32 val; 29964559fbb3SYun Wu 29974559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 29987611da86SDavid Daney /* 29997611da86SDavid Daney * GIC architecture specification requires the ITS to be both 30007611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 30017611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 30027611da86SDavid Daney */ 30037611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 30044559fbb3SYun Wu return 0; 30054559fbb3SYun Wu 30064559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 3007d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 30084559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 30094559fbb3SYun Wu 30104559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 30114559fbb3SYun Wu while (1) { 30124559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 30134559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 30144559fbb3SYun Wu return 0; 30154559fbb3SYun Wu 30164559fbb3SYun Wu count--; 30174559fbb3SYun Wu if (!count) 30184559fbb3SYun Wu return -EBUSY; 30194559fbb3SYun Wu 30204559fbb3SYun Wu cpu_relax(); 30214559fbb3SYun Wu udelay(1); 30224559fbb3SYun Wu } 30234559fbb3SYun Wu } 30244559fbb3SYun Wu 30259d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 302694100970SRobert Richter { 302794100970SRobert Richter struct its_node *its = data; 302894100970SRobert Richter 3029fa150019SArd Biesheuvel /* erratum 22375: only alloc 8MB table size */ 3030fa150019SArd Biesheuvel its->device_ids = 0x14; /* 20 bits, 8MB */ 303194100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 30329d111d49SArd Biesheuvel 30339d111d49SArd Biesheuvel return true; 303494100970SRobert Richter } 303594100970SRobert Richter 30369d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 3037fbf8f40eSGanapatrao Kulkarni { 3038fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 3039fbf8f40eSGanapatrao Kulkarni 3040fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 30419d111d49SArd Biesheuvel 30429d111d49SArd Biesheuvel return true; 3043fbf8f40eSGanapatrao Kulkarni } 3044fbf8f40eSGanapatrao Kulkarni 30459d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 304690922a2dSShanker Donthineni { 304790922a2dSShanker Donthineni struct its_node *its = data; 304890922a2dSShanker Donthineni 304990922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 305090922a2dSShanker Donthineni its->ite_size = 16; 30519d111d49SArd Biesheuvel 30529d111d49SArd Biesheuvel return true; 305390922a2dSShanker Donthineni } 305490922a2dSShanker Donthineni 3055558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 3056558b0165SArd Biesheuvel { 3057558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 3058558b0165SArd Biesheuvel 3059558b0165SArd Biesheuvel /* 3060558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 3061558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 3062558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 3063558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 3064558b0165SArd Biesheuvel * the window offset. 3065558b0165SArd Biesheuvel */ 3066558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 3067558b0165SArd Biesheuvel } 3068558b0165SArd Biesheuvel 3069558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 3070558b0165SArd Biesheuvel { 3071558b0165SArd Biesheuvel struct its_node *its = data; 3072558b0165SArd Biesheuvel u32 pre_its_window[2]; 3073558b0165SArd Biesheuvel u32 ids; 3074558b0165SArd Biesheuvel 3075558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 3076558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 3077558b0165SArd Biesheuvel pre_its_window, 3078558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 3079558b0165SArd Biesheuvel 3080558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 3081558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 3082558b0165SArd Biesheuvel 3083558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 3084558b0165SArd Biesheuvel if (its->device_ids > ids) 3085558b0165SArd Biesheuvel its->device_ids = ids; 3086558b0165SArd Biesheuvel 3087558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 3088558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 3089558b0165SArd Biesheuvel return true; 3090558b0165SArd Biesheuvel } 3091558b0165SArd Biesheuvel return false; 3092558b0165SArd Biesheuvel } 3093558b0165SArd Biesheuvel 30945c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 30955c9a882eSMarc Zyngier { 30965c9a882eSMarc Zyngier struct its_node *its = data; 30975c9a882eSMarc Zyngier 30985c9a882eSMarc Zyngier /* 30995c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 31005c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 31015c9a882eSMarc Zyngier */ 31025c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 31035c9a882eSMarc Zyngier return true; 3104cc2d3216SMarc Zyngier } 31054c21f3c2SMarc Zyngier 310667510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 310794100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 310894100970SRobert Richter { 310994100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 311094100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 311194100970SRobert Richter .mask = 0xffff0fff, 311294100970SRobert Richter .init = its_enable_quirk_cavium_22375, 311394100970SRobert Richter }, 311494100970SRobert Richter #endif 3115fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 3116fbf8f40eSGanapatrao Kulkarni { 3117fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 3118fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 3119fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 3120fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 3121fbf8f40eSGanapatrao Kulkarni }, 3122fbf8f40eSGanapatrao Kulkarni #endif 312390922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 312490922a2dSShanker Donthineni { 312590922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 312690922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 312790922a2dSShanker Donthineni .mask = 0xffffffff, 312890922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 312990922a2dSShanker Donthineni }, 313090922a2dSShanker Donthineni #endif 3131558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 3132558b0165SArd Biesheuvel { 3133558b0165SArd Biesheuvel /* 3134558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 3135558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 3136558b0165SArd Biesheuvel * special handling in software. 3137558b0165SArd Biesheuvel */ 3138558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 3139558b0165SArd Biesheuvel .iidr = 0x0001143b, 3140558b0165SArd Biesheuvel .mask = 0xffffffff, 3141558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 3142558b0165SArd Biesheuvel }, 3143558b0165SArd Biesheuvel #endif 31445c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 31455c9a882eSMarc Zyngier { 31465c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 31475c9a882eSMarc Zyngier .iidr = 0x00000004, 31485c9a882eSMarc Zyngier .mask = 0xffffffff, 31495c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 31505c9a882eSMarc Zyngier }, 31515c9a882eSMarc Zyngier #endif 315267510ccaSRobert Richter { 315367510ccaSRobert Richter } 315467510ccaSRobert Richter }; 315567510ccaSRobert Richter 315667510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 315767510ccaSRobert Richter { 315867510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 315967510ccaSRobert Richter 316067510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 316167510ccaSRobert Richter } 316267510ccaSRobert Richter 3163dba0bc7bSDerek Basehore static int its_save_disable(void) 3164dba0bc7bSDerek Basehore { 3165dba0bc7bSDerek Basehore struct its_node *its; 3166dba0bc7bSDerek Basehore int err = 0; 3167dba0bc7bSDerek Basehore 3168a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3169dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3170dba0bc7bSDerek Basehore void __iomem *base; 3171dba0bc7bSDerek Basehore 3172dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3173dba0bc7bSDerek Basehore continue; 3174dba0bc7bSDerek Basehore 3175dba0bc7bSDerek Basehore base = its->base; 3176dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 3177dba0bc7bSDerek Basehore err = its_force_quiescent(base); 3178dba0bc7bSDerek Basehore if (err) { 3179dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 3180dba0bc7bSDerek Basehore &its->phys_base, err); 3181dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3182dba0bc7bSDerek Basehore goto err; 3183dba0bc7bSDerek Basehore } 3184dba0bc7bSDerek Basehore 3185dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 3186dba0bc7bSDerek Basehore } 3187dba0bc7bSDerek Basehore 3188dba0bc7bSDerek Basehore err: 3189dba0bc7bSDerek Basehore if (err) { 3190dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 3191dba0bc7bSDerek Basehore void __iomem *base; 3192dba0bc7bSDerek Basehore 3193dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3194dba0bc7bSDerek Basehore continue; 3195dba0bc7bSDerek Basehore 3196dba0bc7bSDerek Basehore base = its->base; 3197dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3198dba0bc7bSDerek Basehore } 3199dba0bc7bSDerek Basehore } 3200a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3201dba0bc7bSDerek Basehore 3202dba0bc7bSDerek Basehore return err; 3203dba0bc7bSDerek Basehore } 3204dba0bc7bSDerek Basehore 3205dba0bc7bSDerek Basehore static void its_restore_enable(void) 3206dba0bc7bSDerek Basehore { 3207dba0bc7bSDerek Basehore struct its_node *its; 3208dba0bc7bSDerek Basehore int ret; 3209dba0bc7bSDerek Basehore 3210a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3211dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3212dba0bc7bSDerek Basehore void __iomem *base; 3213dba0bc7bSDerek Basehore int i; 3214dba0bc7bSDerek Basehore 3215dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3216dba0bc7bSDerek Basehore continue; 3217dba0bc7bSDerek Basehore 3218dba0bc7bSDerek Basehore base = its->base; 3219dba0bc7bSDerek Basehore 3220dba0bc7bSDerek Basehore /* 3221dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 3222dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 3223dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 3224dba0bc7bSDerek Basehore * Specification. 3225dba0bc7bSDerek Basehore */ 3226dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 3227dba0bc7bSDerek Basehore if (ret) { 3228dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 3229dba0bc7bSDerek Basehore &its->phys_base, ret); 3230dba0bc7bSDerek Basehore continue; 3231dba0bc7bSDerek Basehore } 3232dba0bc7bSDerek Basehore 3233dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 3234dba0bc7bSDerek Basehore 3235dba0bc7bSDerek Basehore /* 3236dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 3237dba0bc7bSDerek Basehore * cmd_write line up with it. 3238dba0bc7bSDerek Basehore */ 3239dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 3240dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 3241dba0bc7bSDerek Basehore 3242dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 3243dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3244dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 3245dba0bc7bSDerek Basehore 3246dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 3247dba0bc7bSDerek Basehore continue; 3248dba0bc7bSDerek Basehore 3249dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 3250dba0bc7bSDerek Basehore } 3251dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3252920181ceSDerek Basehore 3253920181ceSDerek Basehore /* 3254920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 3255920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 3256920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 3257920181ceSDerek Basehore */ 3258920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 3259920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 3260920181ceSDerek Basehore its_cpu_init_collection(its); 3261dba0bc7bSDerek Basehore } 3262a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3263dba0bc7bSDerek Basehore } 3264dba0bc7bSDerek Basehore 3265dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 3266dba0bc7bSDerek Basehore .suspend = its_save_disable, 3267dba0bc7bSDerek Basehore .resume = its_restore_enable, 3268dba0bc7bSDerek Basehore }; 3269dba0bc7bSDerek Basehore 3270db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 3271d14ae5e6STomasz Nowicki { 3272d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 3273d14ae5e6STomasz Nowicki struct msi_domain_info *info; 3274d14ae5e6STomasz Nowicki 3275d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 3276d14ae5e6STomasz Nowicki if (!info) 3277d14ae5e6STomasz Nowicki return -ENOMEM; 3278d14ae5e6STomasz Nowicki 3279db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 3280d14ae5e6STomasz Nowicki if (!inner_domain) { 3281d14ae5e6STomasz Nowicki kfree(info); 3282d14ae5e6STomasz Nowicki return -ENOMEM; 3283d14ae5e6STomasz Nowicki } 3284d14ae5e6STomasz Nowicki 3285db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 328696f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 3287558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 3288d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 3289d14ae5e6STomasz Nowicki info->data = its; 3290d14ae5e6STomasz Nowicki inner_domain->host_data = info; 3291d14ae5e6STomasz Nowicki 3292d14ae5e6STomasz Nowicki return 0; 3293d14ae5e6STomasz Nowicki } 3294d14ae5e6STomasz Nowicki 32958fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 32968fff27aeSMarc Zyngier { 329720b3d54eSMarc Zyngier struct its_node *its; 329820b3d54eSMarc Zyngier u32 devid; 329920b3d54eSMarc Zyngier int entries; 330020b3d54eSMarc Zyngier 330120b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 330220b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 330320b3d54eSMarc Zyngier return 0; 330420b3d54eSMarc Zyngier } 330520b3d54eSMarc Zyngier 330620b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 330720b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 330820b3d54eSMarc Zyngier 330920b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 33106396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 331120b3d54eSMarc Zyngier GFP_KERNEL); 331220b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 331320b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 331420b3d54eSMarc Zyngier return -ENOMEM; 331520b3d54eSMarc Zyngier } 331620b3d54eSMarc Zyngier 331720b3d54eSMarc Zyngier /* Use the last possible DevID */ 331820b3d54eSMarc Zyngier devid = GENMASK(its->device_ids - 1, 0); 331920b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 332020b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 332120b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 332220b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 332320b3d54eSMarc Zyngier return -ENOMEM; 332420b3d54eSMarc Zyngier } 332520b3d54eSMarc Zyngier 3326c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 332720b3d54eSMarc Zyngier 332820b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 332920b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 333020b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 333120b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 333220b3d54eSMarc Zyngier 33338fff27aeSMarc Zyngier return 0; 33348fff27aeSMarc Zyngier } 33358fff27aeSMarc Zyngier 33363dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 33373dfa576bSMarc Zyngier void __iomem *its_base) 33383dfa576bSMarc Zyngier { 33393dfa576bSMarc Zyngier int its_number; 33403dfa576bSMarc Zyngier u32 ctlr; 33413dfa576bSMarc Zyngier 33423dfa576bSMarc Zyngier /* 33433dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 33443dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 33453dfa576bSMarc Zyngier * locking. Should this change, we should address 33463dfa576bSMarc Zyngier * this. 33473dfa576bSMarc Zyngier */ 3348ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 3349ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 33503dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 33513dfa576bSMarc Zyngier &res->start); 33523dfa576bSMarc Zyngier return -EINVAL; 33533dfa576bSMarc Zyngier } 33543dfa576bSMarc Zyngier 33553dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 33563dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 33573dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 33583dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 33593dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 33603dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 33613dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 33623dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 33633dfa576bSMarc Zyngier } 33643dfa576bSMarc Zyngier 33653dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 33663dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 33673dfa576bSMarc Zyngier &res->start, its_number); 33683dfa576bSMarc Zyngier return -EINVAL; 33693dfa576bSMarc Zyngier } 33703dfa576bSMarc Zyngier 33713dfa576bSMarc Zyngier return its_number; 33723dfa576bSMarc Zyngier } 33733dfa576bSMarc Zyngier 3374db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 3375db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 33764c21f3c2SMarc Zyngier { 33774c21f3c2SMarc Zyngier struct its_node *its; 33784c21f3c2SMarc Zyngier void __iomem *its_base; 33793dfa576bSMarc Zyngier u32 val, ctlr; 33803dfa576bSMarc Zyngier u64 baser, tmp, typer; 33814c21f3c2SMarc Zyngier int err; 33824c21f3c2SMarc Zyngier 3383db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 33844c21f3c2SMarc Zyngier if (!its_base) { 3385db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 33864c21f3c2SMarc Zyngier return -ENOMEM; 33874c21f3c2SMarc Zyngier } 33884c21f3c2SMarc Zyngier 33894c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 33904c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 3391db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 33924c21f3c2SMarc Zyngier err = -ENODEV; 33934c21f3c2SMarc Zyngier goto out_unmap; 33944c21f3c2SMarc Zyngier } 33954c21f3c2SMarc Zyngier 33964559fbb3SYun Wu err = its_force_quiescent(its_base); 33974559fbb3SYun Wu if (err) { 3398db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 33994559fbb3SYun Wu goto out_unmap; 34004559fbb3SYun Wu } 34014559fbb3SYun Wu 3402db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 34034c21f3c2SMarc Zyngier 34044c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 34054c21f3c2SMarc Zyngier if (!its) { 34064c21f3c2SMarc Zyngier err = -ENOMEM; 34074c21f3c2SMarc Zyngier goto out_unmap; 34084c21f3c2SMarc Zyngier } 34094c21f3c2SMarc Zyngier 34104c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 34114c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 34124c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 34133dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 34144c21f3c2SMarc Zyngier its->base = its_base; 3415db40f0a7STomasz Nowicki its->phys_base = res->start; 34163dfa576bSMarc Zyngier its->ite_size = GITS_TYPER_ITT_ENTRY_SIZE(typer); 3417fa150019SArd Biesheuvel its->device_ids = GITS_TYPER_DEVBITS(typer); 34183dfa576bSMarc Zyngier its->is_v4 = !!(typer & GITS_TYPER_VLPIS); 34193dfa576bSMarc Zyngier if (its->is_v4) { 34203dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 34213dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 34223dfa576bSMarc Zyngier if (err < 0) 34233dfa576bSMarc Zyngier goto out_free_its; 34243dfa576bSMarc Zyngier 3425debf6d02SMarc Zyngier its->list_nr = err; 3426debf6d02SMarc Zyngier 34273dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 34283dfa576bSMarc Zyngier &res->start, err); 34293dfa576bSMarc Zyngier } else { 34303dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 34313dfa576bSMarc Zyngier } 34323dfa576bSMarc Zyngier } 34333dfa576bSMarc Zyngier 3434db40f0a7STomasz Nowicki its->numa_node = numa_node; 34354c21f3c2SMarc Zyngier 34365bc13c2cSRobert Richter its->cmd_base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 34375bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 34384c21f3c2SMarc Zyngier if (!its->cmd_base) { 34394c21f3c2SMarc Zyngier err = -ENOMEM; 34404c21f3c2SMarc Zyngier goto out_free_its; 34414c21f3c2SMarc Zyngier } 34424c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 3443558b0165SArd Biesheuvel its->fwnode_handle = handle; 3444558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 3445558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 34464c21f3c2SMarc Zyngier 344767510ccaSRobert Richter its_enable_quirks(its); 344867510ccaSRobert Richter 34490e0b0f69SShanker Donthineni err = its_alloc_tables(its); 34504c21f3c2SMarc Zyngier if (err) 34514c21f3c2SMarc Zyngier goto out_free_cmd; 34524c21f3c2SMarc Zyngier 34534c21f3c2SMarc Zyngier err = its_alloc_collections(its); 34544c21f3c2SMarc Zyngier if (err) 34554c21f3c2SMarc Zyngier goto out_free_tables; 34564c21f3c2SMarc Zyngier 34574c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 34582fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 34594c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 34604c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 34614c21f3c2SMarc Zyngier GITS_CBASER_VALID); 34624c21f3c2SMarc Zyngier 34630968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 34640968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 34654c21f3c2SMarc Zyngier 34664ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 3467241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 3468241a386cSMarc Zyngier /* 3469241a386cSMarc Zyngier * The HW reports non-shareable, we must 3470241a386cSMarc Zyngier * remove the cacheability attributes as 3471241a386cSMarc Zyngier * well. 3472241a386cSMarc Zyngier */ 3473241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 3474241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 3475241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 34760968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 3477241a386cSMarc Zyngier } 34784c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 34794c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 34804c21f3c2SMarc Zyngier } 34814c21f3c2SMarc Zyngier 34820968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 34833dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 3484d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 3485d51c4b4dSMarc Zyngier if (its->is_v4) 3486d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 3487d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 3488241a386cSMarc Zyngier 3489dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 3490dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 3491dba0bc7bSDerek Basehore 3492db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 3493d14ae5e6STomasz Nowicki if (err) 349454456db9SMarc Zyngier goto out_free_tables; 34954c21f3c2SMarc Zyngier 3496a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 34974c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 3498a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 34994c21f3c2SMarc Zyngier 35004c21f3c2SMarc Zyngier return 0; 35014c21f3c2SMarc Zyngier 35024c21f3c2SMarc Zyngier out_free_tables: 35034c21f3c2SMarc Zyngier its_free_tables(its); 35044c21f3c2SMarc Zyngier out_free_cmd: 35055bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 35064c21f3c2SMarc Zyngier out_free_its: 35074c21f3c2SMarc Zyngier kfree(its); 35084c21f3c2SMarc Zyngier out_unmap: 35094c21f3c2SMarc Zyngier iounmap(its_base); 3510db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 35114c21f3c2SMarc Zyngier return err; 35124c21f3c2SMarc Zyngier } 35134c21f3c2SMarc Zyngier 35144c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 35154c21f3c2SMarc Zyngier { 3516589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 35174c21f3c2SMarc Zyngier } 35184c21f3c2SMarc Zyngier 35196eb486b6SShanker Donthineni static int redist_disable_lpis(void) 35204c21f3c2SMarc Zyngier { 35216eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 35226eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 35236eb486b6SShanker Donthineni u64 val; 35246eb486b6SShanker Donthineni 35254c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 35264c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 35274c21f3c2SMarc Zyngier return -ENXIO; 35284c21f3c2SMarc Zyngier } 35296eb486b6SShanker Donthineni 35306eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 35316eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 35326eb486b6SShanker Donthineni return 0; 35336eb486b6SShanker Donthineni 353411e37d35SMarc Zyngier /* 353511e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 353611e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 353711e37d35SMarc Zyngier * configured and all is well in the world. 353811e37d35SMarc Zyngier */ 353911e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 354011e37d35SMarc Zyngier return 0; 354111e37d35SMarc Zyngier 354211e37d35SMarc Zyngier /* 354311e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 354411e37d35SMarc Zyngier */ 354511e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 35466eb486b6SShanker Donthineni smp_processor_id()); 35476eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 35486eb486b6SShanker Donthineni 35496eb486b6SShanker Donthineni /* Disable LPIs */ 35506eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 35516eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 35526eb486b6SShanker Donthineni 35536eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 35546eb486b6SShanker Donthineni dsb(sy); 35556eb486b6SShanker Donthineni 35566eb486b6SShanker Donthineni /* 35576eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 35586eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 35596eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 35606eb486b6SShanker Donthineni */ 35616eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 35626eb486b6SShanker Donthineni if (!timeout) { 35636eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 35646eb486b6SShanker Donthineni smp_processor_id()); 35656eb486b6SShanker Donthineni return -ETIMEDOUT; 35666eb486b6SShanker Donthineni } 35676eb486b6SShanker Donthineni udelay(1); 35686eb486b6SShanker Donthineni timeout--; 35696eb486b6SShanker Donthineni } 35706eb486b6SShanker Donthineni 35716eb486b6SShanker Donthineni /* 35726eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 35736eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 35746eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 35756eb486b6SShanker Donthineni */ 35766eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 35776eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 35786eb486b6SShanker Donthineni return -EBUSY; 35796eb486b6SShanker Donthineni } 35806eb486b6SShanker Donthineni 35816eb486b6SShanker Donthineni return 0; 35826eb486b6SShanker Donthineni } 35836eb486b6SShanker Donthineni 35846eb486b6SShanker Donthineni int its_cpu_init(void) 35856eb486b6SShanker Donthineni { 35866eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 35876eb486b6SShanker Donthineni int ret; 35886eb486b6SShanker Donthineni 35896eb486b6SShanker Donthineni ret = redist_disable_lpis(); 35906eb486b6SShanker Donthineni if (ret) 35916eb486b6SShanker Donthineni return ret; 35926eb486b6SShanker Donthineni 35934c21f3c2SMarc Zyngier its_cpu_init_lpis(); 3594920181ceSDerek Basehore its_cpu_init_collections(); 35954c21f3c2SMarc Zyngier } 35964c21f3c2SMarc Zyngier 35974c21f3c2SMarc Zyngier return 0; 35984c21f3c2SMarc Zyngier } 35994c21f3c2SMarc Zyngier 3600935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 36014c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 36024c21f3c2SMarc Zyngier {}, 36034c21f3c2SMarc Zyngier }; 36044c21f3c2SMarc Zyngier 3605db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 36064c21f3c2SMarc Zyngier { 36074c21f3c2SMarc Zyngier struct device_node *np; 3608db40f0a7STomasz Nowicki struct resource res; 36094c21f3c2SMarc Zyngier 36104c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 36114c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 361295a25625SStephen Boyd if (!of_device_is_available(np)) 361395a25625SStephen Boyd continue; 3614d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 3615e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 3616e81f54c6SRob Herring np); 3617d14ae5e6STomasz Nowicki continue; 3618d14ae5e6STomasz Nowicki } 3619d14ae5e6STomasz Nowicki 3620db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 3621e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 3622db40f0a7STomasz Nowicki continue; 36234c21f3c2SMarc Zyngier } 36244c21f3c2SMarc Zyngier 3625db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 3626db40f0a7STomasz Nowicki } 3627db40f0a7STomasz Nowicki return 0; 3628db40f0a7STomasz Nowicki } 3629db40f0a7STomasz Nowicki 36303f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 36313f010cf1STomasz Nowicki 36323f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 36333f010cf1STomasz Nowicki 3634d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 3635dbd2b826SGanapatrao Kulkarni struct its_srat_map { 3636dbd2b826SGanapatrao Kulkarni /* numa node id */ 3637dbd2b826SGanapatrao Kulkarni u32 numa_node; 3638dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 3639dbd2b826SGanapatrao Kulkarni u32 its_id; 3640dbd2b826SGanapatrao Kulkarni }; 3641dbd2b826SGanapatrao Kulkarni 3642fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 3643dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 3644dbd2b826SGanapatrao Kulkarni 3645dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 3646dbd2b826SGanapatrao Kulkarni { 3647dbd2b826SGanapatrao Kulkarni int i; 3648dbd2b826SGanapatrao Kulkarni 3649dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 3650dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 3651dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 3652dbd2b826SGanapatrao Kulkarni } 3653dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 3654dbd2b826SGanapatrao Kulkarni } 3655dbd2b826SGanapatrao Kulkarni 3656fdf6e7a8SHanjun Guo static int __init gic_acpi_match_srat_its(struct acpi_subtable_header *header, 3657fdf6e7a8SHanjun Guo const unsigned long end) 3658fdf6e7a8SHanjun Guo { 3659fdf6e7a8SHanjun Guo return 0; 3660fdf6e7a8SHanjun Guo } 3661fdf6e7a8SHanjun Guo 3662dbd2b826SGanapatrao Kulkarni static int __init gic_acpi_parse_srat_its(struct acpi_subtable_header *header, 3663dbd2b826SGanapatrao Kulkarni const unsigned long end) 3664dbd2b826SGanapatrao Kulkarni { 3665dbd2b826SGanapatrao Kulkarni int node; 3666dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 3667dbd2b826SGanapatrao Kulkarni 3668dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 3669dbd2b826SGanapatrao Kulkarni if (!its_affinity) 3670dbd2b826SGanapatrao Kulkarni return -EINVAL; 3671dbd2b826SGanapatrao Kulkarni 3672dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 3673dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 3674dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 3675dbd2b826SGanapatrao Kulkarni return -EINVAL; 3676dbd2b826SGanapatrao Kulkarni } 3677dbd2b826SGanapatrao Kulkarni 3678dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 3679dbd2b826SGanapatrao Kulkarni 3680dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 3681dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 3682dbd2b826SGanapatrao Kulkarni return 0; 3683dbd2b826SGanapatrao Kulkarni } 3684dbd2b826SGanapatrao Kulkarni 3685dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 3686dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 3687dbd2b826SGanapatrao Kulkarni its_in_srat++; 3688dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 3689dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 3690dbd2b826SGanapatrao Kulkarni 3691dbd2b826SGanapatrao Kulkarni return 0; 3692dbd2b826SGanapatrao Kulkarni } 3693dbd2b826SGanapatrao Kulkarni 3694dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 3695dbd2b826SGanapatrao Kulkarni { 3696fdf6e7a8SHanjun Guo int count; 3697fdf6e7a8SHanjun Guo 3698fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 3699fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 3700fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3701fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 3702fdf6e7a8SHanjun Guo if (count <= 0) 3703fdf6e7a8SHanjun Guo return; 3704fdf6e7a8SHanjun Guo 37056da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 3706fdf6e7a8SHanjun Guo GFP_KERNEL); 3707fdf6e7a8SHanjun Guo if (!its_srat_maps) { 3708fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 3709fdf6e7a8SHanjun Guo return; 3710fdf6e7a8SHanjun Guo } 3711fdf6e7a8SHanjun Guo 3712dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 3713dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 3714dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3715dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 3716dbd2b826SGanapatrao Kulkarni } 3717fdf6e7a8SHanjun Guo 3718fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 3719fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 3720fdf6e7a8SHanjun Guo { 3721fdf6e7a8SHanjun Guo kfree(its_srat_maps); 3722fdf6e7a8SHanjun Guo } 3723dbd2b826SGanapatrao Kulkarni #else 3724dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 3725dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 3726fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 3727dbd2b826SGanapatrao Kulkarni #endif 3728dbd2b826SGanapatrao Kulkarni 37293f010cf1STomasz Nowicki static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header, 37303f010cf1STomasz Nowicki const unsigned long end) 37313f010cf1STomasz Nowicki { 37323f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 37333f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 37343f010cf1STomasz Nowicki struct resource res; 37353f010cf1STomasz Nowicki int err; 37363f010cf1STomasz Nowicki 37373f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 37383f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 37393f010cf1STomasz Nowicki res.start = its_entry->base_address; 37403f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 37413f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 37423f010cf1STomasz Nowicki 37433f010cf1STomasz Nowicki dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address); 37443f010cf1STomasz Nowicki if (!dom_handle) { 37453f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 37463f010cf1STomasz Nowicki &res.start); 37473f010cf1STomasz Nowicki return -ENOMEM; 37483f010cf1STomasz Nowicki } 37493f010cf1STomasz Nowicki 37508b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 37518b4282e6SShameer Kolothum dom_handle); 37523f010cf1STomasz Nowicki if (err) { 37533f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 37543f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 37553f010cf1STomasz Nowicki goto dom_err; 37563f010cf1STomasz Nowicki } 37573f010cf1STomasz Nowicki 3758dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 3759dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 37603f010cf1STomasz Nowicki if (!err) 37613f010cf1STomasz Nowicki return 0; 37623f010cf1STomasz Nowicki 37633f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 37643f010cf1STomasz Nowicki dom_err: 37653f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 37663f010cf1STomasz Nowicki return err; 37673f010cf1STomasz Nowicki } 37683f010cf1STomasz Nowicki 37693f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 37703f010cf1STomasz Nowicki { 3771dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 37723f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 37733f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 3774fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 37753f010cf1STomasz Nowicki } 37763f010cf1STomasz Nowicki #else 37773f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 37783f010cf1STomasz Nowicki #endif 37793f010cf1STomasz Nowicki 3780db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 3781db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 3782db40f0a7STomasz Nowicki { 3783db40f0a7STomasz Nowicki struct device_node *of_node; 37848fff27aeSMarc Zyngier struct its_node *its; 37858fff27aeSMarc Zyngier bool has_v4 = false; 37868fff27aeSMarc Zyngier int err; 3787db40f0a7STomasz Nowicki 3788db40f0a7STomasz Nowicki its_parent = parent_domain; 3789db40f0a7STomasz Nowicki of_node = to_of_node(handle); 3790db40f0a7STomasz Nowicki if (of_node) 3791db40f0a7STomasz Nowicki its_of_probe(of_node); 3792db40f0a7STomasz Nowicki else 37933f010cf1STomasz Nowicki its_acpi_probe(); 3794db40f0a7STomasz Nowicki 37954c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 37964c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 37974c21f3c2SMarc Zyngier return -ENXIO; 37984c21f3c2SMarc Zyngier } 37994c21f3c2SMarc Zyngier 38004c21f3c2SMarc Zyngier gic_rdists = rdists; 380111e37d35SMarc Zyngier 380211e37d35SMarc Zyngier err = allocate_lpi_tables(); 38038fff27aeSMarc Zyngier if (err) 38048fff27aeSMarc Zyngier return err; 38058fff27aeSMarc Zyngier 38068fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 38078fff27aeSMarc Zyngier has_v4 |= its->is_v4; 38088fff27aeSMarc Zyngier 38098fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 38103d63cb53SMarc Zyngier if (its_init_vpe_domain() || 38113d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 38128fff27aeSMarc Zyngier rdists->has_vlpis = false; 38138fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 38148fff27aeSMarc Zyngier } 38158fff27aeSMarc Zyngier } 38168fff27aeSMarc Zyngier 3817dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 3818dba0bc7bSDerek Basehore 38198fff27aeSMarc Zyngier return 0; 38204c21f3c2SMarc Zyngier } 3821