1cc2d3216SMarc Zyngier /* 2*d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 183f010cf1STomasz Nowicki #include <linux/acpi.h> 198d3554b8SHanjun Guo #include <linux/acpi_iort.h> 20cc2d3216SMarc Zyngier #include <linux/bitmap.h> 21cc2d3216SMarc Zyngier #include <linux/cpu.h> 22cc2d3216SMarc Zyngier #include <linux/delay.h> 2344bb7e24SRobin Murphy #include <linux/dma-iommu.h> 24cc2d3216SMarc Zyngier #include <linux/interrupt.h> 253f010cf1STomasz Nowicki #include <linux/irqdomain.h> 26cc2d3216SMarc Zyngier #include <linux/log2.h> 27cc2d3216SMarc Zyngier #include <linux/mm.h> 28cc2d3216SMarc Zyngier #include <linux/msi.h> 29cc2d3216SMarc Zyngier #include <linux/of.h> 30cc2d3216SMarc Zyngier #include <linux/of_address.h> 31cc2d3216SMarc Zyngier #include <linux/of_irq.h> 32cc2d3216SMarc Zyngier #include <linux/of_pci.h> 33cc2d3216SMarc Zyngier #include <linux/of_platform.h> 34cc2d3216SMarc Zyngier #include <linux/percpu.h> 35cc2d3216SMarc Zyngier #include <linux/slab.h> 36cc2d3216SMarc Zyngier 3741a83e06SJoel Porquet #include <linux/irqchip.h> 38cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 39cc2d3216SMarc Zyngier 40cc2d3216SMarc Zyngier #include <asm/cputype.h> 41cc2d3216SMarc Zyngier #include <asm/exception.h> 42cc2d3216SMarc Zyngier 4367510ccaSRobert Richter #include "irq-gic-common.h" 4467510ccaSRobert Richter 4594100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4694100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 47fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 48cc2d3216SMarc Zyngier 49c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 50c48ed51cSMarc Zyngier 51a13b0404SMarc Zyngier static u32 lpi_id_bits; 52a13b0404SMarc Zyngier 53a13b0404SMarc Zyngier /* 54a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 55a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 56a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 57a13b0404SMarc Zyngier */ 58a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 59a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 60a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 61a13b0404SMarc Zyngier 62a13b0404SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 63a13b0404SMarc Zyngier 64cc2d3216SMarc Zyngier /* 65cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 66cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 67cc2d3216SMarc Zyngier * CPU. 68cc2d3216SMarc Zyngier */ 69cc2d3216SMarc Zyngier struct its_collection { 70cc2d3216SMarc Zyngier u64 target_address; 71cc2d3216SMarc Zyngier u16 col_id; 72cc2d3216SMarc Zyngier }; 73cc2d3216SMarc Zyngier 74cc2d3216SMarc Zyngier /* 759347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 769347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 77466b7d16SShanker Donthineni */ 78466b7d16SShanker Donthineni struct its_baser { 79466b7d16SShanker Donthineni void *base; 80466b7d16SShanker Donthineni u64 val; 81466b7d16SShanker Donthineni u32 order; 829347359aSShanker Donthineni u32 psz; 83466b7d16SShanker Donthineni }; 84466b7d16SShanker Donthineni 85466b7d16SShanker Donthineni /* 86cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 87841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 88841514abSMarc Zyngier * list of devices writing to it. 89cc2d3216SMarc Zyngier */ 90cc2d3216SMarc Zyngier struct its_node { 91cc2d3216SMarc Zyngier raw_spinlock_t lock; 92cc2d3216SMarc Zyngier struct list_head entry; 93cc2d3216SMarc Zyngier void __iomem *base; 94db40f0a7STomasz Nowicki phys_addr_t phys_base; 95cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 96cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 97466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 98cc2d3216SMarc Zyngier struct its_collection *collections; 99cc2d3216SMarc Zyngier struct list_head its_device_list; 100cc2d3216SMarc Zyngier u64 flags; 101cc2d3216SMarc Zyngier u32 ite_size; 102466b7d16SShanker Donthineni u32 device_ids; 103fbf8f40eSGanapatrao Kulkarni int numa_node; 1043dfa576bSMarc Zyngier bool is_v4; 105cc2d3216SMarc Zyngier }; 106cc2d3216SMarc Zyngier 107cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 108cc2d3216SMarc Zyngier 1092eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1102eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1112eca0d6cSShanker Donthineni 112591e5becSMarc Zyngier struct event_lpi_map { 113591e5becSMarc Zyngier unsigned long *lpi_map; 114591e5becSMarc Zyngier u16 *col_map; 115591e5becSMarc Zyngier irq_hw_number_t lpi_base; 116591e5becSMarc Zyngier int nr_lpis; 117591e5becSMarc Zyngier }; 118591e5becSMarc Zyngier 119cc2d3216SMarc Zyngier /* 120cc2d3216SMarc Zyngier * The ITS view of a device - belongs to an ITS, a collection, owns an 121cc2d3216SMarc Zyngier * interrupt translation table, and a list of interrupts. 122cc2d3216SMarc Zyngier */ 123cc2d3216SMarc Zyngier struct its_device { 124cc2d3216SMarc Zyngier struct list_head entry; 125cc2d3216SMarc Zyngier struct its_node *its; 126591e5becSMarc Zyngier struct event_lpi_map event_map; 127cc2d3216SMarc Zyngier void *itt; 128cc2d3216SMarc Zyngier u32 nr_ites; 129cc2d3216SMarc Zyngier u32 device_id; 130cc2d3216SMarc Zyngier }; 131cc2d3216SMarc Zyngier 1321ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 1331ac19ca6SMarc Zyngier static DEFINE_SPINLOCK(its_lock); 1341ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 135db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1361ac19ca6SMarc Zyngier 1373dfa576bSMarc Zyngier /* 1383dfa576bSMarc Zyngier * We have a maximum number of 16 ITSs in the whole system if we're 1393dfa576bSMarc Zyngier * using the ITSList mechanism 1403dfa576bSMarc Zyngier */ 1413dfa576bSMarc Zyngier #define ITS_LIST_MAX 16 1423dfa576bSMarc Zyngier 1433dfa576bSMarc Zyngier static unsigned long its_list_map; 1443dfa576bSMarc Zyngier 1451ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 1461ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 1471ac19ca6SMarc Zyngier 148591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 149591e5becSMarc Zyngier u32 event) 150591e5becSMarc Zyngier { 151591e5becSMarc Zyngier struct its_node *its = its_dev->its; 152591e5becSMarc Zyngier 153591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 154591e5becSMarc Zyngier } 155591e5becSMarc Zyngier 156cc2d3216SMarc Zyngier /* 157cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 158cc2d3216SMarc Zyngier * block. 159cc2d3216SMarc Zyngier */ 160cc2d3216SMarc Zyngier struct its_cmd_desc { 161cc2d3216SMarc Zyngier union { 162cc2d3216SMarc Zyngier struct { 163cc2d3216SMarc Zyngier struct its_device *dev; 164cc2d3216SMarc Zyngier u32 event_id; 165cc2d3216SMarc Zyngier } its_inv_cmd; 166cc2d3216SMarc Zyngier 167cc2d3216SMarc Zyngier struct { 168cc2d3216SMarc Zyngier struct its_device *dev; 169cc2d3216SMarc Zyngier u32 event_id; 1708d85dcedSMarc Zyngier } its_clear_cmd; 1718d85dcedSMarc Zyngier 1728d85dcedSMarc Zyngier struct { 1738d85dcedSMarc Zyngier struct its_device *dev; 1748d85dcedSMarc Zyngier u32 event_id; 175cc2d3216SMarc Zyngier } its_int_cmd; 176cc2d3216SMarc Zyngier 177cc2d3216SMarc Zyngier struct { 178cc2d3216SMarc Zyngier struct its_device *dev; 179cc2d3216SMarc Zyngier int valid; 180cc2d3216SMarc Zyngier } its_mapd_cmd; 181cc2d3216SMarc Zyngier 182cc2d3216SMarc Zyngier struct { 183cc2d3216SMarc Zyngier struct its_collection *col; 184cc2d3216SMarc Zyngier int valid; 185cc2d3216SMarc Zyngier } its_mapc_cmd; 186cc2d3216SMarc Zyngier 187cc2d3216SMarc Zyngier struct { 188cc2d3216SMarc Zyngier struct its_device *dev; 189cc2d3216SMarc Zyngier u32 phys_id; 190cc2d3216SMarc Zyngier u32 event_id; 1916a25ad3aSMarc Zyngier } its_mapti_cmd; 192cc2d3216SMarc Zyngier 193cc2d3216SMarc Zyngier struct { 194cc2d3216SMarc Zyngier struct its_device *dev; 195cc2d3216SMarc Zyngier struct its_collection *col; 196591e5becSMarc Zyngier u32 event_id; 197cc2d3216SMarc Zyngier } its_movi_cmd; 198cc2d3216SMarc Zyngier 199cc2d3216SMarc Zyngier struct { 200cc2d3216SMarc Zyngier struct its_device *dev; 201cc2d3216SMarc Zyngier u32 event_id; 202cc2d3216SMarc Zyngier } its_discard_cmd; 203cc2d3216SMarc Zyngier 204cc2d3216SMarc Zyngier struct { 205cc2d3216SMarc Zyngier struct its_collection *col; 206cc2d3216SMarc Zyngier } its_invall_cmd; 207cc2d3216SMarc Zyngier }; 208cc2d3216SMarc Zyngier }; 209cc2d3216SMarc Zyngier 210cc2d3216SMarc Zyngier /* 211cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 212cc2d3216SMarc Zyngier */ 213cc2d3216SMarc Zyngier struct its_cmd_block { 214cc2d3216SMarc Zyngier u64 raw_cmd[4]; 215cc2d3216SMarc Zyngier }; 216cc2d3216SMarc Zyngier 217cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 218cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 219cc2d3216SMarc Zyngier 220cc2d3216SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_cmd_block *, 221cc2d3216SMarc Zyngier struct its_cmd_desc *); 222cc2d3216SMarc Zyngier 2234d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 2244d36f136SMarc Zyngier { 2254d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 2264d36f136SMarc Zyngier *raw_cmd &= ~mask; 2274d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 2284d36f136SMarc Zyngier } 2294d36f136SMarc Zyngier 230cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 231cc2d3216SMarc Zyngier { 2324d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 233cc2d3216SMarc Zyngier } 234cc2d3216SMarc Zyngier 235cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 236cc2d3216SMarc Zyngier { 2374d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 238cc2d3216SMarc Zyngier } 239cc2d3216SMarc Zyngier 240cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 241cc2d3216SMarc Zyngier { 2424d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 243cc2d3216SMarc Zyngier } 244cc2d3216SMarc Zyngier 245cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 246cc2d3216SMarc Zyngier { 2474d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 248cc2d3216SMarc Zyngier } 249cc2d3216SMarc Zyngier 250cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 251cc2d3216SMarc Zyngier { 2524d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 253cc2d3216SMarc Zyngier } 254cc2d3216SMarc Zyngier 255cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 256cc2d3216SMarc Zyngier { 2574d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 50, 8); 258cc2d3216SMarc Zyngier } 259cc2d3216SMarc Zyngier 260cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 261cc2d3216SMarc Zyngier { 2624d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 263cc2d3216SMarc Zyngier } 264cc2d3216SMarc Zyngier 265cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 266cc2d3216SMarc Zyngier { 2674d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 50, 16); 268cc2d3216SMarc Zyngier } 269cc2d3216SMarc Zyngier 270cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 271cc2d3216SMarc Zyngier { 2724d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 273cc2d3216SMarc Zyngier } 274cc2d3216SMarc Zyngier 275cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 276cc2d3216SMarc Zyngier { 277cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 278cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 279cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 280cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 281cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 282cc2d3216SMarc Zyngier } 283cc2d3216SMarc Zyngier 284cc2d3216SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_cmd_block *cmd, 285cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 286cc2d3216SMarc Zyngier { 287cc2d3216SMarc Zyngier unsigned long itt_addr; 288c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 289cc2d3216SMarc Zyngier 290cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 291cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 292cc2d3216SMarc Zyngier 293cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 294cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 295cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 296cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 297cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 298cc2d3216SMarc Zyngier 299cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 300cc2d3216SMarc Zyngier 301591e5becSMarc Zyngier return NULL; 302cc2d3216SMarc Zyngier } 303cc2d3216SMarc Zyngier 304cc2d3216SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_cmd_block *cmd, 305cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 306cc2d3216SMarc Zyngier { 307cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 308cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 309cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 310cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 311cc2d3216SMarc Zyngier 312cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 313cc2d3216SMarc Zyngier 314cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 315cc2d3216SMarc Zyngier } 316cc2d3216SMarc Zyngier 3176a25ad3aSMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_cmd_block *cmd, 318cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 319cc2d3216SMarc Zyngier { 320591e5becSMarc Zyngier struct its_collection *col; 321591e5becSMarc Zyngier 3226a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 3236a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 324591e5becSMarc Zyngier 3256a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 3266a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 3276a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 3286a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 329591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 330cc2d3216SMarc Zyngier 331cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 332cc2d3216SMarc Zyngier 333591e5becSMarc Zyngier return col; 334cc2d3216SMarc Zyngier } 335cc2d3216SMarc Zyngier 336cc2d3216SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_cmd_block *cmd, 337cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 338cc2d3216SMarc Zyngier { 339591e5becSMarc Zyngier struct its_collection *col; 340591e5becSMarc Zyngier 341591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 342591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 343591e5becSMarc Zyngier 344cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 345cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 346591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 347cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 348cc2d3216SMarc Zyngier 349cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 350cc2d3216SMarc Zyngier 351591e5becSMarc Zyngier return col; 352cc2d3216SMarc Zyngier } 353cc2d3216SMarc Zyngier 354cc2d3216SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_cmd_block *cmd, 355cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 356cc2d3216SMarc Zyngier { 357591e5becSMarc Zyngier struct its_collection *col; 358591e5becSMarc Zyngier 359591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 360591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 361591e5becSMarc Zyngier 362cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 363cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 364cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 365cc2d3216SMarc Zyngier 366cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 367cc2d3216SMarc Zyngier 368591e5becSMarc Zyngier return col; 369cc2d3216SMarc Zyngier } 370cc2d3216SMarc Zyngier 371cc2d3216SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_cmd_block *cmd, 372cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 373cc2d3216SMarc Zyngier { 374591e5becSMarc Zyngier struct its_collection *col; 375591e5becSMarc Zyngier 376591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 377591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 378591e5becSMarc Zyngier 379cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 380cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 381cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 382cc2d3216SMarc Zyngier 383cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 384cc2d3216SMarc Zyngier 385591e5becSMarc Zyngier return col; 386cc2d3216SMarc Zyngier } 387cc2d3216SMarc Zyngier 3888d85dcedSMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_cmd_block *cmd, 3898d85dcedSMarc Zyngier struct its_cmd_desc *desc) 3908d85dcedSMarc Zyngier { 3918d85dcedSMarc Zyngier struct its_collection *col; 3928d85dcedSMarc Zyngier 3938d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 3948d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 3958d85dcedSMarc Zyngier 3968d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 3978d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 3988d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 3998d85dcedSMarc Zyngier 4008d85dcedSMarc Zyngier its_fixup_cmd(cmd); 4018d85dcedSMarc Zyngier 4028d85dcedSMarc Zyngier return col; 4038d85dcedSMarc Zyngier } 4048d85dcedSMarc Zyngier 4058d85dcedSMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_cmd_block *cmd, 4068d85dcedSMarc Zyngier struct its_cmd_desc *desc) 4078d85dcedSMarc Zyngier { 4088d85dcedSMarc Zyngier struct its_collection *col; 4098d85dcedSMarc Zyngier 4108d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 4118d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 4128d85dcedSMarc Zyngier 4138d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 4148d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 4158d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 4168d85dcedSMarc Zyngier 4178d85dcedSMarc Zyngier its_fixup_cmd(cmd); 4188d85dcedSMarc Zyngier 4198d85dcedSMarc Zyngier return col; 4208d85dcedSMarc Zyngier } 4218d85dcedSMarc Zyngier 422cc2d3216SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd, 423cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 424cc2d3216SMarc Zyngier { 425cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 426cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 427cc2d3216SMarc Zyngier 428cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 429cc2d3216SMarc Zyngier 430cc2d3216SMarc Zyngier return NULL; 431cc2d3216SMarc Zyngier } 432cc2d3216SMarc Zyngier 433cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 434cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 435cc2d3216SMarc Zyngier { 436cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 437cc2d3216SMarc Zyngier } 438cc2d3216SMarc Zyngier 439cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 440cc2d3216SMarc Zyngier { 441cc2d3216SMarc Zyngier int widx; 442cc2d3216SMarc Zyngier int ridx; 443cc2d3216SMarc Zyngier 444cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 445cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 446cc2d3216SMarc Zyngier 447cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 448cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 449cc2d3216SMarc Zyngier return 1; 450cc2d3216SMarc Zyngier 451cc2d3216SMarc Zyngier return 0; 452cc2d3216SMarc Zyngier } 453cc2d3216SMarc Zyngier 454cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 455cc2d3216SMarc Zyngier { 456cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 457cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 458cc2d3216SMarc Zyngier 459cc2d3216SMarc Zyngier while (its_queue_full(its)) { 460cc2d3216SMarc Zyngier count--; 461cc2d3216SMarc Zyngier if (!count) { 462cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 463cc2d3216SMarc Zyngier return NULL; 464cc2d3216SMarc Zyngier } 465cc2d3216SMarc Zyngier cpu_relax(); 466cc2d3216SMarc Zyngier udelay(1); 467cc2d3216SMarc Zyngier } 468cc2d3216SMarc Zyngier 469cc2d3216SMarc Zyngier cmd = its->cmd_write++; 470cc2d3216SMarc Zyngier 471cc2d3216SMarc Zyngier /* Handle queue wrapping */ 472cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 473cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 474cc2d3216SMarc Zyngier 47534d677a9SMarc Zyngier /* Clear command */ 47634d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 47734d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 47834d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 47934d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 48034d677a9SMarc Zyngier 481cc2d3216SMarc Zyngier return cmd; 482cc2d3216SMarc Zyngier } 483cc2d3216SMarc Zyngier 484cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 485cc2d3216SMarc Zyngier { 486cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 487cc2d3216SMarc Zyngier 488cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 489cc2d3216SMarc Zyngier 490cc2d3216SMarc Zyngier return its->cmd_write; 491cc2d3216SMarc Zyngier } 492cc2d3216SMarc Zyngier 493cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 494cc2d3216SMarc Zyngier { 495cc2d3216SMarc Zyngier /* 496cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 497cc2d3216SMarc Zyngier * the ITS. 498cc2d3216SMarc Zyngier */ 499cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 500328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 501cc2d3216SMarc Zyngier else 502cc2d3216SMarc Zyngier dsb(ishst); 503cc2d3216SMarc Zyngier } 504cc2d3216SMarc Zyngier 505cc2d3216SMarc Zyngier static void its_wait_for_range_completion(struct its_node *its, 506cc2d3216SMarc Zyngier struct its_cmd_block *from, 507cc2d3216SMarc Zyngier struct its_cmd_block *to) 508cc2d3216SMarc Zyngier { 509cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 510cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 511cc2d3216SMarc Zyngier 512cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 513cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 514cc2d3216SMarc Zyngier 515cc2d3216SMarc Zyngier while (1) { 516cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 5179bdd8b1cSMarc Zyngier 5189bdd8b1cSMarc Zyngier /* Direct case */ 5199bdd8b1cSMarc Zyngier if (from_idx < to_idx && rd_idx >= to_idx) 5209bdd8b1cSMarc Zyngier break; 5219bdd8b1cSMarc Zyngier 5229bdd8b1cSMarc Zyngier /* Wrapped case */ 5239bdd8b1cSMarc Zyngier if (from_idx >= to_idx && rd_idx >= to_idx && rd_idx < from_idx) 524cc2d3216SMarc Zyngier break; 525cc2d3216SMarc Zyngier 526cc2d3216SMarc Zyngier count--; 527cc2d3216SMarc Zyngier if (!count) { 528cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue timeout\n"); 529cc2d3216SMarc Zyngier return; 530cc2d3216SMarc Zyngier } 531cc2d3216SMarc Zyngier cpu_relax(); 532cc2d3216SMarc Zyngier udelay(1); 533cc2d3216SMarc Zyngier } 534cc2d3216SMarc Zyngier } 535cc2d3216SMarc Zyngier 536e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 537e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 538e4f9094bSMarc Zyngier void name(struct its_node *its, \ 539e4f9094bSMarc Zyngier buildtype builder, \ 540e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 541e4f9094bSMarc Zyngier { \ 542e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 543e4f9094bSMarc Zyngier synctype *sync_obj; \ 544e4f9094bSMarc Zyngier unsigned long flags; \ 545e4f9094bSMarc Zyngier \ 546e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 547e4f9094bSMarc Zyngier \ 548e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 549e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 550e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 551e4f9094bSMarc Zyngier return; \ 552e4f9094bSMarc Zyngier } \ 553e4f9094bSMarc Zyngier sync_obj = builder(cmd, desc); \ 554e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 555e4f9094bSMarc Zyngier \ 556e4f9094bSMarc Zyngier if (sync_obj) { \ 557e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 558e4f9094bSMarc Zyngier if (!sync_cmd) \ 559e4f9094bSMarc Zyngier goto post; \ 560e4f9094bSMarc Zyngier \ 561e4f9094bSMarc Zyngier buildfn(sync_cmd, sync_obj); \ 562e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 563e4f9094bSMarc Zyngier } \ 564e4f9094bSMarc Zyngier \ 565e4f9094bSMarc Zyngier post: \ 566e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 567e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 568e4f9094bSMarc Zyngier \ 569e4f9094bSMarc Zyngier its_wait_for_range_completion(its, cmd, next_cmd); \ 570e4f9094bSMarc Zyngier } 571e4f9094bSMarc Zyngier 572e4f9094bSMarc Zyngier static void its_build_sync_cmd(struct its_cmd_block *sync_cmd, 573e4f9094bSMarc Zyngier struct its_collection *sync_col) 574cc2d3216SMarc Zyngier { 575cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 576cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 577e4f9094bSMarc Zyngier 578cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 579cc2d3216SMarc Zyngier } 580cc2d3216SMarc Zyngier 581e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 582e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 583cc2d3216SMarc Zyngier 5848d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 5858d85dcedSMarc Zyngier { 5868d85dcedSMarc Zyngier struct its_cmd_desc desc; 5878d85dcedSMarc Zyngier 5888d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 5898d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 5908d85dcedSMarc Zyngier 5918d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 5928d85dcedSMarc Zyngier } 5938d85dcedSMarc Zyngier 5948d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 5958d85dcedSMarc Zyngier { 5968d85dcedSMarc Zyngier struct its_cmd_desc desc; 5978d85dcedSMarc Zyngier 5988d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 5998d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 6008d85dcedSMarc Zyngier 6018d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 6028d85dcedSMarc Zyngier } 6038d85dcedSMarc Zyngier 604cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 605cc2d3216SMarc Zyngier { 606cc2d3216SMarc Zyngier struct its_cmd_desc desc; 607cc2d3216SMarc Zyngier 608cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 609cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 610cc2d3216SMarc Zyngier 611cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 612cc2d3216SMarc Zyngier } 613cc2d3216SMarc Zyngier 614cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 615cc2d3216SMarc Zyngier { 616cc2d3216SMarc Zyngier struct its_cmd_desc desc; 617cc2d3216SMarc Zyngier 618cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 619cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 620cc2d3216SMarc Zyngier 621cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 622cc2d3216SMarc Zyngier } 623cc2d3216SMarc Zyngier 624cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 625cc2d3216SMarc Zyngier int valid) 626cc2d3216SMarc Zyngier { 627cc2d3216SMarc Zyngier struct its_cmd_desc desc; 628cc2d3216SMarc Zyngier 629cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 630cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 631cc2d3216SMarc Zyngier 632cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 633cc2d3216SMarc Zyngier } 634cc2d3216SMarc Zyngier 6356a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 636cc2d3216SMarc Zyngier { 637cc2d3216SMarc Zyngier struct its_cmd_desc desc; 638cc2d3216SMarc Zyngier 6396a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 6406a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 6416a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 642cc2d3216SMarc Zyngier 6436a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 644cc2d3216SMarc Zyngier } 645cc2d3216SMarc Zyngier 646cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 647cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 648cc2d3216SMarc Zyngier { 649cc2d3216SMarc Zyngier struct its_cmd_desc desc; 650cc2d3216SMarc Zyngier 651cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 652cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 653591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 654cc2d3216SMarc Zyngier 655cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 656cc2d3216SMarc Zyngier } 657cc2d3216SMarc Zyngier 658cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 659cc2d3216SMarc Zyngier { 660cc2d3216SMarc Zyngier struct its_cmd_desc desc; 661cc2d3216SMarc Zyngier 662cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 663cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 664cc2d3216SMarc Zyngier 665cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 666cc2d3216SMarc Zyngier } 667cc2d3216SMarc Zyngier 668cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 669cc2d3216SMarc Zyngier { 670cc2d3216SMarc Zyngier struct its_cmd_desc desc; 671cc2d3216SMarc Zyngier 672cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 673cc2d3216SMarc Zyngier 674cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 675cc2d3216SMarc Zyngier } 676c48ed51cSMarc Zyngier 677c48ed51cSMarc Zyngier /* 678c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 679c48ed51cSMarc Zyngier */ 680c48ed51cSMarc Zyngier 681c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 682c48ed51cSMarc Zyngier { 683c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 684591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 685c48ed51cSMarc Zyngier } 686c48ed51cSMarc Zyngier 687adcdb94eSMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 688c48ed51cSMarc Zyngier { 689c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 690c48ed51cSMarc Zyngier irq_hw_number_t hwirq = d->hwirq; 691adcdb94eSMarc Zyngier struct page *prop_page; 692adcdb94eSMarc Zyngier u8 *cfg; 693c48ed51cSMarc Zyngier 694adcdb94eSMarc Zyngier prop_page = gic_rdists->prop_page; 695adcdb94eSMarc Zyngier 696adcdb94eSMarc Zyngier cfg = page_address(prop_page) + hwirq - 8192; 697adcdb94eSMarc Zyngier *cfg &= ~clr; 698adcdb94eSMarc Zyngier *cfg |= set; 699c48ed51cSMarc Zyngier 700c48ed51cSMarc Zyngier /* 701c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 702c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 703c48ed51cSMarc Zyngier * Humpf... 704c48ed51cSMarc Zyngier */ 705c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 706328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 707c48ed51cSMarc Zyngier else 708c48ed51cSMarc Zyngier dsb(ishst); 709adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 710c48ed51cSMarc Zyngier } 711c48ed51cSMarc Zyngier 712c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 713c48ed51cSMarc Zyngier { 714adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 715c48ed51cSMarc Zyngier } 716c48ed51cSMarc Zyngier 717c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 718c48ed51cSMarc Zyngier { 719adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 720c48ed51cSMarc Zyngier } 721c48ed51cSMarc Zyngier 722c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 723c48ed51cSMarc Zyngier bool force) 724c48ed51cSMarc Zyngier { 725fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 726fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 727c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 728c48ed51cSMarc Zyngier struct its_collection *target_col; 729c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 730c48ed51cSMarc Zyngier 731fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 732fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 733fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 734fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 735fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 736fbf8f40eSGanapatrao Kulkarni return -EINVAL; 737fbf8f40eSGanapatrao Kulkarni } 738fbf8f40eSGanapatrao Kulkarni } 739fbf8f40eSGanapatrao Kulkarni 740fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 741fbf8f40eSGanapatrao Kulkarni 742c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 743c48ed51cSMarc Zyngier return -EINVAL; 744c48ed51cSMarc Zyngier 7458b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 7468b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 747c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 748c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 749591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 7508b8d94a7SMaJun } 751c48ed51cSMarc Zyngier 752c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 753c48ed51cSMarc Zyngier } 754c48ed51cSMarc Zyngier 755b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 756b48ac83dSMarc Zyngier { 757b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 758b48ac83dSMarc Zyngier struct its_node *its; 759b48ac83dSMarc Zyngier u64 addr; 760b48ac83dSMarc Zyngier 761b48ac83dSMarc Zyngier its = its_dev->its; 762b48ac83dSMarc Zyngier addr = its->phys_base + GITS_TRANSLATER; 763b48ac83dSMarc Zyngier 764b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 765b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 766b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 76744bb7e24SRobin Murphy 76844bb7e24SRobin Murphy iommu_dma_map_msi_msg(d->irq, msg); 769b48ac83dSMarc Zyngier } 770b48ac83dSMarc Zyngier 7718d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 7728d85dcedSMarc Zyngier enum irqchip_irq_state which, 7738d85dcedSMarc Zyngier bool state) 7748d85dcedSMarc Zyngier { 7758d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 7768d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 7778d85dcedSMarc Zyngier 7788d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 7798d85dcedSMarc Zyngier return -EINVAL; 7808d85dcedSMarc Zyngier 7818d85dcedSMarc Zyngier if (state) 7828d85dcedSMarc Zyngier its_send_int(its_dev, event); 7838d85dcedSMarc Zyngier else 7848d85dcedSMarc Zyngier its_send_clear(its_dev, event); 7858d85dcedSMarc Zyngier 7868d85dcedSMarc Zyngier return 0; 7878d85dcedSMarc Zyngier } 7888d85dcedSMarc Zyngier 789c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 790c48ed51cSMarc Zyngier .name = "ITS", 791c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 792c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 793004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 794c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 795b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 7968d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 797b48ac83dSMarc Zyngier }; 798b48ac83dSMarc Zyngier 799bf9529f8SMarc Zyngier /* 800bf9529f8SMarc Zyngier * How we allocate LPIs: 801bf9529f8SMarc Zyngier * 802bf9529f8SMarc Zyngier * The GIC has id_bits bits for interrupt identifiers. From there, we 803bf9529f8SMarc Zyngier * must subtract 8192 which are reserved for SGIs/PPIs/SPIs. Then, as 804bf9529f8SMarc Zyngier * we allocate LPIs by chunks of 32, we can shift the whole thing by 5 805bf9529f8SMarc Zyngier * bits to the right. 806bf9529f8SMarc Zyngier * 807bf9529f8SMarc Zyngier * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations. 808bf9529f8SMarc Zyngier */ 809bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK_SHIFT 5 810bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK (1 << IRQS_PER_CHUNK_SHIFT) 8116c31e123SShanker Donthineni #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 812bf9529f8SMarc Zyngier 813bf9529f8SMarc Zyngier static unsigned long *lpi_bitmap; 814bf9529f8SMarc Zyngier static u32 lpi_chunks; 815bf9529f8SMarc Zyngier static DEFINE_SPINLOCK(lpi_lock); 816bf9529f8SMarc Zyngier 817bf9529f8SMarc Zyngier static int its_lpi_to_chunk(int lpi) 818bf9529f8SMarc Zyngier { 819bf9529f8SMarc Zyngier return (lpi - 8192) >> IRQS_PER_CHUNK_SHIFT; 820bf9529f8SMarc Zyngier } 821bf9529f8SMarc Zyngier 822bf9529f8SMarc Zyngier static int its_chunk_to_lpi(int chunk) 823bf9529f8SMarc Zyngier { 824bf9529f8SMarc Zyngier return (chunk << IRQS_PER_CHUNK_SHIFT) + 8192; 825bf9529f8SMarc Zyngier } 826bf9529f8SMarc Zyngier 82704a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 828bf9529f8SMarc Zyngier { 829bf9529f8SMarc Zyngier lpi_chunks = its_lpi_to_chunk(1UL << id_bits); 830bf9529f8SMarc Zyngier 831bf9529f8SMarc Zyngier lpi_bitmap = kzalloc(BITS_TO_LONGS(lpi_chunks) * sizeof(long), 832bf9529f8SMarc Zyngier GFP_KERNEL); 833bf9529f8SMarc Zyngier if (!lpi_bitmap) { 834bf9529f8SMarc Zyngier lpi_chunks = 0; 835bf9529f8SMarc Zyngier return -ENOMEM; 836bf9529f8SMarc Zyngier } 837bf9529f8SMarc Zyngier 838bf9529f8SMarc Zyngier pr_info("ITS: Allocated %d chunks for LPIs\n", (int)lpi_chunks); 839bf9529f8SMarc Zyngier return 0; 840bf9529f8SMarc Zyngier } 841bf9529f8SMarc Zyngier 842bf9529f8SMarc Zyngier static unsigned long *its_lpi_alloc_chunks(int nr_irqs, int *base, int *nr_ids) 843bf9529f8SMarc Zyngier { 844bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 845bf9529f8SMarc Zyngier int chunk_id; 846bf9529f8SMarc Zyngier int nr_chunks; 847bf9529f8SMarc Zyngier int i; 848bf9529f8SMarc Zyngier 849bf9529f8SMarc Zyngier nr_chunks = DIV_ROUND_UP(nr_irqs, IRQS_PER_CHUNK); 850bf9529f8SMarc Zyngier 851bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 852bf9529f8SMarc Zyngier 853bf9529f8SMarc Zyngier do { 854bf9529f8SMarc Zyngier chunk_id = bitmap_find_next_zero_area(lpi_bitmap, lpi_chunks, 855bf9529f8SMarc Zyngier 0, nr_chunks, 0); 856bf9529f8SMarc Zyngier if (chunk_id < lpi_chunks) 857bf9529f8SMarc Zyngier break; 858bf9529f8SMarc Zyngier 859bf9529f8SMarc Zyngier nr_chunks--; 860bf9529f8SMarc Zyngier } while (nr_chunks > 0); 861bf9529f8SMarc Zyngier 862bf9529f8SMarc Zyngier if (!nr_chunks) 863bf9529f8SMarc Zyngier goto out; 864bf9529f8SMarc Zyngier 865bf9529f8SMarc Zyngier bitmap = kzalloc(BITS_TO_LONGS(nr_chunks * IRQS_PER_CHUNK) * sizeof (long), 866bf9529f8SMarc Zyngier GFP_ATOMIC); 867bf9529f8SMarc Zyngier if (!bitmap) 868bf9529f8SMarc Zyngier goto out; 869bf9529f8SMarc Zyngier 870bf9529f8SMarc Zyngier for (i = 0; i < nr_chunks; i++) 871bf9529f8SMarc Zyngier set_bit(chunk_id + i, lpi_bitmap); 872bf9529f8SMarc Zyngier 873bf9529f8SMarc Zyngier *base = its_chunk_to_lpi(chunk_id); 874bf9529f8SMarc Zyngier *nr_ids = nr_chunks * IRQS_PER_CHUNK; 875bf9529f8SMarc Zyngier 876bf9529f8SMarc Zyngier out: 877bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 878bf9529f8SMarc Zyngier 879c8415b94SMarc Zyngier if (!bitmap) 880c8415b94SMarc Zyngier *base = *nr_ids = 0; 881c8415b94SMarc Zyngier 882bf9529f8SMarc Zyngier return bitmap; 883bf9529f8SMarc Zyngier } 884bf9529f8SMarc Zyngier 885cf2be8baSMarc Zyngier static void its_lpi_free_chunks(unsigned long *bitmap, int base, int nr_ids) 886bf9529f8SMarc Zyngier { 887bf9529f8SMarc Zyngier int lpi; 888bf9529f8SMarc Zyngier 889bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 890bf9529f8SMarc Zyngier 891bf9529f8SMarc Zyngier for (lpi = base; lpi < (base + nr_ids); lpi += IRQS_PER_CHUNK) { 892bf9529f8SMarc Zyngier int chunk = its_lpi_to_chunk(lpi); 893cf2be8baSMarc Zyngier 894bf9529f8SMarc Zyngier BUG_ON(chunk > lpi_chunks); 895bf9529f8SMarc Zyngier if (test_bit(chunk, lpi_bitmap)) { 896bf9529f8SMarc Zyngier clear_bit(chunk, lpi_bitmap); 897bf9529f8SMarc Zyngier } else { 898bf9529f8SMarc Zyngier pr_err("Bad LPI chunk %d\n", chunk); 899bf9529f8SMarc Zyngier } 900bf9529f8SMarc Zyngier } 901bf9529f8SMarc Zyngier 902bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 903bf9529f8SMarc Zyngier 904cf2be8baSMarc Zyngier kfree(bitmap); 905bf9529f8SMarc Zyngier } 9061ac19ca6SMarc Zyngier 9070e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 9080e5ccf91SMarc Zyngier { 9090e5ccf91SMarc Zyngier struct page *prop_page; 9100e5ccf91SMarc Zyngier 9110e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 9120e5ccf91SMarc Zyngier if (!prop_page) 9130e5ccf91SMarc Zyngier return NULL; 9140e5ccf91SMarc Zyngier 9150e5ccf91SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 9160e5ccf91SMarc Zyngier memset(page_address(prop_page), 9170e5ccf91SMarc Zyngier LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, 9180e5ccf91SMarc Zyngier LPI_PROPBASE_SZ); 9190e5ccf91SMarc Zyngier 9200e5ccf91SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 9210e5ccf91SMarc Zyngier gic_flush_dcache_to_poc(page_address(prop_page), LPI_PROPBASE_SZ); 9220e5ccf91SMarc Zyngier 9230e5ccf91SMarc Zyngier return prop_page; 9240e5ccf91SMarc Zyngier } 9250e5ccf91SMarc Zyngier 9260e5ccf91SMarc Zyngier 9271ac19ca6SMarc Zyngier static int __init its_alloc_lpi_tables(void) 9281ac19ca6SMarc Zyngier { 9291ac19ca6SMarc Zyngier phys_addr_t paddr; 9301ac19ca6SMarc Zyngier 9316c31e123SShanker Donthineni lpi_id_bits = min_t(u32, gic_rdists->id_bits, ITS_MAX_LPI_NRBITS); 9320e5ccf91SMarc Zyngier gic_rdists->prop_page = its_allocate_prop_table(GFP_NOWAIT); 9331ac19ca6SMarc Zyngier if (!gic_rdists->prop_page) { 9341ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 9351ac19ca6SMarc Zyngier return -ENOMEM; 9361ac19ca6SMarc Zyngier } 9371ac19ca6SMarc Zyngier 9381ac19ca6SMarc Zyngier paddr = page_to_phys(gic_rdists->prop_page); 9391ac19ca6SMarc Zyngier pr_info("GIC: using LPI property table @%pa\n", &paddr); 9401ac19ca6SMarc Zyngier 9416c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 9421ac19ca6SMarc Zyngier } 9431ac19ca6SMarc Zyngier 9441ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 9451ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 9461ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 9474f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 9481ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 9491ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 9501ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 9511ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 9521ac19ca6SMarc Zyngier }; 9531ac19ca6SMarc Zyngier 9542d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 9552d81d425SShanker Donthineni { 9562d81d425SShanker Donthineni u32 idx = baser - its->tables; 9572d81d425SShanker Donthineni 9580968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 9592d81d425SShanker Donthineni } 9602d81d425SShanker Donthineni 9612d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 9622d81d425SShanker Donthineni u64 val) 9632d81d425SShanker Donthineni { 9642d81d425SShanker Donthineni u32 idx = baser - its->tables; 9652d81d425SShanker Donthineni 9660968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 9672d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 9682d81d425SShanker Donthineni } 9692d81d425SShanker Donthineni 9709347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 9713faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 9723faf24eaSShanker Donthineni bool indirect) 9739347359aSShanker Donthineni { 9749347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 9759347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 9769347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 9779347359aSShanker Donthineni u32 alloc_pages; 9789347359aSShanker Donthineni void *base; 9799347359aSShanker Donthineni u64 tmp; 9809347359aSShanker Donthineni 9819347359aSShanker Donthineni retry_alloc_baser: 9829347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 9839347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 9849347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 9859347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 9869347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 9879347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 9889347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 9899347359aSShanker Donthineni } 9909347359aSShanker Donthineni 9919347359aSShanker Donthineni base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 9929347359aSShanker Donthineni if (!base) 9939347359aSShanker Donthineni return -ENOMEM; 9949347359aSShanker Donthineni 9959347359aSShanker Donthineni retry_baser: 9969347359aSShanker Donthineni val = (virt_to_phys(base) | 9979347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 9989347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 9999347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 10009347359aSShanker Donthineni cache | 10019347359aSShanker Donthineni shr | 10029347359aSShanker Donthineni GITS_BASER_VALID); 10039347359aSShanker Donthineni 10043faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 10053faf24eaSShanker Donthineni 10069347359aSShanker Donthineni switch (psz) { 10079347359aSShanker Donthineni case SZ_4K: 10089347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 10099347359aSShanker Donthineni break; 10109347359aSShanker Donthineni case SZ_16K: 10119347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 10129347359aSShanker Donthineni break; 10139347359aSShanker Donthineni case SZ_64K: 10149347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 10159347359aSShanker Donthineni break; 10169347359aSShanker Donthineni } 10179347359aSShanker Donthineni 10189347359aSShanker Donthineni its_write_baser(its, baser, val); 10199347359aSShanker Donthineni tmp = baser->val; 10209347359aSShanker Donthineni 10219347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 10229347359aSShanker Donthineni /* 10239347359aSShanker Donthineni * Shareability didn't stick. Just use 10249347359aSShanker Donthineni * whatever the read reported, which is likely 10259347359aSShanker Donthineni * to be the only thing this redistributor 10269347359aSShanker Donthineni * supports. If that's zero, make it 10279347359aSShanker Donthineni * non-cacheable as well. 10289347359aSShanker Donthineni */ 10299347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 10309347359aSShanker Donthineni if (!shr) { 10319347359aSShanker Donthineni cache = GITS_BASER_nC; 1032328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 10339347359aSShanker Donthineni } 10349347359aSShanker Donthineni goto retry_baser; 10359347359aSShanker Donthineni } 10369347359aSShanker Donthineni 10379347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 10389347359aSShanker Donthineni /* 10399347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 10409347359aSShanker Donthineni * size and retry. If we reach 4K, then 10419347359aSShanker Donthineni * something is horribly wrong... 10429347359aSShanker Donthineni */ 10439347359aSShanker Donthineni free_pages((unsigned long)base, order); 10449347359aSShanker Donthineni baser->base = NULL; 10459347359aSShanker Donthineni 10469347359aSShanker Donthineni switch (psz) { 10479347359aSShanker Donthineni case SZ_16K: 10489347359aSShanker Donthineni psz = SZ_4K; 10499347359aSShanker Donthineni goto retry_alloc_baser; 10509347359aSShanker Donthineni case SZ_64K: 10519347359aSShanker Donthineni psz = SZ_16K; 10529347359aSShanker Donthineni goto retry_alloc_baser; 10539347359aSShanker Donthineni } 10549347359aSShanker Donthineni } 10559347359aSShanker Donthineni 10569347359aSShanker Donthineni if (val != tmp) { 1057b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 10589347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1059b11283ebSVladimir Murzin val, tmp); 10609347359aSShanker Donthineni free_pages((unsigned long)base, order); 10619347359aSShanker Donthineni return -ENXIO; 10629347359aSShanker Donthineni } 10639347359aSShanker Donthineni 10649347359aSShanker Donthineni baser->order = order; 10659347359aSShanker Donthineni baser->base = base; 10669347359aSShanker Donthineni baser->psz = psz; 10673faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 10689347359aSShanker Donthineni 10693faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1070d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 10719347359aSShanker Donthineni its_base_type_string[type], 10729347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 10733faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 10749347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 10759347359aSShanker Donthineni 10769347359aSShanker Donthineni return 0; 10779347359aSShanker Donthineni } 10789347359aSShanker Donthineni 10794cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 10804cacac57SMarc Zyngier struct its_baser *baser, 10813faf24eaSShanker Donthineni u32 psz, u32 *order) 10824b75c459SShanker Donthineni { 10834cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 10844cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 10854cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 10862fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 10874b75c459SShanker Donthineni u32 ids = its->device_ids; 10884b75c459SShanker Donthineni u32 new_order = *order; 10893faf24eaSShanker Donthineni bool indirect = false; 10903faf24eaSShanker Donthineni 10913faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 10923faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 10933faf24eaSShanker Donthineni /* 10943faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 10953faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 10963faf24eaSShanker Donthineni */ 10973faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 10983faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 10993faf24eaSShanker Donthineni 11003faf24eaSShanker Donthineni if (indirect) { 11013faf24eaSShanker Donthineni /* 11023faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 11033faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 11043faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 11053faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 11063faf24eaSShanker Donthineni * entry size. 11073faf24eaSShanker Donthineni */ 1108d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 11093faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 11103faf24eaSShanker Donthineni } 11113faf24eaSShanker Donthineni } 11124b75c459SShanker Donthineni 11134b75c459SShanker Donthineni /* 11144b75c459SShanker Donthineni * Allocate as many entries as required to fit the 11154b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 11164b75c459SShanker Donthineni * space being incredibly sparse, this results in a 11173faf24eaSShanker Donthineni * massive waste of memory if two-level device table 11183faf24eaSShanker Donthineni * feature is not supported by hardware. 11194b75c459SShanker Donthineni */ 11204b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 11214b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 11224b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1123d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 11244cacac57SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %u->%u\n", 11254cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 11264cacac57SMarc Zyngier its->device_ids, ids); 11274b75c459SShanker Donthineni } 11284b75c459SShanker Donthineni 11294b75c459SShanker Donthineni *order = new_order; 11303faf24eaSShanker Donthineni 11313faf24eaSShanker Donthineni return indirect; 11324b75c459SShanker Donthineni } 11334b75c459SShanker Donthineni 11341ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 11351ac19ca6SMarc Zyngier { 11361ac19ca6SMarc Zyngier int i; 11371ac19ca6SMarc Zyngier 11381ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 11391a485f4dSShanker Donthineni if (its->tables[i].base) { 11401a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 11411a485f4dSShanker Donthineni its->tables[i].order); 11421a485f4dSShanker Donthineni its->tables[i].base = NULL; 11431ac19ca6SMarc Zyngier } 11441ac19ca6SMarc Zyngier } 11451ac19ca6SMarc Zyngier } 11461ac19ca6SMarc Zyngier 11470e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 11481ac19ca6SMarc Zyngier { 1149589ce5f4SMarc Zyngier u64 typer = gic_read_typer(its->base + GITS_TYPER); 11509347359aSShanker Donthineni u32 ids = GITS_TYPER_DEVBITS(typer); 11511ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 11522fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 11539347359aSShanker Donthineni u32 psz = SZ_64K; 11549347359aSShanker Donthineni int err, i; 115594100970SRobert Richter 115694100970SRobert Richter if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) { 115794100970SRobert Richter /* 115894100970SRobert Richter * erratum 22375: only alloc 8MB table size 115994100970SRobert Richter * erratum 24313: ignore memory access type 116094100970SRobert Richter */ 11619347359aSShanker Donthineni cache = GITS_BASER_nCnB; 116294100970SRobert Richter ids = 0x14; /* 20 bits, 8MB */ 116394100970SRobert Richter } 11641ac19ca6SMarc Zyngier 1165466b7d16SShanker Donthineni its->device_ids = ids; 1166466b7d16SShanker Donthineni 11671ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 11682d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 11692d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 11701ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 11719347359aSShanker Donthineni u32 order = get_order(psz); 11723faf24eaSShanker Donthineni bool indirect = false; 11731ac19ca6SMarc Zyngier 11744cacac57SMarc Zyngier switch (type) { 11754cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 11761ac19ca6SMarc Zyngier continue; 11771ac19ca6SMarc Zyngier 11784cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 11794cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 11804cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 11814cacac57SMarc Zyngier psz, &order); 11824cacac57SMarc Zyngier break; 11834cacac57SMarc Zyngier } 1184f54b97edSMarc Zyngier 11853faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 11869347359aSShanker Donthineni if (err < 0) { 11879347359aSShanker Donthineni its_free_tables(its); 11889347359aSShanker Donthineni return err; 118930f21363SRobert Richter } 119030f21363SRobert Richter 11919347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 11929347359aSShanker Donthineni psz = baser->psz; 11939347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 11949347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 11951ac19ca6SMarc Zyngier } 11961ac19ca6SMarc Zyngier 11971ac19ca6SMarc Zyngier return 0; 11981ac19ca6SMarc Zyngier } 11991ac19ca6SMarc Zyngier 12001ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 12011ac19ca6SMarc Zyngier { 12021ac19ca6SMarc Zyngier its->collections = kzalloc(nr_cpu_ids * sizeof(*its->collections), 12031ac19ca6SMarc Zyngier GFP_KERNEL); 12041ac19ca6SMarc Zyngier if (!its->collections) 12051ac19ca6SMarc Zyngier return -ENOMEM; 12061ac19ca6SMarc Zyngier 12071ac19ca6SMarc Zyngier return 0; 12081ac19ca6SMarc Zyngier } 12091ac19ca6SMarc Zyngier 12107c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 12117c297a2dSMarc Zyngier { 12127c297a2dSMarc Zyngier struct page *pend_page; 12137c297a2dSMarc Zyngier /* 12147c297a2dSMarc Zyngier * The pending pages have to be at least 64kB aligned, 12157c297a2dSMarc Zyngier * hence the 'max(LPI_PENDBASE_SZ, SZ_64K)' below. 12167c297a2dSMarc Zyngier */ 12177c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 12187c297a2dSMarc Zyngier get_order(max_t(u32, LPI_PENDBASE_SZ, SZ_64K))); 12197c297a2dSMarc Zyngier if (!pend_page) 12207c297a2dSMarc Zyngier return NULL; 12217c297a2dSMarc Zyngier 12227c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 12237c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 12247c297a2dSMarc Zyngier 12257c297a2dSMarc Zyngier return pend_page; 12267c297a2dSMarc Zyngier } 12277c297a2dSMarc Zyngier 12281ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 12291ac19ca6SMarc Zyngier { 12301ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 12311ac19ca6SMarc Zyngier struct page *pend_page; 12321ac19ca6SMarc Zyngier u64 val, tmp; 12331ac19ca6SMarc Zyngier 12341ac19ca6SMarc Zyngier /* If we didn't allocate the pending table yet, do it now */ 12351ac19ca6SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 12361ac19ca6SMarc Zyngier if (!pend_page) { 12371ac19ca6SMarc Zyngier phys_addr_t paddr; 12387c297a2dSMarc Zyngier 12397c297a2dSMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 12401ac19ca6SMarc Zyngier if (!pend_page) { 12411ac19ca6SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", 12421ac19ca6SMarc Zyngier smp_processor_id()); 12431ac19ca6SMarc Zyngier return; 12441ac19ca6SMarc Zyngier } 12451ac19ca6SMarc Zyngier 12461ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 12471ac19ca6SMarc Zyngier pr_info("CPU%d: using LPI pending table @%pa\n", 12481ac19ca6SMarc Zyngier smp_processor_id(), &paddr); 12491ac19ca6SMarc Zyngier gic_data_rdist()->pend_page = pend_page; 12501ac19ca6SMarc Zyngier } 12511ac19ca6SMarc Zyngier 12521ac19ca6SMarc Zyngier /* Disable LPIs */ 12531ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 12541ac19ca6SMarc Zyngier val &= ~GICR_CTLR_ENABLE_LPIS; 12551ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 12561ac19ca6SMarc Zyngier 12571ac19ca6SMarc Zyngier /* 12581ac19ca6SMarc Zyngier * Make sure any change to the table is observable by the GIC. 12591ac19ca6SMarc Zyngier */ 12601ac19ca6SMarc Zyngier dsb(sy); 12611ac19ca6SMarc Zyngier 12621ac19ca6SMarc Zyngier /* set PROPBASE */ 12631ac19ca6SMarc Zyngier val = (page_to_phys(gic_rdists->prop_page) | 12641ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 12652fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 12661ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 12671ac19ca6SMarc Zyngier 12680968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 12690968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 12701ac19ca6SMarc Zyngier 12711ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 1272241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 1273241a386cSMarc Zyngier /* 1274241a386cSMarc Zyngier * The HW reports non-shareable, we must 1275241a386cSMarc Zyngier * remove the cacheability attributes as 1276241a386cSMarc Zyngier * well. 1277241a386cSMarc Zyngier */ 1278241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 1279241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 1280241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 12810968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 1282241a386cSMarc Zyngier } 12831ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 12841ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 12851ac19ca6SMarc Zyngier } 12861ac19ca6SMarc Zyngier 12871ac19ca6SMarc Zyngier /* set PENDBASE */ 12881ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 12894ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 12902fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 12911ac19ca6SMarc Zyngier 12920968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 12930968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 1294241a386cSMarc Zyngier 1295241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 1296241a386cSMarc Zyngier /* 1297241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 1298241a386cSMarc Zyngier * cacheability attributes as well. 1299241a386cSMarc Zyngier */ 1300241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 1301241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 1302241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 13030968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 1304241a386cSMarc Zyngier } 13051ac19ca6SMarc Zyngier 13061ac19ca6SMarc Zyngier /* Enable LPIs */ 13071ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 13081ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 13091ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 13101ac19ca6SMarc Zyngier 13111ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 13121ac19ca6SMarc Zyngier dsb(sy); 13131ac19ca6SMarc Zyngier } 13141ac19ca6SMarc Zyngier 13151ac19ca6SMarc Zyngier static void its_cpu_init_collection(void) 13161ac19ca6SMarc Zyngier { 13171ac19ca6SMarc Zyngier struct its_node *its; 13181ac19ca6SMarc Zyngier int cpu; 13191ac19ca6SMarc Zyngier 13201ac19ca6SMarc Zyngier spin_lock(&its_lock); 13211ac19ca6SMarc Zyngier cpu = smp_processor_id(); 13221ac19ca6SMarc Zyngier 13231ac19ca6SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 13241ac19ca6SMarc Zyngier u64 target; 13251ac19ca6SMarc Zyngier 1326fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 1327fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1328fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 1329fbf8f40eSGanapatrao Kulkarni 1330fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 1331fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 1332fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 1333fbf8f40eSGanapatrao Kulkarni continue; 1334fbf8f40eSGanapatrao Kulkarni } 1335fbf8f40eSGanapatrao Kulkarni 13361ac19ca6SMarc Zyngier /* 13371ac19ca6SMarc Zyngier * We now have to bind each collection to its target 13381ac19ca6SMarc Zyngier * redistributor. 13391ac19ca6SMarc Zyngier */ 1340589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 13411ac19ca6SMarc Zyngier /* 13421ac19ca6SMarc Zyngier * This ITS wants the physical address of the 13431ac19ca6SMarc Zyngier * redistributor. 13441ac19ca6SMarc Zyngier */ 13451ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 13461ac19ca6SMarc Zyngier } else { 13471ac19ca6SMarc Zyngier /* 13481ac19ca6SMarc Zyngier * This ITS wants a linear CPU number. 13491ac19ca6SMarc Zyngier */ 1350589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 1351263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 13521ac19ca6SMarc Zyngier } 13531ac19ca6SMarc Zyngier 13541ac19ca6SMarc Zyngier /* Perform collection mapping */ 13551ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 13561ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 13571ac19ca6SMarc Zyngier 13581ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 13591ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 13601ac19ca6SMarc Zyngier } 13611ac19ca6SMarc Zyngier 13621ac19ca6SMarc Zyngier spin_unlock(&its_lock); 13631ac19ca6SMarc Zyngier } 136484a6a2e7SMarc Zyngier 136584a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 136684a6a2e7SMarc Zyngier { 136784a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 13683e39e8f5SMarc Zyngier unsigned long flags; 136984a6a2e7SMarc Zyngier 13703e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 137184a6a2e7SMarc Zyngier 137284a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 137384a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 137484a6a2e7SMarc Zyngier its_dev = tmp; 137584a6a2e7SMarc Zyngier break; 137684a6a2e7SMarc Zyngier } 137784a6a2e7SMarc Zyngier } 137884a6a2e7SMarc Zyngier 13793e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 138084a6a2e7SMarc Zyngier 138184a6a2e7SMarc Zyngier return its_dev; 138284a6a2e7SMarc Zyngier } 138384a6a2e7SMarc Zyngier 1384466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 1385466b7d16SShanker Donthineni { 1386466b7d16SShanker Donthineni int i; 1387466b7d16SShanker Donthineni 1388466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 1389466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 1390466b7d16SShanker Donthineni return &its->tables[i]; 1391466b7d16SShanker Donthineni } 1392466b7d16SShanker Donthineni 1393466b7d16SShanker Donthineni return NULL; 1394466b7d16SShanker Donthineni } 1395466b7d16SShanker Donthineni 139670cc81edSMarc Zyngier static bool its_alloc_table_entry(struct its_baser *baser, u32 id) 13973faf24eaSShanker Donthineni { 13983faf24eaSShanker Donthineni struct page *page; 13993faf24eaSShanker Donthineni u32 esz, idx; 14003faf24eaSShanker Donthineni __le64 *table; 14013faf24eaSShanker Donthineni 14023faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 14033faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 14043faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 140570cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 14063faf24eaSShanker Donthineni 14073faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 140870cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 14093faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 14103faf24eaSShanker Donthineni return false; 14113faf24eaSShanker Donthineni 14123faf24eaSShanker Donthineni table = baser->base; 14133faf24eaSShanker Donthineni 14143faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 14153faf24eaSShanker Donthineni if (!table[idx]) { 14163faf24eaSShanker Donthineni page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(baser->psz)); 14173faf24eaSShanker Donthineni if (!page) 14183faf24eaSShanker Donthineni return false; 14193faf24eaSShanker Donthineni 14203faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 14213faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 1422328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 14233faf24eaSShanker Donthineni 14243faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 14253faf24eaSShanker Donthineni 14263faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 14273faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 1428328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 14293faf24eaSShanker Donthineni 14303faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 14313faf24eaSShanker Donthineni dsb(sy); 14323faf24eaSShanker Donthineni } 14333faf24eaSShanker Donthineni 14343faf24eaSShanker Donthineni return true; 14353faf24eaSShanker Donthineni } 14363faf24eaSShanker Donthineni 143770cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 143870cc81edSMarc Zyngier { 143970cc81edSMarc Zyngier struct its_baser *baser; 144070cc81edSMarc Zyngier 144170cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 144270cc81edSMarc Zyngier 144370cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 144470cc81edSMarc Zyngier if (!baser) 144570cc81edSMarc Zyngier return (ilog2(dev_id) < its->device_ids); 144670cc81edSMarc Zyngier 144770cc81edSMarc Zyngier return its_alloc_table_entry(baser, dev_id); 144870cc81edSMarc Zyngier } 144970cc81edSMarc Zyngier 145084a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 145184a6a2e7SMarc Zyngier int nvecs) 145284a6a2e7SMarc Zyngier { 145384a6a2e7SMarc Zyngier struct its_device *dev; 145484a6a2e7SMarc Zyngier unsigned long *lpi_map; 14553e39e8f5SMarc Zyngier unsigned long flags; 1456591e5becSMarc Zyngier u16 *col_map = NULL; 145784a6a2e7SMarc Zyngier void *itt; 145884a6a2e7SMarc Zyngier int lpi_base; 145984a6a2e7SMarc Zyngier int nr_lpis; 1460c8481267SMarc Zyngier int nr_ites; 146184a6a2e7SMarc Zyngier int sz; 146284a6a2e7SMarc Zyngier 14633faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 1464466b7d16SShanker Donthineni return NULL; 1465466b7d16SShanker Donthineni 146684a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1467c8481267SMarc Zyngier /* 1468c8481267SMarc Zyngier * At least one bit of EventID is being used, hence a minimum 1469c8481267SMarc Zyngier * of two entries. No, the architecture doesn't let you 1470c8481267SMarc Zyngier * express an ITT with a single entry. 1471c8481267SMarc Zyngier */ 147296555c47SWill Deacon nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 1473c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 147484a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 14756c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 147684a6a2e7SMarc Zyngier lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 1477591e5becSMarc Zyngier if (lpi_map) 1478591e5becSMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_lpis, GFP_KERNEL); 147984a6a2e7SMarc Zyngier 1480591e5becSMarc Zyngier if (!dev || !itt || !lpi_map || !col_map) { 148184a6a2e7SMarc Zyngier kfree(dev); 148284a6a2e7SMarc Zyngier kfree(itt); 148384a6a2e7SMarc Zyngier kfree(lpi_map); 1484591e5becSMarc Zyngier kfree(col_map); 148584a6a2e7SMarc Zyngier return NULL; 148684a6a2e7SMarc Zyngier } 148784a6a2e7SMarc Zyngier 1488328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 14895a9a8915SMarc Zyngier 149084a6a2e7SMarc Zyngier dev->its = its; 149184a6a2e7SMarc Zyngier dev->itt = itt; 1492c8481267SMarc Zyngier dev->nr_ites = nr_ites; 1493591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 1494591e5becSMarc Zyngier dev->event_map.col_map = col_map; 1495591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 1496591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 149784a6a2e7SMarc Zyngier dev->device_id = dev_id; 149884a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 149984a6a2e7SMarc Zyngier 15003e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 150184a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 15023e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 150384a6a2e7SMarc Zyngier 150484a6a2e7SMarc Zyngier /* Map device to its ITT */ 150584a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 150684a6a2e7SMarc Zyngier 150784a6a2e7SMarc Zyngier return dev; 150884a6a2e7SMarc Zyngier } 150984a6a2e7SMarc Zyngier 151084a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 151184a6a2e7SMarc Zyngier { 15123e39e8f5SMarc Zyngier unsigned long flags; 15133e39e8f5SMarc Zyngier 15143e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 151584a6a2e7SMarc Zyngier list_del(&its_dev->entry); 15163e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 151784a6a2e7SMarc Zyngier kfree(its_dev->itt); 151884a6a2e7SMarc Zyngier kfree(its_dev); 151984a6a2e7SMarc Zyngier } 1520b48ac83dSMarc Zyngier 1521b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 1522b48ac83dSMarc Zyngier { 1523b48ac83dSMarc Zyngier int idx; 1524b48ac83dSMarc Zyngier 1525591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 1526591e5becSMarc Zyngier dev->event_map.nr_lpis); 1527591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 1528b48ac83dSMarc Zyngier return -ENOSPC; 1529b48ac83dSMarc Zyngier 1530591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 1531591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 1532b48ac83dSMarc Zyngier 1533b48ac83dSMarc Zyngier return 0; 1534b48ac83dSMarc Zyngier } 1535b48ac83dSMarc Zyngier 153654456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 1537b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 1538b48ac83dSMarc Zyngier { 1539b48ac83dSMarc Zyngier struct its_node *its; 1540b48ac83dSMarc Zyngier struct its_device *its_dev; 154154456db9SMarc Zyngier struct msi_domain_info *msi_info; 154254456db9SMarc Zyngier u32 dev_id; 1543b48ac83dSMarc Zyngier 154454456db9SMarc Zyngier /* 154554456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 154654456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 154754456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 154854456db9SMarc Zyngier * are built on top of the ITS. 154954456db9SMarc Zyngier */ 155054456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 155154456db9SMarc Zyngier 155254456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 155354456db9SMarc Zyngier its = msi_info->data; 155454456db9SMarc Zyngier 1555f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 1556e8137f4fSMarc Zyngier if (its_dev) { 1557e8137f4fSMarc Zyngier /* 1558e8137f4fSMarc Zyngier * We already have seen this ID, probably through 1559e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 1560e8137f4fSMarc Zyngier * create the device. 1561e8137f4fSMarc Zyngier */ 1562f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 1563e8137f4fSMarc Zyngier goto out; 1564e8137f4fSMarc Zyngier } 1565b48ac83dSMarc Zyngier 1566f130420eSMarc Zyngier its_dev = its_create_device(its, dev_id, nvec); 1567b48ac83dSMarc Zyngier if (!its_dev) 1568b48ac83dSMarc Zyngier return -ENOMEM; 1569b48ac83dSMarc Zyngier 1570f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 1571e8137f4fSMarc Zyngier out: 1572b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 1573b48ac83dSMarc Zyngier return 0; 1574b48ac83dSMarc Zyngier } 1575b48ac83dSMarc Zyngier 157654456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 157754456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 157854456db9SMarc Zyngier }; 157954456db9SMarc Zyngier 1580b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 1581b48ac83dSMarc Zyngier unsigned int virq, 1582b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 1583b48ac83dSMarc Zyngier { 1584f833f57fSMarc Zyngier struct irq_fwspec fwspec; 1585b48ac83dSMarc Zyngier 1586f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 1587f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 1588f833f57fSMarc Zyngier fwspec.param_count = 3; 1589f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 1590f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 1591f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 15923f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 15933f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 15943f010cf1STomasz Nowicki fwspec.param_count = 2; 15953f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 15963f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 1597f833f57fSMarc Zyngier } else { 1598f833f57fSMarc Zyngier return -EINVAL; 1599f833f57fSMarc Zyngier } 1600b48ac83dSMarc Zyngier 1601f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 1602b48ac83dSMarc Zyngier } 1603b48ac83dSMarc Zyngier 1604b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 1605b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 1606b48ac83dSMarc Zyngier { 1607b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 1608b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 1609b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 1610b48ac83dSMarc Zyngier int err; 1611b48ac83dSMarc Zyngier int i; 1612b48ac83dSMarc Zyngier 1613b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1614b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 1615b48ac83dSMarc Zyngier if (err) 1616b48ac83dSMarc Zyngier return err; 1617b48ac83dSMarc Zyngier 1618b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 1619b48ac83dSMarc Zyngier if (err) 1620b48ac83dSMarc Zyngier return err; 1621b48ac83dSMarc Zyngier 1622b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 1623b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 1624f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 1625591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 1626591e5becSMarc Zyngier (int) hwirq, virq + i); 1627b48ac83dSMarc Zyngier } 1628b48ac83dSMarc Zyngier 1629b48ac83dSMarc Zyngier return 0; 1630b48ac83dSMarc Zyngier } 1631b48ac83dSMarc Zyngier 1632aca268dfSMarc Zyngier static void its_irq_domain_activate(struct irq_domain *domain, 1633aca268dfSMarc Zyngier struct irq_data *d) 1634aca268dfSMarc Zyngier { 1635aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1636aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 1637fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1638fbf8f40eSGanapatrao Kulkarni 1639fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 1640fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 1641fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1642aca268dfSMarc Zyngier 1643591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 1644fbf8f40eSGanapatrao Kulkarni its_dev->event_map.col_map[event] = cpumask_first(cpu_mask); 1645591e5becSMarc Zyngier 1646aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 16476a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1648aca268dfSMarc Zyngier } 1649aca268dfSMarc Zyngier 1650aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 1651aca268dfSMarc Zyngier struct irq_data *d) 1652aca268dfSMarc Zyngier { 1653aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1654aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 1655aca268dfSMarc Zyngier 1656aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 1657aca268dfSMarc Zyngier its_send_discard(its_dev, event); 1658aca268dfSMarc Zyngier } 1659aca268dfSMarc Zyngier 1660b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 1661b48ac83dSMarc Zyngier unsigned int nr_irqs) 1662b48ac83dSMarc Zyngier { 1663b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 1664b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1665b48ac83dSMarc Zyngier int i; 1666b48ac83dSMarc Zyngier 1667b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1668b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 1669b48ac83dSMarc Zyngier virq + i); 1670aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 1671b48ac83dSMarc Zyngier 1672b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 1673591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 1674b48ac83dSMarc Zyngier 1675b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 16762da39949SMarc Zyngier irq_domain_reset_irq_data(data); 1677b48ac83dSMarc Zyngier } 1678b48ac83dSMarc Zyngier 1679b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 1680591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 1681591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 1682cf2be8baSMarc Zyngier its_lpi_free_chunks(its_dev->event_map.lpi_map, 1683cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 1684cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 1685cf2be8baSMarc Zyngier kfree(its_dev->event_map.col_map); 1686b48ac83dSMarc Zyngier 1687b48ac83dSMarc Zyngier /* Unmap device/itt */ 1688b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 1689b48ac83dSMarc Zyngier its_free_device(its_dev); 1690b48ac83dSMarc Zyngier } 1691b48ac83dSMarc Zyngier 1692b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 1693b48ac83dSMarc Zyngier } 1694b48ac83dSMarc Zyngier 1695b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 1696b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 1697b48ac83dSMarc Zyngier .free = its_irq_domain_free, 1698aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 1699aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 1700b48ac83dSMarc Zyngier }; 17014c21f3c2SMarc Zyngier 17024559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 17034559fbb3SYun Wu { 17044559fbb3SYun Wu u32 count = 1000000; /* 1s */ 17054559fbb3SYun Wu u32 val; 17064559fbb3SYun Wu 17074559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 17087611da86SDavid Daney /* 17097611da86SDavid Daney * GIC architecture specification requires the ITS to be both 17107611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 17117611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 17127611da86SDavid Daney */ 17137611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 17144559fbb3SYun Wu return 0; 17154559fbb3SYun Wu 17164559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 17174559fbb3SYun Wu val &= ~GITS_CTLR_ENABLE; 17184559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 17194559fbb3SYun Wu 17204559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 17214559fbb3SYun Wu while (1) { 17224559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 17234559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 17244559fbb3SYun Wu return 0; 17254559fbb3SYun Wu 17264559fbb3SYun Wu count--; 17274559fbb3SYun Wu if (!count) 17284559fbb3SYun Wu return -EBUSY; 17294559fbb3SYun Wu 17304559fbb3SYun Wu cpu_relax(); 17314559fbb3SYun Wu udelay(1); 17324559fbb3SYun Wu } 17334559fbb3SYun Wu } 17344559fbb3SYun Wu 173594100970SRobert Richter static void __maybe_unused its_enable_quirk_cavium_22375(void *data) 173694100970SRobert Richter { 173794100970SRobert Richter struct its_node *its = data; 173894100970SRobert Richter 173994100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 174094100970SRobert Richter } 174194100970SRobert Richter 1742fbf8f40eSGanapatrao Kulkarni static void __maybe_unused its_enable_quirk_cavium_23144(void *data) 1743fbf8f40eSGanapatrao Kulkarni { 1744fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 1745fbf8f40eSGanapatrao Kulkarni 1746fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 1747fbf8f40eSGanapatrao Kulkarni } 1748fbf8f40eSGanapatrao Kulkarni 174990922a2dSShanker Donthineni static void __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 175090922a2dSShanker Donthineni { 175190922a2dSShanker Donthineni struct its_node *its = data; 175290922a2dSShanker Donthineni 175390922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 175490922a2dSShanker Donthineni its->ite_size = 16; 175590922a2dSShanker Donthineni } 175690922a2dSShanker Donthineni 175767510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 175894100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 175994100970SRobert Richter { 176094100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 176194100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 176294100970SRobert Richter .mask = 0xffff0fff, 176394100970SRobert Richter .init = its_enable_quirk_cavium_22375, 176494100970SRobert Richter }, 176594100970SRobert Richter #endif 1766fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 1767fbf8f40eSGanapatrao Kulkarni { 1768fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 1769fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 1770fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 1771fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 1772fbf8f40eSGanapatrao Kulkarni }, 1773fbf8f40eSGanapatrao Kulkarni #endif 177490922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 177590922a2dSShanker Donthineni { 177690922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 177790922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 177890922a2dSShanker Donthineni .mask = 0xffffffff, 177990922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 178090922a2dSShanker Donthineni }, 178190922a2dSShanker Donthineni #endif 178267510ccaSRobert Richter { 178367510ccaSRobert Richter } 178467510ccaSRobert Richter }; 178567510ccaSRobert Richter 178667510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 178767510ccaSRobert Richter { 178867510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 178967510ccaSRobert Richter 179067510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 179167510ccaSRobert Richter } 179267510ccaSRobert Richter 1793db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 1794d14ae5e6STomasz Nowicki { 1795d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 1796d14ae5e6STomasz Nowicki struct msi_domain_info *info; 1797d14ae5e6STomasz Nowicki 1798d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 1799d14ae5e6STomasz Nowicki if (!info) 1800d14ae5e6STomasz Nowicki return -ENOMEM; 1801d14ae5e6STomasz Nowicki 1802db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 1803d14ae5e6STomasz Nowicki if (!inner_domain) { 1804d14ae5e6STomasz Nowicki kfree(info); 1805d14ae5e6STomasz Nowicki return -ENOMEM; 1806d14ae5e6STomasz Nowicki } 1807d14ae5e6STomasz Nowicki 1808db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 180996f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 181059768527SEric Auger inner_domain->flags |= IRQ_DOMAIN_FLAG_MSI_REMAP; 1811d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 1812d14ae5e6STomasz Nowicki info->data = its; 1813d14ae5e6STomasz Nowicki inner_domain->host_data = info; 1814d14ae5e6STomasz Nowicki 1815d14ae5e6STomasz Nowicki return 0; 1816d14ae5e6STomasz Nowicki } 1817d14ae5e6STomasz Nowicki 18183dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 18193dfa576bSMarc Zyngier void __iomem *its_base) 18203dfa576bSMarc Zyngier { 18213dfa576bSMarc Zyngier int its_number; 18223dfa576bSMarc Zyngier u32 ctlr; 18233dfa576bSMarc Zyngier 18243dfa576bSMarc Zyngier /* 18253dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 18263dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 18273dfa576bSMarc Zyngier * locking. Should this change, we should address 18283dfa576bSMarc Zyngier * this. 18293dfa576bSMarc Zyngier */ 18303dfa576bSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, ITS_LIST_MAX); 18313dfa576bSMarc Zyngier if (its_number >= ITS_LIST_MAX) { 18323dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 18333dfa576bSMarc Zyngier &res->start); 18343dfa576bSMarc Zyngier return -EINVAL; 18353dfa576bSMarc Zyngier } 18363dfa576bSMarc Zyngier 18373dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 18383dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 18393dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 18403dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 18413dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 18423dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 18433dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 18443dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 18453dfa576bSMarc Zyngier } 18463dfa576bSMarc Zyngier 18473dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 18483dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 18493dfa576bSMarc Zyngier &res->start, its_number); 18503dfa576bSMarc Zyngier return -EINVAL; 18513dfa576bSMarc Zyngier } 18523dfa576bSMarc Zyngier 18533dfa576bSMarc Zyngier return its_number; 18543dfa576bSMarc Zyngier } 18553dfa576bSMarc Zyngier 1856db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 1857db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 18584c21f3c2SMarc Zyngier { 18594c21f3c2SMarc Zyngier struct its_node *its; 18604c21f3c2SMarc Zyngier void __iomem *its_base; 18613dfa576bSMarc Zyngier u32 val, ctlr; 18623dfa576bSMarc Zyngier u64 baser, tmp, typer; 18634c21f3c2SMarc Zyngier int err; 18644c21f3c2SMarc Zyngier 1865db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 18664c21f3c2SMarc Zyngier if (!its_base) { 1867db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 18684c21f3c2SMarc Zyngier return -ENOMEM; 18694c21f3c2SMarc Zyngier } 18704c21f3c2SMarc Zyngier 18714c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 18724c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 1873db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 18744c21f3c2SMarc Zyngier err = -ENODEV; 18754c21f3c2SMarc Zyngier goto out_unmap; 18764c21f3c2SMarc Zyngier } 18774c21f3c2SMarc Zyngier 18784559fbb3SYun Wu err = its_force_quiescent(its_base); 18794559fbb3SYun Wu if (err) { 1880db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 18814559fbb3SYun Wu goto out_unmap; 18824559fbb3SYun Wu } 18834559fbb3SYun Wu 1884db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 18854c21f3c2SMarc Zyngier 18864c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 18874c21f3c2SMarc Zyngier if (!its) { 18884c21f3c2SMarc Zyngier err = -ENOMEM; 18894c21f3c2SMarc Zyngier goto out_unmap; 18904c21f3c2SMarc Zyngier } 18914c21f3c2SMarc Zyngier 18924c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 18934c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 18944c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 18953dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 18964c21f3c2SMarc Zyngier its->base = its_base; 1897db40f0a7STomasz Nowicki its->phys_base = res->start; 18983dfa576bSMarc Zyngier its->ite_size = GITS_TYPER_ITT_ENTRY_SIZE(typer); 18993dfa576bSMarc Zyngier its->is_v4 = !!(typer & GITS_TYPER_VLPIS); 19003dfa576bSMarc Zyngier if (its->is_v4) { 19013dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 19023dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 19033dfa576bSMarc Zyngier if (err < 0) 19043dfa576bSMarc Zyngier goto out_free_its; 19053dfa576bSMarc Zyngier 19063dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 19073dfa576bSMarc Zyngier &res->start, err); 19083dfa576bSMarc Zyngier } else { 19093dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 19103dfa576bSMarc Zyngier } 19113dfa576bSMarc Zyngier } 19123dfa576bSMarc Zyngier 1913db40f0a7STomasz Nowicki its->numa_node = numa_node; 19144c21f3c2SMarc Zyngier 19155bc13c2cSRobert Richter its->cmd_base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 19165bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 19174c21f3c2SMarc Zyngier if (!its->cmd_base) { 19184c21f3c2SMarc Zyngier err = -ENOMEM; 19194c21f3c2SMarc Zyngier goto out_free_its; 19204c21f3c2SMarc Zyngier } 19214c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 19224c21f3c2SMarc Zyngier 192367510ccaSRobert Richter its_enable_quirks(its); 192467510ccaSRobert Richter 19250e0b0f69SShanker Donthineni err = its_alloc_tables(its); 19264c21f3c2SMarc Zyngier if (err) 19274c21f3c2SMarc Zyngier goto out_free_cmd; 19284c21f3c2SMarc Zyngier 19294c21f3c2SMarc Zyngier err = its_alloc_collections(its); 19304c21f3c2SMarc Zyngier if (err) 19314c21f3c2SMarc Zyngier goto out_free_tables; 19324c21f3c2SMarc Zyngier 19334c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 19342fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 19354c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 19364c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 19374c21f3c2SMarc Zyngier GITS_CBASER_VALID); 19384c21f3c2SMarc Zyngier 19390968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 19400968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 19414c21f3c2SMarc Zyngier 19424ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 1943241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 1944241a386cSMarc Zyngier /* 1945241a386cSMarc Zyngier * The HW reports non-shareable, we must 1946241a386cSMarc Zyngier * remove the cacheability attributes as 1947241a386cSMarc Zyngier * well. 1948241a386cSMarc Zyngier */ 1949241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 1950241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 1951241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 19520968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 1953241a386cSMarc Zyngier } 19544c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 19554c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 19564c21f3c2SMarc Zyngier } 19574c21f3c2SMarc Zyngier 19580968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 19593dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 19603dfa576bSMarc Zyngier writel_relaxed(ctlr | GITS_CTLR_ENABLE, its->base + GITS_CTLR); 1961241a386cSMarc Zyngier 1962db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 1963d14ae5e6STomasz Nowicki if (err) 196454456db9SMarc Zyngier goto out_free_tables; 19654c21f3c2SMarc Zyngier 19664c21f3c2SMarc Zyngier spin_lock(&its_lock); 19674c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 19684c21f3c2SMarc Zyngier spin_unlock(&its_lock); 19694c21f3c2SMarc Zyngier 19704c21f3c2SMarc Zyngier return 0; 19714c21f3c2SMarc Zyngier 19724c21f3c2SMarc Zyngier out_free_tables: 19734c21f3c2SMarc Zyngier its_free_tables(its); 19744c21f3c2SMarc Zyngier out_free_cmd: 19755bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 19764c21f3c2SMarc Zyngier out_free_its: 19774c21f3c2SMarc Zyngier kfree(its); 19784c21f3c2SMarc Zyngier out_unmap: 19794c21f3c2SMarc Zyngier iounmap(its_base); 1980db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 19814c21f3c2SMarc Zyngier return err; 19824c21f3c2SMarc Zyngier } 19834c21f3c2SMarc Zyngier 19844c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 19854c21f3c2SMarc Zyngier { 1986589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 19874c21f3c2SMarc Zyngier } 19884c21f3c2SMarc Zyngier 19894c21f3c2SMarc Zyngier int its_cpu_init(void) 19904c21f3c2SMarc Zyngier { 199116acae72SVladimir Murzin if (!list_empty(&its_nodes)) { 19924c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 19934c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 19944c21f3c2SMarc Zyngier return -ENXIO; 19954c21f3c2SMarc Zyngier } 19964c21f3c2SMarc Zyngier its_cpu_init_lpis(); 19974c21f3c2SMarc Zyngier its_cpu_init_collection(); 19984c21f3c2SMarc Zyngier } 19994c21f3c2SMarc Zyngier 20004c21f3c2SMarc Zyngier return 0; 20014c21f3c2SMarc Zyngier } 20024c21f3c2SMarc Zyngier 2003935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 20044c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 20054c21f3c2SMarc Zyngier {}, 20064c21f3c2SMarc Zyngier }; 20074c21f3c2SMarc Zyngier 2008db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 20094c21f3c2SMarc Zyngier { 20104c21f3c2SMarc Zyngier struct device_node *np; 2011db40f0a7STomasz Nowicki struct resource res; 20124c21f3c2SMarc Zyngier 20134c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 20144c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 2015d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 2016e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 2017e81f54c6SRob Herring np); 2018d14ae5e6STomasz Nowicki continue; 2019d14ae5e6STomasz Nowicki } 2020d14ae5e6STomasz Nowicki 2021db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 2022e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 2023db40f0a7STomasz Nowicki continue; 20244c21f3c2SMarc Zyngier } 20254c21f3c2SMarc Zyngier 2026db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 2027db40f0a7STomasz Nowicki } 2028db40f0a7STomasz Nowicki return 0; 2029db40f0a7STomasz Nowicki } 2030db40f0a7STomasz Nowicki 20313f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 20323f010cf1STomasz Nowicki 20333f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 20343f010cf1STomasz Nowicki 2035dbd2b826SGanapatrao Kulkarni #if defined(CONFIG_ACPI_NUMA) && (ACPI_CA_VERSION >= 0x20170531) 2036dbd2b826SGanapatrao Kulkarni struct its_srat_map { 2037dbd2b826SGanapatrao Kulkarni /* numa node id */ 2038dbd2b826SGanapatrao Kulkarni u32 numa_node; 2039dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 2040dbd2b826SGanapatrao Kulkarni u32 its_id; 2041dbd2b826SGanapatrao Kulkarni }; 2042dbd2b826SGanapatrao Kulkarni 2043dbd2b826SGanapatrao Kulkarni static struct its_srat_map its_srat_maps[MAX_NUMNODES] __initdata; 2044dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 2045dbd2b826SGanapatrao Kulkarni 2046dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 2047dbd2b826SGanapatrao Kulkarni { 2048dbd2b826SGanapatrao Kulkarni int i; 2049dbd2b826SGanapatrao Kulkarni 2050dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 2051dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 2052dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 2053dbd2b826SGanapatrao Kulkarni } 2054dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 2055dbd2b826SGanapatrao Kulkarni } 2056dbd2b826SGanapatrao Kulkarni 2057dbd2b826SGanapatrao Kulkarni static int __init gic_acpi_parse_srat_its(struct acpi_subtable_header *header, 2058dbd2b826SGanapatrao Kulkarni const unsigned long end) 2059dbd2b826SGanapatrao Kulkarni { 2060dbd2b826SGanapatrao Kulkarni int node; 2061dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 2062dbd2b826SGanapatrao Kulkarni 2063dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 2064dbd2b826SGanapatrao Kulkarni if (!its_affinity) 2065dbd2b826SGanapatrao Kulkarni return -EINVAL; 2066dbd2b826SGanapatrao Kulkarni 2067dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 2068dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 2069dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 2070dbd2b826SGanapatrao Kulkarni return -EINVAL; 2071dbd2b826SGanapatrao Kulkarni } 2072dbd2b826SGanapatrao Kulkarni 2073dbd2b826SGanapatrao Kulkarni if (its_in_srat >= MAX_NUMNODES) { 2074dbd2b826SGanapatrao Kulkarni pr_err("SRAT: ITS affinity exceeding max count[%d]\n", 2075dbd2b826SGanapatrao Kulkarni MAX_NUMNODES); 2076dbd2b826SGanapatrao Kulkarni return -EINVAL; 2077dbd2b826SGanapatrao Kulkarni } 2078dbd2b826SGanapatrao Kulkarni 2079dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 2080dbd2b826SGanapatrao Kulkarni 2081dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 2082dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 2083dbd2b826SGanapatrao Kulkarni return 0; 2084dbd2b826SGanapatrao Kulkarni } 2085dbd2b826SGanapatrao Kulkarni 2086dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 2087dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 2088dbd2b826SGanapatrao Kulkarni its_in_srat++; 2089dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 2090dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 2091dbd2b826SGanapatrao Kulkarni 2092dbd2b826SGanapatrao Kulkarni return 0; 2093dbd2b826SGanapatrao Kulkarni } 2094dbd2b826SGanapatrao Kulkarni 2095dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 2096dbd2b826SGanapatrao Kulkarni { 2097dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 2098dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 2099dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 2100dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 2101dbd2b826SGanapatrao Kulkarni } 2102dbd2b826SGanapatrao Kulkarni #else 2103dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 2104dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 2105dbd2b826SGanapatrao Kulkarni #endif 2106dbd2b826SGanapatrao Kulkarni 21073f010cf1STomasz Nowicki static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header, 21083f010cf1STomasz Nowicki const unsigned long end) 21093f010cf1STomasz Nowicki { 21103f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 21113f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 21123f010cf1STomasz Nowicki struct resource res; 21133f010cf1STomasz Nowicki int err; 21143f010cf1STomasz Nowicki 21153f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 21163f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 21173f010cf1STomasz Nowicki res.start = its_entry->base_address; 21183f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 21193f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 21203f010cf1STomasz Nowicki 21213f010cf1STomasz Nowicki dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address); 21223f010cf1STomasz Nowicki if (!dom_handle) { 21233f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 21243f010cf1STomasz Nowicki &res.start); 21253f010cf1STomasz Nowicki return -ENOMEM; 21263f010cf1STomasz Nowicki } 21273f010cf1STomasz Nowicki 21283f010cf1STomasz Nowicki err = iort_register_domain_token(its_entry->translation_id, dom_handle); 21293f010cf1STomasz Nowicki if (err) { 21303f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 21313f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 21323f010cf1STomasz Nowicki goto dom_err; 21333f010cf1STomasz Nowicki } 21343f010cf1STomasz Nowicki 2135dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 2136dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 21373f010cf1STomasz Nowicki if (!err) 21383f010cf1STomasz Nowicki return 0; 21393f010cf1STomasz Nowicki 21403f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 21413f010cf1STomasz Nowicki dom_err: 21423f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 21433f010cf1STomasz Nowicki return err; 21443f010cf1STomasz Nowicki } 21453f010cf1STomasz Nowicki 21463f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 21473f010cf1STomasz Nowicki { 2148dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 21493f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 21503f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 21513f010cf1STomasz Nowicki } 21523f010cf1STomasz Nowicki #else 21533f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 21543f010cf1STomasz Nowicki #endif 21553f010cf1STomasz Nowicki 2156db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 2157db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 2158db40f0a7STomasz Nowicki { 2159db40f0a7STomasz Nowicki struct device_node *of_node; 2160db40f0a7STomasz Nowicki 2161db40f0a7STomasz Nowicki its_parent = parent_domain; 2162db40f0a7STomasz Nowicki of_node = to_of_node(handle); 2163db40f0a7STomasz Nowicki if (of_node) 2164db40f0a7STomasz Nowicki its_of_probe(of_node); 2165db40f0a7STomasz Nowicki else 21663f010cf1STomasz Nowicki its_acpi_probe(); 2167db40f0a7STomasz Nowicki 21684c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 21694c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 21704c21f3c2SMarc Zyngier return -ENXIO; 21714c21f3c2SMarc Zyngier } 21724c21f3c2SMarc Zyngier 21734c21f3c2SMarc Zyngier gic_rdists = rdists; 21746c31e123SShanker Donthineni return its_alloc_lpi_tables(); 21754c21f3c2SMarc Zyngier } 2176