1cc2d3216SMarc Zyngier /* 2d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 183f010cf1STomasz Nowicki #include <linux/acpi.h> 198d3554b8SHanjun Guo #include <linux/acpi_iort.h> 20cc2d3216SMarc Zyngier #include <linux/bitmap.h> 21cc2d3216SMarc Zyngier #include <linux/cpu.h> 22c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 23cc2d3216SMarc Zyngier #include <linux/delay.h> 2444bb7e24SRobin Murphy #include <linux/dma-iommu.h> 25cc2d3216SMarc Zyngier #include <linux/interrupt.h> 263f010cf1STomasz Nowicki #include <linux/irqdomain.h> 27880cb3cdSMarc Zyngier #include <linux/list.h> 28880cb3cdSMarc Zyngier #include <linux/list_sort.h> 29cc2d3216SMarc Zyngier #include <linux/log2.h> 30cc2d3216SMarc Zyngier #include <linux/mm.h> 31cc2d3216SMarc Zyngier #include <linux/msi.h> 32cc2d3216SMarc Zyngier #include <linux/of.h> 33cc2d3216SMarc Zyngier #include <linux/of_address.h> 34cc2d3216SMarc Zyngier #include <linux/of_irq.h> 35cc2d3216SMarc Zyngier #include <linux/of_pci.h> 36cc2d3216SMarc Zyngier #include <linux/of_platform.h> 37cc2d3216SMarc Zyngier #include <linux/percpu.h> 38cc2d3216SMarc Zyngier #include <linux/slab.h> 39dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 40cc2d3216SMarc Zyngier 4141a83e06SJoel Porquet #include <linux/irqchip.h> 42cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 43c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 44cc2d3216SMarc Zyngier 45cc2d3216SMarc Zyngier #include <asm/cputype.h> 46cc2d3216SMarc Zyngier #include <asm/exception.h> 47cc2d3216SMarc Zyngier 4867510ccaSRobert Richter #include "irq-gic-common.h" 4967510ccaSRobert Richter 5094100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 5194100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 52fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 53dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 54cc2d3216SMarc Zyngier 55c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 56c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 57c48ed51cSMarc Zyngier 58a13b0404SMarc Zyngier static u32 lpi_id_bits; 59a13b0404SMarc Zyngier 60a13b0404SMarc Zyngier /* 61a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 62a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 63a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 64a13b0404SMarc Zyngier */ 65a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 66a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 67a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 68a13b0404SMarc Zyngier 69a13b0404SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 70a13b0404SMarc Zyngier 71cc2d3216SMarc Zyngier /* 72cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 73cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 74cc2d3216SMarc Zyngier * CPU. 75cc2d3216SMarc Zyngier */ 76cc2d3216SMarc Zyngier struct its_collection { 77cc2d3216SMarc Zyngier u64 target_address; 78cc2d3216SMarc Zyngier u16 col_id; 79cc2d3216SMarc Zyngier }; 80cc2d3216SMarc Zyngier 81cc2d3216SMarc Zyngier /* 829347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 839347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 84466b7d16SShanker Donthineni */ 85466b7d16SShanker Donthineni struct its_baser { 86466b7d16SShanker Donthineni void *base; 87466b7d16SShanker Donthineni u64 val; 88466b7d16SShanker Donthineni u32 order; 899347359aSShanker Donthineni u32 psz; 90466b7d16SShanker Donthineni }; 91466b7d16SShanker Donthineni 92558b0165SArd Biesheuvel struct its_device; 93558b0165SArd Biesheuvel 94466b7d16SShanker Donthineni /* 95cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 96841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 97841514abSMarc Zyngier * list of devices writing to it. 98cc2d3216SMarc Zyngier */ 99cc2d3216SMarc Zyngier struct its_node { 100cc2d3216SMarc Zyngier raw_spinlock_t lock; 101cc2d3216SMarc Zyngier struct list_head entry; 102cc2d3216SMarc Zyngier void __iomem *base; 103db40f0a7STomasz Nowicki phys_addr_t phys_base; 104cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 105cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 106466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 107cc2d3216SMarc Zyngier struct its_collection *collections; 108558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 109558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 110dba0bc7bSDerek Basehore u64 cbaser_save; 111dba0bc7bSDerek Basehore u32 ctlr_save; 112cc2d3216SMarc Zyngier struct list_head its_device_list; 113cc2d3216SMarc Zyngier u64 flags; 114debf6d02SMarc Zyngier unsigned long list_nr; 115cc2d3216SMarc Zyngier u32 ite_size; 116466b7d16SShanker Donthineni u32 device_ids; 117fbf8f40eSGanapatrao Kulkarni int numa_node; 118558b0165SArd Biesheuvel unsigned int msi_domain_flags; 119558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1203dfa576bSMarc Zyngier bool is_v4; 1215c9a882eSMarc Zyngier int vlpi_redist_offset; 122cc2d3216SMarc Zyngier }; 123cc2d3216SMarc Zyngier 124cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 125cc2d3216SMarc Zyngier 12632bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 12732bd44dcSShanker Donthineni #define ITS_MAX_VPEID_BITS (16) 12832bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 12932bd44dcSShanker Donthineni 1302eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1312eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1322eca0d6cSShanker Donthineni 133591e5becSMarc Zyngier struct event_lpi_map { 134591e5becSMarc Zyngier unsigned long *lpi_map; 135591e5becSMarc Zyngier u16 *col_map; 136591e5becSMarc Zyngier irq_hw_number_t lpi_base; 137591e5becSMarc Zyngier int nr_lpis; 138d011e4e6SMarc Zyngier struct mutex vlpi_lock; 139d011e4e6SMarc Zyngier struct its_vm *vm; 140d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 141d011e4e6SMarc Zyngier int nr_vlpis; 142591e5becSMarc Zyngier }; 143591e5becSMarc Zyngier 144cc2d3216SMarc Zyngier /* 145d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 146d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 147d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 148d011e4e6SMarc Zyngier * indicates which one. 149cc2d3216SMarc Zyngier */ 150cc2d3216SMarc Zyngier struct its_device { 151cc2d3216SMarc Zyngier struct list_head entry; 152cc2d3216SMarc Zyngier struct its_node *its; 153591e5becSMarc Zyngier struct event_lpi_map event_map; 154cc2d3216SMarc Zyngier void *itt; 155cc2d3216SMarc Zyngier u32 nr_ites; 156cc2d3216SMarc Zyngier u32 device_id; 157cc2d3216SMarc Zyngier }; 158cc2d3216SMarc Zyngier 15920b3d54eSMarc Zyngier static struct { 16020b3d54eSMarc Zyngier raw_spinlock_t lock; 16120b3d54eSMarc Zyngier struct its_device *dev; 16220b3d54eSMarc Zyngier struct its_vpe **vpes; 16320b3d54eSMarc Zyngier int next_victim; 16420b3d54eSMarc Zyngier } vpe_proxy; 16520b3d54eSMarc Zyngier 1661ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 167a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1681ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 169db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1701ac19ca6SMarc Zyngier 1713dfa576bSMarc Zyngier static unsigned long its_list_map; 1723171a47aSMarc Zyngier static u16 vmovp_seq_num; 1733171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1743171a47aSMarc Zyngier 1757d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1763dfa576bSMarc Zyngier 1771ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 17811e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1791ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 180e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1811ac19ca6SMarc Zyngier 182591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 183591e5becSMarc Zyngier u32 event) 184591e5becSMarc Zyngier { 185591e5becSMarc Zyngier struct its_node *its = its_dev->its; 186591e5becSMarc Zyngier 187591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 188591e5becSMarc Zyngier } 189591e5becSMarc Zyngier 19083559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 19183559b47SMarc Zyngier { 19283559b47SMarc Zyngier if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(0, 15))) 19383559b47SMarc Zyngier return NULL; 19483559b47SMarc Zyngier 19583559b47SMarc Zyngier return col; 19683559b47SMarc Zyngier } 19783559b47SMarc Zyngier 198205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 199205e065dSMarc Zyngier { 200205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 201205e065dSMarc Zyngier return vpe; 202205e065dSMarc Zyngier 203205e065dSMarc Zyngier return NULL; 204205e065dSMarc Zyngier } 205205e065dSMarc Zyngier 206cc2d3216SMarc Zyngier /* 207cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 208cc2d3216SMarc Zyngier * block. 209cc2d3216SMarc Zyngier */ 210cc2d3216SMarc Zyngier struct its_cmd_desc { 211cc2d3216SMarc Zyngier union { 212cc2d3216SMarc Zyngier struct { 213cc2d3216SMarc Zyngier struct its_device *dev; 214cc2d3216SMarc Zyngier u32 event_id; 215cc2d3216SMarc Zyngier } its_inv_cmd; 216cc2d3216SMarc Zyngier 217cc2d3216SMarc Zyngier struct { 218cc2d3216SMarc Zyngier struct its_device *dev; 219cc2d3216SMarc Zyngier u32 event_id; 2208d85dcedSMarc Zyngier } its_clear_cmd; 2218d85dcedSMarc Zyngier 2228d85dcedSMarc Zyngier struct { 2238d85dcedSMarc Zyngier struct its_device *dev; 2248d85dcedSMarc Zyngier u32 event_id; 225cc2d3216SMarc Zyngier } its_int_cmd; 226cc2d3216SMarc Zyngier 227cc2d3216SMarc Zyngier struct { 228cc2d3216SMarc Zyngier struct its_device *dev; 229cc2d3216SMarc Zyngier int valid; 230cc2d3216SMarc Zyngier } its_mapd_cmd; 231cc2d3216SMarc Zyngier 232cc2d3216SMarc Zyngier struct { 233cc2d3216SMarc Zyngier struct its_collection *col; 234cc2d3216SMarc Zyngier int valid; 235cc2d3216SMarc Zyngier } its_mapc_cmd; 236cc2d3216SMarc Zyngier 237cc2d3216SMarc Zyngier struct { 238cc2d3216SMarc Zyngier struct its_device *dev; 239cc2d3216SMarc Zyngier u32 phys_id; 240cc2d3216SMarc Zyngier u32 event_id; 2416a25ad3aSMarc Zyngier } its_mapti_cmd; 242cc2d3216SMarc Zyngier 243cc2d3216SMarc Zyngier struct { 244cc2d3216SMarc Zyngier struct its_device *dev; 245cc2d3216SMarc Zyngier struct its_collection *col; 246591e5becSMarc Zyngier u32 event_id; 247cc2d3216SMarc Zyngier } its_movi_cmd; 248cc2d3216SMarc Zyngier 249cc2d3216SMarc Zyngier struct { 250cc2d3216SMarc Zyngier struct its_device *dev; 251cc2d3216SMarc Zyngier u32 event_id; 252cc2d3216SMarc Zyngier } its_discard_cmd; 253cc2d3216SMarc Zyngier 254cc2d3216SMarc Zyngier struct { 255cc2d3216SMarc Zyngier struct its_collection *col; 256cc2d3216SMarc Zyngier } its_invall_cmd; 257d011e4e6SMarc Zyngier 258d011e4e6SMarc Zyngier struct { 259d011e4e6SMarc Zyngier struct its_vpe *vpe; 260eb78192bSMarc Zyngier } its_vinvall_cmd; 261eb78192bSMarc Zyngier 262eb78192bSMarc Zyngier struct { 263eb78192bSMarc Zyngier struct its_vpe *vpe; 264eb78192bSMarc Zyngier struct its_collection *col; 265eb78192bSMarc Zyngier bool valid; 266eb78192bSMarc Zyngier } its_vmapp_cmd; 267eb78192bSMarc Zyngier 268eb78192bSMarc Zyngier struct { 269eb78192bSMarc Zyngier struct its_vpe *vpe; 270d011e4e6SMarc Zyngier struct its_device *dev; 271d011e4e6SMarc Zyngier u32 virt_id; 272d011e4e6SMarc Zyngier u32 event_id; 273d011e4e6SMarc Zyngier bool db_enabled; 274d011e4e6SMarc Zyngier } its_vmapti_cmd; 275d011e4e6SMarc Zyngier 276d011e4e6SMarc Zyngier struct { 277d011e4e6SMarc Zyngier struct its_vpe *vpe; 278d011e4e6SMarc Zyngier struct its_device *dev; 279d011e4e6SMarc Zyngier u32 event_id; 280d011e4e6SMarc Zyngier bool db_enabled; 281d011e4e6SMarc Zyngier } its_vmovi_cmd; 2823171a47aSMarc Zyngier 2833171a47aSMarc Zyngier struct { 2843171a47aSMarc Zyngier struct its_vpe *vpe; 2853171a47aSMarc Zyngier struct its_collection *col; 2863171a47aSMarc Zyngier u16 seq_num; 2873171a47aSMarc Zyngier u16 its_list; 2883171a47aSMarc Zyngier } its_vmovp_cmd; 289cc2d3216SMarc Zyngier }; 290cc2d3216SMarc Zyngier }; 291cc2d3216SMarc Zyngier 292cc2d3216SMarc Zyngier /* 293cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 294cc2d3216SMarc Zyngier */ 295cc2d3216SMarc Zyngier struct its_cmd_block { 296cc2d3216SMarc Zyngier u64 raw_cmd[4]; 297cc2d3216SMarc Zyngier }; 298cc2d3216SMarc Zyngier 299cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 300cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 301cc2d3216SMarc Zyngier 30267047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 30367047f90SMarc Zyngier struct its_cmd_block *, 304cc2d3216SMarc Zyngier struct its_cmd_desc *); 305cc2d3216SMarc Zyngier 30667047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 30767047f90SMarc Zyngier struct its_cmd_block *, 308d011e4e6SMarc Zyngier struct its_cmd_desc *); 309d011e4e6SMarc Zyngier 3104d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 3114d36f136SMarc Zyngier { 3124d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 3134d36f136SMarc Zyngier *raw_cmd &= ~mask; 3144d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 3154d36f136SMarc Zyngier } 3164d36f136SMarc Zyngier 317cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 318cc2d3216SMarc Zyngier { 3194d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 320cc2d3216SMarc Zyngier } 321cc2d3216SMarc Zyngier 322cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 323cc2d3216SMarc Zyngier { 3244d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 325cc2d3216SMarc Zyngier } 326cc2d3216SMarc Zyngier 327cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 328cc2d3216SMarc Zyngier { 3294d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 330cc2d3216SMarc Zyngier } 331cc2d3216SMarc Zyngier 332cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 333cc2d3216SMarc Zyngier { 3344d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 335cc2d3216SMarc Zyngier } 336cc2d3216SMarc Zyngier 337cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 338cc2d3216SMarc Zyngier { 3394d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 340cc2d3216SMarc Zyngier } 341cc2d3216SMarc Zyngier 342cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 343cc2d3216SMarc Zyngier { 34430ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 345cc2d3216SMarc Zyngier } 346cc2d3216SMarc Zyngier 347cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 348cc2d3216SMarc Zyngier { 3494d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 350cc2d3216SMarc Zyngier } 351cc2d3216SMarc Zyngier 352cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 353cc2d3216SMarc Zyngier { 35430ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 355cc2d3216SMarc Zyngier } 356cc2d3216SMarc Zyngier 357cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 358cc2d3216SMarc Zyngier { 3594d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 360cc2d3216SMarc Zyngier } 361cc2d3216SMarc Zyngier 362d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 363d011e4e6SMarc Zyngier { 364d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 365d011e4e6SMarc Zyngier } 366d011e4e6SMarc Zyngier 367d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 368d011e4e6SMarc Zyngier { 369d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 370d011e4e6SMarc Zyngier } 371d011e4e6SMarc Zyngier 372d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 373d011e4e6SMarc Zyngier { 374d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 375d011e4e6SMarc Zyngier } 376d011e4e6SMarc Zyngier 377d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 378d011e4e6SMarc Zyngier { 379d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 380d011e4e6SMarc Zyngier } 381d011e4e6SMarc Zyngier 3823171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 3833171a47aSMarc Zyngier { 3843171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 3853171a47aSMarc Zyngier } 3863171a47aSMarc Zyngier 3873171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 3883171a47aSMarc Zyngier { 3893171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 3903171a47aSMarc Zyngier } 3913171a47aSMarc Zyngier 392eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 393eb78192bSMarc Zyngier { 39430ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 395eb78192bSMarc Zyngier } 396eb78192bSMarc Zyngier 397eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 398eb78192bSMarc Zyngier { 399eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 400eb78192bSMarc Zyngier } 401eb78192bSMarc Zyngier 402cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 403cc2d3216SMarc Zyngier { 404cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 405cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 406cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 407cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 408cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 409cc2d3216SMarc Zyngier } 410cc2d3216SMarc Zyngier 41167047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 41267047f90SMarc Zyngier struct its_cmd_block *cmd, 413cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 414cc2d3216SMarc Zyngier { 415cc2d3216SMarc Zyngier unsigned long itt_addr; 416c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 417cc2d3216SMarc Zyngier 418cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 419cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 420cc2d3216SMarc Zyngier 421cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 422cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 423cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 424cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 425cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 426cc2d3216SMarc Zyngier 427cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 428cc2d3216SMarc Zyngier 429591e5becSMarc Zyngier return NULL; 430cc2d3216SMarc Zyngier } 431cc2d3216SMarc Zyngier 43267047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 43367047f90SMarc Zyngier struct its_cmd_block *cmd, 434cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 435cc2d3216SMarc Zyngier { 436cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 437cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 438cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 439cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 440cc2d3216SMarc Zyngier 441cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 442cc2d3216SMarc Zyngier 443cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 444cc2d3216SMarc Zyngier } 445cc2d3216SMarc Zyngier 44667047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 44767047f90SMarc Zyngier struct its_cmd_block *cmd, 448cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 449cc2d3216SMarc Zyngier { 450591e5becSMarc Zyngier struct its_collection *col; 451591e5becSMarc Zyngier 4526a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 4536a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 454591e5becSMarc Zyngier 4556a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 4566a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 4576a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 4586a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 459591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 460cc2d3216SMarc Zyngier 461cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 462cc2d3216SMarc Zyngier 46383559b47SMarc Zyngier return valid_col(col); 464cc2d3216SMarc Zyngier } 465cc2d3216SMarc Zyngier 46667047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 46767047f90SMarc Zyngier struct its_cmd_block *cmd, 468cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 469cc2d3216SMarc Zyngier { 470591e5becSMarc Zyngier struct its_collection *col; 471591e5becSMarc Zyngier 472591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 473591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 474591e5becSMarc Zyngier 475cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 476cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 477591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 478cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 479cc2d3216SMarc Zyngier 480cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 481cc2d3216SMarc Zyngier 48283559b47SMarc Zyngier return valid_col(col); 483cc2d3216SMarc Zyngier } 484cc2d3216SMarc Zyngier 48567047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 48667047f90SMarc Zyngier struct its_cmd_block *cmd, 487cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 488cc2d3216SMarc Zyngier { 489591e5becSMarc Zyngier struct its_collection *col; 490591e5becSMarc Zyngier 491591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 492591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 493591e5becSMarc Zyngier 494cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 495cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 496cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 497cc2d3216SMarc Zyngier 498cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 499cc2d3216SMarc Zyngier 50083559b47SMarc Zyngier return valid_col(col); 501cc2d3216SMarc Zyngier } 502cc2d3216SMarc Zyngier 50367047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 50467047f90SMarc Zyngier struct its_cmd_block *cmd, 505cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 506cc2d3216SMarc Zyngier { 507591e5becSMarc Zyngier struct its_collection *col; 508591e5becSMarc Zyngier 509591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 510591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 511591e5becSMarc Zyngier 512cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 513cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 514cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 515cc2d3216SMarc Zyngier 516cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 517cc2d3216SMarc Zyngier 51883559b47SMarc Zyngier return valid_col(col); 519cc2d3216SMarc Zyngier } 520cc2d3216SMarc Zyngier 52167047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 52267047f90SMarc Zyngier struct its_cmd_block *cmd, 5238d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5248d85dcedSMarc Zyngier { 5258d85dcedSMarc Zyngier struct its_collection *col; 5268d85dcedSMarc Zyngier 5278d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 5288d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 5298d85dcedSMarc Zyngier 5308d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 5318d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 5328d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 5338d85dcedSMarc Zyngier 5348d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5358d85dcedSMarc Zyngier 53683559b47SMarc Zyngier return valid_col(col); 5378d85dcedSMarc Zyngier } 5388d85dcedSMarc Zyngier 53967047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 54067047f90SMarc Zyngier struct its_cmd_block *cmd, 5418d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5428d85dcedSMarc Zyngier { 5438d85dcedSMarc Zyngier struct its_collection *col; 5448d85dcedSMarc Zyngier 5458d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 5468d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 5478d85dcedSMarc Zyngier 5488d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 5498d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 5508d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 5518d85dcedSMarc Zyngier 5528d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5538d85dcedSMarc Zyngier 55483559b47SMarc Zyngier return valid_col(col); 5558d85dcedSMarc Zyngier } 5568d85dcedSMarc Zyngier 55767047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 55867047f90SMarc Zyngier struct its_cmd_block *cmd, 559cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 560cc2d3216SMarc Zyngier { 561cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 562cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 563cc2d3216SMarc Zyngier 564cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 565cc2d3216SMarc Zyngier 566cc2d3216SMarc Zyngier return NULL; 567cc2d3216SMarc Zyngier } 568cc2d3216SMarc Zyngier 56967047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 57067047f90SMarc Zyngier struct its_cmd_block *cmd, 571eb78192bSMarc Zyngier struct its_cmd_desc *desc) 572eb78192bSMarc Zyngier { 573eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 574eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 575eb78192bSMarc Zyngier 576eb78192bSMarc Zyngier its_fixup_cmd(cmd); 577eb78192bSMarc Zyngier 578205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 579eb78192bSMarc Zyngier } 580eb78192bSMarc Zyngier 58167047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 58267047f90SMarc Zyngier struct its_cmd_block *cmd, 583eb78192bSMarc Zyngier struct its_cmd_desc *desc) 584eb78192bSMarc Zyngier { 585eb78192bSMarc Zyngier unsigned long vpt_addr; 5865c9a882eSMarc Zyngier u64 target; 587eb78192bSMarc Zyngier 588eb78192bSMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 5895c9a882eSMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 590eb78192bSMarc Zyngier 591eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 592eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 593eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 5945c9a882eSMarc Zyngier its_encode_target(cmd, target); 595eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 596eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 597eb78192bSMarc Zyngier 598eb78192bSMarc Zyngier its_fixup_cmd(cmd); 599eb78192bSMarc Zyngier 600205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 601eb78192bSMarc Zyngier } 602eb78192bSMarc Zyngier 60367047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 60467047f90SMarc Zyngier struct its_cmd_block *cmd, 605d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 606d011e4e6SMarc Zyngier { 607d011e4e6SMarc Zyngier u32 db; 608d011e4e6SMarc Zyngier 609d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 610d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 611d011e4e6SMarc Zyngier else 612d011e4e6SMarc Zyngier db = 1023; 613d011e4e6SMarc Zyngier 614d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 615d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 616d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 617d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 618d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 619d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 620d011e4e6SMarc Zyngier 621d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 622d011e4e6SMarc Zyngier 623205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 624d011e4e6SMarc Zyngier } 625d011e4e6SMarc Zyngier 62667047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 62767047f90SMarc Zyngier struct its_cmd_block *cmd, 628d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 629d011e4e6SMarc Zyngier { 630d011e4e6SMarc Zyngier u32 db; 631d011e4e6SMarc Zyngier 632d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 633d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 634d011e4e6SMarc Zyngier else 635d011e4e6SMarc Zyngier db = 1023; 636d011e4e6SMarc Zyngier 637d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 638d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 639d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 640d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 641d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 642d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 643d011e4e6SMarc Zyngier 644d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 645d011e4e6SMarc Zyngier 646205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 647d011e4e6SMarc Zyngier } 648d011e4e6SMarc Zyngier 64967047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 65067047f90SMarc Zyngier struct its_cmd_block *cmd, 6513171a47aSMarc Zyngier struct its_cmd_desc *desc) 6523171a47aSMarc Zyngier { 6535c9a882eSMarc Zyngier u64 target; 6545c9a882eSMarc Zyngier 6555c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 6563171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 6573171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 6583171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 6593171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 6605c9a882eSMarc Zyngier its_encode_target(cmd, target); 6613171a47aSMarc Zyngier 6623171a47aSMarc Zyngier its_fixup_cmd(cmd); 6633171a47aSMarc Zyngier 664205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 6653171a47aSMarc Zyngier } 6663171a47aSMarc Zyngier 667cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 668cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 669cc2d3216SMarc Zyngier { 670cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 671cc2d3216SMarc Zyngier } 672cc2d3216SMarc Zyngier 673cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 674cc2d3216SMarc Zyngier { 675cc2d3216SMarc Zyngier int widx; 676cc2d3216SMarc Zyngier int ridx; 677cc2d3216SMarc Zyngier 678cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 679cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 680cc2d3216SMarc Zyngier 681cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 682cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 683cc2d3216SMarc Zyngier return 1; 684cc2d3216SMarc Zyngier 685cc2d3216SMarc Zyngier return 0; 686cc2d3216SMarc Zyngier } 687cc2d3216SMarc Zyngier 688cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 689cc2d3216SMarc Zyngier { 690cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 691cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 692cc2d3216SMarc Zyngier 693cc2d3216SMarc Zyngier while (its_queue_full(its)) { 694cc2d3216SMarc Zyngier count--; 695cc2d3216SMarc Zyngier if (!count) { 696cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 697cc2d3216SMarc Zyngier return NULL; 698cc2d3216SMarc Zyngier } 699cc2d3216SMarc Zyngier cpu_relax(); 700cc2d3216SMarc Zyngier udelay(1); 701cc2d3216SMarc Zyngier } 702cc2d3216SMarc Zyngier 703cc2d3216SMarc Zyngier cmd = its->cmd_write++; 704cc2d3216SMarc Zyngier 705cc2d3216SMarc Zyngier /* Handle queue wrapping */ 706cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 707cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 708cc2d3216SMarc Zyngier 70934d677a9SMarc Zyngier /* Clear command */ 71034d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 71134d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 71234d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 71334d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 71434d677a9SMarc Zyngier 715cc2d3216SMarc Zyngier return cmd; 716cc2d3216SMarc Zyngier } 717cc2d3216SMarc Zyngier 718cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 719cc2d3216SMarc Zyngier { 720cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 721cc2d3216SMarc Zyngier 722cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 723cc2d3216SMarc Zyngier 724cc2d3216SMarc Zyngier return its->cmd_write; 725cc2d3216SMarc Zyngier } 726cc2d3216SMarc Zyngier 727cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 728cc2d3216SMarc Zyngier { 729cc2d3216SMarc Zyngier /* 730cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 731cc2d3216SMarc Zyngier * the ITS. 732cc2d3216SMarc Zyngier */ 733cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 734328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 735cc2d3216SMarc Zyngier else 736cc2d3216SMarc Zyngier dsb(ishst); 737cc2d3216SMarc Zyngier } 738cc2d3216SMarc Zyngier 739a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 740cc2d3216SMarc Zyngier struct its_cmd_block *from, 741cc2d3216SMarc Zyngier struct its_cmd_block *to) 742cc2d3216SMarc Zyngier { 743cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 744cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 745cc2d3216SMarc Zyngier 746cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 747cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 748cc2d3216SMarc Zyngier 749cc2d3216SMarc Zyngier while (1) { 750cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 7519bdd8b1cSMarc Zyngier 7529bdd8b1cSMarc Zyngier /* Direct case */ 7539bdd8b1cSMarc Zyngier if (from_idx < to_idx && rd_idx >= to_idx) 7549bdd8b1cSMarc Zyngier break; 7559bdd8b1cSMarc Zyngier 7569bdd8b1cSMarc Zyngier /* Wrapped case */ 7579bdd8b1cSMarc Zyngier if (from_idx >= to_idx && rd_idx >= to_idx && rd_idx < from_idx) 758cc2d3216SMarc Zyngier break; 759cc2d3216SMarc Zyngier 760cc2d3216SMarc Zyngier count--; 761cc2d3216SMarc Zyngier if (!count) { 762a19b462fSMarc Zyngier pr_err_ratelimited("ITS queue timeout (%llu %llu %llu)\n", 763a19b462fSMarc Zyngier from_idx, to_idx, rd_idx); 764a19b462fSMarc Zyngier return -1; 765cc2d3216SMarc Zyngier } 766cc2d3216SMarc Zyngier cpu_relax(); 767cc2d3216SMarc Zyngier udelay(1); 768cc2d3216SMarc Zyngier } 769a19b462fSMarc Zyngier 770a19b462fSMarc Zyngier return 0; 771cc2d3216SMarc Zyngier } 772cc2d3216SMarc Zyngier 773e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 774e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 775e4f9094bSMarc Zyngier void name(struct its_node *its, \ 776e4f9094bSMarc Zyngier buildtype builder, \ 777e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 778e4f9094bSMarc Zyngier { \ 779e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 780e4f9094bSMarc Zyngier synctype *sync_obj; \ 781e4f9094bSMarc Zyngier unsigned long flags; \ 782e4f9094bSMarc Zyngier \ 783e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 784e4f9094bSMarc Zyngier \ 785e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 786e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 787e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 788e4f9094bSMarc Zyngier return; \ 789e4f9094bSMarc Zyngier } \ 79067047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 791e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 792e4f9094bSMarc Zyngier \ 793e4f9094bSMarc Zyngier if (sync_obj) { \ 794e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 795e4f9094bSMarc Zyngier if (!sync_cmd) \ 796e4f9094bSMarc Zyngier goto post; \ 797e4f9094bSMarc Zyngier \ 79867047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 799e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 800e4f9094bSMarc Zyngier } \ 801e4f9094bSMarc Zyngier \ 802e4f9094bSMarc Zyngier post: \ 803e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 804e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 805e4f9094bSMarc Zyngier \ 806a19b462fSMarc Zyngier if (its_wait_for_range_completion(its, cmd, next_cmd)) \ 807a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 808e4f9094bSMarc Zyngier } 809e4f9094bSMarc Zyngier 81067047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 81167047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 812e4f9094bSMarc Zyngier struct its_collection *sync_col) 813cc2d3216SMarc Zyngier { 814cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 815cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 816e4f9094bSMarc Zyngier 817cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 818cc2d3216SMarc Zyngier } 819cc2d3216SMarc Zyngier 820e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 821e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 822cc2d3216SMarc Zyngier 82367047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 82467047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 825d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 826d011e4e6SMarc Zyngier { 827d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 828d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 829d011e4e6SMarc Zyngier 830d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 831d011e4e6SMarc Zyngier } 832d011e4e6SMarc Zyngier 833d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 834d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 835d011e4e6SMarc Zyngier 8368d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 8378d85dcedSMarc Zyngier { 8388d85dcedSMarc Zyngier struct its_cmd_desc desc; 8398d85dcedSMarc Zyngier 8408d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 8418d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 8428d85dcedSMarc Zyngier 8438d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 8448d85dcedSMarc Zyngier } 8458d85dcedSMarc Zyngier 8468d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 8478d85dcedSMarc Zyngier { 8488d85dcedSMarc Zyngier struct its_cmd_desc desc; 8498d85dcedSMarc Zyngier 8508d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 8518d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 8528d85dcedSMarc Zyngier 8538d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 854cc2d3216SMarc Zyngier } 855cc2d3216SMarc Zyngier 856cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 857cc2d3216SMarc Zyngier { 858cc2d3216SMarc Zyngier struct its_cmd_desc desc; 859cc2d3216SMarc Zyngier 860cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 861cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 862cc2d3216SMarc Zyngier 863cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 864cc2d3216SMarc Zyngier } 865cc2d3216SMarc Zyngier 866cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 867cc2d3216SMarc Zyngier { 868cc2d3216SMarc Zyngier struct its_cmd_desc desc; 869cc2d3216SMarc Zyngier 870cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 871cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 872cc2d3216SMarc Zyngier 873cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 874cc2d3216SMarc Zyngier } 875cc2d3216SMarc Zyngier 876cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 877cc2d3216SMarc Zyngier int valid) 878cc2d3216SMarc Zyngier { 879cc2d3216SMarc Zyngier struct its_cmd_desc desc; 880cc2d3216SMarc Zyngier 881cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 882cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 883cc2d3216SMarc Zyngier 884cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 885cc2d3216SMarc Zyngier } 886cc2d3216SMarc Zyngier 8876a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 888cc2d3216SMarc Zyngier { 889cc2d3216SMarc Zyngier struct its_cmd_desc desc; 890cc2d3216SMarc Zyngier 8916a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 8926a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 8936a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 894cc2d3216SMarc Zyngier 8956a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 896cc2d3216SMarc Zyngier } 897cc2d3216SMarc Zyngier 898cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 899cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 900cc2d3216SMarc Zyngier { 901cc2d3216SMarc Zyngier struct its_cmd_desc desc; 902cc2d3216SMarc Zyngier 903cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 904cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 905591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 906cc2d3216SMarc Zyngier 907cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 908cc2d3216SMarc Zyngier } 909cc2d3216SMarc Zyngier 910cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 911cc2d3216SMarc Zyngier { 912cc2d3216SMarc Zyngier struct its_cmd_desc desc; 913cc2d3216SMarc Zyngier 914cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 915cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 916cc2d3216SMarc Zyngier 917cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 918cc2d3216SMarc Zyngier } 919cc2d3216SMarc Zyngier 920cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 921cc2d3216SMarc Zyngier { 922cc2d3216SMarc Zyngier struct its_cmd_desc desc; 923cc2d3216SMarc Zyngier 924cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 925cc2d3216SMarc Zyngier 926cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 927cc2d3216SMarc Zyngier } 928c48ed51cSMarc Zyngier 929d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 930d011e4e6SMarc Zyngier { 931d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 932d011e4e6SMarc Zyngier struct its_cmd_desc desc; 933d011e4e6SMarc Zyngier 934d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 935d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 936d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 937d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 938d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 939d011e4e6SMarc Zyngier 940d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 941d011e4e6SMarc Zyngier } 942d011e4e6SMarc Zyngier 943d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 944d011e4e6SMarc Zyngier { 945d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 946d011e4e6SMarc Zyngier struct its_cmd_desc desc; 947d011e4e6SMarc Zyngier 948d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 949d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 950d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 951d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 952d011e4e6SMarc Zyngier 953d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 954d011e4e6SMarc Zyngier } 955d011e4e6SMarc Zyngier 95675fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 95775fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 958eb78192bSMarc Zyngier { 959eb78192bSMarc Zyngier struct its_cmd_desc desc; 960eb78192bSMarc Zyngier 961eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 962eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 963eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 96475fd951bSMarc Zyngier 965eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 966eb78192bSMarc Zyngier } 967eb78192bSMarc Zyngier 9683171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 9693171a47aSMarc Zyngier { 9703171a47aSMarc Zyngier struct its_cmd_desc desc; 9713171a47aSMarc Zyngier struct its_node *its; 9723171a47aSMarc Zyngier unsigned long flags; 9733171a47aSMarc Zyngier int col_id = vpe->col_idx; 9743171a47aSMarc Zyngier 9753171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 9763171a47aSMarc Zyngier desc.its_vmovp_cmd.its_list = (u16)its_list_map; 9773171a47aSMarc Zyngier 9783171a47aSMarc Zyngier if (!its_list_map) { 9793171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 9803171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = 0; 9813171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9823171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9833171a47aSMarc Zyngier return; 9843171a47aSMarc Zyngier } 9853171a47aSMarc Zyngier 9863171a47aSMarc Zyngier /* 9873171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 9883171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 9893171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 9903171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 9913171a47aSMarc Zyngier * 9923171a47aSMarc Zyngier * Wall <-- Head. 9933171a47aSMarc Zyngier */ 9943171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 9953171a47aSMarc Zyngier 9963171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 9973171a47aSMarc Zyngier 9983171a47aSMarc Zyngier /* Emit VMOVPs */ 9993171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 10003171a47aSMarc Zyngier if (!its->is_v4) 10013171a47aSMarc Zyngier continue; 10023171a47aSMarc Zyngier 10032247e1bfSMarc Zyngier if (!vpe->its_vm->vlpi_count[its->list_nr]) 10042247e1bfSMarc Zyngier continue; 10052247e1bfSMarc Zyngier 10063171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 10073171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 10083171a47aSMarc Zyngier } 10093171a47aSMarc Zyngier 10103171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 10113171a47aSMarc Zyngier } 10123171a47aSMarc Zyngier 101340619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1014eb78192bSMarc Zyngier { 1015eb78192bSMarc Zyngier struct its_cmd_desc desc; 1016eb78192bSMarc Zyngier 1017eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1018eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1019eb78192bSMarc Zyngier } 1020eb78192bSMarc Zyngier 1021c48ed51cSMarc Zyngier /* 1022c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1023c48ed51cSMarc Zyngier */ 1024c48ed51cSMarc Zyngier 1025c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 1026c48ed51cSMarc Zyngier { 1027c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1028591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 1029c48ed51cSMarc Zyngier } 1030c48ed51cSMarc Zyngier 1031015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1032c48ed51cSMarc Zyngier { 1033015ec038SMarc Zyngier irq_hw_number_t hwirq; 1034e1a2e201SMarc Zyngier void *va; 1035adcdb94eSMarc Zyngier u8 *cfg; 1036c48ed51cSMarc Zyngier 1037015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1038015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1039015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1040d4d7b4adSMarc Zyngier struct its_vlpi_map *map; 1041015ec038SMarc Zyngier 1042e1a2e201SMarc Zyngier va = page_address(its_dev->event_map.vm->vprop_page); 1043d4d7b4adSMarc Zyngier map = &its_dev->event_map.vlpi_maps[event]; 1044d4d7b4adSMarc Zyngier hwirq = map->vintid; 1045d4d7b4adSMarc Zyngier 1046d4d7b4adSMarc Zyngier /* Remember the updated property */ 1047d4d7b4adSMarc Zyngier map->properties &= ~clr; 1048d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1049015ec038SMarc Zyngier } else { 1050e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1051015ec038SMarc Zyngier hwirq = d->hwirq; 1052015ec038SMarc Zyngier } 1053adcdb94eSMarc Zyngier 1054e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1055adcdb94eSMarc Zyngier *cfg &= ~clr; 1056015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1057c48ed51cSMarc Zyngier 1058c48ed51cSMarc Zyngier /* 1059c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1060c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1061c48ed51cSMarc Zyngier * Humpf... 1062c48ed51cSMarc Zyngier */ 1063c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1064328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1065c48ed51cSMarc Zyngier else 1066c48ed51cSMarc Zyngier dsb(ishst); 1067015ec038SMarc Zyngier } 1068015ec038SMarc Zyngier 1069015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1070015ec038SMarc Zyngier { 1071015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1072015ec038SMarc Zyngier 1073015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1074adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 1075c48ed51cSMarc Zyngier } 1076c48ed51cSMarc Zyngier 1077015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1078015ec038SMarc Zyngier { 1079015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1080015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1081015ec038SMarc Zyngier 1082015ec038SMarc Zyngier if (its_dev->event_map.vlpi_maps[event].db_enabled == enable) 1083015ec038SMarc Zyngier return; 1084015ec038SMarc Zyngier 1085015ec038SMarc Zyngier its_dev->event_map.vlpi_maps[event].db_enabled = enable; 1086015ec038SMarc Zyngier 1087015ec038SMarc Zyngier /* 1088015ec038SMarc Zyngier * More fun with the architecture: 1089015ec038SMarc Zyngier * 1090015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1091015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1092015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1093015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1094015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1095015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1096015ec038SMarc Zyngier */ 1097015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1098c48ed51cSMarc Zyngier } 1099c48ed51cSMarc Zyngier 1100c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1101c48ed51cSMarc Zyngier { 1102015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1103015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1104015ec038SMarc Zyngier 1105adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1106c48ed51cSMarc Zyngier } 1107c48ed51cSMarc Zyngier 1108c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1109c48ed51cSMarc Zyngier { 1110015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1111015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1112015ec038SMarc Zyngier 1113adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1114c48ed51cSMarc Zyngier } 1115c48ed51cSMarc Zyngier 1116c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1117c48ed51cSMarc Zyngier bool force) 1118c48ed51cSMarc Zyngier { 1119fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1120fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1121c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1122c48ed51cSMarc Zyngier struct its_collection *target_col; 1123c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1124c48ed51cSMarc Zyngier 1125015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1126015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1127015ec038SMarc Zyngier return -EINVAL; 1128015ec038SMarc Zyngier 1129fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1130fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1131fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1132fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1133fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1134fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1135fbf8f40eSGanapatrao Kulkarni } 1136fbf8f40eSGanapatrao Kulkarni } 1137fbf8f40eSGanapatrao Kulkarni 1138fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1139fbf8f40eSGanapatrao Kulkarni 1140c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1141c48ed51cSMarc Zyngier return -EINVAL; 1142c48ed51cSMarc Zyngier 11438b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 11448b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1145c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1146c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1147591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 11480d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 11498b8d94a7SMaJun } 1150c48ed51cSMarc Zyngier 1151c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1152c48ed51cSMarc Zyngier } 1153c48ed51cSMarc Zyngier 1154558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1155558b0165SArd Biesheuvel { 1156558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1157558b0165SArd Biesheuvel 1158558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1159558b0165SArd Biesheuvel } 1160558b0165SArd Biesheuvel 1161b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1162b48ac83dSMarc Zyngier { 1163b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1164b48ac83dSMarc Zyngier struct its_node *its; 1165b48ac83dSMarc Zyngier u64 addr; 1166b48ac83dSMarc Zyngier 1167b48ac83dSMarc Zyngier its = its_dev->its; 1168558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1169b48ac83dSMarc Zyngier 1170b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1171b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1172b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 117344bb7e24SRobin Murphy 117444bb7e24SRobin Murphy iommu_dma_map_msi_msg(d->irq, msg); 1175b48ac83dSMarc Zyngier } 1176b48ac83dSMarc Zyngier 11778d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 11788d85dcedSMarc Zyngier enum irqchip_irq_state which, 11798d85dcedSMarc Zyngier bool state) 11808d85dcedSMarc Zyngier { 11818d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 11828d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 11838d85dcedSMarc Zyngier 11848d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 11858d85dcedSMarc Zyngier return -EINVAL; 11868d85dcedSMarc Zyngier 11878d85dcedSMarc Zyngier if (state) 11888d85dcedSMarc Zyngier its_send_int(its_dev, event); 11898d85dcedSMarc Zyngier else 11908d85dcedSMarc Zyngier its_send_clear(its_dev, event); 11918d85dcedSMarc Zyngier 11928d85dcedSMarc Zyngier return 0; 11938d85dcedSMarc Zyngier } 11948d85dcedSMarc Zyngier 11952247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 11962247e1bfSMarc Zyngier { 11972247e1bfSMarc Zyngier unsigned long flags; 11982247e1bfSMarc Zyngier 11992247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12002247e1bfSMarc Zyngier if (!its_list_map) 12012247e1bfSMarc Zyngier return; 12022247e1bfSMarc Zyngier 12032247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12042247e1bfSMarc Zyngier 12052247e1bfSMarc Zyngier /* 12062247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 12072247e1bfSMarc Zyngier * them mapped now. 12082247e1bfSMarc Zyngier */ 12092247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 12102247e1bfSMarc Zyngier 12112247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 12122247e1bfSMarc Zyngier int i; 12132247e1bfSMarc Zyngier 12142247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 12152247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 121644c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 12172247e1bfSMarc Zyngier 12182247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 12192247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 12202247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 12212247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 122244c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 12232247e1bfSMarc Zyngier } 12242247e1bfSMarc Zyngier } 12252247e1bfSMarc Zyngier 12262247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12272247e1bfSMarc Zyngier } 12282247e1bfSMarc Zyngier 12292247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 12302247e1bfSMarc Zyngier { 12312247e1bfSMarc Zyngier unsigned long flags; 12322247e1bfSMarc Zyngier 12332247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12342247e1bfSMarc Zyngier if (!its_list_map) 12352247e1bfSMarc Zyngier return; 12362247e1bfSMarc Zyngier 12372247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12382247e1bfSMarc Zyngier 12392247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 12402247e1bfSMarc Zyngier int i; 12412247e1bfSMarc Zyngier 12422247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 12432247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 12442247e1bfSMarc Zyngier } 12452247e1bfSMarc Zyngier 12462247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12472247e1bfSMarc Zyngier } 12482247e1bfSMarc Zyngier 1249d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1250d011e4e6SMarc Zyngier { 1251d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1252d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1253d011e4e6SMarc Zyngier int ret = 0; 1254d011e4e6SMarc Zyngier 1255d011e4e6SMarc Zyngier if (!info->map) 1256d011e4e6SMarc Zyngier return -EINVAL; 1257d011e4e6SMarc Zyngier 1258d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1259d011e4e6SMarc Zyngier 1260d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1261d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1262d011e4e6SMarc Zyngier 12636396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 1264d011e4e6SMarc Zyngier GFP_KERNEL); 1265d011e4e6SMarc Zyngier if (!maps) { 1266d011e4e6SMarc Zyngier ret = -ENOMEM; 1267d011e4e6SMarc Zyngier goto out; 1268d011e4e6SMarc Zyngier } 1269d011e4e6SMarc Zyngier 1270d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1271d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1272d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1273d011e4e6SMarc Zyngier ret = -EINVAL; 1274d011e4e6SMarc Zyngier goto out; 1275d011e4e6SMarc Zyngier } 1276d011e4e6SMarc Zyngier 1277d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1278d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1279d011e4e6SMarc Zyngier 1280d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1281d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1282d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1283d011e4e6SMarc Zyngier } else { 12842247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 12852247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 12862247e1bfSMarc Zyngier 1287d4d7b4adSMarc Zyngier /* 1288d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1289d4d7b4adSMarc Zyngier * start poking the virtual property table. 1290d4d7b4adSMarc Zyngier */ 1291d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1292d4d7b4adSMarc Zyngier 1293d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1294d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1295d4d7b4adSMarc Zyngier 1296d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1297d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1298d011e4e6SMarc Zyngier 1299d011e4e6SMarc Zyngier /* and install the virtual one */ 1300d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1301d011e4e6SMarc Zyngier 1302d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1303d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1304d011e4e6SMarc Zyngier } 1305d011e4e6SMarc Zyngier 1306d011e4e6SMarc Zyngier out: 1307d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1308d011e4e6SMarc Zyngier return ret; 1309d011e4e6SMarc Zyngier } 1310d011e4e6SMarc Zyngier 1311d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1312d011e4e6SMarc Zyngier { 1313d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1314d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1315d011e4e6SMarc Zyngier int ret = 0; 1316d011e4e6SMarc Zyngier 1317d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1318d011e4e6SMarc Zyngier 1319d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || 1320d011e4e6SMarc Zyngier !its_dev->event_map.vlpi_maps[event].vm) { 1321d011e4e6SMarc Zyngier ret = -EINVAL; 1322d011e4e6SMarc Zyngier goto out; 1323d011e4e6SMarc Zyngier } 1324d011e4e6SMarc Zyngier 1325d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1326d011e4e6SMarc Zyngier *info->map = its_dev->event_map.vlpi_maps[event]; 1327d011e4e6SMarc Zyngier 1328d011e4e6SMarc Zyngier out: 1329d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1330d011e4e6SMarc Zyngier return ret; 1331d011e4e6SMarc Zyngier } 1332d011e4e6SMarc Zyngier 1333d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1334d011e4e6SMarc Zyngier { 1335d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1336d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1337d011e4e6SMarc Zyngier int ret = 0; 1338d011e4e6SMarc Zyngier 1339d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1340d011e4e6SMarc Zyngier 1341d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1342d011e4e6SMarc Zyngier ret = -EINVAL; 1343d011e4e6SMarc Zyngier goto out; 1344d011e4e6SMarc Zyngier } 1345d011e4e6SMarc Zyngier 1346d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1347d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1348d011e4e6SMarc Zyngier 1349d011e4e6SMarc Zyngier /* and restore the physical one */ 1350d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1351d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1352d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1353d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1354d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1355d011e4e6SMarc Zyngier 13562247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 13572247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 13582247e1bfSMarc Zyngier 1359d011e4e6SMarc Zyngier /* 1360d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1361d011e4e6SMarc Zyngier * this was the last VLPI. 1362d011e4e6SMarc Zyngier */ 1363d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1364d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1365d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1366d011e4e6SMarc Zyngier } 1367d011e4e6SMarc Zyngier 1368d011e4e6SMarc Zyngier out: 1369d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1370d011e4e6SMarc Zyngier return ret; 1371d011e4e6SMarc Zyngier } 1372d011e4e6SMarc Zyngier 1373015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1374015ec038SMarc Zyngier { 1375015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1376015ec038SMarc Zyngier 1377015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1378015ec038SMarc Zyngier return -EINVAL; 1379015ec038SMarc Zyngier 1380015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1381015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1382015ec038SMarc Zyngier else 1383015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1384015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1385015ec038SMarc Zyngier 1386015ec038SMarc Zyngier return 0; 1387015ec038SMarc Zyngier } 1388015ec038SMarc Zyngier 1389c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1390c808eea8SMarc Zyngier { 1391c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1392c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1393c808eea8SMarc Zyngier 1394c808eea8SMarc Zyngier /* Need a v4 ITS */ 1395d011e4e6SMarc Zyngier if (!its_dev->its->is_v4) 1396c808eea8SMarc Zyngier return -EINVAL; 1397c808eea8SMarc Zyngier 1398d011e4e6SMarc Zyngier /* Unmap request? */ 1399d011e4e6SMarc Zyngier if (!info) 1400d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1401d011e4e6SMarc Zyngier 1402c808eea8SMarc Zyngier switch (info->cmd_type) { 1403c808eea8SMarc Zyngier case MAP_VLPI: 1404d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1405c808eea8SMarc Zyngier 1406c808eea8SMarc Zyngier case GET_VLPI: 1407d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1408c808eea8SMarc Zyngier 1409c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1410c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1411015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1412c808eea8SMarc Zyngier 1413c808eea8SMarc Zyngier default: 1414c808eea8SMarc Zyngier return -EINVAL; 1415c808eea8SMarc Zyngier } 1416c808eea8SMarc Zyngier } 1417c808eea8SMarc Zyngier 1418c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1419c48ed51cSMarc Zyngier .name = "ITS", 1420c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1421c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1422004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1423c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1424b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 14258d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1426c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1427b48ac83dSMarc Zyngier }; 1428b48ac83dSMarc Zyngier 1429880cb3cdSMarc Zyngier 1430bf9529f8SMarc Zyngier /* 1431bf9529f8SMarc Zyngier * How we allocate LPIs: 1432bf9529f8SMarc Zyngier * 1433880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1434880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1435880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1436880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1437bf9529f8SMarc Zyngier * 1438880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1439880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1440880cb3cdSMarc Zyngier * already free block. 1441880cb3cdSMarc Zyngier * 1442880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1443880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1444880cb3cdSMarc Zyngier */ 14454cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1446880cb3cdSMarc Zyngier 1447880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 1448880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 1449bf9529f8SMarc Zyngier 1450880cb3cdSMarc Zyngier struct lpi_range { 1451880cb3cdSMarc Zyngier struct list_head entry; 1452880cb3cdSMarc Zyngier u32 base_id; 1453880cb3cdSMarc Zyngier u32 span; 1454880cb3cdSMarc Zyngier }; 1455880cb3cdSMarc Zyngier 1456880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 1457bf9529f8SMarc Zyngier { 1458880cb3cdSMarc Zyngier struct lpi_range *range; 1459880cb3cdSMarc Zyngier 1460880cb3cdSMarc Zyngier range = kzalloc(sizeof(*range), GFP_KERNEL); 1461880cb3cdSMarc Zyngier if (range) { 1462880cb3cdSMarc Zyngier INIT_LIST_HEAD(&range->entry); 1463880cb3cdSMarc Zyngier range->base_id = base; 1464880cb3cdSMarc Zyngier range->span = span; 1465bf9529f8SMarc Zyngier } 1466bf9529f8SMarc Zyngier 1467880cb3cdSMarc Zyngier return range; 1468880cb3cdSMarc Zyngier } 1469880cb3cdSMarc Zyngier 1470880cb3cdSMarc Zyngier static int lpi_range_cmp(void *priv, struct list_head *a, struct list_head *b) 1471bf9529f8SMarc Zyngier { 1472880cb3cdSMarc Zyngier struct lpi_range *ra, *rb; 1473880cb3cdSMarc Zyngier 1474880cb3cdSMarc Zyngier ra = container_of(a, struct lpi_range, entry); 1475880cb3cdSMarc Zyngier rb = container_of(b, struct lpi_range, entry); 1476880cb3cdSMarc Zyngier 1477880cb3cdSMarc Zyngier return rb->base_id - ra->base_id; 1478880cb3cdSMarc Zyngier } 1479880cb3cdSMarc Zyngier 1480880cb3cdSMarc Zyngier static void merge_lpi_ranges(void) 1481880cb3cdSMarc Zyngier { 1482880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1483880cb3cdSMarc Zyngier 1484880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1485880cb3cdSMarc Zyngier if (!list_is_last(&range->entry, &lpi_range_list) && 1486880cb3cdSMarc Zyngier (tmp->base_id == (range->base_id + range->span))) { 1487880cb3cdSMarc Zyngier tmp->base_id = range->base_id; 1488880cb3cdSMarc Zyngier tmp->span += range->span; 1489880cb3cdSMarc Zyngier list_del(&range->entry); 1490880cb3cdSMarc Zyngier kfree(range); 1491880cb3cdSMarc Zyngier } 1492880cb3cdSMarc Zyngier } 1493880cb3cdSMarc Zyngier } 1494880cb3cdSMarc Zyngier 1495880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 1496880cb3cdSMarc Zyngier { 1497880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1498880cb3cdSMarc Zyngier int err = -ENOSPC; 1499880cb3cdSMarc Zyngier 1500880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1501880cb3cdSMarc Zyngier 1502880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1503880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 1504880cb3cdSMarc Zyngier *base = range->base_id; 1505880cb3cdSMarc Zyngier range->base_id += nr_lpis; 1506880cb3cdSMarc Zyngier range->span -= nr_lpis; 1507880cb3cdSMarc Zyngier 1508880cb3cdSMarc Zyngier if (range->span == 0) { 1509880cb3cdSMarc Zyngier list_del(&range->entry); 1510880cb3cdSMarc Zyngier kfree(range); 1511880cb3cdSMarc Zyngier } 1512880cb3cdSMarc Zyngier 1513880cb3cdSMarc Zyngier err = 0; 1514880cb3cdSMarc Zyngier break; 1515880cb3cdSMarc Zyngier } 1516880cb3cdSMarc Zyngier } 1517880cb3cdSMarc Zyngier 1518880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1519880cb3cdSMarc Zyngier 1520880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 1521880cb3cdSMarc Zyngier return err; 1522880cb3cdSMarc Zyngier } 1523880cb3cdSMarc Zyngier 1524880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 1525880cb3cdSMarc Zyngier { 1526880cb3cdSMarc Zyngier struct lpi_range *new; 1527880cb3cdSMarc Zyngier int err = 0; 1528880cb3cdSMarc Zyngier 1529880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1530880cb3cdSMarc Zyngier 1531880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 1532880cb3cdSMarc Zyngier if (!new) { 1533880cb3cdSMarc Zyngier err = -ENOMEM; 1534880cb3cdSMarc Zyngier goto out; 1535880cb3cdSMarc Zyngier } 1536880cb3cdSMarc Zyngier 1537880cb3cdSMarc Zyngier list_add(&new->entry, &lpi_range_list); 1538880cb3cdSMarc Zyngier list_sort(NULL, &lpi_range_list, lpi_range_cmp); 1539880cb3cdSMarc Zyngier merge_lpi_ranges(); 1540880cb3cdSMarc Zyngier out: 1541880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1542880cb3cdSMarc Zyngier return err; 1543bf9529f8SMarc Zyngier } 1544bf9529f8SMarc Zyngier 154504a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1546bf9529f8SMarc Zyngier { 1547880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 154812b2905aSMarc Zyngier u32 numlpis; 1549880cb3cdSMarc Zyngier int err; 1550bf9529f8SMarc Zyngier 155112b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 155212b2905aSMarc Zyngier 155312b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 155412b2905aSMarc Zyngier lpis = numlpis; 155512b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 155612b2905aSMarc Zyngier lpis); 155712b2905aSMarc Zyngier } 155812b2905aSMarc Zyngier 1559880cb3cdSMarc Zyngier /* 1560880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 1561880cb3cdSMarc Zyngier * full range of LPIs. 1562880cb3cdSMarc Zyngier */ 1563880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 1564880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 1565880cb3cdSMarc Zyngier return err; 1566bf9529f8SMarc Zyngier } 1567bf9529f8SMarc Zyngier 156838dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 1569bf9529f8SMarc Zyngier { 1570bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1571880cb3cdSMarc Zyngier int err = 0; 1572bf9529f8SMarc Zyngier 1573bf9529f8SMarc Zyngier do { 157438dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 1575880cb3cdSMarc Zyngier if (!err) 1576bf9529f8SMarc Zyngier break; 1577bf9529f8SMarc Zyngier 157838dd7c49SMarc Zyngier nr_irqs /= 2; 157938dd7c49SMarc Zyngier } while (nr_irqs > 0); 1580bf9529f8SMarc Zyngier 1581880cb3cdSMarc Zyngier if (err) 1582bf9529f8SMarc Zyngier goto out; 1583bf9529f8SMarc Zyngier 158438dd7c49SMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_irqs), sizeof (long), GFP_ATOMIC); 1585bf9529f8SMarc Zyngier if (!bitmap) 1586bf9529f8SMarc Zyngier goto out; 1587bf9529f8SMarc Zyngier 158838dd7c49SMarc Zyngier *nr_ids = nr_irqs; 1589bf9529f8SMarc Zyngier 1590bf9529f8SMarc Zyngier out: 1591c8415b94SMarc Zyngier if (!bitmap) 1592c8415b94SMarc Zyngier *base = *nr_ids = 0; 1593c8415b94SMarc Zyngier 1594bf9529f8SMarc Zyngier return bitmap; 1595bf9529f8SMarc Zyngier } 1596bf9529f8SMarc Zyngier 159738dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 1598bf9529f8SMarc Zyngier { 1599880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 1600cf2be8baSMarc Zyngier kfree(bitmap); 1601bf9529f8SMarc Zyngier } 16021ac19ca6SMarc Zyngier 1603053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 1604053be485SMarc Zyngier { 1605053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 1606053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 1607053be485SMarc Zyngier 1608053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 1609053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 1610053be485SMarc Zyngier } 1611053be485SMarc Zyngier 16120e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 16130e5ccf91SMarc Zyngier { 16140e5ccf91SMarc Zyngier struct page *prop_page; 16151ac19ca6SMarc Zyngier 16160e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 16170e5ccf91SMarc Zyngier if (!prop_page) 16180e5ccf91SMarc Zyngier return NULL; 16190e5ccf91SMarc Zyngier 1620053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 16210e5ccf91SMarc Zyngier 16220e5ccf91SMarc Zyngier return prop_page; 16230e5ccf91SMarc Zyngier } 16240e5ccf91SMarc Zyngier 16257d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 16267d75bbb4SMarc Zyngier { 16277d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 16287d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 16297d75bbb4SMarc Zyngier } 16301ac19ca6SMarc Zyngier 163111e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 16321ac19ca6SMarc Zyngier { 1633c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 1634c440a9d9SMarc Zyngier u64 val; 1635c440a9d9SMarc Zyngier 1636c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 1637c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 1638c440a9d9SMarc Zyngier 1639c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 1640c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 1641c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 1642c440a9d9SMarc Zyngier MEMREMAP_WB); 1643c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 1644c440a9d9SMarc Zyngier } else { 1645e1a2e201SMarc Zyngier struct page *page; 16461ac19ca6SMarc Zyngier 1647c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 1648c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 16494cb205c0SJia He ITS_MAX_LPI_NRBITS); 1650e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 1651e1a2e201SMarc Zyngier if (!page) { 16521ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 16531ac19ca6SMarc Zyngier return -ENOMEM; 16541ac19ca6SMarc Zyngier } 16551ac19ca6SMarc Zyngier 1656e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 1657e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 1658c440a9d9SMarc Zyngier } 1659e1a2e201SMarc Zyngier 1660e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 1661e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 16621ac19ca6SMarc Zyngier 16636c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 16641ac19ca6SMarc Zyngier } 16651ac19ca6SMarc Zyngier 16661ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 16671ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 16681ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 16694f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 16701ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 16711ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 16721ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 16731ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 16741ac19ca6SMarc Zyngier }; 16751ac19ca6SMarc Zyngier 16762d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 16772d81d425SShanker Donthineni { 16782d81d425SShanker Donthineni u32 idx = baser - its->tables; 16792d81d425SShanker Donthineni 16800968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 16812d81d425SShanker Donthineni } 16822d81d425SShanker Donthineni 16832d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 16842d81d425SShanker Donthineni u64 val) 16852d81d425SShanker Donthineni { 16862d81d425SShanker Donthineni u32 idx = baser - its->tables; 16872d81d425SShanker Donthineni 16880968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 16892d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 16902d81d425SShanker Donthineni } 16912d81d425SShanker Donthineni 16929347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 16933faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 16943faf24eaSShanker Donthineni bool indirect) 16959347359aSShanker Donthineni { 16969347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 16979347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 16989347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 169930ae9610SShanker Donthineni u64 baser_phys, tmp; 17009347359aSShanker Donthineni u32 alloc_pages; 17019347359aSShanker Donthineni void *base; 17029347359aSShanker Donthineni 17039347359aSShanker Donthineni retry_alloc_baser: 17049347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 17059347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 17069347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 17079347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 17089347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 17099347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 17109347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 17119347359aSShanker Donthineni } 17129347359aSShanker Donthineni 17139347359aSShanker Donthineni base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 17149347359aSShanker Donthineni if (!base) 17159347359aSShanker Donthineni return -ENOMEM; 17169347359aSShanker Donthineni 171730ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 171830ae9610SShanker Donthineni 171930ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 172030ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 172130ae9610SShanker Donthineni 172230ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 172330ae9610SShanker Donthineni if (psz != SZ_64K) { 172430ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 172530ae9610SShanker Donthineni free_pages((unsigned long)base, order); 172630ae9610SShanker Donthineni return -ENXIO; 172730ae9610SShanker Donthineni } 172830ae9610SShanker Donthineni 172930ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 173030ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 173130ae9610SShanker Donthineni } 173230ae9610SShanker Donthineni 17339347359aSShanker Donthineni retry_baser: 173430ae9610SShanker Donthineni val = (baser_phys | 17359347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 17369347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 17379347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 17389347359aSShanker Donthineni cache | 17399347359aSShanker Donthineni shr | 17409347359aSShanker Donthineni GITS_BASER_VALID); 17419347359aSShanker Donthineni 17423faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 17433faf24eaSShanker Donthineni 17449347359aSShanker Donthineni switch (psz) { 17459347359aSShanker Donthineni case SZ_4K: 17469347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 17479347359aSShanker Donthineni break; 17489347359aSShanker Donthineni case SZ_16K: 17499347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 17509347359aSShanker Donthineni break; 17519347359aSShanker Donthineni case SZ_64K: 17529347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 17539347359aSShanker Donthineni break; 17549347359aSShanker Donthineni } 17559347359aSShanker Donthineni 17569347359aSShanker Donthineni its_write_baser(its, baser, val); 17579347359aSShanker Donthineni tmp = baser->val; 17589347359aSShanker Donthineni 17599347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 17609347359aSShanker Donthineni /* 17619347359aSShanker Donthineni * Shareability didn't stick. Just use 17629347359aSShanker Donthineni * whatever the read reported, which is likely 17639347359aSShanker Donthineni * to be the only thing this redistributor 17649347359aSShanker Donthineni * supports. If that's zero, make it 17659347359aSShanker Donthineni * non-cacheable as well. 17669347359aSShanker Donthineni */ 17679347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 17689347359aSShanker Donthineni if (!shr) { 17699347359aSShanker Donthineni cache = GITS_BASER_nC; 1770328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 17719347359aSShanker Donthineni } 17729347359aSShanker Donthineni goto retry_baser; 17739347359aSShanker Donthineni } 17749347359aSShanker Donthineni 17759347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 17769347359aSShanker Donthineni /* 17779347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 17789347359aSShanker Donthineni * size and retry. If we reach 4K, then 17799347359aSShanker Donthineni * something is horribly wrong... 17809347359aSShanker Donthineni */ 17819347359aSShanker Donthineni free_pages((unsigned long)base, order); 17829347359aSShanker Donthineni baser->base = NULL; 17839347359aSShanker Donthineni 17849347359aSShanker Donthineni switch (psz) { 17859347359aSShanker Donthineni case SZ_16K: 17869347359aSShanker Donthineni psz = SZ_4K; 17879347359aSShanker Donthineni goto retry_alloc_baser; 17889347359aSShanker Donthineni case SZ_64K: 17899347359aSShanker Donthineni psz = SZ_16K; 17909347359aSShanker Donthineni goto retry_alloc_baser; 17919347359aSShanker Donthineni } 17929347359aSShanker Donthineni } 17939347359aSShanker Donthineni 17949347359aSShanker Donthineni if (val != tmp) { 1795b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 17969347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1797b11283ebSVladimir Murzin val, tmp); 17989347359aSShanker Donthineni free_pages((unsigned long)base, order); 17999347359aSShanker Donthineni return -ENXIO; 18009347359aSShanker Donthineni } 18019347359aSShanker Donthineni 18029347359aSShanker Donthineni baser->order = order; 18039347359aSShanker Donthineni baser->base = base; 18049347359aSShanker Donthineni baser->psz = psz; 18053faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 18069347359aSShanker Donthineni 18073faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1808d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 18099347359aSShanker Donthineni its_base_type_string[type], 18109347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 18113faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 18129347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 18139347359aSShanker Donthineni 18149347359aSShanker Donthineni return 0; 18159347359aSShanker Donthineni } 18169347359aSShanker Donthineni 18174cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 18184cacac57SMarc Zyngier struct its_baser *baser, 181932bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 18204b75c459SShanker Donthineni { 18214cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 18224cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 18234cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 18242fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 18254b75c459SShanker Donthineni u32 new_order = *order; 18263faf24eaSShanker Donthineni bool indirect = false; 18273faf24eaSShanker Donthineni 18283faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 18293faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 18303faf24eaSShanker Donthineni /* 18313faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 18323faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 18333faf24eaSShanker Donthineni */ 18343faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 18353faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 18363faf24eaSShanker Donthineni 18373faf24eaSShanker Donthineni if (indirect) { 18383faf24eaSShanker Donthineni /* 18393faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 18403faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 18413faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 18423faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 18433faf24eaSShanker Donthineni * entry size. 18443faf24eaSShanker Donthineni */ 1845d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 18463faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 18473faf24eaSShanker Donthineni } 18483faf24eaSShanker Donthineni } 18494b75c459SShanker Donthineni 18504b75c459SShanker Donthineni /* 18514b75c459SShanker Donthineni * Allocate as many entries as required to fit the 18524b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 18534b75c459SShanker Donthineni * space being incredibly sparse, this results in a 18543faf24eaSShanker Donthineni * massive waste of memory if two-level device table 18553faf24eaSShanker Donthineni * feature is not supported by hardware. 18564b75c459SShanker Donthineni */ 18574b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 18584b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 18594b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1860d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 18614cacac57SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %u->%u\n", 18624cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 18634cacac57SMarc Zyngier its->device_ids, ids); 18644b75c459SShanker Donthineni } 18654b75c459SShanker Donthineni 18664b75c459SShanker Donthineni *order = new_order; 18673faf24eaSShanker Donthineni 18683faf24eaSShanker Donthineni return indirect; 18694b75c459SShanker Donthineni } 18704b75c459SShanker Donthineni 18711ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 18721ac19ca6SMarc Zyngier { 18731ac19ca6SMarc Zyngier int i; 18741ac19ca6SMarc Zyngier 18751ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 18761a485f4dSShanker Donthineni if (its->tables[i].base) { 18771a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 18781a485f4dSShanker Donthineni its->tables[i].order); 18791a485f4dSShanker Donthineni its->tables[i].base = NULL; 18801ac19ca6SMarc Zyngier } 18811ac19ca6SMarc Zyngier } 18821ac19ca6SMarc Zyngier } 18831ac19ca6SMarc Zyngier 18840e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 18851ac19ca6SMarc Zyngier { 18861ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 18872fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 18889347359aSShanker Donthineni u32 psz = SZ_64K; 18899347359aSShanker Donthineni int err, i; 189094100970SRobert Richter 1891fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 1892fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 18939347359aSShanker Donthineni cache = GITS_BASER_nCnB; 1894466b7d16SShanker Donthineni 18951ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 18962d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 18972d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 18981ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 18999347359aSShanker Donthineni u32 order = get_order(psz); 19003faf24eaSShanker Donthineni bool indirect = false; 19011ac19ca6SMarc Zyngier 19024cacac57SMarc Zyngier switch (type) { 19034cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 19041ac19ca6SMarc Zyngier continue; 19051ac19ca6SMarc Zyngier 19064cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 190732bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 190832bd44dcSShanker Donthineni psz, &order, 190932bd44dcSShanker Donthineni its->device_ids); 19104cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 19114cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 191232bd44dcSShanker Donthineni psz, &order, 191332bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 19144cacac57SMarc Zyngier break; 19154cacac57SMarc Zyngier } 1916f54b97edSMarc Zyngier 19173faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 19189347359aSShanker Donthineni if (err < 0) { 19199347359aSShanker Donthineni its_free_tables(its); 19209347359aSShanker Donthineni return err; 192130f21363SRobert Richter } 192230f21363SRobert Richter 19239347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 19249347359aSShanker Donthineni psz = baser->psz; 19259347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 19269347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 19271ac19ca6SMarc Zyngier } 19281ac19ca6SMarc Zyngier 19291ac19ca6SMarc Zyngier return 0; 19301ac19ca6SMarc Zyngier } 19311ac19ca6SMarc Zyngier 19321ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 19331ac19ca6SMarc Zyngier { 193483559b47SMarc Zyngier int i; 193583559b47SMarc Zyngier 19366396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 19371ac19ca6SMarc Zyngier GFP_KERNEL); 19381ac19ca6SMarc Zyngier if (!its->collections) 19391ac19ca6SMarc Zyngier return -ENOMEM; 19401ac19ca6SMarc Zyngier 194183559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 194283559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 194383559b47SMarc Zyngier 19441ac19ca6SMarc Zyngier return 0; 19451ac19ca6SMarc Zyngier } 19461ac19ca6SMarc Zyngier 19477c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 19487c297a2dSMarc Zyngier { 19497c297a2dSMarc Zyngier struct page *pend_page; 1950adaab500SMarc Zyngier 19517c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 1952adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 19537c297a2dSMarc Zyngier if (!pend_page) 19547c297a2dSMarc Zyngier return NULL; 19557c297a2dSMarc Zyngier 19567c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 19577c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 19587c297a2dSMarc Zyngier 19597c297a2dSMarc Zyngier return pend_page; 19607c297a2dSMarc Zyngier } 19617c297a2dSMarc Zyngier 19627d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 19637d75bbb4SMarc Zyngier { 1964adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 19657d75bbb4SMarc Zyngier } 19667d75bbb4SMarc Zyngier 1967c6e2ccb6SMarc Zyngier /* 1968c6e2ccb6SMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. 1969c6e2ccb6SMarc Zyngier */ 1970c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 1971c440a9d9SMarc Zyngier { 1972c6e2ccb6SMarc Zyngier /* Allow a kdump kernel */ 1973c6e2ccb6SMarc Zyngier if (is_kdump_kernel()) 1974c6e2ccb6SMarc Zyngier return true; 1975c6e2ccb6SMarc Zyngier 1976c440a9d9SMarc Zyngier return false; 1977c440a9d9SMarc Zyngier } 1978c440a9d9SMarc Zyngier 197911e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 198011e37d35SMarc Zyngier { 1981c440a9d9SMarc Zyngier u64 val; 198211e37d35SMarc Zyngier int err, cpu; 198311e37d35SMarc Zyngier 1984c440a9d9SMarc Zyngier /* 1985c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 1986c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 1987c440a9d9SMarc Zyngier */ 1988c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 1989c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 1990c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 1991c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 1992c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 1993c440a9d9SMarc Zyngier } 1994c440a9d9SMarc Zyngier 199511e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 199611e37d35SMarc Zyngier if (err) 199711e37d35SMarc Zyngier return err; 199811e37d35SMarc Zyngier 199911e37d35SMarc Zyngier /* 200011e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 200111e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 200211e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 200311e37d35SMarc Zyngier */ 200411e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 200511e37d35SMarc Zyngier struct page *pend_page; 200611e37d35SMarc Zyngier 200711e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 200811e37d35SMarc Zyngier if (!pend_page) { 200911e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 201011e37d35SMarc Zyngier return -ENOMEM; 201111e37d35SMarc Zyngier } 201211e37d35SMarc Zyngier 201311e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 201411e37d35SMarc Zyngier } 201511e37d35SMarc Zyngier 201611e37d35SMarc Zyngier return 0; 201711e37d35SMarc Zyngier } 201811e37d35SMarc Zyngier 20191ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 20201ac19ca6SMarc Zyngier { 20211ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 20221ac19ca6SMarc Zyngier struct page *pend_page; 202311e37d35SMarc Zyngier phys_addr_t paddr; 20241ac19ca6SMarc Zyngier u64 val, tmp; 20251ac19ca6SMarc Zyngier 202611e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 20271ac19ca6SMarc Zyngier return; 20281ac19ca6SMarc Zyngier 2029c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 2030c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 2031c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 2032c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2033c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 2034c440a9d9SMarc Zyngier 2035c440a9d9SMarc Zyngier its_free_pending_table(gic_data_rdist()->pend_page); 2036c440a9d9SMarc Zyngier gic_data_rdist()->pend_page = NULL; 2037c440a9d9SMarc Zyngier 2038c440a9d9SMarc Zyngier goto out; 2039c440a9d9SMarc Zyngier } 2040c440a9d9SMarc Zyngier 204111e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 20421ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 20431ac19ca6SMarc Zyngier 20441ac19ca6SMarc Zyngier /* set PROPBASE */ 2045e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 20461ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 20472fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 20481ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 20491ac19ca6SMarc Zyngier 20500968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 20510968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 20521ac19ca6SMarc Zyngier 20531ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 2054241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 2055241a386cSMarc Zyngier /* 2056241a386cSMarc Zyngier * The HW reports non-shareable, we must 2057241a386cSMarc Zyngier * remove the cacheability attributes as 2058241a386cSMarc Zyngier * well. 2059241a386cSMarc Zyngier */ 2060241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 2061241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 2062241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 20630968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 2064241a386cSMarc Zyngier } 20651ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 20661ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 20671ac19ca6SMarc Zyngier } 20681ac19ca6SMarc Zyngier 20691ac19ca6SMarc Zyngier /* set PENDBASE */ 20701ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 20714ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 20722fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 20731ac19ca6SMarc Zyngier 20740968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 20750968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2076241a386cSMarc Zyngier 2077241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 2078241a386cSMarc Zyngier /* 2079241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 2080241a386cSMarc Zyngier * cacheability attributes as well. 2081241a386cSMarc Zyngier */ 2082241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 2083241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 2084241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 20850968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 2086241a386cSMarc Zyngier } 20871ac19ca6SMarc Zyngier 20881ac19ca6SMarc Zyngier /* Enable LPIs */ 20891ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 20901ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 20911ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 20921ac19ca6SMarc Zyngier 20931ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 20941ac19ca6SMarc Zyngier dsb(sy); 2095c440a9d9SMarc Zyngier out: 209611e37d35SMarc Zyngier gic_data_rdist()->lpi_enabled = true; 2097c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 209811e37d35SMarc Zyngier smp_processor_id(), 2099c440a9d9SMarc Zyngier gic_data_rdist()->pend_page ? "allocated" : "reserved", 210011e37d35SMarc Zyngier &paddr); 21011ac19ca6SMarc Zyngier } 21021ac19ca6SMarc Zyngier 2103920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 21041ac19ca6SMarc Zyngier { 2105920181ceSDerek Basehore int cpu = smp_processor_id(); 21061ac19ca6SMarc Zyngier u64 target; 21071ac19ca6SMarc Zyngier 2108fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 2109fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 2110fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 2111fbf8f40eSGanapatrao Kulkarni 2112fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 2113fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 2114fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 2115920181ceSDerek Basehore return; 2116fbf8f40eSGanapatrao Kulkarni } 2117fbf8f40eSGanapatrao Kulkarni 21181ac19ca6SMarc Zyngier /* 21191ac19ca6SMarc Zyngier * We now have to bind each collection to its target 21201ac19ca6SMarc Zyngier * redistributor. 21211ac19ca6SMarc Zyngier */ 2122589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 21231ac19ca6SMarc Zyngier /* 21241ac19ca6SMarc Zyngier * This ITS wants the physical address of the 21251ac19ca6SMarc Zyngier * redistributor. 21261ac19ca6SMarc Zyngier */ 21271ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 21281ac19ca6SMarc Zyngier } else { 2129920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 2130589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 2131263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 21321ac19ca6SMarc Zyngier } 21331ac19ca6SMarc Zyngier 21341ac19ca6SMarc Zyngier /* Perform collection mapping */ 21351ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 21361ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 21371ac19ca6SMarc Zyngier 21381ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 21391ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 21401ac19ca6SMarc Zyngier } 21411ac19ca6SMarc Zyngier 2142920181ceSDerek Basehore static void its_cpu_init_collections(void) 2143920181ceSDerek Basehore { 2144920181ceSDerek Basehore struct its_node *its; 2145920181ceSDerek Basehore 2146a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 2147920181ceSDerek Basehore 2148920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 2149920181ceSDerek Basehore its_cpu_init_collection(its); 2150920181ceSDerek Basehore 2151a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 21521ac19ca6SMarc Zyngier } 215384a6a2e7SMarc Zyngier 215484a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 215584a6a2e7SMarc Zyngier { 215684a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 21573e39e8f5SMarc Zyngier unsigned long flags; 215884a6a2e7SMarc Zyngier 21593e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 216084a6a2e7SMarc Zyngier 216184a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 216284a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 216384a6a2e7SMarc Zyngier its_dev = tmp; 216484a6a2e7SMarc Zyngier break; 216584a6a2e7SMarc Zyngier } 216684a6a2e7SMarc Zyngier } 216784a6a2e7SMarc Zyngier 21683e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 216984a6a2e7SMarc Zyngier 217084a6a2e7SMarc Zyngier return its_dev; 217184a6a2e7SMarc Zyngier } 217284a6a2e7SMarc Zyngier 2173466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 2174466b7d16SShanker Donthineni { 2175466b7d16SShanker Donthineni int i; 2176466b7d16SShanker Donthineni 2177466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 2178466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 2179466b7d16SShanker Donthineni return &its->tables[i]; 2180466b7d16SShanker Donthineni } 2181466b7d16SShanker Donthineni 2182466b7d16SShanker Donthineni return NULL; 2183466b7d16SShanker Donthineni } 2184466b7d16SShanker Donthineni 218570cc81edSMarc Zyngier static bool its_alloc_table_entry(struct its_baser *baser, u32 id) 21863faf24eaSShanker Donthineni { 21873faf24eaSShanker Donthineni struct page *page; 21883faf24eaSShanker Donthineni u32 esz, idx; 21893faf24eaSShanker Donthineni __le64 *table; 21903faf24eaSShanker Donthineni 21913faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 21923faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 21933faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 219470cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 21953faf24eaSShanker Donthineni 21963faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 219770cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 21983faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 21993faf24eaSShanker Donthineni return false; 22003faf24eaSShanker Donthineni 22013faf24eaSShanker Donthineni table = baser->base; 22023faf24eaSShanker Donthineni 22033faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 22043faf24eaSShanker Donthineni if (!table[idx]) { 22053faf24eaSShanker Donthineni page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(baser->psz)); 22063faf24eaSShanker Donthineni if (!page) 22073faf24eaSShanker Donthineni return false; 22083faf24eaSShanker Donthineni 22093faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 22103faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2211328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 22123faf24eaSShanker Donthineni 22133faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 22143faf24eaSShanker Donthineni 22153faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 22163faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2217328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 22183faf24eaSShanker Donthineni 22193faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 22203faf24eaSShanker Donthineni dsb(sy); 22213faf24eaSShanker Donthineni } 22223faf24eaSShanker Donthineni 22233faf24eaSShanker Donthineni return true; 22243faf24eaSShanker Donthineni } 22253faf24eaSShanker Donthineni 222670cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 222770cc81edSMarc Zyngier { 222870cc81edSMarc Zyngier struct its_baser *baser; 222970cc81edSMarc Zyngier 223070cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 223170cc81edSMarc Zyngier 223270cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 223370cc81edSMarc Zyngier if (!baser) 223470cc81edSMarc Zyngier return (ilog2(dev_id) < its->device_ids); 223570cc81edSMarc Zyngier 223670cc81edSMarc Zyngier return its_alloc_table_entry(baser, dev_id); 223770cc81edSMarc Zyngier } 223870cc81edSMarc Zyngier 22397d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 22407d75bbb4SMarc Zyngier { 22417d75bbb4SMarc Zyngier struct its_node *its; 22427d75bbb4SMarc Zyngier 22437d75bbb4SMarc Zyngier /* 22447d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 22457d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 22467d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 22477d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 22487d75bbb4SMarc Zyngier * anyway, right?). 22497d75bbb4SMarc Zyngier */ 22507d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 22517d75bbb4SMarc Zyngier struct its_baser *baser; 22527d75bbb4SMarc Zyngier 22537d75bbb4SMarc Zyngier if (!its->is_v4) 22547d75bbb4SMarc Zyngier continue; 22557d75bbb4SMarc Zyngier 22567d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 22577d75bbb4SMarc Zyngier if (!baser) 22587d75bbb4SMarc Zyngier return false; 22597d75bbb4SMarc Zyngier 22607d75bbb4SMarc Zyngier if (!its_alloc_table_entry(baser, vpe_id)) 22617d75bbb4SMarc Zyngier return false; 22627d75bbb4SMarc Zyngier } 22637d75bbb4SMarc Zyngier 22647d75bbb4SMarc Zyngier return true; 22657d75bbb4SMarc Zyngier } 22667d75bbb4SMarc Zyngier 226784a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 226893f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 226984a6a2e7SMarc Zyngier { 227084a6a2e7SMarc Zyngier struct its_device *dev; 227193f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 22723e39e8f5SMarc Zyngier unsigned long flags; 2273591e5becSMarc Zyngier u16 *col_map = NULL; 227484a6a2e7SMarc Zyngier void *itt; 227584a6a2e7SMarc Zyngier int lpi_base; 227684a6a2e7SMarc Zyngier int nr_lpis; 2277c8481267SMarc Zyngier int nr_ites; 227884a6a2e7SMarc Zyngier int sz; 227984a6a2e7SMarc Zyngier 22803faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2281466b7d16SShanker Donthineni return NULL; 2282466b7d16SShanker Donthineni 2283147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 2284147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 2285147c8f37SMarc Zyngier 228684a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2287c8481267SMarc Zyngier /* 2288147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 2289147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 2290c8481267SMarc Zyngier */ 2291147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 2292c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 229384a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 22946c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 229593f94ea0SMarc Zyngier if (alloc_lpis) { 229638dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 2297591e5becSMarc Zyngier if (lpi_map) 22986396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 229993f94ea0SMarc Zyngier GFP_KERNEL); 230093f94ea0SMarc Zyngier } else { 23016396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 230293f94ea0SMarc Zyngier nr_lpis = 0; 230393f94ea0SMarc Zyngier lpi_base = 0; 230493f94ea0SMarc Zyngier } 230584a6a2e7SMarc Zyngier 230693f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 230784a6a2e7SMarc Zyngier kfree(dev); 230884a6a2e7SMarc Zyngier kfree(itt); 230984a6a2e7SMarc Zyngier kfree(lpi_map); 2310591e5becSMarc Zyngier kfree(col_map); 231184a6a2e7SMarc Zyngier return NULL; 231284a6a2e7SMarc Zyngier } 231384a6a2e7SMarc Zyngier 2314328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 23155a9a8915SMarc Zyngier 231684a6a2e7SMarc Zyngier dev->its = its; 231784a6a2e7SMarc Zyngier dev->itt = itt; 2318c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2319591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2320591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2321591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2322591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 2323d011e4e6SMarc Zyngier mutex_init(&dev->event_map.vlpi_lock); 232484a6a2e7SMarc Zyngier dev->device_id = dev_id; 232584a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 232684a6a2e7SMarc Zyngier 23273e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 232884a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 23293e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 233084a6a2e7SMarc Zyngier 233184a6a2e7SMarc Zyngier /* Map device to its ITT */ 233284a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 233384a6a2e7SMarc Zyngier 233484a6a2e7SMarc Zyngier return dev; 233584a6a2e7SMarc Zyngier } 233684a6a2e7SMarc Zyngier 233784a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 233884a6a2e7SMarc Zyngier { 23393e39e8f5SMarc Zyngier unsigned long flags; 23403e39e8f5SMarc Zyngier 23413e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 234284a6a2e7SMarc Zyngier list_del(&its_dev->entry); 23433e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 234484a6a2e7SMarc Zyngier kfree(its_dev->itt); 234584a6a2e7SMarc Zyngier kfree(its_dev); 234684a6a2e7SMarc Zyngier } 2347b48ac83dSMarc Zyngier 2348b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 2349b48ac83dSMarc Zyngier { 2350b48ac83dSMarc Zyngier int idx; 2351b48ac83dSMarc Zyngier 2352591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 2353591e5becSMarc Zyngier dev->event_map.nr_lpis); 2354591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 2355b48ac83dSMarc Zyngier return -ENOSPC; 2356b48ac83dSMarc Zyngier 2357591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 2358591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 2359b48ac83dSMarc Zyngier 2360b48ac83dSMarc Zyngier return 0; 2361b48ac83dSMarc Zyngier } 2362b48ac83dSMarc Zyngier 236354456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 2364b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 2365b48ac83dSMarc Zyngier { 2366b48ac83dSMarc Zyngier struct its_node *its; 2367b48ac83dSMarc Zyngier struct its_device *its_dev; 236854456db9SMarc Zyngier struct msi_domain_info *msi_info; 236954456db9SMarc Zyngier u32 dev_id; 2370b48ac83dSMarc Zyngier 237154456db9SMarc Zyngier /* 237254456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 237354456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 237454456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 237554456db9SMarc Zyngier * are built on top of the ITS. 237654456db9SMarc Zyngier */ 237754456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 237854456db9SMarc Zyngier 237954456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 238054456db9SMarc Zyngier its = msi_info->data; 238154456db9SMarc Zyngier 238220b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 238320b3d54eSMarc Zyngier vpe_proxy.dev && 238420b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 238520b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 238620b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 238720b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 238820b3d54eSMarc Zyngier dev_id); 238920b3d54eSMarc Zyngier return -EINVAL; 239020b3d54eSMarc Zyngier } 239120b3d54eSMarc Zyngier 2392f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 2393e8137f4fSMarc Zyngier if (its_dev) { 2394e8137f4fSMarc Zyngier /* 2395e8137f4fSMarc Zyngier * We already have seen this ID, probably through 2396e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 2397e8137f4fSMarc Zyngier * create the device. 2398e8137f4fSMarc Zyngier */ 2399f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 2400e8137f4fSMarc Zyngier goto out; 2401e8137f4fSMarc Zyngier } 2402b48ac83dSMarc Zyngier 240393f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 2404b48ac83dSMarc Zyngier if (!its_dev) 2405b48ac83dSMarc Zyngier return -ENOMEM; 2406b48ac83dSMarc Zyngier 2407f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 2408e8137f4fSMarc Zyngier out: 2409b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 2410b48ac83dSMarc Zyngier return 0; 2411b48ac83dSMarc Zyngier } 2412b48ac83dSMarc Zyngier 241354456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 241454456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 241554456db9SMarc Zyngier }; 241654456db9SMarc Zyngier 2417b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 2418b48ac83dSMarc Zyngier unsigned int virq, 2419b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 2420b48ac83dSMarc Zyngier { 2421f833f57fSMarc Zyngier struct irq_fwspec fwspec; 2422b48ac83dSMarc Zyngier 2423f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 2424f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 2425f833f57fSMarc Zyngier fwspec.param_count = 3; 2426f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 2427f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 2428f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 24293f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 24303f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 24313f010cf1STomasz Nowicki fwspec.param_count = 2; 24323f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 24333f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 2434f833f57fSMarc Zyngier } else { 2435f833f57fSMarc Zyngier return -EINVAL; 2436f833f57fSMarc Zyngier } 2437b48ac83dSMarc Zyngier 2438f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 2439b48ac83dSMarc Zyngier } 2440b48ac83dSMarc Zyngier 2441b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 2442b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 2443b48ac83dSMarc Zyngier { 2444b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 2445b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 2446b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 2447b48ac83dSMarc Zyngier int err; 2448b48ac83dSMarc Zyngier int i; 2449b48ac83dSMarc Zyngier 2450b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2451b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 2452b48ac83dSMarc Zyngier if (err) 2453b48ac83dSMarc Zyngier return err; 2454b48ac83dSMarc Zyngier 2455b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 2456b48ac83dSMarc Zyngier if (err) 2457b48ac83dSMarc Zyngier return err; 2458b48ac83dSMarc Zyngier 2459b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 2460b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 24610d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 2462f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 2463591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 2464591e5becSMarc Zyngier (int) hwirq, virq + i); 2465b48ac83dSMarc Zyngier } 2466b48ac83dSMarc Zyngier 2467b48ac83dSMarc Zyngier return 0; 2468b48ac83dSMarc Zyngier } 2469b48ac83dSMarc Zyngier 247072491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 2471702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2472aca268dfSMarc Zyngier { 2473aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2474aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2475fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 24760d224d35SMarc Zyngier int cpu; 2477fbf8f40eSGanapatrao Kulkarni 2478fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 2479fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 2480fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 2481aca268dfSMarc Zyngier 2482591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 2483c1797b11SYang Yingliang cpu = cpumask_first_and(cpu_mask, cpu_online_mask); 2484c1797b11SYang Yingliang if (cpu >= nr_cpu_ids) { 2485c1797b11SYang Yingliang if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) 2486c1797b11SYang Yingliang return -EINVAL; 2487c1797b11SYang Yingliang 2488c1797b11SYang Yingliang cpu = cpumask_first(cpu_online_mask); 2489c1797b11SYang Yingliang } 2490c1797b11SYang Yingliang 24910d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 24920d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 2493591e5becSMarc Zyngier 2494aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 24956a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 249672491643SThomas Gleixner return 0; 2497aca268dfSMarc Zyngier } 2498aca268dfSMarc Zyngier 2499aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 2500aca268dfSMarc Zyngier struct irq_data *d) 2501aca268dfSMarc Zyngier { 2502aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2503aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2504aca268dfSMarc Zyngier 2505aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 2506aca268dfSMarc Zyngier its_send_discard(its_dev, event); 2507aca268dfSMarc Zyngier } 2508aca268dfSMarc Zyngier 2509b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 2510b48ac83dSMarc Zyngier unsigned int nr_irqs) 2511b48ac83dSMarc Zyngier { 2512b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 2513b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2514b48ac83dSMarc Zyngier int i; 2515b48ac83dSMarc Zyngier 2516b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2517b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 2518b48ac83dSMarc Zyngier virq + i); 2519aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 2520b48ac83dSMarc Zyngier 2521b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 2522591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 2523b48ac83dSMarc Zyngier 2524b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 25252da39949SMarc Zyngier irq_domain_reset_irq_data(data); 2526b48ac83dSMarc Zyngier } 2527b48ac83dSMarc Zyngier 2528b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 2529591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 2530591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 253138dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 2532cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 2533cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 2534cf2be8baSMarc Zyngier kfree(its_dev->event_map.col_map); 2535b48ac83dSMarc Zyngier 2536b48ac83dSMarc Zyngier /* Unmap device/itt */ 2537b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 2538b48ac83dSMarc Zyngier its_free_device(its_dev); 2539b48ac83dSMarc Zyngier } 2540b48ac83dSMarc Zyngier 2541b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 2542b48ac83dSMarc Zyngier } 2543b48ac83dSMarc Zyngier 2544b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 2545b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 2546b48ac83dSMarc Zyngier .free = its_irq_domain_free, 2547aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 2548aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 2549b48ac83dSMarc Zyngier }; 25504c21f3c2SMarc Zyngier 255120b3d54eSMarc Zyngier /* 255220b3d54eSMarc Zyngier * This is insane. 255320b3d54eSMarc Zyngier * 255420b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 255520b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 255620b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 255720b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 255820b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 255920b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 256020b3d54eSMarc Zyngier * 256120b3d54eSMarc Zyngier * Broken by design(tm). 256220b3d54eSMarc Zyngier */ 256320b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 256420b3d54eSMarc Zyngier { 256520b3d54eSMarc Zyngier /* Already unmapped? */ 256620b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 256720b3d54eSMarc Zyngier return; 256820b3d54eSMarc Zyngier 256920b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 257020b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 257120b3d54eSMarc Zyngier 257220b3d54eSMarc Zyngier /* 257320b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 257420b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 257520b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 257620b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 257720b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 257820b3d54eSMarc Zyngier */ 257920b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 258020b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 258120b3d54eSMarc Zyngier 258220b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 258320b3d54eSMarc Zyngier } 258420b3d54eSMarc Zyngier 258520b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 258620b3d54eSMarc Zyngier { 258720b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 258820b3d54eSMarc Zyngier unsigned long flags; 258920b3d54eSMarc Zyngier 259020b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 259120b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 259220b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 259320b3d54eSMarc Zyngier } 259420b3d54eSMarc Zyngier } 259520b3d54eSMarc Zyngier 259620b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 259720b3d54eSMarc Zyngier { 259820b3d54eSMarc Zyngier /* Already mapped? */ 259920b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 260020b3d54eSMarc Zyngier return; 260120b3d54eSMarc Zyngier 260220b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 260320b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 260420b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 260520b3d54eSMarc Zyngier 260620b3d54eSMarc Zyngier /* Map the new VPE instead */ 260720b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 260820b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 260920b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 261020b3d54eSMarc Zyngier 261120b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 261220b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 261320b3d54eSMarc Zyngier } 261420b3d54eSMarc Zyngier 2615958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 2616958b90d1SMarc Zyngier { 2617958b90d1SMarc Zyngier unsigned long flags; 2618958b90d1SMarc Zyngier struct its_collection *target_col; 2619958b90d1SMarc Zyngier 2620958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2621958b90d1SMarc Zyngier void __iomem *rdbase; 2622958b90d1SMarc Zyngier 2623958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 2624958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2625958b90d1SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2626958b90d1SMarc Zyngier cpu_relax(); 2627958b90d1SMarc Zyngier 2628958b90d1SMarc Zyngier return; 2629958b90d1SMarc Zyngier } 2630958b90d1SMarc Zyngier 2631958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 2632958b90d1SMarc Zyngier 2633958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 2634958b90d1SMarc Zyngier 2635958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 2636958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 2637958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 2638958b90d1SMarc Zyngier 2639958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 2640958b90d1SMarc Zyngier } 2641958b90d1SMarc Zyngier 26423171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 26433171a47aSMarc Zyngier const struct cpumask *mask_val, 26443171a47aSMarc Zyngier bool force) 26453171a47aSMarc Zyngier { 26463171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 26473171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 26483171a47aSMarc Zyngier 26493171a47aSMarc Zyngier /* 26503171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 265120b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 2652958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 2653958b90d1SMarc Zyngier * interrupt to its new location. 26543171a47aSMarc Zyngier */ 26553171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 2656958b90d1SMarc Zyngier int from = vpe->col_idx; 2657958b90d1SMarc Zyngier 26583171a47aSMarc Zyngier vpe->col_idx = cpu; 26593171a47aSMarc Zyngier its_send_vmovp(vpe); 2660958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 26613171a47aSMarc Zyngier } 26623171a47aSMarc Zyngier 266344c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 266444c4c25eSMarc Zyngier 26653171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 26663171a47aSMarc Zyngier } 26673171a47aSMarc Zyngier 2668e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 2669e643d803SMarc Zyngier { 267050c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2671e643d803SMarc Zyngier u64 val; 2672e643d803SMarc Zyngier 2673e643d803SMarc Zyngier /* Schedule the VPE */ 2674e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 2675e643d803SMarc Zyngier GENMASK_ULL(51, 12); 2676e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 2677e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 2678e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 2679e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 2680e643d803SMarc Zyngier 2681e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 2682e643d803SMarc Zyngier GENMASK_ULL(51, 16); 2683e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 2684e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 2685e643d803SMarc Zyngier /* 2686e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 2687e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 2688e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 2689e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 2690e643d803SMarc Zyngier * that the pending table is empty. A good implementation 2691e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 2692e643d803SMarc Zyngier * making this a tolerable issue. 2693e643d803SMarc Zyngier */ 2694e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2695e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 2696e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 2697e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2698e643d803SMarc Zyngier } 2699e643d803SMarc Zyngier 2700e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 2701e643d803SMarc Zyngier { 270250c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2703e643d803SMarc Zyngier u32 count = 1000000; /* 1s! */ 2704e643d803SMarc Zyngier bool clean; 2705e643d803SMarc Zyngier u64 val; 2706e643d803SMarc Zyngier 2707e643d803SMarc Zyngier /* We're being scheduled out */ 2708e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2709e643d803SMarc Zyngier val &= ~GICR_VPENDBASER_Valid; 2710e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2711e643d803SMarc Zyngier 2712e643d803SMarc Zyngier do { 2713e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2714e643d803SMarc Zyngier clean = !(val & GICR_VPENDBASER_Dirty); 2715e643d803SMarc Zyngier if (!clean) { 2716e643d803SMarc Zyngier count--; 2717e643d803SMarc Zyngier cpu_relax(); 2718e643d803SMarc Zyngier udelay(1); 2719e643d803SMarc Zyngier } 2720e643d803SMarc Zyngier } while (!clean && count); 2721e643d803SMarc Zyngier 2722e643d803SMarc Zyngier if (unlikely(!clean && !count)) { 2723e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2724e643d803SMarc Zyngier vpe->idai = false; 2725e643d803SMarc Zyngier vpe->pending_last = true; 2726e643d803SMarc Zyngier } else { 2727e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 2728e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 2729e643d803SMarc Zyngier } 2730e643d803SMarc Zyngier } 2731e643d803SMarc Zyngier 273240619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 273340619a2eSMarc Zyngier { 273440619a2eSMarc Zyngier struct its_node *its; 273540619a2eSMarc Zyngier 273640619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 273740619a2eSMarc Zyngier if (!its->is_v4) 273840619a2eSMarc Zyngier continue; 273940619a2eSMarc Zyngier 27402247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 27412247e1bfSMarc Zyngier continue; 27422247e1bfSMarc Zyngier 27433c1cceebSMarc Zyngier /* 27443c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 27453c1cceebSMarc Zyngier * we need is to reach the redistributors. 27463c1cceebSMarc Zyngier */ 274740619a2eSMarc Zyngier its_send_vinvall(its, vpe); 27483c1cceebSMarc Zyngier return; 274940619a2eSMarc Zyngier } 275040619a2eSMarc Zyngier } 275140619a2eSMarc Zyngier 2752e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 2753e643d803SMarc Zyngier { 2754e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2755e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 2756e643d803SMarc Zyngier 2757e643d803SMarc Zyngier switch (info->cmd_type) { 2758e643d803SMarc Zyngier case SCHEDULE_VPE: 2759e643d803SMarc Zyngier its_vpe_schedule(vpe); 2760e643d803SMarc Zyngier return 0; 2761e643d803SMarc Zyngier 2762e643d803SMarc Zyngier case DESCHEDULE_VPE: 2763e643d803SMarc Zyngier its_vpe_deschedule(vpe); 2764e643d803SMarc Zyngier return 0; 2765e643d803SMarc Zyngier 27665e2f7642SMarc Zyngier case INVALL_VPE: 276740619a2eSMarc Zyngier its_vpe_invall(vpe); 27685e2f7642SMarc Zyngier return 0; 27695e2f7642SMarc Zyngier 2770e643d803SMarc Zyngier default: 2771e643d803SMarc Zyngier return -EINVAL; 2772e643d803SMarc Zyngier } 2773e643d803SMarc Zyngier } 2774e643d803SMarc Zyngier 277520b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 277620b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 277720b3d54eSMarc Zyngier { 277820b3d54eSMarc Zyngier unsigned long flags; 277920b3d54eSMarc Zyngier 278020b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 278120b3d54eSMarc Zyngier 278220b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 278320b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 278420b3d54eSMarc Zyngier 278520b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 278620b3d54eSMarc Zyngier } 278720b3d54eSMarc Zyngier 2788f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 2789f6a91da7SMarc Zyngier { 2790f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 279120b3d54eSMarc Zyngier 279220b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 2793f6a91da7SMarc Zyngier void __iomem *rdbase; 2794f6a91da7SMarc Zyngier 2795f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2796f6a91da7SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_INVLPIR); 2797f6a91da7SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2798f6a91da7SMarc Zyngier cpu_relax(); 279920b3d54eSMarc Zyngier } else { 280020b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 280120b3d54eSMarc Zyngier } 2802f6a91da7SMarc Zyngier } 2803f6a91da7SMarc Zyngier 2804f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 2805f6a91da7SMarc Zyngier { 2806f6a91da7SMarc Zyngier /* 2807f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 2808f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 2809f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 2810f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 2811f6a91da7SMarc Zyngier */ 2812f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 2813f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2814f6a91da7SMarc Zyngier } 2815f6a91da7SMarc Zyngier 2816f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 2817f6a91da7SMarc Zyngier { 2818f6a91da7SMarc Zyngier /* Same hack as above... */ 2819f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 2820f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2821f6a91da7SMarc Zyngier } 2822f6a91da7SMarc Zyngier 2823e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 2824e57a3e28SMarc Zyngier enum irqchip_irq_state which, 2825e57a3e28SMarc Zyngier bool state) 2826e57a3e28SMarc Zyngier { 2827e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2828e57a3e28SMarc Zyngier 2829e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 2830e57a3e28SMarc Zyngier return -EINVAL; 2831e57a3e28SMarc Zyngier 2832e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2833e57a3e28SMarc Zyngier void __iomem *rdbase; 2834e57a3e28SMarc Zyngier 2835e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2836e57a3e28SMarc Zyngier if (state) { 2837e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 2838e57a3e28SMarc Zyngier } else { 2839e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2840e57a3e28SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2841e57a3e28SMarc Zyngier cpu_relax(); 2842e57a3e28SMarc Zyngier } 2843e57a3e28SMarc Zyngier } else { 2844e57a3e28SMarc Zyngier if (state) 2845e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 2846e57a3e28SMarc Zyngier else 2847e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 2848e57a3e28SMarc Zyngier } 2849e57a3e28SMarc Zyngier 2850e57a3e28SMarc Zyngier return 0; 2851e57a3e28SMarc Zyngier } 2852e57a3e28SMarc Zyngier 28538fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 28548fff27aeSMarc Zyngier .name = "GICv4-vpe", 2855f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 2856f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 2857f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 28583171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 2859e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 2860e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 28618fff27aeSMarc Zyngier }; 28628fff27aeSMarc Zyngier 28637d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 28647d75bbb4SMarc Zyngier { 286532bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 28667d75bbb4SMarc Zyngier } 28677d75bbb4SMarc Zyngier 28687d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 28697d75bbb4SMarc Zyngier { 28707d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 28717d75bbb4SMarc Zyngier } 28727d75bbb4SMarc Zyngier 28737d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 28747d75bbb4SMarc Zyngier { 28757d75bbb4SMarc Zyngier struct page *vpt_page; 28767d75bbb4SMarc Zyngier int vpe_id; 28777d75bbb4SMarc Zyngier 28787d75bbb4SMarc Zyngier /* Allocate vpe_id */ 28797d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 28807d75bbb4SMarc Zyngier if (vpe_id < 0) 28817d75bbb4SMarc Zyngier return vpe_id; 28827d75bbb4SMarc Zyngier 28837d75bbb4SMarc Zyngier /* Allocate VPT */ 28847d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 28857d75bbb4SMarc Zyngier if (!vpt_page) { 28867d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 28877d75bbb4SMarc Zyngier return -ENOMEM; 28887d75bbb4SMarc Zyngier } 28897d75bbb4SMarc Zyngier 28907d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 28917d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 28927d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 28937d75bbb4SMarc Zyngier return -ENOMEM; 28947d75bbb4SMarc Zyngier } 28957d75bbb4SMarc Zyngier 28967d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 28977d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 289820b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 28997d75bbb4SMarc Zyngier 29007d75bbb4SMarc Zyngier return 0; 29017d75bbb4SMarc Zyngier } 29027d75bbb4SMarc Zyngier 29037d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 29047d75bbb4SMarc Zyngier { 290520b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 29067d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 29077d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 29087d75bbb4SMarc Zyngier } 29097d75bbb4SMarc Zyngier 29107d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 29117d75bbb4SMarc Zyngier unsigned int virq, 29127d75bbb4SMarc Zyngier unsigned int nr_irqs) 29137d75bbb4SMarc Zyngier { 29147d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 29157d75bbb4SMarc Zyngier int i; 29167d75bbb4SMarc Zyngier 29177d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 29187d75bbb4SMarc Zyngier 29197d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 29207d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 29217d75bbb4SMarc Zyngier virq + i); 29227d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 29237d75bbb4SMarc Zyngier 29247d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 29257d75bbb4SMarc Zyngier 29267d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 29277d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 29287d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 29297d75bbb4SMarc Zyngier } 29307d75bbb4SMarc Zyngier 29317d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 293238dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 29337d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 29347d75bbb4SMarc Zyngier } 29357d75bbb4SMarc Zyngier } 29367d75bbb4SMarc Zyngier 29377d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 29387d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 29397d75bbb4SMarc Zyngier { 29407d75bbb4SMarc Zyngier struct its_vm *vm = args; 29417d75bbb4SMarc Zyngier unsigned long *bitmap; 29427d75bbb4SMarc Zyngier struct page *vprop_page; 29437d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 29447d75bbb4SMarc Zyngier 29457d75bbb4SMarc Zyngier BUG_ON(!vm); 29467d75bbb4SMarc Zyngier 294738dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 29487d75bbb4SMarc Zyngier if (!bitmap) 29497d75bbb4SMarc Zyngier return -ENOMEM; 29507d75bbb4SMarc Zyngier 29517d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 295238dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 29537d75bbb4SMarc Zyngier return -ENOMEM; 29547d75bbb4SMarc Zyngier } 29557d75bbb4SMarc Zyngier 29567d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 29577d75bbb4SMarc Zyngier if (!vprop_page) { 295838dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 29597d75bbb4SMarc Zyngier return -ENOMEM; 29607d75bbb4SMarc Zyngier } 29617d75bbb4SMarc Zyngier 29627d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 29637d75bbb4SMarc Zyngier vm->db_lpi_base = base; 29647d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 29657d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 29667d75bbb4SMarc Zyngier 29677d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 29687d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 29697d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 29707d75bbb4SMarc Zyngier if (err) 29717d75bbb4SMarc Zyngier break; 29727d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 29737d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 29747d75bbb4SMarc Zyngier if (err) 29757d75bbb4SMarc Zyngier break; 29767d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 29777d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 29787d75bbb4SMarc Zyngier set_bit(i, bitmap); 29797d75bbb4SMarc Zyngier } 29807d75bbb4SMarc Zyngier 29817d75bbb4SMarc Zyngier if (err) { 29827d75bbb4SMarc Zyngier if (i > 0) 29837d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 29847d75bbb4SMarc Zyngier 298538dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 29867d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 29877d75bbb4SMarc Zyngier } 29887d75bbb4SMarc Zyngier 29897d75bbb4SMarc Zyngier return err; 29907d75bbb4SMarc Zyngier } 29917d75bbb4SMarc Zyngier 299272491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 2993702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2994eb78192bSMarc Zyngier { 2995eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 299640619a2eSMarc Zyngier struct its_node *its; 2997eb78192bSMarc Zyngier 29982247e1bfSMarc Zyngier /* If we use the list map, we issue VMAPP on demand... */ 29992247e1bfSMarc Zyngier if (its_list_map) 30006ef930f2SMarc Zyngier return 0; 3001eb78192bSMarc Zyngier 3002eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 3003eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 300440619a2eSMarc Zyngier 300540619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 300640619a2eSMarc Zyngier if (!its->is_v4) 300740619a2eSMarc Zyngier continue; 300840619a2eSMarc Zyngier 300975fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 301040619a2eSMarc Zyngier its_send_vinvall(its, vpe); 301140619a2eSMarc Zyngier } 301240619a2eSMarc Zyngier 301344c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 301444c4c25eSMarc Zyngier 301572491643SThomas Gleixner return 0; 3016eb78192bSMarc Zyngier } 3017eb78192bSMarc Zyngier 3018eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 3019eb78192bSMarc Zyngier struct irq_data *d) 3020eb78192bSMarc Zyngier { 3021eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 302275fd951bSMarc Zyngier struct its_node *its; 3023eb78192bSMarc Zyngier 30242247e1bfSMarc Zyngier /* 30252247e1bfSMarc Zyngier * If we use the list map, we unmap the VPE once no VLPIs are 30262247e1bfSMarc Zyngier * associated with the VM. 30272247e1bfSMarc Zyngier */ 30282247e1bfSMarc Zyngier if (its_list_map) 30292247e1bfSMarc Zyngier return; 30302247e1bfSMarc Zyngier 303175fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 303275fd951bSMarc Zyngier if (!its->is_v4) 303375fd951bSMarc Zyngier continue; 303475fd951bSMarc Zyngier 303575fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 303675fd951bSMarc Zyngier } 3037eb78192bSMarc Zyngier } 3038eb78192bSMarc Zyngier 30398fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 30407d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 30417d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 3042eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 3043eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 30448fff27aeSMarc Zyngier }; 30458fff27aeSMarc Zyngier 30464559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 30474559fbb3SYun Wu { 30484559fbb3SYun Wu u32 count = 1000000; /* 1s */ 30494559fbb3SYun Wu u32 val; 30504559fbb3SYun Wu 30514559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 30527611da86SDavid Daney /* 30537611da86SDavid Daney * GIC architecture specification requires the ITS to be both 30547611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 30557611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 30567611da86SDavid Daney */ 30577611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 30584559fbb3SYun Wu return 0; 30594559fbb3SYun Wu 30604559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 3061d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 30624559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 30634559fbb3SYun Wu 30644559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 30654559fbb3SYun Wu while (1) { 30664559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 30674559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 30684559fbb3SYun Wu return 0; 30694559fbb3SYun Wu 30704559fbb3SYun Wu count--; 30714559fbb3SYun Wu if (!count) 30724559fbb3SYun Wu return -EBUSY; 30734559fbb3SYun Wu 30744559fbb3SYun Wu cpu_relax(); 30754559fbb3SYun Wu udelay(1); 30764559fbb3SYun Wu } 30774559fbb3SYun Wu } 30784559fbb3SYun Wu 30799d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 308094100970SRobert Richter { 308194100970SRobert Richter struct its_node *its = data; 308294100970SRobert Richter 3083fa150019SArd Biesheuvel /* erratum 22375: only alloc 8MB table size */ 3084fa150019SArd Biesheuvel its->device_ids = 0x14; /* 20 bits, 8MB */ 308594100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 30869d111d49SArd Biesheuvel 30879d111d49SArd Biesheuvel return true; 308894100970SRobert Richter } 308994100970SRobert Richter 30909d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 3091fbf8f40eSGanapatrao Kulkarni { 3092fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 3093fbf8f40eSGanapatrao Kulkarni 3094fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 30959d111d49SArd Biesheuvel 30969d111d49SArd Biesheuvel return true; 3097fbf8f40eSGanapatrao Kulkarni } 3098fbf8f40eSGanapatrao Kulkarni 30999d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 310090922a2dSShanker Donthineni { 310190922a2dSShanker Donthineni struct its_node *its = data; 310290922a2dSShanker Donthineni 310390922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 310490922a2dSShanker Donthineni its->ite_size = 16; 31059d111d49SArd Biesheuvel 31069d111d49SArd Biesheuvel return true; 310790922a2dSShanker Donthineni } 310890922a2dSShanker Donthineni 3109558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 3110558b0165SArd Biesheuvel { 3111558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 3112558b0165SArd Biesheuvel 3113558b0165SArd Biesheuvel /* 3114558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 3115558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 3116558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 3117558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 3118558b0165SArd Biesheuvel * the window offset. 3119558b0165SArd Biesheuvel */ 3120558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 3121558b0165SArd Biesheuvel } 3122558b0165SArd Biesheuvel 3123558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 3124558b0165SArd Biesheuvel { 3125558b0165SArd Biesheuvel struct its_node *its = data; 3126558b0165SArd Biesheuvel u32 pre_its_window[2]; 3127558b0165SArd Biesheuvel u32 ids; 3128558b0165SArd Biesheuvel 3129558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 3130558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 3131558b0165SArd Biesheuvel pre_its_window, 3132558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 3133558b0165SArd Biesheuvel 3134558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 3135558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 3136558b0165SArd Biesheuvel 3137558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 3138558b0165SArd Biesheuvel if (its->device_ids > ids) 3139558b0165SArd Biesheuvel its->device_ids = ids; 3140558b0165SArd Biesheuvel 3141558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 3142558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 3143558b0165SArd Biesheuvel return true; 3144558b0165SArd Biesheuvel } 3145558b0165SArd Biesheuvel return false; 3146558b0165SArd Biesheuvel } 3147558b0165SArd Biesheuvel 31485c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 31495c9a882eSMarc Zyngier { 31505c9a882eSMarc Zyngier struct its_node *its = data; 31515c9a882eSMarc Zyngier 31525c9a882eSMarc Zyngier /* 31535c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 31545c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 31555c9a882eSMarc Zyngier */ 31565c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 31575c9a882eSMarc Zyngier return true; 3158cc2d3216SMarc Zyngier } 31594c21f3c2SMarc Zyngier 316067510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 316194100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 316294100970SRobert Richter { 316394100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 316494100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 316594100970SRobert Richter .mask = 0xffff0fff, 316694100970SRobert Richter .init = its_enable_quirk_cavium_22375, 316794100970SRobert Richter }, 316894100970SRobert Richter #endif 3169fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 3170fbf8f40eSGanapatrao Kulkarni { 3171fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 3172fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 3173fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 3174fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 3175fbf8f40eSGanapatrao Kulkarni }, 3176fbf8f40eSGanapatrao Kulkarni #endif 317790922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 317890922a2dSShanker Donthineni { 317990922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 318090922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 318190922a2dSShanker Donthineni .mask = 0xffffffff, 318290922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 318390922a2dSShanker Donthineni }, 318490922a2dSShanker Donthineni #endif 3185558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 3186558b0165SArd Biesheuvel { 3187558b0165SArd Biesheuvel /* 3188558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 3189558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 3190558b0165SArd Biesheuvel * special handling in software. 3191558b0165SArd Biesheuvel */ 3192558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 3193558b0165SArd Biesheuvel .iidr = 0x0001143b, 3194558b0165SArd Biesheuvel .mask = 0xffffffff, 3195558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 3196558b0165SArd Biesheuvel }, 3197558b0165SArd Biesheuvel #endif 31985c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 31995c9a882eSMarc Zyngier { 32005c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 32015c9a882eSMarc Zyngier .iidr = 0x00000004, 32025c9a882eSMarc Zyngier .mask = 0xffffffff, 32035c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 32045c9a882eSMarc Zyngier }, 32055c9a882eSMarc Zyngier #endif 320667510ccaSRobert Richter { 320767510ccaSRobert Richter } 320867510ccaSRobert Richter }; 320967510ccaSRobert Richter 321067510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 321167510ccaSRobert Richter { 321267510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 321367510ccaSRobert Richter 321467510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 321567510ccaSRobert Richter } 321667510ccaSRobert Richter 3217dba0bc7bSDerek Basehore static int its_save_disable(void) 3218dba0bc7bSDerek Basehore { 3219dba0bc7bSDerek Basehore struct its_node *its; 3220dba0bc7bSDerek Basehore int err = 0; 3221dba0bc7bSDerek Basehore 3222a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3223dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3224dba0bc7bSDerek Basehore void __iomem *base; 3225dba0bc7bSDerek Basehore 3226dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3227dba0bc7bSDerek Basehore continue; 3228dba0bc7bSDerek Basehore 3229dba0bc7bSDerek Basehore base = its->base; 3230dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 3231dba0bc7bSDerek Basehore err = its_force_quiescent(base); 3232dba0bc7bSDerek Basehore if (err) { 3233dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 3234dba0bc7bSDerek Basehore &its->phys_base, err); 3235dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3236dba0bc7bSDerek Basehore goto err; 3237dba0bc7bSDerek Basehore } 3238dba0bc7bSDerek Basehore 3239dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 3240dba0bc7bSDerek Basehore } 3241dba0bc7bSDerek Basehore 3242dba0bc7bSDerek Basehore err: 3243dba0bc7bSDerek Basehore if (err) { 3244dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 3245dba0bc7bSDerek Basehore void __iomem *base; 3246dba0bc7bSDerek Basehore 3247dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3248dba0bc7bSDerek Basehore continue; 3249dba0bc7bSDerek Basehore 3250dba0bc7bSDerek Basehore base = its->base; 3251dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3252dba0bc7bSDerek Basehore } 3253dba0bc7bSDerek Basehore } 3254a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3255dba0bc7bSDerek Basehore 3256dba0bc7bSDerek Basehore return err; 3257dba0bc7bSDerek Basehore } 3258dba0bc7bSDerek Basehore 3259dba0bc7bSDerek Basehore static void its_restore_enable(void) 3260dba0bc7bSDerek Basehore { 3261dba0bc7bSDerek Basehore struct its_node *its; 3262dba0bc7bSDerek Basehore int ret; 3263dba0bc7bSDerek Basehore 3264a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3265dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3266dba0bc7bSDerek Basehore void __iomem *base; 3267dba0bc7bSDerek Basehore int i; 3268dba0bc7bSDerek Basehore 3269dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3270dba0bc7bSDerek Basehore continue; 3271dba0bc7bSDerek Basehore 3272dba0bc7bSDerek Basehore base = its->base; 3273dba0bc7bSDerek Basehore 3274dba0bc7bSDerek Basehore /* 3275dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 3276dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 3277dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 3278dba0bc7bSDerek Basehore * Specification. 3279dba0bc7bSDerek Basehore */ 3280dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 3281dba0bc7bSDerek Basehore if (ret) { 3282dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 3283dba0bc7bSDerek Basehore &its->phys_base, ret); 3284dba0bc7bSDerek Basehore continue; 3285dba0bc7bSDerek Basehore } 3286dba0bc7bSDerek Basehore 3287dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 3288dba0bc7bSDerek Basehore 3289dba0bc7bSDerek Basehore /* 3290dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 3291dba0bc7bSDerek Basehore * cmd_write line up with it. 3292dba0bc7bSDerek Basehore */ 3293dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 3294dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 3295dba0bc7bSDerek Basehore 3296dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 3297dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3298dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 3299dba0bc7bSDerek Basehore 3300dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 3301dba0bc7bSDerek Basehore continue; 3302dba0bc7bSDerek Basehore 3303dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 3304dba0bc7bSDerek Basehore } 3305dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3306920181ceSDerek Basehore 3307920181ceSDerek Basehore /* 3308920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 3309920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 3310920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 3311920181ceSDerek Basehore */ 3312920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 3313920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 3314920181ceSDerek Basehore its_cpu_init_collection(its); 3315dba0bc7bSDerek Basehore } 3316a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3317dba0bc7bSDerek Basehore } 3318dba0bc7bSDerek Basehore 3319dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 3320dba0bc7bSDerek Basehore .suspend = its_save_disable, 3321dba0bc7bSDerek Basehore .resume = its_restore_enable, 3322dba0bc7bSDerek Basehore }; 3323dba0bc7bSDerek Basehore 3324db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 3325d14ae5e6STomasz Nowicki { 3326d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 3327d14ae5e6STomasz Nowicki struct msi_domain_info *info; 3328d14ae5e6STomasz Nowicki 3329d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 3330d14ae5e6STomasz Nowicki if (!info) 3331d14ae5e6STomasz Nowicki return -ENOMEM; 3332d14ae5e6STomasz Nowicki 3333db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 3334d14ae5e6STomasz Nowicki if (!inner_domain) { 3335d14ae5e6STomasz Nowicki kfree(info); 3336d14ae5e6STomasz Nowicki return -ENOMEM; 3337d14ae5e6STomasz Nowicki } 3338d14ae5e6STomasz Nowicki 3339db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 334096f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 3341558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 3342d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 3343d14ae5e6STomasz Nowicki info->data = its; 3344d14ae5e6STomasz Nowicki inner_domain->host_data = info; 3345d14ae5e6STomasz Nowicki 3346d14ae5e6STomasz Nowicki return 0; 3347d14ae5e6STomasz Nowicki } 3348d14ae5e6STomasz Nowicki 33498fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 33508fff27aeSMarc Zyngier { 335120b3d54eSMarc Zyngier struct its_node *its; 335220b3d54eSMarc Zyngier u32 devid; 335320b3d54eSMarc Zyngier int entries; 335420b3d54eSMarc Zyngier 335520b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 335620b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 335720b3d54eSMarc Zyngier return 0; 335820b3d54eSMarc Zyngier } 335920b3d54eSMarc Zyngier 336020b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 336120b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 336220b3d54eSMarc Zyngier 336320b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 33646396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 336520b3d54eSMarc Zyngier GFP_KERNEL); 336620b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 336720b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 336820b3d54eSMarc Zyngier return -ENOMEM; 336920b3d54eSMarc Zyngier } 337020b3d54eSMarc Zyngier 337120b3d54eSMarc Zyngier /* Use the last possible DevID */ 337220b3d54eSMarc Zyngier devid = GENMASK(its->device_ids - 1, 0); 337320b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 337420b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 337520b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 337620b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 337720b3d54eSMarc Zyngier return -ENOMEM; 337820b3d54eSMarc Zyngier } 337920b3d54eSMarc Zyngier 3380c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 338120b3d54eSMarc Zyngier 338220b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 338320b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 338420b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 338520b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 338620b3d54eSMarc Zyngier 33878fff27aeSMarc Zyngier return 0; 33888fff27aeSMarc Zyngier } 33898fff27aeSMarc Zyngier 33903dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 33913dfa576bSMarc Zyngier void __iomem *its_base) 33923dfa576bSMarc Zyngier { 33933dfa576bSMarc Zyngier int its_number; 33943dfa576bSMarc Zyngier u32 ctlr; 33953dfa576bSMarc Zyngier 33963dfa576bSMarc Zyngier /* 33973dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 33983dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 33993dfa576bSMarc Zyngier * locking. Should this change, we should address 34003dfa576bSMarc Zyngier * this. 34013dfa576bSMarc Zyngier */ 3402ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 3403ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 34043dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 34053dfa576bSMarc Zyngier &res->start); 34063dfa576bSMarc Zyngier return -EINVAL; 34073dfa576bSMarc Zyngier } 34083dfa576bSMarc Zyngier 34093dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 34103dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 34113dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 34123dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 34133dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 34143dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 34153dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 34163dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 34173dfa576bSMarc Zyngier } 34183dfa576bSMarc Zyngier 34193dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 34203dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 34213dfa576bSMarc Zyngier &res->start, its_number); 34223dfa576bSMarc Zyngier return -EINVAL; 34233dfa576bSMarc Zyngier } 34243dfa576bSMarc Zyngier 34253dfa576bSMarc Zyngier return its_number; 34263dfa576bSMarc Zyngier } 34273dfa576bSMarc Zyngier 3428db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 3429db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 34304c21f3c2SMarc Zyngier { 34314c21f3c2SMarc Zyngier struct its_node *its; 34324c21f3c2SMarc Zyngier void __iomem *its_base; 34333dfa576bSMarc Zyngier u32 val, ctlr; 34343dfa576bSMarc Zyngier u64 baser, tmp, typer; 34354c21f3c2SMarc Zyngier int err; 34364c21f3c2SMarc Zyngier 3437db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 34384c21f3c2SMarc Zyngier if (!its_base) { 3439db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 34404c21f3c2SMarc Zyngier return -ENOMEM; 34414c21f3c2SMarc Zyngier } 34424c21f3c2SMarc Zyngier 34434c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 34444c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 3445db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 34464c21f3c2SMarc Zyngier err = -ENODEV; 34474c21f3c2SMarc Zyngier goto out_unmap; 34484c21f3c2SMarc Zyngier } 34494c21f3c2SMarc Zyngier 34504559fbb3SYun Wu err = its_force_quiescent(its_base); 34514559fbb3SYun Wu if (err) { 3452db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 34534559fbb3SYun Wu goto out_unmap; 34544559fbb3SYun Wu } 34554559fbb3SYun Wu 3456db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 34574c21f3c2SMarc Zyngier 34584c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 34594c21f3c2SMarc Zyngier if (!its) { 34604c21f3c2SMarc Zyngier err = -ENOMEM; 34614c21f3c2SMarc Zyngier goto out_unmap; 34624c21f3c2SMarc Zyngier } 34634c21f3c2SMarc Zyngier 34644c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 34654c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 34664c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 34673dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 34684c21f3c2SMarc Zyngier its->base = its_base; 3469db40f0a7STomasz Nowicki its->phys_base = res->start; 34703dfa576bSMarc Zyngier its->ite_size = GITS_TYPER_ITT_ENTRY_SIZE(typer); 3471fa150019SArd Biesheuvel its->device_ids = GITS_TYPER_DEVBITS(typer); 34723dfa576bSMarc Zyngier its->is_v4 = !!(typer & GITS_TYPER_VLPIS); 34733dfa576bSMarc Zyngier if (its->is_v4) { 34743dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 34753dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 34763dfa576bSMarc Zyngier if (err < 0) 34773dfa576bSMarc Zyngier goto out_free_its; 34783dfa576bSMarc Zyngier 3479debf6d02SMarc Zyngier its->list_nr = err; 3480debf6d02SMarc Zyngier 34813dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 34823dfa576bSMarc Zyngier &res->start, err); 34833dfa576bSMarc Zyngier } else { 34843dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 34853dfa576bSMarc Zyngier } 34863dfa576bSMarc Zyngier } 34873dfa576bSMarc Zyngier 3488db40f0a7STomasz Nowicki its->numa_node = numa_node; 34894c21f3c2SMarc Zyngier 34905bc13c2cSRobert Richter its->cmd_base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 34915bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 34924c21f3c2SMarc Zyngier if (!its->cmd_base) { 34934c21f3c2SMarc Zyngier err = -ENOMEM; 34944c21f3c2SMarc Zyngier goto out_free_its; 34954c21f3c2SMarc Zyngier } 34964c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 3497558b0165SArd Biesheuvel its->fwnode_handle = handle; 3498558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 3499558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 35004c21f3c2SMarc Zyngier 350167510ccaSRobert Richter its_enable_quirks(its); 350267510ccaSRobert Richter 35030e0b0f69SShanker Donthineni err = its_alloc_tables(its); 35044c21f3c2SMarc Zyngier if (err) 35054c21f3c2SMarc Zyngier goto out_free_cmd; 35064c21f3c2SMarc Zyngier 35074c21f3c2SMarc Zyngier err = its_alloc_collections(its); 35084c21f3c2SMarc Zyngier if (err) 35094c21f3c2SMarc Zyngier goto out_free_tables; 35104c21f3c2SMarc Zyngier 35114c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 35122fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 35134c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 35144c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 35154c21f3c2SMarc Zyngier GITS_CBASER_VALID); 35164c21f3c2SMarc Zyngier 35170968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 35180968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 35194c21f3c2SMarc Zyngier 35204ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 3521241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 3522241a386cSMarc Zyngier /* 3523241a386cSMarc Zyngier * The HW reports non-shareable, we must 3524241a386cSMarc Zyngier * remove the cacheability attributes as 3525241a386cSMarc Zyngier * well. 3526241a386cSMarc Zyngier */ 3527241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 3528241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 3529241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 35300968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 3531241a386cSMarc Zyngier } 35324c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 35334c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 35344c21f3c2SMarc Zyngier } 35354c21f3c2SMarc Zyngier 35360968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 35373dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 3538d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 3539d51c4b4dSMarc Zyngier if (its->is_v4) 3540d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 3541d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 3542241a386cSMarc Zyngier 3543dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 3544dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 3545dba0bc7bSDerek Basehore 3546db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 3547d14ae5e6STomasz Nowicki if (err) 354854456db9SMarc Zyngier goto out_free_tables; 35494c21f3c2SMarc Zyngier 3550a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 35514c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 3552a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 35534c21f3c2SMarc Zyngier 35544c21f3c2SMarc Zyngier return 0; 35554c21f3c2SMarc Zyngier 35564c21f3c2SMarc Zyngier out_free_tables: 35574c21f3c2SMarc Zyngier its_free_tables(its); 35584c21f3c2SMarc Zyngier out_free_cmd: 35595bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 35604c21f3c2SMarc Zyngier out_free_its: 35614c21f3c2SMarc Zyngier kfree(its); 35624c21f3c2SMarc Zyngier out_unmap: 35634c21f3c2SMarc Zyngier iounmap(its_base); 3564db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 35654c21f3c2SMarc Zyngier return err; 35664c21f3c2SMarc Zyngier } 35674c21f3c2SMarc Zyngier 35684c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 35694c21f3c2SMarc Zyngier { 3570589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 35714c21f3c2SMarc Zyngier } 35724c21f3c2SMarc Zyngier 35736eb486b6SShanker Donthineni static int redist_disable_lpis(void) 35744c21f3c2SMarc Zyngier { 35756eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 35766eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 35776eb486b6SShanker Donthineni u64 val; 35786eb486b6SShanker Donthineni 35794c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 35804c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 35814c21f3c2SMarc Zyngier return -ENXIO; 35824c21f3c2SMarc Zyngier } 35836eb486b6SShanker Donthineni 35846eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 35856eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 35866eb486b6SShanker Donthineni return 0; 35876eb486b6SShanker Donthineni 358811e37d35SMarc Zyngier /* 358911e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 359011e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 359111e37d35SMarc Zyngier * configured and all is well in the world. 3592c440a9d9SMarc Zyngier * 3593c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 359411e37d35SMarc Zyngier */ 3595c440a9d9SMarc Zyngier if (gic_data_rdist()->lpi_enabled || 3596c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 359711e37d35SMarc Zyngier return 0; 359811e37d35SMarc Zyngier 359911e37d35SMarc Zyngier /* 360011e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 360111e37d35SMarc Zyngier */ 360211e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 36036eb486b6SShanker Donthineni smp_processor_id()); 36046eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 36056eb486b6SShanker Donthineni 36066eb486b6SShanker Donthineni /* Disable LPIs */ 36076eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 36086eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 36096eb486b6SShanker Donthineni 36106eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 36116eb486b6SShanker Donthineni dsb(sy); 36126eb486b6SShanker Donthineni 36136eb486b6SShanker Donthineni /* 36146eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 36156eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 36166eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 36176eb486b6SShanker Donthineni */ 36186eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 36196eb486b6SShanker Donthineni if (!timeout) { 36206eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 36216eb486b6SShanker Donthineni smp_processor_id()); 36226eb486b6SShanker Donthineni return -ETIMEDOUT; 36236eb486b6SShanker Donthineni } 36246eb486b6SShanker Donthineni udelay(1); 36256eb486b6SShanker Donthineni timeout--; 36266eb486b6SShanker Donthineni } 36276eb486b6SShanker Donthineni 36286eb486b6SShanker Donthineni /* 36296eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 36306eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 36316eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 36326eb486b6SShanker Donthineni */ 36336eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 36346eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 36356eb486b6SShanker Donthineni return -EBUSY; 36366eb486b6SShanker Donthineni } 36376eb486b6SShanker Donthineni 36386eb486b6SShanker Donthineni return 0; 36396eb486b6SShanker Donthineni } 36406eb486b6SShanker Donthineni 36416eb486b6SShanker Donthineni int its_cpu_init(void) 36426eb486b6SShanker Donthineni { 36436eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 36446eb486b6SShanker Donthineni int ret; 36456eb486b6SShanker Donthineni 36466eb486b6SShanker Donthineni ret = redist_disable_lpis(); 36476eb486b6SShanker Donthineni if (ret) 36486eb486b6SShanker Donthineni return ret; 36496eb486b6SShanker Donthineni 36504c21f3c2SMarc Zyngier its_cpu_init_lpis(); 3651920181ceSDerek Basehore its_cpu_init_collections(); 36524c21f3c2SMarc Zyngier } 36534c21f3c2SMarc Zyngier 36544c21f3c2SMarc Zyngier return 0; 36554c21f3c2SMarc Zyngier } 36564c21f3c2SMarc Zyngier 3657935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 36584c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 36594c21f3c2SMarc Zyngier {}, 36604c21f3c2SMarc Zyngier }; 36614c21f3c2SMarc Zyngier 3662db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 36634c21f3c2SMarc Zyngier { 36644c21f3c2SMarc Zyngier struct device_node *np; 3665db40f0a7STomasz Nowicki struct resource res; 36664c21f3c2SMarc Zyngier 36674c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 36684c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 366995a25625SStephen Boyd if (!of_device_is_available(np)) 367095a25625SStephen Boyd continue; 3671d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 3672e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 3673e81f54c6SRob Herring np); 3674d14ae5e6STomasz Nowicki continue; 3675d14ae5e6STomasz Nowicki } 3676d14ae5e6STomasz Nowicki 3677db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 3678e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 3679db40f0a7STomasz Nowicki continue; 36804c21f3c2SMarc Zyngier } 36814c21f3c2SMarc Zyngier 3682db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 3683db40f0a7STomasz Nowicki } 3684db40f0a7STomasz Nowicki return 0; 3685db40f0a7STomasz Nowicki } 3686db40f0a7STomasz Nowicki 36873f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 36883f010cf1STomasz Nowicki 36893f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 36903f010cf1STomasz Nowicki 3691d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 3692dbd2b826SGanapatrao Kulkarni struct its_srat_map { 3693dbd2b826SGanapatrao Kulkarni /* numa node id */ 3694dbd2b826SGanapatrao Kulkarni u32 numa_node; 3695dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 3696dbd2b826SGanapatrao Kulkarni u32 its_id; 3697dbd2b826SGanapatrao Kulkarni }; 3698dbd2b826SGanapatrao Kulkarni 3699fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 3700dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 3701dbd2b826SGanapatrao Kulkarni 3702dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 3703dbd2b826SGanapatrao Kulkarni { 3704dbd2b826SGanapatrao Kulkarni int i; 3705dbd2b826SGanapatrao Kulkarni 3706dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 3707dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 3708dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 3709dbd2b826SGanapatrao Kulkarni } 3710dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 3711dbd2b826SGanapatrao Kulkarni } 3712dbd2b826SGanapatrao Kulkarni 3713fdf6e7a8SHanjun Guo static int __init gic_acpi_match_srat_its(struct acpi_subtable_header *header, 3714fdf6e7a8SHanjun Guo const unsigned long end) 3715fdf6e7a8SHanjun Guo { 3716fdf6e7a8SHanjun Guo return 0; 3717fdf6e7a8SHanjun Guo } 3718fdf6e7a8SHanjun Guo 3719dbd2b826SGanapatrao Kulkarni static int __init gic_acpi_parse_srat_its(struct acpi_subtable_header *header, 3720dbd2b826SGanapatrao Kulkarni const unsigned long end) 3721dbd2b826SGanapatrao Kulkarni { 3722dbd2b826SGanapatrao Kulkarni int node; 3723dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 3724dbd2b826SGanapatrao Kulkarni 3725dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 3726dbd2b826SGanapatrao Kulkarni if (!its_affinity) 3727dbd2b826SGanapatrao Kulkarni return -EINVAL; 3728dbd2b826SGanapatrao Kulkarni 3729dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 3730dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 3731dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 3732dbd2b826SGanapatrao Kulkarni return -EINVAL; 3733dbd2b826SGanapatrao Kulkarni } 3734dbd2b826SGanapatrao Kulkarni 3735dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 3736dbd2b826SGanapatrao Kulkarni 3737dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 3738dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 3739dbd2b826SGanapatrao Kulkarni return 0; 3740dbd2b826SGanapatrao Kulkarni } 3741dbd2b826SGanapatrao Kulkarni 3742dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 3743dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 3744dbd2b826SGanapatrao Kulkarni its_in_srat++; 3745dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 3746dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 3747dbd2b826SGanapatrao Kulkarni 3748dbd2b826SGanapatrao Kulkarni return 0; 3749dbd2b826SGanapatrao Kulkarni } 3750dbd2b826SGanapatrao Kulkarni 3751dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 3752dbd2b826SGanapatrao Kulkarni { 3753fdf6e7a8SHanjun Guo int count; 3754fdf6e7a8SHanjun Guo 3755fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 3756fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 3757fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3758fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 3759fdf6e7a8SHanjun Guo if (count <= 0) 3760fdf6e7a8SHanjun Guo return; 3761fdf6e7a8SHanjun Guo 37626da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 3763fdf6e7a8SHanjun Guo GFP_KERNEL); 3764fdf6e7a8SHanjun Guo if (!its_srat_maps) { 3765fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 3766fdf6e7a8SHanjun Guo return; 3767fdf6e7a8SHanjun Guo } 3768fdf6e7a8SHanjun Guo 3769dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 3770dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 3771dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3772dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 3773dbd2b826SGanapatrao Kulkarni } 3774fdf6e7a8SHanjun Guo 3775fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 3776fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 3777fdf6e7a8SHanjun Guo { 3778fdf6e7a8SHanjun Guo kfree(its_srat_maps); 3779fdf6e7a8SHanjun Guo } 3780dbd2b826SGanapatrao Kulkarni #else 3781dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 3782dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 3783fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 3784dbd2b826SGanapatrao Kulkarni #endif 3785dbd2b826SGanapatrao Kulkarni 37863f010cf1STomasz Nowicki static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header, 37873f010cf1STomasz Nowicki const unsigned long end) 37883f010cf1STomasz Nowicki { 37893f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 37903f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 37913f010cf1STomasz Nowicki struct resource res; 37923f010cf1STomasz Nowicki int err; 37933f010cf1STomasz Nowicki 37943f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 37953f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 37963f010cf1STomasz Nowicki res.start = its_entry->base_address; 37973f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 37983f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 37993f010cf1STomasz Nowicki 38003f010cf1STomasz Nowicki dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address); 38013f010cf1STomasz Nowicki if (!dom_handle) { 38023f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 38033f010cf1STomasz Nowicki &res.start); 38043f010cf1STomasz Nowicki return -ENOMEM; 38053f010cf1STomasz Nowicki } 38063f010cf1STomasz Nowicki 38078b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 38088b4282e6SShameer Kolothum dom_handle); 38093f010cf1STomasz Nowicki if (err) { 38103f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 38113f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 38123f010cf1STomasz Nowicki goto dom_err; 38133f010cf1STomasz Nowicki } 38143f010cf1STomasz Nowicki 3815dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 3816dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 38173f010cf1STomasz Nowicki if (!err) 38183f010cf1STomasz Nowicki return 0; 38193f010cf1STomasz Nowicki 38203f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 38213f010cf1STomasz Nowicki dom_err: 38223f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 38233f010cf1STomasz Nowicki return err; 38243f010cf1STomasz Nowicki } 38253f010cf1STomasz Nowicki 38263f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 38273f010cf1STomasz Nowicki { 3828dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 38293f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 38303f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 3831fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 38323f010cf1STomasz Nowicki } 38333f010cf1STomasz Nowicki #else 38343f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 38353f010cf1STomasz Nowicki #endif 38363f010cf1STomasz Nowicki 3837db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 3838db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 3839db40f0a7STomasz Nowicki { 3840db40f0a7STomasz Nowicki struct device_node *of_node; 38418fff27aeSMarc Zyngier struct its_node *its; 38428fff27aeSMarc Zyngier bool has_v4 = false; 38438fff27aeSMarc Zyngier int err; 3844db40f0a7STomasz Nowicki 3845db40f0a7STomasz Nowicki its_parent = parent_domain; 3846db40f0a7STomasz Nowicki of_node = to_of_node(handle); 3847db40f0a7STomasz Nowicki if (of_node) 3848db40f0a7STomasz Nowicki its_of_probe(of_node); 3849db40f0a7STomasz Nowicki else 38503f010cf1STomasz Nowicki its_acpi_probe(); 3851db40f0a7STomasz Nowicki 38524c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 38534c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 38544c21f3c2SMarc Zyngier return -ENXIO; 38554c21f3c2SMarc Zyngier } 38564c21f3c2SMarc Zyngier 38574c21f3c2SMarc Zyngier gic_rdists = rdists; 385811e37d35SMarc Zyngier 385911e37d35SMarc Zyngier err = allocate_lpi_tables(); 38608fff27aeSMarc Zyngier if (err) 38618fff27aeSMarc Zyngier return err; 38628fff27aeSMarc Zyngier 38638fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 38648fff27aeSMarc Zyngier has_v4 |= its->is_v4; 38658fff27aeSMarc Zyngier 38668fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 38673d63cb53SMarc Zyngier if (its_init_vpe_domain() || 38683d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 38698fff27aeSMarc Zyngier rdists->has_vlpis = false; 38708fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 38718fff27aeSMarc Zyngier } 38728fff27aeSMarc Zyngier } 38738fff27aeSMarc Zyngier 3874dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 3875dba0bc7bSDerek Basehore 38768fff27aeSMarc Zyngier return 0; 38774c21f3c2SMarc Zyngier } 3878