1cc2d3216SMarc Zyngier /* 2cc2d3216SMarc Zyngier * Copyright (C) 2013, 2014 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 18cc2d3216SMarc Zyngier #include <linux/bitmap.h> 19cc2d3216SMarc Zyngier #include <linux/cpu.h> 20cc2d3216SMarc Zyngier #include <linux/delay.h> 21cc2d3216SMarc Zyngier #include <linux/interrupt.h> 22cc2d3216SMarc Zyngier #include <linux/log2.h> 23cc2d3216SMarc Zyngier #include <linux/mm.h> 24cc2d3216SMarc Zyngier #include <linux/msi.h> 25cc2d3216SMarc Zyngier #include <linux/of.h> 26cc2d3216SMarc Zyngier #include <linux/of_address.h> 27cc2d3216SMarc Zyngier #include <linux/of_irq.h> 28cc2d3216SMarc Zyngier #include <linux/of_pci.h> 29cc2d3216SMarc Zyngier #include <linux/of_platform.h> 30cc2d3216SMarc Zyngier #include <linux/percpu.h> 31cc2d3216SMarc Zyngier #include <linux/slab.h> 32cc2d3216SMarc Zyngier 33cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 34cc2d3216SMarc Zyngier 35cc2d3216SMarc Zyngier #include <asm/cacheflush.h> 36cc2d3216SMarc Zyngier #include <asm/cputype.h> 37cc2d3216SMarc Zyngier #include <asm/exception.h> 38cc2d3216SMarc Zyngier 39cc2d3216SMarc Zyngier #include "irqchip.h" 40cc2d3216SMarc Zyngier 41cc2d3216SMarc Zyngier #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1 << 0) 42cc2d3216SMarc Zyngier 43c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 44c48ed51cSMarc Zyngier 45cc2d3216SMarc Zyngier /* 46cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 47cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 48cc2d3216SMarc Zyngier * CPU. 49cc2d3216SMarc Zyngier */ 50cc2d3216SMarc Zyngier struct its_collection { 51cc2d3216SMarc Zyngier u64 target_address; 52cc2d3216SMarc Zyngier u16 col_id; 53cc2d3216SMarc Zyngier }; 54cc2d3216SMarc Zyngier 55cc2d3216SMarc Zyngier /* 56cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 57cc2d3216SMarc Zyngier * msi_controller, the command queue, the collections, and the list of 58cc2d3216SMarc Zyngier * devices writing to it. 59cc2d3216SMarc Zyngier */ 60cc2d3216SMarc Zyngier struct its_node { 61cc2d3216SMarc Zyngier raw_spinlock_t lock; 62cc2d3216SMarc Zyngier struct list_head entry; 63cc2d3216SMarc Zyngier struct msi_controller msi_chip; 64cc2d3216SMarc Zyngier struct irq_domain *domain; 65cc2d3216SMarc Zyngier void __iomem *base; 66cc2d3216SMarc Zyngier unsigned long phys_base; 67cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 68cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 69cc2d3216SMarc Zyngier void *tables[GITS_BASER_NR_REGS]; 70cc2d3216SMarc Zyngier struct its_collection *collections; 71cc2d3216SMarc Zyngier struct list_head its_device_list; 72cc2d3216SMarc Zyngier u64 flags; 73cc2d3216SMarc Zyngier u32 ite_size; 74cc2d3216SMarc Zyngier }; 75cc2d3216SMarc Zyngier 76cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 77cc2d3216SMarc Zyngier 78cc2d3216SMarc Zyngier /* 79cc2d3216SMarc Zyngier * The ITS view of a device - belongs to an ITS, a collection, owns an 80cc2d3216SMarc Zyngier * interrupt translation table, and a list of interrupts. 81cc2d3216SMarc Zyngier */ 82cc2d3216SMarc Zyngier struct its_device { 83cc2d3216SMarc Zyngier struct list_head entry; 84cc2d3216SMarc Zyngier struct its_node *its; 85cc2d3216SMarc Zyngier struct its_collection *collection; 86cc2d3216SMarc Zyngier void *itt; 87cc2d3216SMarc Zyngier unsigned long *lpi_map; 88cc2d3216SMarc Zyngier irq_hw_number_t lpi_base; 89cc2d3216SMarc Zyngier int nr_lpis; 90cc2d3216SMarc Zyngier u32 nr_ites; 91cc2d3216SMarc Zyngier u32 device_id; 92cc2d3216SMarc Zyngier }; 93cc2d3216SMarc Zyngier 941ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 951ac19ca6SMarc Zyngier static DEFINE_SPINLOCK(its_lock); 961ac19ca6SMarc Zyngier static struct device_node *gic_root_node; 971ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 981ac19ca6SMarc Zyngier 991ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 1001ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 1011ac19ca6SMarc Zyngier 102cc2d3216SMarc Zyngier /* 103cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 104cc2d3216SMarc Zyngier * block. 105cc2d3216SMarc Zyngier */ 106cc2d3216SMarc Zyngier struct its_cmd_desc { 107cc2d3216SMarc Zyngier union { 108cc2d3216SMarc Zyngier struct { 109cc2d3216SMarc Zyngier struct its_device *dev; 110cc2d3216SMarc Zyngier u32 event_id; 111cc2d3216SMarc Zyngier } its_inv_cmd; 112cc2d3216SMarc Zyngier 113cc2d3216SMarc Zyngier struct { 114cc2d3216SMarc Zyngier struct its_device *dev; 115cc2d3216SMarc Zyngier u32 event_id; 116cc2d3216SMarc Zyngier } its_int_cmd; 117cc2d3216SMarc Zyngier 118cc2d3216SMarc Zyngier struct { 119cc2d3216SMarc Zyngier struct its_device *dev; 120cc2d3216SMarc Zyngier int valid; 121cc2d3216SMarc Zyngier } its_mapd_cmd; 122cc2d3216SMarc Zyngier 123cc2d3216SMarc Zyngier struct { 124cc2d3216SMarc Zyngier struct its_collection *col; 125cc2d3216SMarc Zyngier int valid; 126cc2d3216SMarc Zyngier } its_mapc_cmd; 127cc2d3216SMarc Zyngier 128cc2d3216SMarc Zyngier struct { 129cc2d3216SMarc Zyngier struct its_device *dev; 130cc2d3216SMarc Zyngier u32 phys_id; 131cc2d3216SMarc Zyngier u32 event_id; 132cc2d3216SMarc Zyngier } its_mapvi_cmd; 133cc2d3216SMarc Zyngier 134cc2d3216SMarc Zyngier struct { 135cc2d3216SMarc Zyngier struct its_device *dev; 136cc2d3216SMarc Zyngier struct its_collection *col; 137cc2d3216SMarc Zyngier u32 id; 138cc2d3216SMarc Zyngier } its_movi_cmd; 139cc2d3216SMarc Zyngier 140cc2d3216SMarc Zyngier struct { 141cc2d3216SMarc Zyngier struct its_device *dev; 142cc2d3216SMarc Zyngier u32 event_id; 143cc2d3216SMarc Zyngier } its_discard_cmd; 144cc2d3216SMarc Zyngier 145cc2d3216SMarc Zyngier struct { 146cc2d3216SMarc Zyngier struct its_collection *col; 147cc2d3216SMarc Zyngier } its_invall_cmd; 148cc2d3216SMarc Zyngier }; 149cc2d3216SMarc Zyngier }; 150cc2d3216SMarc Zyngier 151cc2d3216SMarc Zyngier /* 152cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 153cc2d3216SMarc Zyngier */ 154cc2d3216SMarc Zyngier struct its_cmd_block { 155cc2d3216SMarc Zyngier u64 raw_cmd[4]; 156cc2d3216SMarc Zyngier }; 157cc2d3216SMarc Zyngier 158cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 159cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 160cc2d3216SMarc Zyngier 161cc2d3216SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_cmd_block *, 162cc2d3216SMarc Zyngier struct its_cmd_desc *); 163cc2d3216SMarc Zyngier 164cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 165cc2d3216SMarc Zyngier { 166cc2d3216SMarc Zyngier cmd->raw_cmd[0] &= ~0xffUL; 167cc2d3216SMarc Zyngier cmd->raw_cmd[0] |= cmd_nr; 168cc2d3216SMarc Zyngier } 169cc2d3216SMarc Zyngier 170cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 171cc2d3216SMarc Zyngier { 172cc2d3216SMarc Zyngier cmd->raw_cmd[0] &= ~(0xffffUL << 32); 173cc2d3216SMarc Zyngier cmd->raw_cmd[0] |= ((u64)devid) << 32; 174cc2d3216SMarc Zyngier } 175cc2d3216SMarc Zyngier 176cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 177cc2d3216SMarc Zyngier { 178cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= ~0xffffffffUL; 179cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= id; 180cc2d3216SMarc Zyngier } 181cc2d3216SMarc Zyngier 182cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 183cc2d3216SMarc Zyngier { 184cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= 0xffffffffUL; 185cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= ((u64)phys_id) << 32; 186cc2d3216SMarc Zyngier } 187cc2d3216SMarc Zyngier 188cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 189cc2d3216SMarc Zyngier { 190cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= ~0x1fUL; 191cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= size & 0x1f; 192cc2d3216SMarc Zyngier } 193cc2d3216SMarc Zyngier 194cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 195cc2d3216SMarc Zyngier { 196cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~0xffffffffffffUL; 197cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= itt_addr & 0xffffffffff00UL; 198cc2d3216SMarc Zyngier } 199cc2d3216SMarc Zyngier 200cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 201cc2d3216SMarc Zyngier { 202cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~(1UL << 63); 203cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= ((u64)!!valid) << 63; 204cc2d3216SMarc Zyngier } 205cc2d3216SMarc Zyngier 206cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 207cc2d3216SMarc Zyngier { 208cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~(0xffffffffUL << 16); 209cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= (target_addr & (0xffffffffUL << 16)); 210cc2d3216SMarc Zyngier } 211cc2d3216SMarc Zyngier 212cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 213cc2d3216SMarc Zyngier { 214cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~0xffffUL; 215cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= col; 216cc2d3216SMarc Zyngier } 217cc2d3216SMarc Zyngier 218cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 219cc2d3216SMarc Zyngier { 220cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 221cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 222cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 223cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 224cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 225cc2d3216SMarc Zyngier } 226cc2d3216SMarc Zyngier 227cc2d3216SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_cmd_block *cmd, 228cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 229cc2d3216SMarc Zyngier { 230cc2d3216SMarc Zyngier unsigned long itt_addr; 231cc2d3216SMarc Zyngier u8 size = order_base_2(desc->its_mapd_cmd.dev->nr_ites); 232cc2d3216SMarc Zyngier 233cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 234cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 235cc2d3216SMarc Zyngier 236cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 237cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 238cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 239cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 240cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 241cc2d3216SMarc Zyngier 242cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 243cc2d3216SMarc Zyngier 244cc2d3216SMarc Zyngier return desc->its_mapd_cmd.dev->collection; 245cc2d3216SMarc Zyngier } 246cc2d3216SMarc Zyngier 247cc2d3216SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_cmd_block *cmd, 248cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 249cc2d3216SMarc Zyngier { 250cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 251cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 252cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 253cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 254cc2d3216SMarc Zyngier 255cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 256cc2d3216SMarc Zyngier 257cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 258cc2d3216SMarc Zyngier } 259cc2d3216SMarc Zyngier 260cc2d3216SMarc Zyngier static struct its_collection *its_build_mapvi_cmd(struct its_cmd_block *cmd, 261cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 262cc2d3216SMarc Zyngier { 263cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPVI); 264cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapvi_cmd.dev->device_id); 265cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_mapvi_cmd.event_id); 266cc2d3216SMarc Zyngier its_encode_phys_id(cmd, desc->its_mapvi_cmd.phys_id); 267cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapvi_cmd.dev->collection->col_id); 268cc2d3216SMarc Zyngier 269cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 270cc2d3216SMarc Zyngier 271cc2d3216SMarc Zyngier return desc->its_mapvi_cmd.dev->collection; 272cc2d3216SMarc Zyngier } 273cc2d3216SMarc Zyngier 274cc2d3216SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_cmd_block *cmd, 275cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 276cc2d3216SMarc Zyngier { 277cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 278cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 279cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.id); 280cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 281cc2d3216SMarc Zyngier 282cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 283cc2d3216SMarc Zyngier 284cc2d3216SMarc Zyngier return desc->its_movi_cmd.dev->collection; 285cc2d3216SMarc Zyngier } 286cc2d3216SMarc Zyngier 287cc2d3216SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_cmd_block *cmd, 288cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 289cc2d3216SMarc Zyngier { 290cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 291cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 292cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 293cc2d3216SMarc Zyngier 294cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 295cc2d3216SMarc Zyngier 296cc2d3216SMarc Zyngier return desc->its_discard_cmd.dev->collection; 297cc2d3216SMarc Zyngier } 298cc2d3216SMarc Zyngier 299cc2d3216SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_cmd_block *cmd, 300cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 301cc2d3216SMarc Zyngier { 302cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 303cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 304cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 305cc2d3216SMarc Zyngier 306cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 307cc2d3216SMarc Zyngier 308cc2d3216SMarc Zyngier return desc->its_inv_cmd.dev->collection; 309cc2d3216SMarc Zyngier } 310cc2d3216SMarc Zyngier 311cc2d3216SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd, 312cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 313cc2d3216SMarc Zyngier { 314cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 315cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 316cc2d3216SMarc Zyngier 317cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 318cc2d3216SMarc Zyngier 319cc2d3216SMarc Zyngier return NULL; 320cc2d3216SMarc Zyngier } 321cc2d3216SMarc Zyngier 322cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 323cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 324cc2d3216SMarc Zyngier { 325cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 326cc2d3216SMarc Zyngier } 327cc2d3216SMarc Zyngier 328cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 329cc2d3216SMarc Zyngier { 330cc2d3216SMarc Zyngier int widx; 331cc2d3216SMarc Zyngier int ridx; 332cc2d3216SMarc Zyngier 333cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 334cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 335cc2d3216SMarc Zyngier 336cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 337cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 338cc2d3216SMarc Zyngier return 1; 339cc2d3216SMarc Zyngier 340cc2d3216SMarc Zyngier return 0; 341cc2d3216SMarc Zyngier } 342cc2d3216SMarc Zyngier 343cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 344cc2d3216SMarc Zyngier { 345cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 346cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 347cc2d3216SMarc Zyngier 348cc2d3216SMarc Zyngier while (its_queue_full(its)) { 349cc2d3216SMarc Zyngier count--; 350cc2d3216SMarc Zyngier if (!count) { 351cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 352cc2d3216SMarc Zyngier return NULL; 353cc2d3216SMarc Zyngier } 354cc2d3216SMarc Zyngier cpu_relax(); 355cc2d3216SMarc Zyngier udelay(1); 356cc2d3216SMarc Zyngier } 357cc2d3216SMarc Zyngier 358cc2d3216SMarc Zyngier cmd = its->cmd_write++; 359cc2d3216SMarc Zyngier 360cc2d3216SMarc Zyngier /* Handle queue wrapping */ 361cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 362cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 363cc2d3216SMarc Zyngier 364cc2d3216SMarc Zyngier return cmd; 365cc2d3216SMarc Zyngier } 366cc2d3216SMarc Zyngier 367cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 368cc2d3216SMarc Zyngier { 369cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 370cc2d3216SMarc Zyngier 371cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 372cc2d3216SMarc Zyngier 373cc2d3216SMarc Zyngier return its->cmd_write; 374cc2d3216SMarc Zyngier } 375cc2d3216SMarc Zyngier 376cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 377cc2d3216SMarc Zyngier { 378cc2d3216SMarc Zyngier /* 379cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 380cc2d3216SMarc Zyngier * the ITS. 381cc2d3216SMarc Zyngier */ 382cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 383cc2d3216SMarc Zyngier __flush_dcache_area(cmd, sizeof(*cmd)); 384cc2d3216SMarc Zyngier else 385cc2d3216SMarc Zyngier dsb(ishst); 386cc2d3216SMarc Zyngier } 387cc2d3216SMarc Zyngier 388cc2d3216SMarc Zyngier static void its_wait_for_range_completion(struct its_node *its, 389cc2d3216SMarc Zyngier struct its_cmd_block *from, 390cc2d3216SMarc Zyngier struct its_cmd_block *to) 391cc2d3216SMarc Zyngier { 392cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 393cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 394cc2d3216SMarc Zyngier 395cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 396cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 397cc2d3216SMarc Zyngier 398cc2d3216SMarc Zyngier while (1) { 399cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 400cc2d3216SMarc Zyngier if (rd_idx >= to_idx || rd_idx < from_idx) 401cc2d3216SMarc Zyngier break; 402cc2d3216SMarc Zyngier 403cc2d3216SMarc Zyngier count--; 404cc2d3216SMarc Zyngier if (!count) { 405cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue timeout\n"); 406cc2d3216SMarc Zyngier return; 407cc2d3216SMarc Zyngier } 408cc2d3216SMarc Zyngier cpu_relax(); 409cc2d3216SMarc Zyngier udelay(1); 410cc2d3216SMarc Zyngier } 411cc2d3216SMarc Zyngier } 412cc2d3216SMarc Zyngier 413cc2d3216SMarc Zyngier static void its_send_single_command(struct its_node *its, 414cc2d3216SMarc Zyngier its_cmd_builder_t builder, 415cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 416cc2d3216SMarc Zyngier { 417cc2d3216SMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; 418cc2d3216SMarc Zyngier struct its_collection *sync_col; 419cc2d3216SMarc Zyngier 420cc2d3216SMarc Zyngier raw_spin_lock(&its->lock); 421cc2d3216SMarc Zyngier 422cc2d3216SMarc Zyngier cmd = its_allocate_entry(its); 423cc2d3216SMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ 424cc2d3216SMarc Zyngier pr_err_ratelimited("ITS can't allocate, dropping command\n"); 425cc2d3216SMarc Zyngier raw_spin_unlock(&its->lock); 426cc2d3216SMarc Zyngier return; 427cc2d3216SMarc Zyngier } 428cc2d3216SMarc Zyngier sync_col = builder(cmd, desc); 429cc2d3216SMarc Zyngier its_flush_cmd(its, cmd); 430cc2d3216SMarc Zyngier 431cc2d3216SMarc Zyngier if (sync_col) { 432cc2d3216SMarc Zyngier sync_cmd = its_allocate_entry(its); 433cc2d3216SMarc Zyngier if (!sync_cmd) { 434cc2d3216SMarc Zyngier pr_err_ratelimited("ITS can't SYNC, skipping\n"); 435cc2d3216SMarc Zyngier goto post; 436cc2d3216SMarc Zyngier } 437cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 438cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 439cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 440cc2d3216SMarc Zyngier its_flush_cmd(its, sync_cmd); 441cc2d3216SMarc Zyngier } 442cc2d3216SMarc Zyngier 443cc2d3216SMarc Zyngier post: 444cc2d3216SMarc Zyngier next_cmd = its_post_commands(its); 445cc2d3216SMarc Zyngier raw_spin_unlock(&its->lock); 446cc2d3216SMarc Zyngier 447cc2d3216SMarc Zyngier its_wait_for_range_completion(its, cmd, next_cmd); 448cc2d3216SMarc Zyngier } 449cc2d3216SMarc Zyngier 450cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 451cc2d3216SMarc Zyngier { 452cc2d3216SMarc Zyngier struct its_cmd_desc desc; 453cc2d3216SMarc Zyngier 454cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 455cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 456cc2d3216SMarc Zyngier 457cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 458cc2d3216SMarc Zyngier } 459cc2d3216SMarc Zyngier 460cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 461cc2d3216SMarc Zyngier { 462cc2d3216SMarc Zyngier struct its_cmd_desc desc; 463cc2d3216SMarc Zyngier 464cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 465cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 466cc2d3216SMarc Zyngier 467cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 468cc2d3216SMarc Zyngier } 469cc2d3216SMarc Zyngier 470cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 471cc2d3216SMarc Zyngier int valid) 472cc2d3216SMarc Zyngier { 473cc2d3216SMarc Zyngier struct its_cmd_desc desc; 474cc2d3216SMarc Zyngier 475cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 476cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 477cc2d3216SMarc Zyngier 478cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 479cc2d3216SMarc Zyngier } 480cc2d3216SMarc Zyngier 481cc2d3216SMarc Zyngier static void its_send_mapvi(struct its_device *dev, u32 irq_id, u32 id) 482cc2d3216SMarc Zyngier { 483cc2d3216SMarc Zyngier struct its_cmd_desc desc; 484cc2d3216SMarc Zyngier 485cc2d3216SMarc Zyngier desc.its_mapvi_cmd.dev = dev; 486cc2d3216SMarc Zyngier desc.its_mapvi_cmd.phys_id = irq_id; 487cc2d3216SMarc Zyngier desc.its_mapvi_cmd.event_id = id; 488cc2d3216SMarc Zyngier 489cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapvi_cmd, &desc); 490cc2d3216SMarc Zyngier } 491cc2d3216SMarc Zyngier 492cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 493cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 494cc2d3216SMarc Zyngier { 495cc2d3216SMarc Zyngier struct its_cmd_desc desc; 496cc2d3216SMarc Zyngier 497cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 498cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 499cc2d3216SMarc Zyngier desc.its_movi_cmd.id = id; 500cc2d3216SMarc Zyngier 501cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 502cc2d3216SMarc Zyngier } 503cc2d3216SMarc Zyngier 504cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 505cc2d3216SMarc Zyngier { 506cc2d3216SMarc Zyngier struct its_cmd_desc desc; 507cc2d3216SMarc Zyngier 508cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 509cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 510cc2d3216SMarc Zyngier 511cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 512cc2d3216SMarc Zyngier } 513cc2d3216SMarc Zyngier 514cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 515cc2d3216SMarc Zyngier { 516cc2d3216SMarc Zyngier struct its_cmd_desc desc; 517cc2d3216SMarc Zyngier 518cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 519cc2d3216SMarc Zyngier 520cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 521cc2d3216SMarc Zyngier } 522c48ed51cSMarc Zyngier 523c48ed51cSMarc Zyngier /* 524c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 525c48ed51cSMarc Zyngier */ 526c48ed51cSMarc Zyngier 527c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 528c48ed51cSMarc Zyngier { 529c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 530c48ed51cSMarc Zyngier return d->hwirq - its_dev->lpi_base; 531c48ed51cSMarc Zyngier } 532c48ed51cSMarc Zyngier 533c48ed51cSMarc Zyngier static void lpi_set_config(struct irq_data *d, bool enable) 534c48ed51cSMarc Zyngier { 535c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 536c48ed51cSMarc Zyngier irq_hw_number_t hwirq = d->hwirq; 537c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 538c48ed51cSMarc Zyngier u8 *cfg = page_address(gic_rdists->prop_page) + hwirq - 8192; 539c48ed51cSMarc Zyngier 540c48ed51cSMarc Zyngier if (enable) 541c48ed51cSMarc Zyngier *cfg |= LPI_PROP_ENABLED; 542c48ed51cSMarc Zyngier else 543c48ed51cSMarc Zyngier *cfg &= ~LPI_PROP_ENABLED; 544c48ed51cSMarc Zyngier 545c48ed51cSMarc Zyngier /* 546c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 547c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 548c48ed51cSMarc Zyngier * Humpf... 549c48ed51cSMarc Zyngier */ 550c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 551c48ed51cSMarc Zyngier __flush_dcache_area(cfg, sizeof(*cfg)); 552c48ed51cSMarc Zyngier else 553c48ed51cSMarc Zyngier dsb(ishst); 554c48ed51cSMarc Zyngier its_send_inv(its_dev, id); 555c48ed51cSMarc Zyngier } 556c48ed51cSMarc Zyngier 557c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 558c48ed51cSMarc Zyngier { 559c48ed51cSMarc Zyngier lpi_set_config(d, false); 560c48ed51cSMarc Zyngier } 561c48ed51cSMarc Zyngier 562c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 563c48ed51cSMarc Zyngier { 564c48ed51cSMarc Zyngier lpi_set_config(d, true); 565c48ed51cSMarc Zyngier } 566c48ed51cSMarc Zyngier 567c48ed51cSMarc Zyngier static void its_eoi_irq(struct irq_data *d) 568c48ed51cSMarc Zyngier { 569c48ed51cSMarc Zyngier gic_write_eoir(d->hwirq); 570c48ed51cSMarc Zyngier } 571c48ed51cSMarc Zyngier 572c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 573c48ed51cSMarc Zyngier bool force) 574c48ed51cSMarc Zyngier { 575c48ed51cSMarc Zyngier unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask); 576c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 577c48ed51cSMarc Zyngier struct its_collection *target_col; 578c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 579c48ed51cSMarc Zyngier 580c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 581c48ed51cSMarc Zyngier return -EINVAL; 582c48ed51cSMarc Zyngier 583c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 584c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 585c48ed51cSMarc Zyngier its_dev->collection = target_col; 586c48ed51cSMarc Zyngier 587c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 588c48ed51cSMarc Zyngier } 589c48ed51cSMarc Zyngier 590b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 591b48ac83dSMarc Zyngier { 592b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 593b48ac83dSMarc Zyngier struct its_node *its; 594b48ac83dSMarc Zyngier u64 addr; 595b48ac83dSMarc Zyngier 596b48ac83dSMarc Zyngier its = its_dev->its; 597b48ac83dSMarc Zyngier addr = its->phys_base + GITS_TRANSLATER; 598b48ac83dSMarc Zyngier 599b48ac83dSMarc Zyngier msg->address_lo = addr & ((1UL << 32) - 1); 600b48ac83dSMarc Zyngier msg->address_hi = addr >> 32; 601b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 602b48ac83dSMarc Zyngier } 603b48ac83dSMarc Zyngier 604c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 605c48ed51cSMarc Zyngier .name = "ITS", 606c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 607c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 608c48ed51cSMarc Zyngier .irq_eoi = its_eoi_irq, 609c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 610b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 611b48ac83dSMarc Zyngier }; 612b48ac83dSMarc Zyngier 613b48ac83dSMarc Zyngier static void its_mask_msi_irq(struct irq_data *d) 614b48ac83dSMarc Zyngier { 615b48ac83dSMarc Zyngier pci_msi_mask_irq(d); 616b48ac83dSMarc Zyngier irq_chip_mask_parent(d); 617b48ac83dSMarc Zyngier } 618b48ac83dSMarc Zyngier 619b48ac83dSMarc Zyngier static void its_unmask_msi_irq(struct irq_data *d) 620b48ac83dSMarc Zyngier { 621b48ac83dSMarc Zyngier pci_msi_unmask_irq(d); 622b48ac83dSMarc Zyngier irq_chip_unmask_parent(d); 623b48ac83dSMarc Zyngier } 624b48ac83dSMarc Zyngier 625b48ac83dSMarc Zyngier static struct irq_chip its_msi_irq_chip = { 626b48ac83dSMarc Zyngier .name = "ITS-MSI", 627b48ac83dSMarc Zyngier .irq_unmask = its_unmask_msi_irq, 628b48ac83dSMarc Zyngier .irq_mask = its_mask_msi_irq, 629b48ac83dSMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 630b48ac83dSMarc Zyngier .irq_write_msi_msg = pci_msi_domain_write_msg, 631c48ed51cSMarc Zyngier }; 632bf9529f8SMarc Zyngier 633bf9529f8SMarc Zyngier /* 634bf9529f8SMarc Zyngier * How we allocate LPIs: 635bf9529f8SMarc Zyngier * 636bf9529f8SMarc Zyngier * The GIC has id_bits bits for interrupt identifiers. From there, we 637bf9529f8SMarc Zyngier * must subtract 8192 which are reserved for SGIs/PPIs/SPIs. Then, as 638bf9529f8SMarc Zyngier * we allocate LPIs by chunks of 32, we can shift the whole thing by 5 639bf9529f8SMarc Zyngier * bits to the right. 640bf9529f8SMarc Zyngier * 641bf9529f8SMarc Zyngier * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations. 642bf9529f8SMarc Zyngier */ 643bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK_SHIFT 5 644bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK (1 << IRQS_PER_CHUNK_SHIFT) 645bf9529f8SMarc Zyngier 646bf9529f8SMarc Zyngier static unsigned long *lpi_bitmap; 647bf9529f8SMarc Zyngier static u32 lpi_chunks; 648bf9529f8SMarc Zyngier static DEFINE_SPINLOCK(lpi_lock); 649bf9529f8SMarc Zyngier 650bf9529f8SMarc Zyngier static int its_lpi_to_chunk(int lpi) 651bf9529f8SMarc Zyngier { 652bf9529f8SMarc Zyngier return (lpi - 8192) >> IRQS_PER_CHUNK_SHIFT; 653bf9529f8SMarc Zyngier } 654bf9529f8SMarc Zyngier 655bf9529f8SMarc Zyngier static int its_chunk_to_lpi(int chunk) 656bf9529f8SMarc Zyngier { 657bf9529f8SMarc Zyngier return (chunk << IRQS_PER_CHUNK_SHIFT) + 8192; 658bf9529f8SMarc Zyngier } 659bf9529f8SMarc Zyngier 660bf9529f8SMarc Zyngier static int its_lpi_init(u32 id_bits) 661bf9529f8SMarc Zyngier { 662bf9529f8SMarc Zyngier lpi_chunks = its_lpi_to_chunk(1UL << id_bits); 663bf9529f8SMarc Zyngier 664bf9529f8SMarc Zyngier lpi_bitmap = kzalloc(BITS_TO_LONGS(lpi_chunks) * sizeof(long), 665bf9529f8SMarc Zyngier GFP_KERNEL); 666bf9529f8SMarc Zyngier if (!lpi_bitmap) { 667bf9529f8SMarc Zyngier lpi_chunks = 0; 668bf9529f8SMarc Zyngier return -ENOMEM; 669bf9529f8SMarc Zyngier } 670bf9529f8SMarc Zyngier 671bf9529f8SMarc Zyngier pr_info("ITS: Allocated %d chunks for LPIs\n", (int)lpi_chunks); 672bf9529f8SMarc Zyngier return 0; 673bf9529f8SMarc Zyngier } 674bf9529f8SMarc Zyngier 675bf9529f8SMarc Zyngier static unsigned long *its_lpi_alloc_chunks(int nr_irqs, int *base, int *nr_ids) 676bf9529f8SMarc Zyngier { 677bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 678bf9529f8SMarc Zyngier int chunk_id; 679bf9529f8SMarc Zyngier int nr_chunks; 680bf9529f8SMarc Zyngier int i; 681bf9529f8SMarc Zyngier 682bf9529f8SMarc Zyngier nr_chunks = DIV_ROUND_UP(nr_irqs, IRQS_PER_CHUNK); 683bf9529f8SMarc Zyngier 684bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 685bf9529f8SMarc Zyngier 686bf9529f8SMarc Zyngier do { 687bf9529f8SMarc Zyngier chunk_id = bitmap_find_next_zero_area(lpi_bitmap, lpi_chunks, 688bf9529f8SMarc Zyngier 0, nr_chunks, 0); 689bf9529f8SMarc Zyngier if (chunk_id < lpi_chunks) 690bf9529f8SMarc Zyngier break; 691bf9529f8SMarc Zyngier 692bf9529f8SMarc Zyngier nr_chunks--; 693bf9529f8SMarc Zyngier } while (nr_chunks > 0); 694bf9529f8SMarc Zyngier 695bf9529f8SMarc Zyngier if (!nr_chunks) 696bf9529f8SMarc Zyngier goto out; 697bf9529f8SMarc Zyngier 698bf9529f8SMarc Zyngier bitmap = kzalloc(BITS_TO_LONGS(nr_chunks * IRQS_PER_CHUNK) * sizeof (long), 699bf9529f8SMarc Zyngier GFP_ATOMIC); 700bf9529f8SMarc Zyngier if (!bitmap) 701bf9529f8SMarc Zyngier goto out; 702bf9529f8SMarc Zyngier 703bf9529f8SMarc Zyngier for (i = 0; i < nr_chunks; i++) 704bf9529f8SMarc Zyngier set_bit(chunk_id + i, lpi_bitmap); 705bf9529f8SMarc Zyngier 706bf9529f8SMarc Zyngier *base = its_chunk_to_lpi(chunk_id); 707bf9529f8SMarc Zyngier *nr_ids = nr_chunks * IRQS_PER_CHUNK; 708bf9529f8SMarc Zyngier 709bf9529f8SMarc Zyngier out: 710bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 711bf9529f8SMarc Zyngier 712bf9529f8SMarc Zyngier return bitmap; 713bf9529f8SMarc Zyngier } 714bf9529f8SMarc Zyngier 715bf9529f8SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, int base, int nr_ids) 716bf9529f8SMarc Zyngier { 717bf9529f8SMarc Zyngier int lpi; 718bf9529f8SMarc Zyngier 719bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 720bf9529f8SMarc Zyngier 721bf9529f8SMarc Zyngier for (lpi = base; lpi < (base + nr_ids); lpi += IRQS_PER_CHUNK) { 722bf9529f8SMarc Zyngier int chunk = its_lpi_to_chunk(lpi); 723bf9529f8SMarc Zyngier BUG_ON(chunk > lpi_chunks); 724bf9529f8SMarc Zyngier if (test_bit(chunk, lpi_bitmap)) { 725bf9529f8SMarc Zyngier clear_bit(chunk, lpi_bitmap); 726bf9529f8SMarc Zyngier } else { 727bf9529f8SMarc Zyngier pr_err("Bad LPI chunk %d\n", chunk); 728bf9529f8SMarc Zyngier } 729bf9529f8SMarc Zyngier } 730bf9529f8SMarc Zyngier 731bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 732bf9529f8SMarc Zyngier 733bf9529f8SMarc Zyngier kfree(bitmap); 734bf9529f8SMarc Zyngier } 7351ac19ca6SMarc Zyngier 7361ac19ca6SMarc Zyngier /* 7371ac19ca6SMarc Zyngier * We allocate 64kB for PROPBASE. That gives us at most 64K LPIs to 7381ac19ca6SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 7391ac19ca6SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 7401ac19ca6SMarc Zyngier */ 7411ac19ca6SMarc Zyngier #define LPI_PROPBASE_SZ SZ_64K 7421ac19ca6SMarc Zyngier #define LPI_PENDBASE_SZ (LPI_PROPBASE_SZ / 8 + SZ_1K) 7431ac19ca6SMarc Zyngier 7441ac19ca6SMarc Zyngier /* 7451ac19ca6SMarc Zyngier * This is how many bits of ID we need, including the useless ones. 7461ac19ca6SMarc Zyngier */ 7471ac19ca6SMarc Zyngier #define LPI_NRBITS ilog2(LPI_PROPBASE_SZ + SZ_8K) 7481ac19ca6SMarc Zyngier 7491ac19ca6SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 7501ac19ca6SMarc Zyngier 7511ac19ca6SMarc Zyngier static int __init its_alloc_lpi_tables(void) 7521ac19ca6SMarc Zyngier { 7531ac19ca6SMarc Zyngier phys_addr_t paddr; 7541ac19ca6SMarc Zyngier 7551ac19ca6SMarc Zyngier gic_rdists->prop_page = alloc_pages(GFP_NOWAIT, 7561ac19ca6SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 7571ac19ca6SMarc Zyngier if (!gic_rdists->prop_page) { 7581ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 7591ac19ca6SMarc Zyngier return -ENOMEM; 7601ac19ca6SMarc Zyngier } 7611ac19ca6SMarc Zyngier 7621ac19ca6SMarc Zyngier paddr = page_to_phys(gic_rdists->prop_page); 7631ac19ca6SMarc Zyngier pr_info("GIC: using LPI property table @%pa\n", &paddr); 7641ac19ca6SMarc Zyngier 7651ac19ca6SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 7661ac19ca6SMarc Zyngier memset(page_address(gic_rdists->prop_page), 7671ac19ca6SMarc Zyngier LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, 7681ac19ca6SMarc Zyngier LPI_PROPBASE_SZ); 7691ac19ca6SMarc Zyngier 7701ac19ca6SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 7711ac19ca6SMarc Zyngier __flush_dcache_area(page_address(gic_rdists->prop_page), LPI_PROPBASE_SZ); 7721ac19ca6SMarc Zyngier 7731ac19ca6SMarc Zyngier return 0; 7741ac19ca6SMarc Zyngier } 7751ac19ca6SMarc Zyngier 7761ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 7771ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 7781ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 7791ac19ca6SMarc Zyngier [GITS_BASER_TYPE_CPU] = "Physical CPUs", 7801ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 7811ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 7821ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 7831ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 7841ac19ca6SMarc Zyngier }; 7851ac19ca6SMarc Zyngier 7861ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 7871ac19ca6SMarc Zyngier { 7881ac19ca6SMarc Zyngier int i; 7891ac19ca6SMarc Zyngier 7901ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 7911ac19ca6SMarc Zyngier if (its->tables[i]) { 7921ac19ca6SMarc Zyngier free_page((unsigned long)its->tables[i]); 7931ac19ca6SMarc Zyngier its->tables[i] = NULL; 7941ac19ca6SMarc Zyngier } 7951ac19ca6SMarc Zyngier } 7961ac19ca6SMarc Zyngier } 7971ac19ca6SMarc Zyngier 7981ac19ca6SMarc Zyngier static int its_alloc_tables(struct its_node *its) 7991ac19ca6SMarc Zyngier { 8001ac19ca6SMarc Zyngier int err; 8011ac19ca6SMarc Zyngier int i; 8021ac19ca6SMarc Zyngier int psz = PAGE_SIZE; 8031ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 8041ac19ca6SMarc Zyngier 8051ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 8061ac19ca6SMarc Zyngier u64 val = readq_relaxed(its->base + GITS_BASER + i * 8); 8071ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 8081ac19ca6SMarc Zyngier u64 entry_size = GITS_BASER_ENTRY_SIZE(val); 8091ac19ca6SMarc Zyngier u64 tmp; 8101ac19ca6SMarc Zyngier void *base; 8111ac19ca6SMarc Zyngier 8121ac19ca6SMarc Zyngier if (type == GITS_BASER_TYPE_NONE) 8131ac19ca6SMarc Zyngier continue; 8141ac19ca6SMarc Zyngier 8151ac19ca6SMarc Zyngier /* We're lazy and only allocate a single page for now */ 8161ac19ca6SMarc Zyngier base = (void *)get_zeroed_page(GFP_KERNEL); 8171ac19ca6SMarc Zyngier if (!base) { 8181ac19ca6SMarc Zyngier err = -ENOMEM; 8191ac19ca6SMarc Zyngier goto out_free; 8201ac19ca6SMarc Zyngier } 8211ac19ca6SMarc Zyngier 8221ac19ca6SMarc Zyngier its->tables[i] = base; 8231ac19ca6SMarc Zyngier 8241ac19ca6SMarc Zyngier retry_baser: 8251ac19ca6SMarc Zyngier val = (virt_to_phys(base) | 8261ac19ca6SMarc Zyngier (type << GITS_BASER_TYPE_SHIFT) | 8271ac19ca6SMarc Zyngier ((entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 8281ac19ca6SMarc Zyngier GITS_BASER_WaWb | 8291ac19ca6SMarc Zyngier shr | 8301ac19ca6SMarc Zyngier GITS_BASER_VALID); 8311ac19ca6SMarc Zyngier 8321ac19ca6SMarc Zyngier switch (psz) { 8331ac19ca6SMarc Zyngier case SZ_4K: 8341ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_4K; 8351ac19ca6SMarc Zyngier break; 8361ac19ca6SMarc Zyngier case SZ_16K: 8371ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_16K; 8381ac19ca6SMarc Zyngier break; 8391ac19ca6SMarc Zyngier case SZ_64K: 8401ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_64K; 8411ac19ca6SMarc Zyngier break; 8421ac19ca6SMarc Zyngier } 8431ac19ca6SMarc Zyngier 8441ac19ca6SMarc Zyngier val |= (PAGE_SIZE / psz) - 1; 8451ac19ca6SMarc Zyngier 8461ac19ca6SMarc Zyngier writeq_relaxed(val, its->base + GITS_BASER + i * 8); 8471ac19ca6SMarc Zyngier tmp = readq_relaxed(its->base + GITS_BASER + i * 8); 8481ac19ca6SMarc Zyngier 8491ac19ca6SMarc Zyngier if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 8501ac19ca6SMarc Zyngier /* 8511ac19ca6SMarc Zyngier * Shareability didn't stick. Just use 8521ac19ca6SMarc Zyngier * whatever the read reported, which is likely 8531ac19ca6SMarc Zyngier * to be the only thing this redistributor 8541ac19ca6SMarc Zyngier * supports. 8551ac19ca6SMarc Zyngier */ 8561ac19ca6SMarc Zyngier shr = tmp & GITS_BASER_SHAREABILITY_MASK; 8571ac19ca6SMarc Zyngier goto retry_baser; 8581ac19ca6SMarc Zyngier } 8591ac19ca6SMarc Zyngier 8601ac19ca6SMarc Zyngier if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 8611ac19ca6SMarc Zyngier /* 8621ac19ca6SMarc Zyngier * Page size didn't stick. Let's try a smaller 8631ac19ca6SMarc Zyngier * size and retry. If we reach 4K, then 8641ac19ca6SMarc Zyngier * something is horribly wrong... 8651ac19ca6SMarc Zyngier */ 8661ac19ca6SMarc Zyngier switch (psz) { 8671ac19ca6SMarc Zyngier case SZ_16K: 8681ac19ca6SMarc Zyngier psz = SZ_4K; 8691ac19ca6SMarc Zyngier goto retry_baser; 8701ac19ca6SMarc Zyngier case SZ_64K: 8711ac19ca6SMarc Zyngier psz = SZ_16K; 8721ac19ca6SMarc Zyngier goto retry_baser; 8731ac19ca6SMarc Zyngier } 8741ac19ca6SMarc Zyngier } 8751ac19ca6SMarc Zyngier 8761ac19ca6SMarc Zyngier if (val != tmp) { 8771ac19ca6SMarc Zyngier pr_err("ITS: %s: GITS_BASER%d doesn't stick: %lx %lx\n", 8781ac19ca6SMarc Zyngier its->msi_chip.of_node->full_name, i, 8791ac19ca6SMarc Zyngier (unsigned long) val, (unsigned long) tmp); 8801ac19ca6SMarc Zyngier err = -ENXIO; 8811ac19ca6SMarc Zyngier goto out_free; 8821ac19ca6SMarc Zyngier } 8831ac19ca6SMarc Zyngier 8841ac19ca6SMarc Zyngier pr_info("ITS: allocated %d %s @%lx (psz %dK, shr %d)\n", 8851ac19ca6SMarc Zyngier (int)(PAGE_SIZE / entry_size), 8861ac19ca6SMarc Zyngier its_base_type_string[type], 8871ac19ca6SMarc Zyngier (unsigned long)virt_to_phys(base), 8881ac19ca6SMarc Zyngier psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 8891ac19ca6SMarc Zyngier } 8901ac19ca6SMarc Zyngier 8911ac19ca6SMarc Zyngier return 0; 8921ac19ca6SMarc Zyngier 8931ac19ca6SMarc Zyngier out_free: 8941ac19ca6SMarc Zyngier its_free_tables(its); 8951ac19ca6SMarc Zyngier 8961ac19ca6SMarc Zyngier return err; 8971ac19ca6SMarc Zyngier } 8981ac19ca6SMarc Zyngier 8991ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 9001ac19ca6SMarc Zyngier { 9011ac19ca6SMarc Zyngier its->collections = kzalloc(nr_cpu_ids * sizeof(*its->collections), 9021ac19ca6SMarc Zyngier GFP_KERNEL); 9031ac19ca6SMarc Zyngier if (!its->collections) 9041ac19ca6SMarc Zyngier return -ENOMEM; 9051ac19ca6SMarc Zyngier 9061ac19ca6SMarc Zyngier return 0; 9071ac19ca6SMarc Zyngier } 9081ac19ca6SMarc Zyngier 9091ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 9101ac19ca6SMarc Zyngier { 9111ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 9121ac19ca6SMarc Zyngier struct page *pend_page; 9131ac19ca6SMarc Zyngier u64 val, tmp; 9141ac19ca6SMarc Zyngier 9151ac19ca6SMarc Zyngier /* If we didn't allocate the pending table yet, do it now */ 9161ac19ca6SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 9171ac19ca6SMarc Zyngier if (!pend_page) { 9181ac19ca6SMarc Zyngier phys_addr_t paddr; 9191ac19ca6SMarc Zyngier /* 9201ac19ca6SMarc Zyngier * The pending pages have to be at least 64kB aligned, 9211ac19ca6SMarc Zyngier * hence the 'max(LPI_PENDBASE_SZ, SZ_64K)' below. 9221ac19ca6SMarc Zyngier */ 9231ac19ca6SMarc Zyngier pend_page = alloc_pages(GFP_NOWAIT | __GFP_ZERO, 9241ac19ca6SMarc Zyngier get_order(max(LPI_PENDBASE_SZ, SZ_64K))); 9251ac19ca6SMarc Zyngier if (!pend_page) { 9261ac19ca6SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", 9271ac19ca6SMarc Zyngier smp_processor_id()); 9281ac19ca6SMarc Zyngier return; 9291ac19ca6SMarc Zyngier } 9301ac19ca6SMarc Zyngier 9311ac19ca6SMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 9321ac19ca6SMarc Zyngier __flush_dcache_area(page_address(pend_page), LPI_PENDBASE_SZ); 9331ac19ca6SMarc Zyngier 9341ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 9351ac19ca6SMarc Zyngier pr_info("CPU%d: using LPI pending table @%pa\n", 9361ac19ca6SMarc Zyngier smp_processor_id(), &paddr); 9371ac19ca6SMarc Zyngier gic_data_rdist()->pend_page = pend_page; 9381ac19ca6SMarc Zyngier } 9391ac19ca6SMarc Zyngier 9401ac19ca6SMarc Zyngier /* Disable LPIs */ 9411ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 9421ac19ca6SMarc Zyngier val &= ~GICR_CTLR_ENABLE_LPIS; 9431ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 9441ac19ca6SMarc Zyngier 9451ac19ca6SMarc Zyngier /* 9461ac19ca6SMarc Zyngier * Make sure any change to the table is observable by the GIC. 9471ac19ca6SMarc Zyngier */ 9481ac19ca6SMarc Zyngier dsb(sy); 9491ac19ca6SMarc Zyngier 9501ac19ca6SMarc Zyngier /* set PROPBASE */ 9511ac19ca6SMarc Zyngier val = (page_to_phys(gic_rdists->prop_page) | 9521ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 9531ac19ca6SMarc Zyngier GICR_PROPBASER_WaWb | 9541ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 9551ac19ca6SMarc Zyngier 9561ac19ca6SMarc Zyngier writeq_relaxed(val, rbase + GICR_PROPBASER); 9571ac19ca6SMarc Zyngier tmp = readq_relaxed(rbase + GICR_PROPBASER); 9581ac19ca6SMarc Zyngier 9591ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 9601ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 9611ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 9621ac19ca6SMarc Zyngier } 9631ac19ca6SMarc Zyngier 9641ac19ca6SMarc Zyngier /* set PENDBASE */ 9651ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 9661ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 9671ac19ca6SMarc Zyngier GICR_PROPBASER_WaWb); 9681ac19ca6SMarc Zyngier 9691ac19ca6SMarc Zyngier writeq_relaxed(val, rbase + GICR_PENDBASER); 9701ac19ca6SMarc Zyngier 9711ac19ca6SMarc Zyngier /* Enable LPIs */ 9721ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 9731ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 9741ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 9751ac19ca6SMarc Zyngier 9761ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 9771ac19ca6SMarc Zyngier dsb(sy); 9781ac19ca6SMarc Zyngier } 9791ac19ca6SMarc Zyngier 9801ac19ca6SMarc Zyngier static void its_cpu_init_collection(void) 9811ac19ca6SMarc Zyngier { 9821ac19ca6SMarc Zyngier struct its_node *its; 9831ac19ca6SMarc Zyngier int cpu; 9841ac19ca6SMarc Zyngier 9851ac19ca6SMarc Zyngier spin_lock(&its_lock); 9861ac19ca6SMarc Zyngier cpu = smp_processor_id(); 9871ac19ca6SMarc Zyngier 9881ac19ca6SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 9891ac19ca6SMarc Zyngier u64 target; 9901ac19ca6SMarc Zyngier 9911ac19ca6SMarc Zyngier /* 9921ac19ca6SMarc Zyngier * We now have to bind each collection to its target 9931ac19ca6SMarc Zyngier * redistributor. 9941ac19ca6SMarc Zyngier */ 9951ac19ca6SMarc Zyngier if (readq_relaxed(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 9961ac19ca6SMarc Zyngier /* 9971ac19ca6SMarc Zyngier * This ITS wants the physical address of the 9981ac19ca6SMarc Zyngier * redistributor. 9991ac19ca6SMarc Zyngier */ 10001ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 10011ac19ca6SMarc Zyngier } else { 10021ac19ca6SMarc Zyngier /* 10031ac19ca6SMarc Zyngier * This ITS wants a linear CPU number. 10041ac19ca6SMarc Zyngier */ 10051ac19ca6SMarc Zyngier target = readq_relaxed(gic_data_rdist_rd_base() + GICR_TYPER); 10061ac19ca6SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target); 10071ac19ca6SMarc Zyngier } 10081ac19ca6SMarc Zyngier 10091ac19ca6SMarc Zyngier /* Perform collection mapping */ 10101ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 10111ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 10121ac19ca6SMarc Zyngier 10131ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 10141ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 10151ac19ca6SMarc Zyngier } 10161ac19ca6SMarc Zyngier 10171ac19ca6SMarc Zyngier spin_unlock(&its_lock); 10181ac19ca6SMarc Zyngier } 101984a6a2e7SMarc Zyngier 102084a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 102184a6a2e7SMarc Zyngier { 102284a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 102384a6a2e7SMarc Zyngier 102484a6a2e7SMarc Zyngier raw_spin_lock(&its->lock); 102584a6a2e7SMarc Zyngier 102684a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 102784a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 102884a6a2e7SMarc Zyngier its_dev = tmp; 102984a6a2e7SMarc Zyngier break; 103084a6a2e7SMarc Zyngier } 103184a6a2e7SMarc Zyngier } 103284a6a2e7SMarc Zyngier 103384a6a2e7SMarc Zyngier raw_spin_unlock(&its->lock); 103484a6a2e7SMarc Zyngier 103584a6a2e7SMarc Zyngier return its_dev; 103684a6a2e7SMarc Zyngier } 103784a6a2e7SMarc Zyngier 103884a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 103984a6a2e7SMarc Zyngier int nvecs) 104084a6a2e7SMarc Zyngier { 104184a6a2e7SMarc Zyngier struct its_device *dev; 104284a6a2e7SMarc Zyngier unsigned long *lpi_map; 104384a6a2e7SMarc Zyngier void *itt; 104484a6a2e7SMarc Zyngier int lpi_base; 104584a6a2e7SMarc Zyngier int nr_lpis; 104684a6a2e7SMarc Zyngier int cpu; 104784a6a2e7SMarc Zyngier int sz; 104884a6a2e7SMarc Zyngier 104984a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 105084a6a2e7SMarc Zyngier sz = nvecs * its->ite_size; 105184a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 105284a6a2e7SMarc Zyngier itt = kmalloc(sz, GFP_KERNEL); 105384a6a2e7SMarc Zyngier lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 105484a6a2e7SMarc Zyngier 105584a6a2e7SMarc Zyngier if (!dev || !itt || !lpi_map) { 105684a6a2e7SMarc Zyngier kfree(dev); 105784a6a2e7SMarc Zyngier kfree(itt); 105884a6a2e7SMarc Zyngier kfree(lpi_map); 105984a6a2e7SMarc Zyngier return NULL; 106084a6a2e7SMarc Zyngier } 106184a6a2e7SMarc Zyngier 106284a6a2e7SMarc Zyngier dev->its = its; 106384a6a2e7SMarc Zyngier dev->itt = itt; 106484a6a2e7SMarc Zyngier dev->nr_ites = nvecs; 106584a6a2e7SMarc Zyngier dev->lpi_map = lpi_map; 106684a6a2e7SMarc Zyngier dev->lpi_base = lpi_base; 106784a6a2e7SMarc Zyngier dev->nr_lpis = nr_lpis; 106884a6a2e7SMarc Zyngier dev->device_id = dev_id; 106984a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 107084a6a2e7SMarc Zyngier 107184a6a2e7SMarc Zyngier raw_spin_lock(&its->lock); 107284a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 107384a6a2e7SMarc Zyngier raw_spin_unlock(&its->lock); 107484a6a2e7SMarc Zyngier 107584a6a2e7SMarc Zyngier /* Bind the device to the first possible CPU */ 107684a6a2e7SMarc Zyngier cpu = cpumask_first(cpu_online_mask); 107784a6a2e7SMarc Zyngier dev->collection = &its->collections[cpu]; 107884a6a2e7SMarc Zyngier 107984a6a2e7SMarc Zyngier /* Map device to its ITT */ 108084a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 108184a6a2e7SMarc Zyngier 108284a6a2e7SMarc Zyngier return dev; 108384a6a2e7SMarc Zyngier } 108484a6a2e7SMarc Zyngier 108584a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 108684a6a2e7SMarc Zyngier { 108784a6a2e7SMarc Zyngier raw_spin_lock(&its_dev->its->lock); 108884a6a2e7SMarc Zyngier list_del(&its_dev->entry); 108984a6a2e7SMarc Zyngier raw_spin_unlock(&its_dev->its->lock); 109084a6a2e7SMarc Zyngier kfree(its_dev->itt); 109184a6a2e7SMarc Zyngier kfree(its_dev); 109284a6a2e7SMarc Zyngier } 1093b48ac83dSMarc Zyngier 1094b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 1095b48ac83dSMarc Zyngier { 1096b48ac83dSMarc Zyngier int idx; 1097b48ac83dSMarc Zyngier 1098b48ac83dSMarc Zyngier idx = find_first_zero_bit(dev->lpi_map, dev->nr_lpis); 1099b48ac83dSMarc Zyngier if (idx == dev->nr_lpis) 1100b48ac83dSMarc Zyngier return -ENOSPC; 1101b48ac83dSMarc Zyngier 1102b48ac83dSMarc Zyngier *hwirq = dev->lpi_base + idx; 1103b48ac83dSMarc Zyngier set_bit(idx, dev->lpi_map); 1104b48ac83dSMarc Zyngier 1105b48ac83dSMarc Zyngier /* Map the GIC irq ID to the device */ 1106b48ac83dSMarc Zyngier its_send_mapvi(dev, *hwirq, idx); 1107b48ac83dSMarc Zyngier 1108b48ac83dSMarc Zyngier return 0; 1109b48ac83dSMarc Zyngier } 1110b48ac83dSMarc Zyngier 1111b48ac83dSMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 1112b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 1113b48ac83dSMarc Zyngier { 1114b48ac83dSMarc Zyngier struct pci_dev *pdev; 1115b48ac83dSMarc Zyngier struct its_node *its; 1116b48ac83dSMarc Zyngier u32 dev_id; 1117b48ac83dSMarc Zyngier struct its_device *its_dev; 1118b48ac83dSMarc Zyngier 1119b48ac83dSMarc Zyngier if (!dev_is_pci(dev)) 1120b48ac83dSMarc Zyngier return -EINVAL; 1121b48ac83dSMarc Zyngier 1122b48ac83dSMarc Zyngier pdev = to_pci_dev(dev); 1123b48ac83dSMarc Zyngier dev_id = PCI_DEVID(pdev->bus->number, pdev->devfn); 1124b48ac83dSMarc Zyngier its = domain->parent->host_data; 1125b48ac83dSMarc Zyngier 1126b48ac83dSMarc Zyngier its_dev = its_find_device(its, dev_id); 1127b48ac83dSMarc Zyngier if (WARN_ON(its_dev)) 1128b48ac83dSMarc Zyngier return -EINVAL; 1129b48ac83dSMarc Zyngier 1130b48ac83dSMarc Zyngier its_dev = its_create_device(its, dev_id, nvec); 1131b48ac83dSMarc Zyngier if (!its_dev) 1132b48ac83dSMarc Zyngier return -ENOMEM; 1133b48ac83dSMarc Zyngier 1134b48ac83dSMarc Zyngier dev_dbg(&pdev->dev, "ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 1135b48ac83dSMarc Zyngier 1136b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 1137b48ac83dSMarc Zyngier info->scratchpad[1].ptr = dev; 1138b48ac83dSMarc Zyngier return 0; 1139b48ac83dSMarc Zyngier } 1140b48ac83dSMarc Zyngier 1141b48ac83dSMarc Zyngier static struct msi_domain_ops its_pci_msi_ops = { 1142b48ac83dSMarc Zyngier .msi_prepare = its_msi_prepare, 1143b48ac83dSMarc Zyngier }; 1144b48ac83dSMarc Zyngier 1145b48ac83dSMarc Zyngier static struct msi_domain_info its_pci_msi_domain_info = { 1146b48ac83dSMarc Zyngier .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | 1147b48ac83dSMarc Zyngier MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), 1148b48ac83dSMarc Zyngier .ops = &its_pci_msi_ops, 1149b48ac83dSMarc Zyngier .chip = &its_msi_irq_chip, 1150b48ac83dSMarc Zyngier }; 1151b48ac83dSMarc Zyngier 1152b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 1153b48ac83dSMarc Zyngier unsigned int virq, 1154b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 1155b48ac83dSMarc Zyngier { 1156b48ac83dSMarc Zyngier struct of_phandle_args args; 1157b48ac83dSMarc Zyngier 1158b48ac83dSMarc Zyngier args.np = domain->parent->of_node; 1159b48ac83dSMarc Zyngier args.args_count = 3; 1160b48ac83dSMarc Zyngier args.args[0] = GIC_IRQ_TYPE_LPI; 1161b48ac83dSMarc Zyngier args.args[1] = hwirq; 1162b48ac83dSMarc Zyngier args.args[2] = IRQ_TYPE_EDGE_RISING; 1163b48ac83dSMarc Zyngier 1164b48ac83dSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &args); 1165b48ac83dSMarc Zyngier } 1166b48ac83dSMarc Zyngier 1167b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 1168b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 1169b48ac83dSMarc Zyngier { 1170b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 1171b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 1172b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 1173b48ac83dSMarc Zyngier int err; 1174b48ac83dSMarc Zyngier int i; 1175b48ac83dSMarc Zyngier 1176b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1177b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 1178b48ac83dSMarc Zyngier if (err) 1179b48ac83dSMarc Zyngier return err; 1180b48ac83dSMarc Zyngier 1181b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 1182b48ac83dSMarc Zyngier if (err) 1183b48ac83dSMarc Zyngier return err; 1184b48ac83dSMarc Zyngier 1185b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 1186b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 1187b48ac83dSMarc Zyngier dev_dbg(info->scratchpad[1].ptr, "ID:%d pID:%d vID:%d\n", 1188b48ac83dSMarc Zyngier (int)(hwirq - its_dev->lpi_base), (int)hwirq, virq + i); 1189b48ac83dSMarc Zyngier } 1190b48ac83dSMarc Zyngier 1191b48ac83dSMarc Zyngier return 0; 1192b48ac83dSMarc Zyngier } 1193b48ac83dSMarc Zyngier 1194b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 1195b48ac83dSMarc Zyngier unsigned int nr_irqs) 1196b48ac83dSMarc Zyngier { 1197b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 1198b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1199b48ac83dSMarc Zyngier int i; 1200b48ac83dSMarc Zyngier 1201b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1202b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 1203b48ac83dSMarc Zyngier virq + i); 1204b48ac83dSMarc Zyngier int event = its_get_event_id(data); 1205b48ac83dSMarc Zyngier 1206b48ac83dSMarc Zyngier /* Stop the delivery of interrupts */ 1207b48ac83dSMarc Zyngier its_send_discard(its_dev, event); 1208b48ac83dSMarc Zyngier 1209b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 1210b48ac83dSMarc Zyngier clear_bit(event, its_dev->lpi_map); 1211b48ac83dSMarc Zyngier 1212b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 1213b48ac83dSMarc Zyngier irq_domain_reset_irq_data(d); 1214b48ac83dSMarc Zyngier } 1215b48ac83dSMarc Zyngier 1216b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 1217b48ac83dSMarc Zyngier if (bitmap_empty(its_dev->lpi_map, its_dev->nr_lpis)) { 1218b48ac83dSMarc Zyngier its_lpi_free(its_dev->lpi_map, 1219b48ac83dSMarc Zyngier its_dev->lpi_base, 1220b48ac83dSMarc Zyngier its_dev->nr_lpis); 1221b48ac83dSMarc Zyngier 1222b48ac83dSMarc Zyngier /* Unmap device/itt */ 1223b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 1224b48ac83dSMarc Zyngier its_free_device(its_dev); 1225b48ac83dSMarc Zyngier } 1226b48ac83dSMarc Zyngier 1227b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 1228b48ac83dSMarc Zyngier } 1229b48ac83dSMarc Zyngier 1230b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 1231b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 1232b48ac83dSMarc Zyngier .free = its_irq_domain_free, 1233b48ac83dSMarc Zyngier }; 1234