1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2cc2d3216SMarc Zyngier /* 3d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 4cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 5cc2d3216SMarc Zyngier */ 6cc2d3216SMarc Zyngier 73f010cf1STomasz Nowicki #include <linux/acpi.h> 88d3554b8SHanjun Guo #include <linux/acpi_iort.h> 9ffedbf0cSMarc Zyngier #include <linux/bitfield.h> 10cc2d3216SMarc Zyngier #include <linux/bitmap.h> 11cc2d3216SMarc Zyngier #include <linux/cpu.h> 12c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 13cc2d3216SMarc Zyngier #include <linux/delay.h> 1444bb7e24SRobin Murphy #include <linux/dma-iommu.h> 153fb68faeSMarc Zyngier #include <linux/efi.h> 16cc2d3216SMarc Zyngier #include <linux/interrupt.h> 1796806229SMarc Zyngier #include <linux/iopoll.h> 183f010cf1STomasz Nowicki #include <linux/irqdomain.h> 19880cb3cdSMarc Zyngier #include <linux/list.h> 20cc2d3216SMarc Zyngier #include <linux/log2.h> 215e2c9f9aSMarc Zyngier #include <linux/memblock.h> 22cc2d3216SMarc Zyngier #include <linux/mm.h> 23cc2d3216SMarc Zyngier #include <linux/msi.h> 24cc2d3216SMarc Zyngier #include <linux/of.h> 25cc2d3216SMarc Zyngier #include <linux/of_address.h> 26cc2d3216SMarc Zyngier #include <linux/of_irq.h> 27cc2d3216SMarc Zyngier #include <linux/of_pci.h> 28cc2d3216SMarc Zyngier #include <linux/of_platform.h> 29cc2d3216SMarc Zyngier #include <linux/percpu.h> 30cc2d3216SMarc Zyngier #include <linux/slab.h> 31dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 32cc2d3216SMarc Zyngier 3341a83e06SJoel Porquet #include <linux/irqchip.h> 34cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 35c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 36cc2d3216SMarc Zyngier 37cc2d3216SMarc Zyngier #include <asm/cputype.h> 38cc2d3216SMarc Zyngier #include <asm/exception.h> 39cc2d3216SMarc Zyngier 4067510ccaSRobert Richter #include "irq-gic-common.h" 4167510ccaSRobert Richter 4294100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4394100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 44fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 45dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 46cc2d3216SMarc Zyngier 47c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 48c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 49c48ed51cSMarc Zyngier 50a13b0404SMarc Zyngier static u32 lpi_id_bits; 51a13b0404SMarc Zyngier 52a13b0404SMarc Zyngier /* 53a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 54a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 55a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 56a13b0404SMarc Zyngier */ 57a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 58a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 59a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 60a13b0404SMarc Zyngier 612130b789SJulien Thierry #define LPI_PROP_DEFAULT_PRIO GICD_INT_DEF_PRI 62a13b0404SMarc Zyngier 63cc2d3216SMarc Zyngier /* 64cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 65cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 66cc2d3216SMarc Zyngier * CPU. 67cc2d3216SMarc Zyngier */ 68cc2d3216SMarc Zyngier struct its_collection { 69cc2d3216SMarc Zyngier u64 target_address; 70cc2d3216SMarc Zyngier u16 col_id; 71cc2d3216SMarc Zyngier }; 72cc2d3216SMarc Zyngier 73cc2d3216SMarc Zyngier /* 749347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 759347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 76466b7d16SShanker Donthineni */ 77466b7d16SShanker Donthineni struct its_baser { 78466b7d16SShanker Donthineni void *base; 79466b7d16SShanker Donthineni u64 val; 80466b7d16SShanker Donthineni u32 order; 819347359aSShanker Donthineni u32 psz; 82466b7d16SShanker Donthineni }; 83466b7d16SShanker Donthineni 84558b0165SArd Biesheuvel struct its_device; 85558b0165SArd Biesheuvel 86466b7d16SShanker Donthineni /* 87cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 88841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 89841514abSMarc Zyngier * list of devices writing to it. 909791ec7dSMarc Zyngier * 919791ec7dSMarc Zyngier * dev_alloc_lock has to be taken for device allocations, while the 929791ec7dSMarc Zyngier * spinlock must be taken to parse data structures such as the device 939791ec7dSMarc Zyngier * list. 94cc2d3216SMarc Zyngier */ 95cc2d3216SMarc Zyngier struct its_node { 96cc2d3216SMarc Zyngier raw_spinlock_t lock; 979791ec7dSMarc Zyngier struct mutex dev_alloc_lock; 98cc2d3216SMarc Zyngier struct list_head entry; 99cc2d3216SMarc Zyngier void __iomem *base; 1005e46a484SMarc Zyngier void __iomem *sgir_base; 101db40f0a7STomasz Nowicki phys_addr_t phys_base; 102cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 103cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 104466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 105cc2d3216SMarc Zyngier struct its_collection *collections; 106558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 107558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 1080dd57fedSMarc Zyngier u64 typer; 109dba0bc7bSDerek Basehore u64 cbaser_save; 110dba0bc7bSDerek Basehore u32 ctlr_save; 1115e516846SMarc Zyngier u32 mpidr; 112cc2d3216SMarc Zyngier struct list_head its_device_list; 113cc2d3216SMarc Zyngier u64 flags; 114debf6d02SMarc Zyngier unsigned long list_nr; 115fbf8f40eSGanapatrao Kulkarni int numa_node; 116558b0165SArd Biesheuvel unsigned int msi_domain_flags; 117558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1185c9a882eSMarc Zyngier int vlpi_redist_offset; 119cc2d3216SMarc Zyngier }; 120cc2d3216SMarc Zyngier 1210dd57fedSMarc Zyngier #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) 1225e516846SMarc Zyngier #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) 123576a8342SMarc Zyngier #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) 1240dd57fedSMarc Zyngier 125cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 126cc2d3216SMarc Zyngier 12732bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 128f2d83409SMarc Zyngier #define ITS_MAX_VPEID_BITS \ 129f2d83409SMarc Zyngier ({ \ 130f2d83409SMarc Zyngier int nvpeid = 16; \ 131f2d83409SMarc Zyngier if (gic_rdists->has_rvpeid && \ 132f2d83409SMarc Zyngier gic_rdists->gicd_typer2 & GICD_TYPER2_VIL) \ 133f2d83409SMarc Zyngier nvpeid = 1 + (gic_rdists->gicd_typer2 & \ 134f2d83409SMarc Zyngier GICD_TYPER2_VID); \ 135f2d83409SMarc Zyngier \ 136f2d83409SMarc Zyngier nvpeid; \ 137f2d83409SMarc Zyngier }) 13832bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 13932bd44dcSShanker Donthineni 1402eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1412eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1422eca0d6cSShanker Donthineni 143591e5becSMarc Zyngier struct event_lpi_map { 144591e5becSMarc Zyngier unsigned long *lpi_map; 145591e5becSMarc Zyngier u16 *col_map; 146591e5becSMarc Zyngier irq_hw_number_t lpi_base; 147591e5becSMarc Zyngier int nr_lpis; 14811635fa2SMarc Zyngier raw_spinlock_t vlpi_lock; 149d011e4e6SMarc Zyngier struct its_vm *vm; 150d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 151d011e4e6SMarc Zyngier int nr_vlpis; 152591e5becSMarc Zyngier }; 153591e5becSMarc Zyngier 154cc2d3216SMarc Zyngier /* 155d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 156d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 157d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 158d011e4e6SMarc Zyngier * indicates which one. 159cc2d3216SMarc Zyngier */ 160cc2d3216SMarc Zyngier struct its_device { 161cc2d3216SMarc Zyngier struct list_head entry; 162cc2d3216SMarc Zyngier struct its_node *its; 163591e5becSMarc Zyngier struct event_lpi_map event_map; 164cc2d3216SMarc Zyngier void *itt; 165cc2d3216SMarc Zyngier u32 nr_ites; 166cc2d3216SMarc Zyngier u32 device_id; 1679791ec7dSMarc Zyngier bool shared; 168cc2d3216SMarc Zyngier }; 169cc2d3216SMarc Zyngier 17020b3d54eSMarc Zyngier static struct { 17120b3d54eSMarc Zyngier raw_spinlock_t lock; 17220b3d54eSMarc Zyngier struct its_device *dev; 17320b3d54eSMarc Zyngier struct its_vpe **vpes; 17420b3d54eSMarc Zyngier int next_victim; 17520b3d54eSMarc Zyngier } vpe_proxy; 17620b3d54eSMarc Zyngier 1772f13ff1dSMarc Zyngier struct cpu_lpi_count { 1782f13ff1dSMarc Zyngier atomic_t managed; 1792f13ff1dSMarc Zyngier atomic_t unmanaged; 1802f13ff1dSMarc Zyngier }; 1812f13ff1dSMarc Zyngier 1822f13ff1dSMarc Zyngier static DEFINE_PER_CPU(struct cpu_lpi_count, cpu_lpi_count); 1832f13ff1dSMarc Zyngier 1841ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 185a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1861ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 187db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1881ac19ca6SMarc Zyngier 1893dfa576bSMarc Zyngier static unsigned long its_list_map; 1903171a47aSMarc Zyngier static u16 vmovp_seq_num; 1913171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1923171a47aSMarc Zyngier 1937d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1943dfa576bSMarc Zyngier 1951ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 19611e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1971ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 198e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1991ac19ca6SMarc Zyngier 200009384b3SMarc Zyngier /* 201009384b3SMarc Zyngier * Skip ITSs that have no vLPIs mapped, unless we're on GICv4.1, as we 202009384b3SMarc Zyngier * always have vSGIs mapped. 203009384b3SMarc Zyngier */ 204009384b3SMarc Zyngier static bool require_its_list_vmovp(struct its_vm *vm, struct its_node *its) 205009384b3SMarc Zyngier { 206009384b3SMarc Zyngier return (gic_rdists->has_rvpeid || vm->vlpi_count[its->list_nr]); 207009384b3SMarc Zyngier } 208009384b3SMarc Zyngier 20984243125SZenghui Yu static u16 get_its_list(struct its_vm *vm) 21084243125SZenghui Yu { 21184243125SZenghui Yu struct its_node *its; 21284243125SZenghui Yu unsigned long its_list = 0; 21384243125SZenghui Yu 21484243125SZenghui Yu list_for_each_entry(its, &its_nodes, entry) { 2150dd57fedSMarc Zyngier if (!is_v4(its)) 21684243125SZenghui Yu continue; 21784243125SZenghui Yu 218009384b3SMarc Zyngier if (require_its_list_vmovp(vm, its)) 21984243125SZenghui Yu __set_bit(its->list_nr, &its_list); 22084243125SZenghui Yu } 22184243125SZenghui Yu 22284243125SZenghui Yu return (u16)its_list; 22384243125SZenghui Yu } 22484243125SZenghui Yu 225425c09beSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 226425c09beSMarc Zyngier { 227425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 228425c09beSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 229425c09beSMarc Zyngier } 230425c09beSMarc Zyngier 231591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 232591e5becSMarc Zyngier u32 event) 233591e5becSMarc Zyngier { 234591e5becSMarc Zyngier struct its_node *its = its_dev->its; 235591e5becSMarc Zyngier 236591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 237591e5becSMarc Zyngier } 238591e5becSMarc Zyngier 239c1d4d5cdSMarc Zyngier static struct its_vlpi_map *dev_event_to_vlpi_map(struct its_device *its_dev, 240c1d4d5cdSMarc Zyngier u32 event) 241c1d4d5cdSMarc Zyngier { 242c1d4d5cdSMarc Zyngier if (WARN_ON_ONCE(event >= its_dev->event_map.nr_lpis)) 243c1d4d5cdSMarc Zyngier return NULL; 244c1d4d5cdSMarc Zyngier 245c1d4d5cdSMarc Zyngier return &its_dev->event_map.vlpi_maps[event]; 246c1d4d5cdSMarc Zyngier } 247c1d4d5cdSMarc Zyngier 248f4a81f5aSMarc Zyngier static struct its_vlpi_map *get_vlpi_map(struct irq_data *d) 249f4a81f5aSMarc Zyngier { 250f4a81f5aSMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 251f4a81f5aSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 252f4a81f5aSMarc Zyngier u32 event = its_get_event_id(d); 253f4a81f5aSMarc Zyngier 254f4a81f5aSMarc Zyngier return dev_event_to_vlpi_map(its_dev, event); 255f4a81f5aSMarc Zyngier } 256f4a81f5aSMarc Zyngier 257f4a81f5aSMarc Zyngier return NULL; 258f4a81f5aSMarc Zyngier } 259f4a81f5aSMarc Zyngier 260f3a05921SMarc Zyngier static int vpe_to_cpuid_lock(struct its_vpe *vpe, unsigned long *flags) 261425c09beSMarc Zyngier { 262f3a05921SMarc Zyngier raw_spin_lock_irqsave(&vpe->vpe_lock, *flags); 263f3a05921SMarc Zyngier return vpe->col_idx; 264f3a05921SMarc Zyngier } 265f3a05921SMarc Zyngier 266f3a05921SMarc Zyngier static void vpe_to_cpuid_unlock(struct its_vpe *vpe, unsigned long flags) 267f3a05921SMarc Zyngier { 268f3a05921SMarc Zyngier raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); 269f3a05921SMarc Zyngier } 270f3a05921SMarc Zyngier 271f3a05921SMarc Zyngier static int irq_to_cpuid_lock(struct irq_data *d, unsigned long *flags) 272f3a05921SMarc Zyngier { 273f3a05921SMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 274f3a05921SMarc Zyngier int cpu; 275f3a05921SMarc Zyngier 276f3a05921SMarc Zyngier if (map) { 277f3a05921SMarc Zyngier cpu = vpe_to_cpuid_lock(map->vpe, flags); 278f3a05921SMarc Zyngier } else { 279f3a05921SMarc Zyngier /* Physical LPIs are already locked via the irq_desc lock */ 280425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 281f3a05921SMarc Zyngier cpu = its_dev->event_map.col_map[its_get_event_id(d)]; 282f3a05921SMarc Zyngier /* Keep GCC quiet... */ 283f3a05921SMarc Zyngier *flags = 0; 284f3a05921SMarc Zyngier } 285f3a05921SMarc Zyngier 286f3a05921SMarc Zyngier return cpu; 287f3a05921SMarc Zyngier } 288f3a05921SMarc Zyngier 289f3a05921SMarc Zyngier static void irq_to_cpuid_unlock(struct irq_data *d, unsigned long flags) 290f3a05921SMarc Zyngier { 291f4a81f5aSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 292425c09beSMarc Zyngier 293f4a81f5aSMarc Zyngier if (map) 294f3a05921SMarc Zyngier vpe_to_cpuid_unlock(map->vpe, flags); 295425c09beSMarc Zyngier } 296425c09beSMarc Zyngier 29783559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 29883559b47SMarc Zyngier { 29920faba84SJoe Perches if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(15, 0))) 30083559b47SMarc Zyngier return NULL; 30183559b47SMarc Zyngier 30283559b47SMarc Zyngier return col; 30383559b47SMarc Zyngier } 30483559b47SMarc Zyngier 305205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 306205e065dSMarc Zyngier { 307205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 308205e065dSMarc Zyngier return vpe; 309205e065dSMarc Zyngier 310205e065dSMarc Zyngier return NULL; 311205e065dSMarc Zyngier } 312205e065dSMarc Zyngier 313cc2d3216SMarc Zyngier /* 314cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 315cc2d3216SMarc Zyngier * block. 316cc2d3216SMarc Zyngier */ 317cc2d3216SMarc Zyngier struct its_cmd_desc { 318cc2d3216SMarc Zyngier union { 319cc2d3216SMarc Zyngier struct { 320cc2d3216SMarc Zyngier struct its_device *dev; 321cc2d3216SMarc Zyngier u32 event_id; 322cc2d3216SMarc Zyngier } its_inv_cmd; 323cc2d3216SMarc Zyngier 324cc2d3216SMarc Zyngier struct { 325cc2d3216SMarc Zyngier struct its_device *dev; 326cc2d3216SMarc Zyngier u32 event_id; 3278d85dcedSMarc Zyngier } its_clear_cmd; 3288d85dcedSMarc Zyngier 3298d85dcedSMarc Zyngier struct { 3308d85dcedSMarc Zyngier struct its_device *dev; 3318d85dcedSMarc Zyngier u32 event_id; 332cc2d3216SMarc Zyngier } its_int_cmd; 333cc2d3216SMarc Zyngier 334cc2d3216SMarc Zyngier struct { 335cc2d3216SMarc Zyngier struct its_device *dev; 336cc2d3216SMarc Zyngier int valid; 337cc2d3216SMarc Zyngier } its_mapd_cmd; 338cc2d3216SMarc Zyngier 339cc2d3216SMarc Zyngier struct { 340cc2d3216SMarc Zyngier struct its_collection *col; 341cc2d3216SMarc Zyngier int valid; 342cc2d3216SMarc Zyngier } its_mapc_cmd; 343cc2d3216SMarc Zyngier 344cc2d3216SMarc Zyngier struct { 345cc2d3216SMarc Zyngier struct its_device *dev; 346cc2d3216SMarc Zyngier u32 phys_id; 347cc2d3216SMarc Zyngier u32 event_id; 3486a25ad3aSMarc Zyngier } its_mapti_cmd; 349cc2d3216SMarc Zyngier 350cc2d3216SMarc Zyngier struct { 351cc2d3216SMarc Zyngier struct its_device *dev; 352cc2d3216SMarc Zyngier struct its_collection *col; 353591e5becSMarc Zyngier u32 event_id; 354cc2d3216SMarc Zyngier } its_movi_cmd; 355cc2d3216SMarc Zyngier 356cc2d3216SMarc Zyngier struct { 357cc2d3216SMarc Zyngier struct its_device *dev; 358cc2d3216SMarc Zyngier u32 event_id; 359cc2d3216SMarc Zyngier } its_discard_cmd; 360cc2d3216SMarc Zyngier 361cc2d3216SMarc Zyngier struct { 362cc2d3216SMarc Zyngier struct its_collection *col; 363cc2d3216SMarc Zyngier } its_invall_cmd; 364d011e4e6SMarc Zyngier 365d011e4e6SMarc Zyngier struct { 366d011e4e6SMarc Zyngier struct its_vpe *vpe; 367eb78192bSMarc Zyngier } its_vinvall_cmd; 368eb78192bSMarc Zyngier 369eb78192bSMarc Zyngier struct { 370eb78192bSMarc Zyngier struct its_vpe *vpe; 371eb78192bSMarc Zyngier struct its_collection *col; 372eb78192bSMarc Zyngier bool valid; 373eb78192bSMarc Zyngier } its_vmapp_cmd; 374eb78192bSMarc Zyngier 375eb78192bSMarc Zyngier struct { 376eb78192bSMarc Zyngier struct its_vpe *vpe; 377d011e4e6SMarc Zyngier struct its_device *dev; 378d011e4e6SMarc Zyngier u32 virt_id; 379d011e4e6SMarc Zyngier u32 event_id; 380d011e4e6SMarc Zyngier bool db_enabled; 381d011e4e6SMarc Zyngier } its_vmapti_cmd; 382d011e4e6SMarc Zyngier 383d011e4e6SMarc Zyngier struct { 384d011e4e6SMarc Zyngier struct its_vpe *vpe; 385d011e4e6SMarc Zyngier struct its_device *dev; 386d011e4e6SMarc Zyngier u32 event_id; 387d011e4e6SMarc Zyngier bool db_enabled; 388d011e4e6SMarc Zyngier } its_vmovi_cmd; 3893171a47aSMarc Zyngier 3903171a47aSMarc Zyngier struct { 3913171a47aSMarc Zyngier struct its_vpe *vpe; 3923171a47aSMarc Zyngier struct its_collection *col; 3933171a47aSMarc Zyngier u16 seq_num; 3943171a47aSMarc Zyngier u16 its_list; 3953171a47aSMarc Zyngier } its_vmovp_cmd; 396d97c97baSMarc Zyngier 397d97c97baSMarc Zyngier struct { 398d97c97baSMarc Zyngier struct its_vpe *vpe; 399d97c97baSMarc Zyngier } its_invdb_cmd; 400e252cf8aSMarc Zyngier 401e252cf8aSMarc Zyngier struct { 402e252cf8aSMarc Zyngier struct its_vpe *vpe; 403e252cf8aSMarc Zyngier u8 sgi; 404e252cf8aSMarc Zyngier u8 priority; 405e252cf8aSMarc Zyngier bool enable; 406e252cf8aSMarc Zyngier bool group; 407e252cf8aSMarc Zyngier bool clear; 408e252cf8aSMarc Zyngier } its_vsgi_cmd; 409cc2d3216SMarc Zyngier }; 410cc2d3216SMarc Zyngier }; 411cc2d3216SMarc Zyngier 412cc2d3216SMarc Zyngier /* 413cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 414cc2d3216SMarc Zyngier */ 415cc2d3216SMarc Zyngier struct its_cmd_block { 4162bbdfcc5SBen Dooks (Codethink) union { 417cc2d3216SMarc Zyngier u64 raw_cmd[4]; 4182bbdfcc5SBen Dooks (Codethink) __le64 raw_cmd_le[4]; 4192bbdfcc5SBen Dooks (Codethink) }; 420cc2d3216SMarc Zyngier }; 421cc2d3216SMarc Zyngier 422cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 423cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 424cc2d3216SMarc Zyngier 42567047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 42667047f90SMarc Zyngier struct its_cmd_block *, 427cc2d3216SMarc Zyngier struct its_cmd_desc *); 428cc2d3216SMarc Zyngier 42967047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 43067047f90SMarc Zyngier struct its_cmd_block *, 431d011e4e6SMarc Zyngier struct its_cmd_desc *); 432d011e4e6SMarc Zyngier 4334d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 4344d36f136SMarc Zyngier { 4354d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 4364d36f136SMarc Zyngier *raw_cmd &= ~mask; 4374d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 4384d36f136SMarc Zyngier } 4394d36f136SMarc Zyngier 440cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 441cc2d3216SMarc Zyngier { 4424d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 443cc2d3216SMarc Zyngier } 444cc2d3216SMarc Zyngier 445cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 446cc2d3216SMarc Zyngier { 4474d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 448cc2d3216SMarc Zyngier } 449cc2d3216SMarc Zyngier 450cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 451cc2d3216SMarc Zyngier { 4524d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 453cc2d3216SMarc Zyngier } 454cc2d3216SMarc Zyngier 455cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 456cc2d3216SMarc Zyngier { 4574d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 458cc2d3216SMarc Zyngier } 459cc2d3216SMarc Zyngier 460cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 461cc2d3216SMarc Zyngier { 4624d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 463cc2d3216SMarc Zyngier } 464cc2d3216SMarc Zyngier 465cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 466cc2d3216SMarc Zyngier { 46730ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 468cc2d3216SMarc Zyngier } 469cc2d3216SMarc Zyngier 470cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 471cc2d3216SMarc Zyngier { 4724d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 473cc2d3216SMarc Zyngier } 474cc2d3216SMarc Zyngier 475cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 476cc2d3216SMarc Zyngier { 47730ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 478cc2d3216SMarc Zyngier } 479cc2d3216SMarc Zyngier 480cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 481cc2d3216SMarc Zyngier { 4824d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 483cc2d3216SMarc Zyngier } 484cc2d3216SMarc Zyngier 485d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 486d011e4e6SMarc Zyngier { 487d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 488d011e4e6SMarc Zyngier } 489d011e4e6SMarc Zyngier 490d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 491d011e4e6SMarc Zyngier { 492d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 493d011e4e6SMarc Zyngier } 494d011e4e6SMarc Zyngier 495d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 496d011e4e6SMarc Zyngier { 497d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 498d011e4e6SMarc Zyngier } 499d011e4e6SMarc Zyngier 500d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 501d011e4e6SMarc Zyngier { 502d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 503d011e4e6SMarc Zyngier } 504d011e4e6SMarc Zyngier 5053171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 5063171a47aSMarc Zyngier { 5073171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 5083171a47aSMarc Zyngier } 5093171a47aSMarc Zyngier 5103171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 5113171a47aSMarc Zyngier { 5123171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 5133171a47aSMarc Zyngier } 5143171a47aSMarc Zyngier 515eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 516eb78192bSMarc Zyngier { 51730ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 518eb78192bSMarc Zyngier } 519eb78192bSMarc Zyngier 520eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 521eb78192bSMarc Zyngier { 522eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 523eb78192bSMarc Zyngier } 524eb78192bSMarc Zyngier 52564edfaa9SMarc Zyngier static void its_encode_vconf_addr(struct its_cmd_block *cmd, u64 vconf_pa) 52664edfaa9SMarc Zyngier { 52764edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], vconf_pa >> 16, 51, 16); 52864edfaa9SMarc Zyngier } 52964edfaa9SMarc Zyngier 53064edfaa9SMarc Zyngier static void its_encode_alloc(struct its_cmd_block *cmd, bool alloc) 53164edfaa9SMarc Zyngier { 53264edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], alloc, 8, 8); 53364edfaa9SMarc Zyngier } 53464edfaa9SMarc Zyngier 53564edfaa9SMarc Zyngier static void its_encode_ptz(struct its_cmd_block *cmd, bool ptz) 53664edfaa9SMarc Zyngier { 53764edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], ptz, 9, 9); 53864edfaa9SMarc Zyngier } 53964edfaa9SMarc Zyngier 54064edfaa9SMarc Zyngier static void its_encode_vmapp_default_db(struct its_cmd_block *cmd, 54164edfaa9SMarc Zyngier u32 vpe_db_lpi) 54264edfaa9SMarc Zyngier { 54364edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpe_db_lpi, 31, 0); 54464edfaa9SMarc Zyngier } 54564edfaa9SMarc Zyngier 546dd3f050aSMarc Zyngier static void its_encode_vmovp_default_db(struct its_cmd_block *cmd, 547dd3f050aSMarc Zyngier u32 vpe_db_lpi) 548dd3f050aSMarc Zyngier { 549dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpe_db_lpi, 31, 0); 550dd3f050aSMarc Zyngier } 551dd3f050aSMarc Zyngier 552dd3f050aSMarc Zyngier static void its_encode_db(struct its_cmd_block *cmd, bool db) 553dd3f050aSMarc Zyngier { 554dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db, 63, 63); 555dd3f050aSMarc Zyngier } 556dd3f050aSMarc Zyngier 557e252cf8aSMarc Zyngier static void its_encode_sgi_intid(struct its_cmd_block *cmd, u8 sgi) 558e252cf8aSMarc Zyngier { 559e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], sgi, 35, 32); 560e252cf8aSMarc Zyngier } 561e252cf8aSMarc Zyngier 562e252cf8aSMarc Zyngier static void its_encode_sgi_priority(struct its_cmd_block *cmd, u8 prio) 563e252cf8aSMarc Zyngier { 564e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], prio >> 4, 23, 20); 565e252cf8aSMarc Zyngier } 566e252cf8aSMarc Zyngier 567e252cf8aSMarc Zyngier static void its_encode_sgi_group(struct its_cmd_block *cmd, bool grp) 568e252cf8aSMarc Zyngier { 569e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], grp, 10, 10); 570e252cf8aSMarc Zyngier } 571e252cf8aSMarc Zyngier 572e252cf8aSMarc Zyngier static void its_encode_sgi_clear(struct its_cmd_block *cmd, bool clr) 573e252cf8aSMarc Zyngier { 574e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], clr, 9, 9); 575e252cf8aSMarc Zyngier } 576e252cf8aSMarc Zyngier 577e252cf8aSMarc Zyngier static void its_encode_sgi_enable(struct its_cmd_block *cmd, bool en) 578e252cf8aSMarc Zyngier { 579e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], en, 8, 8); 580e252cf8aSMarc Zyngier } 581e252cf8aSMarc Zyngier 582cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 583cc2d3216SMarc Zyngier { 584cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 5852bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[0] = cpu_to_le64(cmd->raw_cmd[0]); 5862bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[1] = cpu_to_le64(cmd->raw_cmd[1]); 5872bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[2] = cpu_to_le64(cmd->raw_cmd[2]); 5882bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[3] = cpu_to_le64(cmd->raw_cmd[3]); 589cc2d3216SMarc Zyngier } 590cc2d3216SMarc Zyngier 59167047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 59267047f90SMarc Zyngier struct its_cmd_block *cmd, 593cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 594cc2d3216SMarc Zyngier { 595cc2d3216SMarc Zyngier unsigned long itt_addr; 596c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 597cc2d3216SMarc Zyngier 598cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 599cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 600cc2d3216SMarc Zyngier 601cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 602cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 603cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 604cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 605cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 606cc2d3216SMarc Zyngier 607cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 608cc2d3216SMarc Zyngier 609591e5becSMarc Zyngier return NULL; 610cc2d3216SMarc Zyngier } 611cc2d3216SMarc Zyngier 61267047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 61367047f90SMarc Zyngier struct its_cmd_block *cmd, 614cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 615cc2d3216SMarc Zyngier { 616cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 617cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 618cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 619cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 620cc2d3216SMarc Zyngier 621cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 622cc2d3216SMarc Zyngier 623cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 624cc2d3216SMarc Zyngier } 625cc2d3216SMarc Zyngier 62667047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 62767047f90SMarc Zyngier struct its_cmd_block *cmd, 628cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 629cc2d3216SMarc Zyngier { 630591e5becSMarc Zyngier struct its_collection *col; 631591e5becSMarc Zyngier 6326a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 6336a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 634591e5becSMarc Zyngier 6356a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 6366a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 6376a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 6386a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 639591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 640cc2d3216SMarc Zyngier 641cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 642cc2d3216SMarc Zyngier 64383559b47SMarc Zyngier return valid_col(col); 644cc2d3216SMarc Zyngier } 645cc2d3216SMarc Zyngier 64667047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 64767047f90SMarc Zyngier struct its_cmd_block *cmd, 648cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 649cc2d3216SMarc Zyngier { 650591e5becSMarc Zyngier struct its_collection *col; 651591e5becSMarc Zyngier 652591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 653591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 654591e5becSMarc Zyngier 655cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 656cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 657591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 658cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 659cc2d3216SMarc Zyngier 660cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 661cc2d3216SMarc Zyngier 66283559b47SMarc Zyngier return valid_col(col); 663cc2d3216SMarc Zyngier } 664cc2d3216SMarc Zyngier 66567047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 66667047f90SMarc Zyngier struct its_cmd_block *cmd, 667cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 668cc2d3216SMarc Zyngier { 669591e5becSMarc Zyngier struct its_collection *col; 670591e5becSMarc Zyngier 671591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 672591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 673591e5becSMarc Zyngier 674cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 675cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 676cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 677cc2d3216SMarc Zyngier 678cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 679cc2d3216SMarc Zyngier 68083559b47SMarc Zyngier return valid_col(col); 681cc2d3216SMarc Zyngier } 682cc2d3216SMarc Zyngier 68367047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 68467047f90SMarc Zyngier struct its_cmd_block *cmd, 685cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 686cc2d3216SMarc Zyngier { 687591e5becSMarc Zyngier struct its_collection *col; 688591e5becSMarc Zyngier 689591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 690591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 691591e5becSMarc Zyngier 692cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 693cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 694cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 695cc2d3216SMarc Zyngier 696cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 697cc2d3216SMarc Zyngier 69883559b47SMarc Zyngier return valid_col(col); 699cc2d3216SMarc Zyngier } 700cc2d3216SMarc Zyngier 70167047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 70267047f90SMarc Zyngier struct its_cmd_block *cmd, 7038d85dcedSMarc Zyngier struct its_cmd_desc *desc) 7048d85dcedSMarc Zyngier { 7058d85dcedSMarc Zyngier struct its_collection *col; 7068d85dcedSMarc Zyngier 7078d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 7088d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 7098d85dcedSMarc Zyngier 7108d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 7118d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 7128d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 7138d85dcedSMarc Zyngier 7148d85dcedSMarc Zyngier its_fixup_cmd(cmd); 7158d85dcedSMarc Zyngier 71683559b47SMarc Zyngier return valid_col(col); 7178d85dcedSMarc Zyngier } 7188d85dcedSMarc Zyngier 71967047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 72067047f90SMarc Zyngier struct its_cmd_block *cmd, 7218d85dcedSMarc Zyngier struct its_cmd_desc *desc) 7228d85dcedSMarc Zyngier { 7238d85dcedSMarc Zyngier struct its_collection *col; 7248d85dcedSMarc Zyngier 7258d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 7268d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 7278d85dcedSMarc Zyngier 7288d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 7298d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 7308d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 7318d85dcedSMarc Zyngier 7328d85dcedSMarc Zyngier its_fixup_cmd(cmd); 7338d85dcedSMarc Zyngier 73483559b47SMarc Zyngier return valid_col(col); 7358d85dcedSMarc Zyngier } 7368d85dcedSMarc Zyngier 73767047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 73867047f90SMarc Zyngier struct its_cmd_block *cmd, 739cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 740cc2d3216SMarc Zyngier { 741cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 74210794522SZenghui Yu its_encode_collection(cmd, desc->its_invall_cmd.col->col_id); 743cc2d3216SMarc Zyngier 744cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 745cc2d3216SMarc Zyngier 746cc2d3216SMarc Zyngier return NULL; 747cc2d3216SMarc Zyngier } 748cc2d3216SMarc Zyngier 74967047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 75067047f90SMarc Zyngier struct its_cmd_block *cmd, 751eb78192bSMarc Zyngier struct its_cmd_desc *desc) 752eb78192bSMarc Zyngier { 753eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 754eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 755eb78192bSMarc Zyngier 756eb78192bSMarc Zyngier its_fixup_cmd(cmd); 757eb78192bSMarc Zyngier 758205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 759eb78192bSMarc Zyngier } 760eb78192bSMarc Zyngier 76167047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 76267047f90SMarc Zyngier struct its_cmd_block *cmd, 763eb78192bSMarc Zyngier struct its_cmd_desc *desc) 764eb78192bSMarc Zyngier { 76564edfaa9SMarc Zyngier unsigned long vpt_addr, vconf_addr; 7665c9a882eSMarc Zyngier u64 target; 76764edfaa9SMarc Zyngier bool alloc; 768eb78192bSMarc Zyngier 769eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 770eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 771eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 77264edfaa9SMarc Zyngier 77364edfaa9SMarc Zyngier if (!desc->its_vmapp_cmd.valid) { 77464edfaa9SMarc Zyngier if (is_v4_1(its)) { 77564edfaa9SMarc Zyngier alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count); 77664edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 77764edfaa9SMarc Zyngier } 77864edfaa9SMarc Zyngier 77964edfaa9SMarc Zyngier goto out; 78064edfaa9SMarc Zyngier } 78164edfaa9SMarc Zyngier 78264edfaa9SMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 78364edfaa9SMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 78464edfaa9SMarc Zyngier 7855c9a882eSMarc Zyngier its_encode_target(cmd, target); 786eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 787eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 788eb78192bSMarc Zyngier 78964edfaa9SMarc Zyngier if (!is_v4_1(its)) 79064edfaa9SMarc Zyngier goto out; 79164edfaa9SMarc Zyngier 79264edfaa9SMarc Zyngier vconf_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->its_vm->vprop_page)); 79364edfaa9SMarc Zyngier 79464edfaa9SMarc Zyngier alloc = !atomic_fetch_inc(&desc->its_vmapp_cmd.vpe->vmapp_count); 79564edfaa9SMarc Zyngier 79664edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 79764edfaa9SMarc Zyngier 79864edfaa9SMarc Zyngier /* We can only signal PTZ when alloc==1. Why do we have two bits? */ 79964edfaa9SMarc Zyngier its_encode_ptz(cmd, alloc); 80064edfaa9SMarc Zyngier its_encode_vconf_addr(cmd, vconf_addr); 80164edfaa9SMarc Zyngier its_encode_vmapp_default_db(cmd, desc->its_vmapp_cmd.vpe->vpe_db_lpi); 80264edfaa9SMarc Zyngier 80364edfaa9SMarc Zyngier out: 804eb78192bSMarc Zyngier its_fixup_cmd(cmd); 805eb78192bSMarc Zyngier 806205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 807eb78192bSMarc Zyngier } 808eb78192bSMarc Zyngier 80967047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 81067047f90SMarc Zyngier struct its_cmd_block *cmd, 811d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 812d011e4e6SMarc Zyngier { 813d011e4e6SMarc Zyngier u32 db; 814d011e4e6SMarc Zyngier 8153858d4dfSMarc Zyngier if (!is_v4_1(its) && desc->its_vmapti_cmd.db_enabled) 816d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 817d011e4e6SMarc Zyngier else 818d011e4e6SMarc Zyngier db = 1023; 819d011e4e6SMarc Zyngier 820d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 821d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 822d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 823d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 824d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 825d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 826d011e4e6SMarc Zyngier 827d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 828d011e4e6SMarc Zyngier 829205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 830d011e4e6SMarc Zyngier } 831d011e4e6SMarc Zyngier 83267047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 83367047f90SMarc Zyngier struct its_cmd_block *cmd, 834d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 835d011e4e6SMarc Zyngier { 836d011e4e6SMarc Zyngier u32 db; 837d011e4e6SMarc Zyngier 8383858d4dfSMarc Zyngier if (!is_v4_1(its) && desc->its_vmovi_cmd.db_enabled) 839d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 840d011e4e6SMarc Zyngier else 841d011e4e6SMarc Zyngier db = 1023; 842d011e4e6SMarc Zyngier 843d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 844d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 845d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 846d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 847d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 848d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 849d011e4e6SMarc Zyngier 850d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 851d011e4e6SMarc Zyngier 852205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 853d011e4e6SMarc Zyngier } 854d011e4e6SMarc Zyngier 85567047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 85667047f90SMarc Zyngier struct its_cmd_block *cmd, 8573171a47aSMarc Zyngier struct its_cmd_desc *desc) 8583171a47aSMarc Zyngier { 8595c9a882eSMarc Zyngier u64 target; 8605c9a882eSMarc Zyngier 8615c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 8623171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 8633171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 8643171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 8653171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 8665c9a882eSMarc Zyngier its_encode_target(cmd, target); 8673171a47aSMarc Zyngier 868dd3f050aSMarc Zyngier if (is_v4_1(its)) { 869dd3f050aSMarc Zyngier its_encode_db(cmd, true); 870dd3f050aSMarc Zyngier its_encode_vmovp_default_db(cmd, desc->its_vmovp_cmd.vpe->vpe_db_lpi); 871dd3f050aSMarc Zyngier } 872dd3f050aSMarc Zyngier 8733171a47aSMarc Zyngier its_fixup_cmd(cmd); 8743171a47aSMarc Zyngier 875205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 8763171a47aSMarc Zyngier } 8773171a47aSMarc Zyngier 87828614696SMarc Zyngier static struct its_vpe *its_build_vinv_cmd(struct its_node *its, 87928614696SMarc Zyngier struct its_cmd_block *cmd, 88028614696SMarc Zyngier struct its_cmd_desc *desc) 88128614696SMarc Zyngier { 88228614696SMarc Zyngier struct its_vlpi_map *map; 88328614696SMarc Zyngier 88428614696SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_inv_cmd.dev, 88528614696SMarc Zyngier desc->its_inv_cmd.event_id); 88628614696SMarc Zyngier 88728614696SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 88828614696SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 88928614696SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 89028614696SMarc Zyngier 89128614696SMarc Zyngier its_fixup_cmd(cmd); 89228614696SMarc Zyngier 89328614696SMarc Zyngier return valid_vpe(its, map->vpe); 89428614696SMarc Zyngier } 89528614696SMarc Zyngier 896ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vint_cmd(struct its_node *its, 897ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 898ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 899ed0e4aa9SMarc Zyngier { 900ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 901ed0e4aa9SMarc Zyngier 902ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_int_cmd.dev, 903ed0e4aa9SMarc Zyngier desc->its_int_cmd.event_id); 904ed0e4aa9SMarc Zyngier 905ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 906ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 907ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 908ed0e4aa9SMarc Zyngier 909ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 910ed0e4aa9SMarc Zyngier 911ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 912ed0e4aa9SMarc Zyngier } 913ed0e4aa9SMarc Zyngier 914ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vclear_cmd(struct its_node *its, 915ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 916ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 917ed0e4aa9SMarc Zyngier { 918ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 919ed0e4aa9SMarc Zyngier 920ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_clear_cmd.dev, 921ed0e4aa9SMarc Zyngier desc->its_clear_cmd.event_id); 922ed0e4aa9SMarc Zyngier 923ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 924ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 925ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 926ed0e4aa9SMarc Zyngier 927ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 928ed0e4aa9SMarc Zyngier 929ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 930ed0e4aa9SMarc Zyngier } 931ed0e4aa9SMarc Zyngier 932d97c97baSMarc Zyngier static struct its_vpe *its_build_invdb_cmd(struct its_node *its, 933d97c97baSMarc Zyngier struct its_cmd_block *cmd, 934d97c97baSMarc Zyngier struct its_cmd_desc *desc) 935d97c97baSMarc Zyngier { 936d97c97baSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 937d97c97baSMarc Zyngier return NULL; 938d97c97baSMarc Zyngier 939d97c97baSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVDB); 940d97c97baSMarc Zyngier its_encode_vpeid(cmd, desc->its_invdb_cmd.vpe->vpe_id); 941d97c97baSMarc Zyngier 942d97c97baSMarc Zyngier its_fixup_cmd(cmd); 943d97c97baSMarc Zyngier 944d97c97baSMarc Zyngier return valid_vpe(its, desc->its_invdb_cmd.vpe); 945d97c97baSMarc Zyngier } 946d97c97baSMarc Zyngier 947e252cf8aSMarc Zyngier static struct its_vpe *its_build_vsgi_cmd(struct its_node *its, 948e252cf8aSMarc Zyngier struct its_cmd_block *cmd, 949e252cf8aSMarc Zyngier struct its_cmd_desc *desc) 950e252cf8aSMarc Zyngier { 951e252cf8aSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 952e252cf8aSMarc Zyngier return NULL; 953e252cf8aSMarc Zyngier 954e252cf8aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VSGI); 955e252cf8aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vsgi_cmd.vpe->vpe_id); 956e252cf8aSMarc Zyngier its_encode_sgi_intid(cmd, desc->its_vsgi_cmd.sgi); 957e252cf8aSMarc Zyngier its_encode_sgi_priority(cmd, desc->its_vsgi_cmd.priority); 958e252cf8aSMarc Zyngier its_encode_sgi_group(cmd, desc->its_vsgi_cmd.group); 959e252cf8aSMarc Zyngier its_encode_sgi_clear(cmd, desc->its_vsgi_cmd.clear); 960e252cf8aSMarc Zyngier its_encode_sgi_enable(cmd, desc->its_vsgi_cmd.enable); 961e252cf8aSMarc Zyngier 962e252cf8aSMarc Zyngier its_fixup_cmd(cmd); 963e252cf8aSMarc Zyngier 964e252cf8aSMarc Zyngier return valid_vpe(its, desc->its_vsgi_cmd.vpe); 965e252cf8aSMarc Zyngier } 966e252cf8aSMarc Zyngier 967cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 968cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 969cc2d3216SMarc Zyngier { 970cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 971cc2d3216SMarc Zyngier } 972cc2d3216SMarc Zyngier 973cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 974cc2d3216SMarc Zyngier { 975cc2d3216SMarc Zyngier int widx; 976cc2d3216SMarc Zyngier int ridx; 977cc2d3216SMarc Zyngier 978cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 979cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 980cc2d3216SMarc Zyngier 981cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 982cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 983cc2d3216SMarc Zyngier return 1; 984cc2d3216SMarc Zyngier 985cc2d3216SMarc Zyngier return 0; 986cc2d3216SMarc Zyngier } 987cc2d3216SMarc Zyngier 988cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 989cc2d3216SMarc Zyngier { 990cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 991cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 992cc2d3216SMarc Zyngier 993cc2d3216SMarc Zyngier while (its_queue_full(its)) { 994cc2d3216SMarc Zyngier count--; 995cc2d3216SMarc Zyngier if (!count) { 996cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 997cc2d3216SMarc Zyngier return NULL; 998cc2d3216SMarc Zyngier } 999cc2d3216SMarc Zyngier cpu_relax(); 1000cc2d3216SMarc Zyngier udelay(1); 1001cc2d3216SMarc Zyngier } 1002cc2d3216SMarc Zyngier 1003cc2d3216SMarc Zyngier cmd = its->cmd_write++; 1004cc2d3216SMarc Zyngier 1005cc2d3216SMarc Zyngier /* Handle queue wrapping */ 1006cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 1007cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 1008cc2d3216SMarc Zyngier 100934d677a9SMarc Zyngier /* Clear command */ 101034d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 101134d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 101234d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 101334d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 101434d677a9SMarc Zyngier 1015cc2d3216SMarc Zyngier return cmd; 1016cc2d3216SMarc Zyngier } 1017cc2d3216SMarc Zyngier 1018cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 1019cc2d3216SMarc Zyngier { 1020cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 1021cc2d3216SMarc Zyngier 1022cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 1023cc2d3216SMarc Zyngier 1024cc2d3216SMarc Zyngier return its->cmd_write; 1025cc2d3216SMarc Zyngier } 1026cc2d3216SMarc Zyngier 1027cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 1028cc2d3216SMarc Zyngier { 1029cc2d3216SMarc Zyngier /* 1030cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 1031cc2d3216SMarc Zyngier * the ITS. 1032cc2d3216SMarc Zyngier */ 1033cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 1034328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 1035cc2d3216SMarc Zyngier else 1036cc2d3216SMarc Zyngier dsb(ishst); 1037cc2d3216SMarc Zyngier } 1038cc2d3216SMarc Zyngier 1039a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 1040a050fa54SHeyi Guo u64 prev_idx, 1041cc2d3216SMarc Zyngier struct its_cmd_block *to) 1042cc2d3216SMarc Zyngier { 1043a050fa54SHeyi Guo u64 rd_idx, to_idx, linear_idx; 1044cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 1045cc2d3216SMarc Zyngier 1046a050fa54SHeyi Guo /* Linearize to_idx if the command set has wrapped around */ 1047cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 1048a050fa54SHeyi Guo if (to_idx < prev_idx) 1049a050fa54SHeyi Guo to_idx += ITS_CMD_QUEUE_SZ; 1050a050fa54SHeyi Guo 1051a050fa54SHeyi Guo linear_idx = prev_idx; 1052cc2d3216SMarc Zyngier 1053cc2d3216SMarc Zyngier while (1) { 1054a050fa54SHeyi Guo s64 delta; 1055a050fa54SHeyi Guo 1056cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 10579bdd8b1cSMarc Zyngier 1058a050fa54SHeyi Guo /* 1059a050fa54SHeyi Guo * Compute the read pointer progress, taking the 1060a050fa54SHeyi Guo * potential wrap-around into account. 1061a050fa54SHeyi Guo */ 1062a050fa54SHeyi Guo delta = rd_idx - prev_idx; 1063a050fa54SHeyi Guo if (rd_idx < prev_idx) 1064a050fa54SHeyi Guo delta += ITS_CMD_QUEUE_SZ; 10659bdd8b1cSMarc Zyngier 1066a050fa54SHeyi Guo linear_idx += delta; 1067a050fa54SHeyi Guo if (linear_idx >= to_idx) 1068cc2d3216SMarc Zyngier break; 1069cc2d3216SMarc Zyngier 1070cc2d3216SMarc Zyngier count--; 1071cc2d3216SMarc Zyngier if (!count) { 1072a050fa54SHeyi Guo pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", 1073a050fa54SHeyi Guo to_idx, linear_idx); 1074a19b462fSMarc Zyngier return -1; 1075cc2d3216SMarc Zyngier } 1076a050fa54SHeyi Guo prev_idx = rd_idx; 1077cc2d3216SMarc Zyngier cpu_relax(); 1078cc2d3216SMarc Zyngier udelay(1); 1079cc2d3216SMarc Zyngier } 1080a19b462fSMarc Zyngier 1081a19b462fSMarc Zyngier return 0; 1082cc2d3216SMarc Zyngier } 1083cc2d3216SMarc Zyngier 1084e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 1085e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 1086e4f9094bSMarc Zyngier void name(struct its_node *its, \ 1087e4f9094bSMarc Zyngier buildtype builder, \ 1088e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 1089e4f9094bSMarc Zyngier { \ 1090e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 1091e4f9094bSMarc Zyngier synctype *sync_obj; \ 1092e4f9094bSMarc Zyngier unsigned long flags; \ 1093a050fa54SHeyi Guo u64 rd_idx; \ 1094e4f9094bSMarc Zyngier \ 1095e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 1096e4f9094bSMarc Zyngier \ 1097e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 1098e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 1099e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1100e4f9094bSMarc Zyngier return; \ 1101e4f9094bSMarc Zyngier } \ 110267047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 1103e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 1104e4f9094bSMarc Zyngier \ 1105e4f9094bSMarc Zyngier if (sync_obj) { \ 1106e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 1107e4f9094bSMarc Zyngier if (!sync_cmd) \ 1108e4f9094bSMarc Zyngier goto post; \ 1109e4f9094bSMarc Zyngier \ 111067047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 1111e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 1112e4f9094bSMarc Zyngier } \ 1113e4f9094bSMarc Zyngier \ 1114e4f9094bSMarc Zyngier post: \ 1115a050fa54SHeyi Guo rd_idx = readl_relaxed(its->base + GITS_CREADR); \ 1116e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 1117e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1118e4f9094bSMarc Zyngier \ 1119a050fa54SHeyi Guo if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \ 1120a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 1121e4f9094bSMarc Zyngier } 1122e4f9094bSMarc Zyngier 112367047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 112467047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1125e4f9094bSMarc Zyngier struct its_collection *sync_col) 1126cc2d3216SMarc Zyngier { 1127cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 1128cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 1129e4f9094bSMarc Zyngier 1130cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 1131cc2d3216SMarc Zyngier } 1132cc2d3216SMarc Zyngier 1133e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 1134e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 1135cc2d3216SMarc Zyngier 113667047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 113767047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1138d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 1139d011e4e6SMarc Zyngier { 1140d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 1141d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 1142d011e4e6SMarc Zyngier 1143d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 1144d011e4e6SMarc Zyngier } 1145d011e4e6SMarc Zyngier 1146d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 1147d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 1148d011e4e6SMarc Zyngier 11498d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 11508d85dcedSMarc Zyngier { 11518d85dcedSMarc Zyngier struct its_cmd_desc desc; 11528d85dcedSMarc Zyngier 11538d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 11548d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 11558d85dcedSMarc Zyngier 11568d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 11578d85dcedSMarc Zyngier } 11588d85dcedSMarc Zyngier 11598d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 11608d85dcedSMarc Zyngier { 11618d85dcedSMarc Zyngier struct its_cmd_desc desc; 11628d85dcedSMarc Zyngier 11638d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 11648d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 11658d85dcedSMarc Zyngier 11668d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 1167cc2d3216SMarc Zyngier } 1168cc2d3216SMarc Zyngier 1169cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 1170cc2d3216SMarc Zyngier { 1171cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1172cc2d3216SMarc Zyngier 1173cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 1174cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 1175cc2d3216SMarc Zyngier 1176cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 1177cc2d3216SMarc Zyngier } 1178cc2d3216SMarc Zyngier 1179cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 1180cc2d3216SMarc Zyngier { 1181cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1182cc2d3216SMarc Zyngier 1183cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 1184cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 1185cc2d3216SMarc Zyngier 1186cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 1187cc2d3216SMarc Zyngier } 1188cc2d3216SMarc Zyngier 1189cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 1190cc2d3216SMarc Zyngier int valid) 1191cc2d3216SMarc Zyngier { 1192cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1193cc2d3216SMarc Zyngier 1194cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 1195cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 1196cc2d3216SMarc Zyngier 1197cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 1198cc2d3216SMarc Zyngier } 1199cc2d3216SMarc Zyngier 12006a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 1201cc2d3216SMarc Zyngier { 1202cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1203cc2d3216SMarc Zyngier 12046a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 12056a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 12066a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 1207cc2d3216SMarc Zyngier 12086a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 1209cc2d3216SMarc Zyngier } 1210cc2d3216SMarc Zyngier 1211cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 1212cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 1213cc2d3216SMarc Zyngier { 1214cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1215cc2d3216SMarc Zyngier 1216cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 1217cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 1218591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 1219cc2d3216SMarc Zyngier 1220cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 1221cc2d3216SMarc Zyngier } 1222cc2d3216SMarc Zyngier 1223cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 1224cc2d3216SMarc Zyngier { 1225cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1226cc2d3216SMarc Zyngier 1227cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 1228cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 1229cc2d3216SMarc Zyngier 1230cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 1231cc2d3216SMarc Zyngier } 1232cc2d3216SMarc Zyngier 1233cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 1234cc2d3216SMarc Zyngier { 1235cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1236cc2d3216SMarc Zyngier 1237cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 1238cc2d3216SMarc Zyngier 1239cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 1240cc2d3216SMarc Zyngier } 1241c48ed51cSMarc Zyngier 1242d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 1243d011e4e6SMarc Zyngier { 1244c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1245d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1246d011e4e6SMarc Zyngier 1247d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 1248d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 1249d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 1250d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 1251d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 1252d011e4e6SMarc Zyngier 1253d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 1254d011e4e6SMarc Zyngier } 1255d011e4e6SMarc Zyngier 1256d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 1257d011e4e6SMarc Zyngier { 1258c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1259d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1260d011e4e6SMarc Zyngier 1261d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 1262d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 1263d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 1264d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 1265d011e4e6SMarc Zyngier 1266d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 1267d011e4e6SMarc Zyngier } 1268d011e4e6SMarc Zyngier 126975fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 127075fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 1271eb78192bSMarc Zyngier { 1272eb78192bSMarc Zyngier struct its_cmd_desc desc; 1273eb78192bSMarc Zyngier 1274eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 1275eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 1276eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 127775fd951bSMarc Zyngier 1278eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 1279eb78192bSMarc Zyngier } 1280eb78192bSMarc Zyngier 12813171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 12823171a47aSMarc Zyngier { 128384243125SZenghui Yu struct its_cmd_desc desc = {}; 12843171a47aSMarc Zyngier struct its_node *its; 12853171a47aSMarc Zyngier unsigned long flags; 12863171a47aSMarc Zyngier int col_id = vpe->col_idx; 12873171a47aSMarc Zyngier 12883171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 12893171a47aSMarc Zyngier 12903171a47aSMarc Zyngier if (!its_list_map) { 12913171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 12923171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 12933171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 12943171a47aSMarc Zyngier return; 12953171a47aSMarc Zyngier } 12963171a47aSMarc Zyngier 12973171a47aSMarc Zyngier /* 12983171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 12993171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 13003171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 13013171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 13023171a47aSMarc Zyngier * 13033171a47aSMarc Zyngier * Wall <-- Head. 13043171a47aSMarc Zyngier */ 13053171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 13063171a47aSMarc Zyngier 13073171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 130884243125SZenghui Yu desc.its_vmovp_cmd.its_list = get_its_list(vpe->its_vm); 13093171a47aSMarc Zyngier 13103171a47aSMarc Zyngier /* Emit VMOVPs */ 13113171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 13120dd57fedSMarc Zyngier if (!is_v4(its)) 13133171a47aSMarc Zyngier continue; 13143171a47aSMarc Zyngier 1315009384b3SMarc Zyngier if (!require_its_list_vmovp(vpe->its_vm, its)) 13162247e1bfSMarc Zyngier continue; 13172247e1bfSMarc Zyngier 13183171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 13193171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 13203171a47aSMarc Zyngier } 13213171a47aSMarc Zyngier 13223171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 13233171a47aSMarc Zyngier } 13243171a47aSMarc Zyngier 132540619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1326eb78192bSMarc Zyngier { 1327eb78192bSMarc Zyngier struct its_cmd_desc desc; 1328eb78192bSMarc Zyngier 1329eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1330eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1331eb78192bSMarc Zyngier } 1332eb78192bSMarc Zyngier 133328614696SMarc Zyngier static void its_send_vinv(struct its_device *dev, u32 event_id) 133428614696SMarc Zyngier { 133528614696SMarc Zyngier struct its_cmd_desc desc; 133628614696SMarc Zyngier 133728614696SMarc Zyngier /* 133828614696SMarc Zyngier * There is no real VINV command. This is just a normal INV, 133928614696SMarc Zyngier * with a VSYNC instead of a SYNC. 134028614696SMarc Zyngier */ 134128614696SMarc Zyngier desc.its_inv_cmd.dev = dev; 134228614696SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 134328614696SMarc Zyngier 134428614696SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); 134528614696SMarc Zyngier } 134628614696SMarc Zyngier 1347ed0e4aa9SMarc Zyngier static void its_send_vint(struct its_device *dev, u32 event_id) 1348ed0e4aa9SMarc Zyngier { 1349ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1350ed0e4aa9SMarc Zyngier 1351ed0e4aa9SMarc Zyngier /* 1352ed0e4aa9SMarc Zyngier * There is no real VINT command. This is just a normal INT, 1353ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1354ed0e4aa9SMarc Zyngier */ 1355ed0e4aa9SMarc Zyngier desc.its_int_cmd.dev = dev; 1356ed0e4aa9SMarc Zyngier desc.its_int_cmd.event_id = event_id; 1357ed0e4aa9SMarc Zyngier 1358ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); 1359ed0e4aa9SMarc Zyngier } 1360ed0e4aa9SMarc Zyngier 1361ed0e4aa9SMarc Zyngier static void its_send_vclear(struct its_device *dev, u32 event_id) 1362ed0e4aa9SMarc Zyngier { 1363ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1364ed0e4aa9SMarc Zyngier 1365ed0e4aa9SMarc Zyngier /* 1366ed0e4aa9SMarc Zyngier * There is no real VCLEAR command. This is just a normal CLEAR, 1367ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1368ed0e4aa9SMarc Zyngier */ 1369ed0e4aa9SMarc Zyngier desc.its_clear_cmd.dev = dev; 1370ed0e4aa9SMarc Zyngier desc.its_clear_cmd.event_id = event_id; 1371ed0e4aa9SMarc Zyngier 1372ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); 1373ed0e4aa9SMarc Zyngier } 1374ed0e4aa9SMarc Zyngier 1375d97c97baSMarc Zyngier static void its_send_invdb(struct its_node *its, struct its_vpe *vpe) 1376d97c97baSMarc Zyngier { 1377d97c97baSMarc Zyngier struct its_cmd_desc desc; 1378d97c97baSMarc Zyngier 1379d97c97baSMarc Zyngier desc.its_invdb_cmd.vpe = vpe; 1380d97c97baSMarc Zyngier its_send_single_vcommand(its, its_build_invdb_cmd, &desc); 1381d97c97baSMarc Zyngier } 1382d97c97baSMarc Zyngier 1383c48ed51cSMarc Zyngier /* 1384c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1385c48ed51cSMarc Zyngier */ 1386015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1387c48ed51cSMarc Zyngier { 1388c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1389015ec038SMarc Zyngier irq_hw_number_t hwirq; 1390e1a2e201SMarc Zyngier void *va; 1391adcdb94eSMarc Zyngier u8 *cfg; 1392c48ed51cSMarc Zyngier 1393c1d4d5cdSMarc Zyngier if (map) { 1394c1d4d5cdSMarc Zyngier va = page_address(map->vm->vprop_page); 1395d4d7b4adSMarc Zyngier hwirq = map->vintid; 1396d4d7b4adSMarc Zyngier 1397d4d7b4adSMarc Zyngier /* Remember the updated property */ 1398d4d7b4adSMarc Zyngier map->properties &= ~clr; 1399d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1400015ec038SMarc Zyngier } else { 1401e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1402015ec038SMarc Zyngier hwirq = d->hwirq; 1403015ec038SMarc Zyngier } 1404adcdb94eSMarc Zyngier 1405e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1406adcdb94eSMarc Zyngier *cfg &= ~clr; 1407015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1408c48ed51cSMarc Zyngier 1409c48ed51cSMarc Zyngier /* 1410c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1411c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1412c48ed51cSMarc Zyngier * Humpf... 1413c48ed51cSMarc Zyngier */ 1414c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1415328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1416c48ed51cSMarc Zyngier else 1417c48ed51cSMarc Zyngier dsb(ishst); 1418015ec038SMarc Zyngier } 1419015ec038SMarc Zyngier 14202f4f064bSMarc Zyngier static void wait_for_syncr(void __iomem *rdbase) 14212f4f064bSMarc Zyngier { 142204d80dbeSHeyi Guo while (readl_relaxed(rdbase + GICR_SYNCR) & 1) 14232f4f064bSMarc Zyngier cpu_relax(); 14242f4f064bSMarc Zyngier } 14252f4f064bSMarc Zyngier 1426425c09beSMarc Zyngier static void direct_lpi_inv(struct irq_data *d) 1427425c09beSMarc Zyngier { 1428f4a81f5aSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1429425c09beSMarc Zyngier void __iomem *rdbase; 1430f3a05921SMarc Zyngier unsigned long flags; 1431f4a81f5aSMarc Zyngier u64 val; 1432f3a05921SMarc Zyngier int cpu; 1433f4a81f5aSMarc Zyngier 1434f4a81f5aSMarc Zyngier if (map) { 1435f4a81f5aSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1436f4a81f5aSMarc Zyngier 1437f4a81f5aSMarc Zyngier WARN_ON(!is_v4_1(its_dev->its)); 1438f4a81f5aSMarc Zyngier 1439f4a81f5aSMarc Zyngier val = GICR_INVLPIR_V; 1440f4a81f5aSMarc Zyngier val |= FIELD_PREP(GICR_INVLPIR_VPEID, map->vpe->vpe_id); 1441f4a81f5aSMarc Zyngier val |= FIELD_PREP(GICR_INVLPIR_INTID, map->vintid); 1442f4a81f5aSMarc Zyngier } else { 1443f4a81f5aSMarc Zyngier val = d->hwirq; 1444f4a81f5aSMarc Zyngier } 1445425c09beSMarc Zyngier 1446425c09beSMarc Zyngier /* Target the redistributor this LPI is currently routed to */ 1447f3a05921SMarc Zyngier cpu = irq_to_cpuid_lock(d, &flags); 14489058a4e9SMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 1449f3a05921SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; 1450f4a81f5aSMarc Zyngier gic_write_lpir(val, rdbase + GICR_INVLPIR); 1451425c09beSMarc Zyngier 1452425c09beSMarc Zyngier wait_for_syncr(rdbase); 14539058a4e9SMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 1454f3a05921SMarc Zyngier irq_to_cpuid_unlock(d, flags); 1455425c09beSMarc Zyngier } 1456425c09beSMarc Zyngier 1457015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1458015ec038SMarc Zyngier { 1459015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1460015ec038SMarc Zyngier 1461015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1462f4a81f5aSMarc Zyngier if (gic_rdists->has_direct_lpi && 1463f4a81f5aSMarc Zyngier (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) 1464425c09beSMarc Zyngier direct_lpi_inv(d); 146528614696SMarc Zyngier else if (!irqd_is_forwarded_to_vcpu(d)) 1466adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 146728614696SMarc Zyngier else 146828614696SMarc Zyngier its_send_vinv(its_dev, its_get_event_id(d)); 1469c48ed51cSMarc Zyngier } 1470c48ed51cSMarc Zyngier 1471015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1472015ec038SMarc Zyngier { 1473015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1474015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1475c1d4d5cdSMarc Zyngier struct its_vlpi_map *map; 1476015ec038SMarc Zyngier 14773858d4dfSMarc Zyngier /* 14783858d4dfSMarc Zyngier * GICv4.1 does away with the per-LPI nonsense, nothing to do 14793858d4dfSMarc Zyngier * here. 14803858d4dfSMarc Zyngier */ 14813858d4dfSMarc Zyngier if (is_v4_1(its_dev->its)) 14823858d4dfSMarc Zyngier return; 14833858d4dfSMarc Zyngier 1484c1d4d5cdSMarc Zyngier map = dev_event_to_vlpi_map(its_dev, event); 1485c1d4d5cdSMarc Zyngier 1486c1d4d5cdSMarc Zyngier if (map->db_enabled == enable) 1487015ec038SMarc Zyngier return; 1488015ec038SMarc Zyngier 1489c1d4d5cdSMarc Zyngier map->db_enabled = enable; 1490015ec038SMarc Zyngier 1491015ec038SMarc Zyngier /* 1492015ec038SMarc Zyngier * More fun with the architecture: 1493015ec038SMarc Zyngier * 1494015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1495015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1496015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1497015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1498015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1499015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1500015ec038SMarc Zyngier */ 1501015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1502c48ed51cSMarc Zyngier } 1503c48ed51cSMarc Zyngier 1504c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1505c48ed51cSMarc Zyngier { 1506015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1507015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1508015ec038SMarc Zyngier 1509adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1510c48ed51cSMarc Zyngier } 1511c48ed51cSMarc Zyngier 1512c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1513c48ed51cSMarc Zyngier { 1514015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1515015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1516015ec038SMarc Zyngier 1517adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1518c48ed51cSMarc Zyngier } 1519c48ed51cSMarc Zyngier 15202f13ff1dSMarc Zyngier static __maybe_unused u32 its_read_lpi_count(struct irq_data *d, int cpu) 15212f13ff1dSMarc Zyngier { 15222f13ff1dSMarc Zyngier if (irqd_affinity_is_managed(d)) 15232f13ff1dSMarc Zyngier return atomic_read(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); 15242f13ff1dSMarc Zyngier 15252f13ff1dSMarc Zyngier return atomic_read(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); 15262f13ff1dSMarc Zyngier } 15272f13ff1dSMarc Zyngier 15282f13ff1dSMarc Zyngier static void its_inc_lpi_count(struct irq_data *d, int cpu) 15292f13ff1dSMarc Zyngier { 15302f13ff1dSMarc Zyngier if (irqd_affinity_is_managed(d)) 15312f13ff1dSMarc Zyngier atomic_inc(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); 15322f13ff1dSMarc Zyngier else 15332f13ff1dSMarc Zyngier atomic_inc(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); 15342f13ff1dSMarc Zyngier } 15352f13ff1dSMarc Zyngier 15362f13ff1dSMarc Zyngier static void its_dec_lpi_count(struct irq_data *d, int cpu) 15372f13ff1dSMarc Zyngier { 15382f13ff1dSMarc Zyngier if (irqd_affinity_is_managed(d)) 15392f13ff1dSMarc Zyngier atomic_dec(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); 15402f13ff1dSMarc Zyngier else 15412f13ff1dSMarc Zyngier atomic_dec(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); 15422f13ff1dSMarc Zyngier } 15432f13ff1dSMarc Zyngier 1544c5d6082dSMarc Zyngier static unsigned int cpumask_pick_least_loaded(struct irq_data *d, 1545c5d6082dSMarc Zyngier const struct cpumask *cpu_mask) 1546c5d6082dSMarc Zyngier { 1547c5d6082dSMarc Zyngier unsigned int cpu = nr_cpu_ids, tmp; 1548c5d6082dSMarc Zyngier int count = S32_MAX; 1549c5d6082dSMarc Zyngier 1550c5d6082dSMarc Zyngier for_each_cpu(tmp, cpu_mask) { 1551c5d6082dSMarc Zyngier int this_count = its_read_lpi_count(d, tmp); 1552c5d6082dSMarc Zyngier if (this_count < count) { 1553c5d6082dSMarc Zyngier cpu = tmp; 1554c5d6082dSMarc Zyngier count = this_count; 1555c5d6082dSMarc Zyngier } 1556c5d6082dSMarc Zyngier } 1557c5d6082dSMarc Zyngier 1558c5d6082dSMarc Zyngier return cpu; 1559c5d6082dSMarc Zyngier } 1560c5d6082dSMarc Zyngier 1561c5d6082dSMarc Zyngier /* 1562c5d6082dSMarc Zyngier * As suggested by Thomas Gleixner in: 1563c5d6082dSMarc Zyngier * https://lore.kernel.org/r/87h80q2aoc.fsf@nanos.tec.linutronix.de 1564c5d6082dSMarc Zyngier */ 1565c5d6082dSMarc Zyngier static int its_select_cpu(struct irq_data *d, 1566c5d6082dSMarc Zyngier const struct cpumask *aff_mask) 1567c5d6082dSMarc Zyngier { 1568c5d6082dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1569c5d6082dSMarc Zyngier cpumask_var_t tmpmask; 1570c5d6082dSMarc Zyngier int cpu, node; 1571c5d6082dSMarc Zyngier 1572c5d6082dSMarc Zyngier if (!alloc_cpumask_var(&tmpmask, GFP_ATOMIC)) 1573c5d6082dSMarc Zyngier return -ENOMEM; 1574c5d6082dSMarc Zyngier 1575c5d6082dSMarc Zyngier node = its_dev->its->numa_node; 1576c5d6082dSMarc Zyngier 1577c5d6082dSMarc Zyngier if (!irqd_affinity_is_managed(d)) { 1578c5d6082dSMarc Zyngier /* First try the NUMA node */ 1579c5d6082dSMarc Zyngier if (node != NUMA_NO_NODE) { 1580c5d6082dSMarc Zyngier /* 1581c5d6082dSMarc Zyngier * Try the intersection of the affinity mask and the 1582c5d6082dSMarc Zyngier * node mask (and the online mask, just to be safe). 1583c5d6082dSMarc Zyngier */ 1584c5d6082dSMarc Zyngier cpumask_and(tmpmask, cpumask_of_node(node), aff_mask); 1585c5d6082dSMarc Zyngier cpumask_and(tmpmask, tmpmask, cpu_online_mask); 1586c5d6082dSMarc Zyngier 1587c5d6082dSMarc Zyngier /* 1588c5d6082dSMarc Zyngier * Ideally, we would check if the mask is empty, and 1589c5d6082dSMarc Zyngier * try again on the full node here. 1590c5d6082dSMarc Zyngier * 1591c5d6082dSMarc Zyngier * But it turns out that the way ACPI describes the 1592c5d6082dSMarc Zyngier * affinity for ITSs only deals about memory, and 1593c5d6082dSMarc Zyngier * not target CPUs, so it cannot describe a single 1594c5d6082dSMarc Zyngier * ITS placed next to two NUMA nodes. 1595c5d6082dSMarc Zyngier * 1596c5d6082dSMarc Zyngier * Instead, just fallback on the online mask. This 1597c5d6082dSMarc Zyngier * diverges from Thomas' suggestion above. 1598c5d6082dSMarc Zyngier */ 1599c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, tmpmask); 1600c5d6082dSMarc Zyngier if (cpu < nr_cpu_ids) 1601c5d6082dSMarc Zyngier goto out; 1602c5d6082dSMarc Zyngier 1603c5d6082dSMarc Zyngier /* If we can't cross sockets, give up */ 1604c5d6082dSMarc Zyngier if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144)) 1605c5d6082dSMarc Zyngier goto out; 1606c5d6082dSMarc Zyngier 1607c5d6082dSMarc Zyngier /* If the above failed, expand the search */ 1608c5d6082dSMarc Zyngier } 1609c5d6082dSMarc Zyngier 1610c5d6082dSMarc Zyngier /* Try the intersection of the affinity and online masks */ 1611c5d6082dSMarc Zyngier cpumask_and(tmpmask, aff_mask, cpu_online_mask); 1612c5d6082dSMarc Zyngier 1613c5d6082dSMarc Zyngier /* If that doesn't fly, the online mask is the last resort */ 1614c5d6082dSMarc Zyngier if (cpumask_empty(tmpmask)) 1615c5d6082dSMarc Zyngier cpumask_copy(tmpmask, cpu_online_mask); 1616c5d6082dSMarc Zyngier 1617c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, tmpmask); 1618c5d6082dSMarc Zyngier } else { 1619c5d6082dSMarc Zyngier cpumask_and(tmpmask, irq_data_get_affinity_mask(d), cpu_online_mask); 1620c5d6082dSMarc Zyngier 1621c5d6082dSMarc Zyngier /* If we cannot cross sockets, limit the search to that node */ 1622c5d6082dSMarc Zyngier if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) && 1623c5d6082dSMarc Zyngier node != NUMA_NO_NODE) 1624c5d6082dSMarc Zyngier cpumask_and(tmpmask, tmpmask, cpumask_of_node(node)); 1625c5d6082dSMarc Zyngier 1626c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, tmpmask); 1627c5d6082dSMarc Zyngier } 1628c5d6082dSMarc Zyngier out: 1629c5d6082dSMarc Zyngier free_cpumask_var(tmpmask); 1630c5d6082dSMarc Zyngier 1631c5d6082dSMarc Zyngier pr_debug("IRQ%d -> %*pbl CPU%d\n", d->irq, cpumask_pr_args(aff_mask), cpu); 1632c5d6082dSMarc Zyngier return cpu; 1633c5d6082dSMarc Zyngier } 1634c5d6082dSMarc Zyngier 1635c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1636c48ed51cSMarc Zyngier bool force) 1637c48ed51cSMarc Zyngier { 1638c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1639c48ed51cSMarc Zyngier struct its_collection *target_col; 1640c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1641c5d6082dSMarc Zyngier int cpu, prev_cpu; 1642c48ed51cSMarc Zyngier 1643015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1644015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1645015ec038SMarc Zyngier return -EINVAL; 1646015ec038SMarc Zyngier 16472f13ff1dSMarc Zyngier prev_cpu = its_dev->event_map.col_map[id]; 16482f13ff1dSMarc Zyngier its_dec_lpi_count(d, prev_cpu); 16492f13ff1dSMarc Zyngier 1650c5d6082dSMarc Zyngier if (!force) 1651c5d6082dSMarc Zyngier cpu = its_select_cpu(d, mask_val); 1652c5d6082dSMarc Zyngier else 1653c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, mask_val); 1654fbf8f40eSGanapatrao Kulkarni 1655c5d6082dSMarc Zyngier if (cpu < 0 || cpu >= nr_cpu_ids) 16562f13ff1dSMarc Zyngier goto err; 1657c48ed51cSMarc Zyngier 16588b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 16592f13ff1dSMarc Zyngier if (cpu != prev_cpu) { 1660c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1661c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1662591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 16630d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 16648b8d94a7SMaJun } 1665c48ed51cSMarc Zyngier 16662f13ff1dSMarc Zyngier its_inc_lpi_count(d, cpu); 16672f13ff1dSMarc Zyngier 1668c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 16692f13ff1dSMarc Zyngier 16702f13ff1dSMarc Zyngier err: 16712f13ff1dSMarc Zyngier its_inc_lpi_count(d, prev_cpu); 16722f13ff1dSMarc Zyngier return -EINVAL; 1673c48ed51cSMarc Zyngier } 1674c48ed51cSMarc Zyngier 1675558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1676558b0165SArd Biesheuvel { 1677558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1678558b0165SArd Biesheuvel 1679558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1680558b0165SArd Biesheuvel } 1681558b0165SArd Biesheuvel 1682b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1683b48ac83dSMarc Zyngier { 1684b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1685b48ac83dSMarc Zyngier struct its_node *its; 1686b48ac83dSMarc Zyngier u64 addr; 1687b48ac83dSMarc Zyngier 1688b48ac83dSMarc Zyngier its = its_dev->its; 1689558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1690b48ac83dSMarc Zyngier 1691b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1692b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1693b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 169444bb7e24SRobin Murphy 169535ae7df2SJulien Grall iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); 1696b48ac83dSMarc Zyngier } 1697b48ac83dSMarc Zyngier 16988d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 16998d85dcedSMarc Zyngier enum irqchip_irq_state which, 17008d85dcedSMarc Zyngier bool state) 17018d85dcedSMarc Zyngier { 17028d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 17038d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 17048d85dcedSMarc Zyngier 17058d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 17068d85dcedSMarc Zyngier return -EINVAL; 17078d85dcedSMarc Zyngier 1708ed0e4aa9SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1709ed0e4aa9SMarc Zyngier if (state) 1710ed0e4aa9SMarc Zyngier its_send_vint(its_dev, event); 1711ed0e4aa9SMarc Zyngier else 1712ed0e4aa9SMarc Zyngier its_send_vclear(its_dev, event); 1713ed0e4aa9SMarc Zyngier } else { 17148d85dcedSMarc Zyngier if (state) 17158d85dcedSMarc Zyngier its_send_int(its_dev, event); 17168d85dcedSMarc Zyngier else 17178d85dcedSMarc Zyngier its_send_clear(its_dev, event); 1718ed0e4aa9SMarc Zyngier } 17198d85dcedSMarc Zyngier 17208d85dcedSMarc Zyngier return 0; 17218d85dcedSMarc Zyngier } 17228d85dcedSMarc Zyngier 17235f774f5eSMarc Zyngier static int its_irq_retrigger(struct irq_data *d) 17245f774f5eSMarc Zyngier { 17255f774f5eSMarc Zyngier return !its_irq_set_irqchip_state(d, IRQCHIP_STATE_PENDING, true); 17265f774f5eSMarc Zyngier } 17275f774f5eSMarc Zyngier 1728009384b3SMarc Zyngier /* 1729009384b3SMarc Zyngier * Two favourable cases: 1730009384b3SMarc Zyngier * 1731009384b3SMarc Zyngier * (a) Either we have a GICv4.1, and all vPEs have to be mapped at all times 1732009384b3SMarc Zyngier * for vSGI delivery 1733009384b3SMarc Zyngier * 1734009384b3SMarc Zyngier * (b) Or the ITSs do not use a list map, meaning that VMOVP is cheap enough 1735009384b3SMarc Zyngier * and we're better off mapping all VPEs always 1736009384b3SMarc Zyngier * 1737009384b3SMarc Zyngier * If neither (a) nor (b) is true, then we map vPEs on demand. 1738009384b3SMarc Zyngier * 1739009384b3SMarc Zyngier */ 1740009384b3SMarc Zyngier static bool gic_requires_eager_mapping(void) 1741009384b3SMarc Zyngier { 1742009384b3SMarc Zyngier if (!its_list_map || gic_rdists->has_rvpeid) 1743009384b3SMarc Zyngier return true; 1744009384b3SMarc Zyngier 1745009384b3SMarc Zyngier return false; 1746009384b3SMarc Zyngier } 1747009384b3SMarc Zyngier 17482247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 17492247e1bfSMarc Zyngier { 17502247e1bfSMarc Zyngier unsigned long flags; 17512247e1bfSMarc Zyngier 1752009384b3SMarc Zyngier if (gic_requires_eager_mapping()) 17532247e1bfSMarc Zyngier return; 17542247e1bfSMarc Zyngier 17552247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 17562247e1bfSMarc Zyngier 17572247e1bfSMarc Zyngier /* 17582247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 17592247e1bfSMarc Zyngier * them mapped now. 17602247e1bfSMarc Zyngier */ 17612247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 17622247e1bfSMarc Zyngier 17632247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 17642247e1bfSMarc Zyngier int i; 17652247e1bfSMarc Zyngier 17662247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 17672247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 176844c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 17692247e1bfSMarc Zyngier 17702247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 17712247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 17722247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 17732247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 177444c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 17752247e1bfSMarc Zyngier } 17762247e1bfSMarc Zyngier } 17772247e1bfSMarc Zyngier 17782247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 17792247e1bfSMarc Zyngier } 17802247e1bfSMarc Zyngier 17812247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 17822247e1bfSMarc Zyngier { 17832247e1bfSMarc Zyngier unsigned long flags; 17842247e1bfSMarc Zyngier 17852247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 1786009384b3SMarc Zyngier if (gic_requires_eager_mapping()) 17872247e1bfSMarc Zyngier return; 17882247e1bfSMarc Zyngier 17892247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 17902247e1bfSMarc Zyngier 17912247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 17922247e1bfSMarc Zyngier int i; 17932247e1bfSMarc Zyngier 17942247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 17952247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 17962247e1bfSMarc Zyngier } 17972247e1bfSMarc Zyngier 17982247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 17992247e1bfSMarc Zyngier } 18002247e1bfSMarc Zyngier 1801d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1802d011e4e6SMarc Zyngier { 1803d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1804d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1805d011e4e6SMarc Zyngier int ret = 0; 1806d011e4e6SMarc Zyngier 1807d011e4e6SMarc Zyngier if (!info->map) 1808d011e4e6SMarc Zyngier return -EINVAL; 1809d011e4e6SMarc Zyngier 181011635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1811d011e4e6SMarc Zyngier 1812d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1813d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1814d011e4e6SMarc Zyngier 18156396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 181611635fa2SMarc Zyngier GFP_ATOMIC); 1817d011e4e6SMarc Zyngier if (!maps) { 1818d011e4e6SMarc Zyngier ret = -ENOMEM; 1819d011e4e6SMarc Zyngier goto out; 1820d011e4e6SMarc Zyngier } 1821d011e4e6SMarc Zyngier 1822d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1823d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1824d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1825d011e4e6SMarc Zyngier ret = -EINVAL; 1826d011e4e6SMarc Zyngier goto out; 1827d011e4e6SMarc Zyngier } 1828d011e4e6SMarc Zyngier 1829d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1830d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1831d011e4e6SMarc Zyngier 1832d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1833d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1834d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1835d011e4e6SMarc Zyngier } else { 18362247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 18372247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 18382247e1bfSMarc Zyngier 1839d4d7b4adSMarc Zyngier /* 1840d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1841d4d7b4adSMarc Zyngier * start poking the virtual property table. 1842d4d7b4adSMarc Zyngier */ 1843d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1844d4d7b4adSMarc Zyngier 1845d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1846d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1847d4d7b4adSMarc Zyngier 1848d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1849d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1850d011e4e6SMarc Zyngier 1851d011e4e6SMarc Zyngier /* and install the virtual one */ 1852d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1853d011e4e6SMarc Zyngier 1854d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1855d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1856d011e4e6SMarc Zyngier } 1857d011e4e6SMarc Zyngier 1858d011e4e6SMarc Zyngier out: 185911635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1860d011e4e6SMarc Zyngier return ret; 1861d011e4e6SMarc Zyngier } 1862d011e4e6SMarc Zyngier 1863d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1864d011e4e6SMarc Zyngier { 1865d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1866046b5054SMarc Zyngier struct its_vlpi_map *map; 1867d011e4e6SMarc Zyngier int ret = 0; 1868d011e4e6SMarc Zyngier 186911635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1870d011e4e6SMarc Zyngier 1871046b5054SMarc Zyngier map = get_vlpi_map(d); 1872046b5054SMarc Zyngier 1873046b5054SMarc Zyngier if (!its_dev->event_map.vm || !map) { 1874d011e4e6SMarc Zyngier ret = -EINVAL; 1875d011e4e6SMarc Zyngier goto out; 1876d011e4e6SMarc Zyngier } 1877d011e4e6SMarc Zyngier 1878d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1879c1d4d5cdSMarc Zyngier *info->map = *map; 1880d011e4e6SMarc Zyngier 1881d011e4e6SMarc Zyngier out: 188211635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1883d011e4e6SMarc Zyngier return ret; 1884d011e4e6SMarc Zyngier } 1885d011e4e6SMarc Zyngier 1886d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1887d011e4e6SMarc Zyngier { 1888d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1889d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1890d011e4e6SMarc Zyngier int ret = 0; 1891d011e4e6SMarc Zyngier 189211635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1893d011e4e6SMarc Zyngier 1894d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1895d011e4e6SMarc Zyngier ret = -EINVAL; 1896d011e4e6SMarc Zyngier goto out; 1897d011e4e6SMarc Zyngier } 1898d011e4e6SMarc Zyngier 1899d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1900d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1901d011e4e6SMarc Zyngier 1902d011e4e6SMarc Zyngier /* and restore the physical one */ 1903d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1904d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1905d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1906d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1907d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1908d011e4e6SMarc Zyngier 19092247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 19102247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 19112247e1bfSMarc Zyngier 1912d011e4e6SMarc Zyngier /* 1913d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1914d011e4e6SMarc Zyngier * this was the last VLPI. 1915d011e4e6SMarc Zyngier */ 1916d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1917d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1918d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1919d011e4e6SMarc Zyngier } 1920d011e4e6SMarc Zyngier 1921d011e4e6SMarc Zyngier out: 192211635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1923d011e4e6SMarc Zyngier return ret; 1924d011e4e6SMarc Zyngier } 1925d011e4e6SMarc Zyngier 1926015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1927015ec038SMarc Zyngier { 1928015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1929015ec038SMarc Zyngier 1930015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1931015ec038SMarc Zyngier return -EINVAL; 1932015ec038SMarc Zyngier 1933015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1934015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1935015ec038SMarc Zyngier else 1936015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1937015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1938015ec038SMarc Zyngier 1939015ec038SMarc Zyngier return 0; 1940015ec038SMarc Zyngier } 1941015ec038SMarc Zyngier 1942c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1943c808eea8SMarc Zyngier { 1944c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1945c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1946c808eea8SMarc Zyngier 1947c808eea8SMarc Zyngier /* Need a v4 ITS */ 19480dd57fedSMarc Zyngier if (!is_v4(its_dev->its)) 1949c808eea8SMarc Zyngier return -EINVAL; 1950c808eea8SMarc Zyngier 1951d011e4e6SMarc Zyngier /* Unmap request? */ 1952d011e4e6SMarc Zyngier if (!info) 1953d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1954d011e4e6SMarc Zyngier 1955c808eea8SMarc Zyngier switch (info->cmd_type) { 1956c808eea8SMarc Zyngier case MAP_VLPI: 1957d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1958c808eea8SMarc Zyngier 1959c808eea8SMarc Zyngier case GET_VLPI: 1960d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1961c808eea8SMarc Zyngier 1962c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1963c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1964015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1965c808eea8SMarc Zyngier 1966c808eea8SMarc Zyngier default: 1967c808eea8SMarc Zyngier return -EINVAL; 1968c808eea8SMarc Zyngier } 1969c808eea8SMarc Zyngier } 1970c808eea8SMarc Zyngier 1971c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1972c48ed51cSMarc Zyngier .name = "ITS", 1973c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1974c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1975004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1976c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1977b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 19788d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 19795f774f5eSMarc Zyngier .irq_retrigger = its_irq_retrigger, 1980c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1981b48ac83dSMarc Zyngier }; 1982b48ac83dSMarc Zyngier 1983880cb3cdSMarc Zyngier 1984bf9529f8SMarc Zyngier /* 1985bf9529f8SMarc Zyngier * How we allocate LPIs: 1986bf9529f8SMarc Zyngier * 1987880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1988880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1989880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1990880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1991bf9529f8SMarc Zyngier * 1992880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1993880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1994880cb3cdSMarc Zyngier * already free block. 1995880cb3cdSMarc Zyngier * 1996880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1997880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1998880cb3cdSMarc Zyngier */ 19994cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 2000880cb3cdSMarc Zyngier 2001880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 2002880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 2003bf9529f8SMarc Zyngier 2004880cb3cdSMarc Zyngier struct lpi_range { 2005880cb3cdSMarc Zyngier struct list_head entry; 2006880cb3cdSMarc Zyngier u32 base_id; 2007880cb3cdSMarc Zyngier u32 span; 2008880cb3cdSMarc Zyngier }; 2009880cb3cdSMarc Zyngier 2010880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 2011bf9529f8SMarc Zyngier { 2012880cb3cdSMarc Zyngier struct lpi_range *range; 2013880cb3cdSMarc Zyngier 20141c73fac5SRasmus Villemoes range = kmalloc(sizeof(*range), GFP_KERNEL); 2015880cb3cdSMarc Zyngier if (range) { 2016880cb3cdSMarc Zyngier range->base_id = base; 2017880cb3cdSMarc Zyngier range->span = span; 2018bf9529f8SMarc Zyngier } 2019bf9529f8SMarc Zyngier 2020880cb3cdSMarc Zyngier return range; 2021880cb3cdSMarc Zyngier } 2022880cb3cdSMarc Zyngier 2023880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 2024880cb3cdSMarc Zyngier { 2025880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 2026880cb3cdSMarc Zyngier int err = -ENOSPC; 2027880cb3cdSMarc Zyngier 2028880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 2029880cb3cdSMarc Zyngier 2030880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 2031880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 2032880cb3cdSMarc Zyngier *base = range->base_id; 2033880cb3cdSMarc Zyngier range->base_id += nr_lpis; 2034880cb3cdSMarc Zyngier range->span -= nr_lpis; 2035880cb3cdSMarc Zyngier 2036880cb3cdSMarc Zyngier if (range->span == 0) { 2037880cb3cdSMarc Zyngier list_del(&range->entry); 2038880cb3cdSMarc Zyngier kfree(range); 2039880cb3cdSMarc Zyngier } 2040880cb3cdSMarc Zyngier 2041880cb3cdSMarc Zyngier err = 0; 2042880cb3cdSMarc Zyngier break; 2043880cb3cdSMarc Zyngier } 2044880cb3cdSMarc Zyngier } 2045880cb3cdSMarc Zyngier 2046880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 2047880cb3cdSMarc Zyngier 2048880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 2049880cb3cdSMarc Zyngier return err; 2050880cb3cdSMarc Zyngier } 2051880cb3cdSMarc Zyngier 205212eade12SRasmus Villemoes static void merge_lpi_ranges(struct lpi_range *a, struct lpi_range *b) 205312eade12SRasmus Villemoes { 205412eade12SRasmus Villemoes if (&a->entry == &lpi_range_list || &b->entry == &lpi_range_list) 205512eade12SRasmus Villemoes return; 205612eade12SRasmus Villemoes if (a->base_id + a->span != b->base_id) 205712eade12SRasmus Villemoes return; 205812eade12SRasmus Villemoes b->base_id = a->base_id; 205912eade12SRasmus Villemoes b->span += a->span; 206012eade12SRasmus Villemoes list_del(&a->entry); 206112eade12SRasmus Villemoes kfree(a); 206212eade12SRasmus Villemoes } 206312eade12SRasmus Villemoes 2064880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 2065880cb3cdSMarc Zyngier { 206612eade12SRasmus Villemoes struct lpi_range *new, *old; 2067880cb3cdSMarc Zyngier 2068880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 2069b31a3838SRasmus Villemoes if (!new) 2070b31a3838SRasmus Villemoes return -ENOMEM; 2071880cb3cdSMarc Zyngier 2072880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 2073880cb3cdSMarc Zyngier 207412eade12SRasmus Villemoes list_for_each_entry_reverse(old, &lpi_range_list, entry) { 207512eade12SRasmus Villemoes if (old->base_id < base) 207612eade12SRasmus Villemoes break; 2077880cb3cdSMarc Zyngier } 207812eade12SRasmus Villemoes /* 207912eade12SRasmus Villemoes * old is the last element with ->base_id smaller than base, 208012eade12SRasmus Villemoes * so new goes right after it. If there are no elements with 208112eade12SRasmus Villemoes * ->base_id smaller than base, &old->entry ends up pointing 208212eade12SRasmus Villemoes * at the head of the list, and inserting new it the start of 208312eade12SRasmus Villemoes * the list is the right thing to do in that case as well. 208412eade12SRasmus Villemoes */ 208512eade12SRasmus Villemoes list_add(&new->entry, &old->entry); 208612eade12SRasmus Villemoes /* 208712eade12SRasmus Villemoes * Now check if we can merge with the preceding and/or 208812eade12SRasmus Villemoes * following ranges. 208912eade12SRasmus Villemoes */ 209012eade12SRasmus Villemoes merge_lpi_ranges(old, new); 209112eade12SRasmus Villemoes merge_lpi_ranges(new, list_next_entry(new, entry)); 2092880cb3cdSMarc Zyngier 2093880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 2094b31a3838SRasmus Villemoes return 0; 2095bf9529f8SMarc Zyngier } 2096bf9529f8SMarc Zyngier 209704a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 2098bf9529f8SMarc Zyngier { 2099880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 210012b2905aSMarc Zyngier u32 numlpis; 2101880cb3cdSMarc Zyngier int err; 2102bf9529f8SMarc Zyngier 210312b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 210412b2905aSMarc Zyngier 210512b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 210612b2905aSMarc Zyngier lpis = numlpis; 210712b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 210812b2905aSMarc Zyngier lpis); 210912b2905aSMarc Zyngier } 211012b2905aSMarc Zyngier 2111880cb3cdSMarc Zyngier /* 2112880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 2113880cb3cdSMarc Zyngier * full range of LPIs. 2114880cb3cdSMarc Zyngier */ 2115880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 2116880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 2117880cb3cdSMarc Zyngier return err; 2118bf9529f8SMarc Zyngier } 2119bf9529f8SMarc Zyngier 212038dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 2121bf9529f8SMarc Zyngier { 2122bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 2123880cb3cdSMarc Zyngier int err = 0; 2124bf9529f8SMarc Zyngier 2125bf9529f8SMarc Zyngier do { 212638dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 2127880cb3cdSMarc Zyngier if (!err) 2128bf9529f8SMarc Zyngier break; 2129bf9529f8SMarc Zyngier 213038dd7c49SMarc Zyngier nr_irqs /= 2; 213138dd7c49SMarc Zyngier } while (nr_irqs > 0); 2132bf9529f8SMarc Zyngier 213345725e0fSMarc Zyngier if (!nr_irqs) 213445725e0fSMarc Zyngier err = -ENOSPC; 213545725e0fSMarc Zyngier 2136880cb3cdSMarc Zyngier if (err) 2137bf9529f8SMarc Zyngier goto out; 2138bf9529f8SMarc Zyngier 213938dd7c49SMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_irqs), sizeof (long), GFP_ATOMIC); 2140bf9529f8SMarc Zyngier if (!bitmap) 2141bf9529f8SMarc Zyngier goto out; 2142bf9529f8SMarc Zyngier 214338dd7c49SMarc Zyngier *nr_ids = nr_irqs; 2144bf9529f8SMarc Zyngier 2145bf9529f8SMarc Zyngier out: 2146c8415b94SMarc Zyngier if (!bitmap) 2147c8415b94SMarc Zyngier *base = *nr_ids = 0; 2148c8415b94SMarc Zyngier 2149bf9529f8SMarc Zyngier return bitmap; 2150bf9529f8SMarc Zyngier } 2151bf9529f8SMarc Zyngier 215238dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 2153bf9529f8SMarc Zyngier { 2154880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 2155cf2be8baSMarc Zyngier kfree(bitmap); 2156bf9529f8SMarc Zyngier } 21571ac19ca6SMarc Zyngier 2158053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 2159053be485SMarc Zyngier { 2160053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 2161053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 2162053be485SMarc Zyngier 2163053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 2164053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 2165053be485SMarc Zyngier } 2166053be485SMarc Zyngier 21670e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 21680e5ccf91SMarc Zyngier { 21690e5ccf91SMarc Zyngier struct page *prop_page; 21701ac19ca6SMarc Zyngier 21710e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 21720e5ccf91SMarc Zyngier if (!prop_page) 21730e5ccf91SMarc Zyngier return NULL; 21740e5ccf91SMarc Zyngier 2175053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 21760e5ccf91SMarc Zyngier 21770e5ccf91SMarc Zyngier return prop_page; 21780e5ccf91SMarc Zyngier } 21790e5ccf91SMarc Zyngier 21807d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 21817d75bbb4SMarc Zyngier { 21827d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 21837d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 21847d75bbb4SMarc Zyngier } 21851ac19ca6SMarc Zyngier 21865e2c9f9aSMarc Zyngier static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) 21875e2c9f9aSMarc Zyngier { 21885e2c9f9aSMarc Zyngier phys_addr_t start, end, addr_end; 21895e2c9f9aSMarc Zyngier u64 i; 21905e2c9f9aSMarc Zyngier 21915e2c9f9aSMarc Zyngier /* 21925e2c9f9aSMarc Zyngier * We don't bother checking for a kdump kernel as by 21935e2c9f9aSMarc Zyngier * construction, the LPI tables are out of this kernel's 21945e2c9f9aSMarc Zyngier * memory map. 21955e2c9f9aSMarc Zyngier */ 21965e2c9f9aSMarc Zyngier if (is_kdump_kernel()) 21975e2c9f9aSMarc Zyngier return true; 21985e2c9f9aSMarc Zyngier 21995e2c9f9aSMarc Zyngier addr_end = addr + size - 1; 22005e2c9f9aSMarc Zyngier 22019f3d5eaaSMike Rapoport for_each_reserved_mem_range(i, &start, &end) { 22025e2c9f9aSMarc Zyngier if (addr >= start && addr_end <= end) 22035e2c9f9aSMarc Zyngier return true; 22045e2c9f9aSMarc Zyngier } 22055e2c9f9aSMarc Zyngier 22065e2c9f9aSMarc Zyngier /* Not found, not a good sign... */ 22075e2c9f9aSMarc Zyngier pr_warn("GICv3: Expected reserved range [%pa:%pa], not found\n", 22085e2c9f9aSMarc Zyngier &addr, &addr_end); 22095e2c9f9aSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 22105e2c9f9aSMarc Zyngier return false; 22115e2c9f9aSMarc Zyngier } 22125e2c9f9aSMarc Zyngier 22133fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 22143fb68faeSMarc Zyngier { 22153fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 22163fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 22173fb68faeSMarc Zyngier 22183fb68faeSMarc Zyngier return 0; 22193fb68faeSMarc Zyngier } 22203fb68faeSMarc Zyngier 222111e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 22221ac19ca6SMarc Zyngier { 2223c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 2224c440a9d9SMarc Zyngier u64 val; 2225c440a9d9SMarc Zyngier 2226c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 2227c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 2228c440a9d9SMarc Zyngier 2229c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 2230c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 2231c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 2232c440a9d9SMarc Zyngier MEMREMAP_WB); 2233c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 2234c440a9d9SMarc Zyngier } else { 2235e1a2e201SMarc Zyngier struct page *page; 22361ac19ca6SMarc Zyngier 2237c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 2238c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 22394cb205c0SJia He ITS_MAX_LPI_NRBITS); 2240e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 2241e1a2e201SMarc Zyngier if (!page) { 22421ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 22431ac19ca6SMarc Zyngier return -ENOMEM; 22441ac19ca6SMarc Zyngier } 22451ac19ca6SMarc Zyngier 2246e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 2247e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 22483fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 22493fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 2250c440a9d9SMarc Zyngier } 2251e1a2e201SMarc Zyngier 2252e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 2253e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 22541ac19ca6SMarc Zyngier 22556c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 22561ac19ca6SMarc Zyngier } 22571ac19ca6SMarc Zyngier 22581ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 22591ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 22601ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 22614f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 22621ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 22631ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 22641ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 22651ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 22661ac19ca6SMarc Zyngier }; 22671ac19ca6SMarc Zyngier 22682d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 22692d81d425SShanker Donthineni { 22702d81d425SShanker Donthineni u32 idx = baser - its->tables; 22712d81d425SShanker Donthineni 22720968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 22732d81d425SShanker Donthineni } 22742d81d425SShanker Donthineni 22752d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 22762d81d425SShanker Donthineni u64 val) 22772d81d425SShanker Donthineni { 22782d81d425SShanker Donthineni u32 idx = baser - its->tables; 22792d81d425SShanker Donthineni 22800968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 22812d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 22822d81d425SShanker Donthineni } 22832d81d425SShanker Donthineni 22849347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 2285d5df9dc9SMarc Zyngier u64 cache, u64 shr, u32 order, bool indirect) 22869347359aSShanker Donthineni { 22879347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 22889347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 22899347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 229030ae9610SShanker Donthineni u64 baser_phys, tmp; 2291d5df9dc9SMarc Zyngier u32 alloc_pages, psz; 2292539d3782SShanker Donthineni struct page *page; 22939347359aSShanker Donthineni void *base; 22949347359aSShanker Donthineni 2295d5df9dc9SMarc Zyngier psz = baser->psz; 22969347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 22979347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 22989347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 22999347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 23009347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 23019347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 23029347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 23039347359aSShanker Donthineni } 23049347359aSShanker Donthineni 2305539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); 2306539d3782SShanker Donthineni if (!page) 23079347359aSShanker Donthineni return -ENOMEM; 23089347359aSShanker Donthineni 2309539d3782SShanker Donthineni base = (void *)page_address(page); 231030ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 231130ae9610SShanker Donthineni 231230ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 231330ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 231430ae9610SShanker Donthineni 231530ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 231630ae9610SShanker Donthineni if (psz != SZ_64K) { 231730ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 231830ae9610SShanker Donthineni free_pages((unsigned long)base, order); 231930ae9610SShanker Donthineni return -ENXIO; 232030ae9610SShanker Donthineni } 232130ae9610SShanker Donthineni 232230ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 232330ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 232430ae9610SShanker Donthineni } 232530ae9610SShanker Donthineni 23269347359aSShanker Donthineni retry_baser: 232730ae9610SShanker Donthineni val = (baser_phys | 23289347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 23299347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 23309347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 23319347359aSShanker Donthineni cache | 23329347359aSShanker Donthineni shr | 23339347359aSShanker Donthineni GITS_BASER_VALID); 23349347359aSShanker Donthineni 23353faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 23363faf24eaSShanker Donthineni 23379347359aSShanker Donthineni switch (psz) { 23389347359aSShanker Donthineni case SZ_4K: 23399347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 23409347359aSShanker Donthineni break; 23419347359aSShanker Donthineni case SZ_16K: 23429347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 23439347359aSShanker Donthineni break; 23449347359aSShanker Donthineni case SZ_64K: 23459347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 23469347359aSShanker Donthineni break; 23479347359aSShanker Donthineni } 23489347359aSShanker Donthineni 23499347359aSShanker Donthineni its_write_baser(its, baser, val); 23509347359aSShanker Donthineni tmp = baser->val; 23519347359aSShanker Donthineni 23529347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 23539347359aSShanker Donthineni /* 23549347359aSShanker Donthineni * Shareability didn't stick. Just use 23559347359aSShanker Donthineni * whatever the read reported, which is likely 23569347359aSShanker Donthineni * to be the only thing this redistributor 23579347359aSShanker Donthineni * supports. If that's zero, make it 23589347359aSShanker Donthineni * non-cacheable as well. 23599347359aSShanker Donthineni */ 23609347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 23619347359aSShanker Donthineni if (!shr) { 23629347359aSShanker Donthineni cache = GITS_BASER_nC; 2363328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 23649347359aSShanker Donthineni } 23659347359aSShanker Donthineni goto retry_baser; 23669347359aSShanker Donthineni } 23679347359aSShanker Donthineni 23689347359aSShanker Donthineni if (val != tmp) { 2369b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 23709347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 2371b11283ebSVladimir Murzin val, tmp); 23729347359aSShanker Donthineni free_pages((unsigned long)base, order); 23739347359aSShanker Donthineni return -ENXIO; 23749347359aSShanker Donthineni } 23759347359aSShanker Donthineni 23769347359aSShanker Donthineni baser->order = order; 23779347359aSShanker Donthineni baser->base = base; 23789347359aSShanker Donthineni baser->psz = psz; 23793faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 23809347359aSShanker Donthineni 23813faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 2382d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 23839347359aSShanker Donthineni its_base_type_string[type], 23849347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 23853faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 23869347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 23879347359aSShanker Donthineni 23889347359aSShanker Donthineni return 0; 23899347359aSShanker Donthineni } 23909347359aSShanker Donthineni 23914cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 23924cacac57SMarc Zyngier struct its_baser *baser, 2393d5df9dc9SMarc Zyngier u32 *order, u32 ids) 23944b75c459SShanker Donthineni { 23954cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 23964cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 23974cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 23982fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 23994b75c459SShanker Donthineni u32 new_order = *order; 2400d5df9dc9SMarc Zyngier u32 psz = baser->psz; 24013faf24eaSShanker Donthineni bool indirect = false; 24023faf24eaSShanker Donthineni 24033faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 24043faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 24053faf24eaSShanker Donthineni /* 24063faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 24073faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 24083faf24eaSShanker Donthineni */ 24093faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 24103faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 24113faf24eaSShanker Donthineni 24123faf24eaSShanker Donthineni if (indirect) { 24133faf24eaSShanker Donthineni /* 24143faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 24153faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 24163faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 24173faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 24183faf24eaSShanker Donthineni * entry size. 24193faf24eaSShanker Donthineni */ 2420d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 24213faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 24223faf24eaSShanker Donthineni } 24233faf24eaSShanker Donthineni } 24244b75c459SShanker Donthineni 24254b75c459SShanker Donthineni /* 24264b75c459SShanker Donthineni * Allocate as many entries as required to fit the 24274b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 24284b75c459SShanker Donthineni * space being incredibly sparse, this results in a 24293faf24eaSShanker Donthineni * massive waste of memory if two-level device table 24303faf24eaSShanker Donthineni * feature is not supported by hardware. 24314b75c459SShanker Donthineni */ 24324b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 24334b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 24344b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 2435d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 2436576a8342SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", 24374cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 2438576a8342SMarc Zyngier device_ids(its), ids); 24394b75c459SShanker Donthineni } 24404b75c459SShanker Donthineni 24414b75c459SShanker Donthineni *order = new_order; 24423faf24eaSShanker Donthineni 24433faf24eaSShanker Donthineni return indirect; 24444b75c459SShanker Donthineni } 24454b75c459SShanker Donthineni 24465e516846SMarc Zyngier static u32 compute_common_aff(u64 val) 24475e516846SMarc Zyngier { 24485e516846SMarc Zyngier u32 aff, clpiaff; 24495e516846SMarc Zyngier 24505e516846SMarc Zyngier aff = FIELD_GET(GICR_TYPER_AFFINITY, val); 24515e516846SMarc Zyngier clpiaff = FIELD_GET(GICR_TYPER_COMMON_LPI_AFF, val); 24525e516846SMarc Zyngier 24535e516846SMarc Zyngier return aff & ~(GENMASK(31, 0) >> (clpiaff * 8)); 24545e516846SMarc Zyngier } 24555e516846SMarc Zyngier 24565e516846SMarc Zyngier static u32 compute_its_aff(struct its_node *its) 24575e516846SMarc Zyngier { 24585e516846SMarc Zyngier u64 val; 24595e516846SMarc Zyngier u32 svpet; 24605e516846SMarc Zyngier 24615e516846SMarc Zyngier /* 24625e516846SMarc Zyngier * Reencode the ITS SVPET and MPIDR as a GICR_TYPER, and compute 24635e516846SMarc Zyngier * the resulting affinity. We then use that to see if this match 24645e516846SMarc Zyngier * our own affinity. 24655e516846SMarc Zyngier */ 24665e516846SMarc Zyngier svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); 24675e516846SMarc Zyngier val = FIELD_PREP(GICR_TYPER_COMMON_LPI_AFF, svpet); 24685e516846SMarc Zyngier val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); 24695e516846SMarc Zyngier return compute_common_aff(val); 24705e516846SMarc Zyngier } 24715e516846SMarc Zyngier 24725e516846SMarc Zyngier static struct its_node *find_sibling_its(struct its_node *cur_its) 24735e516846SMarc Zyngier { 24745e516846SMarc Zyngier struct its_node *its; 24755e516846SMarc Zyngier u32 aff; 24765e516846SMarc Zyngier 24775e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, cur_its->typer)) 24785e516846SMarc Zyngier return NULL; 24795e516846SMarc Zyngier 24805e516846SMarc Zyngier aff = compute_its_aff(cur_its); 24815e516846SMarc Zyngier 24825e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 24835e516846SMarc Zyngier u64 baser; 24845e516846SMarc Zyngier 24855e516846SMarc Zyngier if (!is_v4_1(its) || its == cur_its) 24865e516846SMarc Zyngier continue; 24875e516846SMarc Zyngier 24885e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 24895e516846SMarc Zyngier continue; 24905e516846SMarc Zyngier 24915e516846SMarc Zyngier if (aff != compute_its_aff(its)) 24925e516846SMarc Zyngier continue; 24935e516846SMarc Zyngier 24945e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 24955e516846SMarc Zyngier baser = its->tables[2].val; 24965e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 24975e516846SMarc Zyngier continue; 24985e516846SMarc Zyngier 24995e516846SMarc Zyngier return its; 25005e516846SMarc Zyngier } 25015e516846SMarc Zyngier 25025e516846SMarc Zyngier return NULL; 25035e516846SMarc Zyngier } 25045e516846SMarc Zyngier 25051ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 25061ac19ca6SMarc Zyngier { 25071ac19ca6SMarc Zyngier int i; 25081ac19ca6SMarc Zyngier 25091ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 25101a485f4dSShanker Donthineni if (its->tables[i].base) { 25111a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 25121a485f4dSShanker Donthineni its->tables[i].order); 25131a485f4dSShanker Donthineni its->tables[i].base = NULL; 25141ac19ca6SMarc Zyngier } 25151ac19ca6SMarc Zyngier } 25161ac19ca6SMarc Zyngier } 25171ac19ca6SMarc Zyngier 2518d5df9dc9SMarc Zyngier static int its_probe_baser_psz(struct its_node *its, struct its_baser *baser) 2519d5df9dc9SMarc Zyngier { 2520d5df9dc9SMarc Zyngier u64 psz = SZ_64K; 2521d5df9dc9SMarc Zyngier 2522d5df9dc9SMarc Zyngier while (psz) { 2523d5df9dc9SMarc Zyngier u64 val, gpsz; 2524d5df9dc9SMarc Zyngier 2525d5df9dc9SMarc Zyngier val = its_read_baser(its, baser); 2526d5df9dc9SMarc Zyngier val &= ~GITS_BASER_PAGE_SIZE_MASK; 2527d5df9dc9SMarc Zyngier 2528d5df9dc9SMarc Zyngier switch (psz) { 2529d5df9dc9SMarc Zyngier case SZ_64K: 2530d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_64K; 2531d5df9dc9SMarc Zyngier break; 2532d5df9dc9SMarc Zyngier case SZ_16K: 2533d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_16K; 2534d5df9dc9SMarc Zyngier break; 2535d5df9dc9SMarc Zyngier case SZ_4K: 2536d5df9dc9SMarc Zyngier default: 2537d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_4K; 2538d5df9dc9SMarc Zyngier break; 2539d5df9dc9SMarc Zyngier } 2540d5df9dc9SMarc Zyngier 2541d5df9dc9SMarc Zyngier gpsz >>= GITS_BASER_PAGE_SIZE_SHIFT; 2542d5df9dc9SMarc Zyngier 2543d5df9dc9SMarc Zyngier val |= FIELD_PREP(GITS_BASER_PAGE_SIZE_MASK, gpsz); 2544d5df9dc9SMarc Zyngier its_write_baser(its, baser, val); 2545d5df9dc9SMarc Zyngier 2546d5df9dc9SMarc Zyngier if (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser->val) == gpsz) 2547d5df9dc9SMarc Zyngier break; 2548d5df9dc9SMarc Zyngier 2549d5df9dc9SMarc Zyngier switch (psz) { 2550d5df9dc9SMarc Zyngier case SZ_64K: 2551d5df9dc9SMarc Zyngier psz = SZ_16K; 2552d5df9dc9SMarc Zyngier break; 2553d5df9dc9SMarc Zyngier case SZ_16K: 2554d5df9dc9SMarc Zyngier psz = SZ_4K; 2555d5df9dc9SMarc Zyngier break; 2556d5df9dc9SMarc Zyngier case SZ_4K: 2557d5df9dc9SMarc Zyngier default: 2558d5df9dc9SMarc Zyngier return -1; 2559d5df9dc9SMarc Zyngier } 2560d5df9dc9SMarc Zyngier } 2561d5df9dc9SMarc Zyngier 2562d5df9dc9SMarc Zyngier baser->psz = psz; 2563d5df9dc9SMarc Zyngier return 0; 2564d5df9dc9SMarc Zyngier } 2565d5df9dc9SMarc Zyngier 25660e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 25671ac19ca6SMarc Zyngier { 25681ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 25692fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 25709347359aSShanker Donthineni int err, i; 257194100970SRobert Richter 2572fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 2573fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 25749347359aSShanker Donthineni cache = GITS_BASER_nCnB; 2575466b7d16SShanker Donthineni 25761ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 25772d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 25782d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 25791ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 25803faf24eaSShanker Donthineni bool indirect = false; 2581d5df9dc9SMarc Zyngier u32 order; 25821ac19ca6SMarc Zyngier 2583d5df9dc9SMarc Zyngier if (type == GITS_BASER_TYPE_NONE) 25841ac19ca6SMarc Zyngier continue; 25851ac19ca6SMarc Zyngier 2586d5df9dc9SMarc Zyngier if (its_probe_baser_psz(its, baser)) { 2587d5df9dc9SMarc Zyngier its_free_tables(its); 2588d5df9dc9SMarc Zyngier return -ENXIO; 2589d5df9dc9SMarc Zyngier } 2590d5df9dc9SMarc Zyngier 2591d5df9dc9SMarc Zyngier order = get_order(baser->psz); 2592d5df9dc9SMarc Zyngier 2593d5df9dc9SMarc Zyngier switch (type) { 25944cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 2595d5df9dc9SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, &order, 2596576a8342SMarc Zyngier device_ids(its)); 25978d565748SZenghui Yu break; 25988d565748SZenghui Yu 25994cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 26005e516846SMarc Zyngier if (is_v4_1(its)) { 26015e516846SMarc Zyngier struct its_node *sibling; 26025e516846SMarc Zyngier 26035e516846SMarc Zyngier WARN_ON(i != 2); 26045e516846SMarc Zyngier if ((sibling = find_sibling_its(its))) { 26055e516846SMarc Zyngier *baser = sibling->tables[2]; 26065e516846SMarc Zyngier its_write_baser(its, baser, baser->val); 26075e516846SMarc Zyngier continue; 26085e516846SMarc Zyngier } 26095e516846SMarc Zyngier } 26105e516846SMarc Zyngier 2611d5df9dc9SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, &order, 261232bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 26134cacac57SMarc Zyngier break; 26144cacac57SMarc Zyngier } 2615f54b97edSMarc Zyngier 2616d5df9dc9SMarc Zyngier err = its_setup_baser(its, baser, cache, shr, order, indirect); 26179347359aSShanker Donthineni if (err < 0) { 26189347359aSShanker Donthineni its_free_tables(its); 26199347359aSShanker Donthineni return err; 262030f21363SRobert Richter } 262130f21363SRobert Richter 26229347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 26239347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 26249347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 26251ac19ca6SMarc Zyngier } 26261ac19ca6SMarc Zyngier 26271ac19ca6SMarc Zyngier return 0; 26281ac19ca6SMarc Zyngier } 26291ac19ca6SMarc Zyngier 26305e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_its(void) 26315e516846SMarc Zyngier { 26325e516846SMarc Zyngier struct its_node *its; 26335e516846SMarc Zyngier u64 val; 26345e516846SMarc Zyngier u32 aff; 26355e516846SMarc Zyngier 26365e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 26375e516846SMarc Zyngier aff = compute_common_aff(val); 26385e516846SMarc Zyngier 26395e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 26405e516846SMarc Zyngier u64 baser, addr; 26415e516846SMarc Zyngier 26425e516846SMarc Zyngier if (!is_v4_1(its)) 26435e516846SMarc Zyngier continue; 26445e516846SMarc Zyngier 26455e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 26465e516846SMarc Zyngier continue; 26475e516846SMarc Zyngier 26485e516846SMarc Zyngier if (aff != compute_its_aff(its)) 26495e516846SMarc Zyngier continue; 26505e516846SMarc Zyngier 26515e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 26525e516846SMarc Zyngier baser = its->tables[2].val; 26535e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 26545e516846SMarc Zyngier continue; 26555e516846SMarc Zyngier 26565e516846SMarc Zyngier /* We have a winner! */ 26578b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = its->tables[2].base; 26588b718d40SZenghui Yu 26595e516846SMarc Zyngier val = GICR_VPROPBASER_4_1_VALID; 26605e516846SMarc Zyngier if (baser & GITS_BASER_INDIRECT) 26615e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 26625e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, 26635e516846SMarc Zyngier FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)); 26645e516846SMarc Zyngier switch (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)) { 26655e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 26665e516846SMarc Zyngier addr = GITS_BASER_ADDR_48_to_52(baser); 26675e516846SMarc Zyngier break; 26685e516846SMarc Zyngier default: 26695e516846SMarc Zyngier addr = baser & GENMASK_ULL(47, 12); 26705e516846SMarc Zyngier break; 26715e516846SMarc Zyngier } 26725e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, addr >> 12); 26735e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_SHAREABILITY_MASK, 26745e516846SMarc Zyngier FIELD_GET(GITS_BASER_SHAREABILITY_MASK, baser)); 26755e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_INNER_CACHEABILITY_MASK, 26765e516846SMarc Zyngier FIELD_GET(GITS_BASER_INNER_CACHEABILITY_MASK, baser)); 26775e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, GITS_BASER_NR_PAGES(baser) - 1); 26785e516846SMarc Zyngier 26795e516846SMarc Zyngier return val; 26805e516846SMarc Zyngier } 26815e516846SMarc Zyngier 26825e516846SMarc Zyngier return 0; 26835e516846SMarc Zyngier } 26845e516846SMarc Zyngier 26855e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_rd(cpumask_t **mask) 26865e516846SMarc Zyngier { 26875e516846SMarc Zyngier u32 aff; 26885e516846SMarc Zyngier u64 val; 26895e516846SMarc Zyngier int cpu; 26905e516846SMarc Zyngier 26915e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 26925e516846SMarc Zyngier aff = compute_common_aff(val); 26935e516846SMarc Zyngier 26945e516846SMarc Zyngier for_each_possible_cpu(cpu) { 26955e516846SMarc Zyngier void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 26965e516846SMarc Zyngier 26975e516846SMarc Zyngier if (!base || cpu == smp_processor_id()) 26985e516846SMarc Zyngier continue; 26995e516846SMarc Zyngier 27005e516846SMarc Zyngier val = gic_read_typer(base + GICR_TYPER); 27014bccf1d7SZenghui Yu if (aff != compute_common_aff(val)) 27025e516846SMarc Zyngier continue; 27035e516846SMarc Zyngier 27045e516846SMarc Zyngier /* 27055e516846SMarc Zyngier * At this point, we have a victim. This particular CPU 27065e516846SMarc Zyngier * has already booted, and has an affinity that matches 27075e516846SMarc Zyngier * ours wrt CommonLPIAff. Let's use its own VPROPBASER. 27085e516846SMarc Zyngier * Make sure we don't write the Z bit in that case. 27095e516846SMarc Zyngier */ 27105186a6ccSZenghui Yu val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 27115e516846SMarc Zyngier val &= ~GICR_VPROPBASER_4_1_Z; 27125e516846SMarc Zyngier 27138b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = gic_data_rdist_cpu(cpu)->vpe_l1_base; 27145e516846SMarc Zyngier *mask = gic_data_rdist_cpu(cpu)->vpe_table_mask; 27155e516846SMarc Zyngier 27165e516846SMarc Zyngier return val; 27175e516846SMarc Zyngier } 27185e516846SMarc Zyngier 27195e516846SMarc Zyngier return 0; 27205e516846SMarc Zyngier } 27215e516846SMarc Zyngier 27224e6437f1SZenghui Yu static bool allocate_vpe_l2_table(int cpu, u32 id) 27234e6437f1SZenghui Yu { 27244e6437f1SZenghui Yu void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 2725490d332eSMarc Zyngier unsigned int psz, esz, idx, npg, gpsz; 2726490d332eSMarc Zyngier u64 val; 27274e6437f1SZenghui Yu struct page *page; 27284e6437f1SZenghui Yu __le64 *table; 27294e6437f1SZenghui Yu 27304e6437f1SZenghui Yu if (!gic_rdists->has_rvpeid) 27314e6437f1SZenghui Yu return true; 27324e6437f1SZenghui Yu 273328d160deSMarc Zyngier /* Skip non-present CPUs */ 273428d160deSMarc Zyngier if (!base) 273528d160deSMarc Zyngier return true; 273628d160deSMarc Zyngier 27375186a6ccSZenghui Yu val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 27384e6437f1SZenghui Yu 27394e6437f1SZenghui Yu esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val) + 1; 27404e6437f1SZenghui Yu gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 27414e6437f1SZenghui Yu npg = FIELD_GET(GICR_VPROPBASER_4_1_SIZE, val) + 1; 27424e6437f1SZenghui Yu 27434e6437f1SZenghui Yu switch (gpsz) { 27444e6437f1SZenghui Yu default: 27454e6437f1SZenghui Yu WARN_ON(1); 2746df561f66SGustavo A. R. Silva fallthrough; 27474e6437f1SZenghui Yu case GIC_PAGE_SIZE_4K: 27484e6437f1SZenghui Yu psz = SZ_4K; 27494e6437f1SZenghui Yu break; 27504e6437f1SZenghui Yu case GIC_PAGE_SIZE_16K: 27514e6437f1SZenghui Yu psz = SZ_16K; 27524e6437f1SZenghui Yu break; 27534e6437f1SZenghui Yu case GIC_PAGE_SIZE_64K: 27544e6437f1SZenghui Yu psz = SZ_64K; 27554e6437f1SZenghui Yu break; 27564e6437f1SZenghui Yu } 27574e6437f1SZenghui Yu 27584e6437f1SZenghui Yu /* Don't allow vpe_id that exceeds single, flat table limit */ 27594e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_4_1_INDIRECT)) 27604e6437f1SZenghui Yu return (id < (npg * psz / (esz * SZ_8))); 27614e6437f1SZenghui Yu 27624e6437f1SZenghui Yu /* Compute 1st level table index & check if that exceeds table limit */ 27634e6437f1SZenghui Yu idx = id >> ilog2(psz / (esz * SZ_8)); 27644e6437f1SZenghui Yu if (idx >= (npg * psz / GITS_LVL1_ENTRY_SIZE)) 27654e6437f1SZenghui Yu return false; 27664e6437f1SZenghui Yu 27674e6437f1SZenghui Yu table = gic_data_rdist_cpu(cpu)->vpe_l1_base; 27684e6437f1SZenghui Yu 27694e6437f1SZenghui Yu /* Allocate memory for 2nd level table */ 27704e6437f1SZenghui Yu if (!table[idx]) { 27714e6437f1SZenghui Yu page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(psz)); 27724e6437f1SZenghui Yu if (!page) 27734e6437f1SZenghui Yu return false; 27744e6437f1SZenghui Yu 27754e6437f1SZenghui Yu /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 27764e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_SHAREABILITY_MASK)) 27774e6437f1SZenghui Yu gic_flush_dcache_to_poc(page_address(page), psz); 27784e6437f1SZenghui Yu 27794e6437f1SZenghui Yu table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 27804e6437f1SZenghui Yu 27814e6437f1SZenghui Yu /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 27824e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_SHAREABILITY_MASK)) 27834e6437f1SZenghui Yu gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 27844e6437f1SZenghui Yu 27854e6437f1SZenghui Yu /* Ensure updated table contents are visible to RD hardware */ 27864e6437f1SZenghui Yu dsb(sy); 27874e6437f1SZenghui Yu } 27884e6437f1SZenghui Yu 27894e6437f1SZenghui Yu return true; 27904e6437f1SZenghui Yu } 27914e6437f1SZenghui Yu 27925e516846SMarc Zyngier static int allocate_vpe_l1_table(void) 27935e516846SMarc Zyngier { 27945e516846SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 27955e516846SMarc Zyngier u64 val, gpsz, npg, pa; 27965e516846SMarc Zyngier unsigned int psz = SZ_64K; 27975e516846SMarc Zyngier unsigned int np, epp, esz; 27985e516846SMarc Zyngier struct page *page; 27995e516846SMarc Zyngier 28005e516846SMarc Zyngier if (!gic_rdists->has_rvpeid) 28015e516846SMarc Zyngier return 0; 28025e516846SMarc Zyngier 28035e516846SMarc Zyngier /* 28045e516846SMarc Zyngier * if VPENDBASER.Valid is set, disable any previously programmed 28055e516846SMarc Zyngier * VPE by setting PendingLast while clearing Valid. This has the 28065e516846SMarc Zyngier * effect of making sure no doorbell will be generated and we can 28075e516846SMarc Zyngier * then safely clear VPROPBASER.Valid. 28085e516846SMarc Zyngier */ 28095186a6ccSZenghui Yu if (gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER) & GICR_VPENDBASER_Valid) 28105186a6ccSZenghui Yu gicr_write_vpendbaser(GICR_VPENDBASER_PendingLast, 28115e516846SMarc Zyngier vlpi_base + GICR_VPENDBASER); 28125e516846SMarc Zyngier 28135e516846SMarc Zyngier /* 28145e516846SMarc Zyngier * If we can inherit the configuration from another RD, let's do 28155e516846SMarc Zyngier * so. Otherwise, we have to go through the allocation process. We 28165e516846SMarc Zyngier * assume that all RDs have the exact same requirements, as 28175e516846SMarc Zyngier * nothing will work otherwise. 28185e516846SMarc Zyngier */ 28195e516846SMarc Zyngier val = inherit_vpe_l1_table_from_rd(&gic_data_rdist()->vpe_table_mask); 28205e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 28215e516846SMarc Zyngier goto out; 28225e516846SMarc Zyngier 2823d1bd7e0bSZenghui Yu gic_data_rdist()->vpe_table_mask = kzalloc(sizeof(cpumask_t), GFP_ATOMIC); 28245e516846SMarc Zyngier if (!gic_data_rdist()->vpe_table_mask) 28255e516846SMarc Zyngier return -ENOMEM; 28265e516846SMarc Zyngier 28275e516846SMarc Zyngier val = inherit_vpe_l1_table_from_its(); 28285e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 28295e516846SMarc Zyngier goto out; 28305e516846SMarc Zyngier 28315e516846SMarc Zyngier /* First probe the page size */ 28325e516846SMarc Zyngier val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K); 28335186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 28345186a6ccSZenghui Yu val = gicr_read_vpropbaser(vlpi_base + GICR_VPROPBASER); 28355e516846SMarc Zyngier gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 28365e516846SMarc Zyngier esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val); 28375e516846SMarc Zyngier 28385e516846SMarc Zyngier switch (gpsz) { 28395e516846SMarc Zyngier default: 28405e516846SMarc Zyngier gpsz = GIC_PAGE_SIZE_4K; 2841df561f66SGustavo A. R. Silva fallthrough; 28425e516846SMarc Zyngier case GIC_PAGE_SIZE_4K: 28435e516846SMarc Zyngier psz = SZ_4K; 28445e516846SMarc Zyngier break; 28455e516846SMarc Zyngier case GIC_PAGE_SIZE_16K: 28465e516846SMarc Zyngier psz = SZ_16K; 28475e516846SMarc Zyngier break; 28485e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 28495e516846SMarc Zyngier psz = SZ_64K; 28505e516846SMarc Zyngier break; 28515e516846SMarc Zyngier } 28525e516846SMarc Zyngier 28535e516846SMarc Zyngier /* 28545e516846SMarc Zyngier * Start populating the register from scratch, including RO fields 28555e516846SMarc Zyngier * (which we want to print in debug cases...) 28565e516846SMarc Zyngier */ 28575e516846SMarc Zyngier val = 0; 28585e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, gpsz); 28595e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ENTRY_SIZE, esz); 28605e516846SMarc Zyngier 28615e516846SMarc Zyngier /* How many entries per GIC page? */ 28625e516846SMarc Zyngier esz++; 28635e516846SMarc Zyngier epp = psz / (esz * SZ_8); 28645e516846SMarc Zyngier 28655e516846SMarc Zyngier /* 28665e516846SMarc Zyngier * If we need more than just a single L1 page, flag the table 28675e516846SMarc Zyngier * as indirect and compute the number of required L1 pages. 28685e516846SMarc Zyngier */ 28695e516846SMarc Zyngier if (epp < ITS_MAX_VPEID) { 28705e516846SMarc Zyngier int nl2; 28715e516846SMarc Zyngier 28725e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 28735e516846SMarc Zyngier 28745e516846SMarc Zyngier /* Number of L2 pages required to cover the VPEID space */ 28755e516846SMarc Zyngier nl2 = DIV_ROUND_UP(ITS_MAX_VPEID, epp); 28765e516846SMarc Zyngier 28775e516846SMarc Zyngier /* Number of L1 pages to point to the L2 pages */ 28785e516846SMarc Zyngier npg = DIV_ROUND_UP(nl2 * SZ_8, psz); 28795e516846SMarc Zyngier } else { 28805e516846SMarc Zyngier npg = 1; 28815e516846SMarc Zyngier } 28825e516846SMarc Zyngier 2883e88bd316SZenghui Yu val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1); 28845e516846SMarc Zyngier 28855e516846SMarc Zyngier /* Right, that's the number of CPU pages we need for L1 */ 28865e516846SMarc Zyngier np = DIV_ROUND_UP(npg * psz, PAGE_SIZE); 28875e516846SMarc Zyngier 28885e516846SMarc Zyngier pr_debug("np = %d, npg = %lld, psz = %d, epp = %d, esz = %d\n", 28895e516846SMarc Zyngier np, npg, psz, epp, esz); 2890d1bd7e0bSZenghui Yu page = alloc_pages(GFP_ATOMIC | __GFP_ZERO, get_order(np * PAGE_SIZE)); 28915e516846SMarc Zyngier if (!page) 28925e516846SMarc Zyngier return -ENOMEM; 28935e516846SMarc Zyngier 28948b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = page_address(page); 28955e516846SMarc Zyngier pa = virt_to_phys(page_address(page)); 28965e516846SMarc Zyngier WARN_ON(!IS_ALIGNED(pa, psz)); 28975e516846SMarc Zyngier 28985e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, pa >> 12); 28995e516846SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 29005e516846SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 29015e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_Z; 29025e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_VALID; 29035e516846SMarc Zyngier 29045e516846SMarc Zyngier out: 29055186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 29065e516846SMarc Zyngier cpumask_set_cpu(smp_processor_id(), gic_data_rdist()->vpe_table_mask); 29075e516846SMarc Zyngier 29085e516846SMarc Zyngier pr_debug("CPU%d: VPROPBASER = %llx %*pbl\n", 29095e516846SMarc Zyngier smp_processor_id(), val, 29105e516846SMarc Zyngier cpumask_pr_args(gic_data_rdist()->vpe_table_mask)); 29115e516846SMarc Zyngier 29125e516846SMarc Zyngier return 0; 29135e516846SMarc Zyngier } 29145e516846SMarc Zyngier 29151ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 29161ac19ca6SMarc Zyngier { 291783559b47SMarc Zyngier int i; 291883559b47SMarc Zyngier 29196396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 29201ac19ca6SMarc Zyngier GFP_KERNEL); 29211ac19ca6SMarc Zyngier if (!its->collections) 29221ac19ca6SMarc Zyngier return -ENOMEM; 29231ac19ca6SMarc Zyngier 292483559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 292583559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 292683559b47SMarc Zyngier 29271ac19ca6SMarc Zyngier return 0; 29281ac19ca6SMarc Zyngier } 29291ac19ca6SMarc Zyngier 29307c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 29317c297a2dSMarc Zyngier { 29327c297a2dSMarc Zyngier struct page *pend_page; 2933adaab500SMarc Zyngier 29347c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 2935adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 29367c297a2dSMarc Zyngier if (!pend_page) 29377c297a2dSMarc Zyngier return NULL; 29387c297a2dSMarc Zyngier 29397c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 29407c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 29417c297a2dSMarc Zyngier 29427c297a2dSMarc Zyngier return pend_page; 29437c297a2dSMarc Zyngier } 29447c297a2dSMarc Zyngier 29457d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 29467d75bbb4SMarc Zyngier { 2947adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 29487d75bbb4SMarc Zyngier } 29497d75bbb4SMarc Zyngier 2950c6e2ccb6SMarc Zyngier /* 29515e2c9f9aSMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. Any other 29525e2c9f9aSMarc Zyngier * case is wrong in the absence of firmware/EFI support. 2953c6e2ccb6SMarc Zyngier */ 2954c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 2955c440a9d9SMarc Zyngier { 29565e2c9f9aSMarc Zyngier phys_addr_t addr; 29575e2c9f9aSMarc Zyngier u64 val; 2958c6e2ccb6SMarc Zyngier 29595e2c9f9aSMarc Zyngier /* Check whether the property table is in a reserved region */ 29605e2c9f9aSMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 29615e2c9f9aSMarc Zyngier addr = val & GENMASK_ULL(51, 12); 29625e2c9f9aSMarc Zyngier 29635e2c9f9aSMarc Zyngier return gic_check_reserved_range(addr, LPI_PROPBASE_SZ); 2964c440a9d9SMarc Zyngier } 2965c440a9d9SMarc Zyngier 296611e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 296711e37d35SMarc Zyngier { 2968c440a9d9SMarc Zyngier u64 val; 296911e37d35SMarc Zyngier int err, cpu; 297011e37d35SMarc Zyngier 2971c440a9d9SMarc Zyngier /* 2972c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 2973c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 2974c440a9d9SMarc Zyngier */ 2975c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 2976c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 2977c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 2978c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 2979c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 2980c440a9d9SMarc Zyngier } 2981c440a9d9SMarc Zyngier 298211e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 298311e37d35SMarc Zyngier if (err) 298411e37d35SMarc Zyngier return err; 298511e37d35SMarc Zyngier 298611e37d35SMarc Zyngier /* 298711e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 298811e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 298911e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 299011e37d35SMarc Zyngier */ 299111e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 299211e37d35SMarc Zyngier struct page *pend_page; 299311e37d35SMarc Zyngier 299411e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 299511e37d35SMarc Zyngier if (!pend_page) { 299611e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 299711e37d35SMarc Zyngier return -ENOMEM; 299811e37d35SMarc Zyngier } 299911e37d35SMarc Zyngier 300011e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 300111e37d35SMarc Zyngier } 300211e37d35SMarc Zyngier 300311e37d35SMarc Zyngier return 0; 300411e37d35SMarc Zyngier } 300511e37d35SMarc Zyngier 3006e64fab1aSMarc Zyngier static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set) 30076479450fSHeyi Guo { 30086479450fSHeyi Guo u32 count = 1000000; /* 1s! */ 30096479450fSHeyi Guo bool clean; 30106479450fSHeyi Guo u64 val; 30116479450fSHeyi Guo 30125186a6ccSZenghui Yu val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 30136479450fSHeyi Guo val &= ~GICR_VPENDBASER_Valid; 3014e64fab1aSMarc Zyngier val &= ~clr; 3015e64fab1aSMarc Zyngier val |= set; 30165186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 30176479450fSHeyi Guo 30186479450fSHeyi Guo do { 30195186a6ccSZenghui Yu val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 30206479450fSHeyi Guo clean = !(val & GICR_VPENDBASER_Dirty); 30216479450fSHeyi Guo if (!clean) { 30226479450fSHeyi Guo count--; 30236479450fSHeyi Guo cpu_relax(); 30246479450fSHeyi Guo udelay(1); 30256479450fSHeyi Guo } 30266479450fSHeyi Guo } while (!clean && count); 30276479450fSHeyi Guo 3028e64fab1aSMarc Zyngier if (unlikely(val & GICR_VPENDBASER_Dirty)) { 3029e64fab1aSMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 3030e64fab1aSMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 3031e64fab1aSMarc Zyngier } 3032e64fab1aSMarc Zyngier 30336479450fSHeyi Guo return val; 30346479450fSHeyi Guo } 30356479450fSHeyi Guo 30361ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 30371ac19ca6SMarc Zyngier { 30381ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 30391ac19ca6SMarc Zyngier struct page *pend_page; 304011e37d35SMarc Zyngier phys_addr_t paddr; 30411ac19ca6SMarc Zyngier u64 val, tmp; 30421ac19ca6SMarc Zyngier 304311e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 30441ac19ca6SMarc Zyngier return; 30451ac19ca6SMarc Zyngier 3046c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 3047c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 3048c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 3049f842ca8eSMarc Zyngier /* 3050f842ca8eSMarc Zyngier * Check that we get the same property table on all 3051f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 3052f842ca8eSMarc Zyngier */ 3053f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 3054f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 3055f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 3056f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 3057f842ca8eSMarc Zyngier 3058c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 3059c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 3060c440a9d9SMarc Zyngier 30615e2c9f9aSMarc Zyngier WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ)); 3062c440a9d9SMarc Zyngier its_free_pending_table(gic_data_rdist()->pend_page); 3063c440a9d9SMarc Zyngier gic_data_rdist()->pend_page = NULL; 3064c440a9d9SMarc Zyngier 3065c440a9d9SMarc Zyngier goto out; 3066c440a9d9SMarc Zyngier } 3067c440a9d9SMarc Zyngier 306811e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 30691ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 30703fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 30711ac19ca6SMarc Zyngier 30721ac19ca6SMarc Zyngier /* set PROPBASE */ 3073e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 30741ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 30752fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 30761ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 30771ac19ca6SMarc Zyngier 30780968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 30790968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 30801ac19ca6SMarc Zyngier 30811ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 3082241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 3083241a386cSMarc Zyngier /* 3084241a386cSMarc Zyngier * The HW reports non-shareable, we must 3085241a386cSMarc Zyngier * remove the cacheability attributes as 3086241a386cSMarc Zyngier * well. 3087241a386cSMarc Zyngier */ 3088241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 3089241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 3090241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 30910968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 3092241a386cSMarc Zyngier } 30931ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 30941ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 30951ac19ca6SMarc Zyngier } 30961ac19ca6SMarc Zyngier 30971ac19ca6SMarc Zyngier /* set PENDBASE */ 30981ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 30994ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 31002fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 31011ac19ca6SMarc Zyngier 31020968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 31030968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 3104241a386cSMarc Zyngier 3105241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 3106241a386cSMarc Zyngier /* 3107241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 3108241a386cSMarc Zyngier * cacheability attributes as well. 3109241a386cSMarc Zyngier */ 3110241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 3111241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 3112241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 31130968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 3114241a386cSMarc Zyngier } 31151ac19ca6SMarc Zyngier 31161ac19ca6SMarc Zyngier /* Enable LPIs */ 31171ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 31181ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 31191ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 31201ac19ca6SMarc Zyngier 31215e516846SMarc Zyngier if (gic_rdists->has_vlpis && !gic_rdists->has_rvpeid) { 31226479450fSHeyi Guo void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 31236479450fSHeyi Guo 31246479450fSHeyi Guo /* 31256479450fSHeyi Guo * It's possible for CPU to receive VLPIs before it is 31266479450fSHeyi Guo * sheduled as a vPE, especially for the first CPU, and the 31276479450fSHeyi Guo * VLPI with INTID larger than 2^(IDbits+1) will be considered 31286479450fSHeyi Guo * as out of range and dropped by GIC. 31296479450fSHeyi Guo * So we initialize IDbits to known value to avoid VLPI drop. 31306479450fSHeyi Guo */ 31316479450fSHeyi Guo val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 31326479450fSHeyi Guo pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n", 31336479450fSHeyi Guo smp_processor_id(), val); 31345186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 31356479450fSHeyi Guo 31366479450fSHeyi Guo /* 31376479450fSHeyi Guo * Also clear Valid bit of GICR_VPENDBASER, in case some 31386479450fSHeyi Guo * ancient programming gets left in and has possibility of 31396479450fSHeyi Guo * corrupting memory. 31406479450fSHeyi Guo */ 3141e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 31426479450fSHeyi Guo } 31436479450fSHeyi Guo 31445e516846SMarc Zyngier if (allocate_vpe_l1_table()) { 31455e516846SMarc Zyngier /* 31465e516846SMarc Zyngier * If the allocation has failed, we're in massive trouble. 31475e516846SMarc Zyngier * Disable direct injection, and pray that no VM was 31485e516846SMarc Zyngier * already running... 31495e516846SMarc Zyngier */ 31505e516846SMarc Zyngier gic_rdists->has_rvpeid = false; 31515e516846SMarc Zyngier gic_rdists->has_vlpis = false; 31525e516846SMarc Zyngier } 31535e516846SMarc Zyngier 31541ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 31551ac19ca6SMarc Zyngier dsb(sy); 3156c440a9d9SMarc Zyngier out: 315711e37d35SMarc Zyngier gic_data_rdist()->lpi_enabled = true; 3158c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 315911e37d35SMarc Zyngier smp_processor_id(), 3160c440a9d9SMarc Zyngier gic_data_rdist()->pend_page ? "allocated" : "reserved", 316111e37d35SMarc Zyngier &paddr); 31621ac19ca6SMarc Zyngier } 31631ac19ca6SMarc Zyngier 3164920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 31651ac19ca6SMarc Zyngier { 3166920181ceSDerek Basehore int cpu = smp_processor_id(); 31671ac19ca6SMarc Zyngier u64 target; 31681ac19ca6SMarc Zyngier 3169fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 3170fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 3171fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 3172fbf8f40eSGanapatrao Kulkarni 3173fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 3174fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 3175fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 3176920181ceSDerek Basehore return; 3177fbf8f40eSGanapatrao Kulkarni } 3178fbf8f40eSGanapatrao Kulkarni 31791ac19ca6SMarc Zyngier /* 31801ac19ca6SMarc Zyngier * We now have to bind each collection to its target 31811ac19ca6SMarc Zyngier * redistributor. 31821ac19ca6SMarc Zyngier */ 3183589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 31841ac19ca6SMarc Zyngier /* 31851ac19ca6SMarc Zyngier * This ITS wants the physical address of the 31861ac19ca6SMarc Zyngier * redistributor. 31871ac19ca6SMarc Zyngier */ 31881ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 31891ac19ca6SMarc Zyngier } else { 3190920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 3191589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 3192263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 31931ac19ca6SMarc Zyngier } 31941ac19ca6SMarc Zyngier 31951ac19ca6SMarc Zyngier /* Perform collection mapping */ 31961ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 31971ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 31981ac19ca6SMarc Zyngier 31991ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 32001ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 32011ac19ca6SMarc Zyngier } 32021ac19ca6SMarc Zyngier 3203920181ceSDerek Basehore static void its_cpu_init_collections(void) 3204920181ceSDerek Basehore { 3205920181ceSDerek Basehore struct its_node *its; 3206920181ceSDerek Basehore 3207a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3208920181ceSDerek Basehore 3209920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 3210920181ceSDerek Basehore its_cpu_init_collection(its); 3211920181ceSDerek Basehore 3212a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 32131ac19ca6SMarc Zyngier } 321484a6a2e7SMarc Zyngier 321584a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 321684a6a2e7SMarc Zyngier { 321784a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 32183e39e8f5SMarc Zyngier unsigned long flags; 321984a6a2e7SMarc Zyngier 32203e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 322184a6a2e7SMarc Zyngier 322284a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 322384a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 322484a6a2e7SMarc Zyngier its_dev = tmp; 322584a6a2e7SMarc Zyngier break; 322684a6a2e7SMarc Zyngier } 322784a6a2e7SMarc Zyngier } 322884a6a2e7SMarc Zyngier 32293e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 323084a6a2e7SMarc Zyngier 323184a6a2e7SMarc Zyngier return its_dev; 323284a6a2e7SMarc Zyngier } 323384a6a2e7SMarc Zyngier 3234466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 3235466b7d16SShanker Donthineni { 3236466b7d16SShanker Donthineni int i; 3237466b7d16SShanker Donthineni 3238466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3239466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 3240466b7d16SShanker Donthineni return &its->tables[i]; 3241466b7d16SShanker Donthineni } 3242466b7d16SShanker Donthineni 3243466b7d16SShanker Donthineni return NULL; 3244466b7d16SShanker Donthineni } 3245466b7d16SShanker Donthineni 3246539d3782SShanker Donthineni static bool its_alloc_table_entry(struct its_node *its, 3247539d3782SShanker Donthineni struct its_baser *baser, u32 id) 32483faf24eaSShanker Donthineni { 32493faf24eaSShanker Donthineni struct page *page; 32503faf24eaSShanker Donthineni u32 esz, idx; 32513faf24eaSShanker Donthineni __le64 *table; 32523faf24eaSShanker Donthineni 32533faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 32543faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 32553faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 325670cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 32573faf24eaSShanker Donthineni 32583faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 325970cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 32603faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 32613faf24eaSShanker Donthineni return false; 32623faf24eaSShanker Donthineni 32633faf24eaSShanker Donthineni table = baser->base; 32643faf24eaSShanker Donthineni 32653faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 32663faf24eaSShanker Donthineni if (!table[idx]) { 3267539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 3268539d3782SShanker Donthineni get_order(baser->psz)); 32693faf24eaSShanker Donthineni if (!page) 32703faf24eaSShanker Donthineni return false; 32713faf24eaSShanker Donthineni 32723faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 32733faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 3274328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 32753faf24eaSShanker Donthineni 32763faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 32773faf24eaSShanker Donthineni 32783faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 32793faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 3280328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 32813faf24eaSShanker Donthineni 32823faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 32833faf24eaSShanker Donthineni dsb(sy); 32843faf24eaSShanker Donthineni } 32853faf24eaSShanker Donthineni 32863faf24eaSShanker Donthineni return true; 32873faf24eaSShanker Donthineni } 32883faf24eaSShanker Donthineni 328970cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 329070cc81edSMarc Zyngier { 329170cc81edSMarc Zyngier struct its_baser *baser; 329270cc81edSMarc Zyngier 329370cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 329470cc81edSMarc Zyngier 329570cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 329670cc81edSMarc Zyngier if (!baser) 3297576a8342SMarc Zyngier return (ilog2(dev_id) < device_ids(its)); 329870cc81edSMarc Zyngier 3299539d3782SShanker Donthineni return its_alloc_table_entry(its, baser, dev_id); 330070cc81edSMarc Zyngier } 330170cc81edSMarc Zyngier 33027d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 33037d75bbb4SMarc Zyngier { 33047d75bbb4SMarc Zyngier struct its_node *its; 33054e6437f1SZenghui Yu int cpu; 33067d75bbb4SMarc Zyngier 33077d75bbb4SMarc Zyngier /* 33087d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 33097d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 33107d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 33117d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 33127d75bbb4SMarc Zyngier * anyway, right?). 33137d75bbb4SMarc Zyngier */ 33147d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 33157d75bbb4SMarc Zyngier struct its_baser *baser; 33167d75bbb4SMarc Zyngier 33170dd57fedSMarc Zyngier if (!is_v4(its)) 33187d75bbb4SMarc Zyngier continue; 33197d75bbb4SMarc Zyngier 33207d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 33217d75bbb4SMarc Zyngier if (!baser) 33227d75bbb4SMarc Zyngier return false; 33237d75bbb4SMarc Zyngier 3324539d3782SShanker Donthineni if (!its_alloc_table_entry(its, baser, vpe_id)) 33257d75bbb4SMarc Zyngier return false; 33267d75bbb4SMarc Zyngier } 33277d75bbb4SMarc Zyngier 33284e6437f1SZenghui Yu /* Non v4.1? No need to iterate RDs and go back early. */ 33294e6437f1SZenghui Yu if (!gic_rdists->has_rvpeid) 33304e6437f1SZenghui Yu return true; 33314e6437f1SZenghui Yu 33324e6437f1SZenghui Yu /* 33334e6437f1SZenghui Yu * Make sure the L2 tables are allocated for all copies of 33344e6437f1SZenghui Yu * the L1 table on *all* v4.1 RDs. 33354e6437f1SZenghui Yu */ 33364e6437f1SZenghui Yu for_each_possible_cpu(cpu) { 33374e6437f1SZenghui Yu if (!allocate_vpe_l2_table(cpu, vpe_id)) 33384e6437f1SZenghui Yu return false; 33394e6437f1SZenghui Yu } 33404e6437f1SZenghui Yu 33417d75bbb4SMarc Zyngier return true; 33427d75bbb4SMarc Zyngier } 33437d75bbb4SMarc Zyngier 334484a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 334593f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 334684a6a2e7SMarc Zyngier { 334784a6a2e7SMarc Zyngier struct its_device *dev; 334893f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 33493e39e8f5SMarc Zyngier unsigned long flags; 3350591e5becSMarc Zyngier u16 *col_map = NULL; 335184a6a2e7SMarc Zyngier void *itt; 335284a6a2e7SMarc Zyngier int lpi_base; 335384a6a2e7SMarc Zyngier int nr_lpis; 3354c8481267SMarc Zyngier int nr_ites; 335584a6a2e7SMarc Zyngier int sz; 335684a6a2e7SMarc Zyngier 33573faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 3358466b7d16SShanker Donthineni return NULL; 3359466b7d16SShanker Donthineni 3360147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 3361147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 3362147c8f37SMarc Zyngier 336384a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 3364c8481267SMarc Zyngier /* 3365147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 3366147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 3367c8481267SMarc Zyngier */ 3368147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 3369ffedbf0cSMarc Zyngier sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); 337084a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 3371539d3782SShanker Donthineni itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); 337293f94ea0SMarc Zyngier if (alloc_lpis) { 337338dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 3374591e5becSMarc Zyngier if (lpi_map) 33756396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 337693f94ea0SMarc Zyngier GFP_KERNEL); 337793f94ea0SMarc Zyngier } else { 33786396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 337993f94ea0SMarc Zyngier nr_lpis = 0; 338093f94ea0SMarc Zyngier lpi_base = 0; 338193f94ea0SMarc Zyngier } 338284a6a2e7SMarc Zyngier 338393f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 338484a6a2e7SMarc Zyngier kfree(dev); 338584a6a2e7SMarc Zyngier kfree(itt); 338684a6a2e7SMarc Zyngier kfree(lpi_map); 3387591e5becSMarc Zyngier kfree(col_map); 338884a6a2e7SMarc Zyngier return NULL; 338984a6a2e7SMarc Zyngier } 339084a6a2e7SMarc Zyngier 3391328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 33925a9a8915SMarc Zyngier 339384a6a2e7SMarc Zyngier dev->its = its; 339484a6a2e7SMarc Zyngier dev->itt = itt; 3395c8481267SMarc Zyngier dev->nr_ites = nr_ites; 3396591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 3397591e5becSMarc Zyngier dev->event_map.col_map = col_map; 3398591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 3399591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 340011635fa2SMarc Zyngier raw_spin_lock_init(&dev->event_map.vlpi_lock); 340184a6a2e7SMarc Zyngier dev->device_id = dev_id; 340284a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 340384a6a2e7SMarc Zyngier 34043e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 340584a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 34063e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 340784a6a2e7SMarc Zyngier 340884a6a2e7SMarc Zyngier /* Map device to its ITT */ 340984a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 341084a6a2e7SMarc Zyngier 341184a6a2e7SMarc Zyngier return dev; 341284a6a2e7SMarc Zyngier } 341384a6a2e7SMarc Zyngier 341484a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 341584a6a2e7SMarc Zyngier { 34163e39e8f5SMarc Zyngier unsigned long flags; 34173e39e8f5SMarc Zyngier 34183e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 341984a6a2e7SMarc Zyngier list_del(&its_dev->entry); 34203e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 3421898aa5ceSMarc Zyngier kfree(its_dev->event_map.col_map); 342284a6a2e7SMarc Zyngier kfree(its_dev->itt); 342384a6a2e7SMarc Zyngier kfree(its_dev); 342484a6a2e7SMarc Zyngier } 3425b48ac83dSMarc Zyngier 34268208d170SMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) 3427b48ac83dSMarc Zyngier { 3428b48ac83dSMarc Zyngier int idx; 3429b48ac83dSMarc Zyngier 3430342be106SZenghui Yu /* Find a free LPI region in lpi_map and allocate them. */ 34318208d170SMarc Zyngier idx = bitmap_find_free_region(dev->event_map.lpi_map, 34328208d170SMarc Zyngier dev->event_map.nr_lpis, 34338208d170SMarc Zyngier get_count_order(nvecs)); 34348208d170SMarc Zyngier if (idx < 0) 3435b48ac83dSMarc Zyngier return -ENOSPC; 3436b48ac83dSMarc Zyngier 3437591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 3438b48ac83dSMarc Zyngier 3439b48ac83dSMarc Zyngier return 0; 3440b48ac83dSMarc Zyngier } 3441b48ac83dSMarc Zyngier 344254456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 3443b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 3444b48ac83dSMarc Zyngier { 3445b48ac83dSMarc Zyngier struct its_node *its; 3446b48ac83dSMarc Zyngier struct its_device *its_dev; 344754456db9SMarc Zyngier struct msi_domain_info *msi_info; 344854456db9SMarc Zyngier u32 dev_id; 34499791ec7dSMarc Zyngier int err = 0; 3450b48ac83dSMarc Zyngier 345154456db9SMarc Zyngier /* 3452a7c90f51SJulien Grall * We ignore "dev" entirely, and rely on the dev_id that has 345354456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 345454456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 345554456db9SMarc Zyngier * are built on top of the ITS. 345654456db9SMarc Zyngier */ 345754456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 345854456db9SMarc Zyngier 345954456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 346054456db9SMarc Zyngier its = msi_info->data; 346154456db9SMarc Zyngier 346220b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 346320b3d54eSMarc Zyngier vpe_proxy.dev && 346420b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 346520b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 346620b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 346720b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 346820b3d54eSMarc Zyngier dev_id); 346920b3d54eSMarc Zyngier return -EINVAL; 347020b3d54eSMarc Zyngier } 347120b3d54eSMarc Zyngier 34729791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 3473f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 3474e8137f4fSMarc Zyngier if (its_dev) { 3475e8137f4fSMarc Zyngier /* 3476e8137f4fSMarc Zyngier * We already have seen this ID, probably through 3477e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 3478e8137f4fSMarc Zyngier * create the device. 3479e8137f4fSMarc Zyngier */ 34809791ec7dSMarc Zyngier its_dev->shared = true; 3481f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 3482e8137f4fSMarc Zyngier goto out; 3483e8137f4fSMarc Zyngier } 3484b48ac83dSMarc Zyngier 348593f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 34869791ec7dSMarc Zyngier if (!its_dev) { 34879791ec7dSMarc Zyngier err = -ENOMEM; 34889791ec7dSMarc Zyngier goto out; 34899791ec7dSMarc Zyngier } 3490b48ac83dSMarc Zyngier 3491f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 3492e8137f4fSMarc Zyngier out: 34939791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 3494b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 34959791ec7dSMarc Zyngier return err; 3496b48ac83dSMarc Zyngier } 3497b48ac83dSMarc Zyngier 349854456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 349954456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 350054456db9SMarc Zyngier }; 350154456db9SMarc Zyngier 3502b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 3503b48ac83dSMarc Zyngier unsigned int virq, 3504b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 3505b48ac83dSMarc Zyngier { 3506f833f57fSMarc Zyngier struct irq_fwspec fwspec; 3507b48ac83dSMarc Zyngier 3508f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 3509f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 3510f833f57fSMarc Zyngier fwspec.param_count = 3; 3511f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 3512f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 3513f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 35143f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 35153f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 35163f010cf1STomasz Nowicki fwspec.param_count = 2; 35173f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 35183f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 3519f833f57fSMarc Zyngier } else { 3520f833f57fSMarc Zyngier return -EINVAL; 3521f833f57fSMarc Zyngier } 3522b48ac83dSMarc Zyngier 3523f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 3524b48ac83dSMarc Zyngier } 3525b48ac83dSMarc Zyngier 3526b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 3527b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 3528b48ac83dSMarc Zyngier { 3529b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 3530b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 353135ae7df2SJulien Grall struct its_node *its = its_dev->its; 3532f0c7bacaSThomas Gleixner struct irq_data *irqd; 3533b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 3534b48ac83dSMarc Zyngier int err; 3535b48ac83dSMarc Zyngier int i; 3536b48ac83dSMarc Zyngier 35378208d170SMarc Zyngier err = its_alloc_device_irq(its_dev, nr_irqs, &hwirq); 3538b48ac83dSMarc Zyngier if (err) 3539b48ac83dSMarc Zyngier return err; 3540b48ac83dSMarc Zyngier 354135ae7df2SJulien Grall err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); 354235ae7df2SJulien Grall if (err) 354335ae7df2SJulien Grall return err; 354435ae7df2SJulien Grall 35458208d170SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 35468208d170SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); 3547b48ac83dSMarc Zyngier if (err) 3548b48ac83dSMarc Zyngier return err; 3549b48ac83dSMarc Zyngier 3550b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 35518208d170SMarc Zyngier hwirq + i, &its_irq_chip, its_dev); 3552f0c7bacaSThomas Gleixner irqd = irq_get_irq_data(virq + i); 3553f0c7bacaSThomas Gleixner irqd_set_single_target(irqd); 3554f0c7bacaSThomas Gleixner irqd_set_affinity_on_activate(irqd); 3555f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 35568208d170SMarc Zyngier (int)(hwirq + i - its_dev->event_map.lpi_base), 35578208d170SMarc Zyngier (int)(hwirq + i), virq + i); 3558b48ac83dSMarc Zyngier } 3559b48ac83dSMarc Zyngier 3560b48ac83dSMarc Zyngier return 0; 3561b48ac83dSMarc Zyngier } 3562b48ac83dSMarc Zyngier 356372491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 3564702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3565aca268dfSMarc Zyngier { 3566aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3567aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 35680d224d35SMarc Zyngier int cpu; 3569fbf8f40eSGanapatrao Kulkarni 3570c5d6082dSMarc Zyngier cpu = its_select_cpu(d, cpu_online_mask); 3571c5d6082dSMarc Zyngier if (cpu < 0 || cpu >= nr_cpu_ids) 3572c1797b11SYang Yingliang return -EINVAL; 3573c1797b11SYang Yingliang 35742f13ff1dSMarc Zyngier its_inc_lpi_count(d, cpu); 35750d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 35760d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3577591e5becSMarc Zyngier 3578aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 35796a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 358072491643SThomas Gleixner return 0; 3581aca268dfSMarc Zyngier } 3582aca268dfSMarc Zyngier 3583aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 3584aca268dfSMarc Zyngier struct irq_data *d) 3585aca268dfSMarc Zyngier { 3586aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3587aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 3588aca268dfSMarc Zyngier 35892f13ff1dSMarc Zyngier its_dec_lpi_count(d, its_dev->event_map.col_map[event]); 3590aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 3591aca268dfSMarc Zyngier its_send_discard(its_dev, event); 3592aca268dfSMarc Zyngier } 3593aca268dfSMarc Zyngier 3594b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 3595b48ac83dSMarc Zyngier unsigned int nr_irqs) 3596b48ac83dSMarc Zyngier { 3597b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 3598b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 35999791ec7dSMarc Zyngier struct its_node *its = its_dev->its; 3600b48ac83dSMarc Zyngier int i; 3601b48ac83dSMarc Zyngier 3602c9c96e30SMarc Zyngier bitmap_release_region(its_dev->event_map.lpi_map, 3603c9c96e30SMarc Zyngier its_get_event_id(irq_domain_get_irq_data(domain, virq)), 3604c9c96e30SMarc Zyngier get_count_order(nr_irqs)); 3605c9c96e30SMarc Zyngier 3606b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 3607b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 3608b48ac83dSMarc Zyngier virq + i); 3609b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 36102da39949SMarc Zyngier irq_domain_reset_irq_data(data); 3611b48ac83dSMarc Zyngier } 3612b48ac83dSMarc Zyngier 36139791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 36149791ec7dSMarc Zyngier 36159791ec7dSMarc Zyngier /* 36169791ec7dSMarc Zyngier * If all interrupts have been freed, start mopping the 36179791ec7dSMarc Zyngier * floor. This is conditionned on the device not being shared. 36189791ec7dSMarc Zyngier */ 36199791ec7dSMarc Zyngier if (!its_dev->shared && 36209791ec7dSMarc Zyngier bitmap_empty(its_dev->event_map.lpi_map, 3621591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 362238dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 3623cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 3624cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 3625b48ac83dSMarc Zyngier 3626b48ac83dSMarc Zyngier /* Unmap device/itt */ 3627b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 3628b48ac83dSMarc Zyngier its_free_device(its_dev); 3629b48ac83dSMarc Zyngier } 3630b48ac83dSMarc Zyngier 36319791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 36329791ec7dSMarc Zyngier 3633b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 3634b48ac83dSMarc Zyngier } 3635b48ac83dSMarc Zyngier 3636b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 3637b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 3638b48ac83dSMarc Zyngier .free = its_irq_domain_free, 3639aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 3640aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 3641b48ac83dSMarc Zyngier }; 36424c21f3c2SMarc Zyngier 364320b3d54eSMarc Zyngier /* 364420b3d54eSMarc Zyngier * This is insane. 364520b3d54eSMarc Zyngier * 36460684c704SMarc Zyngier * If a GICv4.0 doesn't implement Direct LPIs (which is extremely 364720b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 364820b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 364920b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 365020b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 365120b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 365220b3d54eSMarc Zyngier * 365320b3d54eSMarc Zyngier * Broken by design(tm). 36540684c704SMarc Zyngier * 36550684c704SMarc Zyngier * GICv4.1, on the other hand, mandates that we're able to invalidate 36560684c704SMarc Zyngier * by writing to a MMIO register. It doesn't implement the whole of 36570684c704SMarc Zyngier * DirectLPI, but that's good enough. And most of the time, we don't 36580684c704SMarc Zyngier * even have to invalidate anything, as the redistributor can be told 36590684c704SMarc Zyngier * whether to generate a doorbell or not (we thus leave it enabled, 36600684c704SMarc Zyngier * always). 366120b3d54eSMarc Zyngier */ 366220b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 366320b3d54eSMarc Zyngier { 36640684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 36650684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 36660684c704SMarc Zyngier return; 36670684c704SMarc Zyngier 366820b3d54eSMarc Zyngier /* Already unmapped? */ 366920b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 367020b3d54eSMarc Zyngier return; 367120b3d54eSMarc Zyngier 367220b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 367320b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 367420b3d54eSMarc Zyngier 367520b3d54eSMarc Zyngier /* 367620b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 367720b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 367820b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 367920b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 368020b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 368120b3d54eSMarc Zyngier */ 368220b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 368320b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 368420b3d54eSMarc Zyngier 368520b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 368620b3d54eSMarc Zyngier } 368720b3d54eSMarc Zyngier 368820b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 368920b3d54eSMarc Zyngier { 36900684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 36910684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 36920684c704SMarc Zyngier return; 36930684c704SMarc Zyngier 369420b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 369520b3d54eSMarc Zyngier unsigned long flags; 369620b3d54eSMarc Zyngier 369720b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 369820b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 369920b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 370020b3d54eSMarc Zyngier } 370120b3d54eSMarc Zyngier } 370220b3d54eSMarc Zyngier 370320b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 370420b3d54eSMarc Zyngier { 37050684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37060684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37070684c704SMarc Zyngier return; 37080684c704SMarc Zyngier 370920b3d54eSMarc Zyngier /* Already mapped? */ 371020b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 371120b3d54eSMarc Zyngier return; 371220b3d54eSMarc Zyngier 371320b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 371420b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 371520b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 371620b3d54eSMarc Zyngier 371720b3d54eSMarc Zyngier /* Map the new VPE instead */ 371820b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 371920b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 372020b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 372120b3d54eSMarc Zyngier 372220b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 372320b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 372420b3d54eSMarc Zyngier } 372520b3d54eSMarc Zyngier 3726958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 3727958b90d1SMarc Zyngier { 3728958b90d1SMarc Zyngier unsigned long flags; 3729958b90d1SMarc Zyngier struct its_collection *target_col; 3730958b90d1SMarc Zyngier 37310684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37320684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37330684c704SMarc Zyngier return; 37340684c704SMarc Zyngier 3735958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3736958b90d1SMarc Zyngier void __iomem *rdbase; 3737958b90d1SMarc Zyngier 3738958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 3739958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 37402f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3741958b90d1SMarc Zyngier 3742958b90d1SMarc Zyngier return; 3743958b90d1SMarc Zyngier } 3744958b90d1SMarc Zyngier 3745958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 3746958b90d1SMarc Zyngier 3747958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 3748958b90d1SMarc Zyngier 3749958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 3750958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 3751958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 3752958b90d1SMarc Zyngier 3753958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 3754958b90d1SMarc Zyngier } 3755958b90d1SMarc Zyngier 37563171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 37573171a47aSMarc Zyngier const struct cpumask *mask_val, 37583171a47aSMarc Zyngier bool force) 37593171a47aSMarc Zyngier { 37603171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3761dd3f050aSMarc Zyngier int from, cpu = cpumask_first(mask_val); 3762f3a05921SMarc Zyngier unsigned long flags; 37633171a47aSMarc Zyngier 37643171a47aSMarc Zyngier /* 37653171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 376620b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 3767958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 3768958b90d1SMarc Zyngier * interrupt to its new location. 3769f3a05921SMarc Zyngier * 3770f3a05921SMarc Zyngier * Another thing is that changing the affinity of a vPE affects 3771f3a05921SMarc Zyngier * *other interrupts* such as all the vLPIs that are routed to 3772f3a05921SMarc Zyngier * this vPE. This means that the irq_desc lock is not enough to 3773f3a05921SMarc Zyngier * protect us, and that we must ensure nobody samples vpe->col_idx 3774f3a05921SMarc Zyngier * during the update, hence the lock below which must also be 3775f3a05921SMarc Zyngier * taken on any vLPI handling path that evaluates vpe->col_idx. 37763171a47aSMarc Zyngier */ 3777f3a05921SMarc Zyngier from = vpe_to_cpuid_lock(vpe, &flags); 3778f3a05921SMarc Zyngier if (from == cpu) 3779dd3f050aSMarc Zyngier goto out; 3780958b90d1SMarc Zyngier 37813171a47aSMarc Zyngier vpe->col_idx = cpu; 3782dd3f050aSMarc Zyngier 3783dd3f050aSMarc Zyngier /* 3784dd3f050aSMarc Zyngier * GICv4.1 allows us to skip VMOVP if moving to a cpu whose RD 3785dd3f050aSMarc Zyngier * is sharing its VPE table with the current one. 3786dd3f050aSMarc Zyngier */ 3787dd3f050aSMarc Zyngier if (gic_data_rdist_cpu(cpu)->vpe_table_mask && 3788dd3f050aSMarc Zyngier cpumask_test_cpu(from, gic_data_rdist_cpu(cpu)->vpe_table_mask)) 3789dd3f050aSMarc Zyngier goto out; 3790dd3f050aSMarc Zyngier 37913171a47aSMarc Zyngier its_send_vmovp(vpe); 3792958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 37933171a47aSMarc Zyngier 3794dd3f050aSMarc Zyngier out: 379544c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3796f3a05921SMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 379744c4c25eSMarc Zyngier 37983171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 37993171a47aSMarc Zyngier } 38003171a47aSMarc Zyngier 380196806229SMarc Zyngier static void its_wait_vpt_parse_complete(void) 380296806229SMarc Zyngier { 380396806229SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 380496806229SMarc Zyngier u64 val; 380596806229SMarc Zyngier 380696806229SMarc Zyngier if (!gic_rdists->has_vpend_valid_dirty) 380796806229SMarc Zyngier return; 380896806229SMarc Zyngier 380931dbb6b1SZenghui Yu WARN_ON_ONCE(readq_relaxed_poll_timeout_atomic(vlpi_base + GICR_VPENDBASER, 381096806229SMarc Zyngier val, 381196806229SMarc Zyngier !(val & GICR_VPENDBASER_Dirty), 381296806229SMarc Zyngier 10, 500)); 381396806229SMarc Zyngier } 381496806229SMarc Zyngier 3815e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 3816e643d803SMarc Zyngier { 381750c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3818e643d803SMarc Zyngier u64 val; 3819e643d803SMarc Zyngier 3820e643d803SMarc Zyngier /* Schedule the VPE */ 3821e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 3822e643d803SMarc Zyngier GENMASK_ULL(51, 12); 3823e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 3824e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 3825e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 38265186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 3827e643d803SMarc Zyngier 3828e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 3829e643d803SMarc Zyngier GENMASK_ULL(51, 16); 3830e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 3831b2cb11f4SHeyi Guo val |= GICR_VPENDBASER_InnerShareable; 3832e643d803SMarc Zyngier /* 3833e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 3834e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 3835e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 3836e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 3837e643d803SMarc Zyngier * that the pending table is empty. A good implementation 3838e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 3839e643d803SMarc Zyngier * making this a tolerable issue. 3840e643d803SMarc Zyngier */ 3841e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 3842e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 3843e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 38445186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 384596806229SMarc Zyngier 384696806229SMarc Zyngier its_wait_vpt_parse_complete(); 3847e643d803SMarc Zyngier } 3848e643d803SMarc Zyngier 3849e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 3850e643d803SMarc Zyngier { 385150c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3852e643d803SMarc Zyngier u64 val; 3853e643d803SMarc Zyngier 3854e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 3855e643d803SMarc Zyngier 3856e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 3857e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 3858e643d803SMarc Zyngier } 3859e643d803SMarc Zyngier 386040619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 386140619a2eSMarc Zyngier { 386240619a2eSMarc Zyngier struct its_node *its; 386340619a2eSMarc Zyngier 386440619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 38650dd57fedSMarc Zyngier if (!is_v4(its)) 386640619a2eSMarc Zyngier continue; 386740619a2eSMarc Zyngier 38682247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 38692247e1bfSMarc Zyngier continue; 38702247e1bfSMarc Zyngier 38713c1cceebSMarc Zyngier /* 38723c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 38733c1cceebSMarc Zyngier * we need is to reach the redistributors. 38743c1cceebSMarc Zyngier */ 387540619a2eSMarc Zyngier its_send_vinvall(its, vpe); 38763c1cceebSMarc Zyngier return; 387740619a2eSMarc Zyngier } 387840619a2eSMarc Zyngier } 387940619a2eSMarc Zyngier 3880e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 3881e643d803SMarc Zyngier { 3882e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3883e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 3884e643d803SMarc Zyngier 3885e643d803SMarc Zyngier switch (info->cmd_type) { 3886e643d803SMarc Zyngier case SCHEDULE_VPE: 3887e643d803SMarc Zyngier its_vpe_schedule(vpe); 3888e643d803SMarc Zyngier return 0; 3889e643d803SMarc Zyngier 3890e643d803SMarc Zyngier case DESCHEDULE_VPE: 3891e643d803SMarc Zyngier its_vpe_deschedule(vpe); 3892e643d803SMarc Zyngier return 0; 3893e643d803SMarc Zyngier 38945e2f7642SMarc Zyngier case INVALL_VPE: 389540619a2eSMarc Zyngier its_vpe_invall(vpe); 38965e2f7642SMarc Zyngier return 0; 38975e2f7642SMarc Zyngier 3898e643d803SMarc Zyngier default: 3899e643d803SMarc Zyngier return -EINVAL; 3900e643d803SMarc Zyngier } 3901e643d803SMarc Zyngier } 3902e643d803SMarc Zyngier 390320b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 390420b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 390520b3d54eSMarc Zyngier { 390620b3d54eSMarc Zyngier unsigned long flags; 390720b3d54eSMarc Zyngier 390820b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 390920b3d54eSMarc Zyngier 391020b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 391120b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 391220b3d54eSMarc Zyngier 391320b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 391420b3d54eSMarc Zyngier } 391520b3d54eSMarc Zyngier 3916f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 3917f6a91da7SMarc Zyngier { 3918f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 391920b3d54eSMarc Zyngier 392020b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 3921f6a91da7SMarc Zyngier void __iomem *rdbase; 3922f6a91da7SMarc Zyngier 3923425c09beSMarc Zyngier /* Target the redistributor this VPE is currently known on */ 39249058a4e9SMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 3925f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3926425c09beSMarc Zyngier gic_write_lpir(d->parent_data->hwirq, rdbase + GICR_INVLPIR); 39272f4f064bSMarc Zyngier wait_for_syncr(rdbase); 39289058a4e9SMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 392920b3d54eSMarc Zyngier } else { 393020b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 393120b3d54eSMarc Zyngier } 3932f6a91da7SMarc Zyngier } 3933f6a91da7SMarc Zyngier 3934f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 3935f6a91da7SMarc Zyngier { 3936f6a91da7SMarc Zyngier /* 3937f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 3938f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 3939f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 3940f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 3941f6a91da7SMarc Zyngier */ 3942f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 3943f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3944f6a91da7SMarc Zyngier } 3945f6a91da7SMarc Zyngier 3946f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 3947f6a91da7SMarc Zyngier { 3948f6a91da7SMarc Zyngier /* Same hack as above... */ 3949f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 3950f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3951f6a91da7SMarc Zyngier } 3952f6a91da7SMarc Zyngier 3953e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 3954e57a3e28SMarc Zyngier enum irqchip_irq_state which, 3955e57a3e28SMarc Zyngier bool state) 3956e57a3e28SMarc Zyngier { 3957e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3958e57a3e28SMarc Zyngier 3959e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 3960e57a3e28SMarc Zyngier return -EINVAL; 3961e57a3e28SMarc Zyngier 3962e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3963e57a3e28SMarc Zyngier void __iomem *rdbase; 3964e57a3e28SMarc Zyngier 3965e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3966e57a3e28SMarc Zyngier if (state) { 3967e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 3968e57a3e28SMarc Zyngier } else { 3969e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 39702f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3971e57a3e28SMarc Zyngier } 3972e57a3e28SMarc Zyngier } else { 3973e57a3e28SMarc Zyngier if (state) 3974e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 3975e57a3e28SMarc Zyngier else 3976e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 3977e57a3e28SMarc Zyngier } 3978e57a3e28SMarc Zyngier 3979e57a3e28SMarc Zyngier return 0; 3980e57a3e28SMarc Zyngier } 3981e57a3e28SMarc Zyngier 39827809f701SMarc Zyngier static int its_vpe_retrigger(struct irq_data *d) 39837809f701SMarc Zyngier { 39847809f701SMarc Zyngier return !its_vpe_set_irqchip_state(d, IRQCHIP_STATE_PENDING, true); 39857809f701SMarc Zyngier } 39867809f701SMarc Zyngier 39878fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 39888fff27aeSMarc Zyngier .name = "GICv4-vpe", 3989f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 3990f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 3991f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 39923171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 39937809f701SMarc Zyngier .irq_retrigger = its_vpe_retrigger, 3994e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 3995e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 39968fff27aeSMarc Zyngier }; 39978fff27aeSMarc Zyngier 3998d97c97baSMarc Zyngier static struct its_node *find_4_1_its(void) 3999d97c97baSMarc Zyngier { 4000d97c97baSMarc Zyngier static struct its_node *its = NULL; 4001d97c97baSMarc Zyngier 4002d97c97baSMarc Zyngier if (!its) { 4003d97c97baSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 4004d97c97baSMarc Zyngier if (is_v4_1(its)) 4005d97c97baSMarc Zyngier return its; 4006d97c97baSMarc Zyngier } 4007d97c97baSMarc Zyngier 4008d97c97baSMarc Zyngier /* Oops? */ 4009d97c97baSMarc Zyngier its = NULL; 4010d97c97baSMarc Zyngier } 4011d97c97baSMarc Zyngier 4012d97c97baSMarc Zyngier return its; 4013d97c97baSMarc Zyngier } 4014d97c97baSMarc Zyngier 4015d97c97baSMarc Zyngier static void its_vpe_4_1_send_inv(struct irq_data *d) 4016d97c97baSMarc Zyngier { 4017d97c97baSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4018d97c97baSMarc Zyngier struct its_node *its; 4019d97c97baSMarc Zyngier 4020d97c97baSMarc Zyngier /* 4021d97c97baSMarc Zyngier * GICv4.1 wants doorbells to be invalidated using the 4022d97c97baSMarc Zyngier * INVDB command in order to be broadcast to all RDs. Send 4023d97c97baSMarc Zyngier * it to the first valid ITS, and let the HW do its magic. 4024d97c97baSMarc Zyngier */ 4025d97c97baSMarc Zyngier its = find_4_1_its(); 4026d97c97baSMarc Zyngier if (its) 4027d97c97baSMarc Zyngier its_send_invdb(its, vpe); 4028d97c97baSMarc Zyngier } 4029d97c97baSMarc Zyngier 4030d97c97baSMarc Zyngier static void its_vpe_4_1_mask_irq(struct irq_data *d) 4031d97c97baSMarc Zyngier { 4032d97c97baSMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 4033d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 4034d97c97baSMarc Zyngier } 4035d97c97baSMarc Zyngier 4036d97c97baSMarc Zyngier static void its_vpe_4_1_unmask_irq(struct irq_data *d) 4037d97c97baSMarc Zyngier { 4038d97c97baSMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 4039d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 4040d97c97baSMarc Zyngier } 4041d97c97baSMarc Zyngier 404291bf6395SMarc Zyngier static void its_vpe_4_1_schedule(struct its_vpe *vpe, 404391bf6395SMarc Zyngier struct its_cmd_info *info) 404491bf6395SMarc Zyngier { 404591bf6395SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 404691bf6395SMarc Zyngier u64 val = 0; 404791bf6395SMarc Zyngier 404891bf6395SMarc Zyngier /* Schedule the VPE */ 404991bf6395SMarc Zyngier val |= GICR_VPENDBASER_Valid; 405091bf6395SMarc Zyngier val |= info->g0en ? GICR_VPENDBASER_4_1_VGRP0EN : 0; 405191bf6395SMarc Zyngier val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0; 405291bf6395SMarc Zyngier val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id); 405391bf6395SMarc Zyngier 40545186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 405596806229SMarc Zyngier 405696806229SMarc Zyngier its_wait_vpt_parse_complete(); 405791bf6395SMarc Zyngier } 405891bf6395SMarc Zyngier 4059e64fab1aSMarc Zyngier static void its_vpe_4_1_deschedule(struct its_vpe *vpe, 4060e64fab1aSMarc Zyngier struct its_cmd_info *info) 4061e64fab1aSMarc Zyngier { 4062e64fab1aSMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 4063e64fab1aSMarc Zyngier u64 val; 4064e64fab1aSMarc Zyngier 4065e64fab1aSMarc Zyngier if (info->req_db) { 4066a3f574cdSMarc Zyngier unsigned long flags; 4067a3f574cdSMarc Zyngier 4068e64fab1aSMarc Zyngier /* 4069e64fab1aSMarc Zyngier * vPE is going to block: make the vPE non-resident with 4070e64fab1aSMarc Zyngier * PendingLast clear and DB set. The GIC guarantees that if 4071e64fab1aSMarc Zyngier * we read-back PendingLast clear, then a doorbell will be 4072e64fab1aSMarc Zyngier * delivered when an interrupt comes. 4073a3f574cdSMarc Zyngier * 4074a3f574cdSMarc Zyngier * Note the locking to deal with the concurrent update of 4075a3f574cdSMarc Zyngier * pending_last from the doorbell interrupt handler that can 4076a3f574cdSMarc Zyngier * run concurrently. 4077e64fab1aSMarc Zyngier */ 4078a3f574cdSMarc Zyngier raw_spin_lock_irqsave(&vpe->vpe_lock, flags); 4079e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 4080e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast, 4081e64fab1aSMarc Zyngier GICR_VPENDBASER_4_1_DB); 4082e64fab1aSMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 4083a3f574cdSMarc Zyngier raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); 4084e64fab1aSMarc Zyngier } else { 4085e64fab1aSMarc Zyngier /* 4086e64fab1aSMarc Zyngier * We're not blocking, so just make the vPE non-resident 4087e64fab1aSMarc Zyngier * with PendingLast set, indicating that we'll be back. 4088e64fab1aSMarc Zyngier */ 4089e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 4090e64fab1aSMarc Zyngier 0, 4091e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast); 4092e64fab1aSMarc Zyngier vpe->pending_last = true; 4093e64fab1aSMarc Zyngier } 4094e64fab1aSMarc Zyngier } 4095e64fab1aSMarc Zyngier 4096b4a4bd0fSMarc Zyngier static void its_vpe_4_1_invall(struct its_vpe *vpe) 4097b4a4bd0fSMarc Zyngier { 4098b4a4bd0fSMarc Zyngier void __iomem *rdbase; 40993af9571cSZenghui Yu unsigned long flags; 4100b4a4bd0fSMarc Zyngier u64 val; 41013af9571cSZenghui Yu int cpu; 4102b4a4bd0fSMarc Zyngier 4103b4a4bd0fSMarc Zyngier val = GICR_INVALLR_V; 4104b4a4bd0fSMarc Zyngier val |= FIELD_PREP(GICR_INVALLR_VPEID, vpe->vpe_id); 4105b4a4bd0fSMarc Zyngier 4106b4a4bd0fSMarc Zyngier /* Target the redistributor this vPE is currently known on */ 41073af9571cSZenghui Yu cpu = vpe_to_cpuid_lock(vpe, &flags); 41083af9571cSZenghui Yu raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 41093af9571cSZenghui Yu rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; 4110b4a4bd0fSMarc Zyngier gic_write_lpir(val, rdbase + GICR_INVALLR); 4111b978c25fSZenghui Yu 4112b978c25fSZenghui Yu wait_for_syncr(rdbase); 41133af9571cSZenghui Yu raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 41143af9571cSZenghui Yu vpe_to_cpuid_unlock(vpe, flags); 4115b4a4bd0fSMarc Zyngier } 4116b4a4bd0fSMarc Zyngier 411729c647f3SMarc Zyngier static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 411829c647f3SMarc Zyngier { 411991bf6395SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 412029c647f3SMarc Zyngier struct its_cmd_info *info = vcpu_info; 412129c647f3SMarc Zyngier 412229c647f3SMarc Zyngier switch (info->cmd_type) { 412329c647f3SMarc Zyngier case SCHEDULE_VPE: 412491bf6395SMarc Zyngier its_vpe_4_1_schedule(vpe, info); 412529c647f3SMarc Zyngier return 0; 412629c647f3SMarc Zyngier 412729c647f3SMarc Zyngier case DESCHEDULE_VPE: 4128e64fab1aSMarc Zyngier its_vpe_4_1_deschedule(vpe, info); 412929c647f3SMarc Zyngier return 0; 413029c647f3SMarc Zyngier 413129c647f3SMarc Zyngier case INVALL_VPE: 4132b4a4bd0fSMarc Zyngier its_vpe_4_1_invall(vpe); 413329c647f3SMarc Zyngier return 0; 413429c647f3SMarc Zyngier 413529c647f3SMarc Zyngier default: 413629c647f3SMarc Zyngier return -EINVAL; 413729c647f3SMarc Zyngier } 413829c647f3SMarc Zyngier } 413929c647f3SMarc Zyngier 414029c647f3SMarc Zyngier static struct irq_chip its_vpe_4_1_irq_chip = { 414129c647f3SMarc Zyngier .name = "GICv4.1-vpe", 4142d97c97baSMarc Zyngier .irq_mask = its_vpe_4_1_mask_irq, 4143d97c97baSMarc Zyngier .irq_unmask = its_vpe_4_1_unmask_irq, 414429c647f3SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 414529c647f3SMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 414629c647f3SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_4_1_set_vcpu_affinity, 414729c647f3SMarc Zyngier }; 414829c647f3SMarc Zyngier 4149e252cf8aSMarc Zyngier static void its_configure_sgi(struct irq_data *d, bool clear) 4150e252cf8aSMarc Zyngier { 4151e252cf8aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4152e252cf8aSMarc Zyngier struct its_cmd_desc desc; 4153e252cf8aSMarc Zyngier 4154e252cf8aSMarc Zyngier desc.its_vsgi_cmd.vpe = vpe; 4155e252cf8aSMarc Zyngier desc.its_vsgi_cmd.sgi = d->hwirq; 4156e252cf8aSMarc Zyngier desc.its_vsgi_cmd.priority = vpe->sgi_config[d->hwirq].priority; 4157e252cf8aSMarc Zyngier desc.its_vsgi_cmd.enable = vpe->sgi_config[d->hwirq].enabled; 4158e252cf8aSMarc Zyngier desc.its_vsgi_cmd.group = vpe->sgi_config[d->hwirq].group; 4159e252cf8aSMarc Zyngier desc.its_vsgi_cmd.clear = clear; 4160e252cf8aSMarc Zyngier 4161e252cf8aSMarc Zyngier /* 4162e252cf8aSMarc Zyngier * GICv4.1 allows us to send VSGI commands to any ITS as long as the 4163e252cf8aSMarc Zyngier * destination VPE is mapped there. Since we map them eagerly at 4164e252cf8aSMarc Zyngier * activation time, we're pretty sure the first GICv4.1 ITS will do. 4165e252cf8aSMarc Zyngier */ 4166e252cf8aSMarc Zyngier its_send_single_vcommand(find_4_1_its(), its_build_vsgi_cmd, &desc); 4167e252cf8aSMarc Zyngier } 4168e252cf8aSMarc Zyngier 4169b4e8d644SMarc Zyngier static void its_sgi_mask_irq(struct irq_data *d) 4170b4e8d644SMarc Zyngier { 4171b4e8d644SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4172b4e8d644SMarc Zyngier 4173b4e8d644SMarc Zyngier vpe->sgi_config[d->hwirq].enabled = false; 4174b4e8d644SMarc Zyngier its_configure_sgi(d, false); 4175b4e8d644SMarc Zyngier } 4176b4e8d644SMarc Zyngier 4177b4e8d644SMarc Zyngier static void its_sgi_unmask_irq(struct irq_data *d) 4178b4e8d644SMarc Zyngier { 4179b4e8d644SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4180b4e8d644SMarc Zyngier 4181b4e8d644SMarc Zyngier vpe->sgi_config[d->hwirq].enabled = true; 4182b4e8d644SMarc Zyngier its_configure_sgi(d, false); 4183b4e8d644SMarc Zyngier } 4184b4e8d644SMarc Zyngier 4185166cba71SMarc Zyngier static int its_sgi_set_affinity(struct irq_data *d, 4186166cba71SMarc Zyngier const struct cpumask *mask_val, 4187166cba71SMarc Zyngier bool force) 4188166cba71SMarc Zyngier { 4189166cba71SMarc Zyngier /* 4190166cba71SMarc Zyngier * There is no notion of affinity for virtual SGIs, at least 4191166cba71SMarc Zyngier * not on the host (since they can only be targetting a vPE). 4192166cba71SMarc Zyngier * Tell the kernel we've done whatever it asked for. 4193166cba71SMarc Zyngier */ 41944b2dfe1eSMarc Zyngier irq_data_update_effective_affinity(d, mask_val); 4195166cba71SMarc Zyngier return IRQ_SET_MASK_OK; 4196166cba71SMarc Zyngier } 4197166cba71SMarc Zyngier 41987017ff0eSMarc Zyngier static int its_sgi_set_irqchip_state(struct irq_data *d, 41997017ff0eSMarc Zyngier enum irqchip_irq_state which, 42007017ff0eSMarc Zyngier bool state) 42017017ff0eSMarc Zyngier { 42027017ff0eSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 42037017ff0eSMarc Zyngier return -EINVAL; 42047017ff0eSMarc Zyngier 42057017ff0eSMarc Zyngier if (state) { 42067017ff0eSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 42077017ff0eSMarc Zyngier struct its_node *its = find_4_1_its(); 42087017ff0eSMarc Zyngier u64 val; 42097017ff0eSMarc Zyngier 42107017ff0eSMarc Zyngier val = FIELD_PREP(GITS_SGIR_VPEID, vpe->vpe_id); 42117017ff0eSMarc Zyngier val |= FIELD_PREP(GITS_SGIR_VINTID, d->hwirq); 42127017ff0eSMarc Zyngier writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); 42137017ff0eSMarc Zyngier } else { 42147017ff0eSMarc Zyngier its_configure_sgi(d, true); 42157017ff0eSMarc Zyngier } 42167017ff0eSMarc Zyngier 42177017ff0eSMarc Zyngier return 0; 42187017ff0eSMarc Zyngier } 42197017ff0eSMarc Zyngier 42207017ff0eSMarc Zyngier static int its_sgi_get_irqchip_state(struct irq_data *d, 42217017ff0eSMarc Zyngier enum irqchip_irq_state which, bool *val) 42227017ff0eSMarc Zyngier { 42237017ff0eSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 42247017ff0eSMarc Zyngier void __iomem *base; 42257017ff0eSMarc Zyngier unsigned long flags; 42267017ff0eSMarc Zyngier u32 count = 1000000; /* 1s! */ 42277017ff0eSMarc Zyngier u32 status; 42287017ff0eSMarc Zyngier int cpu; 42297017ff0eSMarc Zyngier 42307017ff0eSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 42317017ff0eSMarc Zyngier return -EINVAL; 42327017ff0eSMarc Zyngier 42337017ff0eSMarc Zyngier /* 42347017ff0eSMarc Zyngier * Locking galore! We can race against two different events: 42357017ff0eSMarc Zyngier * 42367017ff0eSMarc Zyngier * - Concurent vPE affinity change: we must make sure it cannot 42377017ff0eSMarc Zyngier * happen, or we'll talk to the wrong redistributor. This is 42387017ff0eSMarc Zyngier * identical to what happens with vLPIs. 42397017ff0eSMarc Zyngier * 42407017ff0eSMarc Zyngier * - Concurrent VSGIPENDR access: As it involves accessing two 42417017ff0eSMarc Zyngier * MMIO registers, this must be made atomic one way or another. 42427017ff0eSMarc Zyngier */ 42437017ff0eSMarc Zyngier cpu = vpe_to_cpuid_lock(vpe, &flags); 42447017ff0eSMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 42457017ff0eSMarc Zyngier base = gic_data_rdist_cpu(cpu)->rd_base + SZ_128K; 42467017ff0eSMarc Zyngier writel_relaxed(vpe->vpe_id, base + GICR_VSGIR); 42477017ff0eSMarc Zyngier do { 42487017ff0eSMarc Zyngier status = readl_relaxed(base + GICR_VSGIPENDR); 42497017ff0eSMarc Zyngier if (!(status & GICR_VSGIPENDR_BUSY)) 42507017ff0eSMarc Zyngier goto out; 42517017ff0eSMarc Zyngier 42527017ff0eSMarc Zyngier count--; 42537017ff0eSMarc Zyngier if (!count) { 42547017ff0eSMarc Zyngier pr_err_ratelimited("Unable to get SGI status\n"); 42557017ff0eSMarc Zyngier goto out; 42567017ff0eSMarc Zyngier } 42577017ff0eSMarc Zyngier cpu_relax(); 42587017ff0eSMarc Zyngier udelay(1); 42597017ff0eSMarc Zyngier } while (count); 42607017ff0eSMarc Zyngier 42617017ff0eSMarc Zyngier out: 42627017ff0eSMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 42637017ff0eSMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 42647017ff0eSMarc Zyngier 42657017ff0eSMarc Zyngier if (!count) 42667017ff0eSMarc Zyngier return -ENXIO; 42677017ff0eSMarc Zyngier 42687017ff0eSMarc Zyngier *val = !!(status & (1 << d->hwirq)); 42697017ff0eSMarc Zyngier 42707017ff0eSMarc Zyngier return 0; 42717017ff0eSMarc Zyngier } 42727017ff0eSMarc Zyngier 427305d32df1SMarc Zyngier static int its_sgi_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 427405d32df1SMarc Zyngier { 427505d32df1SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 427605d32df1SMarc Zyngier struct its_cmd_info *info = vcpu_info; 427705d32df1SMarc Zyngier 427805d32df1SMarc Zyngier switch (info->cmd_type) { 427905d32df1SMarc Zyngier case PROP_UPDATE_VSGI: 428005d32df1SMarc Zyngier vpe->sgi_config[d->hwirq].priority = info->priority; 428105d32df1SMarc Zyngier vpe->sgi_config[d->hwirq].group = info->group; 428205d32df1SMarc Zyngier its_configure_sgi(d, false); 428305d32df1SMarc Zyngier return 0; 428405d32df1SMarc Zyngier 428505d32df1SMarc Zyngier default: 428605d32df1SMarc Zyngier return -EINVAL; 428705d32df1SMarc Zyngier } 428805d32df1SMarc Zyngier } 428905d32df1SMarc Zyngier 4290166cba71SMarc Zyngier static struct irq_chip its_sgi_irq_chip = { 4291166cba71SMarc Zyngier .name = "GICv4.1-sgi", 4292b4e8d644SMarc Zyngier .irq_mask = its_sgi_mask_irq, 4293b4e8d644SMarc Zyngier .irq_unmask = its_sgi_unmask_irq, 4294166cba71SMarc Zyngier .irq_set_affinity = its_sgi_set_affinity, 42957017ff0eSMarc Zyngier .irq_set_irqchip_state = its_sgi_set_irqchip_state, 42967017ff0eSMarc Zyngier .irq_get_irqchip_state = its_sgi_get_irqchip_state, 429705d32df1SMarc Zyngier .irq_set_vcpu_affinity = its_sgi_set_vcpu_affinity, 4298166cba71SMarc Zyngier }; 4299166cba71SMarc Zyngier 4300166cba71SMarc Zyngier static int its_sgi_irq_domain_alloc(struct irq_domain *domain, 4301166cba71SMarc Zyngier unsigned int virq, unsigned int nr_irqs, 4302166cba71SMarc Zyngier void *args) 4303166cba71SMarc Zyngier { 4304166cba71SMarc Zyngier struct its_vpe *vpe = args; 4305166cba71SMarc Zyngier int i; 4306166cba71SMarc Zyngier 4307166cba71SMarc Zyngier /* Yes, we do want 16 SGIs */ 4308166cba71SMarc Zyngier WARN_ON(nr_irqs != 16); 4309166cba71SMarc Zyngier 4310166cba71SMarc Zyngier for (i = 0; i < 16; i++) { 4311166cba71SMarc Zyngier vpe->sgi_config[i].priority = 0; 4312166cba71SMarc Zyngier vpe->sgi_config[i].enabled = false; 4313166cba71SMarc Zyngier vpe->sgi_config[i].group = false; 4314166cba71SMarc Zyngier 4315166cba71SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 4316166cba71SMarc Zyngier &its_sgi_irq_chip, vpe); 4317166cba71SMarc Zyngier irq_set_status_flags(virq + i, IRQ_DISABLE_UNLAZY); 4318166cba71SMarc Zyngier } 4319166cba71SMarc Zyngier 4320166cba71SMarc Zyngier return 0; 4321166cba71SMarc Zyngier } 4322166cba71SMarc Zyngier 4323166cba71SMarc Zyngier static void its_sgi_irq_domain_free(struct irq_domain *domain, 4324166cba71SMarc Zyngier unsigned int virq, 4325166cba71SMarc Zyngier unsigned int nr_irqs) 4326166cba71SMarc Zyngier { 4327166cba71SMarc Zyngier /* Nothing to do */ 4328166cba71SMarc Zyngier } 4329166cba71SMarc Zyngier 4330166cba71SMarc Zyngier static int its_sgi_irq_domain_activate(struct irq_domain *domain, 4331166cba71SMarc Zyngier struct irq_data *d, bool reserve) 4332166cba71SMarc Zyngier { 4333e252cf8aSMarc Zyngier /* Write out the initial SGI configuration */ 4334e252cf8aSMarc Zyngier its_configure_sgi(d, false); 4335166cba71SMarc Zyngier return 0; 4336166cba71SMarc Zyngier } 4337166cba71SMarc Zyngier 4338166cba71SMarc Zyngier static void its_sgi_irq_domain_deactivate(struct irq_domain *domain, 4339166cba71SMarc Zyngier struct irq_data *d) 4340166cba71SMarc Zyngier { 4341e252cf8aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4342e252cf8aSMarc Zyngier 4343e252cf8aSMarc Zyngier /* 4344e252cf8aSMarc Zyngier * The VSGI command is awkward: 4345e252cf8aSMarc Zyngier * 4346e252cf8aSMarc Zyngier * - To change the configuration, CLEAR must be set to false, 4347e252cf8aSMarc Zyngier * leaving the pending bit unchanged. 4348e252cf8aSMarc Zyngier * - To clear the pending bit, CLEAR must be set to true, leaving 4349e252cf8aSMarc Zyngier * the configuration unchanged. 4350e252cf8aSMarc Zyngier * 4351e252cf8aSMarc Zyngier * You just can't do both at once, hence the two commands below. 4352e252cf8aSMarc Zyngier */ 4353e252cf8aSMarc Zyngier vpe->sgi_config[d->hwirq].enabled = false; 4354e252cf8aSMarc Zyngier its_configure_sgi(d, false); 4355e252cf8aSMarc Zyngier its_configure_sgi(d, true); 4356166cba71SMarc Zyngier } 4357166cba71SMarc Zyngier 4358166cba71SMarc Zyngier static const struct irq_domain_ops its_sgi_domain_ops = { 4359166cba71SMarc Zyngier .alloc = its_sgi_irq_domain_alloc, 4360166cba71SMarc Zyngier .free = its_sgi_irq_domain_free, 4361166cba71SMarc Zyngier .activate = its_sgi_irq_domain_activate, 4362166cba71SMarc Zyngier .deactivate = its_sgi_irq_domain_deactivate, 4363166cba71SMarc Zyngier }; 4364166cba71SMarc Zyngier 43657d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 43667d75bbb4SMarc Zyngier { 436732bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 43687d75bbb4SMarc Zyngier } 43697d75bbb4SMarc Zyngier 43707d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 43717d75bbb4SMarc Zyngier { 43727d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 43737d75bbb4SMarc Zyngier } 43747d75bbb4SMarc Zyngier 43757d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 43767d75bbb4SMarc Zyngier { 43777d75bbb4SMarc Zyngier struct page *vpt_page; 43787d75bbb4SMarc Zyngier int vpe_id; 43797d75bbb4SMarc Zyngier 43807d75bbb4SMarc Zyngier /* Allocate vpe_id */ 43817d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 43827d75bbb4SMarc Zyngier if (vpe_id < 0) 43837d75bbb4SMarc Zyngier return vpe_id; 43847d75bbb4SMarc Zyngier 43857d75bbb4SMarc Zyngier /* Allocate VPT */ 43867d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 43877d75bbb4SMarc Zyngier if (!vpt_page) { 43887d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 43897d75bbb4SMarc Zyngier return -ENOMEM; 43907d75bbb4SMarc Zyngier } 43917d75bbb4SMarc Zyngier 43927d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 43937d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 439434f8eb92SNianyao Tang its_free_pending_table(vpt_page); 43957d75bbb4SMarc Zyngier return -ENOMEM; 43967d75bbb4SMarc Zyngier } 43977d75bbb4SMarc Zyngier 4398f3a05921SMarc Zyngier raw_spin_lock_init(&vpe->vpe_lock); 43997d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 44007d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 440164edfaa9SMarc Zyngier if (gic_rdists->has_rvpeid) 440264edfaa9SMarc Zyngier atomic_set(&vpe->vmapp_count, 0); 440364edfaa9SMarc Zyngier else 440420b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 44057d75bbb4SMarc Zyngier 44067d75bbb4SMarc Zyngier return 0; 44077d75bbb4SMarc Zyngier } 44087d75bbb4SMarc Zyngier 44097d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 44107d75bbb4SMarc Zyngier { 441120b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 44127d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 44137d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 44147d75bbb4SMarc Zyngier } 44157d75bbb4SMarc Zyngier 44167d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 44177d75bbb4SMarc Zyngier unsigned int virq, 44187d75bbb4SMarc Zyngier unsigned int nr_irqs) 44197d75bbb4SMarc Zyngier { 44207d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 44217d75bbb4SMarc Zyngier int i; 44227d75bbb4SMarc Zyngier 44237d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 44247d75bbb4SMarc Zyngier 44257d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 44267d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 44277d75bbb4SMarc Zyngier virq + i); 44287d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 44297d75bbb4SMarc Zyngier 44307d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 44317d75bbb4SMarc Zyngier 44327d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 44337d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 44347d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 44357d75bbb4SMarc Zyngier } 44367d75bbb4SMarc Zyngier 44377d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 443838dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 44397d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 44407d75bbb4SMarc Zyngier } 44417d75bbb4SMarc Zyngier } 44427d75bbb4SMarc Zyngier 44437d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 44447d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 44457d75bbb4SMarc Zyngier { 444629c647f3SMarc Zyngier struct irq_chip *irqchip = &its_vpe_irq_chip; 44477d75bbb4SMarc Zyngier struct its_vm *vm = args; 44487d75bbb4SMarc Zyngier unsigned long *bitmap; 44497d75bbb4SMarc Zyngier struct page *vprop_page; 44507d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 44517d75bbb4SMarc Zyngier 44527d75bbb4SMarc Zyngier BUG_ON(!vm); 44537d75bbb4SMarc Zyngier 445438dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 44557d75bbb4SMarc Zyngier if (!bitmap) 44567d75bbb4SMarc Zyngier return -ENOMEM; 44577d75bbb4SMarc Zyngier 44587d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 445938dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 44607d75bbb4SMarc Zyngier return -ENOMEM; 44617d75bbb4SMarc Zyngier } 44627d75bbb4SMarc Zyngier 44637d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 44647d75bbb4SMarc Zyngier if (!vprop_page) { 446538dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 44667d75bbb4SMarc Zyngier return -ENOMEM; 44677d75bbb4SMarc Zyngier } 44687d75bbb4SMarc Zyngier 44697d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 44707d75bbb4SMarc Zyngier vm->db_lpi_base = base; 44717d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 44727d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 44737d75bbb4SMarc Zyngier 447429c647f3SMarc Zyngier if (gic_rdists->has_rvpeid) 447529c647f3SMarc Zyngier irqchip = &its_vpe_4_1_irq_chip; 447629c647f3SMarc Zyngier 44777d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 44787d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 44797d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 44807d75bbb4SMarc Zyngier if (err) 44817d75bbb4SMarc Zyngier break; 44827d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 44837d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 44847d75bbb4SMarc Zyngier if (err) 44857d75bbb4SMarc Zyngier break; 44867d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 448729c647f3SMarc Zyngier irqchip, vm->vpes[i]); 44887d75bbb4SMarc Zyngier set_bit(i, bitmap); 44897d75bbb4SMarc Zyngier } 44907d75bbb4SMarc Zyngier 44917d75bbb4SMarc Zyngier if (err) { 44927d75bbb4SMarc Zyngier if (i > 0) 44937d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 44947d75bbb4SMarc Zyngier 449538dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 44967d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 44977d75bbb4SMarc Zyngier } 44987d75bbb4SMarc Zyngier 44997d75bbb4SMarc Zyngier return err; 45007d75bbb4SMarc Zyngier } 45017d75bbb4SMarc Zyngier 450272491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 4503702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 4504eb78192bSMarc Zyngier { 4505eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 450640619a2eSMarc Zyngier struct its_node *its; 4507eb78192bSMarc Zyngier 4508009384b3SMarc Zyngier /* 4509009384b3SMarc Zyngier * If we use the list map, we issue VMAPP on demand... Unless 4510009384b3SMarc Zyngier * we're on a GICv4.1 and we eagerly map the VPE on all ITSs 4511009384b3SMarc Zyngier * so that VSGIs can work. 4512009384b3SMarc Zyngier */ 4513009384b3SMarc Zyngier if (!gic_requires_eager_mapping()) 45146ef930f2SMarc Zyngier return 0; 4515eb78192bSMarc Zyngier 4516eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 4517eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 451840619a2eSMarc Zyngier 451940619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 45200dd57fedSMarc Zyngier if (!is_v4(its)) 452140619a2eSMarc Zyngier continue; 452240619a2eSMarc Zyngier 452375fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 452440619a2eSMarc Zyngier its_send_vinvall(its, vpe); 452540619a2eSMarc Zyngier } 452640619a2eSMarc Zyngier 452744c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 452844c4c25eSMarc Zyngier 452972491643SThomas Gleixner return 0; 4530eb78192bSMarc Zyngier } 4531eb78192bSMarc Zyngier 4532eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 4533eb78192bSMarc Zyngier struct irq_data *d) 4534eb78192bSMarc Zyngier { 4535eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 453675fd951bSMarc Zyngier struct its_node *its; 4537eb78192bSMarc Zyngier 45382247e1bfSMarc Zyngier /* 4539009384b3SMarc Zyngier * If we use the list map on GICv4.0, we unmap the VPE once no 4540009384b3SMarc Zyngier * VLPIs are associated with the VM. 45412247e1bfSMarc Zyngier */ 4542009384b3SMarc Zyngier if (!gic_requires_eager_mapping()) 45432247e1bfSMarc Zyngier return; 45442247e1bfSMarc Zyngier 454575fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 45460dd57fedSMarc Zyngier if (!is_v4(its)) 454775fd951bSMarc Zyngier continue; 454875fd951bSMarc Zyngier 454975fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 455075fd951bSMarc Zyngier } 4551eb78192bSMarc Zyngier } 4552eb78192bSMarc Zyngier 45538fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 45547d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 45557d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 4556eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 4557eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 45588fff27aeSMarc Zyngier }; 45598fff27aeSMarc Zyngier 45604559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 45614559fbb3SYun Wu { 45624559fbb3SYun Wu u32 count = 1000000; /* 1s */ 45634559fbb3SYun Wu u32 val; 45644559fbb3SYun Wu 45654559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 45667611da86SDavid Daney /* 45677611da86SDavid Daney * GIC architecture specification requires the ITS to be both 45687611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 45697611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 45707611da86SDavid Daney */ 45717611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 45724559fbb3SYun Wu return 0; 45734559fbb3SYun Wu 45744559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 4575d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 45764559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 45774559fbb3SYun Wu 45784559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 45794559fbb3SYun Wu while (1) { 45804559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 45814559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 45824559fbb3SYun Wu return 0; 45834559fbb3SYun Wu 45844559fbb3SYun Wu count--; 45854559fbb3SYun Wu if (!count) 45864559fbb3SYun Wu return -EBUSY; 45874559fbb3SYun Wu 45884559fbb3SYun Wu cpu_relax(); 45894559fbb3SYun Wu udelay(1); 45904559fbb3SYun Wu } 45914559fbb3SYun Wu } 45924559fbb3SYun Wu 45939d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 459494100970SRobert Richter { 459594100970SRobert Richter struct its_node *its = data; 459694100970SRobert Richter 4597576a8342SMarc Zyngier /* erratum 22375: only alloc 8MB table size (20 bits) */ 4598576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 4599576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); 460094100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 46019d111d49SArd Biesheuvel 46029d111d49SArd Biesheuvel return true; 460394100970SRobert Richter } 460494100970SRobert Richter 46059d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 4606fbf8f40eSGanapatrao Kulkarni { 4607fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 4608fbf8f40eSGanapatrao Kulkarni 4609fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 46109d111d49SArd Biesheuvel 46119d111d49SArd Biesheuvel return true; 4612fbf8f40eSGanapatrao Kulkarni } 4613fbf8f40eSGanapatrao Kulkarni 46149d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 461590922a2dSShanker Donthineni { 461690922a2dSShanker Donthineni struct its_node *its = data; 461790922a2dSShanker Donthineni 461890922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 4619ffedbf0cSMarc Zyngier its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; 4620ffedbf0cSMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); 46219d111d49SArd Biesheuvel 46229d111d49SArd Biesheuvel return true; 462390922a2dSShanker Donthineni } 462490922a2dSShanker Donthineni 4625558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 4626558b0165SArd Biesheuvel { 4627558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 4628558b0165SArd Biesheuvel 4629558b0165SArd Biesheuvel /* 4630558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 4631558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 4632558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 4633558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 4634558b0165SArd Biesheuvel * the window offset. 4635558b0165SArd Biesheuvel */ 4636558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 4637558b0165SArd Biesheuvel } 4638558b0165SArd Biesheuvel 4639558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 4640558b0165SArd Biesheuvel { 4641558b0165SArd Biesheuvel struct its_node *its = data; 4642558b0165SArd Biesheuvel u32 pre_its_window[2]; 4643558b0165SArd Biesheuvel u32 ids; 4644558b0165SArd Biesheuvel 4645558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 4646558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 4647558b0165SArd Biesheuvel pre_its_window, 4648558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 4649558b0165SArd Biesheuvel 4650558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 4651558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 4652558b0165SArd Biesheuvel 4653558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 4654576a8342SMarc Zyngier if (device_ids(its) > ids) { 4655576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 4656576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); 4657576a8342SMarc Zyngier } 4658558b0165SArd Biesheuvel 4659558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 4660558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 4661558b0165SArd Biesheuvel return true; 4662558b0165SArd Biesheuvel } 4663558b0165SArd Biesheuvel return false; 4664558b0165SArd Biesheuvel } 4665558b0165SArd Biesheuvel 46665c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 46675c9a882eSMarc Zyngier { 46685c9a882eSMarc Zyngier struct its_node *its = data; 46695c9a882eSMarc Zyngier 46705c9a882eSMarc Zyngier /* 46715c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 46725c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 46735c9a882eSMarc Zyngier */ 46745c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 46755c9a882eSMarc Zyngier return true; 4676cc2d3216SMarc Zyngier } 46774c21f3c2SMarc Zyngier 467867510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 467994100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 468094100970SRobert Richter { 468194100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 468294100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 468394100970SRobert Richter .mask = 0xffff0fff, 468494100970SRobert Richter .init = its_enable_quirk_cavium_22375, 468594100970SRobert Richter }, 468694100970SRobert Richter #endif 4687fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 4688fbf8f40eSGanapatrao Kulkarni { 4689fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 4690fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 4691fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 4692fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 4693fbf8f40eSGanapatrao Kulkarni }, 4694fbf8f40eSGanapatrao Kulkarni #endif 469590922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 469690922a2dSShanker Donthineni { 469790922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 469890922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 469990922a2dSShanker Donthineni .mask = 0xffffffff, 470090922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 470190922a2dSShanker Donthineni }, 470290922a2dSShanker Donthineni #endif 4703558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 4704558b0165SArd Biesheuvel { 4705558b0165SArd Biesheuvel /* 4706558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 4707558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 4708558b0165SArd Biesheuvel * special handling in software. 4709558b0165SArd Biesheuvel */ 4710558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 4711558b0165SArd Biesheuvel .iidr = 0x0001143b, 4712558b0165SArd Biesheuvel .mask = 0xffffffff, 4713558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 4714558b0165SArd Biesheuvel }, 4715558b0165SArd Biesheuvel #endif 47165c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 47175c9a882eSMarc Zyngier { 47185c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 47195c9a882eSMarc Zyngier .iidr = 0x00000004, 47205c9a882eSMarc Zyngier .mask = 0xffffffff, 47215c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 47225c9a882eSMarc Zyngier }, 47235c9a882eSMarc Zyngier #endif 472467510ccaSRobert Richter { 472567510ccaSRobert Richter } 472667510ccaSRobert Richter }; 472767510ccaSRobert Richter 472867510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 472967510ccaSRobert Richter { 473067510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 473167510ccaSRobert Richter 473267510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 473367510ccaSRobert Richter } 473467510ccaSRobert Richter 4735dba0bc7bSDerek Basehore static int its_save_disable(void) 4736dba0bc7bSDerek Basehore { 4737dba0bc7bSDerek Basehore struct its_node *its; 4738dba0bc7bSDerek Basehore int err = 0; 4739dba0bc7bSDerek Basehore 4740a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4741dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4742dba0bc7bSDerek Basehore void __iomem *base; 4743dba0bc7bSDerek Basehore 4744dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 4745dba0bc7bSDerek Basehore continue; 4746dba0bc7bSDerek Basehore 4747dba0bc7bSDerek Basehore base = its->base; 4748dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 4749dba0bc7bSDerek Basehore err = its_force_quiescent(base); 4750dba0bc7bSDerek Basehore if (err) { 4751dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 4752dba0bc7bSDerek Basehore &its->phys_base, err); 4753dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4754dba0bc7bSDerek Basehore goto err; 4755dba0bc7bSDerek Basehore } 4756dba0bc7bSDerek Basehore 4757dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 4758dba0bc7bSDerek Basehore } 4759dba0bc7bSDerek Basehore 4760dba0bc7bSDerek Basehore err: 4761dba0bc7bSDerek Basehore if (err) { 4762dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 4763dba0bc7bSDerek Basehore void __iomem *base; 4764dba0bc7bSDerek Basehore 4765dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 4766dba0bc7bSDerek Basehore continue; 4767dba0bc7bSDerek Basehore 4768dba0bc7bSDerek Basehore base = its->base; 4769dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4770dba0bc7bSDerek Basehore } 4771dba0bc7bSDerek Basehore } 4772a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4773dba0bc7bSDerek Basehore 4774dba0bc7bSDerek Basehore return err; 4775dba0bc7bSDerek Basehore } 4776dba0bc7bSDerek Basehore 4777dba0bc7bSDerek Basehore static void its_restore_enable(void) 4778dba0bc7bSDerek Basehore { 4779dba0bc7bSDerek Basehore struct its_node *its; 4780dba0bc7bSDerek Basehore int ret; 4781dba0bc7bSDerek Basehore 4782a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4783dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4784dba0bc7bSDerek Basehore void __iomem *base; 4785dba0bc7bSDerek Basehore int i; 4786dba0bc7bSDerek Basehore 4787dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 4788dba0bc7bSDerek Basehore continue; 4789dba0bc7bSDerek Basehore 4790dba0bc7bSDerek Basehore base = its->base; 4791dba0bc7bSDerek Basehore 4792dba0bc7bSDerek Basehore /* 4793dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 4794dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 4795dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 4796dba0bc7bSDerek Basehore * Specification. 4797dba0bc7bSDerek Basehore */ 4798dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 4799dba0bc7bSDerek Basehore if (ret) { 4800dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 4801dba0bc7bSDerek Basehore &its->phys_base, ret); 4802dba0bc7bSDerek Basehore continue; 4803dba0bc7bSDerek Basehore } 4804dba0bc7bSDerek Basehore 4805dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 4806dba0bc7bSDerek Basehore 4807dba0bc7bSDerek Basehore /* 4808dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 4809dba0bc7bSDerek Basehore * cmd_write line up with it. 4810dba0bc7bSDerek Basehore */ 4811dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 4812dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 4813dba0bc7bSDerek Basehore 4814dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 4815dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 4816dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 4817dba0bc7bSDerek Basehore 4818dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 4819dba0bc7bSDerek Basehore continue; 4820dba0bc7bSDerek Basehore 4821dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 4822dba0bc7bSDerek Basehore } 4823dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4824920181ceSDerek Basehore 4825920181ceSDerek Basehore /* 4826920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 4827920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 4828920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 4829920181ceSDerek Basehore */ 4830920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 4831920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 4832920181ceSDerek Basehore its_cpu_init_collection(its); 4833dba0bc7bSDerek Basehore } 4834a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4835dba0bc7bSDerek Basehore } 4836dba0bc7bSDerek Basehore 4837dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 4838dba0bc7bSDerek Basehore .suspend = its_save_disable, 4839dba0bc7bSDerek Basehore .resume = its_restore_enable, 4840dba0bc7bSDerek Basehore }; 4841dba0bc7bSDerek Basehore 4842db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 4843d14ae5e6STomasz Nowicki { 4844d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 4845d14ae5e6STomasz Nowicki struct msi_domain_info *info; 4846d14ae5e6STomasz Nowicki 4847d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 4848d14ae5e6STomasz Nowicki if (!info) 4849d14ae5e6STomasz Nowicki return -ENOMEM; 4850d14ae5e6STomasz Nowicki 4851db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 4852d14ae5e6STomasz Nowicki if (!inner_domain) { 4853d14ae5e6STomasz Nowicki kfree(info); 4854d14ae5e6STomasz Nowicki return -ENOMEM; 4855d14ae5e6STomasz Nowicki } 4856d14ae5e6STomasz Nowicki 4857db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 485896f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 4859558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 4860d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 4861d14ae5e6STomasz Nowicki info->data = its; 4862d14ae5e6STomasz Nowicki inner_domain->host_data = info; 4863d14ae5e6STomasz Nowicki 4864d14ae5e6STomasz Nowicki return 0; 4865d14ae5e6STomasz Nowicki } 4866d14ae5e6STomasz Nowicki 48678fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 48688fff27aeSMarc Zyngier { 486920b3d54eSMarc Zyngier struct its_node *its; 487020b3d54eSMarc Zyngier u32 devid; 487120b3d54eSMarc Zyngier int entries; 487220b3d54eSMarc Zyngier 487320b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 487420b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 487520b3d54eSMarc Zyngier return 0; 487620b3d54eSMarc Zyngier } 487720b3d54eSMarc Zyngier 487820b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 487920b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 488020b3d54eSMarc Zyngier 488120b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 48826396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 488320b3d54eSMarc Zyngier GFP_KERNEL); 488420b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 488520b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 488620b3d54eSMarc Zyngier return -ENOMEM; 488720b3d54eSMarc Zyngier } 488820b3d54eSMarc Zyngier 488920b3d54eSMarc Zyngier /* Use the last possible DevID */ 4890576a8342SMarc Zyngier devid = GENMASK(device_ids(its) - 1, 0); 489120b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 489220b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 489320b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 489420b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 489520b3d54eSMarc Zyngier return -ENOMEM; 489620b3d54eSMarc Zyngier } 489720b3d54eSMarc Zyngier 4898c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 489920b3d54eSMarc Zyngier 490020b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 490120b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 490220b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 490320b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 490420b3d54eSMarc Zyngier 49058fff27aeSMarc Zyngier return 0; 49068fff27aeSMarc Zyngier } 49078fff27aeSMarc Zyngier 49083dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 49093dfa576bSMarc Zyngier void __iomem *its_base) 49103dfa576bSMarc Zyngier { 49113dfa576bSMarc Zyngier int its_number; 49123dfa576bSMarc Zyngier u32 ctlr; 49133dfa576bSMarc Zyngier 49143dfa576bSMarc Zyngier /* 49153dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 49163dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 49173dfa576bSMarc Zyngier * locking. Should this change, we should address 49183dfa576bSMarc Zyngier * this. 49193dfa576bSMarc Zyngier */ 4920ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 4921ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 49223dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 49233dfa576bSMarc Zyngier &res->start); 49243dfa576bSMarc Zyngier return -EINVAL; 49253dfa576bSMarc Zyngier } 49263dfa576bSMarc Zyngier 49273dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 49283dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 49293dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 49303dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 49313dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 49323dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 49333dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 49343dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 49353dfa576bSMarc Zyngier } 49363dfa576bSMarc Zyngier 49373dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 49383dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 49393dfa576bSMarc Zyngier &res->start, its_number); 49403dfa576bSMarc Zyngier return -EINVAL; 49413dfa576bSMarc Zyngier } 49423dfa576bSMarc Zyngier 49433dfa576bSMarc Zyngier return its_number; 49443dfa576bSMarc Zyngier } 49453dfa576bSMarc Zyngier 4946db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 4947db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 49484c21f3c2SMarc Zyngier { 49494c21f3c2SMarc Zyngier struct its_node *its; 49504c21f3c2SMarc Zyngier void __iomem *its_base; 49513dfa576bSMarc Zyngier u32 val, ctlr; 49523dfa576bSMarc Zyngier u64 baser, tmp, typer; 4953539d3782SShanker Donthineni struct page *page; 49544c21f3c2SMarc Zyngier int err; 49554c21f3c2SMarc Zyngier 49565e46a484SMarc Zyngier its_base = ioremap(res->start, SZ_64K); 49574c21f3c2SMarc Zyngier if (!its_base) { 4958db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 49594c21f3c2SMarc Zyngier return -ENOMEM; 49604c21f3c2SMarc Zyngier } 49614c21f3c2SMarc Zyngier 49624c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 49634c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 4964db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 49654c21f3c2SMarc Zyngier err = -ENODEV; 49664c21f3c2SMarc Zyngier goto out_unmap; 49674c21f3c2SMarc Zyngier } 49684c21f3c2SMarc Zyngier 49694559fbb3SYun Wu err = its_force_quiescent(its_base); 49704559fbb3SYun Wu if (err) { 4971db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 49724559fbb3SYun Wu goto out_unmap; 49734559fbb3SYun Wu } 49744559fbb3SYun Wu 4975db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 49764c21f3c2SMarc Zyngier 49774c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 49784c21f3c2SMarc Zyngier if (!its) { 49794c21f3c2SMarc Zyngier err = -ENOMEM; 49804c21f3c2SMarc Zyngier goto out_unmap; 49814c21f3c2SMarc Zyngier } 49824c21f3c2SMarc Zyngier 49834c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 49849791ec7dSMarc Zyngier mutex_init(&its->dev_alloc_lock); 49854c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 49864c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 49873dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 49880dd57fedSMarc Zyngier its->typer = typer; 49894c21f3c2SMarc Zyngier its->base = its_base; 4990db40f0a7STomasz Nowicki its->phys_base = res->start; 49910dd57fedSMarc Zyngier if (is_v4(its)) { 49923dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 49933dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 49943dfa576bSMarc Zyngier if (err < 0) 49953dfa576bSMarc Zyngier goto out_free_its; 49963dfa576bSMarc Zyngier 4997debf6d02SMarc Zyngier its->list_nr = err; 4998debf6d02SMarc Zyngier 49993dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 50003dfa576bSMarc Zyngier &res->start, err); 50013dfa576bSMarc Zyngier } else { 50023dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 50033dfa576bSMarc Zyngier } 50045e516846SMarc Zyngier 50055e516846SMarc Zyngier if (is_v4_1(its)) { 50065e516846SMarc Zyngier u32 svpet = FIELD_GET(GITS_TYPER_SVPET, typer); 50075e46a484SMarc Zyngier 50085e46a484SMarc Zyngier its->sgir_base = ioremap(res->start + SZ_128K, SZ_64K); 50095e46a484SMarc Zyngier if (!its->sgir_base) { 50105e46a484SMarc Zyngier err = -ENOMEM; 50115e46a484SMarc Zyngier goto out_free_its; 50125e46a484SMarc Zyngier } 50135e46a484SMarc Zyngier 50145e516846SMarc Zyngier its->mpidr = readl_relaxed(its_base + GITS_MPIDR); 50155e516846SMarc Zyngier 50165e516846SMarc Zyngier pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n", 50175e516846SMarc Zyngier &res->start, its->mpidr, svpet); 50185e516846SMarc Zyngier } 50193dfa576bSMarc Zyngier } 50203dfa576bSMarc Zyngier 5021db40f0a7STomasz Nowicki its->numa_node = numa_node; 50224c21f3c2SMarc Zyngier 5023539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 50245bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 5025539d3782SShanker Donthineni if (!page) { 50264c21f3c2SMarc Zyngier err = -ENOMEM; 50275e46a484SMarc Zyngier goto out_unmap_sgir; 50284c21f3c2SMarc Zyngier } 5029539d3782SShanker Donthineni its->cmd_base = (void *)page_address(page); 50304c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 5031558b0165SArd Biesheuvel its->fwnode_handle = handle; 5032558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 5033558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 50344c21f3c2SMarc Zyngier 503567510ccaSRobert Richter its_enable_quirks(its); 503667510ccaSRobert Richter 50370e0b0f69SShanker Donthineni err = its_alloc_tables(its); 50384c21f3c2SMarc Zyngier if (err) 50394c21f3c2SMarc Zyngier goto out_free_cmd; 50404c21f3c2SMarc Zyngier 50414c21f3c2SMarc Zyngier err = its_alloc_collections(its); 50424c21f3c2SMarc Zyngier if (err) 50434c21f3c2SMarc Zyngier goto out_free_tables; 50444c21f3c2SMarc Zyngier 50454c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 50462fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 50474c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 50484c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 50494c21f3c2SMarc Zyngier GITS_CBASER_VALID); 50504c21f3c2SMarc Zyngier 50510968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 50520968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 50534c21f3c2SMarc Zyngier 50544ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 5055241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 5056241a386cSMarc Zyngier /* 5057241a386cSMarc Zyngier * The HW reports non-shareable, we must 5058241a386cSMarc Zyngier * remove the cacheability attributes as 5059241a386cSMarc Zyngier * well. 5060241a386cSMarc Zyngier */ 5061241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 5062241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 5063241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 50640968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 5065241a386cSMarc Zyngier } 50664c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 50674c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 50684c21f3c2SMarc Zyngier } 50694c21f3c2SMarc Zyngier 50700968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 50713dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 5072d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 50730dd57fedSMarc Zyngier if (is_v4(its)) 5074d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 5075d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 5076241a386cSMarc Zyngier 5077dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 5078dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 5079dba0bc7bSDerek Basehore 5080db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 5081d14ae5e6STomasz Nowicki if (err) 508254456db9SMarc Zyngier goto out_free_tables; 50834c21f3c2SMarc Zyngier 5084a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 50854c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 5086a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 50874c21f3c2SMarc Zyngier 50884c21f3c2SMarc Zyngier return 0; 50894c21f3c2SMarc Zyngier 50904c21f3c2SMarc Zyngier out_free_tables: 50914c21f3c2SMarc Zyngier its_free_tables(its); 50924c21f3c2SMarc Zyngier out_free_cmd: 50935bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 50945e46a484SMarc Zyngier out_unmap_sgir: 50955e46a484SMarc Zyngier if (its->sgir_base) 50965e46a484SMarc Zyngier iounmap(its->sgir_base); 50974c21f3c2SMarc Zyngier out_free_its: 50984c21f3c2SMarc Zyngier kfree(its); 50994c21f3c2SMarc Zyngier out_unmap: 51004c21f3c2SMarc Zyngier iounmap(its_base); 5101db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 51024c21f3c2SMarc Zyngier return err; 51034c21f3c2SMarc Zyngier } 51044c21f3c2SMarc Zyngier 51054c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 51064c21f3c2SMarc Zyngier { 5107589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 51084c21f3c2SMarc Zyngier } 51094c21f3c2SMarc Zyngier 51106eb486b6SShanker Donthineni static int redist_disable_lpis(void) 51114c21f3c2SMarc Zyngier { 51126eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 51136eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 51146eb486b6SShanker Donthineni u64 val; 51156eb486b6SShanker Donthineni 51164c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 51174c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 51184c21f3c2SMarc Zyngier return -ENXIO; 51194c21f3c2SMarc Zyngier } 51206eb486b6SShanker Donthineni 51216eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 51226eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 51236eb486b6SShanker Donthineni return 0; 51246eb486b6SShanker Donthineni 512511e37d35SMarc Zyngier /* 512611e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 512711e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 512811e37d35SMarc Zyngier * configured and all is well in the world. 5129c440a9d9SMarc Zyngier * 5130c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 513111e37d35SMarc Zyngier */ 5132c440a9d9SMarc Zyngier if (gic_data_rdist()->lpi_enabled || 5133c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 513411e37d35SMarc Zyngier return 0; 513511e37d35SMarc Zyngier 513611e37d35SMarc Zyngier /* 513711e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 513811e37d35SMarc Zyngier */ 513911e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 51406eb486b6SShanker Donthineni smp_processor_id()); 51416eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 51426eb486b6SShanker Donthineni 51436eb486b6SShanker Donthineni /* Disable LPIs */ 51446eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 51456eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 51466eb486b6SShanker Donthineni 51476eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 51486eb486b6SShanker Donthineni dsb(sy); 51496eb486b6SShanker Donthineni 51506eb486b6SShanker Donthineni /* 51516eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 51526eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 51536eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 51546eb486b6SShanker Donthineni */ 51556eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 51566eb486b6SShanker Donthineni if (!timeout) { 51576eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 51586eb486b6SShanker Donthineni smp_processor_id()); 51596eb486b6SShanker Donthineni return -ETIMEDOUT; 51606eb486b6SShanker Donthineni } 51616eb486b6SShanker Donthineni udelay(1); 51626eb486b6SShanker Donthineni timeout--; 51636eb486b6SShanker Donthineni } 51646eb486b6SShanker Donthineni 51656eb486b6SShanker Donthineni /* 51666eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 51676eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 51686eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 51696eb486b6SShanker Donthineni */ 51706eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 51716eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 51726eb486b6SShanker Donthineni return -EBUSY; 51736eb486b6SShanker Donthineni } 51746eb486b6SShanker Donthineni 51756eb486b6SShanker Donthineni return 0; 51766eb486b6SShanker Donthineni } 51776eb486b6SShanker Donthineni 51786eb486b6SShanker Donthineni int its_cpu_init(void) 51796eb486b6SShanker Donthineni { 51806eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 51816eb486b6SShanker Donthineni int ret; 51826eb486b6SShanker Donthineni 51836eb486b6SShanker Donthineni ret = redist_disable_lpis(); 51846eb486b6SShanker Donthineni if (ret) 51856eb486b6SShanker Donthineni return ret; 51866eb486b6SShanker Donthineni 51874c21f3c2SMarc Zyngier its_cpu_init_lpis(); 5188920181ceSDerek Basehore its_cpu_init_collections(); 51894c21f3c2SMarc Zyngier } 51904c21f3c2SMarc Zyngier 51914c21f3c2SMarc Zyngier return 0; 51924c21f3c2SMarc Zyngier } 51934c21f3c2SMarc Zyngier 5194935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 51954c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 51964c21f3c2SMarc Zyngier {}, 51974c21f3c2SMarc Zyngier }; 51984c21f3c2SMarc Zyngier 5199db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 52004c21f3c2SMarc Zyngier { 52014c21f3c2SMarc Zyngier struct device_node *np; 5202db40f0a7STomasz Nowicki struct resource res; 52034c21f3c2SMarc Zyngier 52044c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 52054c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 520695a25625SStephen Boyd if (!of_device_is_available(np)) 520795a25625SStephen Boyd continue; 5208d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 5209e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 5210e81f54c6SRob Herring np); 5211d14ae5e6STomasz Nowicki continue; 5212d14ae5e6STomasz Nowicki } 5213d14ae5e6STomasz Nowicki 5214db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 5215e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 5216db40f0a7STomasz Nowicki continue; 52174c21f3c2SMarc Zyngier } 52184c21f3c2SMarc Zyngier 5219db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 5220db40f0a7STomasz Nowicki } 5221db40f0a7STomasz Nowicki return 0; 5222db40f0a7STomasz Nowicki } 5223db40f0a7STomasz Nowicki 52243f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 52253f010cf1STomasz Nowicki 52263f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 52273f010cf1STomasz Nowicki 5228d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 5229dbd2b826SGanapatrao Kulkarni struct its_srat_map { 5230dbd2b826SGanapatrao Kulkarni /* numa node id */ 5231dbd2b826SGanapatrao Kulkarni u32 numa_node; 5232dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 5233dbd2b826SGanapatrao Kulkarni u32 its_id; 5234dbd2b826SGanapatrao Kulkarni }; 5235dbd2b826SGanapatrao Kulkarni 5236fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 5237dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 5238dbd2b826SGanapatrao Kulkarni 5239dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 5240dbd2b826SGanapatrao Kulkarni { 5241dbd2b826SGanapatrao Kulkarni int i; 5242dbd2b826SGanapatrao Kulkarni 5243dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 5244dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 5245dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 5246dbd2b826SGanapatrao Kulkarni } 5247dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 5248dbd2b826SGanapatrao Kulkarni } 5249dbd2b826SGanapatrao Kulkarni 525060574d1eSKeith Busch static int __init gic_acpi_match_srat_its(union acpi_subtable_headers *header, 5251fdf6e7a8SHanjun Guo const unsigned long end) 5252fdf6e7a8SHanjun Guo { 5253fdf6e7a8SHanjun Guo return 0; 5254fdf6e7a8SHanjun Guo } 5255fdf6e7a8SHanjun Guo 525660574d1eSKeith Busch static int __init gic_acpi_parse_srat_its(union acpi_subtable_headers *header, 5257dbd2b826SGanapatrao Kulkarni const unsigned long end) 5258dbd2b826SGanapatrao Kulkarni { 5259dbd2b826SGanapatrao Kulkarni int node; 5260dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 5261dbd2b826SGanapatrao Kulkarni 5262dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 5263dbd2b826SGanapatrao Kulkarni if (!its_affinity) 5264dbd2b826SGanapatrao Kulkarni return -EINVAL; 5265dbd2b826SGanapatrao Kulkarni 5266dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 5267dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 5268dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 5269dbd2b826SGanapatrao Kulkarni return -EINVAL; 5270dbd2b826SGanapatrao Kulkarni } 5271dbd2b826SGanapatrao Kulkarni 5272dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 5273dbd2b826SGanapatrao Kulkarni 5274dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 5275dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 5276dbd2b826SGanapatrao Kulkarni return 0; 5277dbd2b826SGanapatrao Kulkarni } 5278dbd2b826SGanapatrao Kulkarni 5279dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 5280dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 5281dbd2b826SGanapatrao Kulkarni its_in_srat++; 5282dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 5283dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 5284dbd2b826SGanapatrao Kulkarni 5285dbd2b826SGanapatrao Kulkarni return 0; 5286dbd2b826SGanapatrao Kulkarni } 5287dbd2b826SGanapatrao Kulkarni 5288dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 5289dbd2b826SGanapatrao Kulkarni { 5290fdf6e7a8SHanjun Guo int count; 5291fdf6e7a8SHanjun Guo 5292fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 5293fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 5294fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 5295fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 5296fdf6e7a8SHanjun Guo if (count <= 0) 5297fdf6e7a8SHanjun Guo return; 5298fdf6e7a8SHanjun Guo 52996da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 5300fdf6e7a8SHanjun Guo GFP_KERNEL); 5301fdf6e7a8SHanjun Guo if (!its_srat_maps) { 5302fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 5303fdf6e7a8SHanjun Guo return; 5304fdf6e7a8SHanjun Guo } 5305fdf6e7a8SHanjun Guo 5306dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 5307dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 5308dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 5309dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 5310dbd2b826SGanapatrao Kulkarni } 5311fdf6e7a8SHanjun Guo 5312fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 5313fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 5314fdf6e7a8SHanjun Guo { 5315fdf6e7a8SHanjun Guo kfree(its_srat_maps); 5316fdf6e7a8SHanjun Guo } 5317dbd2b826SGanapatrao Kulkarni #else 5318dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 5319dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 5320fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 5321dbd2b826SGanapatrao Kulkarni #endif 5322dbd2b826SGanapatrao Kulkarni 532360574d1eSKeith Busch static int __init gic_acpi_parse_madt_its(union acpi_subtable_headers *header, 53243f010cf1STomasz Nowicki const unsigned long end) 53253f010cf1STomasz Nowicki { 53263f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 53273f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 53283f010cf1STomasz Nowicki struct resource res; 53293f010cf1STomasz Nowicki int err; 53303f010cf1STomasz Nowicki 53313f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 53323f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 53333f010cf1STomasz Nowicki res.start = its_entry->base_address; 53343f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 53353f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 53363f010cf1STomasz Nowicki 53375778cc77SMarc Zyngier dom_handle = irq_domain_alloc_fwnode(&res.start); 53383f010cf1STomasz Nowicki if (!dom_handle) { 53393f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 53403f010cf1STomasz Nowicki &res.start); 53413f010cf1STomasz Nowicki return -ENOMEM; 53423f010cf1STomasz Nowicki } 53433f010cf1STomasz Nowicki 53448b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 53458b4282e6SShameer Kolothum dom_handle); 53463f010cf1STomasz Nowicki if (err) { 53473f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 53483f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 53493f010cf1STomasz Nowicki goto dom_err; 53503f010cf1STomasz Nowicki } 53513f010cf1STomasz Nowicki 5352dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 5353dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 53543f010cf1STomasz Nowicki if (!err) 53553f010cf1STomasz Nowicki return 0; 53563f010cf1STomasz Nowicki 53573f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 53583f010cf1STomasz Nowicki dom_err: 53593f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 53603f010cf1STomasz Nowicki return err; 53613f010cf1STomasz Nowicki } 53623f010cf1STomasz Nowicki 53633f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 53643f010cf1STomasz Nowicki { 5365dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 53663f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 53673f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 5368fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 53693f010cf1STomasz Nowicki } 53703f010cf1STomasz Nowicki #else 53713f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 53723f010cf1STomasz Nowicki #endif 53733f010cf1STomasz Nowicki 5374db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 5375db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 5376db40f0a7STomasz Nowicki { 5377db40f0a7STomasz Nowicki struct device_node *of_node; 53788fff27aeSMarc Zyngier struct its_node *its; 53798fff27aeSMarc Zyngier bool has_v4 = false; 53803c40706dSMarc Zyngier bool has_v4_1 = false; 53818fff27aeSMarc Zyngier int err; 5382db40f0a7STomasz Nowicki 53835e516846SMarc Zyngier gic_rdists = rdists; 53845e516846SMarc Zyngier 5385db40f0a7STomasz Nowicki its_parent = parent_domain; 5386db40f0a7STomasz Nowicki of_node = to_of_node(handle); 5387db40f0a7STomasz Nowicki if (of_node) 5388db40f0a7STomasz Nowicki its_of_probe(of_node); 5389db40f0a7STomasz Nowicki else 53903f010cf1STomasz Nowicki its_acpi_probe(); 5391db40f0a7STomasz Nowicki 53924c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 53934c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 53944c21f3c2SMarc Zyngier return -ENXIO; 53954c21f3c2SMarc Zyngier } 53964c21f3c2SMarc Zyngier 539711e37d35SMarc Zyngier err = allocate_lpi_tables(); 53988fff27aeSMarc Zyngier if (err) 53998fff27aeSMarc Zyngier return err; 54008fff27aeSMarc Zyngier 54013c40706dSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 54020dd57fedSMarc Zyngier has_v4 |= is_v4(its); 54033c40706dSMarc Zyngier has_v4_1 |= is_v4_1(its); 54043c40706dSMarc Zyngier } 54053c40706dSMarc Zyngier 54063c40706dSMarc Zyngier /* Don't bother with inconsistent systems */ 54073c40706dSMarc Zyngier if (WARN_ON(!has_v4_1 && rdists->has_rvpeid)) 54083c40706dSMarc Zyngier rdists->has_rvpeid = false; 54098fff27aeSMarc Zyngier 54108fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 5411166cba71SMarc Zyngier const struct irq_domain_ops *sgi_ops; 5412166cba71SMarc Zyngier 5413166cba71SMarc Zyngier if (has_v4_1) 5414166cba71SMarc Zyngier sgi_ops = &its_sgi_domain_ops; 5415166cba71SMarc Zyngier else 5416166cba71SMarc Zyngier sgi_ops = NULL; 5417166cba71SMarc Zyngier 54183d63cb53SMarc Zyngier if (its_init_vpe_domain() || 5419166cba71SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops, sgi_ops)) { 54208fff27aeSMarc Zyngier rdists->has_vlpis = false; 54218fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 54228fff27aeSMarc Zyngier } 54238fff27aeSMarc Zyngier } 54248fff27aeSMarc Zyngier 5425dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 5426dba0bc7bSDerek Basehore 54278fff27aeSMarc Zyngier return 0; 54284c21f3c2SMarc Zyngier } 5429