1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2cc2d3216SMarc Zyngier /* 3d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 4cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 5cc2d3216SMarc Zyngier */ 6cc2d3216SMarc Zyngier 73f010cf1STomasz Nowicki #include <linux/acpi.h> 88d3554b8SHanjun Guo #include <linux/acpi_iort.h> 9ffedbf0cSMarc Zyngier #include <linux/bitfield.h> 10cc2d3216SMarc Zyngier #include <linux/bitmap.h> 11cc2d3216SMarc Zyngier #include <linux/cpu.h> 12c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 13cc2d3216SMarc Zyngier #include <linux/delay.h> 1444bb7e24SRobin Murphy #include <linux/dma-iommu.h> 153fb68faeSMarc Zyngier #include <linux/efi.h> 16cc2d3216SMarc Zyngier #include <linux/interrupt.h> 1796806229SMarc Zyngier #include <linux/iopoll.h> 183f010cf1STomasz Nowicki #include <linux/irqdomain.h> 19880cb3cdSMarc Zyngier #include <linux/list.h> 20cc2d3216SMarc Zyngier #include <linux/log2.h> 215e2c9f9aSMarc Zyngier #include <linux/memblock.h> 22cc2d3216SMarc Zyngier #include <linux/mm.h> 23cc2d3216SMarc Zyngier #include <linux/msi.h> 24cc2d3216SMarc Zyngier #include <linux/of.h> 25cc2d3216SMarc Zyngier #include <linux/of_address.h> 26cc2d3216SMarc Zyngier #include <linux/of_irq.h> 27cc2d3216SMarc Zyngier #include <linux/of_pci.h> 28cc2d3216SMarc Zyngier #include <linux/of_platform.h> 29cc2d3216SMarc Zyngier #include <linux/percpu.h> 30cc2d3216SMarc Zyngier #include <linux/slab.h> 31dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 32cc2d3216SMarc Zyngier 3341a83e06SJoel Porquet #include <linux/irqchip.h> 34cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 35c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 36cc2d3216SMarc Zyngier 37cc2d3216SMarc Zyngier #include <asm/cputype.h> 38cc2d3216SMarc Zyngier #include <asm/exception.h> 39cc2d3216SMarc Zyngier 4067510ccaSRobert Richter #include "irq-gic-common.h" 4167510ccaSRobert Richter 4294100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4394100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 44fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 45dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 46cc2d3216SMarc Zyngier 47c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 48c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 49c48ed51cSMarc Zyngier 50a13b0404SMarc Zyngier static u32 lpi_id_bits; 51a13b0404SMarc Zyngier 52a13b0404SMarc Zyngier /* 53a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 54a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 55a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 56a13b0404SMarc Zyngier */ 57a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 58a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 59a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 60a13b0404SMarc Zyngier 612130b789SJulien Thierry #define LPI_PROP_DEFAULT_PRIO GICD_INT_DEF_PRI 62a13b0404SMarc Zyngier 63cc2d3216SMarc Zyngier /* 64cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 65cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 66cc2d3216SMarc Zyngier * CPU. 67cc2d3216SMarc Zyngier */ 68cc2d3216SMarc Zyngier struct its_collection { 69cc2d3216SMarc Zyngier u64 target_address; 70cc2d3216SMarc Zyngier u16 col_id; 71cc2d3216SMarc Zyngier }; 72cc2d3216SMarc Zyngier 73cc2d3216SMarc Zyngier /* 749347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 759347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 76466b7d16SShanker Donthineni */ 77466b7d16SShanker Donthineni struct its_baser { 78466b7d16SShanker Donthineni void *base; 79466b7d16SShanker Donthineni u64 val; 80466b7d16SShanker Donthineni u32 order; 819347359aSShanker Donthineni u32 psz; 82466b7d16SShanker Donthineni }; 83466b7d16SShanker Donthineni 84558b0165SArd Biesheuvel struct its_device; 85558b0165SArd Biesheuvel 86466b7d16SShanker Donthineni /* 87cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 88841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 89841514abSMarc Zyngier * list of devices writing to it. 909791ec7dSMarc Zyngier * 919791ec7dSMarc Zyngier * dev_alloc_lock has to be taken for device allocations, while the 929791ec7dSMarc Zyngier * spinlock must be taken to parse data structures such as the device 939791ec7dSMarc Zyngier * list. 94cc2d3216SMarc Zyngier */ 95cc2d3216SMarc Zyngier struct its_node { 96cc2d3216SMarc Zyngier raw_spinlock_t lock; 979791ec7dSMarc Zyngier struct mutex dev_alloc_lock; 98cc2d3216SMarc Zyngier struct list_head entry; 99cc2d3216SMarc Zyngier void __iomem *base; 1005e46a484SMarc Zyngier void __iomem *sgir_base; 101db40f0a7STomasz Nowicki phys_addr_t phys_base; 102cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 103cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 104466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 105cc2d3216SMarc Zyngier struct its_collection *collections; 106558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 107558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 1080dd57fedSMarc Zyngier u64 typer; 109dba0bc7bSDerek Basehore u64 cbaser_save; 110dba0bc7bSDerek Basehore u32 ctlr_save; 1115e516846SMarc Zyngier u32 mpidr; 112cc2d3216SMarc Zyngier struct list_head its_device_list; 113cc2d3216SMarc Zyngier u64 flags; 114debf6d02SMarc Zyngier unsigned long list_nr; 115fbf8f40eSGanapatrao Kulkarni int numa_node; 116558b0165SArd Biesheuvel unsigned int msi_domain_flags; 117558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1185c9a882eSMarc Zyngier int vlpi_redist_offset; 119cc2d3216SMarc Zyngier }; 120cc2d3216SMarc Zyngier 1210dd57fedSMarc Zyngier #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) 1225e516846SMarc Zyngier #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) 123576a8342SMarc Zyngier #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) 1240dd57fedSMarc Zyngier 125cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 126cc2d3216SMarc Zyngier 12732bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 128f2d83409SMarc Zyngier #define ITS_MAX_VPEID_BITS \ 129f2d83409SMarc Zyngier ({ \ 130f2d83409SMarc Zyngier int nvpeid = 16; \ 131f2d83409SMarc Zyngier if (gic_rdists->has_rvpeid && \ 132f2d83409SMarc Zyngier gic_rdists->gicd_typer2 & GICD_TYPER2_VIL) \ 133f2d83409SMarc Zyngier nvpeid = 1 + (gic_rdists->gicd_typer2 & \ 134f2d83409SMarc Zyngier GICD_TYPER2_VID); \ 135f2d83409SMarc Zyngier \ 136f2d83409SMarc Zyngier nvpeid; \ 137f2d83409SMarc Zyngier }) 13832bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 13932bd44dcSShanker Donthineni 1402eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1412eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1422eca0d6cSShanker Donthineni 143591e5becSMarc Zyngier struct event_lpi_map { 144591e5becSMarc Zyngier unsigned long *lpi_map; 145591e5becSMarc Zyngier u16 *col_map; 146591e5becSMarc Zyngier irq_hw_number_t lpi_base; 147591e5becSMarc Zyngier int nr_lpis; 14811635fa2SMarc Zyngier raw_spinlock_t vlpi_lock; 149d011e4e6SMarc Zyngier struct its_vm *vm; 150d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 151d011e4e6SMarc Zyngier int nr_vlpis; 152591e5becSMarc Zyngier }; 153591e5becSMarc Zyngier 154cc2d3216SMarc Zyngier /* 155d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 156d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 157d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 158d011e4e6SMarc Zyngier * indicates which one. 159cc2d3216SMarc Zyngier */ 160cc2d3216SMarc Zyngier struct its_device { 161cc2d3216SMarc Zyngier struct list_head entry; 162cc2d3216SMarc Zyngier struct its_node *its; 163591e5becSMarc Zyngier struct event_lpi_map event_map; 164cc2d3216SMarc Zyngier void *itt; 165cc2d3216SMarc Zyngier u32 nr_ites; 166cc2d3216SMarc Zyngier u32 device_id; 1679791ec7dSMarc Zyngier bool shared; 168cc2d3216SMarc Zyngier }; 169cc2d3216SMarc Zyngier 17020b3d54eSMarc Zyngier static struct { 17120b3d54eSMarc Zyngier raw_spinlock_t lock; 17220b3d54eSMarc Zyngier struct its_device *dev; 17320b3d54eSMarc Zyngier struct its_vpe **vpes; 17420b3d54eSMarc Zyngier int next_victim; 17520b3d54eSMarc Zyngier } vpe_proxy; 17620b3d54eSMarc Zyngier 1771ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 178a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1791ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 180db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1811ac19ca6SMarc Zyngier 1823dfa576bSMarc Zyngier static unsigned long its_list_map; 1833171a47aSMarc Zyngier static u16 vmovp_seq_num; 1843171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1853171a47aSMarc Zyngier 1867d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1873dfa576bSMarc Zyngier 1881ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 18911e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1901ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 191e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1921ac19ca6SMarc Zyngier 193009384b3SMarc Zyngier /* 194009384b3SMarc Zyngier * Skip ITSs that have no vLPIs mapped, unless we're on GICv4.1, as we 195009384b3SMarc Zyngier * always have vSGIs mapped. 196009384b3SMarc Zyngier */ 197009384b3SMarc Zyngier static bool require_its_list_vmovp(struct its_vm *vm, struct its_node *its) 198009384b3SMarc Zyngier { 199009384b3SMarc Zyngier return (gic_rdists->has_rvpeid || vm->vlpi_count[its->list_nr]); 200009384b3SMarc Zyngier } 201009384b3SMarc Zyngier 20284243125SZenghui Yu static u16 get_its_list(struct its_vm *vm) 20384243125SZenghui Yu { 20484243125SZenghui Yu struct its_node *its; 20584243125SZenghui Yu unsigned long its_list = 0; 20684243125SZenghui Yu 20784243125SZenghui Yu list_for_each_entry(its, &its_nodes, entry) { 2080dd57fedSMarc Zyngier if (!is_v4(its)) 20984243125SZenghui Yu continue; 21084243125SZenghui Yu 211009384b3SMarc Zyngier if (require_its_list_vmovp(vm, its)) 21284243125SZenghui Yu __set_bit(its->list_nr, &its_list); 21384243125SZenghui Yu } 21484243125SZenghui Yu 21584243125SZenghui Yu return (u16)its_list; 21684243125SZenghui Yu } 21784243125SZenghui Yu 218425c09beSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 219425c09beSMarc Zyngier { 220425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 221425c09beSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 222425c09beSMarc Zyngier } 223425c09beSMarc Zyngier 224591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 225591e5becSMarc Zyngier u32 event) 226591e5becSMarc Zyngier { 227591e5becSMarc Zyngier struct its_node *its = its_dev->its; 228591e5becSMarc Zyngier 229591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 230591e5becSMarc Zyngier } 231591e5becSMarc Zyngier 232c1d4d5cdSMarc Zyngier static struct its_vlpi_map *dev_event_to_vlpi_map(struct its_device *its_dev, 233c1d4d5cdSMarc Zyngier u32 event) 234c1d4d5cdSMarc Zyngier { 235c1d4d5cdSMarc Zyngier if (WARN_ON_ONCE(event >= its_dev->event_map.nr_lpis)) 236c1d4d5cdSMarc Zyngier return NULL; 237c1d4d5cdSMarc Zyngier 238c1d4d5cdSMarc Zyngier return &its_dev->event_map.vlpi_maps[event]; 239c1d4d5cdSMarc Zyngier } 240c1d4d5cdSMarc Zyngier 241f4a81f5aSMarc Zyngier static struct its_vlpi_map *get_vlpi_map(struct irq_data *d) 242f4a81f5aSMarc Zyngier { 243f4a81f5aSMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 244f4a81f5aSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 245f4a81f5aSMarc Zyngier u32 event = its_get_event_id(d); 246f4a81f5aSMarc Zyngier 247f4a81f5aSMarc Zyngier return dev_event_to_vlpi_map(its_dev, event); 248f4a81f5aSMarc Zyngier } 249f4a81f5aSMarc Zyngier 250f4a81f5aSMarc Zyngier return NULL; 251f4a81f5aSMarc Zyngier } 252f4a81f5aSMarc Zyngier 253f3a05921SMarc Zyngier static int vpe_to_cpuid_lock(struct its_vpe *vpe, unsigned long *flags) 254425c09beSMarc Zyngier { 255f3a05921SMarc Zyngier raw_spin_lock_irqsave(&vpe->vpe_lock, *flags); 256f3a05921SMarc Zyngier return vpe->col_idx; 257f3a05921SMarc Zyngier } 258f3a05921SMarc Zyngier 259f3a05921SMarc Zyngier static void vpe_to_cpuid_unlock(struct its_vpe *vpe, unsigned long flags) 260f3a05921SMarc Zyngier { 261f3a05921SMarc Zyngier raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); 262f3a05921SMarc Zyngier } 263f3a05921SMarc Zyngier 264f3a05921SMarc Zyngier static int irq_to_cpuid_lock(struct irq_data *d, unsigned long *flags) 265f3a05921SMarc Zyngier { 266f3a05921SMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 267f3a05921SMarc Zyngier int cpu; 268f3a05921SMarc Zyngier 269f3a05921SMarc Zyngier if (map) { 270f3a05921SMarc Zyngier cpu = vpe_to_cpuid_lock(map->vpe, flags); 271f3a05921SMarc Zyngier } else { 272f3a05921SMarc Zyngier /* Physical LPIs are already locked via the irq_desc lock */ 273425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 274f3a05921SMarc Zyngier cpu = its_dev->event_map.col_map[its_get_event_id(d)]; 275f3a05921SMarc Zyngier /* Keep GCC quiet... */ 276f3a05921SMarc Zyngier *flags = 0; 277f3a05921SMarc Zyngier } 278f3a05921SMarc Zyngier 279f3a05921SMarc Zyngier return cpu; 280f3a05921SMarc Zyngier } 281f3a05921SMarc Zyngier 282f3a05921SMarc Zyngier static void irq_to_cpuid_unlock(struct irq_data *d, unsigned long flags) 283f3a05921SMarc Zyngier { 284f4a81f5aSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 285425c09beSMarc Zyngier 286f4a81f5aSMarc Zyngier if (map) 287f3a05921SMarc Zyngier vpe_to_cpuid_unlock(map->vpe, flags); 288425c09beSMarc Zyngier } 289425c09beSMarc Zyngier 29083559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 29183559b47SMarc Zyngier { 29220faba84SJoe Perches if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(15, 0))) 29383559b47SMarc Zyngier return NULL; 29483559b47SMarc Zyngier 29583559b47SMarc Zyngier return col; 29683559b47SMarc Zyngier } 29783559b47SMarc Zyngier 298205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 299205e065dSMarc Zyngier { 300205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 301205e065dSMarc Zyngier return vpe; 302205e065dSMarc Zyngier 303205e065dSMarc Zyngier return NULL; 304205e065dSMarc Zyngier } 305205e065dSMarc Zyngier 306cc2d3216SMarc Zyngier /* 307cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 308cc2d3216SMarc Zyngier * block. 309cc2d3216SMarc Zyngier */ 310cc2d3216SMarc Zyngier struct its_cmd_desc { 311cc2d3216SMarc Zyngier union { 312cc2d3216SMarc Zyngier struct { 313cc2d3216SMarc Zyngier struct its_device *dev; 314cc2d3216SMarc Zyngier u32 event_id; 315cc2d3216SMarc Zyngier } its_inv_cmd; 316cc2d3216SMarc Zyngier 317cc2d3216SMarc Zyngier struct { 318cc2d3216SMarc Zyngier struct its_device *dev; 319cc2d3216SMarc Zyngier u32 event_id; 3208d85dcedSMarc Zyngier } its_clear_cmd; 3218d85dcedSMarc Zyngier 3228d85dcedSMarc Zyngier struct { 3238d85dcedSMarc Zyngier struct its_device *dev; 3248d85dcedSMarc Zyngier u32 event_id; 325cc2d3216SMarc Zyngier } its_int_cmd; 326cc2d3216SMarc Zyngier 327cc2d3216SMarc Zyngier struct { 328cc2d3216SMarc Zyngier struct its_device *dev; 329cc2d3216SMarc Zyngier int valid; 330cc2d3216SMarc Zyngier } its_mapd_cmd; 331cc2d3216SMarc Zyngier 332cc2d3216SMarc Zyngier struct { 333cc2d3216SMarc Zyngier struct its_collection *col; 334cc2d3216SMarc Zyngier int valid; 335cc2d3216SMarc Zyngier } its_mapc_cmd; 336cc2d3216SMarc Zyngier 337cc2d3216SMarc Zyngier struct { 338cc2d3216SMarc Zyngier struct its_device *dev; 339cc2d3216SMarc Zyngier u32 phys_id; 340cc2d3216SMarc Zyngier u32 event_id; 3416a25ad3aSMarc Zyngier } its_mapti_cmd; 342cc2d3216SMarc Zyngier 343cc2d3216SMarc Zyngier struct { 344cc2d3216SMarc Zyngier struct its_device *dev; 345cc2d3216SMarc Zyngier struct its_collection *col; 346591e5becSMarc Zyngier u32 event_id; 347cc2d3216SMarc Zyngier } its_movi_cmd; 348cc2d3216SMarc Zyngier 349cc2d3216SMarc Zyngier struct { 350cc2d3216SMarc Zyngier struct its_device *dev; 351cc2d3216SMarc Zyngier u32 event_id; 352cc2d3216SMarc Zyngier } its_discard_cmd; 353cc2d3216SMarc Zyngier 354cc2d3216SMarc Zyngier struct { 355cc2d3216SMarc Zyngier struct its_collection *col; 356cc2d3216SMarc Zyngier } its_invall_cmd; 357d011e4e6SMarc Zyngier 358d011e4e6SMarc Zyngier struct { 359d011e4e6SMarc Zyngier struct its_vpe *vpe; 360eb78192bSMarc Zyngier } its_vinvall_cmd; 361eb78192bSMarc Zyngier 362eb78192bSMarc Zyngier struct { 363eb78192bSMarc Zyngier struct its_vpe *vpe; 364eb78192bSMarc Zyngier struct its_collection *col; 365eb78192bSMarc Zyngier bool valid; 366eb78192bSMarc Zyngier } its_vmapp_cmd; 367eb78192bSMarc Zyngier 368eb78192bSMarc Zyngier struct { 369eb78192bSMarc Zyngier struct its_vpe *vpe; 370d011e4e6SMarc Zyngier struct its_device *dev; 371d011e4e6SMarc Zyngier u32 virt_id; 372d011e4e6SMarc Zyngier u32 event_id; 373d011e4e6SMarc Zyngier bool db_enabled; 374d011e4e6SMarc Zyngier } its_vmapti_cmd; 375d011e4e6SMarc Zyngier 376d011e4e6SMarc Zyngier struct { 377d011e4e6SMarc Zyngier struct its_vpe *vpe; 378d011e4e6SMarc Zyngier struct its_device *dev; 379d011e4e6SMarc Zyngier u32 event_id; 380d011e4e6SMarc Zyngier bool db_enabled; 381d011e4e6SMarc Zyngier } its_vmovi_cmd; 3823171a47aSMarc Zyngier 3833171a47aSMarc Zyngier struct { 3843171a47aSMarc Zyngier struct its_vpe *vpe; 3853171a47aSMarc Zyngier struct its_collection *col; 3863171a47aSMarc Zyngier u16 seq_num; 3873171a47aSMarc Zyngier u16 its_list; 3883171a47aSMarc Zyngier } its_vmovp_cmd; 389d97c97baSMarc Zyngier 390d97c97baSMarc Zyngier struct { 391d97c97baSMarc Zyngier struct its_vpe *vpe; 392d97c97baSMarc Zyngier } its_invdb_cmd; 393e252cf8aSMarc Zyngier 394e252cf8aSMarc Zyngier struct { 395e252cf8aSMarc Zyngier struct its_vpe *vpe; 396e252cf8aSMarc Zyngier u8 sgi; 397e252cf8aSMarc Zyngier u8 priority; 398e252cf8aSMarc Zyngier bool enable; 399e252cf8aSMarc Zyngier bool group; 400e252cf8aSMarc Zyngier bool clear; 401e252cf8aSMarc Zyngier } its_vsgi_cmd; 402cc2d3216SMarc Zyngier }; 403cc2d3216SMarc Zyngier }; 404cc2d3216SMarc Zyngier 405cc2d3216SMarc Zyngier /* 406cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 407cc2d3216SMarc Zyngier */ 408cc2d3216SMarc Zyngier struct its_cmd_block { 4092bbdfcc5SBen Dooks (Codethink) union { 410cc2d3216SMarc Zyngier u64 raw_cmd[4]; 4112bbdfcc5SBen Dooks (Codethink) __le64 raw_cmd_le[4]; 4122bbdfcc5SBen Dooks (Codethink) }; 413cc2d3216SMarc Zyngier }; 414cc2d3216SMarc Zyngier 415cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 416cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 417cc2d3216SMarc Zyngier 41867047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 41967047f90SMarc Zyngier struct its_cmd_block *, 420cc2d3216SMarc Zyngier struct its_cmd_desc *); 421cc2d3216SMarc Zyngier 42267047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 42367047f90SMarc Zyngier struct its_cmd_block *, 424d011e4e6SMarc Zyngier struct its_cmd_desc *); 425d011e4e6SMarc Zyngier 4264d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 4274d36f136SMarc Zyngier { 4284d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 4294d36f136SMarc Zyngier *raw_cmd &= ~mask; 4304d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 4314d36f136SMarc Zyngier } 4324d36f136SMarc Zyngier 433cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 434cc2d3216SMarc Zyngier { 4354d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 436cc2d3216SMarc Zyngier } 437cc2d3216SMarc Zyngier 438cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 439cc2d3216SMarc Zyngier { 4404d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 441cc2d3216SMarc Zyngier } 442cc2d3216SMarc Zyngier 443cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 444cc2d3216SMarc Zyngier { 4454d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 446cc2d3216SMarc Zyngier } 447cc2d3216SMarc Zyngier 448cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 449cc2d3216SMarc Zyngier { 4504d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 451cc2d3216SMarc Zyngier } 452cc2d3216SMarc Zyngier 453cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 454cc2d3216SMarc Zyngier { 4554d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 456cc2d3216SMarc Zyngier } 457cc2d3216SMarc Zyngier 458cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 459cc2d3216SMarc Zyngier { 46030ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 461cc2d3216SMarc Zyngier } 462cc2d3216SMarc Zyngier 463cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 464cc2d3216SMarc Zyngier { 4654d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 466cc2d3216SMarc Zyngier } 467cc2d3216SMarc Zyngier 468cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 469cc2d3216SMarc Zyngier { 47030ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 471cc2d3216SMarc Zyngier } 472cc2d3216SMarc Zyngier 473cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 474cc2d3216SMarc Zyngier { 4754d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 476cc2d3216SMarc Zyngier } 477cc2d3216SMarc Zyngier 478d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 479d011e4e6SMarc Zyngier { 480d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 481d011e4e6SMarc Zyngier } 482d011e4e6SMarc Zyngier 483d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 484d011e4e6SMarc Zyngier { 485d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 486d011e4e6SMarc Zyngier } 487d011e4e6SMarc Zyngier 488d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 489d011e4e6SMarc Zyngier { 490d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 491d011e4e6SMarc Zyngier } 492d011e4e6SMarc Zyngier 493d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 494d011e4e6SMarc Zyngier { 495d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 496d011e4e6SMarc Zyngier } 497d011e4e6SMarc Zyngier 4983171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 4993171a47aSMarc Zyngier { 5003171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 5013171a47aSMarc Zyngier } 5023171a47aSMarc Zyngier 5033171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 5043171a47aSMarc Zyngier { 5053171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 5063171a47aSMarc Zyngier } 5073171a47aSMarc Zyngier 508eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 509eb78192bSMarc Zyngier { 51030ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 511eb78192bSMarc Zyngier } 512eb78192bSMarc Zyngier 513eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 514eb78192bSMarc Zyngier { 515eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 516eb78192bSMarc Zyngier } 517eb78192bSMarc Zyngier 51864edfaa9SMarc Zyngier static void its_encode_vconf_addr(struct its_cmd_block *cmd, u64 vconf_pa) 51964edfaa9SMarc Zyngier { 52064edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], vconf_pa >> 16, 51, 16); 52164edfaa9SMarc Zyngier } 52264edfaa9SMarc Zyngier 52364edfaa9SMarc Zyngier static void its_encode_alloc(struct its_cmd_block *cmd, bool alloc) 52464edfaa9SMarc Zyngier { 52564edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], alloc, 8, 8); 52664edfaa9SMarc Zyngier } 52764edfaa9SMarc Zyngier 52864edfaa9SMarc Zyngier static void its_encode_ptz(struct its_cmd_block *cmd, bool ptz) 52964edfaa9SMarc Zyngier { 53064edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], ptz, 9, 9); 53164edfaa9SMarc Zyngier } 53264edfaa9SMarc Zyngier 53364edfaa9SMarc Zyngier static void its_encode_vmapp_default_db(struct its_cmd_block *cmd, 53464edfaa9SMarc Zyngier u32 vpe_db_lpi) 53564edfaa9SMarc Zyngier { 53664edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpe_db_lpi, 31, 0); 53764edfaa9SMarc Zyngier } 53864edfaa9SMarc Zyngier 539dd3f050aSMarc Zyngier static void its_encode_vmovp_default_db(struct its_cmd_block *cmd, 540dd3f050aSMarc Zyngier u32 vpe_db_lpi) 541dd3f050aSMarc Zyngier { 542dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpe_db_lpi, 31, 0); 543dd3f050aSMarc Zyngier } 544dd3f050aSMarc Zyngier 545dd3f050aSMarc Zyngier static void its_encode_db(struct its_cmd_block *cmd, bool db) 546dd3f050aSMarc Zyngier { 547dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db, 63, 63); 548dd3f050aSMarc Zyngier } 549dd3f050aSMarc Zyngier 550e252cf8aSMarc Zyngier static void its_encode_sgi_intid(struct its_cmd_block *cmd, u8 sgi) 551e252cf8aSMarc Zyngier { 552e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], sgi, 35, 32); 553e252cf8aSMarc Zyngier } 554e252cf8aSMarc Zyngier 555e252cf8aSMarc Zyngier static void its_encode_sgi_priority(struct its_cmd_block *cmd, u8 prio) 556e252cf8aSMarc Zyngier { 557e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], prio >> 4, 23, 20); 558e252cf8aSMarc Zyngier } 559e252cf8aSMarc Zyngier 560e252cf8aSMarc Zyngier static void its_encode_sgi_group(struct its_cmd_block *cmd, bool grp) 561e252cf8aSMarc Zyngier { 562e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], grp, 10, 10); 563e252cf8aSMarc Zyngier } 564e252cf8aSMarc Zyngier 565e252cf8aSMarc Zyngier static void its_encode_sgi_clear(struct its_cmd_block *cmd, bool clr) 566e252cf8aSMarc Zyngier { 567e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], clr, 9, 9); 568e252cf8aSMarc Zyngier } 569e252cf8aSMarc Zyngier 570e252cf8aSMarc Zyngier static void its_encode_sgi_enable(struct its_cmd_block *cmd, bool en) 571e252cf8aSMarc Zyngier { 572e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], en, 8, 8); 573e252cf8aSMarc Zyngier } 574e252cf8aSMarc Zyngier 575cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 576cc2d3216SMarc Zyngier { 577cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 5782bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[0] = cpu_to_le64(cmd->raw_cmd[0]); 5792bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[1] = cpu_to_le64(cmd->raw_cmd[1]); 5802bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[2] = cpu_to_le64(cmd->raw_cmd[2]); 5812bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[3] = cpu_to_le64(cmd->raw_cmd[3]); 582cc2d3216SMarc Zyngier } 583cc2d3216SMarc Zyngier 58467047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 58567047f90SMarc Zyngier struct its_cmd_block *cmd, 586cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 587cc2d3216SMarc Zyngier { 588cc2d3216SMarc Zyngier unsigned long itt_addr; 589c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 590cc2d3216SMarc Zyngier 591cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 592cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 593cc2d3216SMarc Zyngier 594cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 595cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 596cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 597cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 598cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 599cc2d3216SMarc Zyngier 600cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 601cc2d3216SMarc Zyngier 602591e5becSMarc Zyngier return NULL; 603cc2d3216SMarc Zyngier } 604cc2d3216SMarc Zyngier 60567047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 60667047f90SMarc Zyngier struct its_cmd_block *cmd, 607cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 608cc2d3216SMarc Zyngier { 609cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 610cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 611cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 612cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 613cc2d3216SMarc Zyngier 614cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 615cc2d3216SMarc Zyngier 616cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 617cc2d3216SMarc Zyngier } 618cc2d3216SMarc Zyngier 61967047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 62067047f90SMarc Zyngier struct its_cmd_block *cmd, 621cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 622cc2d3216SMarc Zyngier { 623591e5becSMarc Zyngier struct its_collection *col; 624591e5becSMarc Zyngier 6256a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 6266a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 627591e5becSMarc Zyngier 6286a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 6296a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 6306a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 6316a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 632591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 633cc2d3216SMarc Zyngier 634cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 635cc2d3216SMarc Zyngier 63683559b47SMarc Zyngier return valid_col(col); 637cc2d3216SMarc Zyngier } 638cc2d3216SMarc Zyngier 63967047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 64067047f90SMarc Zyngier struct its_cmd_block *cmd, 641cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 642cc2d3216SMarc Zyngier { 643591e5becSMarc Zyngier struct its_collection *col; 644591e5becSMarc Zyngier 645591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 646591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 647591e5becSMarc Zyngier 648cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 649cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 650591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 651cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 652cc2d3216SMarc Zyngier 653cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 654cc2d3216SMarc Zyngier 65583559b47SMarc Zyngier return valid_col(col); 656cc2d3216SMarc Zyngier } 657cc2d3216SMarc Zyngier 65867047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 65967047f90SMarc Zyngier struct its_cmd_block *cmd, 660cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 661cc2d3216SMarc Zyngier { 662591e5becSMarc Zyngier struct its_collection *col; 663591e5becSMarc Zyngier 664591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 665591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 666591e5becSMarc Zyngier 667cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 668cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 669cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 670cc2d3216SMarc Zyngier 671cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 672cc2d3216SMarc Zyngier 67383559b47SMarc Zyngier return valid_col(col); 674cc2d3216SMarc Zyngier } 675cc2d3216SMarc Zyngier 67667047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 67767047f90SMarc Zyngier struct its_cmd_block *cmd, 678cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 679cc2d3216SMarc Zyngier { 680591e5becSMarc Zyngier struct its_collection *col; 681591e5becSMarc Zyngier 682591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 683591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 684591e5becSMarc Zyngier 685cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 686cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 687cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 688cc2d3216SMarc Zyngier 689cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 690cc2d3216SMarc Zyngier 69183559b47SMarc Zyngier return valid_col(col); 692cc2d3216SMarc Zyngier } 693cc2d3216SMarc Zyngier 69467047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 69567047f90SMarc Zyngier struct its_cmd_block *cmd, 6968d85dcedSMarc Zyngier struct its_cmd_desc *desc) 6978d85dcedSMarc Zyngier { 6988d85dcedSMarc Zyngier struct its_collection *col; 6998d85dcedSMarc Zyngier 7008d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 7018d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 7028d85dcedSMarc Zyngier 7038d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 7048d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 7058d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 7068d85dcedSMarc Zyngier 7078d85dcedSMarc Zyngier its_fixup_cmd(cmd); 7088d85dcedSMarc Zyngier 70983559b47SMarc Zyngier return valid_col(col); 7108d85dcedSMarc Zyngier } 7118d85dcedSMarc Zyngier 71267047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 71367047f90SMarc Zyngier struct its_cmd_block *cmd, 7148d85dcedSMarc Zyngier struct its_cmd_desc *desc) 7158d85dcedSMarc Zyngier { 7168d85dcedSMarc Zyngier struct its_collection *col; 7178d85dcedSMarc Zyngier 7188d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 7198d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 7208d85dcedSMarc Zyngier 7218d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 7228d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 7238d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 7248d85dcedSMarc Zyngier 7258d85dcedSMarc Zyngier its_fixup_cmd(cmd); 7268d85dcedSMarc Zyngier 72783559b47SMarc Zyngier return valid_col(col); 7288d85dcedSMarc Zyngier } 7298d85dcedSMarc Zyngier 73067047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 73167047f90SMarc Zyngier struct its_cmd_block *cmd, 732cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 733cc2d3216SMarc Zyngier { 734cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 73510794522SZenghui Yu its_encode_collection(cmd, desc->its_invall_cmd.col->col_id); 736cc2d3216SMarc Zyngier 737cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 738cc2d3216SMarc Zyngier 739cc2d3216SMarc Zyngier return NULL; 740cc2d3216SMarc Zyngier } 741cc2d3216SMarc Zyngier 74267047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 74367047f90SMarc Zyngier struct its_cmd_block *cmd, 744eb78192bSMarc Zyngier struct its_cmd_desc *desc) 745eb78192bSMarc Zyngier { 746eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 747eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 748eb78192bSMarc Zyngier 749eb78192bSMarc Zyngier its_fixup_cmd(cmd); 750eb78192bSMarc Zyngier 751205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 752eb78192bSMarc Zyngier } 753eb78192bSMarc Zyngier 75467047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 75567047f90SMarc Zyngier struct its_cmd_block *cmd, 756eb78192bSMarc Zyngier struct its_cmd_desc *desc) 757eb78192bSMarc Zyngier { 75864edfaa9SMarc Zyngier unsigned long vpt_addr, vconf_addr; 7595c9a882eSMarc Zyngier u64 target; 76064edfaa9SMarc Zyngier bool alloc; 761eb78192bSMarc Zyngier 762eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 763eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 764eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 76564edfaa9SMarc Zyngier 76664edfaa9SMarc Zyngier if (!desc->its_vmapp_cmd.valid) { 76764edfaa9SMarc Zyngier if (is_v4_1(its)) { 76864edfaa9SMarc Zyngier alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count); 76964edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 77064edfaa9SMarc Zyngier } 77164edfaa9SMarc Zyngier 77264edfaa9SMarc Zyngier goto out; 77364edfaa9SMarc Zyngier } 77464edfaa9SMarc Zyngier 77564edfaa9SMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 77664edfaa9SMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 77764edfaa9SMarc Zyngier 7785c9a882eSMarc Zyngier its_encode_target(cmd, target); 779eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 780eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 781eb78192bSMarc Zyngier 78264edfaa9SMarc Zyngier if (!is_v4_1(its)) 78364edfaa9SMarc Zyngier goto out; 78464edfaa9SMarc Zyngier 78564edfaa9SMarc Zyngier vconf_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->its_vm->vprop_page)); 78664edfaa9SMarc Zyngier 78764edfaa9SMarc Zyngier alloc = !atomic_fetch_inc(&desc->its_vmapp_cmd.vpe->vmapp_count); 78864edfaa9SMarc Zyngier 78964edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 79064edfaa9SMarc Zyngier 79164edfaa9SMarc Zyngier /* We can only signal PTZ when alloc==1. Why do we have two bits? */ 79264edfaa9SMarc Zyngier its_encode_ptz(cmd, alloc); 79364edfaa9SMarc Zyngier its_encode_vconf_addr(cmd, vconf_addr); 79464edfaa9SMarc Zyngier its_encode_vmapp_default_db(cmd, desc->its_vmapp_cmd.vpe->vpe_db_lpi); 79564edfaa9SMarc Zyngier 79664edfaa9SMarc Zyngier out: 797eb78192bSMarc Zyngier its_fixup_cmd(cmd); 798eb78192bSMarc Zyngier 799205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 800eb78192bSMarc Zyngier } 801eb78192bSMarc Zyngier 80267047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 80367047f90SMarc Zyngier struct its_cmd_block *cmd, 804d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 805d011e4e6SMarc Zyngier { 806d011e4e6SMarc Zyngier u32 db; 807d011e4e6SMarc Zyngier 8083858d4dfSMarc Zyngier if (!is_v4_1(its) && desc->its_vmapti_cmd.db_enabled) 809d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 810d011e4e6SMarc Zyngier else 811d011e4e6SMarc Zyngier db = 1023; 812d011e4e6SMarc Zyngier 813d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 814d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 815d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 816d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 817d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 818d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 819d011e4e6SMarc Zyngier 820d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 821d011e4e6SMarc Zyngier 822205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 823d011e4e6SMarc Zyngier } 824d011e4e6SMarc Zyngier 82567047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 82667047f90SMarc Zyngier struct its_cmd_block *cmd, 827d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 828d011e4e6SMarc Zyngier { 829d011e4e6SMarc Zyngier u32 db; 830d011e4e6SMarc Zyngier 8313858d4dfSMarc Zyngier if (!is_v4_1(its) && desc->its_vmovi_cmd.db_enabled) 832d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 833d011e4e6SMarc Zyngier else 834d011e4e6SMarc Zyngier db = 1023; 835d011e4e6SMarc Zyngier 836d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 837d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 838d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 839d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 840d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 841d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 842d011e4e6SMarc Zyngier 843d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 844d011e4e6SMarc Zyngier 845205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 846d011e4e6SMarc Zyngier } 847d011e4e6SMarc Zyngier 84867047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 84967047f90SMarc Zyngier struct its_cmd_block *cmd, 8503171a47aSMarc Zyngier struct its_cmd_desc *desc) 8513171a47aSMarc Zyngier { 8525c9a882eSMarc Zyngier u64 target; 8535c9a882eSMarc Zyngier 8545c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 8553171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 8563171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 8573171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 8583171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 8595c9a882eSMarc Zyngier its_encode_target(cmd, target); 8603171a47aSMarc Zyngier 861dd3f050aSMarc Zyngier if (is_v4_1(its)) { 862dd3f050aSMarc Zyngier its_encode_db(cmd, true); 863dd3f050aSMarc Zyngier its_encode_vmovp_default_db(cmd, desc->its_vmovp_cmd.vpe->vpe_db_lpi); 864dd3f050aSMarc Zyngier } 865dd3f050aSMarc Zyngier 8663171a47aSMarc Zyngier its_fixup_cmd(cmd); 8673171a47aSMarc Zyngier 868205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 8693171a47aSMarc Zyngier } 8703171a47aSMarc Zyngier 87128614696SMarc Zyngier static struct its_vpe *its_build_vinv_cmd(struct its_node *its, 87228614696SMarc Zyngier struct its_cmd_block *cmd, 87328614696SMarc Zyngier struct its_cmd_desc *desc) 87428614696SMarc Zyngier { 87528614696SMarc Zyngier struct its_vlpi_map *map; 87628614696SMarc Zyngier 87728614696SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_inv_cmd.dev, 87828614696SMarc Zyngier desc->its_inv_cmd.event_id); 87928614696SMarc Zyngier 88028614696SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 88128614696SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 88228614696SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 88328614696SMarc Zyngier 88428614696SMarc Zyngier its_fixup_cmd(cmd); 88528614696SMarc Zyngier 88628614696SMarc Zyngier return valid_vpe(its, map->vpe); 88728614696SMarc Zyngier } 88828614696SMarc Zyngier 889ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vint_cmd(struct its_node *its, 890ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 891ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 892ed0e4aa9SMarc Zyngier { 893ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 894ed0e4aa9SMarc Zyngier 895ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_int_cmd.dev, 896ed0e4aa9SMarc Zyngier desc->its_int_cmd.event_id); 897ed0e4aa9SMarc Zyngier 898ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 899ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 900ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 901ed0e4aa9SMarc Zyngier 902ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 903ed0e4aa9SMarc Zyngier 904ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 905ed0e4aa9SMarc Zyngier } 906ed0e4aa9SMarc Zyngier 907ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vclear_cmd(struct its_node *its, 908ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 909ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 910ed0e4aa9SMarc Zyngier { 911ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 912ed0e4aa9SMarc Zyngier 913ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_clear_cmd.dev, 914ed0e4aa9SMarc Zyngier desc->its_clear_cmd.event_id); 915ed0e4aa9SMarc Zyngier 916ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 917ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 918ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 919ed0e4aa9SMarc Zyngier 920ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 921ed0e4aa9SMarc Zyngier 922ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 923ed0e4aa9SMarc Zyngier } 924ed0e4aa9SMarc Zyngier 925d97c97baSMarc Zyngier static struct its_vpe *its_build_invdb_cmd(struct its_node *its, 926d97c97baSMarc Zyngier struct its_cmd_block *cmd, 927d97c97baSMarc Zyngier struct its_cmd_desc *desc) 928d97c97baSMarc Zyngier { 929d97c97baSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 930d97c97baSMarc Zyngier return NULL; 931d97c97baSMarc Zyngier 932d97c97baSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVDB); 933d97c97baSMarc Zyngier its_encode_vpeid(cmd, desc->its_invdb_cmd.vpe->vpe_id); 934d97c97baSMarc Zyngier 935d97c97baSMarc Zyngier its_fixup_cmd(cmd); 936d97c97baSMarc Zyngier 937d97c97baSMarc Zyngier return valid_vpe(its, desc->its_invdb_cmd.vpe); 938d97c97baSMarc Zyngier } 939d97c97baSMarc Zyngier 940e252cf8aSMarc Zyngier static struct its_vpe *its_build_vsgi_cmd(struct its_node *its, 941e252cf8aSMarc Zyngier struct its_cmd_block *cmd, 942e252cf8aSMarc Zyngier struct its_cmd_desc *desc) 943e252cf8aSMarc Zyngier { 944e252cf8aSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 945e252cf8aSMarc Zyngier return NULL; 946e252cf8aSMarc Zyngier 947e252cf8aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VSGI); 948e252cf8aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vsgi_cmd.vpe->vpe_id); 949e252cf8aSMarc Zyngier its_encode_sgi_intid(cmd, desc->its_vsgi_cmd.sgi); 950e252cf8aSMarc Zyngier its_encode_sgi_priority(cmd, desc->its_vsgi_cmd.priority); 951e252cf8aSMarc Zyngier its_encode_sgi_group(cmd, desc->its_vsgi_cmd.group); 952e252cf8aSMarc Zyngier its_encode_sgi_clear(cmd, desc->its_vsgi_cmd.clear); 953e252cf8aSMarc Zyngier its_encode_sgi_enable(cmd, desc->its_vsgi_cmd.enable); 954e252cf8aSMarc Zyngier 955e252cf8aSMarc Zyngier its_fixup_cmd(cmd); 956e252cf8aSMarc Zyngier 957e252cf8aSMarc Zyngier return valid_vpe(its, desc->its_vsgi_cmd.vpe); 958e252cf8aSMarc Zyngier } 959e252cf8aSMarc Zyngier 960cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 961cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 962cc2d3216SMarc Zyngier { 963cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 964cc2d3216SMarc Zyngier } 965cc2d3216SMarc Zyngier 966cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 967cc2d3216SMarc Zyngier { 968cc2d3216SMarc Zyngier int widx; 969cc2d3216SMarc Zyngier int ridx; 970cc2d3216SMarc Zyngier 971cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 972cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 973cc2d3216SMarc Zyngier 974cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 975cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 976cc2d3216SMarc Zyngier return 1; 977cc2d3216SMarc Zyngier 978cc2d3216SMarc Zyngier return 0; 979cc2d3216SMarc Zyngier } 980cc2d3216SMarc Zyngier 981cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 982cc2d3216SMarc Zyngier { 983cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 984cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 985cc2d3216SMarc Zyngier 986cc2d3216SMarc Zyngier while (its_queue_full(its)) { 987cc2d3216SMarc Zyngier count--; 988cc2d3216SMarc Zyngier if (!count) { 989cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 990cc2d3216SMarc Zyngier return NULL; 991cc2d3216SMarc Zyngier } 992cc2d3216SMarc Zyngier cpu_relax(); 993cc2d3216SMarc Zyngier udelay(1); 994cc2d3216SMarc Zyngier } 995cc2d3216SMarc Zyngier 996cc2d3216SMarc Zyngier cmd = its->cmd_write++; 997cc2d3216SMarc Zyngier 998cc2d3216SMarc Zyngier /* Handle queue wrapping */ 999cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 1000cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 1001cc2d3216SMarc Zyngier 100234d677a9SMarc Zyngier /* Clear command */ 100334d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 100434d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 100534d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 100634d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 100734d677a9SMarc Zyngier 1008cc2d3216SMarc Zyngier return cmd; 1009cc2d3216SMarc Zyngier } 1010cc2d3216SMarc Zyngier 1011cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 1012cc2d3216SMarc Zyngier { 1013cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 1014cc2d3216SMarc Zyngier 1015cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 1016cc2d3216SMarc Zyngier 1017cc2d3216SMarc Zyngier return its->cmd_write; 1018cc2d3216SMarc Zyngier } 1019cc2d3216SMarc Zyngier 1020cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 1021cc2d3216SMarc Zyngier { 1022cc2d3216SMarc Zyngier /* 1023cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 1024cc2d3216SMarc Zyngier * the ITS. 1025cc2d3216SMarc Zyngier */ 1026cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 1027328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 1028cc2d3216SMarc Zyngier else 1029cc2d3216SMarc Zyngier dsb(ishst); 1030cc2d3216SMarc Zyngier } 1031cc2d3216SMarc Zyngier 1032a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 1033a050fa54SHeyi Guo u64 prev_idx, 1034cc2d3216SMarc Zyngier struct its_cmd_block *to) 1035cc2d3216SMarc Zyngier { 1036a050fa54SHeyi Guo u64 rd_idx, to_idx, linear_idx; 1037cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 1038cc2d3216SMarc Zyngier 1039a050fa54SHeyi Guo /* Linearize to_idx if the command set has wrapped around */ 1040cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 1041a050fa54SHeyi Guo if (to_idx < prev_idx) 1042a050fa54SHeyi Guo to_idx += ITS_CMD_QUEUE_SZ; 1043a050fa54SHeyi Guo 1044a050fa54SHeyi Guo linear_idx = prev_idx; 1045cc2d3216SMarc Zyngier 1046cc2d3216SMarc Zyngier while (1) { 1047a050fa54SHeyi Guo s64 delta; 1048a050fa54SHeyi Guo 1049cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 10509bdd8b1cSMarc Zyngier 1051a050fa54SHeyi Guo /* 1052a050fa54SHeyi Guo * Compute the read pointer progress, taking the 1053a050fa54SHeyi Guo * potential wrap-around into account. 1054a050fa54SHeyi Guo */ 1055a050fa54SHeyi Guo delta = rd_idx - prev_idx; 1056a050fa54SHeyi Guo if (rd_idx < prev_idx) 1057a050fa54SHeyi Guo delta += ITS_CMD_QUEUE_SZ; 10589bdd8b1cSMarc Zyngier 1059a050fa54SHeyi Guo linear_idx += delta; 1060a050fa54SHeyi Guo if (linear_idx >= to_idx) 1061cc2d3216SMarc Zyngier break; 1062cc2d3216SMarc Zyngier 1063cc2d3216SMarc Zyngier count--; 1064cc2d3216SMarc Zyngier if (!count) { 1065a050fa54SHeyi Guo pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", 1066a050fa54SHeyi Guo to_idx, linear_idx); 1067a19b462fSMarc Zyngier return -1; 1068cc2d3216SMarc Zyngier } 1069a050fa54SHeyi Guo prev_idx = rd_idx; 1070cc2d3216SMarc Zyngier cpu_relax(); 1071cc2d3216SMarc Zyngier udelay(1); 1072cc2d3216SMarc Zyngier } 1073a19b462fSMarc Zyngier 1074a19b462fSMarc Zyngier return 0; 1075cc2d3216SMarc Zyngier } 1076cc2d3216SMarc Zyngier 1077e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 1078e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 1079e4f9094bSMarc Zyngier void name(struct its_node *its, \ 1080e4f9094bSMarc Zyngier buildtype builder, \ 1081e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 1082e4f9094bSMarc Zyngier { \ 1083e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 1084e4f9094bSMarc Zyngier synctype *sync_obj; \ 1085e4f9094bSMarc Zyngier unsigned long flags; \ 1086a050fa54SHeyi Guo u64 rd_idx; \ 1087e4f9094bSMarc Zyngier \ 1088e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 1089e4f9094bSMarc Zyngier \ 1090e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 1091e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 1092e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1093e4f9094bSMarc Zyngier return; \ 1094e4f9094bSMarc Zyngier } \ 109567047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 1096e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 1097e4f9094bSMarc Zyngier \ 1098e4f9094bSMarc Zyngier if (sync_obj) { \ 1099e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 1100e4f9094bSMarc Zyngier if (!sync_cmd) \ 1101e4f9094bSMarc Zyngier goto post; \ 1102e4f9094bSMarc Zyngier \ 110367047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 1104e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 1105e4f9094bSMarc Zyngier } \ 1106e4f9094bSMarc Zyngier \ 1107e4f9094bSMarc Zyngier post: \ 1108a050fa54SHeyi Guo rd_idx = readl_relaxed(its->base + GITS_CREADR); \ 1109e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 1110e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1111e4f9094bSMarc Zyngier \ 1112a050fa54SHeyi Guo if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \ 1113a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 1114e4f9094bSMarc Zyngier } 1115e4f9094bSMarc Zyngier 111667047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 111767047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1118e4f9094bSMarc Zyngier struct its_collection *sync_col) 1119cc2d3216SMarc Zyngier { 1120cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 1121cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 1122e4f9094bSMarc Zyngier 1123cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 1124cc2d3216SMarc Zyngier } 1125cc2d3216SMarc Zyngier 1126e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 1127e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 1128cc2d3216SMarc Zyngier 112967047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 113067047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1131d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 1132d011e4e6SMarc Zyngier { 1133d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 1134d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 1135d011e4e6SMarc Zyngier 1136d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 1137d011e4e6SMarc Zyngier } 1138d011e4e6SMarc Zyngier 1139d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 1140d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 1141d011e4e6SMarc Zyngier 11428d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 11438d85dcedSMarc Zyngier { 11448d85dcedSMarc Zyngier struct its_cmd_desc desc; 11458d85dcedSMarc Zyngier 11468d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 11478d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 11488d85dcedSMarc Zyngier 11498d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 11508d85dcedSMarc Zyngier } 11518d85dcedSMarc Zyngier 11528d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 11538d85dcedSMarc Zyngier { 11548d85dcedSMarc Zyngier struct its_cmd_desc desc; 11558d85dcedSMarc Zyngier 11568d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 11578d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 11588d85dcedSMarc Zyngier 11598d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 1160cc2d3216SMarc Zyngier } 1161cc2d3216SMarc Zyngier 1162cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 1163cc2d3216SMarc Zyngier { 1164cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1165cc2d3216SMarc Zyngier 1166cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 1167cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 1168cc2d3216SMarc Zyngier 1169cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 1170cc2d3216SMarc Zyngier } 1171cc2d3216SMarc Zyngier 1172cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 1173cc2d3216SMarc Zyngier { 1174cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1175cc2d3216SMarc Zyngier 1176cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 1177cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 1178cc2d3216SMarc Zyngier 1179cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 1180cc2d3216SMarc Zyngier } 1181cc2d3216SMarc Zyngier 1182cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 1183cc2d3216SMarc Zyngier int valid) 1184cc2d3216SMarc Zyngier { 1185cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1186cc2d3216SMarc Zyngier 1187cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 1188cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 1189cc2d3216SMarc Zyngier 1190cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 1191cc2d3216SMarc Zyngier } 1192cc2d3216SMarc Zyngier 11936a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 1194cc2d3216SMarc Zyngier { 1195cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1196cc2d3216SMarc Zyngier 11976a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 11986a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 11996a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 1200cc2d3216SMarc Zyngier 12016a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 1202cc2d3216SMarc Zyngier } 1203cc2d3216SMarc Zyngier 1204cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 1205cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 1206cc2d3216SMarc Zyngier { 1207cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1208cc2d3216SMarc Zyngier 1209cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 1210cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 1211591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 1212cc2d3216SMarc Zyngier 1213cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 1214cc2d3216SMarc Zyngier } 1215cc2d3216SMarc Zyngier 1216cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 1217cc2d3216SMarc Zyngier { 1218cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1219cc2d3216SMarc Zyngier 1220cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 1221cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 1222cc2d3216SMarc Zyngier 1223cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 1224cc2d3216SMarc Zyngier } 1225cc2d3216SMarc Zyngier 1226cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 1227cc2d3216SMarc Zyngier { 1228cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1229cc2d3216SMarc Zyngier 1230cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 1231cc2d3216SMarc Zyngier 1232cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 1233cc2d3216SMarc Zyngier } 1234c48ed51cSMarc Zyngier 1235d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 1236d011e4e6SMarc Zyngier { 1237c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1238d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1239d011e4e6SMarc Zyngier 1240d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 1241d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 1242d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 1243d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 1244d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 1245d011e4e6SMarc Zyngier 1246d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 1247d011e4e6SMarc Zyngier } 1248d011e4e6SMarc Zyngier 1249d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 1250d011e4e6SMarc Zyngier { 1251c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1252d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1253d011e4e6SMarc Zyngier 1254d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 1255d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 1256d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 1257d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 1258d011e4e6SMarc Zyngier 1259d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 1260d011e4e6SMarc Zyngier } 1261d011e4e6SMarc Zyngier 126275fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 126375fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 1264eb78192bSMarc Zyngier { 1265eb78192bSMarc Zyngier struct its_cmd_desc desc; 1266eb78192bSMarc Zyngier 1267eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 1268eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 1269eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 127075fd951bSMarc Zyngier 1271eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 1272eb78192bSMarc Zyngier } 1273eb78192bSMarc Zyngier 12743171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 12753171a47aSMarc Zyngier { 127684243125SZenghui Yu struct its_cmd_desc desc = {}; 12773171a47aSMarc Zyngier struct its_node *its; 12783171a47aSMarc Zyngier unsigned long flags; 12793171a47aSMarc Zyngier int col_id = vpe->col_idx; 12803171a47aSMarc Zyngier 12813171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 12823171a47aSMarc Zyngier 12833171a47aSMarc Zyngier if (!its_list_map) { 12843171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 12853171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 12863171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 12873171a47aSMarc Zyngier return; 12883171a47aSMarc Zyngier } 12893171a47aSMarc Zyngier 12903171a47aSMarc Zyngier /* 12913171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 12923171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 12933171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 12943171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 12953171a47aSMarc Zyngier * 12963171a47aSMarc Zyngier * Wall <-- Head. 12973171a47aSMarc Zyngier */ 12983171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12993171a47aSMarc Zyngier 13003171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 130184243125SZenghui Yu desc.its_vmovp_cmd.its_list = get_its_list(vpe->its_vm); 13023171a47aSMarc Zyngier 13033171a47aSMarc Zyngier /* Emit VMOVPs */ 13043171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 13050dd57fedSMarc Zyngier if (!is_v4(its)) 13063171a47aSMarc Zyngier continue; 13073171a47aSMarc Zyngier 1308009384b3SMarc Zyngier if (!require_its_list_vmovp(vpe->its_vm, its)) 13092247e1bfSMarc Zyngier continue; 13102247e1bfSMarc Zyngier 13113171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 13123171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 13133171a47aSMarc Zyngier } 13143171a47aSMarc Zyngier 13153171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 13163171a47aSMarc Zyngier } 13173171a47aSMarc Zyngier 131840619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1319eb78192bSMarc Zyngier { 1320eb78192bSMarc Zyngier struct its_cmd_desc desc; 1321eb78192bSMarc Zyngier 1322eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1323eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1324eb78192bSMarc Zyngier } 1325eb78192bSMarc Zyngier 132628614696SMarc Zyngier static void its_send_vinv(struct its_device *dev, u32 event_id) 132728614696SMarc Zyngier { 132828614696SMarc Zyngier struct its_cmd_desc desc; 132928614696SMarc Zyngier 133028614696SMarc Zyngier /* 133128614696SMarc Zyngier * There is no real VINV command. This is just a normal INV, 133228614696SMarc Zyngier * with a VSYNC instead of a SYNC. 133328614696SMarc Zyngier */ 133428614696SMarc Zyngier desc.its_inv_cmd.dev = dev; 133528614696SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 133628614696SMarc Zyngier 133728614696SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); 133828614696SMarc Zyngier } 133928614696SMarc Zyngier 1340ed0e4aa9SMarc Zyngier static void its_send_vint(struct its_device *dev, u32 event_id) 1341ed0e4aa9SMarc Zyngier { 1342ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1343ed0e4aa9SMarc Zyngier 1344ed0e4aa9SMarc Zyngier /* 1345ed0e4aa9SMarc Zyngier * There is no real VINT command. This is just a normal INT, 1346ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1347ed0e4aa9SMarc Zyngier */ 1348ed0e4aa9SMarc Zyngier desc.its_int_cmd.dev = dev; 1349ed0e4aa9SMarc Zyngier desc.its_int_cmd.event_id = event_id; 1350ed0e4aa9SMarc Zyngier 1351ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); 1352ed0e4aa9SMarc Zyngier } 1353ed0e4aa9SMarc Zyngier 1354ed0e4aa9SMarc Zyngier static void its_send_vclear(struct its_device *dev, u32 event_id) 1355ed0e4aa9SMarc Zyngier { 1356ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1357ed0e4aa9SMarc Zyngier 1358ed0e4aa9SMarc Zyngier /* 1359ed0e4aa9SMarc Zyngier * There is no real VCLEAR command. This is just a normal CLEAR, 1360ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1361ed0e4aa9SMarc Zyngier */ 1362ed0e4aa9SMarc Zyngier desc.its_clear_cmd.dev = dev; 1363ed0e4aa9SMarc Zyngier desc.its_clear_cmd.event_id = event_id; 1364ed0e4aa9SMarc Zyngier 1365ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); 1366ed0e4aa9SMarc Zyngier } 1367ed0e4aa9SMarc Zyngier 1368d97c97baSMarc Zyngier static void its_send_invdb(struct its_node *its, struct its_vpe *vpe) 1369d97c97baSMarc Zyngier { 1370d97c97baSMarc Zyngier struct its_cmd_desc desc; 1371d97c97baSMarc Zyngier 1372d97c97baSMarc Zyngier desc.its_invdb_cmd.vpe = vpe; 1373d97c97baSMarc Zyngier its_send_single_vcommand(its, its_build_invdb_cmd, &desc); 1374d97c97baSMarc Zyngier } 1375d97c97baSMarc Zyngier 1376c48ed51cSMarc Zyngier /* 1377c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1378c48ed51cSMarc Zyngier */ 1379015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1380c48ed51cSMarc Zyngier { 1381c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1382015ec038SMarc Zyngier irq_hw_number_t hwirq; 1383e1a2e201SMarc Zyngier void *va; 1384adcdb94eSMarc Zyngier u8 *cfg; 1385c48ed51cSMarc Zyngier 1386c1d4d5cdSMarc Zyngier if (map) { 1387c1d4d5cdSMarc Zyngier va = page_address(map->vm->vprop_page); 1388d4d7b4adSMarc Zyngier hwirq = map->vintid; 1389d4d7b4adSMarc Zyngier 1390d4d7b4adSMarc Zyngier /* Remember the updated property */ 1391d4d7b4adSMarc Zyngier map->properties &= ~clr; 1392d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1393015ec038SMarc Zyngier } else { 1394e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1395015ec038SMarc Zyngier hwirq = d->hwirq; 1396015ec038SMarc Zyngier } 1397adcdb94eSMarc Zyngier 1398e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1399adcdb94eSMarc Zyngier *cfg &= ~clr; 1400015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1401c48ed51cSMarc Zyngier 1402c48ed51cSMarc Zyngier /* 1403c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1404c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1405c48ed51cSMarc Zyngier * Humpf... 1406c48ed51cSMarc Zyngier */ 1407c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1408328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1409c48ed51cSMarc Zyngier else 1410c48ed51cSMarc Zyngier dsb(ishst); 1411015ec038SMarc Zyngier } 1412015ec038SMarc Zyngier 14132f4f064bSMarc Zyngier static void wait_for_syncr(void __iomem *rdbase) 14142f4f064bSMarc Zyngier { 141504d80dbeSHeyi Guo while (readl_relaxed(rdbase + GICR_SYNCR) & 1) 14162f4f064bSMarc Zyngier cpu_relax(); 14172f4f064bSMarc Zyngier } 14182f4f064bSMarc Zyngier 1419425c09beSMarc Zyngier static void direct_lpi_inv(struct irq_data *d) 1420425c09beSMarc Zyngier { 1421f4a81f5aSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1422425c09beSMarc Zyngier void __iomem *rdbase; 1423f3a05921SMarc Zyngier unsigned long flags; 1424f4a81f5aSMarc Zyngier u64 val; 1425f3a05921SMarc Zyngier int cpu; 1426f4a81f5aSMarc Zyngier 1427f4a81f5aSMarc Zyngier if (map) { 1428f4a81f5aSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1429f4a81f5aSMarc Zyngier 1430f4a81f5aSMarc Zyngier WARN_ON(!is_v4_1(its_dev->its)); 1431f4a81f5aSMarc Zyngier 1432f4a81f5aSMarc Zyngier val = GICR_INVLPIR_V; 1433f4a81f5aSMarc Zyngier val |= FIELD_PREP(GICR_INVLPIR_VPEID, map->vpe->vpe_id); 1434f4a81f5aSMarc Zyngier val |= FIELD_PREP(GICR_INVLPIR_INTID, map->vintid); 1435f4a81f5aSMarc Zyngier } else { 1436f4a81f5aSMarc Zyngier val = d->hwirq; 1437f4a81f5aSMarc Zyngier } 1438425c09beSMarc Zyngier 1439425c09beSMarc Zyngier /* Target the redistributor this LPI is currently routed to */ 1440f3a05921SMarc Zyngier cpu = irq_to_cpuid_lock(d, &flags); 14419058a4e9SMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 1442f3a05921SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; 1443f4a81f5aSMarc Zyngier gic_write_lpir(val, rdbase + GICR_INVLPIR); 1444425c09beSMarc Zyngier 1445425c09beSMarc Zyngier wait_for_syncr(rdbase); 14469058a4e9SMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 1447f3a05921SMarc Zyngier irq_to_cpuid_unlock(d, flags); 1448425c09beSMarc Zyngier } 1449425c09beSMarc Zyngier 1450015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1451015ec038SMarc Zyngier { 1452015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1453015ec038SMarc Zyngier 1454015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1455f4a81f5aSMarc Zyngier if (gic_rdists->has_direct_lpi && 1456f4a81f5aSMarc Zyngier (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) 1457425c09beSMarc Zyngier direct_lpi_inv(d); 145828614696SMarc Zyngier else if (!irqd_is_forwarded_to_vcpu(d)) 1459adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 146028614696SMarc Zyngier else 146128614696SMarc Zyngier its_send_vinv(its_dev, its_get_event_id(d)); 1462c48ed51cSMarc Zyngier } 1463c48ed51cSMarc Zyngier 1464015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1465015ec038SMarc Zyngier { 1466015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1467015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1468c1d4d5cdSMarc Zyngier struct its_vlpi_map *map; 1469015ec038SMarc Zyngier 14703858d4dfSMarc Zyngier /* 14713858d4dfSMarc Zyngier * GICv4.1 does away with the per-LPI nonsense, nothing to do 14723858d4dfSMarc Zyngier * here. 14733858d4dfSMarc Zyngier */ 14743858d4dfSMarc Zyngier if (is_v4_1(its_dev->its)) 14753858d4dfSMarc Zyngier return; 14763858d4dfSMarc Zyngier 1477c1d4d5cdSMarc Zyngier map = dev_event_to_vlpi_map(its_dev, event); 1478c1d4d5cdSMarc Zyngier 1479c1d4d5cdSMarc Zyngier if (map->db_enabled == enable) 1480015ec038SMarc Zyngier return; 1481015ec038SMarc Zyngier 1482c1d4d5cdSMarc Zyngier map->db_enabled = enable; 1483015ec038SMarc Zyngier 1484015ec038SMarc Zyngier /* 1485015ec038SMarc Zyngier * More fun with the architecture: 1486015ec038SMarc Zyngier * 1487015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1488015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1489015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1490015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1491015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1492015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1493015ec038SMarc Zyngier */ 1494015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1495c48ed51cSMarc Zyngier } 1496c48ed51cSMarc Zyngier 1497c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1498c48ed51cSMarc Zyngier { 1499015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1500015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1501015ec038SMarc Zyngier 1502adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1503c48ed51cSMarc Zyngier } 1504c48ed51cSMarc Zyngier 1505c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1506c48ed51cSMarc Zyngier { 1507015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1508015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1509015ec038SMarc Zyngier 1510adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1511c48ed51cSMarc Zyngier } 1512c48ed51cSMarc Zyngier 1513c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1514c48ed51cSMarc Zyngier bool force) 1515c48ed51cSMarc Zyngier { 1516fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1517fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1518c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1519c48ed51cSMarc Zyngier struct its_collection *target_col; 1520c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1521c48ed51cSMarc Zyngier 1522015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1523015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1524015ec038SMarc Zyngier return -EINVAL; 1525015ec038SMarc Zyngier 1526fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1527fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1528fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1529fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1530fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1531fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1532fbf8f40eSGanapatrao Kulkarni } 1533fbf8f40eSGanapatrao Kulkarni } 1534fbf8f40eSGanapatrao Kulkarni 1535fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1536fbf8f40eSGanapatrao Kulkarni 1537c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1538c48ed51cSMarc Zyngier return -EINVAL; 1539c48ed51cSMarc Zyngier 15408b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 15418b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1542c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1543c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1544591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 15450d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 15468b8d94a7SMaJun } 1547c48ed51cSMarc Zyngier 1548c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1549c48ed51cSMarc Zyngier } 1550c48ed51cSMarc Zyngier 1551558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1552558b0165SArd Biesheuvel { 1553558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1554558b0165SArd Biesheuvel 1555558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1556558b0165SArd Biesheuvel } 1557558b0165SArd Biesheuvel 1558b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1559b48ac83dSMarc Zyngier { 1560b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1561b48ac83dSMarc Zyngier struct its_node *its; 1562b48ac83dSMarc Zyngier u64 addr; 1563b48ac83dSMarc Zyngier 1564b48ac83dSMarc Zyngier its = its_dev->its; 1565558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1566b48ac83dSMarc Zyngier 1567b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1568b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1569b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 157044bb7e24SRobin Murphy 157135ae7df2SJulien Grall iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); 1572b48ac83dSMarc Zyngier } 1573b48ac83dSMarc Zyngier 15748d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 15758d85dcedSMarc Zyngier enum irqchip_irq_state which, 15768d85dcedSMarc Zyngier bool state) 15778d85dcedSMarc Zyngier { 15788d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 15798d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 15808d85dcedSMarc Zyngier 15818d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 15828d85dcedSMarc Zyngier return -EINVAL; 15838d85dcedSMarc Zyngier 1584ed0e4aa9SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1585ed0e4aa9SMarc Zyngier if (state) 1586ed0e4aa9SMarc Zyngier its_send_vint(its_dev, event); 1587ed0e4aa9SMarc Zyngier else 1588ed0e4aa9SMarc Zyngier its_send_vclear(its_dev, event); 1589ed0e4aa9SMarc Zyngier } else { 15908d85dcedSMarc Zyngier if (state) 15918d85dcedSMarc Zyngier its_send_int(its_dev, event); 15928d85dcedSMarc Zyngier else 15938d85dcedSMarc Zyngier its_send_clear(its_dev, event); 1594ed0e4aa9SMarc Zyngier } 15958d85dcedSMarc Zyngier 15968d85dcedSMarc Zyngier return 0; 15978d85dcedSMarc Zyngier } 15988d85dcedSMarc Zyngier 1599009384b3SMarc Zyngier /* 1600009384b3SMarc Zyngier * Two favourable cases: 1601009384b3SMarc Zyngier * 1602009384b3SMarc Zyngier * (a) Either we have a GICv4.1, and all vPEs have to be mapped at all times 1603009384b3SMarc Zyngier * for vSGI delivery 1604009384b3SMarc Zyngier * 1605009384b3SMarc Zyngier * (b) Or the ITSs do not use a list map, meaning that VMOVP is cheap enough 1606009384b3SMarc Zyngier * and we're better off mapping all VPEs always 1607009384b3SMarc Zyngier * 1608009384b3SMarc Zyngier * If neither (a) nor (b) is true, then we map vPEs on demand. 1609009384b3SMarc Zyngier * 1610009384b3SMarc Zyngier */ 1611009384b3SMarc Zyngier static bool gic_requires_eager_mapping(void) 1612009384b3SMarc Zyngier { 1613009384b3SMarc Zyngier if (!its_list_map || gic_rdists->has_rvpeid) 1614009384b3SMarc Zyngier return true; 1615009384b3SMarc Zyngier 1616009384b3SMarc Zyngier return false; 1617009384b3SMarc Zyngier } 1618009384b3SMarc Zyngier 16192247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 16202247e1bfSMarc Zyngier { 16212247e1bfSMarc Zyngier unsigned long flags; 16222247e1bfSMarc Zyngier 1623009384b3SMarc Zyngier if (gic_requires_eager_mapping()) 16242247e1bfSMarc Zyngier return; 16252247e1bfSMarc Zyngier 16262247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 16272247e1bfSMarc Zyngier 16282247e1bfSMarc Zyngier /* 16292247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 16302247e1bfSMarc Zyngier * them mapped now. 16312247e1bfSMarc Zyngier */ 16322247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 16332247e1bfSMarc Zyngier 16342247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 16352247e1bfSMarc Zyngier int i; 16362247e1bfSMarc Zyngier 16372247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 16382247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 163944c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 16402247e1bfSMarc Zyngier 16412247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 16422247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 16432247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 16442247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 164544c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 16462247e1bfSMarc Zyngier } 16472247e1bfSMarc Zyngier } 16482247e1bfSMarc Zyngier 16492247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 16502247e1bfSMarc Zyngier } 16512247e1bfSMarc Zyngier 16522247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 16532247e1bfSMarc Zyngier { 16542247e1bfSMarc Zyngier unsigned long flags; 16552247e1bfSMarc Zyngier 16562247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 1657009384b3SMarc Zyngier if (gic_requires_eager_mapping()) 16582247e1bfSMarc Zyngier return; 16592247e1bfSMarc Zyngier 16602247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 16612247e1bfSMarc Zyngier 16622247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 16632247e1bfSMarc Zyngier int i; 16642247e1bfSMarc Zyngier 16652247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 16662247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 16672247e1bfSMarc Zyngier } 16682247e1bfSMarc Zyngier 16692247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 16702247e1bfSMarc Zyngier } 16712247e1bfSMarc Zyngier 1672d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1673d011e4e6SMarc Zyngier { 1674d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1675d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1676d011e4e6SMarc Zyngier int ret = 0; 1677d011e4e6SMarc Zyngier 1678d011e4e6SMarc Zyngier if (!info->map) 1679d011e4e6SMarc Zyngier return -EINVAL; 1680d011e4e6SMarc Zyngier 168111635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1682d011e4e6SMarc Zyngier 1683d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1684d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1685d011e4e6SMarc Zyngier 16866396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 168711635fa2SMarc Zyngier GFP_ATOMIC); 1688d011e4e6SMarc Zyngier if (!maps) { 1689d011e4e6SMarc Zyngier ret = -ENOMEM; 1690d011e4e6SMarc Zyngier goto out; 1691d011e4e6SMarc Zyngier } 1692d011e4e6SMarc Zyngier 1693d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1694d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1695d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1696d011e4e6SMarc Zyngier ret = -EINVAL; 1697d011e4e6SMarc Zyngier goto out; 1698d011e4e6SMarc Zyngier } 1699d011e4e6SMarc Zyngier 1700d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1701d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1702d011e4e6SMarc Zyngier 1703d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1704d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1705d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1706d011e4e6SMarc Zyngier } else { 17072247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 17082247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 17092247e1bfSMarc Zyngier 1710d4d7b4adSMarc Zyngier /* 1711d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1712d4d7b4adSMarc Zyngier * start poking the virtual property table. 1713d4d7b4adSMarc Zyngier */ 1714d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1715d4d7b4adSMarc Zyngier 1716d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1717d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1718d4d7b4adSMarc Zyngier 1719d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1720d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1721d011e4e6SMarc Zyngier 1722d011e4e6SMarc Zyngier /* and install the virtual one */ 1723d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1724d011e4e6SMarc Zyngier 1725d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1726d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1727d011e4e6SMarc Zyngier } 1728d011e4e6SMarc Zyngier 1729d011e4e6SMarc Zyngier out: 173011635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1731d011e4e6SMarc Zyngier return ret; 1732d011e4e6SMarc Zyngier } 1733d011e4e6SMarc Zyngier 1734d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1735d011e4e6SMarc Zyngier { 1736d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1737046b5054SMarc Zyngier struct its_vlpi_map *map; 1738d011e4e6SMarc Zyngier int ret = 0; 1739d011e4e6SMarc Zyngier 174011635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1741d011e4e6SMarc Zyngier 1742046b5054SMarc Zyngier map = get_vlpi_map(d); 1743046b5054SMarc Zyngier 1744046b5054SMarc Zyngier if (!its_dev->event_map.vm || !map) { 1745d011e4e6SMarc Zyngier ret = -EINVAL; 1746d011e4e6SMarc Zyngier goto out; 1747d011e4e6SMarc Zyngier } 1748d011e4e6SMarc Zyngier 1749d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1750c1d4d5cdSMarc Zyngier *info->map = *map; 1751d011e4e6SMarc Zyngier 1752d011e4e6SMarc Zyngier out: 175311635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1754d011e4e6SMarc Zyngier return ret; 1755d011e4e6SMarc Zyngier } 1756d011e4e6SMarc Zyngier 1757d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1758d011e4e6SMarc Zyngier { 1759d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1760d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1761d011e4e6SMarc Zyngier int ret = 0; 1762d011e4e6SMarc Zyngier 176311635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1764d011e4e6SMarc Zyngier 1765d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1766d011e4e6SMarc Zyngier ret = -EINVAL; 1767d011e4e6SMarc Zyngier goto out; 1768d011e4e6SMarc Zyngier } 1769d011e4e6SMarc Zyngier 1770d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1771d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1772d011e4e6SMarc Zyngier 1773d011e4e6SMarc Zyngier /* and restore the physical one */ 1774d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1775d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1776d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1777d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1778d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1779d011e4e6SMarc Zyngier 17802247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 17812247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 17822247e1bfSMarc Zyngier 1783d011e4e6SMarc Zyngier /* 1784d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1785d011e4e6SMarc Zyngier * this was the last VLPI. 1786d011e4e6SMarc Zyngier */ 1787d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1788d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1789d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1790d011e4e6SMarc Zyngier } 1791d011e4e6SMarc Zyngier 1792d011e4e6SMarc Zyngier out: 179311635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1794d011e4e6SMarc Zyngier return ret; 1795d011e4e6SMarc Zyngier } 1796d011e4e6SMarc Zyngier 1797015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1798015ec038SMarc Zyngier { 1799015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1800015ec038SMarc Zyngier 1801015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1802015ec038SMarc Zyngier return -EINVAL; 1803015ec038SMarc Zyngier 1804015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1805015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1806015ec038SMarc Zyngier else 1807015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1808015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1809015ec038SMarc Zyngier 1810015ec038SMarc Zyngier return 0; 1811015ec038SMarc Zyngier } 1812015ec038SMarc Zyngier 1813c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1814c808eea8SMarc Zyngier { 1815c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1816c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1817c808eea8SMarc Zyngier 1818c808eea8SMarc Zyngier /* Need a v4 ITS */ 18190dd57fedSMarc Zyngier if (!is_v4(its_dev->its)) 1820c808eea8SMarc Zyngier return -EINVAL; 1821c808eea8SMarc Zyngier 1822d011e4e6SMarc Zyngier /* Unmap request? */ 1823d011e4e6SMarc Zyngier if (!info) 1824d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1825d011e4e6SMarc Zyngier 1826c808eea8SMarc Zyngier switch (info->cmd_type) { 1827c808eea8SMarc Zyngier case MAP_VLPI: 1828d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1829c808eea8SMarc Zyngier 1830c808eea8SMarc Zyngier case GET_VLPI: 1831d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1832c808eea8SMarc Zyngier 1833c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1834c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1835015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1836c808eea8SMarc Zyngier 1837c808eea8SMarc Zyngier default: 1838c808eea8SMarc Zyngier return -EINVAL; 1839c808eea8SMarc Zyngier } 1840c808eea8SMarc Zyngier } 1841c808eea8SMarc Zyngier 1842c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1843c48ed51cSMarc Zyngier .name = "ITS", 1844c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1845c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1846004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1847c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1848b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 18498d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1850c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1851b48ac83dSMarc Zyngier }; 1852b48ac83dSMarc Zyngier 1853880cb3cdSMarc Zyngier 1854bf9529f8SMarc Zyngier /* 1855bf9529f8SMarc Zyngier * How we allocate LPIs: 1856bf9529f8SMarc Zyngier * 1857880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1858880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1859880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1860880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1861bf9529f8SMarc Zyngier * 1862880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1863880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1864880cb3cdSMarc Zyngier * already free block. 1865880cb3cdSMarc Zyngier * 1866880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1867880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1868880cb3cdSMarc Zyngier */ 18694cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1870880cb3cdSMarc Zyngier 1871880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 1872880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 1873bf9529f8SMarc Zyngier 1874880cb3cdSMarc Zyngier struct lpi_range { 1875880cb3cdSMarc Zyngier struct list_head entry; 1876880cb3cdSMarc Zyngier u32 base_id; 1877880cb3cdSMarc Zyngier u32 span; 1878880cb3cdSMarc Zyngier }; 1879880cb3cdSMarc Zyngier 1880880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 1881bf9529f8SMarc Zyngier { 1882880cb3cdSMarc Zyngier struct lpi_range *range; 1883880cb3cdSMarc Zyngier 18841c73fac5SRasmus Villemoes range = kmalloc(sizeof(*range), GFP_KERNEL); 1885880cb3cdSMarc Zyngier if (range) { 1886880cb3cdSMarc Zyngier range->base_id = base; 1887880cb3cdSMarc Zyngier range->span = span; 1888bf9529f8SMarc Zyngier } 1889bf9529f8SMarc Zyngier 1890880cb3cdSMarc Zyngier return range; 1891880cb3cdSMarc Zyngier } 1892880cb3cdSMarc Zyngier 1893880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 1894880cb3cdSMarc Zyngier { 1895880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1896880cb3cdSMarc Zyngier int err = -ENOSPC; 1897880cb3cdSMarc Zyngier 1898880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1899880cb3cdSMarc Zyngier 1900880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1901880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 1902880cb3cdSMarc Zyngier *base = range->base_id; 1903880cb3cdSMarc Zyngier range->base_id += nr_lpis; 1904880cb3cdSMarc Zyngier range->span -= nr_lpis; 1905880cb3cdSMarc Zyngier 1906880cb3cdSMarc Zyngier if (range->span == 0) { 1907880cb3cdSMarc Zyngier list_del(&range->entry); 1908880cb3cdSMarc Zyngier kfree(range); 1909880cb3cdSMarc Zyngier } 1910880cb3cdSMarc Zyngier 1911880cb3cdSMarc Zyngier err = 0; 1912880cb3cdSMarc Zyngier break; 1913880cb3cdSMarc Zyngier } 1914880cb3cdSMarc Zyngier } 1915880cb3cdSMarc Zyngier 1916880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1917880cb3cdSMarc Zyngier 1918880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 1919880cb3cdSMarc Zyngier return err; 1920880cb3cdSMarc Zyngier } 1921880cb3cdSMarc Zyngier 192212eade12SRasmus Villemoes static void merge_lpi_ranges(struct lpi_range *a, struct lpi_range *b) 192312eade12SRasmus Villemoes { 192412eade12SRasmus Villemoes if (&a->entry == &lpi_range_list || &b->entry == &lpi_range_list) 192512eade12SRasmus Villemoes return; 192612eade12SRasmus Villemoes if (a->base_id + a->span != b->base_id) 192712eade12SRasmus Villemoes return; 192812eade12SRasmus Villemoes b->base_id = a->base_id; 192912eade12SRasmus Villemoes b->span += a->span; 193012eade12SRasmus Villemoes list_del(&a->entry); 193112eade12SRasmus Villemoes kfree(a); 193212eade12SRasmus Villemoes } 193312eade12SRasmus Villemoes 1934880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 1935880cb3cdSMarc Zyngier { 193612eade12SRasmus Villemoes struct lpi_range *new, *old; 1937880cb3cdSMarc Zyngier 1938880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 1939b31a3838SRasmus Villemoes if (!new) 1940b31a3838SRasmus Villemoes return -ENOMEM; 1941880cb3cdSMarc Zyngier 1942880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1943880cb3cdSMarc Zyngier 194412eade12SRasmus Villemoes list_for_each_entry_reverse(old, &lpi_range_list, entry) { 194512eade12SRasmus Villemoes if (old->base_id < base) 194612eade12SRasmus Villemoes break; 1947880cb3cdSMarc Zyngier } 194812eade12SRasmus Villemoes /* 194912eade12SRasmus Villemoes * old is the last element with ->base_id smaller than base, 195012eade12SRasmus Villemoes * so new goes right after it. If there are no elements with 195112eade12SRasmus Villemoes * ->base_id smaller than base, &old->entry ends up pointing 195212eade12SRasmus Villemoes * at the head of the list, and inserting new it the start of 195312eade12SRasmus Villemoes * the list is the right thing to do in that case as well. 195412eade12SRasmus Villemoes */ 195512eade12SRasmus Villemoes list_add(&new->entry, &old->entry); 195612eade12SRasmus Villemoes /* 195712eade12SRasmus Villemoes * Now check if we can merge with the preceding and/or 195812eade12SRasmus Villemoes * following ranges. 195912eade12SRasmus Villemoes */ 196012eade12SRasmus Villemoes merge_lpi_ranges(old, new); 196112eade12SRasmus Villemoes merge_lpi_ranges(new, list_next_entry(new, entry)); 1962880cb3cdSMarc Zyngier 1963880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1964b31a3838SRasmus Villemoes return 0; 1965bf9529f8SMarc Zyngier } 1966bf9529f8SMarc Zyngier 196704a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1968bf9529f8SMarc Zyngier { 1969880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 197012b2905aSMarc Zyngier u32 numlpis; 1971880cb3cdSMarc Zyngier int err; 1972bf9529f8SMarc Zyngier 197312b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 197412b2905aSMarc Zyngier 197512b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 197612b2905aSMarc Zyngier lpis = numlpis; 197712b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 197812b2905aSMarc Zyngier lpis); 197912b2905aSMarc Zyngier } 198012b2905aSMarc Zyngier 1981880cb3cdSMarc Zyngier /* 1982880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 1983880cb3cdSMarc Zyngier * full range of LPIs. 1984880cb3cdSMarc Zyngier */ 1985880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 1986880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 1987880cb3cdSMarc Zyngier return err; 1988bf9529f8SMarc Zyngier } 1989bf9529f8SMarc Zyngier 199038dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 1991bf9529f8SMarc Zyngier { 1992bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1993880cb3cdSMarc Zyngier int err = 0; 1994bf9529f8SMarc Zyngier 1995bf9529f8SMarc Zyngier do { 199638dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 1997880cb3cdSMarc Zyngier if (!err) 1998bf9529f8SMarc Zyngier break; 1999bf9529f8SMarc Zyngier 200038dd7c49SMarc Zyngier nr_irqs /= 2; 200138dd7c49SMarc Zyngier } while (nr_irqs > 0); 2002bf9529f8SMarc Zyngier 200345725e0fSMarc Zyngier if (!nr_irqs) 200445725e0fSMarc Zyngier err = -ENOSPC; 200545725e0fSMarc Zyngier 2006880cb3cdSMarc Zyngier if (err) 2007bf9529f8SMarc Zyngier goto out; 2008bf9529f8SMarc Zyngier 200938dd7c49SMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_irqs), sizeof (long), GFP_ATOMIC); 2010bf9529f8SMarc Zyngier if (!bitmap) 2011bf9529f8SMarc Zyngier goto out; 2012bf9529f8SMarc Zyngier 201338dd7c49SMarc Zyngier *nr_ids = nr_irqs; 2014bf9529f8SMarc Zyngier 2015bf9529f8SMarc Zyngier out: 2016c8415b94SMarc Zyngier if (!bitmap) 2017c8415b94SMarc Zyngier *base = *nr_ids = 0; 2018c8415b94SMarc Zyngier 2019bf9529f8SMarc Zyngier return bitmap; 2020bf9529f8SMarc Zyngier } 2021bf9529f8SMarc Zyngier 202238dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 2023bf9529f8SMarc Zyngier { 2024880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 2025cf2be8baSMarc Zyngier kfree(bitmap); 2026bf9529f8SMarc Zyngier } 20271ac19ca6SMarc Zyngier 2028053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 2029053be485SMarc Zyngier { 2030053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 2031053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 2032053be485SMarc Zyngier 2033053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 2034053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 2035053be485SMarc Zyngier } 2036053be485SMarc Zyngier 20370e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 20380e5ccf91SMarc Zyngier { 20390e5ccf91SMarc Zyngier struct page *prop_page; 20401ac19ca6SMarc Zyngier 20410e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 20420e5ccf91SMarc Zyngier if (!prop_page) 20430e5ccf91SMarc Zyngier return NULL; 20440e5ccf91SMarc Zyngier 2045053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 20460e5ccf91SMarc Zyngier 20470e5ccf91SMarc Zyngier return prop_page; 20480e5ccf91SMarc Zyngier } 20490e5ccf91SMarc Zyngier 20507d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 20517d75bbb4SMarc Zyngier { 20527d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 20537d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 20547d75bbb4SMarc Zyngier } 20551ac19ca6SMarc Zyngier 20565e2c9f9aSMarc Zyngier static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) 20575e2c9f9aSMarc Zyngier { 20585e2c9f9aSMarc Zyngier phys_addr_t start, end, addr_end; 20595e2c9f9aSMarc Zyngier u64 i; 20605e2c9f9aSMarc Zyngier 20615e2c9f9aSMarc Zyngier /* 20625e2c9f9aSMarc Zyngier * We don't bother checking for a kdump kernel as by 20635e2c9f9aSMarc Zyngier * construction, the LPI tables are out of this kernel's 20645e2c9f9aSMarc Zyngier * memory map. 20655e2c9f9aSMarc Zyngier */ 20665e2c9f9aSMarc Zyngier if (is_kdump_kernel()) 20675e2c9f9aSMarc Zyngier return true; 20685e2c9f9aSMarc Zyngier 20695e2c9f9aSMarc Zyngier addr_end = addr + size - 1; 20705e2c9f9aSMarc Zyngier 20715e2c9f9aSMarc Zyngier for_each_reserved_mem_region(i, &start, &end) { 20725e2c9f9aSMarc Zyngier if (addr >= start && addr_end <= end) 20735e2c9f9aSMarc Zyngier return true; 20745e2c9f9aSMarc Zyngier } 20755e2c9f9aSMarc Zyngier 20765e2c9f9aSMarc Zyngier /* Not found, not a good sign... */ 20775e2c9f9aSMarc Zyngier pr_warn("GICv3: Expected reserved range [%pa:%pa], not found\n", 20785e2c9f9aSMarc Zyngier &addr, &addr_end); 20795e2c9f9aSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 20805e2c9f9aSMarc Zyngier return false; 20815e2c9f9aSMarc Zyngier } 20825e2c9f9aSMarc Zyngier 20833fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 20843fb68faeSMarc Zyngier { 20853fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 20863fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 20873fb68faeSMarc Zyngier 20883fb68faeSMarc Zyngier return 0; 20893fb68faeSMarc Zyngier } 20903fb68faeSMarc Zyngier 209111e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 20921ac19ca6SMarc Zyngier { 2093c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 2094c440a9d9SMarc Zyngier u64 val; 2095c440a9d9SMarc Zyngier 2096c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 2097c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 2098c440a9d9SMarc Zyngier 2099c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 2100c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 2101c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 2102c440a9d9SMarc Zyngier MEMREMAP_WB); 2103c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 2104c440a9d9SMarc Zyngier } else { 2105e1a2e201SMarc Zyngier struct page *page; 21061ac19ca6SMarc Zyngier 2107c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 2108c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 21094cb205c0SJia He ITS_MAX_LPI_NRBITS); 2110e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 2111e1a2e201SMarc Zyngier if (!page) { 21121ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 21131ac19ca6SMarc Zyngier return -ENOMEM; 21141ac19ca6SMarc Zyngier } 21151ac19ca6SMarc Zyngier 2116e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 2117e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 21183fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 21193fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 2120c440a9d9SMarc Zyngier } 2121e1a2e201SMarc Zyngier 2122e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 2123e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 21241ac19ca6SMarc Zyngier 21256c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 21261ac19ca6SMarc Zyngier } 21271ac19ca6SMarc Zyngier 21281ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 21291ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 21301ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 21314f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 21321ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 21331ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 21341ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 21351ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 21361ac19ca6SMarc Zyngier }; 21371ac19ca6SMarc Zyngier 21382d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 21392d81d425SShanker Donthineni { 21402d81d425SShanker Donthineni u32 idx = baser - its->tables; 21412d81d425SShanker Donthineni 21420968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 21432d81d425SShanker Donthineni } 21442d81d425SShanker Donthineni 21452d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 21462d81d425SShanker Donthineni u64 val) 21472d81d425SShanker Donthineni { 21482d81d425SShanker Donthineni u32 idx = baser - its->tables; 21492d81d425SShanker Donthineni 21500968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 21512d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 21522d81d425SShanker Donthineni } 21532d81d425SShanker Donthineni 21549347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 2155d5df9dc9SMarc Zyngier u64 cache, u64 shr, u32 order, bool indirect) 21569347359aSShanker Donthineni { 21579347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 21589347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 21599347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 216030ae9610SShanker Donthineni u64 baser_phys, tmp; 2161d5df9dc9SMarc Zyngier u32 alloc_pages, psz; 2162539d3782SShanker Donthineni struct page *page; 21639347359aSShanker Donthineni void *base; 21649347359aSShanker Donthineni 2165d5df9dc9SMarc Zyngier psz = baser->psz; 21669347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 21679347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 21689347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 21699347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 21709347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 21719347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 21729347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 21739347359aSShanker Donthineni } 21749347359aSShanker Donthineni 2175539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); 2176539d3782SShanker Donthineni if (!page) 21779347359aSShanker Donthineni return -ENOMEM; 21789347359aSShanker Donthineni 2179539d3782SShanker Donthineni base = (void *)page_address(page); 218030ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 218130ae9610SShanker Donthineni 218230ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 218330ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 218430ae9610SShanker Donthineni 218530ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 218630ae9610SShanker Donthineni if (psz != SZ_64K) { 218730ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 218830ae9610SShanker Donthineni free_pages((unsigned long)base, order); 218930ae9610SShanker Donthineni return -ENXIO; 219030ae9610SShanker Donthineni } 219130ae9610SShanker Donthineni 219230ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 219330ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 219430ae9610SShanker Donthineni } 219530ae9610SShanker Donthineni 21969347359aSShanker Donthineni retry_baser: 219730ae9610SShanker Donthineni val = (baser_phys | 21989347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 21999347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 22009347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 22019347359aSShanker Donthineni cache | 22029347359aSShanker Donthineni shr | 22039347359aSShanker Donthineni GITS_BASER_VALID); 22049347359aSShanker Donthineni 22053faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 22063faf24eaSShanker Donthineni 22079347359aSShanker Donthineni switch (psz) { 22089347359aSShanker Donthineni case SZ_4K: 22099347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 22109347359aSShanker Donthineni break; 22119347359aSShanker Donthineni case SZ_16K: 22129347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 22139347359aSShanker Donthineni break; 22149347359aSShanker Donthineni case SZ_64K: 22159347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 22169347359aSShanker Donthineni break; 22179347359aSShanker Donthineni } 22189347359aSShanker Donthineni 22199347359aSShanker Donthineni its_write_baser(its, baser, val); 22209347359aSShanker Donthineni tmp = baser->val; 22219347359aSShanker Donthineni 22229347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 22239347359aSShanker Donthineni /* 22249347359aSShanker Donthineni * Shareability didn't stick. Just use 22259347359aSShanker Donthineni * whatever the read reported, which is likely 22269347359aSShanker Donthineni * to be the only thing this redistributor 22279347359aSShanker Donthineni * supports. If that's zero, make it 22289347359aSShanker Donthineni * non-cacheable as well. 22299347359aSShanker Donthineni */ 22309347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 22319347359aSShanker Donthineni if (!shr) { 22329347359aSShanker Donthineni cache = GITS_BASER_nC; 2233328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 22349347359aSShanker Donthineni } 22359347359aSShanker Donthineni goto retry_baser; 22369347359aSShanker Donthineni } 22379347359aSShanker Donthineni 22389347359aSShanker Donthineni if (val != tmp) { 2239b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 22409347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 2241b11283ebSVladimir Murzin val, tmp); 22429347359aSShanker Donthineni free_pages((unsigned long)base, order); 22439347359aSShanker Donthineni return -ENXIO; 22449347359aSShanker Donthineni } 22459347359aSShanker Donthineni 22469347359aSShanker Donthineni baser->order = order; 22479347359aSShanker Donthineni baser->base = base; 22489347359aSShanker Donthineni baser->psz = psz; 22493faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 22509347359aSShanker Donthineni 22513faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 2252d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 22539347359aSShanker Donthineni its_base_type_string[type], 22549347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 22553faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 22569347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 22579347359aSShanker Donthineni 22589347359aSShanker Donthineni return 0; 22599347359aSShanker Donthineni } 22609347359aSShanker Donthineni 22614cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 22624cacac57SMarc Zyngier struct its_baser *baser, 2263d5df9dc9SMarc Zyngier u32 *order, u32 ids) 22644b75c459SShanker Donthineni { 22654cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 22664cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 22674cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 22682fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 22694b75c459SShanker Donthineni u32 new_order = *order; 2270d5df9dc9SMarc Zyngier u32 psz = baser->psz; 22713faf24eaSShanker Donthineni bool indirect = false; 22723faf24eaSShanker Donthineni 22733faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 22743faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 22753faf24eaSShanker Donthineni /* 22763faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 22773faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 22783faf24eaSShanker Donthineni */ 22793faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 22803faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 22813faf24eaSShanker Donthineni 22823faf24eaSShanker Donthineni if (indirect) { 22833faf24eaSShanker Donthineni /* 22843faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 22853faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 22863faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 22873faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 22883faf24eaSShanker Donthineni * entry size. 22893faf24eaSShanker Donthineni */ 2290d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 22913faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 22923faf24eaSShanker Donthineni } 22933faf24eaSShanker Donthineni } 22944b75c459SShanker Donthineni 22954b75c459SShanker Donthineni /* 22964b75c459SShanker Donthineni * Allocate as many entries as required to fit the 22974b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 22984b75c459SShanker Donthineni * space being incredibly sparse, this results in a 22993faf24eaSShanker Donthineni * massive waste of memory if two-level device table 23003faf24eaSShanker Donthineni * feature is not supported by hardware. 23014b75c459SShanker Donthineni */ 23024b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 23034b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 23044b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 2305d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 2306576a8342SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", 23074cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 2308576a8342SMarc Zyngier device_ids(its), ids); 23094b75c459SShanker Donthineni } 23104b75c459SShanker Donthineni 23114b75c459SShanker Donthineni *order = new_order; 23123faf24eaSShanker Donthineni 23133faf24eaSShanker Donthineni return indirect; 23144b75c459SShanker Donthineni } 23154b75c459SShanker Donthineni 23165e516846SMarc Zyngier static u32 compute_common_aff(u64 val) 23175e516846SMarc Zyngier { 23185e516846SMarc Zyngier u32 aff, clpiaff; 23195e516846SMarc Zyngier 23205e516846SMarc Zyngier aff = FIELD_GET(GICR_TYPER_AFFINITY, val); 23215e516846SMarc Zyngier clpiaff = FIELD_GET(GICR_TYPER_COMMON_LPI_AFF, val); 23225e516846SMarc Zyngier 23235e516846SMarc Zyngier return aff & ~(GENMASK(31, 0) >> (clpiaff * 8)); 23245e516846SMarc Zyngier } 23255e516846SMarc Zyngier 23265e516846SMarc Zyngier static u32 compute_its_aff(struct its_node *its) 23275e516846SMarc Zyngier { 23285e516846SMarc Zyngier u64 val; 23295e516846SMarc Zyngier u32 svpet; 23305e516846SMarc Zyngier 23315e516846SMarc Zyngier /* 23325e516846SMarc Zyngier * Reencode the ITS SVPET and MPIDR as a GICR_TYPER, and compute 23335e516846SMarc Zyngier * the resulting affinity. We then use that to see if this match 23345e516846SMarc Zyngier * our own affinity. 23355e516846SMarc Zyngier */ 23365e516846SMarc Zyngier svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); 23375e516846SMarc Zyngier val = FIELD_PREP(GICR_TYPER_COMMON_LPI_AFF, svpet); 23385e516846SMarc Zyngier val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); 23395e516846SMarc Zyngier return compute_common_aff(val); 23405e516846SMarc Zyngier } 23415e516846SMarc Zyngier 23425e516846SMarc Zyngier static struct its_node *find_sibling_its(struct its_node *cur_its) 23435e516846SMarc Zyngier { 23445e516846SMarc Zyngier struct its_node *its; 23455e516846SMarc Zyngier u32 aff; 23465e516846SMarc Zyngier 23475e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, cur_its->typer)) 23485e516846SMarc Zyngier return NULL; 23495e516846SMarc Zyngier 23505e516846SMarc Zyngier aff = compute_its_aff(cur_its); 23515e516846SMarc Zyngier 23525e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 23535e516846SMarc Zyngier u64 baser; 23545e516846SMarc Zyngier 23555e516846SMarc Zyngier if (!is_v4_1(its) || its == cur_its) 23565e516846SMarc Zyngier continue; 23575e516846SMarc Zyngier 23585e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 23595e516846SMarc Zyngier continue; 23605e516846SMarc Zyngier 23615e516846SMarc Zyngier if (aff != compute_its_aff(its)) 23625e516846SMarc Zyngier continue; 23635e516846SMarc Zyngier 23645e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 23655e516846SMarc Zyngier baser = its->tables[2].val; 23665e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 23675e516846SMarc Zyngier continue; 23685e516846SMarc Zyngier 23695e516846SMarc Zyngier return its; 23705e516846SMarc Zyngier } 23715e516846SMarc Zyngier 23725e516846SMarc Zyngier return NULL; 23735e516846SMarc Zyngier } 23745e516846SMarc Zyngier 23751ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 23761ac19ca6SMarc Zyngier { 23771ac19ca6SMarc Zyngier int i; 23781ac19ca6SMarc Zyngier 23791ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 23801a485f4dSShanker Donthineni if (its->tables[i].base) { 23811a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 23821a485f4dSShanker Donthineni its->tables[i].order); 23831a485f4dSShanker Donthineni its->tables[i].base = NULL; 23841ac19ca6SMarc Zyngier } 23851ac19ca6SMarc Zyngier } 23861ac19ca6SMarc Zyngier } 23871ac19ca6SMarc Zyngier 2388d5df9dc9SMarc Zyngier static int its_probe_baser_psz(struct its_node *its, struct its_baser *baser) 2389d5df9dc9SMarc Zyngier { 2390d5df9dc9SMarc Zyngier u64 psz = SZ_64K; 2391d5df9dc9SMarc Zyngier 2392d5df9dc9SMarc Zyngier while (psz) { 2393d5df9dc9SMarc Zyngier u64 val, gpsz; 2394d5df9dc9SMarc Zyngier 2395d5df9dc9SMarc Zyngier val = its_read_baser(its, baser); 2396d5df9dc9SMarc Zyngier val &= ~GITS_BASER_PAGE_SIZE_MASK; 2397d5df9dc9SMarc Zyngier 2398d5df9dc9SMarc Zyngier switch (psz) { 2399d5df9dc9SMarc Zyngier case SZ_64K: 2400d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_64K; 2401d5df9dc9SMarc Zyngier break; 2402d5df9dc9SMarc Zyngier case SZ_16K: 2403d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_16K; 2404d5df9dc9SMarc Zyngier break; 2405d5df9dc9SMarc Zyngier case SZ_4K: 2406d5df9dc9SMarc Zyngier default: 2407d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_4K; 2408d5df9dc9SMarc Zyngier break; 2409d5df9dc9SMarc Zyngier } 2410d5df9dc9SMarc Zyngier 2411d5df9dc9SMarc Zyngier gpsz >>= GITS_BASER_PAGE_SIZE_SHIFT; 2412d5df9dc9SMarc Zyngier 2413d5df9dc9SMarc Zyngier val |= FIELD_PREP(GITS_BASER_PAGE_SIZE_MASK, gpsz); 2414d5df9dc9SMarc Zyngier its_write_baser(its, baser, val); 2415d5df9dc9SMarc Zyngier 2416d5df9dc9SMarc Zyngier if (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser->val) == gpsz) 2417d5df9dc9SMarc Zyngier break; 2418d5df9dc9SMarc Zyngier 2419d5df9dc9SMarc Zyngier switch (psz) { 2420d5df9dc9SMarc Zyngier case SZ_64K: 2421d5df9dc9SMarc Zyngier psz = SZ_16K; 2422d5df9dc9SMarc Zyngier break; 2423d5df9dc9SMarc Zyngier case SZ_16K: 2424d5df9dc9SMarc Zyngier psz = SZ_4K; 2425d5df9dc9SMarc Zyngier break; 2426d5df9dc9SMarc Zyngier case SZ_4K: 2427d5df9dc9SMarc Zyngier default: 2428d5df9dc9SMarc Zyngier return -1; 2429d5df9dc9SMarc Zyngier } 2430d5df9dc9SMarc Zyngier } 2431d5df9dc9SMarc Zyngier 2432d5df9dc9SMarc Zyngier baser->psz = psz; 2433d5df9dc9SMarc Zyngier return 0; 2434d5df9dc9SMarc Zyngier } 2435d5df9dc9SMarc Zyngier 24360e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 24371ac19ca6SMarc Zyngier { 24381ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 24392fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 24409347359aSShanker Donthineni int err, i; 244194100970SRobert Richter 2442fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 2443fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 24449347359aSShanker Donthineni cache = GITS_BASER_nCnB; 2445466b7d16SShanker Donthineni 24461ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 24472d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 24482d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 24491ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 24503faf24eaSShanker Donthineni bool indirect = false; 2451d5df9dc9SMarc Zyngier u32 order; 24521ac19ca6SMarc Zyngier 2453d5df9dc9SMarc Zyngier if (type == GITS_BASER_TYPE_NONE) 24541ac19ca6SMarc Zyngier continue; 24551ac19ca6SMarc Zyngier 2456d5df9dc9SMarc Zyngier if (its_probe_baser_psz(its, baser)) { 2457d5df9dc9SMarc Zyngier its_free_tables(its); 2458d5df9dc9SMarc Zyngier return -ENXIO; 2459d5df9dc9SMarc Zyngier } 2460d5df9dc9SMarc Zyngier 2461d5df9dc9SMarc Zyngier order = get_order(baser->psz); 2462d5df9dc9SMarc Zyngier 2463d5df9dc9SMarc Zyngier switch (type) { 24644cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 2465d5df9dc9SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, &order, 2466576a8342SMarc Zyngier device_ids(its)); 24678d565748SZenghui Yu break; 24688d565748SZenghui Yu 24694cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 24705e516846SMarc Zyngier if (is_v4_1(its)) { 24715e516846SMarc Zyngier struct its_node *sibling; 24725e516846SMarc Zyngier 24735e516846SMarc Zyngier WARN_ON(i != 2); 24745e516846SMarc Zyngier if ((sibling = find_sibling_its(its))) { 24755e516846SMarc Zyngier *baser = sibling->tables[2]; 24765e516846SMarc Zyngier its_write_baser(its, baser, baser->val); 24775e516846SMarc Zyngier continue; 24785e516846SMarc Zyngier } 24795e516846SMarc Zyngier } 24805e516846SMarc Zyngier 2481d5df9dc9SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, &order, 248232bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 24834cacac57SMarc Zyngier break; 24844cacac57SMarc Zyngier } 2485f54b97edSMarc Zyngier 2486d5df9dc9SMarc Zyngier err = its_setup_baser(its, baser, cache, shr, order, indirect); 24879347359aSShanker Donthineni if (err < 0) { 24889347359aSShanker Donthineni its_free_tables(its); 24899347359aSShanker Donthineni return err; 249030f21363SRobert Richter } 249130f21363SRobert Richter 24929347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 24939347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 24949347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 24951ac19ca6SMarc Zyngier } 24961ac19ca6SMarc Zyngier 24971ac19ca6SMarc Zyngier return 0; 24981ac19ca6SMarc Zyngier } 24991ac19ca6SMarc Zyngier 25005e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_its(void) 25015e516846SMarc Zyngier { 25025e516846SMarc Zyngier struct its_node *its; 25035e516846SMarc Zyngier u64 val; 25045e516846SMarc Zyngier u32 aff; 25055e516846SMarc Zyngier 25065e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 25075e516846SMarc Zyngier aff = compute_common_aff(val); 25085e516846SMarc Zyngier 25095e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 25105e516846SMarc Zyngier u64 baser, addr; 25115e516846SMarc Zyngier 25125e516846SMarc Zyngier if (!is_v4_1(its)) 25135e516846SMarc Zyngier continue; 25145e516846SMarc Zyngier 25155e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 25165e516846SMarc Zyngier continue; 25175e516846SMarc Zyngier 25185e516846SMarc Zyngier if (aff != compute_its_aff(its)) 25195e516846SMarc Zyngier continue; 25205e516846SMarc Zyngier 25215e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 25225e516846SMarc Zyngier baser = its->tables[2].val; 25235e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 25245e516846SMarc Zyngier continue; 25255e516846SMarc Zyngier 25265e516846SMarc Zyngier /* We have a winner! */ 25278b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = its->tables[2].base; 25288b718d40SZenghui Yu 25295e516846SMarc Zyngier val = GICR_VPROPBASER_4_1_VALID; 25305e516846SMarc Zyngier if (baser & GITS_BASER_INDIRECT) 25315e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 25325e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, 25335e516846SMarc Zyngier FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)); 25345e516846SMarc Zyngier switch (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)) { 25355e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 25365e516846SMarc Zyngier addr = GITS_BASER_ADDR_48_to_52(baser); 25375e516846SMarc Zyngier break; 25385e516846SMarc Zyngier default: 25395e516846SMarc Zyngier addr = baser & GENMASK_ULL(47, 12); 25405e516846SMarc Zyngier break; 25415e516846SMarc Zyngier } 25425e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, addr >> 12); 25435e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_SHAREABILITY_MASK, 25445e516846SMarc Zyngier FIELD_GET(GITS_BASER_SHAREABILITY_MASK, baser)); 25455e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_INNER_CACHEABILITY_MASK, 25465e516846SMarc Zyngier FIELD_GET(GITS_BASER_INNER_CACHEABILITY_MASK, baser)); 25475e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, GITS_BASER_NR_PAGES(baser) - 1); 25485e516846SMarc Zyngier 25495e516846SMarc Zyngier return val; 25505e516846SMarc Zyngier } 25515e516846SMarc Zyngier 25525e516846SMarc Zyngier return 0; 25535e516846SMarc Zyngier } 25545e516846SMarc Zyngier 25555e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_rd(cpumask_t **mask) 25565e516846SMarc Zyngier { 25575e516846SMarc Zyngier u32 aff; 25585e516846SMarc Zyngier u64 val; 25595e516846SMarc Zyngier int cpu; 25605e516846SMarc Zyngier 25615e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 25625e516846SMarc Zyngier aff = compute_common_aff(val); 25635e516846SMarc Zyngier 25645e516846SMarc Zyngier for_each_possible_cpu(cpu) { 25655e516846SMarc Zyngier void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 25665e516846SMarc Zyngier 25675e516846SMarc Zyngier if (!base || cpu == smp_processor_id()) 25685e516846SMarc Zyngier continue; 25695e516846SMarc Zyngier 25705e516846SMarc Zyngier val = gic_read_typer(base + GICR_TYPER); 25714bccf1d7SZenghui Yu if (aff != compute_common_aff(val)) 25725e516846SMarc Zyngier continue; 25735e516846SMarc Zyngier 25745e516846SMarc Zyngier /* 25755e516846SMarc Zyngier * At this point, we have a victim. This particular CPU 25765e516846SMarc Zyngier * has already booted, and has an affinity that matches 25775e516846SMarc Zyngier * ours wrt CommonLPIAff. Let's use its own VPROPBASER. 25785e516846SMarc Zyngier * Make sure we don't write the Z bit in that case. 25795e516846SMarc Zyngier */ 25805186a6ccSZenghui Yu val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 25815e516846SMarc Zyngier val &= ~GICR_VPROPBASER_4_1_Z; 25825e516846SMarc Zyngier 25838b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = gic_data_rdist_cpu(cpu)->vpe_l1_base; 25845e516846SMarc Zyngier *mask = gic_data_rdist_cpu(cpu)->vpe_table_mask; 25855e516846SMarc Zyngier 25865e516846SMarc Zyngier return val; 25875e516846SMarc Zyngier } 25885e516846SMarc Zyngier 25895e516846SMarc Zyngier return 0; 25905e516846SMarc Zyngier } 25915e516846SMarc Zyngier 25924e6437f1SZenghui Yu static bool allocate_vpe_l2_table(int cpu, u32 id) 25934e6437f1SZenghui Yu { 25944e6437f1SZenghui Yu void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 2595490d332eSMarc Zyngier unsigned int psz, esz, idx, npg, gpsz; 2596490d332eSMarc Zyngier u64 val; 25974e6437f1SZenghui Yu struct page *page; 25984e6437f1SZenghui Yu __le64 *table; 25994e6437f1SZenghui Yu 26004e6437f1SZenghui Yu if (!gic_rdists->has_rvpeid) 26014e6437f1SZenghui Yu return true; 26024e6437f1SZenghui Yu 260328d160deSMarc Zyngier /* Skip non-present CPUs */ 260428d160deSMarc Zyngier if (!base) 260528d160deSMarc Zyngier return true; 260628d160deSMarc Zyngier 26075186a6ccSZenghui Yu val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 26084e6437f1SZenghui Yu 26094e6437f1SZenghui Yu esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val) + 1; 26104e6437f1SZenghui Yu gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 26114e6437f1SZenghui Yu npg = FIELD_GET(GICR_VPROPBASER_4_1_SIZE, val) + 1; 26124e6437f1SZenghui Yu 26134e6437f1SZenghui Yu switch (gpsz) { 26144e6437f1SZenghui Yu default: 26154e6437f1SZenghui Yu WARN_ON(1); 26164e6437f1SZenghui Yu /* fall through */ 26174e6437f1SZenghui Yu case GIC_PAGE_SIZE_4K: 26184e6437f1SZenghui Yu psz = SZ_4K; 26194e6437f1SZenghui Yu break; 26204e6437f1SZenghui Yu case GIC_PAGE_SIZE_16K: 26214e6437f1SZenghui Yu psz = SZ_16K; 26224e6437f1SZenghui Yu break; 26234e6437f1SZenghui Yu case GIC_PAGE_SIZE_64K: 26244e6437f1SZenghui Yu psz = SZ_64K; 26254e6437f1SZenghui Yu break; 26264e6437f1SZenghui Yu } 26274e6437f1SZenghui Yu 26284e6437f1SZenghui Yu /* Don't allow vpe_id that exceeds single, flat table limit */ 26294e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_4_1_INDIRECT)) 26304e6437f1SZenghui Yu return (id < (npg * psz / (esz * SZ_8))); 26314e6437f1SZenghui Yu 26324e6437f1SZenghui Yu /* Compute 1st level table index & check if that exceeds table limit */ 26334e6437f1SZenghui Yu idx = id >> ilog2(psz / (esz * SZ_8)); 26344e6437f1SZenghui Yu if (idx >= (npg * psz / GITS_LVL1_ENTRY_SIZE)) 26354e6437f1SZenghui Yu return false; 26364e6437f1SZenghui Yu 26374e6437f1SZenghui Yu table = gic_data_rdist_cpu(cpu)->vpe_l1_base; 26384e6437f1SZenghui Yu 26394e6437f1SZenghui Yu /* Allocate memory for 2nd level table */ 26404e6437f1SZenghui Yu if (!table[idx]) { 26414e6437f1SZenghui Yu page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(psz)); 26424e6437f1SZenghui Yu if (!page) 26434e6437f1SZenghui Yu return false; 26444e6437f1SZenghui Yu 26454e6437f1SZenghui Yu /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 26464e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_SHAREABILITY_MASK)) 26474e6437f1SZenghui Yu gic_flush_dcache_to_poc(page_address(page), psz); 26484e6437f1SZenghui Yu 26494e6437f1SZenghui Yu table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 26504e6437f1SZenghui Yu 26514e6437f1SZenghui Yu /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 26524e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_SHAREABILITY_MASK)) 26534e6437f1SZenghui Yu gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 26544e6437f1SZenghui Yu 26554e6437f1SZenghui Yu /* Ensure updated table contents are visible to RD hardware */ 26564e6437f1SZenghui Yu dsb(sy); 26574e6437f1SZenghui Yu } 26584e6437f1SZenghui Yu 26594e6437f1SZenghui Yu return true; 26604e6437f1SZenghui Yu } 26614e6437f1SZenghui Yu 26625e516846SMarc Zyngier static int allocate_vpe_l1_table(void) 26635e516846SMarc Zyngier { 26645e516846SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 26655e516846SMarc Zyngier u64 val, gpsz, npg, pa; 26665e516846SMarc Zyngier unsigned int psz = SZ_64K; 26675e516846SMarc Zyngier unsigned int np, epp, esz; 26685e516846SMarc Zyngier struct page *page; 26695e516846SMarc Zyngier 26705e516846SMarc Zyngier if (!gic_rdists->has_rvpeid) 26715e516846SMarc Zyngier return 0; 26725e516846SMarc Zyngier 26735e516846SMarc Zyngier /* 26745e516846SMarc Zyngier * if VPENDBASER.Valid is set, disable any previously programmed 26755e516846SMarc Zyngier * VPE by setting PendingLast while clearing Valid. This has the 26765e516846SMarc Zyngier * effect of making sure no doorbell will be generated and we can 26775e516846SMarc Zyngier * then safely clear VPROPBASER.Valid. 26785e516846SMarc Zyngier */ 26795186a6ccSZenghui Yu if (gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER) & GICR_VPENDBASER_Valid) 26805186a6ccSZenghui Yu gicr_write_vpendbaser(GICR_VPENDBASER_PendingLast, 26815e516846SMarc Zyngier vlpi_base + GICR_VPENDBASER); 26825e516846SMarc Zyngier 26835e516846SMarc Zyngier /* 26845e516846SMarc Zyngier * If we can inherit the configuration from another RD, let's do 26855e516846SMarc Zyngier * so. Otherwise, we have to go through the allocation process. We 26865e516846SMarc Zyngier * assume that all RDs have the exact same requirements, as 26875e516846SMarc Zyngier * nothing will work otherwise. 26885e516846SMarc Zyngier */ 26895e516846SMarc Zyngier val = inherit_vpe_l1_table_from_rd(&gic_data_rdist()->vpe_table_mask); 26905e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 26915e516846SMarc Zyngier goto out; 26925e516846SMarc Zyngier 26935e516846SMarc Zyngier gic_data_rdist()->vpe_table_mask = kzalloc(sizeof(cpumask_t), GFP_KERNEL); 26945e516846SMarc Zyngier if (!gic_data_rdist()->vpe_table_mask) 26955e516846SMarc Zyngier return -ENOMEM; 26965e516846SMarc Zyngier 26975e516846SMarc Zyngier val = inherit_vpe_l1_table_from_its(); 26985e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 26995e516846SMarc Zyngier goto out; 27005e516846SMarc Zyngier 27015e516846SMarc Zyngier /* First probe the page size */ 27025e516846SMarc Zyngier val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K); 27035186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 27045186a6ccSZenghui Yu val = gicr_read_vpropbaser(vlpi_base + GICR_VPROPBASER); 27055e516846SMarc Zyngier gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 27065e516846SMarc Zyngier esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val); 27075e516846SMarc Zyngier 27085e516846SMarc Zyngier switch (gpsz) { 27095e516846SMarc Zyngier default: 27105e516846SMarc Zyngier gpsz = GIC_PAGE_SIZE_4K; 27115e516846SMarc Zyngier /* fall through */ 27125e516846SMarc Zyngier case GIC_PAGE_SIZE_4K: 27135e516846SMarc Zyngier psz = SZ_4K; 27145e516846SMarc Zyngier break; 27155e516846SMarc Zyngier case GIC_PAGE_SIZE_16K: 27165e516846SMarc Zyngier psz = SZ_16K; 27175e516846SMarc Zyngier break; 27185e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 27195e516846SMarc Zyngier psz = SZ_64K; 27205e516846SMarc Zyngier break; 27215e516846SMarc Zyngier } 27225e516846SMarc Zyngier 27235e516846SMarc Zyngier /* 27245e516846SMarc Zyngier * Start populating the register from scratch, including RO fields 27255e516846SMarc Zyngier * (which we want to print in debug cases...) 27265e516846SMarc Zyngier */ 27275e516846SMarc Zyngier val = 0; 27285e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, gpsz); 27295e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ENTRY_SIZE, esz); 27305e516846SMarc Zyngier 27315e516846SMarc Zyngier /* How many entries per GIC page? */ 27325e516846SMarc Zyngier esz++; 27335e516846SMarc Zyngier epp = psz / (esz * SZ_8); 27345e516846SMarc Zyngier 27355e516846SMarc Zyngier /* 27365e516846SMarc Zyngier * If we need more than just a single L1 page, flag the table 27375e516846SMarc Zyngier * as indirect and compute the number of required L1 pages. 27385e516846SMarc Zyngier */ 27395e516846SMarc Zyngier if (epp < ITS_MAX_VPEID) { 27405e516846SMarc Zyngier int nl2; 27415e516846SMarc Zyngier 27425e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 27435e516846SMarc Zyngier 27445e516846SMarc Zyngier /* Number of L2 pages required to cover the VPEID space */ 27455e516846SMarc Zyngier nl2 = DIV_ROUND_UP(ITS_MAX_VPEID, epp); 27465e516846SMarc Zyngier 27475e516846SMarc Zyngier /* Number of L1 pages to point to the L2 pages */ 27485e516846SMarc Zyngier npg = DIV_ROUND_UP(nl2 * SZ_8, psz); 27495e516846SMarc Zyngier } else { 27505e516846SMarc Zyngier npg = 1; 27515e516846SMarc Zyngier } 27525e516846SMarc Zyngier 2753e88bd316SZenghui Yu val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1); 27545e516846SMarc Zyngier 27555e516846SMarc Zyngier /* Right, that's the number of CPU pages we need for L1 */ 27565e516846SMarc Zyngier np = DIV_ROUND_UP(npg * psz, PAGE_SIZE); 27575e516846SMarc Zyngier 27585e516846SMarc Zyngier pr_debug("np = %d, npg = %lld, psz = %d, epp = %d, esz = %d\n", 27595e516846SMarc Zyngier np, npg, psz, epp, esz); 27605e516846SMarc Zyngier page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(np * PAGE_SIZE)); 27615e516846SMarc Zyngier if (!page) 27625e516846SMarc Zyngier return -ENOMEM; 27635e516846SMarc Zyngier 27648b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = page_address(page); 27655e516846SMarc Zyngier pa = virt_to_phys(page_address(page)); 27665e516846SMarc Zyngier WARN_ON(!IS_ALIGNED(pa, psz)); 27675e516846SMarc Zyngier 27685e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, pa >> 12); 27695e516846SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 27705e516846SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 27715e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_Z; 27725e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_VALID; 27735e516846SMarc Zyngier 27745e516846SMarc Zyngier out: 27755186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 27765e516846SMarc Zyngier cpumask_set_cpu(smp_processor_id(), gic_data_rdist()->vpe_table_mask); 27775e516846SMarc Zyngier 27785e516846SMarc Zyngier pr_debug("CPU%d: VPROPBASER = %llx %*pbl\n", 27795e516846SMarc Zyngier smp_processor_id(), val, 27805e516846SMarc Zyngier cpumask_pr_args(gic_data_rdist()->vpe_table_mask)); 27815e516846SMarc Zyngier 27825e516846SMarc Zyngier return 0; 27835e516846SMarc Zyngier } 27845e516846SMarc Zyngier 27851ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 27861ac19ca6SMarc Zyngier { 278783559b47SMarc Zyngier int i; 278883559b47SMarc Zyngier 27896396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 27901ac19ca6SMarc Zyngier GFP_KERNEL); 27911ac19ca6SMarc Zyngier if (!its->collections) 27921ac19ca6SMarc Zyngier return -ENOMEM; 27931ac19ca6SMarc Zyngier 279483559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 279583559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 279683559b47SMarc Zyngier 27971ac19ca6SMarc Zyngier return 0; 27981ac19ca6SMarc Zyngier } 27991ac19ca6SMarc Zyngier 28007c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 28017c297a2dSMarc Zyngier { 28027c297a2dSMarc Zyngier struct page *pend_page; 2803adaab500SMarc Zyngier 28047c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 2805adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 28067c297a2dSMarc Zyngier if (!pend_page) 28077c297a2dSMarc Zyngier return NULL; 28087c297a2dSMarc Zyngier 28097c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 28107c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 28117c297a2dSMarc Zyngier 28127c297a2dSMarc Zyngier return pend_page; 28137c297a2dSMarc Zyngier } 28147c297a2dSMarc Zyngier 28157d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 28167d75bbb4SMarc Zyngier { 2817adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 28187d75bbb4SMarc Zyngier } 28197d75bbb4SMarc Zyngier 2820c6e2ccb6SMarc Zyngier /* 28215e2c9f9aSMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. Any other 28225e2c9f9aSMarc Zyngier * case is wrong in the absence of firmware/EFI support. 2823c6e2ccb6SMarc Zyngier */ 2824c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 2825c440a9d9SMarc Zyngier { 28265e2c9f9aSMarc Zyngier phys_addr_t addr; 28275e2c9f9aSMarc Zyngier u64 val; 2828c6e2ccb6SMarc Zyngier 28295e2c9f9aSMarc Zyngier /* Check whether the property table is in a reserved region */ 28305e2c9f9aSMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 28315e2c9f9aSMarc Zyngier addr = val & GENMASK_ULL(51, 12); 28325e2c9f9aSMarc Zyngier 28335e2c9f9aSMarc Zyngier return gic_check_reserved_range(addr, LPI_PROPBASE_SZ); 2834c440a9d9SMarc Zyngier } 2835c440a9d9SMarc Zyngier 283611e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 283711e37d35SMarc Zyngier { 2838c440a9d9SMarc Zyngier u64 val; 283911e37d35SMarc Zyngier int err, cpu; 284011e37d35SMarc Zyngier 2841c440a9d9SMarc Zyngier /* 2842c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 2843c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 2844c440a9d9SMarc Zyngier */ 2845c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 2846c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 2847c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 2848c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 2849c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 2850c440a9d9SMarc Zyngier } 2851c440a9d9SMarc Zyngier 285211e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 285311e37d35SMarc Zyngier if (err) 285411e37d35SMarc Zyngier return err; 285511e37d35SMarc Zyngier 285611e37d35SMarc Zyngier /* 285711e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 285811e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 285911e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 286011e37d35SMarc Zyngier */ 286111e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 286211e37d35SMarc Zyngier struct page *pend_page; 286311e37d35SMarc Zyngier 286411e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 286511e37d35SMarc Zyngier if (!pend_page) { 286611e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 286711e37d35SMarc Zyngier return -ENOMEM; 286811e37d35SMarc Zyngier } 286911e37d35SMarc Zyngier 287011e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 287111e37d35SMarc Zyngier } 287211e37d35SMarc Zyngier 287311e37d35SMarc Zyngier return 0; 287411e37d35SMarc Zyngier } 287511e37d35SMarc Zyngier 2876e64fab1aSMarc Zyngier static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set) 28776479450fSHeyi Guo { 28786479450fSHeyi Guo u32 count = 1000000; /* 1s! */ 28796479450fSHeyi Guo bool clean; 28806479450fSHeyi Guo u64 val; 28816479450fSHeyi Guo 28825186a6ccSZenghui Yu val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 28836479450fSHeyi Guo val &= ~GICR_VPENDBASER_Valid; 2884e64fab1aSMarc Zyngier val &= ~clr; 2885e64fab1aSMarc Zyngier val |= set; 28865186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 28876479450fSHeyi Guo 28886479450fSHeyi Guo do { 28895186a6ccSZenghui Yu val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 28906479450fSHeyi Guo clean = !(val & GICR_VPENDBASER_Dirty); 28916479450fSHeyi Guo if (!clean) { 28926479450fSHeyi Guo count--; 28936479450fSHeyi Guo cpu_relax(); 28946479450fSHeyi Guo udelay(1); 28956479450fSHeyi Guo } 28966479450fSHeyi Guo } while (!clean && count); 28976479450fSHeyi Guo 2898e64fab1aSMarc Zyngier if (unlikely(val & GICR_VPENDBASER_Dirty)) { 2899e64fab1aSMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2900e64fab1aSMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2901e64fab1aSMarc Zyngier } 2902e64fab1aSMarc Zyngier 29036479450fSHeyi Guo return val; 29046479450fSHeyi Guo } 29056479450fSHeyi Guo 29061ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 29071ac19ca6SMarc Zyngier { 29081ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 29091ac19ca6SMarc Zyngier struct page *pend_page; 291011e37d35SMarc Zyngier phys_addr_t paddr; 29111ac19ca6SMarc Zyngier u64 val, tmp; 29121ac19ca6SMarc Zyngier 291311e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 29141ac19ca6SMarc Zyngier return; 29151ac19ca6SMarc Zyngier 2916c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 2917c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 2918c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 2919f842ca8eSMarc Zyngier /* 2920f842ca8eSMarc Zyngier * Check that we get the same property table on all 2921f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 2922f842ca8eSMarc Zyngier */ 2923f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 2924f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 2925f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 2926f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 2927f842ca8eSMarc Zyngier 2928c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2929c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 2930c440a9d9SMarc Zyngier 29315e2c9f9aSMarc Zyngier WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ)); 2932c440a9d9SMarc Zyngier its_free_pending_table(gic_data_rdist()->pend_page); 2933c440a9d9SMarc Zyngier gic_data_rdist()->pend_page = NULL; 2934c440a9d9SMarc Zyngier 2935c440a9d9SMarc Zyngier goto out; 2936c440a9d9SMarc Zyngier } 2937c440a9d9SMarc Zyngier 293811e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 29391ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 29403fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 29411ac19ca6SMarc Zyngier 29421ac19ca6SMarc Zyngier /* set PROPBASE */ 2943e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 29441ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 29452fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 29461ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 29471ac19ca6SMarc Zyngier 29480968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 29490968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 29501ac19ca6SMarc Zyngier 29511ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 2952241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 2953241a386cSMarc Zyngier /* 2954241a386cSMarc Zyngier * The HW reports non-shareable, we must 2955241a386cSMarc Zyngier * remove the cacheability attributes as 2956241a386cSMarc Zyngier * well. 2957241a386cSMarc Zyngier */ 2958241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 2959241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 2960241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 29610968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 2962241a386cSMarc Zyngier } 29631ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 29641ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 29651ac19ca6SMarc Zyngier } 29661ac19ca6SMarc Zyngier 29671ac19ca6SMarc Zyngier /* set PENDBASE */ 29681ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 29694ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 29702fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 29711ac19ca6SMarc Zyngier 29720968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 29730968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2974241a386cSMarc Zyngier 2975241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 2976241a386cSMarc Zyngier /* 2977241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 2978241a386cSMarc Zyngier * cacheability attributes as well. 2979241a386cSMarc Zyngier */ 2980241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 2981241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 2982241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 29830968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 2984241a386cSMarc Zyngier } 29851ac19ca6SMarc Zyngier 29861ac19ca6SMarc Zyngier /* Enable LPIs */ 29871ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 29881ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 29891ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 29901ac19ca6SMarc Zyngier 29915e516846SMarc Zyngier if (gic_rdists->has_vlpis && !gic_rdists->has_rvpeid) { 29926479450fSHeyi Guo void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 29936479450fSHeyi Guo 29946479450fSHeyi Guo /* 29956479450fSHeyi Guo * It's possible for CPU to receive VLPIs before it is 29966479450fSHeyi Guo * sheduled as a vPE, especially for the first CPU, and the 29976479450fSHeyi Guo * VLPI with INTID larger than 2^(IDbits+1) will be considered 29986479450fSHeyi Guo * as out of range and dropped by GIC. 29996479450fSHeyi Guo * So we initialize IDbits to known value to avoid VLPI drop. 30006479450fSHeyi Guo */ 30016479450fSHeyi Guo val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 30026479450fSHeyi Guo pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n", 30036479450fSHeyi Guo smp_processor_id(), val); 30045186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 30056479450fSHeyi Guo 30066479450fSHeyi Guo /* 30076479450fSHeyi Guo * Also clear Valid bit of GICR_VPENDBASER, in case some 30086479450fSHeyi Guo * ancient programming gets left in and has possibility of 30096479450fSHeyi Guo * corrupting memory. 30106479450fSHeyi Guo */ 3011e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 30126479450fSHeyi Guo } 30136479450fSHeyi Guo 30145e516846SMarc Zyngier if (allocate_vpe_l1_table()) { 30155e516846SMarc Zyngier /* 30165e516846SMarc Zyngier * If the allocation has failed, we're in massive trouble. 30175e516846SMarc Zyngier * Disable direct injection, and pray that no VM was 30185e516846SMarc Zyngier * already running... 30195e516846SMarc Zyngier */ 30205e516846SMarc Zyngier gic_rdists->has_rvpeid = false; 30215e516846SMarc Zyngier gic_rdists->has_vlpis = false; 30225e516846SMarc Zyngier } 30235e516846SMarc Zyngier 30241ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 30251ac19ca6SMarc Zyngier dsb(sy); 3026c440a9d9SMarc Zyngier out: 302711e37d35SMarc Zyngier gic_data_rdist()->lpi_enabled = true; 3028c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 302911e37d35SMarc Zyngier smp_processor_id(), 3030c440a9d9SMarc Zyngier gic_data_rdist()->pend_page ? "allocated" : "reserved", 303111e37d35SMarc Zyngier &paddr); 30321ac19ca6SMarc Zyngier } 30331ac19ca6SMarc Zyngier 3034920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 30351ac19ca6SMarc Zyngier { 3036920181ceSDerek Basehore int cpu = smp_processor_id(); 30371ac19ca6SMarc Zyngier u64 target; 30381ac19ca6SMarc Zyngier 3039fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 3040fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 3041fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 3042fbf8f40eSGanapatrao Kulkarni 3043fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 3044fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 3045fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 3046920181ceSDerek Basehore return; 3047fbf8f40eSGanapatrao Kulkarni } 3048fbf8f40eSGanapatrao Kulkarni 30491ac19ca6SMarc Zyngier /* 30501ac19ca6SMarc Zyngier * We now have to bind each collection to its target 30511ac19ca6SMarc Zyngier * redistributor. 30521ac19ca6SMarc Zyngier */ 3053589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 30541ac19ca6SMarc Zyngier /* 30551ac19ca6SMarc Zyngier * This ITS wants the physical address of the 30561ac19ca6SMarc Zyngier * redistributor. 30571ac19ca6SMarc Zyngier */ 30581ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 30591ac19ca6SMarc Zyngier } else { 3060920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 3061589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 3062263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 30631ac19ca6SMarc Zyngier } 30641ac19ca6SMarc Zyngier 30651ac19ca6SMarc Zyngier /* Perform collection mapping */ 30661ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 30671ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 30681ac19ca6SMarc Zyngier 30691ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 30701ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 30711ac19ca6SMarc Zyngier } 30721ac19ca6SMarc Zyngier 3073920181ceSDerek Basehore static void its_cpu_init_collections(void) 3074920181ceSDerek Basehore { 3075920181ceSDerek Basehore struct its_node *its; 3076920181ceSDerek Basehore 3077a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3078920181ceSDerek Basehore 3079920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 3080920181ceSDerek Basehore its_cpu_init_collection(its); 3081920181ceSDerek Basehore 3082a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 30831ac19ca6SMarc Zyngier } 308484a6a2e7SMarc Zyngier 308584a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 308684a6a2e7SMarc Zyngier { 308784a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 30883e39e8f5SMarc Zyngier unsigned long flags; 308984a6a2e7SMarc Zyngier 30903e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 309184a6a2e7SMarc Zyngier 309284a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 309384a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 309484a6a2e7SMarc Zyngier its_dev = tmp; 309584a6a2e7SMarc Zyngier break; 309684a6a2e7SMarc Zyngier } 309784a6a2e7SMarc Zyngier } 309884a6a2e7SMarc Zyngier 30993e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 310084a6a2e7SMarc Zyngier 310184a6a2e7SMarc Zyngier return its_dev; 310284a6a2e7SMarc Zyngier } 310384a6a2e7SMarc Zyngier 3104466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 3105466b7d16SShanker Donthineni { 3106466b7d16SShanker Donthineni int i; 3107466b7d16SShanker Donthineni 3108466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3109466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 3110466b7d16SShanker Donthineni return &its->tables[i]; 3111466b7d16SShanker Donthineni } 3112466b7d16SShanker Donthineni 3113466b7d16SShanker Donthineni return NULL; 3114466b7d16SShanker Donthineni } 3115466b7d16SShanker Donthineni 3116539d3782SShanker Donthineni static bool its_alloc_table_entry(struct its_node *its, 3117539d3782SShanker Donthineni struct its_baser *baser, u32 id) 31183faf24eaSShanker Donthineni { 31193faf24eaSShanker Donthineni struct page *page; 31203faf24eaSShanker Donthineni u32 esz, idx; 31213faf24eaSShanker Donthineni __le64 *table; 31223faf24eaSShanker Donthineni 31233faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 31243faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 31253faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 312670cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 31273faf24eaSShanker Donthineni 31283faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 312970cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 31303faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 31313faf24eaSShanker Donthineni return false; 31323faf24eaSShanker Donthineni 31333faf24eaSShanker Donthineni table = baser->base; 31343faf24eaSShanker Donthineni 31353faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 31363faf24eaSShanker Donthineni if (!table[idx]) { 3137539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 3138539d3782SShanker Donthineni get_order(baser->psz)); 31393faf24eaSShanker Donthineni if (!page) 31403faf24eaSShanker Donthineni return false; 31413faf24eaSShanker Donthineni 31423faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 31433faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 3144328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 31453faf24eaSShanker Donthineni 31463faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 31473faf24eaSShanker Donthineni 31483faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 31493faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 3150328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 31513faf24eaSShanker Donthineni 31523faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 31533faf24eaSShanker Donthineni dsb(sy); 31543faf24eaSShanker Donthineni } 31553faf24eaSShanker Donthineni 31563faf24eaSShanker Donthineni return true; 31573faf24eaSShanker Donthineni } 31583faf24eaSShanker Donthineni 315970cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 316070cc81edSMarc Zyngier { 316170cc81edSMarc Zyngier struct its_baser *baser; 316270cc81edSMarc Zyngier 316370cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 316470cc81edSMarc Zyngier 316570cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 316670cc81edSMarc Zyngier if (!baser) 3167576a8342SMarc Zyngier return (ilog2(dev_id) < device_ids(its)); 316870cc81edSMarc Zyngier 3169539d3782SShanker Donthineni return its_alloc_table_entry(its, baser, dev_id); 317070cc81edSMarc Zyngier } 317170cc81edSMarc Zyngier 31727d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 31737d75bbb4SMarc Zyngier { 31747d75bbb4SMarc Zyngier struct its_node *its; 31754e6437f1SZenghui Yu int cpu; 31767d75bbb4SMarc Zyngier 31777d75bbb4SMarc Zyngier /* 31787d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 31797d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 31807d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 31817d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 31827d75bbb4SMarc Zyngier * anyway, right?). 31837d75bbb4SMarc Zyngier */ 31847d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 31857d75bbb4SMarc Zyngier struct its_baser *baser; 31867d75bbb4SMarc Zyngier 31870dd57fedSMarc Zyngier if (!is_v4(its)) 31887d75bbb4SMarc Zyngier continue; 31897d75bbb4SMarc Zyngier 31907d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 31917d75bbb4SMarc Zyngier if (!baser) 31927d75bbb4SMarc Zyngier return false; 31937d75bbb4SMarc Zyngier 3194539d3782SShanker Donthineni if (!its_alloc_table_entry(its, baser, vpe_id)) 31957d75bbb4SMarc Zyngier return false; 31967d75bbb4SMarc Zyngier } 31977d75bbb4SMarc Zyngier 31984e6437f1SZenghui Yu /* Non v4.1? No need to iterate RDs and go back early. */ 31994e6437f1SZenghui Yu if (!gic_rdists->has_rvpeid) 32004e6437f1SZenghui Yu return true; 32014e6437f1SZenghui Yu 32024e6437f1SZenghui Yu /* 32034e6437f1SZenghui Yu * Make sure the L2 tables are allocated for all copies of 32044e6437f1SZenghui Yu * the L1 table on *all* v4.1 RDs. 32054e6437f1SZenghui Yu */ 32064e6437f1SZenghui Yu for_each_possible_cpu(cpu) { 32074e6437f1SZenghui Yu if (!allocate_vpe_l2_table(cpu, vpe_id)) 32084e6437f1SZenghui Yu return false; 32094e6437f1SZenghui Yu } 32104e6437f1SZenghui Yu 32117d75bbb4SMarc Zyngier return true; 32127d75bbb4SMarc Zyngier } 32137d75bbb4SMarc Zyngier 321484a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 321593f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 321684a6a2e7SMarc Zyngier { 321784a6a2e7SMarc Zyngier struct its_device *dev; 321893f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 32193e39e8f5SMarc Zyngier unsigned long flags; 3220591e5becSMarc Zyngier u16 *col_map = NULL; 322184a6a2e7SMarc Zyngier void *itt; 322284a6a2e7SMarc Zyngier int lpi_base; 322384a6a2e7SMarc Zyngier int nr_lpis; 3224c8481267SMarc Zyngier int nr_ites; 322584a6a2e7SMarc Zyngier int sz; 322684a6a2e7SMarc Zyngier 32273faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 3228466b7d16SShanker Donthineni return NULL; 3229466b7d16SShanker Donthineni 3230147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 3231147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 3232147c8f37SMarc Zyngier 323384a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 3234c8481267SMarc Zyngier /* 3235147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 3236147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 3237c8481267SMarc Zyngier */ 3238147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 3239ffedbf0cSMarc Zyngier sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); 324084a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 3241539d3782SShanker Donthineni itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); 324293f94ea0SMarc Zyngier if (alloc_lpis) { 324338dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 3244591e5becSMarc Zyngier if (lpi_map) 32456396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 324693f94ea0SMarc Zyngier GFP_KERNEL); 324793f94ea0SMarc Zyngier } else { 32486396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 324993f94ea0SMarc Zyngier nr_lpis = 0; 325093f94ea0SMarc Zyngier lpi_base = 0; 325193f94ea0SMarc Zyngier } 325284a6a2e7SMarc Zyngier 325393f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 325484a6a2e7SMarc Zyngier kfree(dev); 325584a6a2e7SMarc Zyngier kfree(itt); 325684a6a2e7SMarc Zyngier kfree(lpi_map); 3257591e5becSMarc Zyngier kfree(col_map); 325884a6a2e7SMarc Zyngier return NULL; 325984a6a2e7SMarc Zyngier } 326084a6a2e7SMarc Zyngier 3261328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 32625a9a8915SMarc Zyngier 326384a6a2e7SMarc Zyngier dev->its = its; 326484a6a2e7SMarc Zyngier dev->itt = itt; 3265c8481267SMarc Zyngier dev->nr_ites = nr_ites; 3266591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 3267591e5becSMarc Zyngier dev->event_map.col_map = col_map; 3268591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 3269591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 327011635fa2SMarc Zyngier raw_spin_lock_init(&dev->event_map.vlpi_lock); 327184a6a2e7SMarc Zyngier dev->device_id = dev_id; 327284a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 327384a6a2e7SMarc Zyngier 32743e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 327584a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 32763e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 327784a6a2e7SMarc Zyngier 327884a6a2e7SMarc Zyngier /* Map device to its ITT */ 327984a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 328084a6a2e7SMarc Zyngier 328184a6a2e7SMarc Zyngier return dev; 328284a6a2e7SMarc Zyngier } 328384a6a2e7SMarc Zyngier 328484a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 328584a6a2e7SMarc Zyngier { 32863e39e8f5SMarc Zyngier unsigned long flags; 32873e39e8f5SMarc Zyngier 32883e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 328984a6a2e7SMarc Zyngier list_del(&its_dev->entry); 32903e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 3291898aa5ceSMarc Zyngier kfree(its_dev->event_map.col_map); 329284a6a2e7SMarc Zyngier kfree(its_dev->itt); 329384a6a2e7SMarc Zyngier kfree(its_dev); 329484a6a2e7SMarc Zyngier } 3295b48ac83dSMarc Zyngier 32968208d170SMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) 3297b48ac83dSMarc Zyngier { 3298b48ac83dSMarc Zyngier int idx; 3299b48ac83dSMarc Zyngier 3300342be106SZenghui Yu /* Find a free LPI region in lpi_map and allocate them. */ 33018208d170SMarc Zyngier idx = bitmap_find_free_region(dev->event_map.lpi_map, 33028208d170SMarc Zyngier dev->event_map.nr_lpis, 33038208d170SMarc Zyngier get_count_order(nvecs)); 33048208d170SMarc Zyngier if (idx < 0) 3305b48ac83dSMarc Zyngier return -ENOSPC; 3306b48ac83dSMarc Zyngier 3307591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 3308b48ac83dSMarc Zyngier 3309b48ac83dSMarc Zyngier return 0; 3310b48ac83dSMarc Zyngier } 3311b48ac83dSMarc Zyngier 331254456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 3313b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 3314b48ac83dSMarc Zyngier { 3315b48ac83dSMarc Zyngier struct its_node *its; 3316b48ac83dSMarc Zyngier struct its_device *its_dev; 331754456db9SMarc Zyngier struct msi_domain_info *msi_info; 331854456db9SMarc Zyngier u32 dev_id; 33199791ec7dSMarc Zyngier int err = 0; 3320b48ac83dSMarc Zyngier 332154456db9SMarc Zyngier /* 3322a7c90f51SJulien Grall * We ignore "dev" entirely, and rely on the dev_id that has 332354456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 332454456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 332554456db9SMarc Zyngier * are built on top of the ITS. 332654456db9SMarc Zyngier */ 332754456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 332854456db9SMarc Zyngier 332954456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 333054456db9SMarc Zyngier its = msi_info->data; 333154456db9SMarc Zyngier 333220b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 333320b3d54eSMarc Zyngier vpe_proxy.dev && 333420b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 333520b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 333620b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 333720b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 333820b3d54eSMarc Zyngier dev_id); 333920b3d54eSMarc Zyngier return -EINVAL; 334020b3d54eSMarc Zyngier } 334120b3d54eSMarc Zyngier 33429791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 3343f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 3344e8137f4fSMarc Zyngier if (its_dev) { 3345e8137f4fSMarc Zyngier /* 3346e8137f4fSMarc Zyngier * We already have seen this ID, probably through 3347e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 3348e8137f4fSMarc Zyngier * create the device. 3349e8137f4fSMarc Zyngier */ 33509791ec7dSMarc Zyngier its_dev->shared = true; 3351f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 3352e8137f4fSMarc Zyngier goto out; 3353e8137f4fSMarc Zyngier } 3354b48ac83dSMarc Zyngier 335593f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 33569791ec7dSMarc Zyngier if (!its_dev) { 33579791ec7dSMarc Zyngier err = -ENOMEM; 33589791ec7dSMarc Zyngier goto out; 33599791ec7dSMarc Zyngier } 3360b48ac83dSMarc Zyngier 3361f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 3362e8137f4fSMarc Zyngier out: 33639791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 3364b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 33659791ec7dSMarc Zyngier return err; 3366b48ac83dSMarc Zyngier } 3367b48ac83dSMarc Zyngier 336854456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 336954456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 337054456db9SMarc Zyngier }; 337154456db9SMarc Zyngier 3372b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 3373b48ac83dSMarc Zyngier unsigned int virq, 3374b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 3375b48ac83dSMarc Zyngier { 3376f833f57fSMarc Zyngier struct irq_fwspec fwspec; 3377b48ac83dSMarc Zyngier 3378f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 3379f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 3380f833f57fSMarc Zyngier fwspec.param_count = 3; 3381f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 3382f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 3383f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 33843f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 33853f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 33863f010cf1STomasz Nowicki fwspec.param_count = 2; 33873f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 33883f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 3389f833f57fSMarc Zyngier } else { 3390f833f57fSMarc Zyngier return -EINVAL; 3391f833f57fSMarc Zyngier } 3392b48ac83dSMarc Zyngier 3393f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 3394b48ac83dSMarc Zyngier } 3395b48ac83dSMarc Zyngier 3396b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 3397b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 3398b48ac83dSMarc Zyngier { 3399b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 3400b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 340135ae7df2SJulien Grall struct its_node *its = its_dev->its; 3402b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 3403b48ac83dSMarc Zyngier int err; 3404b48ac83dSMarc Zyngier int i; 3405b48ac83dSMarc Zyngier 34068208d170SMarc Zyngier err = its_alloc_device_irq(its_dev, nr_irqs, &hwirq); 3407b48ac83dSMarc Zyngier if (err) 3408b48ac83dSMarc Zyngier return err; 3409b48ac83dSMarc Zyngier 341035ae7df2SJulien Grall err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); 341135ae7df2SJulien Grall if (err) 341235ae7df2SJulien Grall return err; 341335ae7df2SJulien Grall 34148208d170SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 34158208d170SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); 3416b48ac83dSMarc Zyngier if (err) 3417b48ac83dSMarc Zyngier return err; 3418b48ac83dSMarc Zyngier 3419b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 34208208d170SMarc Zyngier hwirq + i, &its_irq_chip, its_dev); 34210d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 3422f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 34238208d170SMarc Zyngier (int)(hwirq + i - its_dev->event_map.lpi_base), 34248208d170SMarc Zyngier (int)(hwirq + i), virq + i); 3425b48ac83dSMarc Zyngier } 3426b48ac83dSMarc Zyngier 3427b48ac83dSMarc Zyngier return 0; 3428b48ac83dSMarc Zyngier } 3429b48ac83dSMarc Zyngier 343072491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 3431702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3432aca268dfSMarc Zyngier { 3433aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3434aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 3435fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 34360d224d35SMarc Zyngier int cpu; 3437fbf8f40eSGanapatrao Kulkarni 3438fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 3439fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 3440fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 3441aca268dfSMarc Zyngier 3442591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 3443c1797b11SYang Yingliang cpu = cpumask_first_and(cpu_mask, cpu_online_mask); 3444c1797b11SYang Yingliang if (cpu >= nr_cpu_ids) { 3445c1797b11SYang Yingliang if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) 3446c1797b11SYang Yingliang return -EINVAL; 3447c1797b11SYang Yingliang 3448c1797b11SYang Yingliang cpu = cpumask_first(cpu_online_mask); 3449c1797b11SYang Yingliang } 3450c1797b11SYang Yingliang 34510d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 34520d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3453591e5becSMarc Zyngier 3454aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 34556a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 345672491643SThomas Gleixner return 0; 3457aca268dfSMarc Zyngier } 3458aca268dfSMarc Zyngier 3459aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 3460aca268dfSMarc Zyngier struct irq_data *d) 3461aca268dfSMarc Zyngier { 3462aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3463aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 3464aca268dfSMarc Zyngier 3465aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 3466aca268dfSMarc Zyngier its_send_discard(its_dev, event); 3467aca268dfSMarc Zyngier } 3468aca268dfSMarc Zyngier 3469b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 3470b48ac83dSMarc Zyngier unsigned int nr_irqs) 3471b48ac83dSMarc Zyngier { 3472b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 3473b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 34749791ec7dSMarc Zyngier struct its_node *its = its_dev->its; 3475b48ac83dSMarc Zyngier int i; 3476b48ac83dSMarc Zyngier 3477c9c96e30SMarc Zyngier bitmap_release_region(its_dev->event_map.lpi_map, 3478c9c96e30SMarc Zyngier its_get_event_id(irq_domain_get_irq_data(domain, virq)), 3479c9c96e30SMarc Zyngier get_count_order(nr_irqs)); 3480c9c96e30SMarc Zyngier 3481b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 3482b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 3483b48ac83dSMarc Zyngier virq + i); 3484b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 34852da39949SMarc Zyngier irq_domain_reset_irq_data(data); 3486b48ac83dSMarc Zyngier } 3487b48ac83dSMarc Zyngier 34889791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 34899791ec7dSMarc Zyngier 34909791ec7dSMarc Zyngier /* 34919791ec7dSMarc Zyngier * If all interrupts have been freed, start mopping the 34929791ec7dSMarc Zyngier * floor. This is conditionned on the device not being shared. 34939791ec7dSMarc Zyngier */ 34949791ec7dSMarc Zyngier if (!its_dev->shared && 34959791ec7dSMarc Zyngier bitmap_empty(its_dev->event_map.lpi_map, 3496591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 349738dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 3498cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 3499cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 3500b48ac83dSMarc Zyngier 3501b48ac83dSMarc Zyngier /* Unmap device/itt */ 3502b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 3503b48ac83dSMarc Zyngier its_free_device(its_dev); 3504b48ac83dSMarc Zyngier } 3505b48ac83dSMarc Zyngier 35069791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 35079791ec7dSMarc Zyngier 3508b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 3509b48ac83dSMarc Zyngier } 3510b48ac83dSMarc Zyngier 3511b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 3512b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 3513b48ac83dSMarc Zyngier .free = its_irq_domain_free, 3514aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 3515aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 3516b48ac83dSMarc Zyngier }; 35174c21f3c2SMarc Zyngier 351820b3d54eSMarc Zyngier /* 351920b3d54eSMarc Zyngier * This is insane. 352020b3d54eSMarc Zyngier * 35210684c704SMarc Zyngier * If a GICv4.0 doesn't implement Direct LPIs (which is extremely 352220b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 352320b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 352420b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 352520b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 352620b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 352720b3d54eSMarc Zyngier * 352820b3d54eSMarc Zyngier * Broken by design(tm). 35290684c704SMarc Zyngier * 35300684c704SMarc Zyngier * GICv4.1, on the other hand, mandates that we're able to invalidate 35310684c704SMarc Zyngier * by writing to a MMIO register. It doesn't implement the whole of 35320684c704SMarc Zyngier * DirectLPI, but that's good enough. And most of the time, we don't 35330684c704SMarc Zyngier * even have to invalidate anything, as the redistributor can be told 35340684c704SMarc Zyngier * whether to generate a doorbell or not (we thus leave it enabled, 35350684c704SMarc Zyngier * always). 353620b3d54eSMarc Zyngier */ 353720b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 353820b3d54eSMarc Zyngier { 35390684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 35400684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 35410684c704SMarc Zyngier return; 35420684c704SMarc Zyngier 354320b3d54eSMarc Zyngier /* Already unmapped? */ 354420b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 354520b3d54eSMarc Zyngier return; 354620b3d54eSMarc Zyngier 354720b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 354820b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 354920b3d54eSMarc Zyngier 355020b3d54eSMarc Zyngier /* 355120b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 355220b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 355320b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 355420b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 355520b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 355620b3d54eSMarc Zyngier */ 355720b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 355820b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 355920b3d54eSMarc Zyngier 356020b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 356120b3d54eSMarc Zyngier } 356220b3d54eSMarc Zyngier 356320b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 356420b3d54eSMarc Zyngier { 35650684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 35660684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 35670684c704SMarc Zyngier return; 35680684c704SMarc Zyngier 356920b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 357020b3d54eSMarc Zyngier unsigned long flags; 357120b3d54eSMarc Zyngier 357220b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 357320b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 357420b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 357520b3d54eSMarc Zyngier } 357620b3d54eSMarc Zyngier } 357720b3d54eSMarc Zyngier 357820b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 357920b3d54eSMarc Zyngier { 35800684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 35810684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 35820684c704SMarc Zyngier return; 35830684c704SMarc Zyngier 358420b3d54eSMarc Zyngier /* Already mapped? */ 358520b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 358620b3d54eSMarc Zyngier return; 358720b3d54eSMarc Zyngier 358820b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 358920b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 359020b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 359120b3d54eSMarc Zyngier 359220b3d54eSMarc Zyngier /* Map the new VPE instead */ 359320b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 359420b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 359520b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 359620b3d54eSMarc Zyngier 359720b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 359820b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 359920b3d54eSMarc Zyngier } 360020b3d54eSMarc Zyngier 3601958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 3602958b90d1SMarc Zyngier { 3603958b90d1SMarc Zyngier unsigned long flags; 3604958b90d1SMarc Zyngier struct its_collection *target_col; 3605958b90d1SMarc Zyngier 36060684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 36070684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 36080684c704SMarc Zyngier return; 36090684c704SMarc Zyngier 3610958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3611958b90d1SMarc Zyngier void __iomem *rdbase; 3612958b90d1SMarc Zyngier 3613958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 3614958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 36152f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3616958b90d1SMarc Zyngier 3617958b90d1SMarc Zyngier return; 3618958b90d1SMarc Zyngier } 3619958b90d1SMarc Zyngier 3620958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 3621958b90d1SMarc Zyngier 3622958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 3623958b90d1SMarc Zyngier 3624958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 3625958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 3626958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 3627958b90d1SMarc Zyngier 3628958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 3629958b90d1SMarc Zyngier } 3630958b90d1SMarc Zyngier 36313171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 36323171a47aSMarc Zyngier const struct cpumask *mask_val, 36333171a47aSMarc Zyngier bool force) 36343171a47aSMarc Zyngier { 36353171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3636dd3f050aSMarc Zyngier int from, cpu = cpumask_first(mask_val); 3637f3a05921SMarc Zyngier unsigned long flags; 36383171a47aSMarc Zyngier 36393171a47aSMarc Zyngier /* 36403171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 364120b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 3642958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 3643958b90d1SMarc Zyngier * interrupt to its new location. 3644f3a05921SMarc Zyngier * 3645f3a05921SMarc Zyngier * Another thing is that changing the affinity of a vPE affects 3646f3a05921SMarc Zyngier * *other interrupts* such as all the vLPIs that are routed to 3647f3a05921SMarc Zyngier * this vPE. This means that the irq_desc lock is not enough to 3648f3a05921SMarc Zyngier * protect us, and that we must ensure nobody samples vpe->col_idx 3649f3a05921SMarc Zyngier * during the update, hence the lock below which must also be 3650f3a05921SMarc Zyngier * taken on any vLPI handling path that evaluates vpe->col_idx. 36513171a47aSMarc Zyngier */ 3652f3a05921SMarc Zyngier from = vpe_to_cpuid_lock(vpe, &flags); 3653f3a05921SMarc Zyngier if (from == cpu) 3654dd3f050aSMarc Zyngier goto out; 3655958b90d1SMarc Zyngier 36563171a47aSMarc Zyngier vpe->col_idx = cpu; 3657dd3f050aSMarc Zyngier 3658dd3f050aSMarc Zyngier /* 3659dd3f050aSMarc Zyngier * GICv4.1 allows us to skip VMOVP if moving to a cpu whose RD 3660dd3f050aSMarc Zyngier * is sharing its VPE table with the current one. 3661dd3f050aSMarc Zyngier */ 3662dd3f050aSMarc Zyngier if (gic_data_rdist_cpu(cpu)->vpe_table_mask && 3663dd3f050aSMarc Zyngier cpumask_test_cpu(from, gic_data_rdist_cpu(cpu)->vpe_table_mask)) 3664dd3f050aSMarc Zyngier goto out; 3665dd3f050aSMarc Zyngier 36663171a47aSMarc Zyngier its_send_vmovp(vpe); 3667958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 36683171a47aSMarc Zyngier 3669dd3f050aSMarc Zyngier out: 367044c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3671f3a05921SMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 367244c4c25eSMarc Zyngier 36733171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 36743171a47aSMarc Zyngier } 36753171a47aSMarc Zyngier 367696806229SMarc Zyngier static void its_wait_vpt_parse_complete(void) 367796806229SMarc Zyngier { 367896806229SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 367996806229SMarc Zyngier u64 val; 368096806229SMarc Zyngier 368196806229SMarc Zyngier if (!gic_rdists->has_vpend_valid_dirty) 368296806229SMarc Zyngier return; 368396806229SMarc Zyngier 368496806229SMarc Zyngier WARN_ON_ONCE(readq_relaxed_poll_timeout(vlpi_base + GICR_VPENDBASER, 368596806229SMarc Zyngier val, 368696806229SMarc Zyngier !(val & GICR_VPENDBASER_Dirty), 368796806229SMarc Zyngier 10, 500)); 368896806229SMarc Zyngier } 368996806229SMarc Zyngier 3690e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 3691e643d803SMarc Zyngier { 369250c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3693e643d803SMarc Zyngier u64 val; 3694e643d803SMarc Zyngier 3695e643d803SMarc Zyngier /* Schedule the VPE */ 3696e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 3697e643d803SMarc Zyngier GENMASK_ULL(51, 12); 3698e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 3699e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 3700e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 37015186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 3702e643d803SMarc Zyngier 3703e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 3704e643d803SMarc Zyngier GENMASK_ULL(51, 16); 3705e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 3706b2cb11f4SHeyi Guo val |= GICR_VPENDBASER_InnerShareable; 3707e643d803SMarc Zyngier /* 3708e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 3709e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 3710e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 3711e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 3712e643d803SMarc Zyngier * that the pending table is empty. A good implementation 3713e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 3714e643d803SMarc Zyngier * making this a tolerable issue. 3715e643d803SMarc Zyngier */ 3716e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 3717e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 3718e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 37195186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 372096806229SMarc Zyngier 372196806229SMarc Zyngier its_wait_vpt_parse_complete(); 3722e643d803SMarc Zyngier } 3723e643d803SMarc Zyngier 3724e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 3725e643d803SMarc Zyngier { 372650c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3727e643d803SMarc Zyngier u64 val; 3728e643d803SMarc Zyngier 3729e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 3730e643d803SMarc Zyngier 3731e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 3732e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 3733e643d803SMarc Zyngier } 3734e643d803SMarc Zyngier 373540619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 373640619a2eSMarc Zyngier { 373740619a2eSMarc Zyngier struct its_node *its; 373840619a2eSMarc Zyngier 373940619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 37400dd57fedSMarc Zyngier if (!is_v4(its)) 374140619a2eSMarc Zyngier continue; 374240619a2eSMarc Zyngier 37432247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 37442247e1bfSMarc Zyngier continue; 37452247e1bfSMarc Zyngier 37463c1cceebSMarc Zyngier /* 37473c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 37483c1cceebSMarc Zyngier * we need is to reach the redistributors. 37493c1cceebSMarc Zyngier */ 375040619a2eSMarc Zyngier its_send_vinvall(its, vpe); 37513c1cceebSMarc Zyngier return; 375240619a2eSMarc Zyngier } 375340619a2eSMarc Zyngier } 375440619a2eSMarc Zyngier 3755e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 3756e643d803SMarc Zyngier { 3757e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3758e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 3759e643d803SMarc Zyngier 3760e643d803SMarc Zyngier switch (info->cmd_type) { 3761e643d803SMarc Zyngier case SCHEDULE_VPE: 3762e643d803SMarc Zyngier its_vpe_schedule(vpe); 3763e643d803SMarc Zyngier return 0; 3764e643d803SMarc Zyngier 3765e643d803SMarc Zyngier case DESCHEDULE_VPE: 3766e643d803SMarc Zyngier its_vpe_deschedule(vpe); 3767e643d803SMarc Zyngier return 0; 3768e643d803SMarc Zyngier 37695e2f7642SMarc Zyngier case INVALL_VPE: 377040619a2eSMarc Zyngier its_vpe_invall(vpe); 37715e2f7642SMarc Zyngier return 0; 37725e2f7642SMarc Zyngier 3773e643d803SMarc Zyngier default: 3774e643d803SMarc Zyngier return -EINVAL; 3775e643d803SMarc Zyngier } 3776e643d803SMarc Zyngier } 3777e643d803SMarc Zyngier 377820b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 377920b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 378020b3d54eSMarc Zyngier { 378120b3d54eSMarc Zyngier unsigned long flags; 378220b3d54eSMarc Zyngier 378320b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 378420b3d54eSMarc Zyngier 378520b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 378620b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 378720b3d54eSMarc Zyngier 378820b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 378920b3d54eSMarc Zyngier } 379020b3d54eSMarc Zyngier 3791f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 3792f6a91da7SMarc Zyngier { 3793f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 379420b3d54eSMarc Zyngier 379520b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 3796f6a91da7SMarc Zyngier void __iomem *rdbase; 3797f6a91da7SMarc Zyngier 3798425c09beSMarc Zyngier /* Target the redistributor this VPE is currently known on */ 37999058a4e9SMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 3800f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3801425c09beSMarc Zyngier gic_write_lpir(d->parent_data->hwirq, rdbase + GICR_INVLPIR); 38022f4f064bSMarc Zyngier wait_for_syncr(rdbase); 38039058a4e9SMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 380420b3d54eSMarc Zyngier } else { 380520b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 380620b3d54eSMarc Zyngier } 3807f6a91da7SMarc Zyngier } 3808f6a91da7SMarc Zyngier 3809f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 3810f6a91da7SMarc Zyngier { 3811f6a91da7SMarc Zyngier /* 3812f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 3813f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 3814f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 3815f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 3816f6a91da7SMarc Zyngier */ 3817f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 3818f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3819f6a91da7SMarc Zyngier } 3820f6a91da7SMarc Zyngier 3821f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 3822f6a91da7SMarc Zyngier { 3823f6a91da7SMarc Zyngier /* Same hack as above... */ 3824f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 3825f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3826f6a91da7SMarc Zyngier } 3827f6a91da7SMarc Zyngier 3828e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 3829e57a3e28SMarc Zyngier enum irqchip_irq_state which, 3830e57a3e28SMarc Zyngier bool state) 3831e57a3e28SMarc Zyngier { 3832e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3833e57a3e28SMarc Zyngier 3834e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 3835e57a3e28SMarc Zyngier return -EINVAL; 3836e57a3e28SMarc Zyngier 3837e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3838e57a3e28SMarc Zyngier void __iomem *rdbase; 3839e57a3e28SMarc Zyngier 3840e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3841e57a3e28SMarc Zyngier if (state) { 3842e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 3843e57a3e28SMarc Zyngier } else { 3844e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 38452f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3846e57a3e28SMarc Zyngier } 3847e57a3e28SMarc Zyngier } else { 3848e57a3e28SMarc Zyngier if (state) 3849e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 3850e57a3e28SMarc Zyngier else 3851e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 3852e57a3e28SMarc Zyngier } 3853e57a3e28SMarc Zyngier 3854e57a3e28SMarc Zyngier return 0; 3855e57a3e28SMarc Zyngier } 3856e57a3e28SMarc Zyngier 38577809f701SMarc Zyngier static int its_vpe_retrigger(struct irq_data *d) 38587809f701SMarc Zyngier { 38597809f701SMarc Zyngier return !its_vpe_set_irqchip_state(d, IRQCHIP_STATE_PENDING, true); 38607809f701SMarc Zyngier } 38617809f701SMarc Zyngier 38628fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 38638fff27aeSMarc Zyngier .name = "GICv4-vpe", 3864f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 3865f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 3866f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 38673171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 38687809f701SMarc Zyngier .irq_retrigger = its_vpe_retrigger, 3869e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 3870e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 38718fff27aeSMarc Zyngier }; 38728fff27aeSMarc Zyngier 3873d97c97baSMarc Zyngier static struct its_node *find_4_1_its(void) 3874d97c97baSMarc Zyngier { 3875d97c97baSMarc Zyngier static struct its_node *its = NULL; 3876d97c97baSMarc Zyngier 3877d97c97baSMarc Zyngier if (!its) { 3878d97c97baSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 3879d97c97baSMarc Zyngier if (is_v4_1(its)) 3880d97c97baSMarc Zyngier return its; 3881d97c97baSMarc Zyngier } 3882d97c97baSMarc Zyngier 3883d97c97baSMarc Zyngier /* Oops? */ 3884d97c97baSMarc Zyngier its = NULL; 3885d97c97baSMarc Zyngier } 3886d97c97baSMarc Zyngier 3887d97c97baSMarc Zyngier return its; 3888d97c97baSMarc Zyngier } 3889d97c97baSMarc Zyngier 3890d97c97baSMarc Zyngier static void its_vpe_4_1_send_inv(struct irq_data *d) 3891d97c97baSMarc Zyngier { 3892d97c97baSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3893d97c97baSMarc Zyngier struct its_node *its; 3894d97c97baSMarc Zyngier 3895d97c97baSMarc Zyngier /* 3896d97c97baSMarc Zyngier * GICv4.1 wants doorbells to be invalidated using the 3897d97c97baSMarc Zyngier * INVDB command in order to be broadcast to all RDs. Send 3898d97c97baSMarc Zyngier * it to the first valid ITS, and let the HW do its magic. 3899d97c97baSMarc Zyngier */ 3900d97c97baSMarc Zyngier its = find_4_1_its(); 3901d97c97baSMarc Zyngier if (its) 3902d97c97baSMarc Zyngier its_send_invdb(its, vpe); 3903d97c97baSMarc Zyngier } 3904d97c97baSMarc Zyngier 3905d97c97baSMarc Zyngier static void its_vpe_4_1_mask_irq(struct irq_data *d) 3906d97c97baSMarc Zyngier { 3907d97c97baSMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 3908d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 3909d97c97baSMarc Zyngier } 3910d97c97baSMarc Zyngier 3911d97c97baSMarc Zyngier static void its_vpe_4_1_unmask_irq(struct irq_data *d) 3912d97c97baSMarc Zyngier { 3913d97c97baSMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 3914d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 3915d97c97baSMarc Zyngier } 3916d97c97baSMarc Zyngier 391791bf6395SMarc Zyngier static void its_vpe_4_1_schedule(struct its_vpe *vpe, 391891bf6395SMarc Zyngier struct its_cmd_info *info) 391991bf6395SMarc Zyngier { 392091bf6395SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 392191bf6395SMarc Zyngier u64 val = 0; 392291bf6395SMarc Zyngier 392391bf6395SMarc Zyngier /* Schedule the VPE */ 392491bf6395SMarc Zyngier val |= GICR_VPENDBASER_Valid; 392591bf6395SMarc Zyngier val |= info->g0en ? GICR_VPENDBASER_4_1_VGRP0EN : 0; 392691bf6395SMarc Zyngier val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0; 392791bf6395SMarc Zyngier val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id); 392891bf6395SMarc Zyngier 39295186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 393096806229SMarc Zyngier 393196806229SMarc Zyngier its_wait_vpt_parse_complete(); 393291bf6395SMarc Zyngier } 393391bf6395SMarc Zyngier 3934e64fab1aSMarc Zyngier static void its_vpe_4_1_deschedule(struct its_vpe *vpe, 3935e64fab1aSMarc Zyngier struct its_cmd_info *info) 3936e64fab1aSMarc Zyngier { 3937e64fab1aSMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3938e64fab1aSMarc Zyngier u64 val; 3939e64fab1aSMarc Zyngier 3940e64fab1aSMarc Zyngier if (info->req_db) { 3941e64fab1aSMarc Zyngier /* 3942e64fab1aSMarc Zyngier * vPE is going to block: make the vPE non-resident with 3943e64fab1aSMarc Zyngier * PendingLast clear and DB set. The GIC guarantees that if 3944e64fab1aSMarc Zyngier * we read-back PendingLast clear, then a doorbell will be 3945e64fab1aSMarc Zyngier * delivered when an interrupt comes. 3946e64fab1aSMarc Zyngier */ 3947e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 3948e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast, 3949e64fab1aSMarc Zyngier GICR_VPENDBASER_4_1_DB); 3950e64fab1aSMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 3951e64fab1aSMarc Zyngier } else { 3952e64fab1aSMarc Zyngier /* 3953e64fab1aSMarc Zyngier * We're not blocking, so just make the vPE non-resident 3954e64fab1aSMarc Zyngier * with PendingLast set, indicating that we'll be back. 3955e64fab1aSMarc Zyngier */ 3956e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 3957e64fab1aSMarc Zyngier 0, 3958e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast); 3959e64fab1aSMarc Zyngier vpe->pending_last = true; 3960e64fab1aSMarc Zyngier } 3961e64fab1aSMarc Zyngier } 3962e64fab1aSMarc Zyngier 3963b4a4bd0fSMarc Zyngier static void its_vpe_4_1_invall(struct its_vpe *vpe) 3964b4a4bd0fSMarc Zyngier { 3965b4a4bd0fSMarc Zyngier void __iomem *rdbase; 3966b4a4bd0fSMarc Zyngier u64 val; 3967b4a4bd0fSMarc Zyngier 3968b4a4bd0fSMarc Zyngier val = GICR_INVALLR_V; 3969b4a4bd0fSMarc Zyngier val |= FIELD_PREP(GICR_INVALLR_VPEID, vpe->vpe_id); 3970b4a4bd0fSMarc Zyngier 3971b4a4bd0fSMarc Zyngier /* Target the redistributor this vPE is currently known on */ 39729058a4e9SMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 3973b4a4bd0fSMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3974b4a4bd0fSMarc Zyngier gic_write_lpir(val, rdbase + GICR_INVALLR); 3975b978c25fSZenghui Yu 3976b978c25fSZenghui Yu wait_for_syncr(rdbase); 39779058a4e9SMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 3978b4a4bd0fSMarc Zyngier } 3979b4a4bd0fSMarc Zyngier 398029c647f3SMarc Zyngier static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 398129c647f3SMarc Zyngier { 398291bf6395SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 398329c647f3SMarc Zyngier struct its_cmd_info *info = vcpu_info; 398429c647f3SMarc Zyngier 398529c647f3SMarc Zyngier switch (info->cmd_type) { 398629c647f3SMarc Zyngier case SCHEDULE_VPE: 398791bf6395SMarc Zyngier its_vpe_4_1_schedule(vpe, info); 398829c647f3SMarc Zyngier return 0; 398929c647f3SMarc Zyngier 399029c647f3SMarc Zyngier case DESCHEDULE_VPE: 3991e64fab1aSMarc Zyngier its_vpe_4_1_deschedule(vpe, info); 399229c647f3SMarc Zyngier return 0; 399329c647f3SMarc Zyngier 399429c647f3SMarc Zyngier case INVALL_VPE: 3995b4a4bd0fSMarc Zyngier its_vpe_4_1_invall(vpe); 399629c647f3SMarc Zyngier return 0; 399729c647f3SMarc Zyngier 399829c647f3SMarc Zyngier default: 399929c647f3SMarc Zyngier return -EINVAL; 400029c647f3SMarc Zyngier } 400129c647f3SMarc Zyngier } 400229c647f3SMarc Zyngier 400329c647f3SMarc Zyngier static struct irq_chip its_vpe_4_1_irq_chip = { 400429c647f3SMarc Zyngier .name = "GICv4.1-vpe", 4005d97c97baSMarc Zyngier .irq_mask = its_vpe_4_1_mask_irq, 4006d97c97baSMarc Zyngier .irq_unmask = its_vpe_4_1_unmask_irq, 400729c647f3SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 400829c647f3SMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 400929c647f3SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_4_1_set_vcpu_affinity, 401029c647f3SMarc Zyngier }; 401129c647f3SMarc Zyngier 4012e252cf8aSMarc Zyngier static void its_configure_sgi(struct irq_data *d, bool clear) 4013e252cf8aSMarc Zyngier { 4014e252cf8aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4015e252cf8aSMarc Zyngier struct its_cmd_desc desc; 4016e252cf8aSMarc Zyngier 4017e252cf8aSMarc Zyngier desc.its_vsgi_cmd.vpe = vpe; 4018e252cf8aSMarc Zyngier desc.its_vsgi_cmd.sgi = d->hwirq; 4019e252cf8aSMarc Zyngier desc.its_vsgi_cmd.priority = vpe->sgi_config[d->hwirq].priority; 4020e252cf8aSMarc Zyngier desc.its_vsgi_cmd.enable = vpe->sgi_config[d->hwirq].enabled; 4021e252cf8aSMarc Zyngier desc.its_vsgi_cmd.group = vpe->sgi_config[d->hwirq].group; 4022e252cf8aSMarc Zyngier desc.its_vsgi_cmd.clear = clear; 4023e252cf8aSMarc Zyngier 4024e252cf8aSMarc Zyngier /* 4025e252cf8aSMarc Zyngier * GICv4.1 allows us to send VSGI commands to any ITS as long as the 4026e252cf8aSMarc Zyngier * destination VPE is mapped there. Since we map them eagerly at 4027e252cf8aSMarc Zyngier * activation time, we're pretty sure the first GICv4.1 ITS will do. 4028e252cf8aSMarc Zyngier */ 4029e252cf8aSMarc Zyngier its_send_single_vcommand(find_4_1_its(), its_build_vsgi_cmd, &desc); 4030e252cf8aSMarc Zyngier } 4031e252cf8aSMarc Zyngier 4032b4e8d644SMarc Zyngier static void its_sgi_mask_irq(struct irq_data *d) 4033b4e8d644SMarc Zyngier { 4034b4e8d644SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4035b4e8d644SMarc Zyngier 4036b4e8d644SMarc Zyngier vpe->sgi_config[d->hwirq].enabled = false; 4037b4e8d644SMarc Zyngier its_configure_sgi(d, false); 4038b4e8d644SMarc Zyngier } 4039b4e8d644SMarc Zyngier 4040b4e8d644SMarc Zyngier static void its_sgi_unmask_irq(struct irq_data *d) 4041b4e8d644SMarc Zyngier { 4042b4e8d644SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4043b4e8d644SMarc Zyngier 4044b4e8d644SMarc Zyngier vpe->sgi_config[d->hwirq].enabled = true; 4045b4e8d644SMarc Zyngier its_configure_sgi(d, false); 4046b4e8d644SMarc Zyngier } 4047b4e8d644SMarc Zyngier 4048166cba71SMarc Zyngier static int its_sgi_set_affinity(struct irq_data *d, 4049166cba71SMarc Zyngier const struct cpumask *mask_val, 4050166cba71SMarc Zyngier bool force) 4051166cba71SMarc Zyngier { 4052166cba71SMarc Zyngier /* 4053166cba71SMarc Zyngier * There is no notion of affinity for virtual SGIs, at least 4054166cba71SMarc Zyngier * not on the host (since they can only be targetting a vPE). 4055166cba71SMarc Zyngier * Tell the kernel we've done whatever it asked for. 4056166cba71SMarc Zyngier */ 4057166cba71SMarc Zyngier return IRQ_SET_MASK_OK; 4058166cba71SMarc Zyngier } 4059166cba71SMarc Zyngier 40607017ff0eSMarc Zyngier static int its_sgi_set_irqchip_state(struct irq_data *d, 40617017ff0eSMarc Zyngier enum irqchip_irq_state which, 40627017ff0eSMarc Zyngier bool state) 40637017ff0eSMarc Zyngier { 40647017ff0eSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 40657017ff0eSMarc Zyngier return -EINVAL; 40667017ff0eSMarc Zyngier 40677017ff0eSMarc Zyngier if (state) { 40687017ff0eSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 40697017ff0eSMarc Zyngier struct its_node *its = find_4_1_its(); 40707017ff0eSMarc Zyngier u64 val; 40717017ff0eSMarc Zyngier 40727017ff0eSMarc Zyngier val = FIELD_PREP(GITS_SGIR_VPEID, vpe->vpe_id); 40737017ff0eSMarc Zyngier val |= FIELD_PREP(GITS_SGIR_VINTID, d->hwirq); 40747017ff0eSMarc Zyngier writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); 40757017ff0eSMarc Zyngier } else { 40767017ff0eSMarc Zyngier its_configure_sgi(d, true); 40777017ff0eSMarc Zyngier } 40787017ff0eSMarc Zyngier 40797017ff0eSMarc Zyngier return 0; 40807017ff0eSMarc Zyngier } 40817017ff0eSMarc Zyngier 40827017ff0eSMarc Zyngier static int its_sgi_get_irqchip_state(struct irq_data *d, 40837017ff0eSMarc Zyngier enum irqchip_irq_state which, bool *val) 40847017ff0eSMarc Zyngier { 40857017ff0eSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 40867017ff0eSMarc Zyngier void __iomem *base; 40877017ff0eSMarc Zyngier unsigned long flags; 40887017ff0eSMarc Zyngier u32 count = 1000000; /* 1s! */ 40897017ff0eSMarc Zyngier u32 status; 40907017ff0eSMarc Zyngier int cpu; 40917017ff0eSMarc Zyngier 40927017ff0eSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 40937017ff0eSMarc Zyngier return -EINVAL; 40947017ff0eSMarc Zyngier 40957017ff0eSMarc Zyngier /* 40967017ff0eSMarc Zyngier * Locking galore! We can race against two different events: 40977017ff0eSMarc Zyngier * 40987017ff0eSMarc Zyngier * - Concurent vPE affinity change: we must make sure it cannot 40997017ff0eSMarc Zyngier * happen, or we'll talk to the wrong redistributor. This is 41007017ff0eSMarc Zyngier * identical to what happens with vLPIs. 41017017ff0eSMarc Zyngier * 41027017ff0eSMarc Zyngier * - Concurrent VSGIPENDR access: As it involves accessing two 41037017ff0eSMarc Zyngier * MMIO registers, this must be made atomic one way or another. 41047017ff0eSMarc Zyngier */ 41057017ff0eSMarc Zyngier cpu = vpe_to_cpuid_lock(vpe, &flags); 41067017ff0eSMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 41077017ff0eSMarc Zyngier base = gic_data_rdist_cpu(cpu)->rd_base + SZ_128K; 41087017ff0eSMarc Zyngier writel_relaxed(vpe->vpe_id, base + GICR_VSGIR); 41097017ff0eSMarc Zyngier do { 41107017ff0eSMarc Zyngier status = readl_relaxed(base + GICR_VSGIPENDR); 41117017ff0eSMarc Zyngier if (!(status & GICR_VSGIPENDR_BUSY)) 41127017ff0eSMarc Zyngier goto out; 41137017ff0eSMarc Zyngier 41147017ff0eSMarc Zyngier count--; 41157017ff0eSMarc Zyngier if (!count) { 41167017ff0eSMarc Zyngier pr_err_ratelimited("Unable to get SGI status\n"); 41177017ff0eSMarc Zyngier goto out; 41187017ff0eSMarc Zyngier } 41197017ff0eSMarc Zyngier cpu_relax(); 41207017ff0eSMarc Zyngier udelay(1); 41217017ff0eSMarc Zyngier } while (count); 41227017ff0eSMarc Zyngier 41237017ff0eSMarc Zyngier out: 41247017ff0eSMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 41257017ff0eSMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 41267017ff0eSMarc Zyngier 41277017ff0eSMarc Zyngier if (!count) 41287017ff0eSMarc Zyngier return -ENXIO; 41297017ff0eSMarc Zyngier 41307017ff0eSMarc Zyngier *val = !!(status & (1 << d->hwirq)); 41317017ff0eSMarc Zyngier 41327017ff0eSMarc Zyngier return 0; 41337017ff0eSMarc Zyngier } 41347017ff0eSMarc Zyngier 413505d32df1SMarc Zyngier static int its_sgi_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 413605d32df1SMarc Zyngier { 413705d32df1SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 413805d32df1SMarc Zyngier struct its_cmd_info *info = vcpu_info; 413905d32df1SMarc Zyngier 414005d32df1SMarc Zyngier switch (info->cmd_type) { 414105d32df1SMarc Zyngier case PROP_UPDATE_VSGI: 414205d32df1SMarc Zyngier vpe->sgi_config[d->hwirq].priority = info->priority; 414305d32df1SMarc Zyngier vpe->sgi_config[d->hwirq].group = info->group; 414405d32df1SMarc Zyngier its_configure_sgi(d, false); 414505d32df1SMarc Zyngier return 0; 414605d32df1SMarc Zyngier 414705d32df1SMarc Zyngier default: 414805d32df1SMarc Zyngier return -EINVAL; 414905d32df1SMarc Zyngier } 415005d32df1SMarc Zyngier } 415105d32df1SMarc Zyngier 4152166cba71SMarc Zyngier static struct irq_chip its_sgi_irq_chip = { 4153166cba71SMarc Zyngier .name = "GICv4.1-sgi", 4154b4e8d644SMarc Zyngier .irq_mask = its_sgi_mask_irq, 4155b4e8d644SMarc Zyngier .irq_unmask = its_sgi_unmask_irq, 4156166cba71SMarc Zyngier .irq_set_affinity = its_sgi_set_affinity, 41577017ff0eSMarc Zyngier .irq_set_irqchip_state = its_sgi_set_irqchip_state, 41587017ff0eSMarc Zyngier .irq_get_irqchip_state = its_sgi_get_irqchip_state, 415905d32df1SMarc Zyngier .irq_set_vcpu_affinity = its_sgi_set_vcpu_affinity, 4160166cba71SMarc Zyngier }; 4161166cba71SMarc Zyngier 4162166cba71SMarc Zyngier static int its_sgi_irq_domain_alloc(struct irq_domain *domain, 4163166cba71SMarc Zyngier unsigned int virq, unsigned int nr_irqs, 4164166cba71SMarc Zyngier void *args) 4165166cba71SMarc Zyngier { 4166166cba71SMarc Zyngier struct its_vpe *vpe = args; 4167166cba71SMarc Zyngier int i; 4168166cba71SMarc Zyngier 4169166cba71SMarc Zyngier /* Yes, we do want 16 SGIs */ 4170166cba71SMarc Zyngier WARN_ON(nr_irqs != 16); 4171166cba71SMarc Zyngier 4172166cba71SMarc Zyngier for (i = 0; i < 16; i++) { 4173166cba71SMarc Zyngier vpe->sgi_config[i].priority = 0; 4174166cba71SMarc Zyngier vpe->sgi_config[i].enabled = false; 4175166cba71SMarc Zyngier vpe->sgi_config[i].group = false; 4176166cba71SMarc Zyngier 4177166cba71SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 4178166cba71SMarc Zyngier &its_sgi_irq_chip, vpe); 4179166cba71SMarc Zyngier irq_set_status_flags(virq + i, IRQ_DISABLE_UNLAZY); 4180166cba71SMarc Zyngier } 4181166cba71SMarc Zyngier 4182166cba71SMarc Zyngier return 0; 4183166cba71SMarc Zyngier } 4184166cba71SMarc Zyngier 4185166cba71SMarc Zyngier static void its_sgi_irq_domain_free(struct irq_domain *domain, 4186166cba71SMarc Zyngier unsigned int virq, 4187166cba71SMarc Zyngier unsigned int nr_irqs) 4188166cba71SMarc Zyngier { 4189166cba71SMarc Zyngier /* Nothing to do */ 4190166cba71SMarc Zyngier } 4191166cba71SMarc Zyngier 4192166cba71SMarc Zyngier static int its_sgi_irq_domain_activate(struct irq_domain *domain, 4193166cba71SMarc Zyngier struct irq_data *d, bool reserve) 4194166cba71SMarc Zyngier { 4195e252cf8aSMarc Zyngier /* Write out the initial SGI configuration */ 4196e252cf8aSMarc Zyngier its_configure_sgi(d, false); 4197166cba71SMarc Zyngier return 0; 4198166cba71SMarc Zyngier } 4199166cba71SMarc Zyngier 4200166cba71SMarc Zyngier static void its_sgi_irq_domain_deactivate(struct irq_domain *domain, 4201166cba71SMarc Zyngier struct irq_data *d) 4202166cba71SMarc Zyngier { 4203e252cf8aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4204e252cf8aSMarc Zyngier 4205e252cf8aSMarc Zyngier /* 4206e252cf8aSMarc Zyngier * The VSGI command is awkward: 4207e252cf8aSMarc Zyngier * 4208e252cf8aSMarc Zyngier * - To change the configuration, CLEAR must be set to false, 4209e252cf8aSMarc Zyngier * leaving the pending bit unchanged. 4210e252cf8aSMarc Zyngier * - To clear the pending bit, CLEAR must be set to true, leaving 4211e252cf8aSMarc Zyngier * the configuration unchanged. 4212e252cf8aSMarc Zyngier * 4213e252cf8aSMarc Zyngier * You just can't do both at once, hence the two commands below. 4214e252cf8aSMarc Zyngier */ 4215e252cf8aSMarc Zyngier vpe->sgi_config[d->hwirq].enabled = false; 4216e252cf8aSMarc Zyngier its_configure_sgi(d, false); 4217e252cf8aSMarc Zyngier its_configure_sgi(d, true); 4218166cba71SMarc Zyngier } 4219166cba71SMarc Zyngier 4220166cba71SMarc Zyngier static const struct irq_domain_ops its_sgi_domain_ops = { 4221166cba71SMarc Zyngier .alloc = its_sgi_irq_domain_alloc, 4222166cba71SMarc Zyngier .free = its_sgi_irq_domain_free, 4223166cba71SMarc Zyngier .activate = its_sgi_irq_domain_activate, 4224166cba71SMarc Zyngier .deactivate = its_sgi_irq_domain_deactivate, 4225166cba71SMarc Zyngier }; 4226166cba71SMarc Zyngier 42277d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 42287d75bbb4SMarc Zyngier { 422932bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 42307d75bbb4SMarc Zyngier } 42317d75bbb4SMarc Zyngier 42327d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 42337d75bbb4SMarc Zyngier { 42347d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 42357d75bbb4SMarc Zyngier } 42367d75bbb4SMarc Zyngier 42377d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 42387d75bbb4SMarc Zyngier { 42397d75bbb4SMarc Zyngier struct page *vpt_page; 42407d75bbb4SMarc Zyngier int vpe_id; 42417d75bbb4SMarc Zyngier 42427d75bbb4SMarc Zyngier /* Allocate vpe_id */ 42437d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 42447d75bbb4SMarc Zyngier if (vpe_id < 0) 42457d75bbb4SMarc Zyngier return vpe_id; 42467d75bbb4SMarc Zyngier 42477d75bbb4SMarc Zyngier /* Allocate VPT */ 42487d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 42497d75bbb4SMarc Zyngier if (!vpt_page) { 42507d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 42517d75bbb4SMarc Zyngier return -ENOMEM; 42527d75bbb4SMarc Zyngier } 42537d75bbb4SMarc Zyngier 42547d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 42557d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 425634f8eb92SNianyao Tang its_free_pending_table(vpt_page); 42577d75bbb4SMarc Zyngier return -ENOMEM; 42587d75bbb4SMarc Zyngier } 42597d75bbb4SMarc Zyngier 4260f3a05921SMarc Zyngier raw_spin_lock_init(&vpe->vpe_lock); 42617d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 42627d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 426364edfaa9SMarc Zyngier if (gic_rdists->has_rvpeid) 426464edfaa9SMarc Zyngier atomic_set(&vpe->vmapp_count, 0); 426564edfaa9SMarc Zyngier else 426620b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 42677d75bbb4SMarc Zyngier 42687d75bbb4SMarc Zyngier return 0; 42697d75bbb4SMarc Zyngier } 42707d75bbb4SMarc Zyngier 42717d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 42727d75bbb4SMarc Zyngier { 427320b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 42747d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 42757d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 42767d75bbb4SMarc Zyngier } 42777d75bbb4SMarc Zyngier 42787d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 42797d75bbb4SMarc Zyngier unsigned int virq, 42807d75bbb4SMarc Zyngier unsigned int nr_irqs) 42817d75bbb4SMarc Zyngier { 42827d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 42837d75bbb4SMarc Zyngier int i; 42847d75bbb4SMarc Zyngier 42857d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 42867d75bbb4SMarc Zyngier 42877d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 42887d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 42897d75bbb4SMarc Zyngier virq + i); 42907d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 42917d75bbb4SMarc Zyngier 42927d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 42937d75bbb4SMarc Zyngier 42947d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 42957d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 42967d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 42977d75bbb4SMarc Zyngier } 42987d75bbb4SMarc Zyngier 42997d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 430038dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 43017d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 43027d75bbb4SMarc Zyngier } 43037d75bbb4SMarc Zyngier } 43047d75bbb4SMarc Zyngier 43057d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 43067d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 43077d75bbb4SMarc Zyngier { 430829c647f3SMarc Zyngier struct irq_chip *irqchip = &its_vpe_irq_chip; 43097d75bbb4SMarc Zyngier struct its_vm *vm = args; 43107d75bbb4SMarc Zyngier unsigned long *bitmap; 43117d75bbb4SMarc Zyngier struct page *vprop_page; 43127d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 43137d75bbb4SMarc Zyngier 43147d75bbb4SMarc Zyngier BUG_ON(!vm); 43157d75bbb4SMarc Zyngier 431638dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 43177d75bbb4SMarc Zyngier if (!bitmap) 43187d75bbb4SMarc Zyngier return -ENOMEM; 43197d75bbb4SMarc Zyngier 43207d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 432138dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 43227d75bbb4SMarc Zyngier return -ENOMEM; 43237d75bbb4SMarc Zyngier } 43247d75bbb4SMarc Zyngier 43257d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 43267d75bbb4SMarc Zyngier if (!vprop_page) { 432738dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 43287d75bbb4SMarc Zyngier return -ENOMEM; 43297d75bbb4SMarc Zyngier } 43307d75bbb4SMarc Zyngier 43317d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 43327d75bbb4SMarc Zyngier vm->db_lpi_base = base; 43337d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 43347d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 43357d75bbb4SMarc Zyngier 433629c647f3SMarc Zyngier if (gic_rdists->has_rvpeid) 433729c647f3SMarc Zyngier irqchip = &its_vpe_4_1_irq_chip; 433829c647f3SMarc Zyngier 43397d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 43407d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 43417d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 43427d75bbb4SMarc Zyngier if (err) 43437d75bbb4SMarc Zyngier break; 43447d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 43457d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 43467d75bbb4SMarc Zyngier if (err) 43477d75bbb4SMarc Zyngier break; 43487d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 434929c647f3SMarc Zyngier irqchip, vm->vpes[i]); 43507d75bbb4SMarc Zyngier set_bit(i, bitmap); 43517d75bbb4SMarc Zyngier } 43527d75bbb4SMarc Zyngier 43537d75bbb4SMarc Zyngier if (err) { 43547d75bbb4SMarc Zyngier if (i > 0) 43557d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 43567d75bbb4SMarc Zyngier 435738dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 43587d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 43597d75bbb4SMarc Zyngier } 43607d75bbb4SMarc Zyngier 43617d75bbb4SMarc Zyngier return err; 43627d75bbb4SMarc Zyngier } 43637d75bbb4SMarc Zyngier 436472491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 4365702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 4366eb78192bSMarc Zyngier { 4367eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 436840619a2eSMarc Zyngier struct its_node *its; 4369eb78192bSMarc Zyngier 4370009384b3SMarc Zyngier /* 4371009384b3SMarc Zyngier * If we use the list map, we issue VMAPP on demand... Unless 4372009384b3SMarc Zyngier * we're on a GICv4.1 and we eagerly map the VPE on all ITSs 4373009384b3SMarc Zyngier * so that VSGIs can work. 4374009384b3SMarc Zyngier */ 4375009384b3SMarc Zyngier if (!gic_requires_eager_mapping()) 43766ef930f2SMarc Zyngier return 0; 4377eb78192bSMarc Zyngier 4378eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 4379eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 438040619a2eSMarc Zyngier 438140619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 43820dd57fedSMarc Zyngier if (!is_v4(its)) 438340619a2eSMarc Zyngier continue; 438440619a2eSMarc Zyngier 438575fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 438640619a2eSMarc Zyngier its_send_vinvall(its, vpe); 438740619a2eSMarc Zyngier } 438840619a2eSMarc Zyngier 438944c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 439044c4c25eSMarc Zyngier 439172491643SThomas Gleixner return 0; 4392eb78192bSMarc Zyngier } 4393eb78192bSMarc Zyngier 4394eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 4395eb78192bSMarc Zyngier struct irq_data *d) 4396eb78192bSMarc Zyngier { 4397eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 439875fd951bSMarc Zyngier struct its_node *its; 4399eb78192bSMarc Zyngier 44002247e1bfSMarc Zyngier /* 4401009384b3SMarc Zyngier * If we use the list map on GICv4.0, we unmap the VPE once no 4402009384b3SMarc Zyngier * VLPIs are associated with the VM. 44032247e1bfSMarc Zyngier */ 4404009384b3SMarc Zyngier if (!gic_requires_eager_mapping()) 44052247e1bfSMarc Zyngier return; 44062247e1bfSMarc Zyngier 440775fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 44080dd57fedSMarc Zyngier if (!is_v4(its)) 440975fd951bSMarc Zyngier continue; 441075fd951bSMarc Zyngier 441175fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 441275fd951bSMarc Zyngier } 4413eb78192bSMarc Zyngier } 4414eb78192bSMarc Zyngier 44158fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 44167d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 44177d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 4418eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 4419eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 44208fff27aeSMarc Zyngier }; 44218fff27aeSMarc Zyngier 44224559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 44234559fbb3SYun Wu { 44244559fbb3SYun Wu u32 count = 1000000; /* 1s */ 44254559fbb3SYun Wu u32 val; 44264559fbb3SYun Wu 44274559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 44287611da86SDavid Daney /* 44297611da86SDavid Daney * GIC architecture specification requires the ITS to be both 44307611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 44317611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 44327611da86SDavid Daney */ 44337611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 44344559fbb3SYun Wu return 0; 44354559fbb3SYun Wu 44364559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 4437d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 44384559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 44394559fbb3SYun Wu 44404559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 44414559fbb3SYun Wu while (1) { 44424559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 44434559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 44444559fbb3SYun Wu return 0; 44454559fbb3SYun Wu 44464559fbb3SYun Wu count--; 44474559fbb3SYun Wu if (!count) 44484559fbb3SYun Wu return -EBUSY; 44494559fbb3SYun Wu 44504559fbb3SYun Wu cpu_relax(); 44514559fbb3SYun Wu udelay(1); 44524559fbb3SYun Wu } 44534559fbb3SYun Wu } 44544559fbb3SYun Wu 44559d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 445694100970SRobert Richter { 445794100970SRobert Richter struct its_node *its = data; 445894100970SRobert Richter 4459576a8342SMarc Zyngier /* erratum 22375: only alloc 8MB table size (20 bits) */ 4460576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 4461576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); 446294100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 44639d111d49SArd Biesheuvel 44649d111d49SArd Biesheuvel return true; 446594100970SRobert Richter } 446694100970SRobert Richter 44679d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 4468fbf8f40eSGanapatrao Kulkarni { 4469fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 4470fbf8f40eSGanapatrao Kulkarni 4471fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 44729d111d49SArd Biesheuvel 44739d111d49SArd Biesheuvel return true; 4474fbf8f40eSGanapatrao Kulkarni } 4475fbf8f40eSGanapatrao Kulkarni 44769d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 447790922a2dSShanker Donthineni { 447890922a2dSShanker Donthineni struct its_node *its = data; 447990922a2dSShanker Donthineni 448090922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 4481ffedbf0cSMarc Zyngier its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; 4482ffedbf0cSMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); 44839d111d49SArd Biesheuvel 44849d111d49SArd Biesheuvel return true; 448590922a2dSShanker Donthineni } 448690922a2dSShanker Donthineni 4487558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 4488558b0165SArd Biesheuvel { 4489558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 4490558b0165SArd Biesheuvel 4491558b0165SArd Biesheuvel /* 4492558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 4493558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 4494558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 4495558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 4496558b0165SArd Biesheuvel * the window offset. 4497558b0165SArd Biesheuvel */ 4498558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 4499558b0165SArd Biesheuvel } 4500558b0165SArd Biesheuvel 4501558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 4502558b0165SArd Biesheuvel { 4503558b0165SArd Biesheuvel struct its_node *its = data; 4504558b0165SArd Biesheuvel u32 pre_its_window[2]; 4505558b0165SArd Biesheuvel u32 ids; 4506558b0165SArd Biesheuvel 4507558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 4508558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 4509558b0165SArd Biesheuvel pre_its_window, 4510558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 4511558b0165SArd Biesheuvel 4512558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 4513558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 4514558b0165SArd Biesheuvel 4515558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 4516576a8342SMarc Zyngier if (device_ids(its) > ids) { 4517576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 4518576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); 4519576a8342SMarc Zyngier } 4520558b0165SArd Biesheuvel 4521558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 4522558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 4523558b0165SArd Biesheuvel return true; 4524558b0165SArd Biesheuvel } 4525558b0165SArd Biesheuvel return false; 4526558b0165SArd Biesheuvel } 4527558b0165SArd Biesheuvel 45285c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 45295c9a882eSMarc Zyngier { 45305c9a882eSMarc Zyngier struct its_node *its = data; 45315c9a882eSMarc Zyngier 45325c9a882eSMarc Zyngier /* 45335c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 45345c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 45355c9a882eSMarc Zyngier */ 45365c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 45375c9a882eSMarc Zyngier return true; 4538cc2d3216SMarc Zyngier } 45394c21f3c2SMarc Zyngier 454067510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 454194100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 454294100970SRobert Richter { 454394100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 454494100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 454594100970SRobert Richter .mask = 0xffff0fff, 454694100970SRobert Richter .init = its_enable_quirk_cavium_22375, 454794100970SRobert Richter }, 454894100970SRobert Richter #endif 4549fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 4550fbf8f40eSGanapatrao Kulkarni { 4551fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 4552fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 4553fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 4554fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 4555fbf8f40eSGanapatrao Kulkarni }, 4556fbf8f40eSGanapatrao Kulkarni #endif 455790922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 455890922a2dSShanker Donthineni { 455990922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 456090922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 456190922a2dSShanker Donthineni .mask = 0xffffffff, 456290922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 456390922a2dSShanker Donthineni }, 456490922a2dSShanker Donthineni #endif 4565558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 4566558b0165SArd Biesheuvel { 4567558b0165SArd Biesheuvel /* 4568558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 4569558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 4570558b0165SArd Biesheuvel * special handling in software. 4571558b0165SArd Biesheuvel */ 4572558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 4573558b0165SArd Biesheuvel .iidr = 0x0001143b, 4574558b0165SArd Biesheuvel .mask = 0xffffffff, 4575558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 4576558b0165SArd Biesheuvel }, 4577558b0165SArd Biesheuvel #endif 45785c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 45795c9a882eSMarc Zyngier { 45805c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 45815c9a882eSMarc Zyngier .iidr = 0x00000004, 45825c9a882eSMarc Zyngier .mask = 0xffffffff, 45835c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 45845c9a882eSMarc Zyngier }, 45855c9a882eSMarc Zyngier #endif 458667510ccaSRobert Richter { 458767510ccaSRobert Richter } 458867510ccaSRobert Richter }; 458967510ccaSRobert Richter 459067510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 459167510ccaSRobert Richter { 459267510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 459367510ccaSRobert Richter 459467510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 459567510ccaSRobert Richter } 459667510ccaSRobert Richter 4597dba0bc7bSDerek Basehore static int its_save_disable(void) 4598dba0bc7bSDerek Basehore { 4599dba0bc7bSDerek Basehore struct its_node *its; 4600dba0bc7bSDerek Basehore int err = 0; 4601dba0bc7bSDerek Basehore 4602a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4603dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4604dba0bc7bSDerek Basehore void __iomem *base; 4605dba0bc7bSDerek Basehore 4606dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 4607dba0bc7bSDerek Basehore continue; 4608dba0bc7bSDerek Basehore 4609dba0bc7bSDerek Basehore base = its->base; 4610dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 4611dba0bc7bSDerek Basehore err = its_force_quiescent(base); 4612dba0bc7bSDerek Basehore if (err) { 4613dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 4614dba0bc7bSDerek Basehore &its->phys_base, err); 4615dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4616dba0bc7bSDerek Basehore goto err; 4617dba0bc7bSDerek Basehore } 4618dba0bc7bSDerek Basehore 4619dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 4620dba0bc7bSDerek Basehore } 4621dba0bc7bSDerek Basehore 4622dba0bc7bSDerek Basehore err: 4623dba0bc7bSDerek Basehore if (err) { 4624dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 4625dba0bc7bSDerek Basehore void __iomem *base; 4626dba0bc7bSDerek Basehore 4627dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 4628dba0bc7bSDerek Basehore continue; 4629dba0bc7bSDerek Basehore 4630dba0bc7bSDerek Basehore base = its->base; 4631dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4632dba0bc7bSDerek Basehore } 4633dba0bc7bSDerek Basehore } 4634a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4635dba0bc7bSDerek Basehore 4636dba0bc7bSDerek Basehore return err; 4637dba0bc7bSDerek Basehore } 4638dba0bc7bSDerek Basehore 4639dba0bc7bSDerek Basehore static void its_restore_enable(void) 4640dba0bc7bSDerek Basehore { 4641dba0bc7bSDerek Basehore struct its_node *its; 4642dba0bc7bSDerek Basehore int ret; 4643dba0bc7bSDerek Basehore 4644a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4645dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4646dba0bc7bSDerek Basehore void __iomem *base; 4647dba0bc7bSDerek Basehore int i; 4648dba0bc7bSDerek Basehore 4649dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 4650dba0bc7bSDerek Basehore continue; 4651dba0bc7bSDerek Basehore 4652dba0bc7bSDerek Basehore base = its->base; 4653dba0bc7bSDerek Basehore 4654dba0bc7bSDerek Basehore /* 4655dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 4656dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 4657dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 4658dba0bc7bSDerek Basehore * Specification. 4659dba0bc7bSDerek Basehore */ 4660dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 4661dba0bc7bSDerek Basehore if (ret) { 4662dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 4663dba0bc7bSDerek Basehore &its->phys_base, ret); 4664dba0bc7bSDerek Basehore continue; 4665dba0bc7bSDerek Basehore } 4666dba0bc7bSDerek Basehore 4667dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 4668dba0bc7bSDerek Basehore 4669dba0bc7bSDerek Basehore /* 4670dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 4671dba0bc7bSDerek Basehore * cmd_write line up with it. 4672dba0bc7bSDerek Basehore */ 4673dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 4674dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 4675dba0bc7bSDerek Basehore 4676dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 4677dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 4678dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 4679dba0bc7bSDerek Basehore 4680dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 4681dba0bc7bSDerek Basehore continue; 4682dba0bc7bSDerek Basehore 4683dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 4684dba0bc7bSDerek Basehore } 4685dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4686920181ceSDerek Basehore 4687920181ceSDerek Basehore /* 4688920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 4689920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 4690920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 4691920181ceSDerek Basehore */ 4692920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 4693920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 4694920181ceSDerek Basehore its_cpu_init_collection(its); 4695dba0bc7bSDerek Basehore } 4696a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4697dba0bc7bSDerek Basehore } 4698dba0bc7bSDerek Basehore 4699dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 4700dba0bc7bSDerek Basehore .suspend = its_save_disable, 4701dba0bc7bSDerek Basehore .resume = its_restore_enable, 4702dba0bc7bSDerek Basehore }; 4703dba0bc7bSDerek Basehore 4704db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 4705d14ae5e6STomasz Nowicki { 4706d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 4707d14ae5e6STomasz Nowicki struct msi_domain_info *info; 4708d14ae5e6STomasz Nowicki 4709d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 4710d14ae5e6STomasz Nowicki if (!info) 4711d14ae5e6STomasz Nowicki return -ENOMEM; 4712d14ae5e6STomasz Nowicki 4713db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 4714d14ae5e6STomasz Nowicki if (!inner_domain) { 4715d14ae5e6STomasz Nowicki kfree(info); 4716d14ae5e6STomasz Nowicki return -ENOMEM; 4717d14ae5e6STomasz Nowicki } 4718d14ae5e6STomasz Nowicki 4719db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 472096f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 4721558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 4722d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 4723d14ae5e6STomasz Nowicki info->data = its; 4724d14ae5e6STomasz Nowicki inner_domain->host_data = info; 4725d14ae5e6STomasz Nowicki 4726d14ae5e6STomasz Nowicki return 0; 4727d14ae5e6STomasz Nowicki } 4728d14ae5e6STomasz Nowicki 47298fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 47308fff27aeSMarc Zyngier { 473120b3d54eSMarc Zyngier struct its_node *its; 473220b3d54eSMarc Zyngier u32 devid; 473320b3d54eSMarc Zyngier int entries; 473420b3d54eSMarc Zyngier 473520b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 473620b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 473720b3d54eSMarc Zyngier return 0; 473820b3d54eSMarc Zyngier } 473920b3d54eSMarc Zyngier 474020b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 474120b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 474220b3d54eSMarc Zyngier 474320b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 47446396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 474520b3d54eSMarc Zyngier GFP_KERNEL); 474620b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 474720b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 474820b3d54eSMarc Zyngier return -ENOMEM; 474920b3d54eSMarc Zyngier } 475020b3d54eSMarc Zyngier 475120b3d54eSMarc Zyngier /* Use the last possible DevID */ 4752576a8342SMarc Zyngier devid = GENMASK(device_ids(its) - 1, 0); 475320b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 475420b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 475520b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 475620b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 475720b3d54eSMarc Zyngier return -ENOMEM; 475820b3d54eSMarc Zyngier } 475920b3d54eSMarc Zyngier 4760c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 476120b3d54eSMarc Zyngier 476220b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 476320b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 476420b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 476520b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 476620b3d54eSMarc Zyngier 47678fff27aeSMarc Zyngier return 0; 47688fff27aeSMarc Zyngier } 47698fff27aeSMarc Zyngier 47703dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 47713dfa576bSMarc Zyngier void __iomem *its_base) 47723dfa576bSMarc Zyngier { 47733dfa576bSMarc Zyngier int its_number; 47743dfa576bSMarc Zyngier u32 ctlr; 47753dfa576bSMarc Zyngier 47763dfa576bSMarc Zyngier /* 47773dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 47783dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 47793dfa576bSMarc Zyngier * locking. Should this change, we should address 47803dfa576bSMarc Zyngier * this. 47813dfa576bSMarc Zyngier */ 4782ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 4783ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 47843dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 47853dfa576bSMarc Zyngier &res->start); 47863dfa576bSMarc Zyngier return -EINVAL; 47873dfa576bSMarc Zyngier } 47883dfa576bSMarc Zyngier 47893dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 47903dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 47913dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 47923dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 47933dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 47943dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 47953dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 47963dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 47973dfa576bSMarc Zyngier } 47983dfa576bSMarc Zyngier 47993dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 48003dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 48013dfa576bSMarc Zyngier &res->start, its_number); 48023dfa576bSMarc Zyngier return -EINVAL; 48033dfa576bSMarc Zyngier } 48043dfa576bSMarc Zyngier 48053dfa576bSMarc Zyngier return its_number; 48063dfa576bSMarc Zyngier } 48073dfa576bSMarc Zyngier 4808db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 4809db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 48104c21f3c2SMarc Zyngier { 48114c21f3c2SMarc Zyngier struct its_node *its; 48124c21f3c2SMarc Zyngier void __iomem *its_base; 48133dfa576bSMarc Zyngier u32 val, ctlr; 48143dfa576bSMarc Zyngier u64 baser, tmp, typer; 4815539d3782SShanker Donthineni struct page *page; 48164c21f3c2SMarc Zyngier int err; 48174c21f3c2SMarc Zyngier 48185e46a484SMarc Zyngier its_base = ioremap(res->start, SZ_64K); 48194c21f3c2SMarc Zyngier if (!its_base) { 4820db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 48214c21f3c2SMarc Zyngier return -ENOMEM; 48224c21f3c2SMarc Zyngier } 48234c21f3c2SMarc Zyngier 48244c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 48254c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 4826db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 48274c21f3c2SMarc Zyngier err = -ENODEV; 48284c21f3c2SMarc Zyngier goto out_unmap; 48294c21f3c2SMarc Zyngier } 48304c21f3c2SMarc Zyngier 48314559fbb3SYun Wu err = its_force_quiescent(its_base); 48324559fbb3SYun Wu if (err) { 4833db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 48344559fbb3SYun Wu goto out_unmap; 48354559fbb3SYun Wu } 48364559fbb3SYun Wu 4837db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 48384c21f3c2SMarc Zyngier 48394c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 48404c21f3c2SMarc Zyngier if (!its) { 48414c21f3c2SMarc Zyngier err = -ENOMEM; 48424c21f3c2SMarc Zyngier goto out_unmap; 48434c21f3c2SMarc Zyngier } 48444c21f3c2SMarc Zyngier 48454c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 48469791ec7dSMarc Zyngier mutex_init(&its->dev_alloc_lock); 48474c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 48484c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 48493dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 48500dd57fedSMarc Zyngier its->typer = typer; 48514c21f3c2SMarc Zyngier its->base = its_base; 4852db40f0a7STomasz Nowicki its->phys_base = res->start; 48530dd57fedSMarc Zyngier if (is_v4(its)) { 48543dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 48553dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 48563dfa576bSMarc Zyngier if (err < 0) 48573dfa576bSMarc Zyngier goto out_free_its; 48583dfa576bSMarc Zyngier 4859debf6d02SMarc Zyngier its->list_nr = err; 4860debf6d02SMarc Zyngier 48613dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 48623dfa576bSMarc Zyngier &res->start, err); 48633dfa576bSMarc Zyngier } else { 48643dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 48653dfa576bSMarc Zyngier } 48665e516846SMarc Zyngier 48675e516846SMarc Zyngier if (is_v4_1(its)) { 48685e516846SMarc Zyngier u32 svpet = FIELD_GET(GITS_TYPER_SVPET, typer); 48695e46a484SMarc Zyngier 48705e46a484SMarc Zyngier its->sgir_base = ioremap(res->start + SZ_128K, SZ_64K); 48715e46a484SMarc Zyngier if (!its->sgir_base) { 48725e46a484SMarc Zyngier err = -ENOMEM; 48735e46a484SMarc Zyngier goto out_free_its; 48745e46a484SMarc Zyngier } 48755e46a484SMarc Zyngier 48765e516846SMarc Zyngier its->mpidr = readl_relaxed(its_base + GITS_MPIDR); 48775e516846SMarc Zyngier 48785e516846SMarc Zyngier pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n", 48795e516846SMarc Zyngier &res->start, its->mpidr, svpet); 48805e516846SMarc Zyngier } 48813dfa576bSMarc Zyngier } 48823dfa576bSMarc Zyngier 4883db40f0a7STomasz Nowicki its->numa_node = numa_node; 48844c21f3c2SMarc Zyngier 4885539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 48865bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 4887539d3782SShanker Donthineni if (!page) { 48884c21f3c2SMarc Zyngier err = -ENOMEM; 48895e46a484SMarc Zyngier goto out_unmap_sgir; 48904c21f3c2SMarc Zyngier } 4891539d3782SShanker Donthineni its->cmd_base = (void *)page_address(page); 48924c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 4893558b0165SArd Biesheuvel its->fwnode_handle = handle; 4894558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 4895558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 48964c21f3c2SMarc Zyngier 489767510ccaSRobert Richter its_enable_quirks(its); 489867510ccaSRobert Richter 48990e0b0f69SShanker Donthineni err = its_alloc_tables(its); 49004c21f3c2SMarc Zyngier if (err) 49014c21f3c2SMarc Zyngier goto out_free_cmd; 49024c21f3c2SMarc Zyngier 49034c21f3c2SMarc Zyngier err = its_alloc_collections(its); 49044c21f3c2SMarc Zyngier if (err) 49054c21f3c2SMarc Zyngier goto out_free_tables; 49064c21f3c2SMarc Zyngier 49074c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 49082fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 49094c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 49104c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 49114c21f3c2SMarc Zyngier GITS_CBASER_VALID); 49124c21f3c2SMarc Zyngier 49130968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 49140968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 49154c21f3c2SMarc Zyngier 49164ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 4917241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 4918241a386cSMarc Zyngier /* 4919241a386cSMarc Zyngier * The HW reports non-shareable, we must 4920241a386cSMarc Zyngier * remove the cacheability attributes as 4921241a386cSMarc Zyngier * well. 4922241a386cSMarc Zyngier */ 4923241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 4924241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 4925241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 49260968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 4927241a386cSMarc Zyngier } 49284c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 49294c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 49304c21f3c2SMarc Zyngier } 49314c21f3c2SMarc Zyngier 49320968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 49333dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 4934d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 49350dd57fedSMarc Zyngier if (is_v4(its)) 4936d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 4937d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 4938241a386cSMarc Zyngier 4939dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 4940dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 4941dba0bc7bSDerek Basehore 4942db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 4943d14ae5e6STomasz Nowicki if (err) 494454456db9SMarc Zyngier goto out_free_tables; 49454c21f3c2SMarc Zyngier 4946a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 49474c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 4948a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 49494c21f3c2SMarc Zyngier 49504c21f3c2SMarc Zyngier return 0; 49514c21f3c2SMarc Zyngier 49524c21f3c2SMarc Zyngier out_free_tables: 49534c21f3c2SMarc Zyngier its_free_tables(its); 49544c21f3c2SMarc Zyngier out_free_cmd: 49555bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 49565e46a484SMarc Zyngier out_unmap_sgir: 49575e46a484SMarc Zyngier if (its->sgir_base) 49585e46a484SMarc Zyngier iounmap(its->sgir_base); 49594c21f3c2SMarc Zyngier out_free_its: 49604c21f3c2SMarc Zyngier kfree(its); 49614c21f3c2SMarc Zyngier out_unmap: 49624c21f3c2SMarc Zyngier iounmap(its_base); 4963db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 49644c21f3c2SMarc Zyngier return err; 49654c21f3c2SMarc Zyngier } 49664c21f3c2SMarc Zyngier 49674c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 49684c21f3c2SMarc Zyngier { 4969589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 49704c21f3c2SMarc Zyngier } 49714c21f3c2SMarc Zyngier 49726eb486b6SShanker Donthineni static int redist_disable_lpis(void) 49734c21f3c2SMarc Zyngier { 49746eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 49756eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 49766eb486b6SShanker Donthineni u64 val; 49776eb486b6SShanker Donthineni 49784c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 49794c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 49804c21f3c2SMarc Zyngier return -ENXIO; 49814c21f3c2SMarc Zyngier } 49826eb486b6SShanker Donthineni 49836eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 49846eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 49856eb486b6SShanker Donthineni return 0; 49866eb486b6SShanker Donthineni 498711e37d35SMarc Zyngier /* 498811e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 498911e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 499011e37d35SMarc Zyngier * configured and all is well in the world. 4991c440a9d9SMarc Zyngier * 4992c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 499311e37d35SMarc Zyngier */ 4994c440a9d9SMarc Zyngier if (gic_data_rdist()->lpi_enabled || 4995c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 499611e37d35SMarc Zyngier return 0; 499711e37d35SMarc Zyngier 499811e37d35SMarc Zyngier /* 499911e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 500011e37d35SMarc Zyngier */ 500111e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 50026eb486b6SShanker Donthineni smp_processor_id()); 50036eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 50046eb486b6SShanker Donthineni 50056eb486b6SShanker Donthineni /* Disable LPIs */ 50066eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 50076eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 50086eb486b6SShanker Donthineni 50096eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 50106eb486b6SShanker Donthineni dsb(sy); 50116eb486b6SShanker Donthineni 50126eb486b6SShanker Donthineni /* 50136eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 50146eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 50156eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 50166eb486b6SShanker Donthineni */ 50176eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 50186eb486b6SShanker Donthineni if (!timeout) { 50196eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 50206eb486b6SShanker Donthineni smp_processor_id()); 50216eb486b6SShanker Donthineni return -ETIMEDOUT; 50226eb486b6SShanker Donthineni } 50236eb486b6SShanker Donthineni udelay(1); 50246eb486b6SShanker Donthineni timeout--; 50256eb486b6SShanker Donthineni } 50266eb486b6SShanker Donthineni 50276eb486b6SShanker Donthineni /* 50286eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 50296eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 50306eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 50316eb486b6SShanker Donthineni */ 50326eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 50336eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 50346eb486b6SShanker Donthineni return -EBUSY; 50356eb486b6SShanker Donthineni } 50366eb486b6SShanker Donthineni 50376eb486b6SShanker Donthineni return 0; 50386eb486b6SShanker Donthineni } 50396eb486b6SShanker Donthineni 50406eb486b6SShanker Donthineni int its_cpu_init(void) 50416eb486b6SShanker Donthineni { 50426eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 50436eb486b6SShanker Donthineni int ret; 50446eb486b6SShanker Donthineni 50456eb486b6SShanker Donthineni ret = redist_disable_lpis(); 50466eb486b6SShanker Donthineni if (ret) 50476eb486b6SShanker Donthineni return ret; 50486eb486b6SShanker Donthineni 50494c21f3c2SMarc Zyngier its_cpu_init_lpis(); 5050920181ceSDerek Basehore its_cpu_init_collections(); 50514c21f3c2SMarc Zyngier } 50524c21f3c2SMarc Zyngier 50534c21f3c2SMarc Zyngier return 0; 50544c21f3c2SMarc Zyngier } 50554c21f3c2SMarc Zyngier 5056935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 50574c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 50584c21f3c2SMarc Zyngier {}, 50594c21f3c2SMarc Zyngier }; 50604c21f3c2SMarc Zyngier 5061db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 50624c21f3c2SMarc Zyngier { 50634c21f3c2SMarc Zyngier struct device_node *np; 5064db40f0a7STomasz Nowicki struct resource res; 50654c21f3c2SMarc Zyngier 50664c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 50674c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 506895a25625SStephen Boyd if (!of_device_is_available(np)) 506995a25625SStephen Boyd continue; 5070d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 5071e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 5072e81f54c6SRob Herring np); 5073d14ae5e6STomasz Nowicki continue; 5074d14ae5e6STomasz Nowicki } 5075d14ae5e6STomasz Nowicki 5076db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 5077e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 5078db40f0a7STomasz Nowicki continue; 50794c21f3c2SMarc Zyngier } 50804c21f3c2SMarc Zyngier 5081db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 5082db40f0a7STomasz Nowicki } 5083db40f0a7STomasz Nowicki return 0; 5084db40f0a7STomasz Nowicki } 5085db40f0a7STomasz Nowicki 50863f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 50873f010cf1STomasz Nowicki 50883f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 50893f010cf1STomasz Nowicki 5090d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 5091dbd2b826SGanapatrao Kulkarni struct its_srat_map { 5092dbd2b826SGanapatrao Kulkarni /* numa node id */ 5093dbd2b826SGanapatrao Kulkarni u32 numa_node; 5094dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 5095dbd2b826SGanapatrao Kulkarni u32 its_id; 5096dbd2b826SGanapatrao Kulkarni }; 5097dbd2b826SGanapatrao Kulkarni 5098fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 5099dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 5100dbd2b826SGanapatrao Kulkarni 5101dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 5102dbd2b826SGanapatrao Kulkarni { 5103dbd2b826SGanapatrao Kulkarni int i; 5104dbd2b826SGanapatrao Kulkarni 5105dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 5106dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 5107dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 5108dbd2b826SGanapatrao Kulkarni } 5109dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 5110dbd2b826SGanapatrao Kulkarni } 5111dbd2b826SGanapatrao Kulkarni 511260574d1eSKeith Busch static int __init gic_acpi_match_srat_its(union acpi_subtable_headers *header, 5113fdf6e7a8SHanjun Guo const unsigned long end) 5114fdf6e7a8SHanjun Guo { 5115fdf6e7a8SHanjun Guo return 0; 5116fdf6e7a8SHanjun Guo } 5117fdf6e7a8SHanjun Guo 511860574d1eSKeith Busch static int __init gic_acpi_parse_srat_its(union acpi_subtable_headers *header, 5119dbd2b826SGanapatrao Kulkarni const unsigned long end) 5120dbd2b826SGanapatrao Kulkarni { 5121dbd2b826SGanapatrao Kulkarni int node; 5122dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 5123dbd2b826SGanapatrao Kulkarni 5124dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 5125dbd2b826SGanapatrao Kulkarni if (!its_affinity) 5126dbd2b826SGanapatrao Kulkarni return -EINVAL; 5127dbd2b826SGanapatrao Kulkarni 5128dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 5129dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 5130dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 5131dbd2b826SGanapatrao Kulkarni return -EINVAL; 5132dbd2b826SGanapatrao Kulkarni } 5133dbd2b826SGanapatrao Kulkarni 5134dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 5135dbd2b826SGanapatrao Kulkarni 5136dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 5137dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 5138dbd2b826SGanapatrao Kulkarni return 0; 5139dbd2b826SGanapatrao Kulkarni } 5140dbd2b826SGanapatrao Kulkarni 5141dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 5142dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 5143dbd2b826SGanapatrao Kulkarni its_in_srat++; 5144dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 5145dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 5146dbd2b826SGanapatrao Kulkarni 5147dbd2b826SGanapatrao Kulkarni return 0; 5148dbd2b826SGanapatrao Kulkarni } 5149dbd2b826SGanapatrao Kulkarni 5150dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 5151dbd2b826SGanapatrao Kulkarni { 5152fdf6e7a8SHanjun Guo int count; 5153fdf6e7a8SHanjun Guo 5154fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 5155fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 5156fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 5157fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 5158fdf6e7a8SHanjun Guo if (count <= 0) 5159fdf6e7a8SHanjun Guo return; 5160fdf6e7a8SHanjun Guo 51616da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 5162fdf6e7a8SHanjun Guo GFP_KERNEL); 5163fdf6e7a8SHanjun Guo if (!its_srat_maps) { 5164fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 5165fdf6e7a8SHanjun Guo return; 5166fdf6e7a8SHanjun Guo } 5167fdf6e7a8SHanjun Guo 5168dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 5169dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 5170dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 5171dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 5172dbd2b826SGanapatrao Kulkarni } 5173fdf6e7a8SHanjun Guo 5174fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 5175fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 5176fdf6e7a8SHanjun Guo { 5177fdf6e7a8SHanjun Guo kfree(its_srat_maps); 5178fdf6e7a8SHanjun Guo } 5179dbd2b826SGanapatrao Kulkarni #else 5180dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 5181dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 5182fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 5183dbd2b826SGanapatrao Kulkarni #endif 5184dbd2b826SGanapatrao Kulkarni 518560574d1eSKeith Busch static int __init gic_acpi_parse_madt_its(union acpi_subtable_headers *header, 51863f010cf1STomasz Nowicki const unsigned long end) 51873f010cf1STomasz Nowicki { 51883f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 51893f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 51903f010cf1STomasz Nowicki struct resource res; 51913f010cf1STomasz Nowicki int err; 51923f010cf1STomasz Nowicki 51933f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 51943f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 51953f010cf1STomasz Nowicki res.start = its_entry->base_address; 51963f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 51973f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 51983f010cf1STomasz Nowicki 51995778cc77SMarc Zyngier dom_handle = irq_domain_alloc_fwnode(&res.start); 52003f010cf1STomasz Nowicki if (!dom_handle) { 52013f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 52023f010cf1STomasz Nowicki &res.start); 52033f010cf1STomasz Nowicki return -ENOMEM; 52043f010cf1STomasz Nowicki } 52053f010cf1STomasz Nowicki 52068b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 52078b4282e6SShameer Kolothum dom_handle); 52083f010cf1STomasz Nowicki if (err) { 52093f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 52103f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 52113f010cf1STomasz Nowicki goto dom_err; 52123f010cf1STomasz Nowicki } 52133f010cf1STomasz Nowicki 5214dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 5215dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 52163f010cf1STomasz Nowicki if (!err) 52173f010cf1STomasz Nowicki return 0; 52183f010cf1STomasz Nowicki 52193f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 52203f010cf1STomasz Nowicki dom_err: 52213f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 52223f010cf1STomasz Nowicki return err; 52233f010cf1STomasz Nowicki } 52243f010cf1STomasz Nowicki 52253f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 52263f010cf1STomasz Nowicki { 5227dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 52283f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 52293f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 5230fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 52313f010cf1STomasz Nowicki } 52323f010cf1STomasz Nowicki #else 52333f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 52343f010cf1STomasz Nowicki #endif 52353f010cf1STomasz Nowicki 5236db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 5237db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 5238db40f0a7STomasz Nowicki { 5239db40f0a7STomasz Nowicki struct device_node *of_node; 52408fff27aeSMarc Zyngier struct its_node *its; 52418fff27aeSMarc Zyngier bool has_v4 = false; 52423c40706dSMarc Zyngier bool has_v4_1 = false; 52438fff27aeSMarc Zyngier int err; 5244db40f0a7STomasz Nowicki 52455e516846SMarc Zyngier gic_rdists = rdists; 52465e516846SMarc Zyngier 5247db40f0a7STomasz Nowicki its_parent = parent_domain; 5248db40f0a7STomasz Nowicki of_node = to_of_node(handle); 5249db40f0a7STomasz Nowicki if (of_node) 5250db40f0a7STomasz Nowicki its_of_probe(of_node); 5251db40f0a7STomasz Nowicki else 52523f010cf1STomasz Nowicki its_acpi_probe(); 5253db40f0a7STomasz Nowicki 52544c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 52554c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 52564c21f3c2SMarc Zyngier return -ENXIO; 52574c21f3c2SMarc Zyngier } 52584c21f3c2SMarc Zyngier 525911e37d35SMarc Zyngier err = allocate_lpi_tables(); 52608fff27aeSMarc Zyngier if (err) 52618fff27aeSMarc Zyngier return err; 52628fff27aeSMarc Zyngier 52633c40706dSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 52640dd57fedSMarc Zyngier has_v4 |= is_v4(its); 52653c40706dSMarc Zyngier has_v4_1 |= is_v4_1(its); 52663c40706dSMarc Zyngier } 52673c40706dSMarc Zyngier 52683c40706dSMarc Zyngier /* Don't bother with inconsistent systems */ 52693c40706dSMarc Zyngier if (WARN_ON(!has_v4_1 && rdists->has_rvpeid)) 52703c40706dSMarc Zyngier rdists->has_rvpeid = false; 52718fff27aeSMarc Zyngier 52728fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 5273166cba71SMarc Zyngier const struct irq_domain_ops *sgi_ops; 5274166cba71SMarc Zyngier 5275166cba71SMarc Zyngier if (has_v4_1) 5276166cba71SMarc Zyngier sgi_ops = &its_sgi_domain_ops; 5277166cba71SMarc Zyngier else 5278166cba71SMarc Zyngier sgi_ops = NULL; 5279166cba71SMarc Zyngier 52803d63cb53SMarc Zyngier if (its_init_vpe_domain() || 5281166cba71SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops, sgi_ops)) { 52828fff27aeSMarc Zyngier rdists->has_vlpis = false; 52838fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 52848fff27aeSMarc Zyngier } 52858fff27aeSMarc Zyngier } 52868fff27aeSMarc Zyngier 5287dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 5288dba0bc7bSDerek Basehore 52898fff27aeSMarc Zyngier return 0; 52904c21f3c2SMarc Zyngier } 5291