1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2cc2d3216SMarc Zyngier /* 3d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 4cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 5cc2d3216SMarc Zyngier */ 6cc2d3216SMarc Zyngier 73f010cf1STomasz Nowicki #include <linux/acpi.h> 88d3554b8SHanjun Guo #include <linux/acpi_iort.h> 9ffedbf0cSMarc Zyngier #include <linux/bitfield.h> 10cc2d3216SMarc Zyngier #include <linux/bitmap.h> 11cc2d3216SMarc Zyngier #include <linux/cpu.h> 12c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 13cc2d3216SMarc Zyngier #include <linux/delay.h> 143fb68faeSMarc Zyngier #include <linux/efi.h> 15cc2d3216SMarc Zyngier #include <linux/interrupt.h> 16fa49364cSRobin Murphy #include <linux/iommu.h> 1796806229SMarc Zyngier #include <linux/iopoll.h> 183f010cf1STomasz Nowicki #include <linux/irqdomain.h> 19880cb3cdSMarc Zyngier #include <linux/list.h> 20cc2d3216SMarc Zyngier #include <linux/log2.h> 215e2c9f9aSMarc Zyngier #include <linux/memblock.h> 22cc2d3216SMarc Zyngier #include <linux/mm.h> 23cc2d3216SMarc Zyngier #include <linux/msi.h> 24cc2d3216SMarc Zyngier #include <linux/of.h> 25cc2d3216SMarc Zyngier #include <linux/of_address.h> 26cc2d3216SMarc Zyngier #include <linux/of_irq.h> 27cc2d3216SMarc Zyngier #include <linux/of_pci.h> 28cc2d3216SMarc Zyngier #include <linux/of_platform.h> 29cc2d3216SMarc Zyngier #include <linux/percpu.h> 30cc2d3216SMarc Zyngier #include <linux/slab.h> 31dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 32cc2d3216SMarc Zyngier 3341a83e06SJoel Porquet #include <linux/irqchip.h> 34cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 35c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 36cc2d3216SMarc Zyngier 37cc2d3216SMarc Zyngier #include <asm/cputype.h> 38cc2d3216SMarc Zyngier #include <asm/exception.h> 39cc2d3216SMarc Zyngier 4067510ccaSRobert Richter #include "irq-gic-common.h" 4167510ccaSRobert Richter 4294100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4394100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 44fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 45a8707f55SSebastian Reichel #define ITS_FLAGS_FORCE_NON_SHAREABLE (1ULL << 3) 46cc2d3216SMarc Zyngier 47c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 48c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 49a8707f55SSebastian Reichel #define RDIST_FLAGS_FORCE_NON_SHAREABLE (1 << 2) 50c48ed51cSMarc Zyngier 51c0cdc890SValentin Schneider #define RD_LOCAL_LPI_ENABLED BIT(0) 52d23bc2bcSValentin Schneider #define RD_LOCAL_PENDTABLE_PREALLOCATED BIT(1) 53d23bc2bcSValentin Schneider #define RD_LOCAL_MEMRESERVE_DONE BIT(2) 54c0cdc890SValentin Schneider 55a13b0404SMarc Zyngier static u32 lpi_id_bits; 56a13b0404SMarc Zyngier 57a13b0404SMarc Zyngier /* 58a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 59a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 60a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 61a13b0404SMarc Zyngier */ 62a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 63a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 64a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 65a13b0404SMarc Zyngier 662130b789SJulien Thierry #define LPI_PROP_DEFAULT_PRIO GICD_INT_DEF_PRI 67a13b0404SMarc Zyngier 68cc2d3216SMarc Zyngier /* 69cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 70cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 71cc2d3216SMarc Zyngier * CPU. 72cc2d3216SMarc Zyngier */ 73cc2d3216SMarc Zyngier struct its_collection { 74cc2d3216SMarc Zyngier u64 target_address; 75cc2d3216SMarc Zyngier u16 col_id; 76cc2d3216SMarc Zyngier }; 77cc2d3216SMarc Zyngier 78cc2d3216SMarc Zyngier /* 799347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 809347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 81466b7d16SShanker Donthineni */ 82466b7d16SShanker Donthineni struct its_baser { 83466b7d16SShanker Donthineni void *base; 84466b7d16SShanker Donthineni u64 val; 85466b7d16SShanker Donthineni u32 order; 869347359aSShanker Donthineni u32 psz; 87466b7d16SShanker Donthineni }; 88466b7d16SShanker Donthineni 89558b0165SArd Biesheuvel struct its_device; 90558b0165SArd Biesheuvel 91466b7d16SShanker Donthineni /* 92cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 93841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 94841514abSMarc Zyngier * list of devices writing to it. 959791ec7dSMarc Zyngier * 969791ec7dSMarc Zyngier * dev_alloc_lock has to be taken for device allocations, while the 979791ec7dSMarc Zyngier * spinlock must be taken to parse data structures such as the device 989791ec7dSMarc Zyngier * list. 99cc2d3216SMarc Zyngier */ 100cc2d3216SMarc Zyngier struct its_node { 101cc2d3216SMarc Zyngier raw_spinlock_t lock; 1029791ec7dSMarc Zyngier struct mutex dev_alloc_lock; 103cc2d3216SMarc Zyngier struct list_head entry; 104cc2d3216SMarc Zyngier void __iomem *base; 1055e46a484SMarc Zyngier void __iomem *sgir_base; 106db40f0a7STomasz Nowicki phys_addr_t phys_base; 107cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 108cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 109466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 110cc2d3216SMarc Zyngier struct its_collection *collections; 111558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 112558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 1130dd57fedSMarc Zyngier u64 typer; 114dba0bc7bSDerek Basehore u64 cbaser_save; 115dba0bc7bSDerek Basehore u32 ctlr_save; 1165e516846SMarc Zyngier u32 mpidr; 117cc2d3216SMarc Zyngier struct list_head its_device_list; 118cc2d3216SMarc Zyngier u64 flags; 119debf6d02SMarc Zyngier unsigned long list_nr; 120fbf8f40eSGanapatrao Kulkarni int numa_node; 121558b0165SArd Biesheuvel unsigned int msi_domain_flags; 122558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1235c9a882eSMarc Zyngier int vlpi_redist_offset; 124cc2d3216SMarc Zyngier }; 125cc2d3216SMarc Zyngier 1260dd57fedSMarc Zyngier #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) 1275e516846SMarc Zyngier #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) 128576a8342SMarc Zyngier #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) 1290dd57fedSMarc Zyngier 130cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 131cc2d3216SMarc Zyngier 13232bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 133f2d83409SMarc Zyngier #define ITS_MAX_VPEID_BITS \ 134f2d83409SMarc Zyngier ({ \ 135f2d83409SMarc Zyngier int nvpeid = 16; \ 136f2d83409SMarc Zyngier if (gic_rdists->has_rvpeid && \ 137f2d83409SMarc Zyngier gic_rdists->gicd_typer2 & GICD_TYPER2_VIL) \ 138f2d83409SMarc Zyngier nvpeid = 1 + (gic_rdists->gicd_typer2 & \ 139f2d83409SMarc Zyngier GICD_TYPER2_VID); \ 140f2d83409SMarc Zyngier \ 141f2d83409SMarc Zyngier nvpeid; \ 142f2d83409SMarc Zyngier }) 14332bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 14432bd44dcSShanker Donthineni 1452eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1462eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1472eca0d6cSShanker Donthineni 148591e5becSMarc Zyngier struct event_lpi_map { 149591e5becSMarc Zyngier unsigned long *lpi_map; 150591e5becSMarc Zyngier u16 *col_map; 151591e5becSMarc Zyngier irq_hw_number_t lpi_base; 152591e5becSMarc Zyngier int nr_lpis; 15311635fa2SMarc Zyngier raw_spinlock_t vlpi_lock; 154d011e4e6SMarc Zyngier struct its_vm *vm; 155d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 156d011e4e6SMarc Zyngier int nr_vlpis; 157591e5becSMarc Zyngier }; 158591e5becSMarc Zyngier 159cc2d3216SMarc Zyngier /* 160d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 161d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 162d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 163d011e4e6SMarc Zyngier * indicates which one. 164cc2d3216SMarc Zyngier */ 165cc2d3216SMarc Zyngier struct its_device { 166cc2d3216SMarc Zyngier struct list_head entry; 167cc2d3216SMarc Zyngier struct its_node *its; 168591e5becSMarc Zyngier struct event_lpi_map event_map; 169cc2d3216SMarc Zyngier void *itt; 170cc2d3216SMarc Zyngier u32 nr_ites; 171cc2d3216SMarc Zyngier u32 device_id; 1729791ec7dSMarc Zyngier bool shared; 173cc2d3216SMarc Zyngier }; 174cc2d3216SMarc Zyngier 17520b3d54eSMarc Zyngier static struct { 17620b3d54eSMarc Zyngier raw_spinlock_t lock; 17720b3d54eSMarc Zyngier struct its_device *dev; 17820b3d54eSMarc Zyngier struct its_vpe **vpes; 17920b3d54eSMarc Zyngier int next_victim; 18020b3d54eSMarc Zyngier } vpe_proxy; 18120b3d54eSMarc Zyngier 1822f13ff1dSMarc Zyngier struct cpu_lpi_count { 1832f13ff1dSMarc Zyngier atomic_t managed; 1842f13ff1dSMarc Zyngier atomic_t unmanaged; 1852f13ff1dSMarc Zyngier }; 1862f13ff1dSMarc Zyngier 1872f13ff1dSMarc Zyngier static DEFINE_PER_CPU(struct cpu_lpi_count, cpu_lpi_count); 1882f13ff1dSMarc Zyngier 1891ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 190a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1911ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 192db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1931ac19ca6SMarc Zyngier 1943dfa576bSMarc Zyngier static unsigned long its_list_map; 1953171a47aSMarc Zyngier static u16 vmovp_seq_num; 1963171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1973171a47aSMarc Zyngier 1987d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1993dfa576bSMarc Zyngier 2001ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 20111e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 2021ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 203e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 2041ac19ca6SMarc Zyngier 205009384b3SMarc Zyngier /* 206009384b3SMarc Zyngier * Skip ITSs that have no vLPIs mapped, unless we're on GICv4.1, as we 207009384b3SMarc Zyngier * always have vSGIs mapped. 208009384b3SMarc Zyngier */ 209009384b3SMarc Zyngier static bool require_its_list_vmovp(struct its_vm *vm, struct its_node *its) 210009384b3SMarc Zyngier { 211009384b3SMarc Zyngier return (gic_rdists->has_rvpeid || vm->vlpi_count[its->list_nr]); 212009384b3SMarc Zyngier } 213009384b3SMarc Zyngier 21484243125SZenghui Yu static u16 get_its_list(struct its_vm *vm) 21584243125SZenghui Yu { 21684243125SZenghui Yu struct its_node *its; 21784243125SZenghui Yu unsigned long its_list = 0; 21884243125SZenghui Yu 21984243125SZenghui Yu list_for_each_entry(its, &its_nodes, entry) { 2200dd57fedSMarc Zyngier if (!is_v4(its)) 22184243125SZenghui Yu continue; 22284243125SZenghui Yu 223009384b3SMarc Zyngier if (require_its_list_vmovp(vm, its)) 22484243125SZenghui Yu __set_bit(its->list_nr, &its_list); 22584243125SZenghui Yu } 22684243125SZenghui Yu 22784243125SZenghui Yu return (u16)its_list; 22884243125SZenghui Yu } 22984243125SZenghui Yu 230425c09beSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 231425c09beSMarc Zyngier { 232425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 233425c09beSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 234425c09beSMarc Zyngier } 235425c09beSMarc Zyngier 236591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 237591e5becSMarc Zyngier u32 event) 238591e5becSMarc Zyngier { 239591e5becSMarc Zyngier struct its_node *its = its_dev->its; 240591e5becSMarc Zyngier 241591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 242591e5becSMarc Zyngier } 243591e5becSMarc Zyngier 244c1d4d5cdSMarc Zyngier static struct its_vlpi_map *dev_event_to_vlpi_map(struct its_device *its_dev, 245c1d4d5cdSMarc Zyngier u32 event) 246c1d4d5cdSMarc Zyngier { 247c1d4d5cdSMarc Zyngier if (WARN_ON_ONCE(event >= its_dev->event_map.nr_lpis)) 248c1d4d5cdSMarc Zyngier return NULL; 249c1d4d5cdSMarc Zyngier 250c1d4d5cdSMarc Zyngier return &its_dev->event_map.vlpi_maps[event]; 251c1d4d5cdSMarc Zyngier } 252c1d4d5cdSMarc Zyngier 253f4a81f5aSMarc Zyngier static struct its_vlpi_map *get_vlpi_map(struct irq_data *d) 254f4a81f5aSMarc Zyngier { 255f4a81f5aSMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 256f4a81f5aSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 257f4a81f5aSMarc Zyngier u32 event = its_get_event_id(d); 258f4a81f5aSMarc Zyngier 259f4a81f5aSMarc Zyngier return dev_event_to_vlpi_map(its_dev, event); 260f4a81f5aSMarc Zyngier } 261f4a81f5aSMarc Zyngier 262f4a81f5aSMarc Zyngier return NULL; 263f4a81f5aSMarc Zyngier } 264f4a81f5aSMarc Zyngier 265f3a05921SMarc Zyngier static int vpe_to_cpuid_lock(struct its_vpe *vpe, unsigned long *flags) 266425c09beSMarc Zyngier { 267f3a05921SMarc Zyngier raw_spin_lock_irqsave(&vpe->vpe_lock, *flags); 268f3a05921SMarc Zyngier return vpe->col_idx; 269f3a05921SMarc Zyngier } 270f3a05921SMarc Zyngier 271f3a05921SMarc Zyngier static void vpe_to_cpuid_unlock(struct its_vpe *vpe, unsigned long flags) 272f3a05921SMarc Zyngier { 273f3a05921SMarc Zyngier raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); 274f3a05921SMarc Zyngier } 275f3a05921SMarc Zyngier 276*926846a7SMarc Zyngier static struct irq_chip its_vpe_irq_chip; 277*926846a7SMarc Zyngier 278f3a05921SMarc Zyngier static int irq_to_cpuid_lock(struct irq_data *d, unsigned long *flags) 279f3a05921SMarc Zyngier { 280*926846a7SMarc Zyngier struct its_vpe *vpe = NULL; 281f3a05921SMarc Zyngier int cpu; 282f3a05921SMarc Zyngier 283*926846a7SMarc Zyngier if (d->chip == &its_vpe_irq_chip) { 284*926846a7SMarc Zyngier vpe = irq_data_get_irq_chip_data(d); 285*926846a7SMarc Zyngier } else { 286*926846a7SMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 287*926846a7SMarc Zyngier if (map) 288*926846a7SMarc Zyngier vpe = map->vpe; 289*926846a7SMarc Zyngier } 290*926846a7SMarc Zyngier 291*926846a7SMarc Zyngier if (vpe) { 292*926846a7SMarc Zyngier cpu = vpe_to_cpuid_lock(vpe, flags); 293f3a05921SMarc Zyngier } else { 294f3a05921SMarc Zyngier /* Physical LPIs are already locked via the irq_desc lock */ 295425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 296f3a05921SMarc Zyngier cpu = its_dev->event_map.col_map[its_get_event_id(d)]; 297f3a05921SMarc Zyngier /* Keep GCC quiet... */ 298f3a05921SMarc Zyngier *flags = 0; 299f3a05921SMarc Zyngier } 300f3a05921SMarc Zyngier 301f3a05921SMarc Zyngier return cpu; 302f3a05921SMarc Zyngier } 303f3a05921SMarc Zyngier 304f3a05921SMarc Zyngier static void irq_to_cpuid_unlock(struct irq_data *d, unsigned long flags) 305f3a05921SMarc Zyngier { 306*926846a7SMarc Zyngier struct its_vpe *vpe = NULL; 307425c09beSMarc Zyngier 308*926846a7SMarc Zyngier if (d->chip == &its_vpe_irq_chip) { 309*926846a7SMarc Zyngier vpe = irq_data_get_irq_chip_data(d); 310*926846a7SMarc Zyngier } else { 311*926846a7SMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 312f4a81f5aSMarc Zyngier if (map) 313*926846a7SMarc Zyngier vpe = map->vpe; 314*926846a7SMarc Zyngier } 315*926846a7SMarc Zyngier 316*926846a7SMarc Zyngier if (vpe) 317*926846a7SMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 318425c09beSMarc Zyngier } 319425c09beSMarc Zyngier 32083559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 32183559b47SMarc Zyngier { 32220faba84SJoe Perches if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(15, 0))) 32383559b47SMarc Zyngier return NULL; 32483559b47SMarc Zyngier 32583559b47SMarc Zyngier return col; 32683559b47SMarc Zyngier } 32783559b47SMarc Zyngier 328205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 329205e065dSMarc Zyngier { 330205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 331205e065dSMarc Zyngier return vpe; 332205e065dSMarc Zyngier 333205e065dSMarc Zyngier return NULL; 334205e065dSMarc Zyngier } 335205e065dSMarc Zyngier 336cc2d3216SMarc Zyngier /* 337cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 338cc2d3216SMarc Zyngier * block. 339cc2d3216SMarc Zyngier */ 340cc2d3216SMarc Zyngier struct its_cmd_desc { 341cc2d3216SMarc Zyngier union { 342cc2d3216SMarc Zyngier struct { 343cc2d3216SMarc Zyngier struct its_device *dev; 344cc2d3216SMarc Zyngier u32 event_id; 345cc2d3216SMarc Zyngier } its_inv_cmd; 346cc2d3216SMarc Zyngier 347cc2d3216SMarc Zyngier struct { 348cc2d3216SMarc Zyngier struct its_device *dev; 349cc2d3216SMarc Zyngier u32 event_id; 3508d85dcedSMarc Zyngier } its_clear_cmd; 3518d85dcedSMarc Zyngier 3528d85dcedSMarc Zyngier struct { 3538d85dcedSMarc Zyngier struct its_device *dev; 3548d85dcedSMarc Zyngier u32 event_id; 355cc2d3216SMarc Zyngier } its_int_cmd; 356cc2d3216SMarc Zyngier 357cc2d3216SMarc Zyngier struct { 358cc2d3216SMarc Zyngier struct its_device *dev; 359cc2d3216SMarc Zyngier int valid; 360cc2d3216SMarc Zyngier } its_mapd_cmd; 361cc2d3216SMarc Zyngier 362cc2d3216SMarc Zyngier struct { 363cc2d3216SMarc Zyngier struct its_collection *col; 364cc2d3216SMarc Zyngier int valid; 365cc2d3216SMarc Zyngier } its_mapc_cmd; 366cc2d3216SMarc Zyngier 367cc2d3216SMarc Zyngier struct { 368cc2d3216SMarc Zyngier struct its_device *dev; 369cc2d3216SMarc Zyngier u32 phys_id; 370cc2d3216SMarc Zyngier u32 event_id; 3716a25ad3aSMarc Zyngier } its_mapti_cmd; 372cc2d3216SMarc Zyngier 373cc2d3216SMarc Zyngier struct { 374cc2d3216SMarc Zyngier struct its_device *dev; 375cc2d3216SMarc Zyngier struct its_collection *col; 376591e5becSMarc Zyngier u32 event_id; 377cc2d3216SMarc Zyngier } its_movi_cmd; 378cc2d3216SMarc Zyngier 379cc2d3216SMarc Zyngier struct { 380cc2d3216SMarc Zyngier struct its_device *dev; 381cc2d3216SMarc Zyngier u32 event_id; 382cc2d3216SMarc Zyngier } its_discard_cmd; 383cc2d3216SMarc Zyngier 384cc2d3216SMarc Zyngier struct { 385cc2d3216SMarc Zyngier struct its_collection *col; 386cc2d3216SMarc Zyngier } its_invall_cmd; 387d011e4e6SMarc Zyngier 388d011e4e6SMarc Zyngier struct { 389d011e4e6SMarc Zyngier struct its_vpe *vpe; 390eb78192bSMarc Zyngier } its_vinvall_cmd; 391eb78192bSMarc Zyngier 392eb78192bSMarc Zyngier struct { 393eb78192bSMarc Zyngier struct its_vpe *vpe; 394eb78192bSMarc Zyngier struct its_collection *col; 395eb78192bSMarc Zyngier bool valid; 396eb78192bSMarc Zyngier } its_vmapp_cmd; 397eb78192bSMarc Zyngier 398eb78192bSMarc Zyngier struct { 399eb78192bSMarc Zyngier struct its_vpe *vpe; 400d011e4e6SMarc Zyngier struct its_device *dev; 401d011e4e6SMarc Zyngier u32 virt_id; 402d011e4e6SMarc Zyngier u32 event_id; 403d011e4e6SMarc Zyngier bool db_enabled; 404d011e4e6SMarc Zyngier } its_vmapti_cmd; 405d011e4e6SMarc Zyngier 406d011e4e6SMarc Zyngier struct { 407d011e4e6SMarc Zyngier struct its_vpe *vpe; 408d011e4e6SMarc Zyngier struct its_device *dev; 409d011e4e6SMarc Zyngier u32 event_id; 410d011e4e6SMarc Zyngier bool db_enabled; 411d011e4e6SMarc Zyngier } its_vmovi_cmd; 4123171a47aSMarc Zyngier 4133171a47aSMarc Zyngier struct { 4143171a47aSMarc Zyngier struct its_vpe *vpe; 4153171a47aSMarc Zyngier struct its_collection *col; 4163171a47aSMarc Zyngier u16 seq_num; 4173171a47aSMarc Zyngier u16 its_list; 4183171a47aSMarc Zyngier } its_vmovp_cmd; 419d97c97baSMarc Zyngier 420d97c97baSMarc Zyngier struct { 421d97c97baSMarc Zyngier struct its_vpe *vpe; 422d97c97baSMarc Zyngier } its_invdb_cmd; 423e252cf8aSMarc Zyngier 424e252cf8aSMarc Zyngier struct { 425e252cf8aSMarc Zyngier struct its_vpe *vpe; 426e252cf8aSMarc Zyngier u8 sgi; 427e252cf8aSMarc Zyngier u8 priority; 428e252cf8aSMarc Zyngier bool enable; 429e252cf8aSMarc Zyngier bool group; 430e252cf8aSMarc Zyngier bool clear; 431e252cf8aSMarc Zyngier } its_vsgi_cmd; 432cc2d3216SMarc Zyngier }; 433cc2d3216SMarc Zyngier }; 434cc2d3216SMarc Zyngier 435cc2d3216SMarc Zyngier /* 436cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 437cc2d3216SMarc Zyngier */ 438cc2d3216SMarc Zyngier struct its_cmd_block { 4392bbdfcc5SBen Dooks (Codethink) union { 440cc2d3216SMarc Zyngier u64 raw_cmd[4]; 4412bbdfcc5SBen Dooks (Codethink) __le64 raw_cmd_le[4]; 4422bbdfcc5SBen Dooks (Codethink) }; 443cc2d3216SMarc Zyngier }; 444cc2d3216SMarc Zyngier 445cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 446cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 447cc2d3216SMarc Zyngier 44867047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 44967047f90SMarc Zyngier struct its_cmd_block *, 450cc2d3216SMarc Zyngier struct its_cmd_desc *); 451cc2d3216SMarc Zyngier 45267047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 45367047f90SMarc Zyngier struct its_cmd_block *, 454d011e4e6SMarc Zyngier struct its_cmd_desc *); 455d011e4e6SMarc Zyngier 4564d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 4574d36f136SMarc Zyngier { 4584d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 4594d36f136SMarc Zyngier *raw_cmd &= ~mask; 4604d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 4614d36f136SMarc Zyngier } 4624d36f136SMarc Zyngier 463cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 464cc2d3216SMarc Zyngier { 4654d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 466cc2d3216SMarc Zyngier } 467cc2d3216SMarc Zyngier 468cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 469cc2d3216SMarc Zyngier { 4704d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 471cc2d3216SMarc Zyngier } 472cc2d3216SMarc Zyngier 473cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 474cc2d3216SMarc Zyngier { 4754d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 476cc2d3216SMarc Zyngier } 477cc2d3216SMarc Zyngier 478cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 479cc2d3216SMarc Zyngier { 4804d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 481cc2d3216SMarc Zyngier } 482cc2d3216SMarc Zyngier 483cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 484cc2d3216SMarc Zyngier { 4854d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 486cc2d3216SMarc Zyngier } 487cc2d3216SMarc Zyngier 488cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 489cc2d3216SMarc Zyngier { 49030ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 491cc2d3216SMarc Zyngier } 492cc2d3216SMarc Zyngier 493cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 494cc2d3216SMarc Zyngier { 4954d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 496cc2d3216SMarc Zyngier } 497cc2d3216SMarc Zyngier 498cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 499cc2d3216SMarc Zyngier { 50030ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 501cc2d3216SMarc Zyngier } 502cc2d3216SMarc Zyngier 503cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 504cc2d3216SMarc Zyngier { 5054d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 506cc2d3216SMarc Zyngier } 507cc2d3216SMarc Zyngier 508d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 509d011e4e6SMarc Zyngier { 510d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 511d011e4e6SMarc Zyngier } 512d011e4e6SMarc Zyngier 513d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 514d011e4e6SMarc Zyngier { 515d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 516d011e4e6SMarc Zyngier } 517d011e4e6SMarc Zyngier 518d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 519d011e4e6SMarc Zyngier { 520d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 521d011e4e6SMarc Zyngier } 522d011e4e6SMarc Zyngier 523d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 524d011e4e6SMarc Zyngier { 525d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 526d011e4e6SMarc Zyngier } 527d011e4e6SMarc Zyngier 5283171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 5293171a47aSMarc Zyngier { 5303171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 5313171a47aSMarc Zyngier } 5323171a47aSMarc Zyngier 5333171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 5343171a47aSMarc Zyngier { 5353171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 5363171a47aSMarc Zyngier } 5373171a47aSMarc Zyngier 538eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 539eb78192bSMarc Zyngier { 54030ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 541eb78192bSMarc Zyngier } 542eb78192bSMarc Zyngier 543eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 544eb78192bSMarc Zyngier { 545eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 546eb78192bSMarc Zyngier } 547eb78192bSMarc Zyngier 54864edfaa9SMarc Zyngier static void its_encode_vconf_addr(struct its_cmd_block *cmd, u64 vconf_pa) 54964edfaa9SMarc Zyngier { 55064edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], vconf_pa >> 16, 51, 16); 55164edfaa9SMarc Zyngier } 55264edfaa9SMarc Zyngier 55364edfaa9SMarc Zyngier static void its_encode_alloc(struct its_cmd_block *cmd, bool alloc) 55464edfaa9SMarc Zyngier { 55564edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], alloc, 8, 8); 55664edfaa9SMarc Zyngier } 55764edfaa9SMarc Zyngier 55864edfaa9SMarc Zyngier static void its_encode_ptz(struct its_cmd_block *cmd, bool ptz) 55964edfaa9SMarc Zyngier { 56064edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], ptz, 9, 9); 56164edfaa9SMarc Zyngier } 56264edfaa9SMarc Zyngier 56364edfaa9SMarc Zyngier static void its_encode_vmapp_default_db(struct its_cmd_block *cmd, 56464edfaa9SMarc Zyngier u32 vpe_db_lpi) 56564edfaa9SMarc Zyngier { 56664edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpe_db_lpi, 31, 0); 56764edfaa9SMarc Zyngier } 56864edfaa9SMarc Zyngier 569dd3f050aSMarc Zyngier static void its_encode_vmovp_default_db(struct its_cmd_block *cmd, 570dd3f050aSMarc Zyngier u32 vpe_db_lpi) 571dd3f050aSMarc Zyngier { 572dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpe_db_lpi, 31, 0); 573dd3f050aSMarc Zyngier } 574dd3f050aSMarc Zyngier 575dd3f050aSMarc Zyngier static void its_encode_db(struct its_cmd_block *cmd, bool db) 576dd3f050aSMarc Zyngier { 577dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db, 63, 63); 578dd3f050aSMarc Zyngier } 579dd3f050aSMarc Zyngier 580e252cf8aSMarc Zyngier static void its_encode_sgi_intid(struct its_cmd_block *cmd, u8 sgi) 581e252cf8aSMarc Zyngier { 582e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], sgi, 35, 32); 583e252cf8aSMarc Zyngier } 584e252cf8aSMarc Zyngier 585e252cf8aSMarc Zyngier static void its_encode_sgi_priority(struct its_cmd_block *cmd, u8 prio) 586e252cf8aSMarc Zyngier { 587e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], prio >> 4, 23, 20); 588e252cf8aSMarc Zyngier } 589e252cf8aSMarc Zyngier 590e252cf8aSMarc Zyngier static void its_encode_sgi_group(struct its_cmd_block *cmd, bool grp) 591e252cf8aSMarc Zyngier { 592e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], grp, 10, 10); 593e252cf8aSMarc Zyngier } 594e252cf8aSMarc Zyngier 595e252cf8aSMarc Zyngier static void its_encode_sgi_clear(struct its_cmd_block *cmd, bool clr) 596e252cf8aSMarc Zyngier { 597e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], clr, 9, 9); 598e252cf8aSMarc Zyngier } 599e252cf8aSMarc Zyngier 600e252cf8aSMarc Zyngier static void its_encode_sgi_enable(struct its_cmd_block *cmd, bool en) 601e252cf8aSMarc Zyngier { 602e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], en, 8, 8); 603e252cf8aSMarc Zyngier } 604e252cf8aSMarc Zyngier 605cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 606cc2d3216SMarc Zyngier { 607cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 6082bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[0] = cpu_to_le64(cmd->raw_cmd[0]); 6092bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[1] = cpu_to_le64(cmd->raw_cmd[1]); 6102bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[2] = cpu_to_le64(cmd->raw_cmd[2]); 6112bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[3] = cpu_to_le64(cmd->raw_cmd[3]); 612cc2d3216SMarc Zyngier } 613cc2d3216SMarc Zyngier 61467047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 61567047f90SMarc Zyngier struct its_cmd_block *cmd, 616cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 617cc2d3216SMarc Zyngier { 618cc2d3216SMarc Zyngier unsigned long itt_addr; 619c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 620cc2d3216SMarc Zyngier 621cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 622cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 623cc2d3216SMarc Zyngier 624cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 625cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 626cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 627cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 628cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 629cc2d3216SMarc Zyngier 630cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 631cc2d3216SMarc Zyngier 632591e5becSMarc Zyngier return NULL; 633cc2d3216SMarc Zyngier } 634cc2d3216SMarc Zyngier 63567047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 63667047f90SMarc Zyngier struct its_cmd_block *cmd, 637cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 638cc2d3216SMarc Zyngier { 639cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 640cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 641cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 642cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 643cc2d3216SMarc Zyngier 644cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 645cc2d3216SMarc Zyngier 646cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 647cc2d3216SMarc Zyngier } 648cc2d3216SMarc Zyngier 64967047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 65067047f90SMarc Zyngier struct its_cmd_block *cmd, 651cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 652cc2d3216SMarc Zyngier { 653591e5becSMarc Zyngier struct its_collection *col; 654591e5becSMarc Zyngier 6556a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 6566a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 657591e5becSMarc Zyngier 6586a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 6596a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 6606a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 6616a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 662591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 663cc2d3216SMarc Zyngier 664cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 665cc2d3216SMarc Zyngier 66683559b47SMarc Zyngier return valid_col(col); 667cc2d3216SMarc Zyngier } 668cc2d3216SMarc Zyngier 66967047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 67067047f90SMarc Zyngier struct its_cmd_block *cmd, 671cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 672cc2d3216SMarc Zyngier { 673591e5becSMarc Zyngier struct its_collection *col; 674591e5becSMarc Zyngier 675591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 676591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 677591e5becSMarc Zyngier 678cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 679cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 680591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 681cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 682cc2d3216SMarc Zyngier 683cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 684cc2d3216SMarc Zyngier 68583559b47SMarc Zyngier return valid_col(col); 686cc2d3216SMarc Zyngier } 687cc2d3216SMarc Zyngier 68867047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 68967047f90SMarc Zyngier struct its_cmd_block *cmd, 690cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 691cc2d3216SMarc Zyngier { 692591e5becSMarc Zyngier struct its_collection *col; 693591e5becSMarc Zyngier 694591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 695591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 696591e5becSMarc Zyngier 697cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 698cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 699cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 700cc2d3216SMarc Zyngier 701cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 702cc2d3216SMarc Zyngier 70383559b47SMarc Zyngier return valid_col(col); 704cc2d3216SMarc Zyngier } 705cc2d3216SMarc Zyngier 70667047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 70767047f90SMarc Zyngier struct its_cmd_block *cmd, 708cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 709cc2d3216SMarc Zyngier { 710591e5becSMarc Zyngier struct its_collection *col; 711591e5becSMarc Zyngier 712591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 713591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 714591e5becSMarc Zyngier 715cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 716cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 717cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 718cc2d3216SMarc Zyngier 719cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 720cc2d3216SMarc Zyngier 72183559b47SMarc Zyngier return valid_col(col); 722cc2d3216SMarc Zyngier } 723cc2d3216SMarc Zyngier 72467047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 72567047f90SMarc Zyngier struct its_cmd_block *cmd, 7268d85dcedSMarc Zyngier struct its_cmd_desc *desc) 7278d85dcedSMarc Zyngier { 7288d85dcedSMarc Zyngier struct its_collection *col; 7298d85dcedSMarc Zyngier 7308d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 7318d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 7328d85dcedSMarc Zyngier 7338d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 7348d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 7358d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 7368d85dcedSMarc Zyngier 7378d85dcedSMarc Zyngier its_fixup_cmd(cmd); 7388d85dcedSMarc Zyngier 73983559b47SMarc Zyngier return valid_col(col); 7408d85dcedSMarc Zyngier } 7418d85dcedSMarc Zyngier 74267047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 74367047f90SMarc Zyngier struct its_cmd_block *cmd, 7448d85dcedSMarc Zyngier struct its_cmd_desc *desc) 7458d85dcedSMarc Zyngier { 7468d85dcedSMarc Zyngier struct its_collection *col; 7478d85dcedSMarc Zyngier 7488d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 7498d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 7508d85dcedSMarc Zyngier 7518d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 7528d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 7538d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 7548d85dcedSMarc Zyngier 7558d85dcedSMarc Zyngier its_fixup_cmd(cmd); 7568d85dcedSMarc Zyngier 75783559b47SMarc Zyngier return valid_col(col); 7588d85dcedSMarc Zyngier } 7598d85dcedSMarc Zyngier 76067047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 76167047f90SMarc Zyngier struct its_cmd_block *cmd, 762cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 763cc2d3216SMarc Zyngier { 764cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 76510794522SZenghui Yu its_encode_collection(cmd, desc->its_invall_cmd.col->col_id); 766cc2d3216SMarc Zyngier 767cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 768cc2d3216SMarc Zyngier 769b383a42cSWudi Wang return desc->its_invall_cmd.col; 770cc2d3216SMarc Zyngier } 771cc2d3216SMarc Zyngier 77267047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 77367047f90SMarc Zyngier struct its_cmd_block *cmd, 774eb78192bSMarc Zyngier struct its_cmd_desc *desc) 775eb78192bSMarc Zyngier { 776eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 777eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 778eb78192bSMarc Zyngier 779eb78192bSMarc Zyngier its_fixup_cmd(cmd); 780eb78192bSMarc Zyngier 781205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 782eb78192bSMarc Zyngier } 783eb78192bSMarc Zyngier 78467047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 78567047f90SMarc Zyngier struct its_cmd_block *cmd, 786eb78192bSMarc Zyngier struct its_cmd_desc *desc) 787eb78192bSMarc Zyngier { 78864edfaa9SMarc Zyngier unsigned long vpt_addr, vconf_addr; 7895c9a882eSMarc Zyngier u64 target; 79064edfaa9SMarc Zyngier bool alloc; 791eb78192bSMarc Zyngier 792eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 793eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 794eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 79564edfaa9SMarc Zyngier 79664edfaa9SMarc Zyngier if (!desc->its_vmapp_cmd.valid) { 79764edfaa9SMarc Zyngier if (is_v4_1(its)) { 79864edfaa9SMarc Zyngier alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count); 79964edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 80064edfaa9SMarc Zyngier } 80164edfaa9SMarc Zyngier 80264edfaa9SMarc Zyngier goto out; 80364edfaa9SMarc Zyngier } 80464edfaa9SMarc Zyngier 80564edfaa9SMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 80664edfaa9SMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 80764edfaa9SMarc Zyngier 8085c9a882eSMarc Zyngier its_encode_target(cmd, target); 809eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 810eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 811eb78192bSMarc Zyngier 81264edfaa9SMarc Zyngier if (!is_v4_1(its)) 81364edfaa9SMarc Zyngier goto out; 81464edfaa9SMarc Zyngier 81564edfaa9SMarc Zyngier vconf_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->its_vm->vprop_page)); 81664edfaa9SMarc Zyngier 81764edfaa9SMarc Zyngier alloc = !atomic_fetch_inc(&desc->its_vmapp_cmd.vpe->vmapp_count); 81864edfaa9SMarc Zyngier 81964edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 82064edfaa9SMarc Zyngier 821c21bc068SShenming Lu /* 822c21bc068SShenming Lu * GICv4.1 provides a way to get the VLPI state, which needs the vPE 823c21bc068SShenming Lu * to be unmapped first, and in this case, we may remap the vPE 824c21bc068SShenming Lu * back while the VPT is not empty. So we can't assume that the 825c21bc068SShenming Lu * VPT is empty on map. This is why we never advertise PTZ. 826c21bc068SShenming Lu */ 827c21bc068SShenming Lu its_encode_ptz(cmd, false); 82864edfaa9SMarc Zyngier its_encode_vconf_addr(cmd, vconf_addr); 82964edfaa9SMarc Zyngier its_encode_vmapp_default_db(cmd, desc->its_vmapp_cmd.vpe->vpe_db_lpi); 83064edfaa9SMarc Zyngier 83164edfaa9SMarc Zyngier out: 832eb78192bSMarc Zyngier its_fixup_cmd(cmd); 833eb78192bSMarc Zyngier 834205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 835eb78192bSMarc Zyngier } 836eb78192bSMarc Zyngier 83767047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 83867047f90SMarc Zyngier struct its_cmd_block *cmd, 839d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 840d011e4e6SMarc Zyngier { 841d011e4e6SMarc Zyngier u32 db; 842d011e4e6SMarc Zyngier 8433858d4dfSMarc Zyngier if (!is_v4_1(its) && desc->its_vmapti_cmd.db_enabled) 844d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 845d011e4e6SMarc Zyngier else 846d011e4e6SMarc Zyngier db = 1023; 847d011e4e6SMarc Zyngier 848d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 849d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 850d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 851d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 852d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 853d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 854d011e4e6SMarc Zyngier 855d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 856d011e4e6SMarc Zyngier 857205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 858d011e4e6SMarc Zyngier } 859d011e4e6SMarc Zyngier 86067047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 86167047f90SMarc Zyngier struct its_cmd_block *cmd, 862d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 863d011e4e6SMarc Zyngier { 864d011e4e6SMarc Zyngier u32 db; 865d011e4e6SMarc Zyngier 8663858d4dfSMarc Zyngier if (!is_v4_1(its) && desc->its_vmovi_cmd.db_enabled) 867d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 868d011e4e6SMarc Zyngier else 869d011e4e6SMarc Zyngier db = 1023; 870d011e4e6SMarc Zyngier 871d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 872d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 873d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 874d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 875d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 876d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 877d011e4e6SMarc Zyngier 878d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 879d011e4e6SMarc Zyngier 880205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 881d011e4e6SMarc Zyngier } 882d011e4e6SMarc Zyngier 88367047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 88467047f90SMarc Zyngier struct its_cmd_block *cmd, 8853171a47aSMarc Zyngier struct its_cmd_desc *desc) 8863171a47aSMarc Zyngier { 8875c9a882eSMarc Zyngier u64 target; 8885c9a882eSMarc Zyngier 8895c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 8903171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 8913171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 8923171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 8933171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 8945c9a882eSMarc Zyngier its_encode_target(cmd, target); 8953171a47aSMarc Zyngier 896dd3f050aSMarc Zyngier if (is_v4_1(its)) { 897dd3f050aSMarc Zyngier its_encode_db(cmd, true); 898dd3f050aSMarc Zyngier its_encode_vmovp_default_db(cmd, desc->its_vmovp_cmd.vpe->vpe_db_lpi); 899dd3f050aSMarc Zyngier } 900dd3f050aSMarc Zyngier 9013171a47aSMarc Zyngier its_fixup_cmd(cmd); 9023171a47aSMarc Zyngier 903205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 9043171a47aSMarc Zyngier } 9053171a47aSMarc Zyngier 90628614696SMarc Zyngier static struct its_vpe *its_build_vinv_cmd(struct its_node *its, 90728614696SMarc Zyngier struct its_cmd_block *cmd, 90828614696SMarc Zyngier struct its_cmd_desc *desc) 90928614696SMarc Zyngier { 91028614696SMarc Zyngier struct its_vlpi_map *map; 91128614696SMarc Zyngier 91228614696SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_inv_cmd.dev, 91328614696SMarc Zyngier desc->its_inv_cmd.event_id); 91428614696SMarc Zyngier 91528614696SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 91628614696SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 91728614696SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 91828614696SMarc Zyngier 91928614696SMarc Zyngier its_fixup_cmd(cmd); 92028614696SMarc Zyngier 92128614696SMarc Zyngier return valid_vpe(its, map->vpe); 92228614696SMarc Zyngier } 92328614696SMarc Zyngier 924ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vint_cmd(struct its_node *its, 925ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 926ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 927ed0e4aa9SMarc Zyngier { 928ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 929ed0e4aa9SMarc Zyngier 930ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_int_cmd.dev, 931ed0e4aa9SMarc Zyngier desc->its_int_cmd.event_id); 932ed0e4aa9SMarc Zyngier 933ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 934ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 935ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 936ed0e4aa9SMarc Zyngier 937ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 938ed0e4aa9SMarc Zyngier 939ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 940ed0e4aa9SMarc Zyngier } 941ed0e4aa9SMarc Zyngier 942ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vclear_cmd(struct its_node *its, 943ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 944ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 945ed0e4aa9SMarc Zyngier { 946ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 947ed0e4aa9SMarc Zyngier 948ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_clear_cmd.dev, 949ed0e4aa9SMarc Zyngier desc->its_clear_cmd.event_id); 950ed0e4aa9SMarc Zyngier 951ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 952ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 953ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 954ed0e4aa9SMarc Zyngier 955ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 956ed0e4aa9SMarc Zyngier 957ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 958ed0e4aa9SMarc Zyngier } 959ed0e4aa9SMarc Zyngier 960d97c97baSMarc Zyngier static struct its_vpe *its_build_invdb_cmd(struct its_node *its, 961d97c97baSMarc Zyngier struct its_cmd_block *cmd, 962d97c97baSMarc Zyngier struct its_cmd_desc *desc) 963d97c97baSMarc Zyngier { 964d97c97baSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 965d97c97baSMarc Zyngier return NULL; 966d97c97baSMarc Zyngier 967d97c97baSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVDB); 968d97c97baSMarc Zyngier its_encode_vpeid(cmd, desc->its_invdb_cmd.vpe->vpe_id); 969d97c97baSMarc Zyngier 970d97c97baSMarc Zyngier its_fixup_cmd(cmd); 971d97c97baSMarc Zyngier 972d97c97baSMarc Zyngier return valid_vpe(its, desc->its_invdb_cmd.vpe); 973d97c97baSMarc Zyngier } 974d97c97baSMarc Zyngier 975e252cf8aSMarc Zyngier static struct its_vpe *its_build_vsgi_cmd(struct its_node *its, 976e252cf8aSMarc Zyngier struct its_cmd_block *cmd, 977e252cf8aSMarc Zyngier struct its_cmd_desc *desc) 978e252cf8aSMarc Zyngier { 979e252cf8aSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 980e252cf8aSMarc Zyngier return NULL; 981e252cf8aSMarc Zyngier 982e252cf8aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VSGI); 983e252cf8aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vsgi_cmd.vpe->vpe_id); 984e252cf8aSMarc Zyngier its_encode_sgi_intid(cmd, desc->its_vsgi_cmd.sgi); 985e252cf8aSMarc Zyngier its_encode_sgi_priority(cmd, desc->its_vsgi_cmd.priority); 986e252cf8aSMarc Zyngier its_encode_sgi_group(cmd, desc->its_vsgi_cmd.group); 987e252cf8aSMarc Zyngier its_encode_sgi_clear(cmd, desc->its_vsgi_cmd.clear); 988e252cf8aSMarc Zyngier its_encode_sgi_enable(cmd, desc->its_vsgi_cmd.enable); 989e252cf8aSMarc Zyngier 990e252cf8aSMarc Zyngier its_fixup_cmd(cmd); 991e252cf8aSMarc Zyngier 992e252cf8aSMarc Zyngier return valid_vpe(its, desc->its_vsgi_cmd.vpe); 993e252cf8aSMarc Zyngier } 994e252cf8aSMarc Zyngier 995cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 996cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 997cc2d3216SMarc Zyngier { 998cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 999cc2d3216SMarc Zyngier } 1000cc2d3216SMarc Zyngier 1001cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 1002cc2d3216SMarc Zyngier { 1003cc2d3216SMarc Zyngier int widx; 1004cc2d3216SMarc Zyngier int ridx; 1005cc2d3216SMarc Zyngier 1006cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 1007cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 1008cc2d3216SMarc Zyngier 1009cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 1010cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 1011cc2d3216SMarc Zyngier return 1; 1012cc2d3216SMarc Zyngier 1013cc2d3216SMarc Zyngier return 0; 1014cc2d3216SMarc Zyngier } 1015cc2d3216SMarc Zyngier 1016cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 1017cc2d3216SMarc Zyngier { 1018cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 1019cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 1020cc2d3216SMarc Zyngier 1021cc2d3216SMarc Zyngier while (its_queue_full(its)) { 1022cc2d3216SMarc Zyngier count--; 1023cc2d3216SMarc Zyngier if (!count) { 1024cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 1025cc2d3216SMarc Zyngier return NULL; 1026cc2d3216SMarc Zyngier } 1027cc2d3216SMarc Zyngier cpu_relax(); 1028cc2d3216SMarc Zyngier udelay(1); 1029cc2d3216SMarc Zyngier } 1030cc2d3216SMarc Zyngier 1031cc2d3216SMarc Zyngier cmd = its->cmd_write++; 1032cc2d3216SMarc Zyngier 1033cc2d3216SMarc Zyngier /* Handle queue wrapping */ 1034cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 1035cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 1036cc2d3216SMarc Zyngier 103734d677a9SMarc Zyngier /* Clear command */ 103834d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 103934d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 104034d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 104134d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 104234d677a9SMarc Zyngier 1043cc2d3216SMarc Zyngier return cmd; 1044cc2d3216SMarc Zyngier } 1045cc2d3216SMarc Zyngier 1046cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 1047cc2d3216SMarc Zyngier { 1048cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 1049cc2d3216SMarc Zyngier 1050cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 1051cc2d3216SMarc Zyngier 1052cc2d3216SMarc Zyngier return its->cmd_write; 1053cc2d3216SMarc Zyngier } 1054cc2d3216SMarc Zyngier 1055cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 1056cc2d3216SMarc Zyngier { 1057cc2d3216SMarc Zyngier /* 1058cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 1059cc2d3216SMarc Zyngier * the ITS. 1060cc2d3216SMarc Zyngier */ 1061cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 1062328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 1063cc2d3216SMarc Zyngier else 1064cc2d3216SMarc Zyngier dsb(ishst); 1065cc2d3216SMarc Zyngier } 1066cc2d3216SMarc Zyngier 1067a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 1068a050fa54SHeyi Guo u64 prev_idx, 1069cc2d3216SMarc Zyngier struct its_cmd_block *to) 1070cc2d3216SMarc Zyngier { 1071a050fa54SHeyi Guo u64 rd_idx, to_idx, linear_idx; 1072cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 1073cc2d3216SMarc Zyngier 1074a050fa54SHeyi Guo /* Linearize to_idx if the command set has wrapped around */ 1075cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 1076a050fa54SHeyi Guo if (to_idx < prev_idx) 1077a050fa54SHeyi Guo to_idx += ITS_CMD_QUEUE_SZ; 1078a050fa54SHeyi Guo 1079a050fa54SHeyi Guo linear_idx = prev_idx; 1080cc2d3216SMarc Zyngier 1081cc2d3216SMarc Zyngier while (1) { 1082a050fa54SHeyi Guo s64 delta; 1083a050fa54SHeyi Guo 1084cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 10859bdd8b1cSMarc Zyngier 1086a050fa54SHeyi Guo /* 1087a050fa54SHeyi Guo * Compute the read pointer progress, taking the 1088a050fa54SHeyi Guo * potential wrap-around into account. 1089a050fa54SHeyi Guo */ 1090a050fa54SHeyi Guo delta = rd_idx - prev_idx; 1091a050fa54SHeyi Guo if (rd_idx < prev_idx) 1092a050fa54SHeyi Guo delta += ITS_CMD_QUEUE_SZ; 10939bdd8b1cSMarc Zyngier 1094a050fa54SHeyi Guo linear_idx += delta; 1095a050fa54SHeyi Guo if (linear_idx >= to_idx) 1096cc2d3216SMarc Zyngier break; 1097cc2d3216SMarc Zyngier 1098cc2d3216SMarc Zyngier count--; 1099cc2d3216SMarc Zyngier if (!count) { 1100a050fa54SHeyi Guo pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", 1101a050fa54SHeyi Guo to_idx, linear_idx); 1102a19b462fSMarc Zyngier return -1; 1103cc2d3216SMarc Zyngier } 1104a050fa54SHeyi Guo prev_idx = rd_idx; 1105cc2d3216SMarc Zyngier cpu_relax(); 1106cc2d3216SMarc Zyngier udelay(1); 1107cc2d3216SMarc Zyngier } 1108a19b462fSMarc Zyngier 1109a19b462fSMarc Zyngier return 0; 1110cc2d3216SMarc Zyngier } 1111cc2d3216SMarc Zyngier 1112e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 1113e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 1114e4f9094bSMarc Zyngier void name(struct its_node *its, \ 1115e4f9094bSMarc Zyngier buildtype builder, \ 1116e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 1117e4f9094bSMarc Zyngier { \ 1118e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 1119e4f9094bSMarc Zyngier synctype *sync_obj; \ 1120e4f9094bSMarc Zyngier unsigned long flags; \ 1121a050fa54SHeyi Guo u64 rd_idx; \ 1122e4f9094bSMarc Zyngier \ 1123e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 1124e4f9094bSMarc Zyngier \ 1125e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 1126e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 1127e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1128e4f9094bSMarc Zyngier return; \ 1129e4f9094bSMarc Zyngier } \ 113067047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 1131e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 1132e4f9094bSMarc Zyngier \ 1133e4f9094bSMarc Zyngier if (sync_obj) { \ 1134e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 1135e4f9094bSMarc Zyngier if (!sync_cmd) \ 1136e4f9094bSMarc Zyngier goto post; \ 1137e4f9094bSMarc Zyngier \ 113867047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 1139e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 1140e4f9094bSMarc Zyngier } \ 1141e4f9094bSMarc Zyngier \ 1142e4f9094bSMarc Zyngier post: \ 1143a050fa54SHeyi Guo rd_idx = readl_relaxed(its->base + GITS_CREADR); \ 1144e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 1145e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1146e4f9094bSMarc Zyngier \ 1147a050fa54SHeyi Guo if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \ 1148a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 1149e4f9094bSMarc Zyngier } 1150e4f9094bSMarc Zyngier 115167047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 115267047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1153e4f9094bSMarc Zyngier struct its_collection *sync_col) 1154cc2d3216SMarc Zyngier { 1155cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 1156cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 1157e4f9094bSMarc Zyngier 1158cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 1159cc2d3216SMarc Zyngier } 1160cc2d3216SMarc Zyngier 1161e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 1162e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 1163cc2d3216SMarc Zyngier 116467047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 116567047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1166d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 1167d011e4e6SMarc Zyngier { 1168d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 1169d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 1170d011e4e6SMarc Zyngier 1171d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 1172d011e4e6SMarc Zyngier } 1173d011e4e6SMarc Zyngier 1174d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 1175d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 1176d011e4e6SMarc Zyngier 11778d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 11788d85dcedSMarc Zyngier { 11798d85dcedSMarc Zyngier struct its_cmd_desc desc; 11808d85dcedSMarc Zyngier 11818d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 11828d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 11838d85dcedSMarc Zyngier 11848d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 11858d85dcedSMarc Zyngier } 11868d85dcedSMarc Zyngier 11878d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 11888d85dcedSMarc Zyngier { 11898d85dcedSMarc Zyngier struct its_cmd_desc desc; 11908d85dcedSMarc Zyngier 11918d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 11928d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 11938d85dcedSMarc Zyngier 11948d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 1195cc2d3216SMarc Zyngier } 1196cc2d3216SMarc Zyngier 1197cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 1198cc2d3216SMarc Zyngier { 1199cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1200cc2d3216SMarc Zyngier 1201cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 1202cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 1203cc2d3216SMarc Zyngier 1204cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 1205cc2d3216SMarc Zyngier } 1206cc2d3216SMarc Zyngier 1207cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 1208cc2d3216SMarc Zyngier { 1209cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1210cc2d3216SMarc Zyngier 1211cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 1212cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 1213cc2d3216SMarc Zyngier 1214cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 1215cc2d3216SMarc Zyngier } 1216cc2d3216SMarc Zyngier 1217cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 1218cc2d3216SMarc Zyngier int valid) 1219cc2d3216SMarc Zyngier { 1220cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1221cc2d3216SMarc Zyngier 1222cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 1223cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 1224cc2d3216SMarc Zyngier 1225cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 1226cc2d3216SMarc Zyngier } 1227cc2d3216SMarc Zyngier 12286a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 1229cc2d3216SMarc Zyngier { 1230cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1231cc2d3216SMarc Zyngier 12326a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 12336a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 12346a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 1235cc2d3216SMarc Zyngier 12366a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 1237cc2d3216SMarc Zyngier } 1238cc2d3216SMarc Zyngier 1239cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 1240cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 1241cc2d3216SMarc Zyngier { 1242cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1243cc2d3216SMarc Zyngier 1244cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 1245cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 1246591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 1247cc2d3216SMarc Zyngier 1248cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 1249cc2d3216SMarc Zyngier } 1250cc2d3216SMarc Zyngier 1251cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 1252cc2d3216SMarc Zyngier { 1253cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1254cc2d3216SMarc Zyngier 1255cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 1256cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 1257cc2d3216SMarc Zyngier 1258cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 1259cc2d3216SMarc Zyngier } 1260cc2d3216SMarc Zyngier 1261cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 1262cc2d3216SMarc Zyngier { 1263cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1264cc2d3216SMarc Zyngier 1265cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 1266cc2d3216SMarc Zyngier 1267cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 1268cc2d3216SMarc Zyngier } 1269c48ed51cSMarc Zyngier 1270d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 1271d011e4e6SMarc Zyngier { 1272c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1273d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1274d011e4e6SMarc Zyngier 1275d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 1276d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 1277d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 1278d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 1279d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 1280d011e4e6SMarc Zyngier 1281d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 1282d011e4e6SMarc Zyngier } 1283d011e4e6SMarc Zyngier 1284d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 1285d011e4e6SMarc Zyngier { 1286c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1287d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1288d011e4e6SMarc Zyngier 1289d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 1290d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 1291d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 1292d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 1293d011e4e6SMarc Zyngier 1294d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 1295d011e4e6SMarc Zyngier } 1296d011e4e6SMarc Zyngier 129775fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 129875fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 1299eb78192bSMarc Zyngier { 1300eb78192bSMarc Zyngier struct its_cmd_desc desc; 1301eb78192bSMarc Zyngier 1302eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 1303eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 1304eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 130575fd951bSMarc Zyngier 1306eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 1307eb78192bSMarc Zyngier } 1308eb78192bSMarc Zyngier 13093171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 13103171a47aSMarc Zyngier { 131184243125SZenghui Yu struct its_cmd_desc desc = {}; 13123171a47aSMarc Zyngier struct its_node *its; 13133171a47aSMarc Zyngier unsigned long flags; 13143171a47aSMarc Zyngier int col_id = vpe->col_idx; 13153171a47aSMarc Zyngier 13163171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 13173171a47aSMarc Zyngier 13183171a47aSMarc Zyngier if (!its_list_map) { 13193171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 13203171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 13213171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 13223171a47aSMarc Zyngier return; 13233171a47aSMarc Zyngier } 13243171a47aSMarc Zyngier 13253171a47aSMarc Zyngier /* 13263171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 13273171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 13283171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 13293171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 13303171a47aSMarc Zyngier * 13313171a47aSMarc Zyngier * Wall <-- Head. 13323171a47aSMarc Zyngier */ 13333171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 13343171a47aSMarc Zyngier 13353171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 133684243125SZenghui Yu desc.its_vmovp_cmd.its_list = get_its_list(vpe->its_vm); 13373171a47aSMarc Zyngier 13383171a47aSMarc Zyngier /* Emit VMOVPs */ 13393171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 13400dd57fedSMarc Zyngier if (!is_v4(its)) 13413171a47aSMarc Zyngier continue; 13423171a47aSMarc Zyngier 1343009384b3SMarc Zyngier if (!require_its_list_vmovp(vpe->its_vm, its)) 13442247e1bfSMarc Zyngier continue; 13452247e1bfSMarc Zyngier 13463171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 13473171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 13483171a47aSMarc Zyngier } 13493171a47aSMarc Zyngier 13503171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 13513171a47aSMarc Zyngier } 13523171a47aSMarc Zyngier 135340619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1354eb78192bSMarc Zyngier { 1355eb78192bSMarc Zyngier struct its_cmd_desc desc; 1356eb78192bSMarc Zyngier 1357eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1358eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1359eb78192bSMarc Zyngier } 1360eb78192bSMarc Zyngier 136128614696SMarc Zyngier static void its_send_vinv(struct its_device *dev, u32 event_id) 136228614696SMarc Zyngier { 136328614696SMarc Zyngier struct its_cmd_desc desc; 136428614696SMarc Zyngier 136528614696SMarc Zyngier /* 136628614696SMarc Zyngier * There is no real VINV command. This is just a normal INV, 136728614696SMarc Zyngier * with a VSYNC instead of a SYNC. 136828614696SMarc Zyngier */ 136928614696SMarc Zyngier desc.its_inv_cmd.dev = dev; 137028614696SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 137128614696SMarc Zyngier 137228614696SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); 137328614696SMarc Zyngier } 137428614696SMarc Zyngier 1375ed0e4aa9SMarc Zyngier static void its_send_vint(struct its_device *dev, u32 event_id) 1376ed0e4aa9SMarc Zyngier { 1377ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1378ed0e4aa9SMarc Zyngier 1379ed0e4aa9SMarc Zyngier /* 1380ed0e4aa9SMarc Zyngier * There is no real VINT command. This is just a normal INT, 1381ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1382ed0e4aa9SMarc Zyngier */ 1383ed0e4aa9SMarc Zyngier desc.its_int_cmd.dev = dev; 1384ed0e4aa9SMarc Zyngier desc.its_int_cmd.event_id = event_id; 1385ed0e4aa9SMarc Zyngier 1386ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); 1387ed0e4aa9SMarc Zyngier } 1388ed0e4aa9SMarc Zyngier 1389ed0e4aa9SMarc Zyngier static void its_send_vclear(struct its_device *dev, u32 event_id) 1390ed0e4aa9SMarc Zyngier { 1391ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1392ed0e4aa9SMarc Zyngier 1393ed0e4aa9SMarc Zyngier /* 1394ed0e4aa9SMarc Zyngier * There is no real VCLEAR command. This is just a normal CLEAR, 1395ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1396ed0e4aa9SMarc Zyngier */ 1397ed0e4aa9SMarc Zyngier desc.its_clear_cmd.dev = dev; 1398ed0e4aa9SMarc Zyngier desc.its_clear_cmd.event_id = event_id; 1399ed0e4aa9SMarc Zyngier 1400ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); 1401ed0e4aa9SMarc Zyngier } 1402ed0e4aa9SMarc Zyngier 1403d97c97baSMarc Zyngier static void its_send_invdb(struct its_node *its, struct its_vpe *vpe) 1404d97c97baSMarc Zyngier { 1405d97c97baSMarc Zyngier struct its_cmd_desc desc; 1406d97c97baSMarc Zyngier 1407d97c97baSMarc Zyngier desc.its_invdb_cmd.vpe = vpe; 1408d97c97baSMarc Zyngier its_send_single_vcommand(its, its_build_invdb_cmd, &desc); 1409d97c97baSMarc Zyngier } 1410d97c97baSMarc Zyngier 1411c48ed51cSMarc Zyngier /* 1412c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1413c48ed51cSMarc Zyngier */ 1414015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1415c48ed51cSMarc Zyngier { 1416c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1417015ec038SMarc Zyngier irq_hw_number_t hwirq; 1418e1a2e201SMarc Zyngier void *va; 1419adcdb94eSMarc Zyngier u8 *cfg; 1420c48ed51cSMarc Zyngier 1421c1d4d5cdSMarc Zyngier if (map) { 1422c1d4d5cdSMarc Zyngier va = page_address(map->vm->vprop_page); 1423d4d7b4adSMarc Zyngier hwirq = map->vintid; 1424d4d7b4adSMarc Zyngier 1425d4d7b4adSMarc Zyngier /* Remember the updated property */ 1426d4d7b4adSMarc Zyngier map->properties &= ~clr; 1427d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1428015ec038SMarc Zyngier } else { 1429e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1430015ec038SMarc Zyngier hwirq = d->hwirq; 1431015ec038SMarc Zyngier } 1432adcdb94eSMarc Zyngier 1433e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1434adcdb94eSMarc Zyngier *cfg &= ~clr; 1435015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1436c48ed51cSMarc Zyngier 1437c48ed51cSMarc Zyngier /* 1438c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1439c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1440c48ed51cSMarc Zyngier * Humpf... 1441c48ed51cSMarc Zyngier */ 1442c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1443328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1444c48ed51cSMarc Zyngier else 1445c48ed51cSMarc Zyngier dsb(ishst); 1446015ec038SMarc Zyngier } 1447015ec038SMarc Zyngier 14482f4f064bSMarc Zyngier static void wait_for_syncr(void __iomem *rdbase) 14492f4f064bSMarc Zyngier { 145004d80dbeSHeyi Guo while (readl_relaxed(rdbase + GICR_SYNCR) & 1) 14512f4f064bSMarc Zyngier cpu_relax(); 14522f4f064bSMarc Zyngier } 14532f4f064bSMarc Zyngier 1454*926846a7SMarc Zyngier static void __direct_lpi_inv(struct irq_data *d, u64 val) 1455*926846a7SMarc Zyngier { 1456*926846a7SMarc Zyngier void __iomem *rdbase; 1457*926846a7SMarc Zyngier unsigned long flags; 1458*926846a7SMarc Zyngier int cpu; 1459*926846a7SMarc Zyngier 1460*926846a7SMarc Zyngier /* Target the redistributor this LPI is currently routed to */ 1461*926846a7SMarc Zyngier cpu = irq_to_cpuid_lock(d, &flags); 1462*926846a7SMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 1463*926846a7SMarc Zyngier 1464*926846a7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; 1465*926846a7SMarc Zyngier gic_write_lpir(val, rdbase + GICR_INVLPIR); 1466*926846a7SMarc Zyngier wait_for_syncr(rdbase); 1467*926846a7SMarc Zyngier 1468*926846a7SMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 1469*926846a7SMarc Zyngier irq_to_cpuid_unlock(d, flags); 1470*926846a7SMarc Zyngier } 1471*926846a7SMarc Zyngier 1472425c09beSMarc Zyngier static void direct_lpi_inv(struct irq_data *d) 1473425c09beSMarc Zyngier { 1474f4a81f5aSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1475f4a81f5aSMarc Zyngier u64 val; 1476f4a81f5aSMarc Zyngier 1477f4a81f5aSMarc Zyngier if (map) { 1478f4a81f5aSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1479f4a81f5aSMarc Zyngier 1480f4a81f5aSMarc Zyngier WARN_ON(!is_v4_1(its_dev->its)); 1481f4a81f5aSMarc Zyngier 1482f4a81f5aSMarc Zyngier val = GICR_INVLPIR_V; 1483f4a81f5aSMarc Zyngier val |= FIELD_PREP(GICR_INVLPIR_VPEID, map->vpe->vpe_id); 1484f4a81f5aSMarc Zyngier val |= FIELD_PREP(GICR_INVLPIR_INTID, map->vintid); 1485f4a81f5aSMarc Zyngier } else { 1486f4a81f5aSMarc Zyngier val = d->hwirq; 1487f4a81f5aSMarc Zyngier } 1488425c09beSMarc Zyngier 1489*926846a7SMarc Zyngier __direct_lpi_inv(d, val); 1490425c09beSMarc Zyngier } 1491425c09beSMarc Zyngier 1492015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1493015ec038SMarc Zyngier { 1494015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1495015ec038SMarc Zyngier 1496015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1497f4a81f5aSMarc Zyngier if (gic_rdists->has_direct_lpi && 1498f4a81f5aSMarc Zyngier (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) 1499425c09beSMarc Zyngier direct_lpi_inv(d); 150028614696SMarc Zyngier else if (!irqd_is_forwarded_to_vcpu(d)) 1501adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 150228614696SMarc Zyngier else 150328614696SMarc Zyngier its_send_vinv(its_dev, its_get_event_id(d)); 1504c48ed51cSMarc Zyngier } 1505c48ed51cSMarc Zyngier 1506015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1507015ec038SMarc Zyngier { 1508015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1509015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1510c1d4d5cdSMarc Zyngier struct its_vlpi_map *map; 1511015ec038SMarc Zyngier 15123858d4dfSMarc Zyngier /* 15133858d4dfSMarc Zyngier * GICv4.1 does away with the per-LPI nonsense, nothing to do 15143858d4dfSMarc Zyngier * here. 15153858d4dfSMarc Zyngier */ 15163858d4dfSMarc Zyngier if (is_v4_1(its_dev->its)) 15173858d4dfSMarc Zyngier return; 15183858d4dfSMarc Zyngier 1519c1d4d5cdSMarc Zyngier map = dev_event_to_vlpi_map(its_dev, event); 1520c1d4d5cdSMarc Zyngier 1521c1d4d5cdSMarc Zyngier if (map->db_enabled == enable) 1522015ec038SMarc Zyngier return; 1523015ec038SMarc Zyngier 1524c1d4d5cdSMarc Zyngier map->db_enabled = enable; 1525015ec038SMarc Zyngier 1526015ec038SMarc Zyngier /* 1527015ec038SMarc Zyngier * More fun with the architecture: 1528015ec038SMarc Zyngier * 1529015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1530015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1531a359f757SIngo Molnar * would be issuing a mapping for an /existing/ DevID+EventID 1532015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1533015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1534015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1535015ec038SMarc Zyngier */ 1536015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1537c48ed51cSMarc Zyngier } 1538c48ed51cSMarc Zyngier 1539c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1540c48ed51cSMarc Zyngier { 1541015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1542015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1543015ec038SMarc Zyngier 1544adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1545c48ed51cSMarc Zyngier } 1546c48ed51cSMarc Zyngier 1547c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1548c48ed51cSMarc Zyngier { 1549015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1550015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1551015ec038SMarc Zyngier 1552adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1553c48ed51cSMarc Zyngier } 1554c48ed51cSMarc Zyngier 15552f13ff1dSMarc Zyngier static __maybe_unused u32 its_read_lpi_count(struct irq_data *d, int cpu) 15562f13ff1dSMarc Zyngier { 15572f13ff1dSMarc Zyngier if (irqd_affinity_is_managed(d)) 15582f13ff1dSMarc Zyngier return atomic_read(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); 15592f13ff1dSMarc Zyngier 15602f13ff1dSMarc Zyngier return atomic_read(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); 15612f13ff1dSMarc Zyngier } 15622f13ff1dSMarc Zyngier 15632f13ff1dSMarc Zyngier static void its_inc_lpi_count(struct irq_data *d, int cpu) 15642f13ff1dSMarc Zyngier { 15652f13ff1dSMarc Zyngier if (irqd_affinity_is_managed(d)) 15662f13ff1dSMarc Zyngier atomic_inc(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); 15672f13ff1dSMarc Zyngier else 15682f13ff1dSMarc Zyngier atomic_inc(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); 15692f13ff1dSMarc Zyngier } 15702f13ff1dSMarc Zyngier 15712f13ff1dSMarc Zyngier static void its_dec_lpi_count(struct irq_data *d, int cpu) 15722f13ff1dSMarc Zyngier { 15732f13ff1dSMarc Zyngier if (irqd_affinity_is_managed(d)) 15742f13ff1dSMarc Zyngier atomic_dec(&per_cpu_ptr(&cpu_lpi_count, cpu)->managed); 15752f13ff1dSMarc Zyngier else 15762f13ff1dSMarc Zyngier atomic_dec(&per_cpu_ptr(&cpu_lpi_count, cpu)->unmanaged); 15772f13ff1dSMarc Zyngier } 15782f13ff1dSMarc Zyngier 1579c5d6082dSMarc Zyngier static unsigned int cpumask_pick_least_loaded(struct irq_data *d, 1580c5d6082dSMarc Zyngier const struct cpumask *cpu_mask) 1581c5d6082dSMarc Zyngier { 1582c5d6082dSMarc Zyngier unsigned int cpu = nr_cpu_ids, tmp; 1583c5d6082dSMarc Zyngier int count = S32_MAX; 1584c5d6082dSMarc Zyngier 1585c5d6082dSMarc Zyngier for_each_cpu(tmp, cpu_mask) { 1586c5d6082dSMarc Zyngier int this_count = its_read_lpi_count(d, tmp); 1587c5d6082dSMarc Zyngier if (this_count < count) { 1588c5d6082dSMarc Zyngier cpu = tmp; 1589c5d6082dSMarc Zyngier count = this_count; 1590c5d6082dSMarc Zyngier } 1591c5d6082dSMarc Zyngier } 1592c5d6082dSMarc Zyngier 1593c5d6082dSMarc Zyngier return cpu; 1594c5d6082dSMarc Zyngier } 1595c5d6082dSMarc Zyngier 1596c5d6082dSMarc Zyngier /* 1597c5d6082dSMarc Zyngier * As suggested by Thomas Gleixner in: 1598c5d6082dSMarc Zyngier * https://lore.kernel.org/r/87h80q2aoc.fsf@nanos.tec.linutronix.de 1599c5d6082dSMarc Zyngier */ 1600c5d6082dSMarc Zyngier static int its_select_cpu(struct irq_data *d, 1601c5d6082dSMarc Zyngier const struct cpumask *aff_mask) 1602c5d6082dSMarc Zyngier { 1603c5d6082dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1604f55a9b59SPierre Gondois static DEFINE_RAW_SPINLOCK(tmpmask_lock); 1605f55a9b59SPierre Gondois static struct cpumask __tmpmask; 1606f55a9b59SPierre Gondois struct cpumask *tmpmask; 1607f55a9b59SPierre Gondois unsigned long flags; 1608c5d6082dSMarc Zyngier int cpu, node; 1609c5d6082dSMarc Zyngier node = its_dev->its->numa_node; 1610f55a9b59SPierre Gondois tmpmask = &__tmpmask; 1611f55a9b59SPierre Gondois 1612f55a9b59SPierre Gondois raw_spin_lock_irqsave(&tmpmask_lock, flags); 1613c5d6082dSMarc Zyngier 1614c5d6082dSMarc Zyngier if (!irqd_affinity_is_managed(d)) { 1615c5d6082dSMarc Zyngier /* First try the NUMA node */ 1616c5d6082dSMarc Zyngier if (node != NUMA_NO_NODE) { 1617c5d6082dSMarc Zyngier /* 1618c5d6082dSMarc Zyngier * Try the intersection of the affinity mask and the 1619c5d6082dSMarc Zyngier * node mask (and the online mask, just to be safe). 1620c5d6082dSMarc Zyngier */ 1621c5d6082dSMarc Zyngier cpumask_and(tmpmask, cpumask_of_node(node), aff_mask); 1622c5d6082dSMarc Zyngier cpumask_and(tmpmask, tmpmask, cpu_online_mask); 1623c5d6082dSMarc Zyngier 1624c5d6082dSMarc Zyngier /* 1625c5d6082dSMarc Zyngier * Ideally, we would check if the mask is empty, and 1626c5d6082dSMarc Zyngier * try again on the full node here. 1627c5d6082dSMarc Zyngier * 1628c5d6082dSMarc Zyngier * But it turns out that the way ACPI describes the 1629c5d6082dSMarc Zyngier * affinity for ITSs only deals about memory, and 1630c5d6082dSMarc Zyngier * not target CPUs, so it cannot describe a single 1631c5d6082dSMarc Zyngier * ITS placed next to two NUMA nodes. 1632c5d6082dSMarc Zyngier * 1633c5d6082dSMarc Zyngier * Instead, just fallback on the online mask. This 1634c5d6082dSMarc Zyngier * diverges from Thomas' suggestion above. 1635c5d6082dSMarc Zyngier */ 1636c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, tmpmask); 1637c5d6082dSMarc Zyngier if (cpu < nr_cpu_ids) 1638c5d6082dSMarc Zyngier goto out; 1639c5d6082dSMarc Zyngier 1640c5d6082dSMarc Zyngier /* If we can't cross sockets, give up */ 1641c5d6082dSMarc Zyngier if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144)) 1642c5d6082dSMarc Zyngier goto out; 1643c5d6082dSMarc Zyngier 1644c5d6082dSMarc Zyngier /* If the above failed, expand the search */ 1645c5d6082dSMarc Zyngier } 1646c5d6082dSMarc Zyngier 1647c5d6082dSMarc Zyngier /* Try the intersection of the affinity and online masks */ 1648c5d6082dSMarc Zyngier cpumask_and(tmpmask, aff_mask, cpu_online_mask); 1649c5d6082dSMarc Zyngier 1650c5d6082dSMarc Zyngier /* If that doesn't fly, the online mask is the last resort */ 1651c5d6082dSMarc Zyngier if (cpumask_empty(tmpmask)) 1652c5d6082dSMarc Zyngier cpumask_copy(tmpmask, cpu_online_mask); 1653c5d6082dSMarc Zyngier 1654c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, tmpmask); 1655c5d6082dSMarc Zyngier } else { 16563f893a59SMarc Zyngier cpumask_copy(tmpmask, aff_mask); 1657c5d6082dSMarc Zyngier 1658c5d6082dSMarc Zyngier /* If we cannot cross sockets, limit the search to that node */ 1659c5d6082dSMarc Zyngier if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) && 1660c5d6082dSMarc Zyngier node != NUMA_NO_NODE) 1661c5d6082dSMarc Zyngier cpumask_and(tmpmask, tmpmask, cpumask_of_node(node)); 1662c5d6082dSMarc Zyngier 1663c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, tmpmask); 1664c5d6082dSMarc Zyngier } 1665c5d6082dSMarc Zyngier out: 1666f55a9b59SPierre Gondois raw_spin_unlock_irqrestore(&tmpmask_lock, flags); 1667c5d6082dSMarc Zyngier 1668c5d6082dSMarc Zyngier pr_debug("IRQ%d -> %*pbl CPU%d\n", d->irq, cpumask_pr_args(aff_mask), cpu); 1669c5d6082dSMarc Zyngier return cpu; 1670c5d6082dSMarc Zyngier } 1671c5d6082dSMarc Zyngier 1672c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1673c48ed51cSMarc Zyngier bool force) 1674c48ed51cSMarc Zyngier { 1675c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1676c48ed51cSMarc Zyngier struct its_collection *target_col; 1677c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1678c5d6082dSMarc Zyngier int cpu, prev_cpu; 1679c48ed51cSMarc Zyngier 1680015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1681015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1682015ec038SMarc Zyngier return -EINVAL; 1683015ec038SMarc Zyngier 16842f13ff1dSMarc Zyngier prev_cpu = its_dev->event_map.col_map[id]; 16852f13ff1dSMarc Zyngier its_dec_lpi_count(d, prev_cpu); 16862f13ff1dSMarc Zyngier 1687c5d6082dSMarc Zyngier if (!force) 1688c5d6082dSMarc Zyngier cpu = its_select_cpu(d, mask_val); 1689c5d6082dSMarc Zyngier else 1690c5d6082dSMarc Zyngier cpu = cpumask_pick_least_loaded(d, mask_val); 1691fbf8f40eSGanapatrao Kulkarni 1692c5d6082dSMarc Zyngier if (cpu < 0 || cpu >= nr_cpu_ids) 16932f13ff1dSMarc Zyngier goto err; 1694c48ed51cSMarc Zyngier 16958b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 16962f13ff1dSMarc Zyngier if (cpu != prev_cpu) { 1697c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1698c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1699591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 17000d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 17018b8d94a7SMaJun } 1702c48ed51cSMarc Zyngier 17032f13ff1dSMarc Zyngier its_inc_lpi_count(d, cpu); 17042f13ff1dSMarc Zyngier 1705c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 17062f13ff1dSMarc Zyngier 17072f13ff1dSMarc Zyngier err: 17082f13ff1dSMarc Zyngier its_inc_lpi_count(d, prev_cpu); 17092f13ff1dSMarc Zyngier return -EINVAL; 1710c48ed51cSMarc Zyngier } 1711c48ed51cSMarc Zyngier 1712558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1713558b0165SArd Biesheuvel { 1714558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1715558b0165SArd Biesheuvel 1716558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1717558b0165SArd Biesheuvel } 1718558b0165SArd Biesheuvel 1719b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1720b48ac83dSMarc Zyngier { 1721b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1722b48ac83dSMarc Zyngier struct its_node *its; 1723b48ac83dSMarc Zyngier u64 addr; 1724b48ac83dSMarc Zyngier 1725b48ac83dSMarc Zyngier its = its_dev->its; 1726558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1727b48ac83dSMarc Zyngier 1728b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1729b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1730b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 173144bb7e24SRobin Murphy 173235ae7df2SJulien Grall iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); 1733b48ac83dSMarc Zyngier } 1734b48ac83dSMarc Zyngier 17358d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 17368d85dcedSMarc Zyngier enum irqchip_irq_state which, 17378d85dcedSMarc Zyngier bool state) 17388d85dcedSMarc Zyngier { 17398d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 17408d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 17418d85dcedSMarc Zyngier 17428d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 17438d85dcedSMarc Zyngier return -EINVAL; 17448d85dcedSMarc Zyngier 1745ed0e4aa9SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1746ed0e4aa9SMarc Zyngier if (state) 1747ed0e4aa9SMarc Zyngier its_send_vint(its_dev, event); 1748ed0e4aa9SMarc Zyngier else 1749ed0e4aa9SMarc Zyngier its_send_vclear(its_dev, event); 1750ed0e4aa9SMarc Zyngier } else { 17518d85dcedSMarc Zyngier if (state) 17528d85dcedSMarc Zyngier its_send_int(its_dev, event); 17538d85dcedSMarc Zyngier else 17548d85dcedSMarc Zyngier its_send_clear(its_dev, event); 1755ed0e4aa9SMarc Zyngier } 17568d85dcedSMarc Zyngier 17578d85dcedSMarc Zyngier return 0; 17588d85dcedSMarc Zyngier } 17598d85dcedSMarc Zyngier 17605f774f5eSMarc Zyngier static int its_irq_retrigger(struct irq_data *d) 17615f774f5eSMarc Zyngier { 17625f774f5eSMarc Zyngier return !its_irq_set_irqchip_state(d, IRQCHIP_STATE_PENDING, true); 17635f774f5eSMarc Zyngier } 17645f774f5eSMarc Zyngier 1765009384b3SMarc Zyngier /* 1766009384b3SMarc Zyngier * Two favourable cases: 1767009384b3SMarc Zyngier * 1768009384b3SMarc Zyngier * (a) Either we have a GICv4.1, and all vPEs have to be mapped at all times 1769009384b3SMarc Zyngier * for vSGI delivery 1770009384b3SMarc Zyngier * 1771009384b3SMarc Zyngier * (b) Or the ITSs do not use a list map, meaning that VMOVP is cheap enough 1772009384b3SMarc Zyngier * and we're better off mapping all VPEs always 1773009384b3SMarc Zyngier * 1774009384b3SMarc Zyngier * If neither (a) nor (b) is true, then we map vPEs on demand. 1775009384b3SMarc Zyngier * 1776009384b3SMarc Zyngier */ 1777009384b3SMarc Zyngier static bool gic_requires_eager_mapping(void) 1778009384b3SMarc Zyngier { 1779009384b3SMarc Zyngier if (!its_list_map || gic_rdists->has_rvpeid) 1780009384b3SMarc Zyngier return true; 1781009384b3SMarc Zyngier 1782009384b3SMarc Zyngier return false; 1783009384b3SMarc Zyngier } 1784009384b3SMarc Zyngier 17852247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 17862247e1bfSMarc Zyngier { 17872247e1bfSMarc Zyngier unsigned long flags; 17882247e1bfSMarc Zyngier 1789009384b3SMarc Zyngier if (gic_requires_eager_mapping()) 17902247e1bfSMarc Zyngier return; 17912247e1bfSMarc Zyngier 17922247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 17932247e1bfSMarc Zyngier 17942247e1bfSMarc Zyngier /* 17952247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 17962247e1bfSMarc Zyngier * them mapped now. 17972247e1bfSMarc Zyngier */ 17982247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 17992247e1bfSMarc Zyngier 18002247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 18012247e1bfSMarc Zyngier int i; 18022247e1bfSMarc Zyngier 18032247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 18042247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 180544c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 18062247e1bfSMarc Zyngier 18072247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 18082247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 18092247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 18102247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 181144c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 18122247e1bfSMarc Zyngier } 18132247e1bfSMarc Zyngier } 18142247e1bfSMarc Zyngier 18152247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 18162247e1bfSMarc Zyngier } 18172247e1bfSMarc Zyngier 18182247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 18192247e1bfSMarc Zyngier { 18202247e1bfSMarc Zyngier unsigned long flags; 18212247e1bfSMarc Zyngier 18222247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 1823009384b3SMarc Zyngier if (gic_requires_eager_mapping()) 18242247e1bfSMarc Zyngier return; 18252247e1bfSMarc Zyngier 18262247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 18272247e1bfSMarc Zyngier 18282247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 18292247e1bfSMarc Zyngier int i; 18302247e1bfSMarc Zyngier 18312247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 18322247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 18332247e1bfSMarc Zyngier } 18342247e1bfSMarc Zyngier 18352247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 18362247e1bfSMarc Zyngier } 18372247e1bfSMarc Zyngier 1838d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1839d011e4e6SMarc Zyngier { 1840d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1841d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1842d011e4e6SMarc Zyngier int ret = 0; 1843d011e4e6SMarc Zyngier 1844d011e4e6SMarc Zyngier if (!info->map) 1845d011e4e6SMarc Zyngier return -EINVAL; 1846d011e4e6SMarc Zyngier 184711635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1848d011e4e6SMarc Zyngier 1849d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1850d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1851d011e4e6SMarc Zyngier 18526396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 185311635fa2SMarc Zyngier GFP_ATOMIC); 1854d011e4e6SMarc Zyngier if (!maps) { 1855d011e4e6SMarc Zyngier ret = -ENOMEM; 1856d011e4e6SMarc Zyngier goto out; 1857d011e4e6SMarc Zyngier } 1858d011e4e6SMarc Zyngier 1859d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1860d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1861d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1862d011e4e6SMarc Zyngier ret = -EINVAL; 1863d011e4e6SMarc Zyngier goto out; 1864d011e4e6SMarc Zyngier } 1865d011e4e6SMarc Zyngier 1866d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1867d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1868d011e4e6SMarc Zyngier 1869d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1870d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1871d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1872d011e4e6SMarc Zyngier } else { 18732247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 18742247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 18752247e1bfSMarc Zyngier 1876d4d7b4adSMarc Zyngier /* 1877d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1878d4d7b4adSMarc Zyngier * start poking the virtual property table. 1879d4d7b4adSMarc Zyngier */ 1880d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1881d4d7b4adSMarc Zyngier 1882d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1883d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1884d4d7b4adSMarc Zyngier 1885d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1886d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1887d011e4e6SMarc Zyngier 1888d011e4e6SMarc Zyngier /* and install the virtual one */ 1889d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1890d011e4e6SMarc Zyngier 1891d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1892d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1893d011e4e6SMarc Zyngier } 1894d011e4e6SMarc Zyngier 1895d011e4e6SMarc Zyngier out: 189611635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1897d011e4e6SMarc Zyngier return ret; 1898d011e4e6SMarc Zyngier } 1899d011e4e6SMarc Zyngier 1900d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1901d011e4e6SMarc Zyngier { 1902d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1903046b5054SMarc Zyngier struct its_vlpi_map *map; 1904d011e4e6SMarc Zyngier int ret = 0; 1905d011e4e6SMarc Zyngier 190611635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1907d011e4e6SMarc Zyngier 1908046b5054SMarc Zyngier map = get_vlpi_map(d); 1909046b5054SMarc Zyngier 1910046b5054SMarc Zyngier if (!its_dev->event_map.vm || !map) { 1911d011e4e6SMarc Zyngier ret = -EINVAL; 1912d011e4e6SMarc Zyngier goto out; 1913d011e4e6SMarc Zyngier } 1914d011e4e6SMarc Zyngier 1915d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1916c1d4d5cdSMarc Zyngier *info->map = *map; 1917d011e4e6SMarc Zyngier 1918d011e4e6SMarc Zyngier out: 191911635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1920d011e4e6SMarc Zyngier return ret; 1921d011e4e6SMarc Zyngier } 1922d011e4e6SMarc Zyngier 1923d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1924d011e4e6SMarc Zyngier { 1925d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1926d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1927d011e4e6SMarc Zyngier int ret = 0; 1928d011e4e6SMarc Zyngier 192911635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1930d011e4e6SMarc Zyngier 1931d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1932d011e4e6SMarc Zyngier ret = -EINVAL; 1933d011e4e6SMarc Zyngier goto out; 1934d011e4e6SMarc Zyngier } 1935d011e4e6SMarc Zyngier 1936d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1937d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1938d011e4e6SMarc Zyngier 1939d011e4e6SMarc Zyngier /* and restore the physical one */ 1940d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1941d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1942d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1943d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1944d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1945d011e4e6SMarc Zyngier 19462247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 19472247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 19482247e1bfSMarc Zyngier 1949d011e4e6SMarc Zyngier /* 1950d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1951d011e4e6SMarc Zyngier * this was the last VLPI. 1952d011e4e6SMarc Zyngier */ 1953d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1954d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1955d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1956d011e4e6SMarc Zyngier } 1957d011e4e6SMarc Zyngier 1958d011e4e6SMarc Zyngier out: 195911635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1960d011e4e6SMarc Zyngier return ret; 1961d011e4e6SMarc Zyngier } 1962d011e4e6SMarc Zyngier 1963015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1964015ec038SMarc Zyngier { 1965015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1966015ec038SMarc Zyngier 1967015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1968015ec038SMarc Zyngier return -EINVAL; 1969015ec038SMarc Zyngier 1970015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1971015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1972015ec038SMarc Zyngier else 1973015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1974015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1975015ec038SMarc Zyngier 1976015ec038SMarc Zyngier return 0; 1977015ec038SMarc Zyngier } 1978015ec038SMarc Zyngier 1979c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1980c808eea8SMarc Zyngier { 1981c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1982c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1983c808eea8SMarc Zyngier 1984c808eea8SMarc Zyngier /* Need a v4 ITS */ 19850dd57fedSMarc Zyngier if (!is_v4(its_dev->its)) 1986c808eea8SMarc Zyngier return -EINVAL; 1987c808eea8SMarc Zyngier 1988d011e4e6SMarc Zyngier /* Unmap request? */ 1989d011e4e6SMarc Zyngier if (!info) 1990d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1991d011e4e6SMarc Zyngier 1992c808eea8SMarc Zyngier switch (info->cmd_type) { 1993c808eea8SMarc Zyngier case MAP_VLPI: 1994d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1995c808eea8SMarc Zyngier 1996c808eea8SMarc Zyngier case GET_VLPI: 1997d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1998c808eea8SMarc Zyngier 1999c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 2000c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 2001015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 2002c808eea8SMarc Zyngier 2003c808eea8SMarc Zyngier default: 2004c808eea8SMarc Zyngier return -EINVAL; 2005c808eea8SMarc Zyngier } 2006c808eea8SMarc Zyngier } 2007c808eea8SMarc Zyngier 2008c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 2009c48ed51cSMarc Zyngier .name = "ITS", 2010c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 2011c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 2012004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 2013c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 2014b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 20158d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 20165f774f5eSMarc Zyngier .irq_retrigger = its_irq_retrigger, 2017c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 2018b48ac83dSMarc Zyngier }; 2019b48ac83dSMarc Zyngier 2020880cb3cdSMarc Zyngier 2021bf9529f8SMarc Zyngier /* 2022bf9529f8SMarc Zyngier * How we allocate LPIs: 2023bf9529f8SMarc Zyngier * 2024880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 2025880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 2026880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 2027880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 2028bf9529f8SMarc Zyngier * 2029880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 2030880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 2031880cb3cdSMarc Zyngier * already free block. 2032880cb3cdSMarc Zyngier * 2033880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 2034880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 2035880cb3cdSMarc Zyngier */ 20364cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 2037880cb3cdSMarc Zyngier 2038880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 2039880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 2040bf9529f8SMarc Zyngier 2041880cb3cdSMarc Zyngier struct lpi_range { 2042880cb3cdSMarc Zyngier struct list_head entry; 2043880cb3cdSMarc Zyngier u32 base_id; 2044880cb3cdSMarc Zyngier u32 span; 2045880cb3cdSMarc Zyngier }; 2046880cb3cdSMarc Zyngier 2047880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 2048bf9529f8SMarc Zyngier { 2049880cb3cdSMarc Zyngier struct lpi_range *range; 2050880cb3cdSMarc Zyngier 20511c73fac5SRasmus Villemoes range = kmalloc(sizeof(*range), GFP_KERNEL); 2052880cb3cdSMarc Zyngier if (range) { 2053880cb3cdSMarc Zyngier range->base_id = base; 2054880cb3cdSMarc Zyngier range->span = span; 2055bf9529f8SMarc Zyngier } 2056bf9529f8SMarc Zyngier 2057880cb3cdSMarc Zyngier return range; 2058880cb3cdSMarc Zyngier } 2059880cb3cdSMarc Zyngier 2060880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 2061880cb3cdSMarc Zyngier { 2062880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 2063880cb3cdSMarc Zyngier int err = -ENOSPC; 2064880cb3cdSMarc Zyngier 2065880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 2066880cb3cdSMarc Zyngier 2067880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 2068880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 2069880cb3cdSMarc Zyngier *base = range->base_id; 2070880cb3cdSMarc Zyngier range->base_id += nr_lpis; 2071880cb3cdSMarc Zyngier range->span -= nr_lpis; 2072880cb3cdSMarc Zyngier 2073880cb3cdSMarc Zyngier if (range->span == 0) { 2074880cb3cdSMarc Zyngier list_del(&range->entry); 2075880cb3cdSMarc Zyngier kfree(range); 2076880cb3cdSMarc Zyngier } 2077880cb3cdSMarc Zyngier 2078880cb3cdSMarc Zyngier err = 0; 2079880cb3cdSMarc Zyngier break; 2080880cb3cdSMarc Zyngier } 2081880cb3cdSMarc Zyngier } 2082880cb3cdSMarc Zyngier 2083880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 2084880cb3cdSMarc Zyngier 2085880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 2086880cb3cdSMarc Zyngier return err; 2087880cb3cdSMarc Zyngier } 2088880cb3cdSMarc Zyngier 208912eade12SRasmus Villemoes static void merge_lpi_ranges(struct lpi_range *a, struct lpi_range *b) 209012eade12SRasmus Villemoes { 209112eade12SRasmus Villemoes if (&a->entry == &lpi_range_list || &b->entry == &lpi_range_list) 209212eade12SRasmus Villemoes return; 209312eade12SRasmus Villemoes if (a->base_id + a->span != b->base_id) 209412eade12SRasmus Villemoes return; 209512eade12SRasmus Villemoes b->base_id = a->base_id; 209612eade12SRasmus Villemoes b->span += a->span; 209712eade12SRasmus Villemoes list_del(&a->entry); 209812eade12SRasmus Villemoes kfree(a); 209912eade12SRasmus Villemoes } 210012eade12SRasmus Villemoes 2101880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 2102880cb3cdSMarc Zyngier { 210312eade12SRasmus Villemoes struct lpi_range *new, *old; 2104880cb3cdSMarc Zyngier 2105880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 2106b31a3838SRasmus Villemoes if (!new) 2107b31a3838SRasmus Villemoes return -ENOMEM; 2108880cb3cdSMarc Zyngier 2109880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 2110880cb3cdSMarc Zyngier 211112eade12SRasmus Villemoes list_for_each_entry_reverse(old, &lpi_range_list, entry) { 211212eade12SRasmus Villemoes if (old->base_id < base) 211312eade12SRasmus Villemoes break; 2114880cb3cdSMarc Zyngier } 211512eade12SRasmus Villemoes /* 211612eade12SRasmus Villemoes * old is the last element with ->base_id smaller than base, 211712eade12SRasmus Villemoes * so new goes right after it. If there are no elements with 211812eade12SRasmus Villemoes * ->base_id smaller than base, &old->entry ends up pointing 211912eade12SRasmus Villemoes * at the head of the list, and inserting new it the start of 212012eade12SRasmus Villemoes * the list is the right thing to do in that case as well. 212112eade12SRasmus Villemoes */ 212212eade12SRasmus Villemoes list_add(&new->entry, &old->entry); 212312eade12SRasmus Villemoes /* 212412eade12SRasmus Villemoes * Now check if we can merge with the preceding and/or 212512eade12SRasmus Villemoes * following ranges. 212612eade12SRasmus Villemoes */ 212712eade12SRasmus Villemoes merge_lpi_ranges(old, new); 212812eade12SRasmus Villemoes merge_lpi_ranges(new, list_next_entry(new, entry)); 2129880cb3cdSMarc Zyngier 2130880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 2131b31a3838SRasmus Villemoes return 0; 2132bf9529f8SMarc Zyngier } 2133bf9529f8SMarc Zyngier 213404a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 2135bf9529f8SMarc Zyngier { 2136880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 213712b2905aSMarc Zyngier u32 numlpis; 2138880cb3cdSMarc Zyngier int err; 2139bf9529f8SMarc Zyngier 214012b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 214112b2905aSMarc Zyngier 214212b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 214312b2905aSMarc Zyngier lpis = numlpis; 214412b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 214512b2905aSMarc Zyngier lpis); 214612b2905aSMarc Zyngier } 214712b2905aSMarc Zyngier 2148880cb3cdSMarc Zyngier /* 2149880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 2150880cb3cdSMarc Zyngier * full range of LPIs. 2151880cb3cdSMarc Zyngier */ 2152880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 2153880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 2154880cb3cdSMarc Zyngier return err; 2155bf9529f8SMarc Zyngier } 2156bf9529f8SMarc Zyngier 215738dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 2158bf9529f8SMarc Zyngier { 2159bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 2160880cb3cdSMarc Zyngier int err = 0; 2161bf9529f8SMarc Zyngier 2162bf9529f8SMarc Zyngier do { 216338dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 2164880cb3cdSMarc Zyngier if (!err) 2165bf9529f8SMarc Zyngier break; 2166bf9529f8SMarc Zyngier 216738dd7c49SMarc Zyngier nr_irqs /= 2; 216838dd7c49SMarc Zyngier } while (nr_irqs > 0); 2169bf9529f8SMarc Zyngier 217045725e0fSMarc Zyngier if (!nr_irqs) 217145725e0fSMarc Zyngier err = -ENOSPC; 217245725e0fSMarc Zyngier 2173880cb3cdSMarc Zyngier if (err) 2174bf9529f8SMarc Zyngier goto out; 2175bf9529f8SMarc Zyngier 2176ff5fe886SAndy Shevchenko bitmap = bitmap_zalloc(nr_irqs, GFP_ATOMIC); 2177bf9529f8SMarc Zyngier if (!bitmap) 2178bf9529f8SMarc Zyngier goto out; 2179bf9529f8SMarc Zyngier 218038dd7c49SMarc Zyngier *nr_ids = nr_irqs; 2181bf9529f8SMarc Zyngier 2182bf9529f8SMarc Zyngier out: 2183c8415b94SMarc Zyngier if (!bitmap) 2184c8415b94SMarc Zyngier *base = *nr_ids = 0; 2185c8415b94SMarc Zyngier 2186bf9529f8SMarc Zyngier return bitmap; 2187bf9529f8SMarc Zyngier } 2188bf9529f8SMarc Zyngier 218938dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 2190bf9529f8SMarc Zyngier { 2191880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 2192ff5fe886SAndy Shevchenko bitmap_free(bitmap); 2193bf9529f8SMarc Zyngier } 21941ac19ca6SMarc Zyngier 2195053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 2196053be485SMarc Zyngier { 2197053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 2198053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 2199053be485SMarc Zyngier 2200053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 2201053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 2202053be485SMarc Zyngier } 2203053be485SMarc Zyngier 22040e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 22050e5ccf91SMarc Zyngier { 22060e5ccf91SMarc Zyngier struct page *prop_page; 22071ac19ca6SMarc Zyngier 22080e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 22090e5ccf91SMarc Zyngier if (!prop_page) 22100e5ccf91SMarc Zyngier return NULL; 22110e5ccf91SMarc Zyngier 2212053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 22130e5ccf91SMarc Zyngier 22140e5ccf91SMarc Zyngier return prop_page; 22150e5ccf91SMarc Zyngier } 22160e5ccf91SMarc Zyngier 22177d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 22187d75bbb4SMarc Zyngier { 22197d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 22207d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 22217d75bbb4SMarc Zyngier } 22221ac19ca6SMarc Zyngier 22235e2c9f9aSMarc Zyngier static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) 22245e2c9f9aSMarc Zyngier { 22255e2c9f9aSMarc Zyngier phys_addr_t start, end, addr_end; 22265e2c9f9aSMarc Zyngier u64 i; 22275e2c9f9aSMarc Zyngier 22285e2c9f9aSMarc Zyngier /* 22295e2c9f9aSMarc Zyngier * We don't bother checking for a kdump kernel as by 22305e2c9f9aSMarc Zyngier * construction, the LPI tables are out of this kernel's 22315e2c9f9aSMarc Zyngier * memory map. 22325e2c9f9aSMarc Zyngier */ 22335e2c9f9aSMarc Zyngier if (is_kdump_kernel()) 22345e2c9f9aSMarc Zyngier return true; 22355e2c9f9aSMarc Zyngier 22365e2c9f9aSMarc Zyngier addr_end = addr + size - 1; 22375e2c9f9aSMarc Zyngier 22389f3d5eaaSMike Rapoport for_each_reserved_mem_range(i, &start, &end) { 22395e2c9f9aSMarc Zyngier if (addr >= start && addr_end <= end) 22405e2c9f9aSMarc Zyngier return true; 22415e2c9f9aSMarc Zyngier } 22425e2c9f9aSMarc Zyngier 22435e2c9f9aSMarc Zyngier /* Not found, not a good sign... */ 22445e2c9f9aSMarc Zyngier pr_warn("GICv3: Expected reserved range [%pa:%pa], not found\n", 22455e2c9f9aSMarc Zyngier &addr, &addr_end); 22465e2c9f9aSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 22475e2c9f9aSMarc Zyngier return false; 22485e2c9f9aSMarc Zyngier } 22495e2c9f9aSMarc Zyngier 22503fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 22513fb68faeSMarc Zyngier { 22523fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 22533fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 22543fb68faeSMarc Zyngier 22553fb68faeSMarc Zyngier return 0; 22563fb68faeSMarc Zyngier } 22573fb68faeSMarc Zyngier 225811e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 22591ac19ca6SMarc Zyngier { 2260c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 2261c440a9d9SMarc Zyngier u64 val; 2262c440a9d9SMarc Zyngier 2263c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 2264c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 2265c440a9d9SMarc Zyngier 2266c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 2267c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 2268c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 2269c440a9d9SMarc Zyngier MEMREMAP_WB); 2270c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 2271c440a9d9SMarc Zyngier } else { 2272e1a2e201SMarc Zyngier struct page *page; 22731ac19ca6SMarc Zyngier 2274c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 2275c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 22764cb205c0SJia He ITS_MAX_LPI_NRBITS); 2277e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 2278e1a2e201SMarc Zyngier if (!page) { 22791ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 22801ac19ca6SMarc Zyngier return -ENOMEM; 22811ac19ca6SMarc Zyngier } 22821ac19ca6SMarc Zyngier 2283e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 2284e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 22853fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 22863fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 2287c440a9d9SMarc Zyngier } 2288e1a2e201SMarc Zyngier 2289e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 2290e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 22911ac19ca6SMarc Zyngier 22926c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 22931ac19ca6SMarc Zyngier } 22941ac19ca6SMarc Zyngier 22951ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 22961ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 22971ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 22984f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 22991ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 23001ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 23011ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 23021ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 23031ac19ca6SMarc Zyngier }; 23041ac19ca6SMarc Zyngier 23052d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 23062d81d425SShanker Donthineni { 23072d81d425SShanker Donthineni u32 idx = baser - its->tables; 23082d81d425SShanker Donthineni 23090968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 23102d81d425SShanker Donthineni } 23112d81d425SShanker Donthineni 23122d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 23132d81d425SShanker Donthineni u64 val) 23142d81d425SShanker Donthineni { 23152d81d425SShanker Donthineni u32 idx = baser - its->tables; 23162d81d425SShanker Donthineni 23170968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 23182d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 23192d81d425SShanker Donthineni } 23202d81d425SShanker Donthineni 23219347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 2322d5df9dc9SMarc Zyngier u64 cache, u64 shr, u32 order, bool indirect) 23239347359aSShanker Donthineni { 23249347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 23259347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 23269347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 232730ae9610SShanker Donthineni u64 baser_phys, tmp; 2328d5df9dc9SMarc Zyngier u32 alloc_pages, psz; 2329539d3782SShanker Donthineni struct page *page; 23309347359aSShanker Donthineni void *base; 23319347359aSShanker Donthineni 2332d5df9dc9SMarc Zyngier psz = baser->psz; 23339347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 23349347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 23359347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 23369347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 23379347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 23389347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 23399347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 23409347359aSShanker Donthineni } 23419347359aSShanker Donthineni 2342539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); 2343539d3782SShanker Donthineni if (!page) 23449347359aSShanker Donthineni return -ENOMEM; 23459347359aSShanker Donthineni 2346539d3782SShanker Donthineni base = (void *)page_address(page); 234730ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 234830ae9610SShanker Donthineni 234930ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 235030ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 235130ae9610SShanker Donthineni 235230ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 235330ae9610SShanker Donthineni if (psz != SZ_64K) { 235430ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 235530ae9610SShanker Donthineni free_pages((unsigned long)base, order); 235630ae9610SShanker Donthineni return -ENXIO; 235730ae9610SShanker Donthineni } 235830ae9610SShanker Donthineni 235930ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 236030ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 236130ae9610SShanker Donthineni } 236230ae9610SShanker Donthineni 23639347359aSShanker Donthineni retry_baser: 236430ae9610SShanker Donthineni val = (baser_phys | 23659347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 23669347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 23679347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 23689347359aSShanker Donthineni cache | 23699347359aSShanker Donthineni shr | 23709347359aSShanker Donthineni GITS_BASER_VALID); 23719347359aSShanker Donthineni 23723faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 23733faf24eaSShanker Donthineni 23749347359aSShanker Donthineni switch (psz) { 23759347359aSShanker Donthineni case SZ_4K: 23769347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 23779347359aSShanker Donthineni break; 23789347359aSShanker Donthineni case SZ_16K: 23799347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 23809347359aSShanker Donthineni break; 23819347359aSShanker Donthineni case SZ_64K: 23829347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 23839347359aSShanker Donthineni break; 23849347359aSShanker Donthineni } 23859347359aSShanker Donthineni 23869347359aSShanker Donthineni its_write_baser(its, baser, val); 23879347359aSShanker Donthineni tmp = baser->val; 23889347359aSShanker Donthineni 2389a8707f55SSebastian Reichel if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) 2390a8707f55SSebastian Reichel tmp &= ~GITS_BASER_SHAREABILITY_MASK; 2391a8707f55SSebastian Reichel 23929347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 23939347359aSShanker Donthineni /* 23949347359aSShanker Donthineni * Shareability didn't stick. Just use 23959347359aSShanker Donthineni * whatever the read reported, which is likely 23969347359aSShanker Donthineni * to be the only thing this redistributor 23979347359aSShanker Donthineni * supports. If that's zero, make it 23989347359aSShanker Donthineni * non-cacheable as well. 23999347359aSShanker Donthineni */ 24009347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 24019347359aSShanker Donthineni if (!shr) { 24029347359aSShanker Donthineni cache = GITS_BASER_nC; 2403328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 24049347359aSShanker Donthineni } 24059347359aSShanker Donthineni goto retry_baser; 24069347359aSShanker Donthineni } 24079347359aSShanker Donthineni 24089347359aSShanker Donthineni if (val != tmp) { 2409b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 24109347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 2411b11283ebSVladimir Murzin val, tmp); 24129347359aSShanker Donthineni free_pages((unsigned long)base, order); 24139347359aSShanker Donthineni return -ENXIO; 24149347359aSShanker Donthineni } 24159347359aSShanker Donthineni 24169347359aSShanker Donthineni baser->order = order; 24179347359aSShanker Donthineni baser->base = base; 24189347359aSShanker Donthineni baser->psz = psz; 24193faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 24209347359aSShanker Donthineni 24213faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 2422d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 24239347359aSShanker Donthineni its_base_type_string[type], 24249347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 24253faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 24269347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 24279347359aSShanker Donthineni 24289347359aSShanker Donthineni return 0; 24299347359aSShanker Donthineni } 24309347359aSShanker Donthineni 24314cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 24324cacac57SMarc Zyngier struct its_baser *baser, 2433d5df9dc9SMarc Zyngier u32 *order, u32 ids) 24344b75c459SShanker Donthineni { 24354cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 24364cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 24374cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 24382fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 24394b75c459SShanker Donthineni u32 new_order = *order; 2440d5df9dc9SMarc Zyngier u32 psz = baser->psz; 24413faf24eaSShanker Donthineni bool indirect = false; 24423faf24eaSShanker Donthineni 24433faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 24443faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 24453faf24eaSShanker Donthineni /* 24463faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 24473faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 24483faf24eaSShanker Donthineni */ 24493faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 24503faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 24513faf24eaSShanker Donthineni 24523faf24eaSShanker Donthineni if (indirect) { 24533faf24eaSShanker Donthineni /* 24543faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 24553faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 24563faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 24573faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 24583faf24eaSShanker Donthineni * entry size. 24593faf24eaSShanker Donthineni */ 2460d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 24613faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 24623faf24eaSShanker Donthineni } 24633faf24eaSShanker Donthineni } 24644b75c459SShanker Donthineni 24654b75c459SShanker Donthineni /* 24664b75c459SShanker Donthineni * Allocate as many entries as required to fit the 24674b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 24684b75c459SShanker Donthineni * space being incredibly sparse, this results in a 24693faf24eaSShanker Donthineni * massive waste of memory if two-level device table 24703faf24eaSShanker Donthineni * feature is not supported by hardware. 24714b75c459SShanker Donthineni */ 24724b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 247323baf831SKirill A. Shutemov if (new_order > MAX_ORDER) { 247423baf831SKirill A. Shutemov new_order = MAX_ORDER; 2475d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 2476576a8342SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", 24774cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 2478576a8342SMarc Zyngier device_ids(its), ids); 24794b75c459SShanker Donthineni } 24804b75c459SShanker Donthineni 24814b75c459SShanker Donthineni *order = new_order; 24823faf24eaSShanker Donthineni 24833faf24eaSShanker Donthineni return indirect; 24844b75c459SShanker Donthineni } 24854b75c459SShanker Donthineni 24865e516846SMarc Zyngier static u32 compute_common_aff(u64 val) 24875e516846SMarc Zyngier { 24885e516846SMarc Zyngier u32 aff, clpiaff; 24895e516846SMarc Zyngier 24905e516846SMarc Zyngier aff = FIELD_GET(GICR_TYPER_AFFINITY, val); 24915e516846SMarc Zyngier clpiaff = FIELD_GET(GICR_TYPER_COMMON_LPI_AFF, val); 24925e516846SMarc Zyngier 24935e516846SMarc Zyngier return aff & ~(GENMASK(31, 0) >> (clpiaff * 8)); 24945e516846SMarc Zyngier } 24955e516846SMarc Zyngier 24965e516846SMarc Zyngier static u32 compute_its_aff(struct its_node *its) 24975e516846SMarc Zyngier { 24985e516846SMarc Zyngier u64 val; 24995e516846SMarc Zyngier u32 svpet; 25005e516846SMarc Zyngier 25015e516846SMarc Zyngier /* 25025e516846SMarc Zyngier * Reencode the ITS SVPET and MPIDR as a GICR_TYPER, and compute 25035e516846SMarc Zyngier * the resulting affinity. We then use that to see if this match 25045e516846SMarc Zyngier * our own affinity. 25055e516846SMarc Zyngier */ 25065e516846SMarc Zyngier svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); 25075e516846SMarc Zyngier val = FIELD_PREP(GICR_TYPER_COMMON_LPI_AFF, svpet); 25085e516846SMarc Zyngier val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); 25095e516846SMarc Zyngier return compute_common_aff(val); 25105e516846SMarc Zyngier } 25115e516846SMarc Zyngier 25125e516846SMarc Zyngier static struct its_node *find_sibling_its(struct its_node *cur_its) 25135e516846SMarc Zyngier { 25145e516846SMarc Zyngier struct its_node *its; 25155e516846SMarc Zyngier u32 aff; 25165e516846SMarc Zyngier 25175e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, cur_its->typer)) 25185e516846SMarc Zyngier return NULL; 25195e516846SMarc Zyngier 25205e516846SMarc Zyngier aff = compute_its_aff(cur_its); 25215e516846SMarc Zyngier 25225e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 25235e516846SMarc Zyngier u64 baser; 25245e516846SMarc Zyngier 25255e516846SMarc Zyngier if (!is_v4_1(its) || its == cur_its) 25265e516846SMarc Zyngier continue; 25275e516846SMarc Zyngier 25285e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 25295e516846SMarc Zyngier continue; 25305e516846SMarc Zyngier 25315e516846SMarc Zyngier if (aff != compute_its_aff(its)) 25325e516846SMarc Zyngier continue; 25335e516846SMarc Zyngier 25345e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 25355e516846SMarc Zyngier baser = its->tables[2].val; 25365e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 25375e516846SMarc Zyngier continue; 25385e516846SMarc Zyngier 25395e516846SMarc Zyngier return its; 25405e516846SMarc Zyngier } 25415e516846SMarc Zyngier 25425e516846SMarc Zyngier return NULL; 25435e516846SMarc Zyngier } 25445e516846SMarc Zyngier 25451ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 25461ac19ca6SMarc Zyngier { 25471ac19ca6SMarc Zyngier int i; 25481ac19ca6SMarc Zyngier 25491ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 25501a485f4dSShanker Donthineni if (its->tables[i].base) { 25511a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 25521a485f4dSShanker Donthineni its->tables[i].order); 25531a485f4dSShanker Donthineni its->tables[i].base = NULL; 25541ac19ca6SMarc Zyngier } 25551ac19ca6SMarc Zyngier } 25561ac19ca6SMarc Zyngier } 25571ac19ca6SMarc Zyngier 2558d5df9dc9SMarc Zyngier static int its_probe_baser_psz(struct its_node *its, struct its_baser *baser) 2559d5df9dc9SMarc Zyngier { 2560d5df9dc9SMarc Zyngier u64 psz = SZ_64K; 2561d5df9dc9SMarc Zyngier 2562d5df9dc9SMarc Zyngier while (psz) { 2563d5df9dc9SMarc Zyngier u64 val, gpsz; 2564d5df9dc9SMarc Zyngier 2565d5df9dc9SMarc Zyngier val = its_read_baser(its, baser); 2566d5df9dc9SMarc Zyngier val &= ~GITS_BASER_PAGE_SIZE_MASK; 2567d5df9dc9SMarc Zyngier 2568d5df9dc9SMarc Zyngier switch (psz) { 2569d5df9dc9SMarc Zyngier case SZ_64K: 2570d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_64K; 2571d5df9dc9SMarc Zyngier break; 2572d5df9dc9SMarc Zyngier case SZ_16K: 2573d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_16K; 2574d5df9dc9SMarc Zyngier break; 2575d5df9dc9SMarc Zyngier case SZ_4K: 2576d5df9dc9SMarc Zyngier default: 2577d5df9dc9SMarc Zyngier gpsz = GITS_BASER_PAGE_SIZE_4K; 2578d5df9dc9SMarc Zyngier break; 2579d5df9dc9SMarc Zyngier } 2580d5df9dc9SMarc Zyngier 2581d5df9dc9SMarc Zyngier gpsz >>= GITS_BASER_PAGE_SIZE_SHIFT; 2582d5df9dc9SMarc Zyngier 2583d5df9dc9SMarc Zyngier val |= FIELD_PREP(GITS_BASER_PAGE_SIZE_MASK, gpsz); 2584d5df9dc9SMarc Zyngier its_write_baser(its, baser, val); 2585d5df9dc9SMarc Zyngier 2586d5df9dc9SMarc Zyngier if (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser->val) == gpsz) 2587d5df9dc9SMarc Zyngier break; 2588d5df9dc9SMarc Zyngier 2589d5df9dc9SMarc Zyngier switch (psz) { 2590d5df9dc9SMarc Zyngier case SZ_64K: 2591d5df9dc9SMarc Zyngier psz = SZ_16K; 2592d5df9dc9SMarc Zyngier break; 2593d5df9dc9SMarc Zyngier case SZ_16K: 2594d5df9dc9SMarc Zyngier psz = SZ_4K; 2595d5df9dc9SMarc Zyngier break; 2596d5df9dc9SMarc Zyngier case SZ_4K: 2597d5df9dc9SMarc Zyngier default: 2598d5df9dc9SMarc Zyngier return -1; 2599d5df9dc9SMarc Zyngier } 2600d5df9dc9SMarc Zyngier } 2601d5df9dc9SMarc Zyngier 2602d5df9dc9SMarc Zyngier baser->psz = psz; 2603d5df9dc9SMarc Zyngier return 0; 2604d5df9dc9SMarc Zyngier } 2605d5df9dc9SMarc Zyngier 26060e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 26071ac19ca6SMarc Zyngier { 26081ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 26092fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 26109347359aSShanker Donthineni int err, i; 261194100970SRobert Richter 2612fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 2613fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 26149347359aSShanker Donthineni cache = GITS_BASER_nCnB; 2615466b7d16SShanker Donthineni 26161ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 26172d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 26182d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 26191ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 26203faf24eaSShanker Donthineni bool indirect = false; 2621d5df9dc9SMarc Zyngier u32 order; 26221ac19ca6SMarc Zyngier 2623d5df9dc9SMarc Zyngier if (type == GITS_BASER_TYPE_NONE) 26241ac19ca6SMarc Zyngier continue; 26251ac19ca6SMarc Zyngier 2626d5df9dc9SMarc Zyngier if (its_probe_baser_psz(its, baser)) { 2627d5df9dc9SMarc Zyngier its_free_tables(its); 2628d5df9dc9SMarc Zyngier return -ENXIO; 2629d5df9dc9SMarc Zyngier } 2630d5df9dc9SMarc Zyngier 2631d5df9dc9SMarc Zyngier order = get_order(baser->psz); 2632d5df9dc9SMarc Zyngier 2633d5df9dc9SMarc Zyngier switch (type) { 26344cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 2635d5df9dc9SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, &order, 2636576a8342SMarc Zyngier device_ids(its)); 26378d565748SZenghui Yu break; 26388d565748SZenghui Yu 26394cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 26405e516846SMarc Zyngier if (is_v4_1(its)) { 26415e516846SMarc Zyngier struct its_node *sibling; 26425e516846SMarc Zyngier 26435e516846SMarc Zyngier WARN_ON(i != 2); 26445e516846SMarc Zyngier if ((sibling = find_sibling_its(its))) { 26455e516846SMarc Zyngier *baser = sibling->tables[2]; 26465e516846SMarc Zyngier its_write_baser(its, baser, baser->val); 26475e516846SMarc Zyngier continue; 26485e516846SMarc Zyngier } 26495e516846SMarc Zyngier } 26505e516846SMarc Zyngier 2651d5df9dc9SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, &order, 265232bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 26534cacac57SMarc Zyngier break; 26544cacac57SMarc Zyngier } 2655f54b97edSMarc Zyngier 2656d5df9dc9SMarc Zyngier err = its_setup_baser(its, baser, cache, shr, order, indirect); 26579347359aSShanker Donthineni if (err < 0) { 26589347359aSShanker Donthineni its_free_tables(its); 26599347359aSShanker Donthineni return err; 266030f21363SRobert Richter } 266130f21363SRobert Richter 26629347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 26639347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 26649347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 26651ac19ca6SMarc Zyngier } 26661ac19ca6SMarc Zyngier 26671ac19ca6SMarc Zyngier return 0; 26681ac19ca6SMarc Zyngier } 26691ac19ca6SMarc Zyngier 26705e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_its(void) 26715e516846SMarc Zyngier { 26725e516846SMarc Zyngier struct its_node *its; 26735e516846SMarc Zyngier u64 val; 26745e516846SMarc Zyngier u32 aff; 26755e516846SMarc Zyngier 26765e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 26775e516846SMarc Zyngier aff = compute_common_aff(val); 26785e516846SMarc Zyngier 26795e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 26805e516846SMarc Zyngier u64 baser, addr; 26815e516846SMarc Zyngier 26825e516846SMarc Zyngier if (!is_v4_1(its)) 26835e516846SMarc Zyngier continue; 26845e516846SMarc Zyngier 26855e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 26865e516846SMarc Zyngier continue; 26875e516846SMarc Zyngier 26885e516846SMarc Zyngier if (aff != compute_its_aff(its)) 26895e516846SMarc Zyngier continue; 26905e516846SMarc Zyngier 26915e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 26925e516846SMarc Zyngier baser = its->tables[2].val; 26935e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 26945e516846SMarc Zyngier continue; 26955e516846SMarc Zyngier 26965e516846SMarc Zyngier /* We have a winner! */ 26978b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = its->tables[2].base; 26988b718d40SZenghui Yu 26995e516846SMarc Zyngier val = GICR_VPROPBASER_4_1_VALID; 27005e516846SMarc Zyngier if (baser & GITS_BASER_INDIRECT) 27015e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 27025e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, 27035e516846SMarc Zyngier FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)); 27045e516846SMarc Zyngier switch (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)) { 27055e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 27065e516846SMarc Zyngier addr = GITS_BASER_ADDR_48_to_52(baser); 27075e516846SMarc Zyngier break; 27085e516846SMarc Zyngier default: 27095e516846SMarc Zyngier addr = baser & GENMASK_ULL(47, 12); 27105e516846SMarc Zyngier break; 27115e516846SMarc Zyngier } 27125e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, addr >> 12); 27135e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_SHAREABILITY_MASK, 27145e516846SMarc Zyngier FIELD_GET(GITS_BASER_SHAREABILITY_MASK, baser)); 27155e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_INNER_CACHEABILITY_MASK, 27165e516846SMarc Zyngier FIELD_GET(GITS_BASER_INNER_CACHEABILITY_MASK, baser)); 27175e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, GITS_BASER_NR_PAGES(baser) - 1); 27185e516846SMarc Zyngier 27195e516846SMarc Zyngier return val; 27205e516846SMarc Zyngier } 27215e516846SMarc Zyngier 27225e516846SMarc Zyngier return 0; 27235e516846SMarc Zyngier } 27245e516846SMarc Zyngier 27255e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_rd(cpumask_t **mask) 27265e516846SMarc Zyngier { 27275e516846SMarc Zyngier u32 aff; 27285e516846SMarc Zyngier u64 val; 27295e516846SMarc Zyngier int cpu; 27305e516846SMarc Zyngier 27315e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 27325e516846SMarc Zyngier aff = compute_common_aff(val); 27335e516846SMarc Zyngier 27345e516846SMarc Zyngier for_each_possible_cpu(cpu) { 27355e516846SMarc Zyngier void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 27365e516846SMarc Zyngier 27375e516846SMarc Zyngier if (!base || cpu == smp_processor_id()) 27385e516846SMarc Zyngier continue; 27395e516846SMarc Zyngier 27405e516846SMarc Zyngier val = gic_read_typer(base + GICR_TYPER); 27414bccf1d7SZenghui Yu if (aff != compute_common_aff(val)) 27425e516846SMarc Zyngier continue; 27435e516846SMarc Zyngier 27445e516846SMarc Zyngier /* 27455e516846SMarc Zyngier * At this point, we have a victim. This particular CPU 27465e516846SMarc Zyngier * has already booted, and has an affinity that matches 27475e516846SMarc Zyngier * ours wrt CommonLPIAff. Let's use its own VPROPBASER. 27485e516846SMarc Zyngier * Make sure we don't write the Z bit in that case. 27495e516846SMarc Zyngier */ 27505186a6ccSZenghui Yu val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 27515e516846SMarc Zyngier val &= ~GICR_VPROPBASER_4_1_Z; 27525e516846SMarc Zyngier 27538b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = gic_data_rdist_cpu(cpu)->vpe_l1_base; 27545e516846SMarc Zyngier *mask = gic_data_rdist_cpu(cpu)->vpe_table_mask; 27555e516846SMarc Zyngier 27565e516846SMarc Zyngier return val; 27575e516846SMarc Zyngier } 27585e516846SMarc Zyngier 27595e516846SMarc Zyngier return 0; 27605e516846SMarc Zyngier } 27615e516846SMarc Zyngier 27624e6437f1SZenghui Yu static bool allocate_vpe_l2_table(int cpu, u32 id) 27634e6437f1SZenghui Yu { 27644e6437f1SZenghui Yu void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 2765490d332eSMarc Zyngier unsigned int psz, esz, idx, npg, gpsz; 2766490d332eSMarc Zyngier u64 val; 27674e6437f1SZenghui Yu struct page *page; 27684e6437f1SZenghui Yu __le64 *table; 27694e6437f1SZenghui Yu 27704e6437f1SZenghui Yu if (!gic_rdists->has_rvpeid) 27714e6437f1SZenghui Yu return true; 27724e6437f1SZenghui Yu 277328d160deSMarc Zyngier /* Skip non-present CPUs */ 277428d160deSMarc Zyngier if (!base) 277528d160deSMarc Zyngier return true; 277628d160deSMarc Zyngier 27775186a6ccSZenghui Yu val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 27784e6437f1SZenghui Yu 27794e6437f1SZenghui Yu esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val) + 1; 27804e6437f1SZenghui Yu gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 27814e6437f1SZenghui Yu npg = FIELD_GET(GICR_VPROPBASER_4_1_SIZE, val) + 1; 27824e6437f1SZenghui Yu 27834e6437f1SZenghui Yu switch (gpsz) { 27844e6437f1SZenghui Yu default: 27854e6437f1SZenghui Yu WARN_ON(1); 2786df561f66SGustavo A. R. Silva fallthrough; 27874e6437f1SZenghui Yu case GIC_PAGE_SIZE_4K: 27884e6437f1SZenghui Yu psz = SZ_4K; 27894e6437f1SZenghui Yu break; 27904e6437f1SZenghui Yu case GIC_PAGE_SIZE_16K: 27914e6437f1SZenghui Yu psz = SZ_16K; 27924e6437f1SZenghui Yu break; 27934e6437f1SZenghui Yu case GIC_PAGE_SIZE_64K: 27944e6437f1SZenghui Yu psz = SZ_64K; 27954e6437f1SZenghui Yu break; 27964e6437f1SZenghui Yu } 27974e6437f1SZenghui Yu 27984e6437f1SZenghui Yu /* Don't allow vpe_id that exceeds single, flat table limit */ 27994e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_4_1_INDIRECT)) 28004e6437f1SZenghui Yu return (id < (npg * psz / (esz * SZ_8))); 28014e6437f1SZenghui Yu 28024e6437f1SZenghui Yu /* Compute 1st level table index & check if that exceeds table limit */ 28034e6437f1SZenghui Yu idx = id >> ilog2(psz / (esz * SZ_8)); 28044e6437f1SZenghui Yu if (idx >= (npg * psz / GITS_LVL1_ENTRY_SIZE)) 28054e6437f1SZenghui Yu return false; 28064e6437f1SZenghui Yu 28074e6437f1SZenghui Yu table = gic_data_rdist_cpu(cpu)->vpe_l1_base; 28084e6437f1SZenghui Yu 28094e6437f1SZenghui Yu /* Allocate memory for 2nd level table */ 28104e6437f1SZenghui Yu if (!table[idx]) { 28114e6437f1SZenghui Yu page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(psz)); 28124e6437f1SZenghui Yu if (!page) 28134e6437f1SZenghui Yu return false; 28144e6437f1SZenghui Yu 28154e6437f1SZenghui Yu /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 28164e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_SHAREABILITY_MASK)) 28174e6437f1SZenghui Yu gic_flush_dcache_to_poc(page_address(page), psz); 28184e6437f1SZenghui Yu 28194e6437f1SZenghui Yu table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 28204e6437f1SZenghui Yu 28214e6437f1SZenghui Yu /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 28224e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_SHAREABILITY_MASK)) 28234e6437f1SZenghui Yu gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 28244e6437f1SZenghui Yu 28254e6437f1SZenghui Yu /* Ensure updated table contents are visible to RD hardware */ 28264e6437f1SZenghui Yu dsb(sy); 28274e6437f1SZenghui Yu } 28284e6437f1SZenghui Yu 28294e6437f1SZenghui Yu return true; 28304e6437f1SZenghui Yu } 28314e6437f1SZenghui Yu 28325e516846SMarc Zyngier static int allocate_vpe_l1_table(void) 28335e516846SMarc Zyngier { 28345e516846SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 28355e516846SMarc Zyngier u64 val, gpsz, npg, pa; 28365e516846SMarc Zyngier unsigned int psz = SZ_64K; 28375e516846SMarc Zyngier unsigned int np, epp, esz; 28385e516846SMarc Zyngier struct page *page; 28395e516846SMarc Zyngier 28405e516846SMarc Zyngier if (!gic_rdists->has_rvpeid) 28415e516846SMarc Zyngier return 0; 28425e516846SMarc Zyngier 28435e516846SMarc Zyngier /* 28445e516846SMarc Zyngier * if VPENDBASER.Valid is set, disable any previously programmed 28455e516846SMarc Zyngier * VPE by setting PendingLast while clearing Valid. This has the 28465e516846SMarc Zyngier * effect of making sure no doorbell will be generated and we can 28475e516846SMarc Zyngier * then safely clear VPROPBASER.Valid. 28485e516846SMarc Zyngier */ 28495186a6ccSZenghui Yu if (gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER) & GICR_VPENDBASER_Valid) 28505186a6ccSZenghui Yu gicr_write_vpendbaser(GICR_VPENDBASER_PendingLast, 28515e516846SMarc Zyngier vlpi_base + GICR_VPENDBASER); 28525e516846SMarc Zyngier 28535e516846SMarc Zyngier /* 28545e516846SMarc Zyngier * If we can inherit the configuration from another RD, let's do 28555e516846SMarc Zyngier * so. Otherwise, we have to go through the allocation process. We 28565e516846SMarc Zyngier * assume that all RDs have the exact same requirements, as 28575e516846SMarc Zyngier * nothing will work otherwise. 28585e516846SMarc Zyngier */ 28595e516846SMarc Zyngier val = inherit_vpe_l1_table_from_rd(&gic_data_rdist()->vpe_table_mask); 28605e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 28615e516846SMarc Zyngier goto out; 28625e516846SMarc Zyngier 2863d1bd7e0bSZenghui Yu gic_data_rdist()->vpe_table_mask = kzalloc(sizeof(cpumask_t), GFP_ATOMIC); 28645e516846SMarc Zyngier if (!gic_data_rdist()->vpe_table_mask) 28655e516846SMarc Zyngier return -ENOMEM; 28665e516846SMarc Zyngier 28675e516846SMarc Zyngier val = inherit_vpe_l1_table_from_its(); 28685e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 28695e516846SMarc Zyngier goto out; 28705e516846SMarc Zyngier 28715e516846SMarc Zyngier /* First probe the page size */ 28725e516846SMarc Zyngier val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K); 28735186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 28745186a6ccSZenghui Yu val = gicr_read_vpropbaser(vlpi_base + GICR_VPROPBASER); 28755e516846SMarc Zyngier gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 28765e516846SMarc Zyngier esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val); 28775e516846SMarc Zyngier 28785e516846SMarc Zyngier switch (gpsz) { 28795e516846SMarc Zyngier default: 28805e516846SMarc Zyngier gpsz = GIC_PAGE_SIZE_4K; 2881df561f66SGustavo A. R. Silva fallthrough; 28825e516846SMarc Zyngier case GIC_PAGE_SIZE_4K: 28835e516846SMarc Zyngier psz = SZ_4K; 28845e516846SMarc Zyngier break; 28855e516846SMarc Zyngier case GIC_PAGE_SIZE_16K: 28865e516846SMarc Zyngier psz = SZ_16K; 28875e516846SMarc Zyngier break; 28885e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 28895e516846SMarc Zyngier psz = SZ_64K; 28905e516846SMarc Zyngier break; 28915e516846SMarc Zyngier } 28925e516846SMarc Zyngier 28935e516846SMarc Zyngier /* 28945e516846SMarc Zyngier * Start populating the register from scratch, including RO fields 28955e516846SMarc Zyngier * (which we want to print in debug cases...) 28965e516846SMarc Zyngier */ 28975e516846SMarc Zyngier val = 0; 28985e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, gpsz); 28995e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ENTRY_SIZE, esz); 29005e516846SMarc Zyngier 29015e516846SMarc Zyngier /* How many entries per GIC page? */ 29025e516846SMarc Zyngier esz++; 29035e516846SMarc Zyngier epp = psz / (esz * SZ_8); 29045e516846SMarc Zyngier 29055e516846SMarc Zyngier /* 29065e516846SMarc Zyngier * If we need more than just a single L1 page, flag the table 29075e516846SMarc Zyngier * as indirect and compute the number of required L1 pages. 29085e516846SMarc Zyngier */ 29095e516846SMarc Zyngier if (epp < ITS_MAX_VPEID) { 29105e516846SMarc Zyngier int nl2; 29115e516846SMarc Zyngier 29125e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 29135e516846SMarc Zyngier 29145e516846SMarc Zyngier /* Number of L2 pages required to cover the VPEID space */ 29155e516846SMarc Zyngier nl2 = DIV_ROUND_UP(ITS_MAX_VPEID, epp); 29165e516846SMarc Zyngier 29175e516846SMarc Zyngier /* Number of L1 pages to point to the L2 pages */ 29185e516846SMarc Zyngier npg = DIV_ROUND_UP(nl2 * SZ_8, psz); 29195e516846SMarc Zyngier } else { 29205e516846SMarc Zyngier npg = 1; 29215e516846SMarc Zyngier } 29225e516846SMarc Zyngier 2923e88bd316SZenghui Yu val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1); 29245e516846SMarc Zyngier 29255e516846SMarc Zyngier /* Right, that's the number of CPU pages we need for L1 */ 29265e516846SMarc Zyngier np = DIV_ROUND_UP(npg * psz, PAGE_SIZE); 29275e516846SMarc Zyngier 29285e516846SMarc Zyngier pr_debug("np = %d, npg = %lld, psz = %d, epp = %d, esz = %d\n", 29295e516846SMarc Zyngier np, npg, psz, epp, esz); 2930d1bd7e0bSZenghui Yu page = alloc_pages(GFP_ATOMIC | __GFP_ZERO, get_order(np * PAGE_SIZE)); 29315e516846SMarc Zyngier if (!page) 29325e516846SMarc Zyngier return -ENOMEM; 29335e516846SMarc Zyngier 29348b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = page_address(page); 29355e516846SMarc Zyngier pa = virt_to_phys(page_address(page)); 29365e516846SMarc Zyngier WARN_ON(!IS_ALIGNED(pa, psz)); 29375e516846SMarc Zyngier 29385e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, pa >> 12); 29395e516846SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 29405e516846SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 29415e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_Z; 29425e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_VALID; 29435e516846SMarc Zyngier 29445e516846SMarc Zyngier out: 29455186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 29465e516846SMarc Zyngier cpumask_set_cpu(smp_processor_id(), gic_data_rdist()->vpe_table_mask); 29475e516846SMarc Zyngier 29485e516846SMarc Zyngier pr_debug("CPU%d: VPROPBASER = %llx %*pbl\n", 29495e516846SMarc Zyngier smp_processor_id(), val, 29505e516846SMarc Zyngier cpumask_pr_args(gic_data_rdist()->vpe_table_mask)); 29515e516846SMarc Zyngier 29525e516846SMarc Zyngier return 0; 29535e516846SMarc Zyngier } 29545e516846SMarc Zyngier 29551ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 29561ac19ca6SMarc Zyngier { 295783559b47SMarc Zyngier int i; 295883559b47SMarc Zyngier 29596396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 29601ac19ca6SMarc Zyngier GFP_KERNEL); 29611ac19ca6SMarc Zyngier if (!its->collections) 29621ac19ca6SMarc Zyngier return -ENOMEM; 29631ac19ca6SMarc Zyngier 296483559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 296583559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 296683559b47SMarc Zyngier 29671ac19ca6SMarc Zyngier return 0; 29681ac19ca6SMarc Zyngier } 29691ac19ca6SMarc Zyngier 29707c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 29717c297a2dSMarc Zyngier { 29727c297a2dSMarc Zyngier struct page *pend_page; 2973adaab500SMarc Zyngier 29747c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 2975adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 29767c297a2dSMarc Zyngier if (!pend_page) 29777c297a2dSMarc Zyngier return NULL; 29787c297a2dSMarc Zyngier 29797c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 29807c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 29817c297a2dSMarc Zyngier 29827c297a2dSMarc Zyngier return pend_page; 29837c297a2dSMarc Zyngier } 29847c297a2dSMarc Zyngier 29857d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 29867d75bbb4SMarc Zyngier { 2987adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 29887d75bbb4SMarc Zyngier } 29897d75bbb4SMarc Zyngier 2990c6e2ccb6SMarc Zyngier /* 29915e2c9f9aSMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. Any other 29925e2c9f9aSMarc Zyngier * case is wrong in the absence of firmware/EFI support. 2993c6e2ccb6SMarc Zyngier */ 2994c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 2995c440a9d9SMarc Zyngier { 29965e2c9f9aSMarc Zyngier phys_addr_t addr; 29975e2c9f9aSMarc Zyngier u64 val; 2998c6e2ccb6SMarc Zyngier 29995e2c9f9aSMarc Zyngier /* Check whether the property table is in a reserved region */ 30005e2c9f9aSMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 30015e2c9f9aSMarc Zyngier addr = val & GENMASK_ULL(51, 12); 30025e2c9f9aSMarc Zyngier 30035e2c9f9aSMarc Zyngier return gic_check_reserved_range(addr, LPI_PROPBASE_SZ); 3004c440a9d9SMarc Zyngier } 3005c440a9d9SMarc Zyngier 300611e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 300711e37d35SMarc Zyngier { 3008c440a9d9SMarc Zyngier u64 val; 300911e37d35SMarc Zyngier int err, cpu; 301011e37d35SMarc Zyngier 3011c440a9d9SMarc Zyngier /* 3012c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 3013c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 3014c440a9d9SMarc Zyngier */ 3015c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 3016c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 3017c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 3018c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 3019c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 3020c440a9d9SMarc Zyngier } 3021c440a9d9SMarc Zyngier 302211e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 302311e37d35SMarc Zyngier if (err) 302411e37d35SMarc Zyngier return err; 302511e37d35SMarc Zyngier 302611e37d35SMarc Zyngier /* 302711e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 302811e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 302911e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 303011e37d35SMarc Zyngier */ 303111e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 303211e37d35SMarc Zyngier struct page *pend_page; 303311e37d35SMarc Zyngier 303411e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 303511e37d35SMarc Zyngier if (!pend_page) { 303611e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 303711e37d35SMarc Zyngier return -ENOMEM; 303811e37d35SMarc Zyngier } 303911e37d35SMarc Zyngier 304011e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 304111e37d35SMarc Zyngier } 304211e37d35SMarc Zyngier 304311e37d35SMarc Zyngier return 0; 304411e37d35SMarc Zyngier } 304511e37d35SMarc Zyngier 3046af27e416SMarc Zyngier static u64 read_vpend_dirty_clear(void __iomem *vlpi_base) 30476479450fSHeyi Guo { 30486479450fSHeyi Guo u32 count = 1000000; /* 1s! */ 30496479450fSHeyi Guo bool clean; 30506479450fSHeyi Guo u64 val; 30516479450fSHeyi Guo 30526479450fSHeyi Guo do { 30535186a6ccSZenghui Yu val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 30546479450fSHeyi Guo clean = !(val & GICR_VPENDBASER_Dirty); 30556479450fSHeyi Guo if (!clean) { 30566479450fSHeyi Guo count--; 30576479450fSHeyi Guo cpu_relax(); 30586479450fSHeyi Guo udelay(1); 30596479450fSHeyi Guo } 30606479450fSHeyi Guo } while (!clean && count); 30616479450fSHeyi Guo 3062af27e416SMarc Zyngier if (unlikely(!clean)) 3063e64fab1aSMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 3064af27e416SMarc Zyngier 3065af27e416SMarc Zyngier return val; 3066e64fab1aSMarc Zyngier } 3067e64fab1aSMarc Zyngier 3068af27e416SMarc Zyngier static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set) 3069af27e416SMarc Zyngier { 3070af27e416SMarc Zyngier u64 val; 3071af27e416SMarc Zyngier 3072af27e416SMarc Zyngier /* Make sure we wait until the RD is done with the initial scan */ 3073af27e416SMarc Zyngier val = read_vpend_dirty_clear(vlpi_base); 3074af27e416SMarc Zyngier val &= ~GICR_VPENDBASER_Valid; 3075af27e416SMarc Zyngier val &= ~clr; 3076af27e416SMarc Zyngier val |= set; 3077af27e416SMarc Zyngier gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 3078af27e416SMarc Zyngier 3079af27e416SMarc Zyngier val = read_vpend_dirty_clear(vlpi_base); 3080af27e416SMarc Zyngier if (unlikely(val & GICR_VPENDBASER_Dirty)) 3081af27e416SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 3082af27e416SMarc Zyngier 30836479450fSHeyi Guo return val; 30846479450fSHeyi Guo } 30856479450fSHeyi Guo 30861ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 30871ac19ca6SMarc Zyngier { 30881ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 30891ac19ca6SMarc Zyngier struct page *pend_page; 309011e37d35SMarc Zyngier phys_addr_t paddr; 30911ac19ca6SMarc Zyngier u64 val, tmp; 30921ac19ca6SMarc Zyngier 3093c0cdc890SValentin Schneider if (gic_data_rdist()->flags & RD_LOCAL_LPI_ENABLED) 30941ac19ca6SMarc Zyngier return; 30951ac19ca6SMarc Zyngier 3096c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 3097c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 3098c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 3099f842ca8eSMarc Zyngier /* 3100f842ca8eSMarc Zyngier * Check that we get the same property table on all 3101f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 3102f842ca8eSMarc Zyngier */ 3103f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 3104f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 3105f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 3106f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 3107f842ca8eSMarc Zyngier 3108c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 3109c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 3110c440a9d9SMarc Zyngier 31115e2c9f9aSMarc Zyngier WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ)); 3112d23bc2bcSValentin Schneider gic_data_rdist()->flags |= RD_LOCAL_PENDTABLE_PREALLOCATED; 3113c440a9d9SMarc Zyngier 3114c440a9d9SMarc Zyngier goto out; 3115c440a9d9SMarc Zyngier } 3116c440a9d9SMarc Zyngier 311711e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 31181ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 31191ac19ca6SMarc Zyngier 31201ac19ca6SMarc Zyngier /* set PROPBASE */ 3121e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 31221ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 31232fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 31241ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 31251ac19ca6SMarc Zyngier 31260968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 31270968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 31281ac19ca6SMarc Zyngier 3129a8707f55SSebastian Reichel if (gic_rdists->flags & RDIST_FLAGS_FORCE_NON_SHAREABLE) 3130a8707f55SSebastian Reichel tmp &= ~GICR_PROPBASER_SHAREABILITY_MASK; 3131a8707f55SSebastian Reichel 31321ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 3133241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 3134241a386cSMarc Zyngier /* 3135241a386cSMarc Zyngier * The HW reports non-shareable, we must 3136241a386cSMarc Zyngier * remove the cacheability attributes as 3137241a386cSMarc Zyngier * well. 3138241a386cSMarc Zyngier */ 3139241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 3140241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 3141241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 31420968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 3143241a386cSMarc Zyngier } 31441ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 31451ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 31461ac19ca6SMarc Zyngier } 31471ac19ca6SMarc Zyngier 31481ac19ca6SMarc Zyngier /* set PENDBASE */ 31491ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 31504ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 31512fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 31521ac19ca6SMarc Zyngier 31530968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 31540968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 3155241a386cSMarc Zyngier 3156a8707f55SSebastian Reichel if (gic_rdists->flags & RDIST_FLAGS_FORCE_NON_SHAREABLE) 3157a8707f55SSebastian Reichel tmp &= ~GICR_PENDBASER_SHAREABILITY_MASK; 3158a8707f55SSebastian Reichel 3159241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 3160241a386cSMarc Zyngier /* 3161241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 3162241a386cSMarc Zyngier * cacheability attributes as well. 3163241a386cSMarc Zyngier */ 3164241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 3165241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 3166241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 31670968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 3168241a386cSMarc Zyngier } 31691ac19ca6SMarc Zyngier 31701ac19ca6SMarc Zyngier /* Enable LPIs */ 31711ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 31721ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 31731ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 31741ac19ca6SMarc Zyngier 31755e516846SMarc Zyngier if (gic_rdists->has_vlpis && !gic_rdists->has_rvpeid) { 31766479450fSHeyi Guo void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 31776479450fSHeyi Guo 31786479450fSHeyi Guo /* 31796479450fSHeyi Guo * It's possible for CPU to receive VLPIs before it is 3180a359f757SIngo Molnar * scheduled as a vPE, especially for the first CPU, and the 31816479450fSHeyi Guo * VLPI with INTID larger than 2^(IDbits+1) will be considered 31826479450fSHeyi Guo * as out of range and dropped by GIC. 31836479450fSHeyi Guo * So we initialize IDbits to known value to avoid VLPI drop. 31846479450fSHeyi Guo */ 31856479450fSHeyi Guo val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 31866479450fSHeyi Guo pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n", 31876479450fSHeyi Guo smp_processor_id(), val); 31885186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 31896479450fSHeyi Guo 31906479450fSHeyi Guo /* 31916479450fSHeyi Guo * Also clear Valid bit of GICR_VPENDBASER, in case some 31926479450fSHeyi Guo * ancient programming gets left in and has possibility of 31936479450fSHeyi Guo * corrupting memory. 31946479450fSHeyi Guo */ 3195e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 31966479450fSHeyi Guo } 31976479450fSHeyi Guo 31985e516846SMarc Zyngier if (allocate_vpe_l1_table()) { 31995e516846SMarc Zyngier /* 32005e516846SMarc Zyngier * If the allocation has failed, we're in massive trouble. 32015e516846SMarc Zyngier * Disable direct injection, and pray that no VM was 32025e516846SMarc Zyngier * already running... 32035e516846SMarc Zyngier */ 32045e516846SMarc Zyngier gic_rdists->has_rvpeid = false; 32055e516846SMarc Zyngier gic_rdists->has_vlpis = false; 32065e516846SMarc Zyngier } 32075e516846SMarc Zyngier 32081ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 32091ac19ca6SMarc Zyngier dsb(sy); 3210c440a9d9SMarc Zyngier out: 3211c0cdc890SValentin Schneider gic_data_rdist()->flags |= RD_LOCAL_LPI_ENABLED; 3212c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 321311e37d35SMarc Zyngier smp_processor_id(), 3214d23bc2bcSValentin Schneider gic_data_rdist()->flags & RD_LOCAL_PENDTABLE_PREALLOCATED ? 3215d23bc2bcSValentin Schneider "reserved" : "allocated", 321611e37d35SMarc Zyngier &paddr); 32171ac19ca6SMarc Zyngier } 32181ac19ca6SMarc Zyngier 3219920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 32201ac19ca6SMarc Zyngier { 3221920181ceSDerek Basehore int cpu = smp_processor_id(); 32221ac19ca6SMarc Zyngier u64 target; 32231ac19ca6SMarc Zyngier 3224fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 3225fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 3226fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 3227fbf8f40eSGanapatrao Kulkarni 3228fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 3229fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 3230fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 3231920181ceSDerek Basehore return; 3232fbf8f40eSGanapatrao Kulkarni } 3233fbf8f40eSGanapatrao Kulkarni 32341ac19ca6SMarc Zyngier /* 32351ac19ca6SMarc Zyngier * We now have to bind each collection to its target 32361ac19ca6SMarc Zyngier * redistributor. 32371ac19ca6SMarc Zyngier */ 3238589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 32391ac19ca6SMarc Zyngier /* 32401ac19ca6SMarc Zyngier * This ITS wants the physical address of the 32411ac19ca6SMarc Zyngier * redistributor. 32421ac19ca6SMarc Zyngier */ 32431ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 32441ac19ca6SMarc Zyngier } else { 3245920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 3246589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 3247263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 32481ac19ca6SMarc Zyngier } 32491ac19ca6SMarc Zyngier 32501ac19ca6SMarc Zyngier /* Perform collection mapping */ 32511ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 32521ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 32531ac19ca6SMarc Zyngier 32541ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 32551ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 32561ac19ca6SMarc Zyngier } 32571ac19ca6SMarc Zyngier 3258920181ceSDerek Basehore static void its_cpu_init_collections(void) 3259920181ceSDerek Basehore { 3260920181ceSDerek Basehore struct its_node *its; 3261920181ceSDerek Basehore 3262a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3263920181ceSDerek Basehore 3264920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 3265920181ceSDerek Basehore its_cpu_init_collection(its); 3266920181ceSDerek Basehore 3267a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 32681ac19ca6SMarc Zyngier } 326984a6a2e7SMarc Zyngier 327084a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 327184a6a2e7SMarc Zyngier { 327284a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 32733e39e8f5SMarc Zyngier unsigned long flags; 327484a6a2e7SMarc Zyngier 32753e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 327684a6a2e7SMarc Zyngier 327784a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 327884a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 327984a6a2e7SMarc Zyngier its_dev = tmp; 328084a6a2e7SMarc Zyngier break; 328184a6a2e7SMarc Zyngier } 328284a6a2e7SMarc Zyngier } 328384a6a2e7SMarc Zyngier 32843e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 328584a6a2e7SMarc Zyngier 328684a6a2e7SMarc Zyngier return its_dev; 328784a6a2e7SMarc Zyngier } 328884a6a2e7SMarc Zyngier 3289466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 3290466b7d16SShanker Donthineni { 3291466b7d16SShanker Donthineni int i; 3292466b7d16SShanker Donthineni 3293466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3294466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 3295466b7d16SShanker Donthineni return &its->tables[i]; 3296466b7d16SShanker Donthineni } 3297466b7d16SShanker Donthineni 3298466b7d16SShanker Donthineni return NULL; 3299466b7d16SShanker Donthineni } 3300466b7d16SShanker Donthineni 3301539d3782SShanker Donthineni static bool its_alloc_table_entry(struct its_node *its, 3302539d3782SShanker Donthineni struct its_baser *baser, u32 id) 33033faf24eaSShanker Donthineni { 33043faf24eaSShanker Donthineni struct page *page; 33053faf24eaSShanker Donthineni u32 esz, idx; 33063faf24eaSShanker Donthineni __le64 *table; 33073faf24eaSShanker Donthineni 33083faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 33093faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 33103faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 331170cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 33123faf24eaSShanker Donthineni 33133faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 331470cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 33153faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 33163faf24eaSShanker Donthineni return false; 33173faf24eaSShanker Donthineni 33183faf24eaSShanker Donthineni table = baser->base; 33193faf24eaSShanker Donthineni 33203faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 33213faf24eaSShanker Donthineni if (!table[idx]) { 3322539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 3323539d3782SShanker Donthineni get_order(baser->psz)); 33243faf24eaSShanker Donthineni if (!page) 33253faf24eaSShanker Donthineni return false; 33263faf24eaSShanker Donthineni 33273faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 33283faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 3329328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 33303faf24eaSShanker Donthineni 33313faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 33323faf24eaSShanker Donthineni 33333faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 33343faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 3335328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 33363faf24eaSShanker Donthineni 33373faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 33383faf24eaSShanker Donthineni dsb(sy); 33393faf24eaSShanker Donthineni } 33403faf24eaSShanker Donthineni 33413faf24eaSShanker Donthineni return true; 33423faf24eaSShanker Donthineni } 33433faf24eaSShanker Donthineni 334470cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 334570cc81edSMarc Zyngier { 334670cc81edSMarc Zyngier struct its_baser *baser; 334770cc81edSMarc Zyngier 334870cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 334970cc81edSMarc Zyngier 335070cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 335170cc81edSMarc Zyngier if (!baser) 3352576a8342SMarc Zyngier return (ilog2(dev_id) < device_ids(its)); 335370cc81edSMarc Zyngier 3354539d3782SShanker Donthineni return its_alloc_table_entry(its, baser, dev_id); 335570cc81edSMarc Zyngier } 335670cc81edSMarc Zyngier 33577d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 33587d75bbb4SMarc Zyngier { 33597d75bbb4SMarc Zyngier struct its_node *its; 33604e6437f1SZenghui Yu int cpu; 33617d75bbb4SMarc Zyngier 33627d75bbb4SMarc Zyngier /* 33637d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 33647d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 33657d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 33667d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 33677d75bbb4SMarc Zyngier * anyway, right?). 33687d75bbb4SMarc Zyngier */ 33697d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 33707d75bbb4SMarc Zyngier struct its_baser *baser; 33717d75bbb4SMarc Zyngier 33720dd57fedSMarc Zyngier if (!is_v4(its)) 33737d75bbb4SMarc Zyngier continue; 33747d75bbb4SMarc Zyngier 33757d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 33767d75bbb4SMarc Zyngier if (!baser) 33777d75bbb4SMarc Zyngier return false; 33787d75bbb4SMarc Zyngier 3379539d3782SShanker Donthineni if (!its_alloc_table_entry(its, baser, vpe_id)) 33807d75bbb4SMarc Zyngier return false; 33817d75bbb4SMarc Zyngier } 33827d75bbb4SMarc Zyngier 33834e6437f1SZenghui Yu /* Non v4.1? No need to iterate RDs and go back early. */ 33844e6437f1SZenghui Yu if (!gic_rdists->has_rvpeid) 33854e6437f1SZenghui Yu return true; 33864e6437f1SZenghui Yu 33874e6437f1SZenghui Yu /* 33884e6437f1SZenghui Yu * Make sure the L2 tables are allocated for all copies of 33894e6437f1SZenghui Yu * the L1 table on *all* v4.1 RDs. 33904e6437f1SZenghui Yu */ 33914e6437f1SZenghui Yu for_each_possible_cpu(cpu) { 33924e6437f1SZenghui Yu if (!allocate_vpe_l2_table(cpu, vpe_id)) 33934e6437f1SZenghui Yu return false; 33944e6437f1SZenghui Yu } 33954e6437f1SZenghui Yu 33967d75bbb4SMarc Zyngier return true; 33977d75bbb4SMarc Zyngier } 33987d75bbb4SMarc Zyngier 339984a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 340093f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 340184a6a2e7SMarc Zyngier { 340284a6a2e7SMarc Zyngier struct its_device *dev; 340393f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 34043e39e8f5SMarc Zyngier unsigned long flags; 3405591e5becSMarc Zyngier u16 *col_map = NULL; 340684a6a2e7SMarc Zyngier void *itt; 340784a6a2e7SMarc Zyngier int lpi_base; 340884a6a2e7SMarc Zyngier int nr_lpis; 3409c8481267SMarc Zyngier int nr_ites; 341084a6a2e7SMarc Zyngier int sz; 341184a6a2e7SMarc Zyngier 34123faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 3413466b7d16SShanker Donthineni return NULL; 3414466b7d16SShanker Donthineni 3415147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 3416147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 3417147c8f37SMarc Zyngier 341884a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 3419c8481267SMarc Zyngier /* 3420147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 3421147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 3422c8481267SMarc Zyngier */ 3423147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 3424ffedbf0cSMarc Zyngier sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); 342584a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 3426539d3782SShanker Donthineni itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); 342793f94ea0SMarc Zyngier if (alloc_lpis) { 342838dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 3429591e5becSMarc Zyngier if (lpi_map) 34306396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 343193f94ea0SMarc Zyngier GFP_KERNEL); 343293f94ea0SMarc Zyngier } else { 34336396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 343493f94ea0SMarc Zyngier nr_lpis = 0; 343593f94ea0SMarc Zyngier lpi_base = 0; 343693f94ea0SMarc Zyngier } 343784a6a2e7SMarc Zyngier 343893f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 343984a6a2e7SMarc Zyngier kfree(dev); 344084a6a2e7SMarc Zyngier kfree(itt); 3441ff5fe886SAndy Shevchenko bitmap_free(lpi_map); 3442591e5becSMarc Zyngier kfree(col_map); 344384a6a2e7SMarc Zyngier return NULL; 344484a6a2e7SMarc Zyngier } 344584a6a2e7SMarc Zyngier 3446328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 34475a9a8915SMarc Zyngier 344884a6a2e7SMarc Zyngier dev->its = its; 344984a6a2e7SMarc Zyngier dev->itt = itt; 3450c8481267SMarc Zyngier dev->nr_ites = nr_ites; 3451591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 3452591e5becSMarc Zyngier dev->event_map.col_map = col_map; 3453591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 3454591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 345511635fa2SMarc Zyngier raw_spin_lock_init(&dev->event_map.vlpi_lock); 345684a6a2e7SMarc Zyngier dev->device_id = dev_id; 345784a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 345884a6a2e7SMarc Zyngier 34593e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 346084a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 34613e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 346284a6a2e7SMarc Zyngier 346384a6a2e7SMarc Zyngier /* Map device to its ITT */ 346484a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 346584a6a2e7SMarc Zyngier 346684a6a2e7SMarc Zyngier return dev; 346784a6a2e7SMarc Zyngier } 346884a6a2e7SMarc Zyngier 346984a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 347084a6a2e7SMarc Zyngier { 34713e39e8f5SMarc Zyngier unsigned long flags; 34723e39e8f5SMarc Zyngier 34733e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 347484a6a2e7SMarc Zyngier list_del(&its_dev->entry); 34753e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 3476898aa5ceSMarc Zyngier kfree(its_dev->event_map.col_map); 347784a6a2e7SMarc Zyngier kfree(its_dev->itt); 347884a6a2e7SMarc Zyngier kfree(its_dev); 347984a6a2e7SMarc Zyngier } 3480b48ac83dSMarc Zyngier 34818208d170SMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) 3482b48ac83dSMarc Zyngier { 3483b48ac83dSMarc Zyngier int idx; 3484b48ac83dSMarc Zyngier 3485342be106SZenghui Yu /* Find a free LPI region in lpi_map and allocate them. */ 34868208d170SMarc Zyngier idx = bitmap_find_free_region(dev->event_map.lpi_map, 34878208d170SMarc Zyngier dev->event_map.nr_lpis, 34888208d170SMarc Zyngier get_count_order(nvecs)); 34898208d170SMarc Zyngier if (idx < 0) 3490b48ac83dSMarc Zyngier return -ENOSPC; 3491b48ac83dSMarc Zyngier 3492591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 3493b48ac83dSMarc Zyngier 3494b48ac83dSMarc Zyngier return 0; 3495b48ac83dSMarc Zyngier } 3496b48ac83dSMarc Zyngier 349754456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 3498b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 3499b48ac83dSMarc Zyngier { 3500b48ac83dSMarc Zyngier struct its_node *its; 3501b48ac83dSMarc Zyngier struct its_device *its_dev; 350254456db9SMarc Zyngier struct msi_domain_info *msi_info; 350354456db9SMarc Zyngier u32 dev_id; 35049791ec7dSMarc Zyngier int err = 0; 3505b48ac83dSMarc Zyngier 350654456db9SMarc Zyngier /* 3507a7c90f51SJulien Grall * We ignore "dev" entirely, and rely on the dev_id that has 350854456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 350954456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 351054456db9SMarc Zyngier * are built on top of the ITS. 351154456db9SMarc Zyngier */ 351254456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 351354456db9SMarc Zyngier 351454456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 351554456db9SMarc Zyngier its = msi_info->data; 351654456db9SMarc Zyngier 351720b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 351820b3d54eSMarc Zyngier vpe_proxy.dev && 351920b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 352020b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 352120b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 352220b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 352320b3d54eSMarc Zyngier dev_id); 352420b3d54eSMarc Zyngier return -EINVAL; 352520b3d54eSMarc Zyngier } 352620b3d54eSMarc Zyngier 35279791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 3528f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 3529e8137f4fSMarc Zyngier if (its_dev) { 3530e8137f4fSMarc Zyngier /* 3531e8137f4fSMarc Zyngier * We already have seen this ID, probably through 3532e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 3533e8137f4fSMarc Zyngier * create the device. 3534e8137f4fSMarc Zyngier */ 35359791ec7dSMarc Zyngier its_dev->shared = true; 3536f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 3537e8137f4fSMarc Zyngier goto out; 3538e8137f4fSMarc Zyngier } 3539b48ac83dSMarc Zyngier 354093f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 35419791ec7dSMarc Zyngier if (!its_dev) { 35429791ec7dSMarc Zyngier err = -ENOMEM; 35439791ec7dSMarc Zyngier goto out; 35449791ec7dSMarc Zyngier } 3545b48ac83dSMarc Zyngier 35465fe71d27SMarc Zyngier if (info->flags & MSI_ALLOC_FLAGS_PROXY_DEVICE) 35475fe71d27SMarc Zyngier its_dev->shared = true; 35485fe71d27SMarc Zyngier 3549f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 3550e8137f4fSMarc Zyngier out: 35519791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 3552b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 35539791ec7dSMarc Zyngier return err; 3554b48ac83dSMarc Zyngier } 3555b48ac83dSMarc Zyngier 355654456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 355754456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 355854456db9SMarc Zyngier }; 355954456db9SMarc Zyngier 3560b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 3561b48ac83dSMarc Zyngier unsigned int virq, 3562b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 3563b48ac83dSMarc Zyngier { 3564f833f57fSMarc Zyngier struct irq_fwspec fwspec; 3565b48ac83dSMarc Zyngier 3566f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 3567f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 3568f833f57fSMarc Zyngier fwspec.param_count = 3; 3569f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 3570f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 3571f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 35723f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 35733f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 35743f010cf1STomasz Nowicki fwspec.param_count = 2; 35753f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 35763f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 3577f833f57fSMarc Zyngier } else { 3578f833f57fSMarc Zyngier return -EINVAL; 3579f833f57fSMarc Zyngier } 3580b48ac83dSMarc Zyngier 3581f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 3582b48ac83dSMarc Zyngier } 3583b48ac83dSMarc Zyngier 3584b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 3585b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 3586b48ac83dSMarc Zyngier { 3587b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 3588b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 358935ae7df2SJulien Grall struct its_node *its = its_dev->its; 3590f0c7bacaSThomas Gleixner struct irq_data *irqd; 3591b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 3592b48ac83dSMarc Zyngier int err; 3593b48ac83dSMarc Zyngier int i; 3594b48ac83dSMarc Zyngier 35958208d170SMarc Zyngier err = its_alloc_device_irq(its_dev, nr_irqs, &hwirq); 3596b48ac83dSMarc Zyngier if (err) 3597b48ac83dSMarc Zyngier return err; 3598b48ac83dSMarc Zyngier 359935ae7df2SJulien Grall err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); 360035ae7df2SJulien Grall if (err) 360135ae7df2SJulien Grall return err; 360235ae7df2SJulien Grall 36038208d170SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 36048208d170SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); 3605b48ac83dSMarc Zyngier if (err) 3606b48ac83dSMarc Zyngier return err; 3607b48ac83dSMarc Zyngier 3608b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 36098208d170SMarc Zyngier hwirq + i, &its_irq_chip, its_dev); 3610f0c7bacaSThomas Gleixner irqd = irq_get_irq_data(virq + i); 3611f0c7bacaSThomas Gleixner irqd_set_single_target(irqd); 3612f0c7bacaSThomas Gleixner irqd_set_affinity_on_activate(irqd); 36138f4b5895SJames Gowans irqd_set_resend_when_in_progress(irqd); 3614f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 36158208d170SMarc Zyngier (int)(hwirq + i - its_dev->event_map.lpi_base), 36168208d170SMarc Zyngier (int)(hwirq + i), virq + i); 3617b48ac83dSMarc Zyngier } 3618b48ac83dSMarc Zyngier 3619b48ac83dSMarc Zyngier return 0; 3620b48ac83dSMarc Zyngier } 3621b48ac83dSMarc Zyngier 362272491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 3623702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3624aca268dfSMarc Zyngier { 3625aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3626aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 36270d224d35SMarc Zyngier int cpu; 3628fbf8f40eSGanapatrao Kulkarni 3629c5d6082dSMarc Zyngier cpu = its_select_cpu(d, cpu_online_mask); 3630c5d6082dSMarc Zyngier if (cpu < 0 || cpu >= nr_cpu_ids) 3631c1797b11SYang Yingliang return -EINVAL; 3632c1797b11SYang Yingliang 36332f13ff1dSMarc Zyngier its_inc_lpi_count(d, cpu); 36340d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 36350d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3636591e5becSMarc Zyngier 3637aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 36386a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 363972491643SThomas Gleixner return 0; 3640aca268dfSMarc Zyngier } 3641aca268dfSMarc Zyngier 3642aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 3643aca268dfSMarc Zyngier struct irq_data *d) 3644aca268dfSMarc Zyngier { 3645aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3646aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 3647aca268dfSMarc Zyngier 36482f13ff1dSMarc Zyngier its_dec_lpi_count(d, its_dev->event_map.col_map[event]); 3649aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 3650aca268dfSMarc Zyngier its_send_discard(its_dev, event); 3651aca268dfSMarc Zyngier } 3652aca268dfSMarc Zyngier 3653b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 3654b48ac83dSMarc Zyngier unsigned int nr_irqs) 3655b48ac83dSMarc Zyngier { 3656b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 3657b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 36589791ec7dSMarc Zyngier struct its_node *its = its_dev->its; 3659b48ac83dSMarc Zyngier int i; 3660b48ac83dSMarc Zyngier 3661c9c96e30SMarc Zyngier bitmap_release_region(its_dev->event_map.lpi_map, 3662c9c96e30SMarc Zyngier its_get_event_id(irq_domain_get_irq_data(domain, virq)), 3663c9c96e30SMarc Zyngier get_count_order(nr_irqs)); 3664c9c96e30SMarc Zyngier 3665b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 3666b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 3667b48ac83dSMarc Zyngier virq + i); 3668b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 36692da39949SMarc Zyngier irq_domain_reset_irq_data(data); 3670b48ac83dSMarc Zyngier } 3671b48ac83dSMarc Zyngier 36729791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 36739791ec7dSMarc Zyngier 36749791ec7dSMarc Zyngier /* 36759791ec7dSMarc Zyngier * If all interrupts have been freed, start mopping the 3676a359f757SIngo Molnar * floor. This is conditioned on the device not being shared. 36779791ec7dSMarc Zyngier */ 36789791ec7dSMarc Zyngier if (!its_dev->shared && 36799791ec7dSMarc Zyngier bitmap_empty(its_dev->event_map.lpi_map, 3680591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 368138dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 3682cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 3683cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 3684b48ac83dSMarc Zyngier 3685b48ac83dSMarc Zyngier /* Unmap device/itt */ 3686b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 3687b48ac83dSMarc Zyngier its_free_device(its_dev); 3688b48ac83dSMarc Zyngier } 3689b48ac83dSMarc Zyngier 36909791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 36919791ec7dSMarc Zyngier 3692b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 3693b48ac83dSMarc Zyngier } 3694b48ac83dSMarc Zyngier 3695b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 3696b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 3697b48ac83dSMarc Zyngier .free = its_irq_domain_free, 3698aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 3699aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 3700b48ac83dSMarc Zyngier }; 37014c21f3c2SMarc Zyngier 370220b3d54eSMarc Zyngier /* 370320b3d54eSMarc Zyngier * This is insane. 370420b3d54eSMarc Zyngier * 37050684c704SMarc Zyngier * If a GICv4.0 doesn't implement Direct LPIs (which is extremely 370620b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 370720b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 370820b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 370920b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 371020b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 371120b3d54eSMarc Zyngier * 371220b3d54eSMarc Zyngier * Broken by design(tm). 37130684c704SMarc Zyngier * 37140684c704SMarc Zyngier * GICv4.1, on the other hand, mandates that we're able to invalidate 37150684c704SMarc Zyngier * by writing to a MMIO register. It doesn't implement the whole of 37160684c704SMarc Zyngier * DirectLPI, but that's good enough. And most of the time, we don't 37170684c704SMarc Zyngier * even have to invalidate anything, as the redistributor can be told 37180684c704SMarc Zyngier * whether to generate a doorbell or not (we thus leave it enabled, 37190684c704SMarc Zyngier * always). 372020b3d54eSMarc Zyngier */ 372120b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 372220b3d54eSMarc Zyngier { 37230684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37240684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37250684c704SMarc Zyngier return; 37260684c704SMarc Zyngier 372720b3d54eSMarc Zyngier /* Already unmapped? */ 372820b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 372920b3d54eSMarc Zyngier return; 373020b3d54eSMarc Zyngier 373120b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 373220b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 373320b3d54eSMarc Zyngier 373420b3d54eSMarc Zyngier /* 373520b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 373620b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 373720b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 373820b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 373920b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 374020b3d54eSMarc Zyngier */ 374120b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 374220b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 374320b3d54eSMarc Zyngier 374420b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 374520b3d54eSMarc Zyngier } 374620b3d54eSMarc Zyngier 374720b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 374820b3d54eSMarc Zyngier { 37490684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37500684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37510684c704SMarc Zyngier return; 37520684c704SMarc Zyngier 375320b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 375420b3d54eSMarc Zyngier unsigned long flags; 375520b3d54eSMarc Zyngier 375620b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 375720b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 375820b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 375920b3d54eSMarc Zyngier } 376020b3d54eSMarc Zyngier } 376120b3d54eSMarc Zyngier 376220b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 376320b3d54eSMarc Zyngier { 37640684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37650684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37660684c704SMarc Zyngier return; 37670684c704SMarc Zyngier 376820b3d54eSMarc Zyngier /* Already mapped? */ 376920b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 377020b3d54eSMarc Zyngier return; 377120b3d54eSMarc Zyngier 377220b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 377320b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 377420b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 377520b3d54eSMarc Zyngier 377620b3d54eSMarc Zyngier /* Map the new VPE instead */ 377720b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 377820b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 377920b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 378020b3d54eSMarc Zyngier 378120b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 378220b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 378320b3d54eSMarc Zyngier } 378420b3d54eSMarc Zyngier 3785958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 3786958b90d1SMarc Zyngier { 3787958b90d1SMarc Zyngier unsigned long flags; 3788958b90d1SMarc Zyngier struct its_collection *target_col; 3789958b90d1SMarc Zyngier 37900684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 37910684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 37920684c704SMarc Zyngier return; 37930684c704SMarc Zyngier 3794958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3795958b90d1SMarc Zyngier void __iomem *rdbase; 3796958b90d1SMarc Zyngier 3797958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 3798958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 37992f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3800958b90d1SMarc Zyngier 3801958b90d1SMarc Zyngier return; 3802958b90d1SMarc Zyngier } 3803958b90d1SMarc Zyngier 3804958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 3805958b90d1SMarc Zyngier 3806958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 3807958b90d1SMarc Zyngier 3808958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 3809958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 3810958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 3811958b90d1SMarc Zyngier 3812958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 3813958b90d1SMarc Zyngier } 3814958b90d1SMarc Zyngier 38153171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 38163171a47aSMarc Zyngier const struct cpumask *mask_val, 38173171a47aSMarc Zyngier bool force) 38183171a47aSMarc Zyngier { 38193171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3820dd3f050aSMarc Zyngier int from, cpu = cpumask_first(mask_val); 3821f3a05921SMarc Zyngier unsigned long flags; 38223171a47aSMarc Zyngier 38233171a47aSMarc Zyngier /* 38243171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 382520b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 3826958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 3827958b90d1SMarc Zyngier * interrupt to its new location. 3828f3a05921SMarc Zyngier * 3829f3a05921SMarc Zyngier * Another thing is that changing the affinity of a vPE affects 3830f3a05921SMarc Zyngier * *other interrupts* such as all the vLPIs that are routed to 3831f3a05921SMarc Zyngier * this vPE. This means that the irq_desc lock is not enough to 3832f3a05921SMarc Zyngier * protect us, and that we must ensure nobody samples vpe->col_idx 3833f3a05921SMarc Zyngier * during the update, hence the lock below which must also be 3834f3a05921SMarc Zyngier * taken on any vLPI handling path that evaluates vpe->col_idx. 38353171a47aSMarc Zyngier */ 3836f3a05921SMarc Zyngier from = vpe_to_cpuid_lock(vpe, &flags); 3837f3a05921SMarc Zyngier if (from == cpu) 3838dd3f050aSMarc Zyngier goto out; 3839958b90d1SMarc Zyngier 38403171a47aSMarc Zyngier vpe->col_idx = cpu; 3841dd3f050aSMarc Zyngier 3842dd3f050aSMarc Zyngier /* 3843dd3f050aSMarc Zyngier * GICv4.1 allows us to skip VMOVP if moving to a cpu whose RD 3844dd3f050aSMarc Zyngier * is sharing its VPE table with the current one. 3845dd3f050aSMarc Zyngier */ 3846dd3f050aSMarc Zyngier if (gic_data_rdist_cpu(cpu)->vpe_table_mask && 3847dd3f050aSMarc Zyngier cpumask_test_cpu(from, gic_data_rdist_cpu(cpu)->vpe_table_mask)) 3848dd3f050aSMarc Zyngier goto out; 3849dd3f050aSMarc Zyngier 38503171a47aSMarc Zyngier its_send_vmovp(vpe); 3851958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 38523171a47aSMarc Zyngier 3853dd3f050aSMarc Zyngier out: 385444c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3855f3a05921SMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 385644c4c25eSMarc Zyngier 38573171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 38583171a47aSMarc Zyngier } 38593171a47aSMarc Zyngier 386096806229SMarc Zyngier static void its_wait_vpt_parse_complete(void) 386196806229SMarc Zyngier { 386296806229SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 386396806229SMarc Zyngier u64 val; 386496806229SMarc Zyngier 386596806229SMarc Zyngier if (!gic_rdists->has_vpend_valid_dirty) 386696806229SMarc Zyngier return; 386796806229SMarc Zyngier 386831dbb6b1SZenghui Yu WARN_ON_ONCE(readq_relaxed_poll_timeout_atomic(vlpi_base + GICR_VPENDBASER, 386996806229SMarc Zyngier val, 387096806229SMarc Zyngier !(val & GICR_VPENDBASER_Dirty), 38710b394982SShenming Lu 1, 500)); 387296806229SMarc Zyngier } 387396806229SMarc Zyngier 3874e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 3875e643d803SMarc Zyngier { 387650c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3877e643d803SMarc Zyngier u64 val; 3878e643d803SMarc Zyngier 3879e643d803SMarc Zyngier /* Schedule the VPE */ 3880e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 3881e643d803SMarc Zyngier GENMASK_ULL(51, 12); 3882e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 3883e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 3884e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 38855186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 3886e643d803SMarc Zyngier 3887e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 3888e643d803SMarc Zyngier GENMASK_ULL(51, 16); 3889e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 3890b2cb11f4SHeyi Guo val |= GICR_VPENDBASER_InnerShareable; 3891e643d803SMarc Zyngier /* 3892e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 3893e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 3894e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 3895e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 3896e643d803SMarc Zyngier * that the pending table is empty. A good implementation 3897e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 3898e643d803SMarc Zyngier * making this a tolerable issue. 3899e643d803SMarc Zyngier */ 3900e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 3901e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 3902e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 39035186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 3904e643d803SMarc Zyngier } 3905e643d803SMarc Zyngier 3906e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 3907e643d803SMarc Zyngier { 390850c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3909e643d803SMarc Zyngier u64 val; 3910e643d803SMarc Zyngier 3911e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 3912e643d803SMarc Zyngier 3913e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 3914e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 3915e643d803SMarc Zyngier } 3916e643d803SMarc Zyngier 391740619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 391840619a2eSMarc Zyngier { 391940619a2eSMarc Zyngier struct its_node *its; 392040619a2eSMarc Zyngier 392140619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 39220dd57fedSMarc Zyngier if (!is_v4(its)) 392340619a2eSMarc Zyngier continue; 392440619a2eSMarc Zyngier 39252247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 39262247e1bfSMarc Zyngier continue; 39272247e1bfSMarc Zyngier 39283c1cceebSMarc Zyngier /* 39293c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 39303c1cceebSMarc Zyngier * we need is to reach the redistributors. 39313c1cceebSMarc Zyngier */ 393240619a2eSMarc Zyngier its_send_vinvall(its, vpe); 39333c1cceebSMarc Zyngier return; 393440619a2eSMarc Zyngier } 393540619a2eSMarc Zyngier } 393640619a2eSMarc Zyngier 3937e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 3938e643d803SMarc Zyngier { 3939e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3940e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 3941e643d803SMarc Zyngier 3942e643d803SMarc Zyngier switch (info->cmd_type) { 3943e643d803SMarc Zyngier case SCHEDULE_VPE: 3944e643d803SMarc Zyngier its_vpe_schedule(vpe); 3945e643d803SMarc Zyngier return 0; 3946e643d803SMarc Zyngier 3947e643d803SMarc Zyngier case DESCHEDULE_VPE: 3948e643d803SMarc Zyngier its_vpe_deschedule(vpe); 3949e643d803SMarc Zyngier return 0; 3950e643d803SMarc Zyngier 395157e3cebdSShenming Lu case COMMIT_VPE: 395257e3cebdSShenming Lu its_wait_vpt_parse_complete(); 395357e3cebdSShenming Lu return 0; 395457e3cebdSShenming Lu 39555e2f7642SMarc Zyngier case INVALL_VPE: 395640619a2eSMarc Zyngier its_vpe_invall(vpe); 39575e2f7642SMarc Zyngier return 0; 39585e2f7642SMarc Zyngier 3959e643d803SMarc Zyngier default: 3960e643d803SMarc Zyngier return -EINVAL; 3961e643d803SMarc Zyngier } 3962e643d803SMarc Zyngier } 3963e643d803SMarc Zyngier 396420b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 396520b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 396620b3d54eSMarc Zyngier { 396720b3d54eSMarc Zyngier unsigned long flags; 396820b3d54eSMarc Zyngier 396920b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 397020b3d54eSMarc Zyngier 397120b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 397220b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 397320b3d54eSMarc Zyngier 397420b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 397520b3d54eSMarc Zyngier } 397620b3d54eSMarc Zyngier 3977f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 3978f6a91da7SMarc Zyngier { 3979f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 398020b3d54eSMarc Zyngier 3981*926846a7SMarc Zyngier if (gic_rdists->has_direct_lpi) 3982*926846a7SMarc Zyngier __direct_lpi_inv(d, d->parent_data->hwirq); 3983*926846a7SMarc Zyngier else 398420b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 398520b3d54eSMarc Zyngier } 3986f6a91da7SMarc Zyngier 3987f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 3988f6a91da7SMarc Zyngier { 3989f6a91da7SMarc Zyngier /* 3990f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 3991f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 3992f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 3993f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 3994f6a91da7SMarc Zyngier */ 3995f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 3996f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3997f6a91da7SMarc Zyngier } 3998f6a91da7SMarc Zyngier 3999f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 4000f6a91da7SMarc Zyngier { 4001f6a91da7SMarc Zyngier /* Same hack as above... */ 4002f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 4003f6a91da7SMarc Zyngier its_vpe_send_inv(d); 4004f6a91da7SMarc Zyngier } 4005f6a91da7SMarc Zyngier 4006e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 4007e57a3e28SMarc Zyngier enum irqchip_irq_state which, 4008e57a3e28SMarc Zyngier bool state) 4009e57a3e28SMarc Zyngier { 4010e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4011e57a3e28SMarc Zyngier 4012e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 4013e57a3e28SMarc Zyngier return -EINVAL; 4014e57a3e28SMarc Zyngier 4015e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 4016e57a3e28SMarc Zyngier void __iomem *rdbase; 4017e57a3e28SMarc Zyngier 4018e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 4019e57a3e28SMarc Zyngier if (state) { 4020e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 4021e57a3e28SMarc Zyngier } else { 4022e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 40232f4f064bSMarc Zyngier wait_for_syncr(rdbase); 4024e57a3e28SMarc Zyngier } 4025e57a3e28SMarc Zyngier } else { 4026e57a3e28SMarc Zyngier if (state) 4027e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 4028e57a3e28SMarc Zyngier else 4029e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 4030e57a3e28SMarc Zyngier } 4031e57a3e28SMarc Zyngier 4032e57a3e28SMarc Zyngier return 0; 4033e57a3e28SMarc Zyngier } 4034e57a3e28SMarc Zyngier 40357809f701SMarc Zyngier static int its_vpe_retrigger(struct irq_data *d) 40367809f701SMarc Zyngier { 40377809f701SMarc Zyngier return !its_vpe_set_irqchip_state(d, IRQCHIP_STATE_PENDING, true); 40387809f701SMarc Zyngier } 40397809f701SMarc Zyngier 40408fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 40418fff27aeSMarc Zyngier .name = "GICv4-vpe", 4042f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 4043f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 4044f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 40453171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 40467809f701SMarc Zyngier .irq_retrigger = its_vpe_retrigger, 4047e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 4048e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 40498fff27aeSMarc Zyngier }; 40508fff27aeSMarc Zyngier 4051d97c97baSMarc Zyngier static struct its_node *find_4_1_its(void) 4052d97c97baSMarc Zyngier { 4053d97c97baSMarc Zyngier static struct its_node *its = NULL; 4054d97c97baSMarc Zyngier 4055d97c97baSMarc Zyngier if (!its) { 4056d97c97baSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 4057d97c97baSMarc Zyngier if (is_v4_1(its)) 4058d97c97baSMarc Zyngier return its; 4059d97c97baSMarc Zyngier } 4060d97c97baSMarc Zyngier 4061d97c97baSMarc Zyngier /* Oops? */ 4062d97c97baSMarc Zyngier its = NULL; 4063d97c97baSMarc Zyngier } 4064d97c97baSMarc Zyngier 4065d97c97baSMarc Zyngier return its; 4066d97c97baSMarc Zyngier } 4067d97c97baSMarc Zyngier 4068d97c97baSMarc Zyngier static void its_vpe_4_1_send_inv(struct irq_data *d) 4069d97c97baSMarc Zyngier { 4070d97c97baSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4071d97c97baSMarc Zyngier struct its_node *its; 4072d97c97baSMarc Zyngier 4073d97c97baSMarc Zyngier /* 4074d97c97baSMarc Zyngier * GICv4.1 wants doorbells to be invalidated using the 4075d97c97baSMarc Zyngier * INVDB command in order to be broadcast to all RDs. Send 4076d97c97baSMarc Zyngier * it to the first valid ITS, and let the HW do its magic. 4077d97c97baSMarc Zyngier */ 4078d97c97baSMarc Zyngier its = find_4_1_its(); 4079d97c97baSMarc Zyngier if (its) 4080d97c97baSMarc Zyngier its_send_invdb(its, vpe); 4081d97c97baSMarc Zyngier } 4082d97c97baSMarc Zyngier 4083d97c97baSMarc Zyngier static void its_vpe_4_1_mask_irq(struct irq_data *d) 4084d97c97baSMarc Zyngier { 4085d97c97baSMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 4086d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 4087d97c97baSMarc Zyngier } 4088d97c97baSMarc Zyngier 4089d97c97baSMarc Zyngier static void its_vpe_4_1_unmask_irq(struct irq_data *d) 4090d97c97baSMarc Zyngier { 4091d97c97baSMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 4092d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 4093d97c97baSMarc Zyngier } 4094d97c97baSMarc Zyngier 409591bf6395SMarc Zyngier static void its_vpe_4_1_schedule(struct its_vpe *vpe, 409691bf6395SMarc Zyngier struct its_cmd_info *info) 409791bf6395SMarc Zyngier { 409891bf6395SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 409991bf6395SMarc Zyngier u64 val = 0; 410091bf6395SMarc Zyngier 410191bf6395SMarc Zyngier /* Schedule the VPE */ 410291bf6395SMarc Zyngier val |= GICR_VPENDBASER_Valid; 410391bf6395SMarc Zyngier val |= info->g0en ? GICR_VPENDBASER_4_1_VGRP0EN : 0; 410491bf6395SMarc Zyngier val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0; 410591bf6395SMarc Zyngier val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id); 410691bf6395SMarc Zyngier 41075186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 410891bf6395SMarc Zyngier } 410991bf6395SMarc Zyngier 4110e64fab1aSMarc Zyngier static void its_vpe_4_1_deschedule(struct its_vpe *vpe, 4111e64fab1aSMarc Zyngier struct its_cmd_info *info) 4112e64fab1aSMarc Zyngier { 4113e64fab1aSMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 4114e64fab1aSMarc Zyngier u64 val; 4115e64fab1aSMarc Zyngier 4116e64fab1aSMarc Zyngier if (info->req_db) { 4117a3f574cdSMarc Zyngier unsigned long flags; 4118a3f574cdSMarc Zyngier 4119e64fab1aSMarc Zyngier /* 4120e64fab1aSMarc Zyngier * vPE is going to block: make the vPE non-resident with 4121e64fab1aSMarc Zyngier * PendingLast clear and DB set. The GIC guarantees that if 4122e64fab1aSMarc Zyngier * we read-back PendingLast clear, then a doorbell will be 4123e64fab1aSMarc Zyngier * delivered when an interrupt comes. 4124a3f574cdSMarc Zyngier * 4125a3f574cdSMarc Zyngier * Note the locking to deal with the concurrent update of 4126a3f574cdSMarc Zyngier * pending_last from the doorbell interrupt handler that can 4127a3f574cdSMarc Zyngier * run concurrently. 4128e64fab1aSMarc Zyngier */ 4129a3f574cdSMarc Zyngier raw_spin_lock_irqsave(&vpe->vpe_lock, flags); 4130e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 4131e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast, 4132e64fab1aSMarc Zyngier GICR_VPENDBASER_4_1_DB); 4133e64fab1aSMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 4134a3f574cdSMarc Zyngier raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); 4135e64fab1aSMarc Zyngier } else { 4136e64fab1aSMarc Zyngier /* 4137e64fab1aSMarc Zyngier * We're not blocking, so just make the vPE non-resident 4138e64fab1aSMarc Zyngier * with PendingLast set, indicating that we'll be back. 4139e64fab1aSMarc Zyngier */ 4140e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 4141e64fab1aSMarc Zyngier 0, 4142e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast); 4143e64fab1aSMarc Zyngier vpe->pending_last = true; 4144e64fab1aSMarc Zyngier } 4145e64fab1aSMarc Zyngier } 4146e64fab1aSMarc Zyngier 4147b4a4bd0fSMarc Zyngier static void its_vpe_4_1_invall(struct its_vpe *vpe) 4148b4a4bd0fSMarc Zyngier { 4149b4a4bd0fSMarc Zyngier void __iomem *rdbase; 41503af9571cSZenghui Yu unsigned long flags; 4151b4a4bd0fSMarc Zyngier u64 val; 41523af9571cSZenghui Yu int cpu; 4153b4a4bd0fSMarc Zyngier 4154b4a4bd0fSMarc Zyngier val = GICR_INVALLR_V; 4155b4a4bd0fSMarc Zyngier val |= FIELD_PREP(GICR_INVALLR_VPEID, vpe->vpe_id); 4156b4a4bd0fSMarc Zyngier 4157b4a4bd0fSMarc Zyngier /* Target the redistributor this vPE is currently known on */ 41583af9571cSZenghui Yu cpu = vpe_to_cpuid_lock(vpe, &flags); 41593af9571cSZenghui Yu raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 41603af9571cSZenghui Yu rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; 4161b4a4bd0fSMarc Zyngier gic_write_lpir(val, rdbase + GICR_INVALLR); 4162b978c25fSZenghui Yu 4163b978c25fSZenghui Yu wait_for_syncr(rdbase); 41643af9571cSZenghui Yu raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 41653af9571cSZenghui Yu vpe_to_cpuid_unlock(vpe, flags); 4166b4a4bd0fSMarc Zyngier } 4167b4a4bd0fSMarc Zyngier 416829c647f3SMarc Zyngier static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 416929c647f3SMarc Zyngier { 417091bf6395SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 417129c647f3SMarc Zyngier struct its_cmd_info *info = vcpu_info; 417229c647f3SMarc Zyngier 417329c647f3SMarc Zyngier switch (info->cmd_type) { 417429c647f3SMarc Zyngier case SCHEDULE_VPE: 417591bf6395SMarc Zyngier its_vpe_4_1_schedule(vpe, info); 417629c647f3SMarc Zyngier return 0; 417729c647f3SMarc Zyngier 417829c647f3SMarc Zyngier case DESCHEDULE_VPE: 4179e64fab1aSMarc Zyngier its_vpe_4_1_deschedule(vpe, info); 418029c647f3SMarc Zyngier return 0; 418129c647f3SMarc Zyngier 418257e3cebdSShenming Lu case COMMIT_VPE: 418357e3cebdSShenming Lu its_wait_vpt_parse_complete(); 418457e3cebdSShenming Lu return 0; 418557e3cebdSShenming Lu 418629c647f3SMarc Zyngier case INVALL_VPE: 4187b4a4bd0fSMarc Zyngier its_vpe_4_1_invall(vpe); 418829c647f3SMarc Zyngier return 0; 418929c647f3SMarc Zyngier 419029c647f3SMarc Zyngier default: 419129c647f3SMarc Zyngier return -EINVAL; 419229c647f3SMarc Zyngier } 419329c647f3SMarc Zyngier } 419429c647f3SMarc Zyngier 419529c647f3SMarc Zyngier static struct irq_chip its_vpe_4_1_irq_chip = { 419629c647f3SMarc Zyngier .name = "GICv4.1-vpe", 4197d97c97baSMarc Zyngier .irq_mask = its_vpe_4_1_mask_irq, 4198d97c97baSMarc Zyngier .irq_unmask = its_vpe_4_1_unmask_irq, 419929c647f3SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 420029c647f3SMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 420129c647f3SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_4_1_set_vcpu_affinity, 420229c647f3SMarc Zyngier }; 420329c647f3SMarc Zyngier 4204e252cf8aSMarc Zyngier static void its_configure_sgi(struct irq_data *d, bool clear) 4205e252cf8aSMarc Zyngier { 4206e252cf8aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4207e252cf8aSMarc Zyngier struct its_cmd_desc desc; 4208e252cf8aSMarc Zyngier 4209e252cf8aSMarc Zyngier desc.its_vsgi_cmd.vpe = vpe; 4210e252cf8aSMarc Zyngier desc.its_vsgi_cmd.sgi = d->hwirq; 4211e252cf8aSMarc Zyngier desc.its_vsgi_cmd.priority = vpe->sgi_config[d->hwirq].priority; 4212e252cf8aSMarc Zyngier desc.its_vsgi_cmd.enable = vpe->sgi_config[d->hwirq].enabled; 4213e252cf8aSMarc Zyngier desc.its_vsgi_cmd.group = vpe->sgi_config[d->hwirq].group; 4214e252cf8aSMarc Zyngier desc.its_vsgi_cmd.clear = clear; 4215e252cf8aSMarc Zyngier 4216e252cf8aSMarc Zyngier /* 4217e252cf8aSMarc Zyngier * GICv4.1 allows us to send VSGI commands to any ITS as long as the 4218e252cf8aSMarc Zyngier * destination VPE is mapped there. Since we map them eagerly at 4219e252cf8aSMarc Zyngier * activation time, we're pretty sure the first GICv4.1 ITS will do. 4220e252cf8aSMarc Zyngier */ 4221e252cf8aSMarc Zyngier its_send_single_vcommand(find_4_1_its(), its_build_vsgi_cmd, &desc); 4222e252cf8aSMarc Zyngier } 4223e252cf8aSMarc Zyngier 4224b4e8d644SMarc Zyngier static void its_sgi_mask_irq(struct irq_data *d) 4225b4e8d644SMarc Zyngier { 4226b4e8d644SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4227b4e8d644SMarc Zyngier 4228b4e8d644SMarc Zyngier vpe->sgi_config[d->hwirq].enabled = false; 4229b4e8d644SMarc Zyngier its_configure_sgi(d, false); 4230b4e8d644SMarc Zyngier } 4231b4e8d644SMarc Zyngier 4232b4e8d644SMarc Zyngier static void its_sgi_unmask_irq(struct irq_data *d) 4233b4e8d644SMarc Zyngier { 4234b4e8d644SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4235b4e8d644SMarc Zyngier 4236b4e8d644SMarc Zyngier vpe->sgi_config[d->hwirq].enabled = true; 4237b4e8d644SMarc Zyngier its_configure_sgi(d, false); 4238b4e8d644SMarc Zyngier } 4239b4e8d644SMarc Zyngier 4240166cba71SMarc Zyngier static int its_sgi_set_affinity(struct irq_data *d, 4241166cba71SMarc Zyngier const struct cpumask *mask_val, 4242166cba71SMarc Zyngier bool force) 4243166cba71SMarc Zyngier { 4244166cba71SMarc Zyngier /* 4245166cba71SMarc Zyngier * There is no notion of affinity for virtual SGIs, at least 4246a359f757SIngo Molnar * not on the host (since they can only be targeting a vPE). 4247166cba71SMarc Zyngier * Tell the kernel we've done whatever it asked for. 4248166cba71SMarc Zyngier */ 42494b2dfe1eSMarc Zyngier irq_data_update_effective_affinity(d, mask_val); 4250166cba71SMarc Zyngier return IRQ_SET_MASK_OK; 4251166cba71SMarc Zyngier } 4252166cba71SMarc Zyngier 42537017ff0eSMarc Zyngier static int its_sgi_set_irqchip_state(struct irq_data *d, 42547017ff0eSMarc Zyngier enum irqchip_irq_state which, 42557017ff0eSMarc Zyngier bool state) 42567017ff0eSMarc Zyngier { 42577017ff0eSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 42587017ff0eSMarc Zyngier return -EINVAL; 42597017ff0eSMarc Zyngier 42607017ff0eSMarc Zyngier if (state) { 42617017ff0eSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 42627017ff0eSMarc Zyngier struct its_node *its = find_4_1_its(); 42637017ff0eSMarc Zyngier u64 val; 42647017ff0eSMarc Zyngier 42657017ff0eSMarc Zyngier val = FIELD_PREP(GITS_SGIR_VPEID, vpe->vpe_id); 42667017ff0eSMarc Zyngier val |= FIELD_PREP(GITS_SGIR_VINTID, d->hwirq); 42677017ff0eSMarc Zyngier writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); 42687017ff0eSMarc Zyngier } else { 42697017ff0eSMarc Zyngier its_configure_sgi(d, true); 42707017ff0eSMarc Zyngier } 42717017ff0eSMarc Zyngier 42727017ff0eSMarc Zyngier return 0; 42737017ff0eSMarc Zyngier } 42747017ff0eSMarc Zyngier 42757017ff0eSMarc Zyngier static int its_sgi_get_irqchip_state(struct irq_data *d, 42767017ff0eSMarc Zyngier enum irqchip_irq_state which, bool *val) 42777017ff0eSMarc Zyngier { 42787017ff0eSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 42797017ff0eSMarc Zyngier void __iomem *base; 42807017ff0eSMarc Zyngier unsigned long flags; 42817017ff0eSMarc Zyngier u32 count = 1000000; /* 1s! */ 42827017ff0eSMarc Zyngier u32 status; 42837017ff0eSMarc Zyngier int cpu; 42847017ff0eSMarc Zyngier 42857017ff0eSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 42867017ff0eSMarc Zyngier return -EINVAL; 42877017ff0eSMarc Zyngier 42887017ff0eSMarc Zyngier /* 42897017ff0eSMarc Zyngier * Locking galore! We can race against two different events: 42907017ff0eSMarc Zyngier * 4291a359f757SIngo Molnar * - Concurrent vPE affinity change: we must make sure it cannot 42927017ff0eSMarc Zyngier * happen, or we'll talk to the wrong redistributor. This is 42937017ff0eSMarc Zyngier * identical to what happens with vLPIs. 42947017ff0eSMarc Zyngier * 42957017ff0eSMarc Zyngier * - Concurrent VSGIPENDR access: As it involves accessing two 42967017ff0eSMarc Zyngier * MMIO registers, this must be made atomic one way or another. 42977017ff0eSMarc Zyngier */ 42987017ff0eSMarc Zyngier cpu = vpe_to_cpuid_lock(vpe, &flags); 42997017ff0eSMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 43007017ff0eSMarc Zyngier base = gic_data_rdist_cpu(cpu)->rd_base + SZ_128K; 43017017ff0eSMarc Zyngier writel_relaxed(vpe->vpe_id, base + GICR_VSGIR); 43027017ff0eSMarc Zyngier do { 43037017ff0eSMarc Zyngier status = readl_relaxed(base + GICR_VSGIPENDR); 43047017ff0eSMarc Zyngier if (!(status & GICR_VSGIPENDR_BUSY)) 43057017ff0eSMarc Zyngier goto out; 43067017ff0eSMarc Zyngier 43077017ff0eSMarc Zyngier count--; 43087017ff0eSMarc Zyngier if (!count) { 43097017ff0eSMarc Zyngier pr_err_ratelimited("Unable to get SGI status\n"); 43107017ff0eSMarc Zyngier goto out; 43117017ff0eSMarc Zyngier } 43127017ff0eSMarc Zyngier cpu_relax(); 43137017ff0eSMarc Zyngier udelay(1); 43147017ff0eSMarc Zyngier } while (count); 43157017ff0eSMarc Zyngier 43167017ff0eSMarc Zyngier out: 43177017ff0eSMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 43187017ff0eSMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 43197017ff0eSMarc Zyngier 43207017ff0eSMarc Zyngier if (!count) 43217017ff0eSMarc Zyngier return -ENXIO; 43227017ff0eSMarc Zyngier 43237017ff0eSMarc Zyngier *val = !!(status & (1 << d->hwirq)); 43247017ff0eSMarc Zyngier 43257017ff0eSMarc Zyngier return 0; 43267017ff0eSMarc Zyngier } 43277017ff0eSMarc Zyngier 432805d32df1SMarc Zyngier static int its_sgi_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 432905d32df1SMarc Zyngier { 433005d32df1SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 433105d32df1SMarc Zyngier struct its_cmd_info *info = vcpu_info; 433205d32df1SMarc Zyngier 433305d32df1SMarc Zyngier switch (info->cmd_type) { 433405d32df1SMarc Zyngier case PROP_UPDATE_VSGI: 433505d32df1SMarc Zyngier vpe->sgi_config[d->hwirq].priority = info->priority; 433605d32df1SMarc Zyngier vpe->sgi_config[d->hwirq].group = info->group; 433705d32df1SMarc Zyngier its_configure_sgi(d, false); 433805d32df1SMarc Zyngier return 0; 433905d32df1SMarc Zyngier 434005d32df1SMarc Zyngier default: 434105d32df1SMarc Zyngier return -EINVAL; 434205d32df1SMarc Zyngier } 434305d32df1SMarc Zyngier } 434405d32df1SMarc Zyngier 4345166cba71SMarc Zyngier static struct irq_chip its_sgi_irq_chip = { 4346166cba71SMarc Zyngier .name = "GICv4.1-sgi", 4347b4e8d644SMarc Zyngier .irq_mask = its_sgi_mask_irq, 4348b4e8d644SMarc Zyngier .irq_unmask = its_sgi_unmask_irq, 4349166cba71SMarc Zyngier .irq_set_affinity = its_sgi_set_affinity, 43507017ff0eSMarc Zyngier .irq_set_irqchip_state = its_sgi_set_irqchip_state, 43517017ff0eSMarc Zyngier .irq_get_irqchip_state = its_sgi_get_irqchip_state, 435205d32df1SMarc Zyngier .irq_set_vcpu_affinity = its_sgi_set_vcpu_affinity, 4353166cba71SMarc Zyngier }; 4354166cba71SMarc Zyngier 4355166cba71SMarc Zyngier static int its_sgi_irq_domain_alloc(struct irq_domain *domain, 4356166cba71SMarc Zyngier unsigned int virq, unsigned int nr_irqs, 4357166cba71SMarc Zyngier void *args) 4358166cba71SMarc Zyngier { 4359166cba71SMarc Zyngier struct its_vpe *vpe = args; 4360166cba71SMarc Zyngier int i; 4361166cba71SMarc Zyngier 4362166cba71SMarc Zyngier /* Yes, we do want 16 SGIs */ 4363166cba71SMarc Zyngier WARN_ON(nr_irqs != 16); 4364166cba71SMarc Zyngier 4365166cba71SMarc Zyngier for (i = 0; i < 16; i++) { 4366166cba71SMarc Zyngier vpe->sgi_config[i].priority = 0; 4367166cba71SMarc Zyngier vpe->sgi_config[i].enabled = false; 4368166cba71SMarc Zyngier vpe->sgi_config[i].group = false; 4369166cba71SMarc Zyngier 4370166cba71SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 4371166cba71SMarc Zyngier &its_sgi_irq_chip, vpe); 4372166cba71SMarc Zyngier irq_set_status_flags(virq + i, IRQ_DISABLE_UNLAZY); 4373166cba71SMarc Zyngier } 4374166cba71SMarc Zyngier 4375166cba71SMarc Zyngier return 0; 4376166cba71SMarc Zyngier } 4377166cba71SMarc Zyngier 4378166cba71SMarc Zyngier static void its_sgi_irq_domain_free(struct irq_domain *domain, 4379166cba71SMarc Zyngier unsigned int virq, 4380166cba71SMarc Zyngier unsigned int nr_irqs) 4381166cba71SMarc Zyngier { 4382166cba71SMarc Zyngier /* Nothing to do */ 4383166cba71SMarc Zyngier } 4384166cba71SMarc Zyngier 4385166cba71SMarc Zyngier static int its_sgi_irq_domain_activate(struct irq_domain *domain, 4386166cba71SMarc Zyngier struct irq_data *d, bool reserve) 4387166cba71SMarc Zyngier { 4388e252cf8aSMarc Zyngier /* Write out the initial SGI configuration */ 4389e252cf8aSMarc Zyngier its_configure_sgi(d, false); 4390166cba71SMarc Zyngier return 0; 4391166cba71SMarc Zyngier } 4392166cba71SMarc Zyngier 4393166cba71SMarc Zyngier static void its_sgi_irq_domain_deactivate(struct irq_domain *domain, 4394166cba71SMarc Zyngier struct irq_data *d) 4395166cba71SMarc Zyngier { 4396e252cf8aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4397e252cf8aSMarc Zyngier 4398e252cf8aSMarc Zyngier /* 4399e252cf8aSMarc Zyngier * The VSGI command is awkward: 4400e252cf8aSMarc Zyngier * 4401e252cf8aSMarc Zyngier * - To change the configuration, CLEAR must be set to false, 4402e252cf8aSMarc Zyngier * leaving the pending bit unchanged. 4403e252cf8aSMarc Zyngier * - To clear the pending bit, CLEAR must be set to true, leaving 4404e252cf8aSMarc Zyngier * the configuration unchanged. 4405e252cf8aSMarc Zyngier * 4406e252cf8aSMarc Zyngier * You just can't do both at once, hence the two commands below. 4407e252cf8aSMarc Zyngier */ 4408e252cf8aSMarc Zyngier vpe->sgi_config[d->hwirq].enabled = false; 4409e252cf8aSMarc Zyngier its_configure_sgi(d, false); 4410e252cf8aSMarc Zyngier its_configure_sgi(d, true); 4411166cba71SMarc Zyngier } 4412166cba71SMarc Zyngier 4413166cba71SMarc Zyngier static const struct irq_domain_ops its_sgi_domain_ops = { 4414166cba71SMarc Zyngier .alloc = its_sgi_irq_domain_alloc, 4415166cba71SMarc Zyngier .free = its_sgi_irq_domain_free, 4416166cba71SMarc Zyngier .activate = its_sgi_irq_domain_activate, 4417166cba71SMarc Zyngier .deactivate = its_sgi_irq_domain_deactivate, 4418166cba71SMarc Zyngier }; 4419166cba71SMarc Zyngier 44207d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 44217d75bbb4SMarc Zyngier { 442232bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 44237d75bbb4SMarc Zyngier } 44247d75bbb4SMarc Zyngier 44257d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 44267d75bbb4SMarc Zyngier { 44277d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 44287d75bbb4SMarc Zyngier } 44297d75bbb4SMarc Zyngier 44307d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 44317d75bbb4SMarc Zyngier { 44327d75bbb4SMarc Zyngier struct page *vpt_page; 44337d75bbb4SMarc Zyngier int vpe_id; 44347d75bbb4SMarc Zyngier 44357d75bbb4SMarc Zyngier /* Allocate vpe_id */ 44367d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 44377d75bbb4SMarc Zyngier if (vpe_id < 0) 44387d75bbb4SMarc Zyngier return vpe_id; 44397d75bbb4SMarc Zyngier 44407d75bbb4SMarc Zyngier /* Allocate VPT */ 44417d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 44427d75bbb4SMarc Zyngier if (!vpt_page) { 44437d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 44447d75bbb4SMarc Zyngier return -ENOMEM; 44457d75bbb4SMarc Zyngier } 44467d75bbb4SMarc Zyngier 44477d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 44487d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 444934f8eb92SNianyao Tang its_free_pending_table(vpt_page); 44507d75bbb4SMarc Zyngier return -ENOMEM; 44517d75bbb4SMarc Zyngier } 44527d75bbb4SMarc Zyngier 4453f3a05921SMarc Zyngier raw_spin_lock_init(&vpe->vpe_lock); 44547d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 44557d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 445664edfaa9SMarc Zyngier if (gic_rdists->has_rvpeid) 445764edfaa9SMarc Zyngier atomic_set(&vpe->vmapp_count, 0); 445864edfaa9SMarc Zyngier else 445920b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 44607d75bbb4SMarc Zyngier 44617d75bbb4SMarc Zyngier return 0; 44627d75bbb4SMarc Zyngier } 44637d75bbb4SMarc Zyngier 44647d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 44657d75bbb4SMarc Zyngier { 446620b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 44677d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 44687d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 44697d75bbb4SMarc Zyngier } 44707d75bbb4SMarc Zyngier 44717d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 44727d75bbb4SMarc Zyngier unsigned int virq, 44737d75bbb4SMarc Zyngier unsigned int nr_irqs) 44747d75bbb4SMarc Zyngier { 44757d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 44767d75bbb4SMarc Zyngier int i; 44777d75bbb4SMarc Zyngier 44787d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 44797d75bbb4SMarc Zyngier 44807d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 44817d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 44827d75bbb4SMarc Zyngier virq + i); 44837d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 44847d75bbb4SMarc Zyngier 44857d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 44867d75bbb4SMarc Zyngier 44877d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 44887d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 44897d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 44907d75bbb4SMarc Zyngier } 44917d75bbb4SMarc Zyngier 44927d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 449338dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 44947d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 44957d75bbb4SMarc Zyngier } 44967d75bbb4SMarc Zyngier } 44977d75bbb4SMarc Zyngier 44987d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 44997d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 45007d75bbb4SMarc Zyngier { 450129c647f3SMarc Zyngier struct irq_chip *irqchip = &its_vpe_irq_chip; 45027d75bbb4SMarc Zyngier struct its_vm *vm = args; 45037d75bbb4SMarc Zyngier unsigned long *bitmap; 45047d75bbb4SMarc Zyngier struct page *vprop_page; 45057d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 45067d75bbb4SMarc Zyngier 45077d75bbb4SMarc Zyngier BUG_ON(!vm); 45087d75bbb4SMarc Zyngier 450938dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 45107d75bbb4SMarc Zyngier if (!bitmap) 45117d75bbb4SMarc Zyngier return -ENOMEM; 45127d75bbb4SMarc Zyngier 45137d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 451438dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 45157d75bbb4SMarc Zyngier return -ENOMEM; 45167d75bbb4SMarc Zyngier } 45177d75bbb4SMarc Zyngier 45187d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 45197d75bbb4SMarc Zyngier if (!vprop_page) { 452038dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 45217d75bbb4SMarc Zyngier return -ENOMEM; 45227d75bbb4SMarc Zyngier } 45237d75bbb4SMarc Zyngier 45247d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 45257d75bbb4SMarc Zyngier vm->db_lpi_base = base; 45267d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 45277d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 45287d75bbb4SMarc Zyngier 452929c647f3SMarc Zyngier if (gic_rdists->has_rvpeid) 453029c647f3SMarc Zyngier irqchip = &its_vpe_4_1_irq_chip; 453129c647f3SMarc Zyngier 45327d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 45337d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 45347d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 45357d75bbb4SMarc Zyngier if (err) 45367d75bbb4SMarc Zyngier break; 45377d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 45387d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 45397d75bbb4SMarc Zyngier if (err) 45407d75bbb4SMarc Zyngier break; 45417d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 454229c647f3SMarc Zyngier irqchip, vm->vpes[i]); 45437d75bbb4SMarc Zyngier set_bit(i, bitmap); 45448f4b5895SJames Gowans irqd_set_resend_when_in_progress(irq_get_irq_data(virq + i)); 45457d75bbb4SMarc Zyngier } 45467d75bbb4SMarc Zyngier 45477d75bbb4SMarc Zyngier if (err) { 45487d75bbb4SMarc Zyngier if (i > 0) 4549280bef51SKaige Fu its_vpe_irq_domain_free(domain, virq, i); 45507d75bbb4SMarc Zyngier 455138dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 45527d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 45537d75bbb4SMarc Zyngier } 45547d75bbb4SMarc Zyngier 45557d75bbb4SMarc Zyngier return err; 45567d75bbb4SMarc Zyngier } 45577d75bbb4SMarc Zyngier 455872491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 4559702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 4560eb78192bSMarc Zyngier { 4561eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 456240619a2eSMarc Zyngier struct its_node *its; 4563eb78192bSMarc Zyngier 4564009384b3SMarc Zyngier /* 4565009384b3SMarc Zyngier * If we use the list map, we issue VMAPP on demand... Unless 4566009384b3SMarc Zyngier * we're on a GICv4.1 and we eagerly map the VPE on all ITSs 4567009384b3SMarc Zyngier * so that VSGIs can work. 4568009384b3SMarc Zyngier */ 4569009384b3SMarc Zyngier if (!gic_requires_eager_mapping()) 45706ef930f2SMarc Zyngier return 0; 4571eb78192bSMarc Zyngier 4572eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 4573eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 457440619a2eSMarc Zyngier 457540619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 45760dd57fedSMarc Zyngier if (!is_v4(its)) 457740619a2eSMarc Zyngier continue; 457840619a2eSMarc Zyngier 457975fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 458040619a2eSMarc Zyngier its_send_vinvall(its, vpe); 458140619a2eSMarc Zyngier } 458240619a2eSMarc Zyngier 458344c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 458444c4c25eSMarc Zyngier 458572491643SThomas Gleixner return 0; 4586eb78192bSMarc Zyngier } 4587eb78192bSMarc Zyngier 4588eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 4589eb78192bSMarc Zyngier struct irq_data *d) 4590eb78192bSMarc Zyngier { 4591eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 459275fd951bSMarc Zyngier struct its_node *its; 4593eb78192bSMarc Zyngier 45942247e1bfSMarc Zyngier /* 4595009384b3SMarc Zyngier * If we use the list map on GICv4.0, we unmap the VPE once no 4596009384b3SMarc Zyngier * VLPIs are associated with the VM. 45972247e1bfSMarc Zyngier */ 4598009384b3SMarc Zyngier if (!gic_requires_eager_mapping()) 45992247e1bfSMarc Zyngier return; 46002247e1bfSMarc Zyngier 460175fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 46020dd57fedSMarc Zyngier if (!is_v4(its)) 460375fd951bSMarc Zyngier continue; 460475fd951bSMarc Zyngier 460575fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 460675fd951bSMarc Zyngier } 4607301beaf1SMarc Zyngier 4608301beaf1SMarc Zyngier /* 4609301beaf1SMarc Zyngier * There may be a direct read to the VPT after unmapping the 4610301beaf1SMarc Zyngier * vPE, to guarantee the validity of this, we make the VPT 4611301beaf1SMarc Zyngier * memory coherent with the CPU caches here. 4612301beaf1SMarc Zyngier */ 4613301beaf1SMarc Zyngier if (find_4_1_its() && !atomic_read(&vpe->vmapp_count)) 4614301beaf1SMarc Zyngier gic_flush_dcache_to_poc(page_address(vpe->vpt_page), 4615301beaf1SMarc Zyngier LPI_PENDBASE_SZ); 4616eb78192bSMarc Zyngier } 4617eb78192bSMarc Zyngier 46188fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 46197d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 46207d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 4621eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 4622eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 46238fff27aeSMarc Zyngier }; 46248fff27aeSMarc Zyngier 46254559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 46264559fbb3SYun Wu { 46274559fbb3SYun Wu u32 count = 1000000; /* 1s */ 46284559fbb3SYun Wu u32 val; 46294559fbb3SYun Wu 46304559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 46317611da86SDavid Daney /* 46327611da86SDavid Daney * GIC architecture specification requires the ITS to be both 46337611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 46347611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 46357611da86SDavid Daney */ 46367611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 46374559fbb3SYun Wu return 0; 46384559fbb3SYun Wu 46394559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 4640d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 46414559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 46424559fbb3SYun Wu 46434559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 46444559fbb3SYun Wu while (1) { 46454559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 46464559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 46474559fbb3SYun Wu return 0; 46484559fbb3SYun Wu 46494559fbb3SYun Wu count--; 46504559fbb3SYun Wu if (!count) 46514559fbb3SYun Wu return -EBUSY; 46524559fbb3SYun Wu 46534559fbb3SYun Wu cpu_relax(); 46544559fbb3SYun Wu udelay(1); 46554559fbb3SYun Wu } 46564559fbb3SYun Wu } 46574559fbb3SYun Wu 46589d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 465994100970SRobert Richter { 466094100970SRobert Richter struct its_node *its = data; 466194100970SRobert Richter 4662576a8342SMarc Zyngier /* erratum 22375: only alloc 8MB table size (20 bits) */ 4663576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 4664576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); 466594100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 46669d111d49SArd Biesheuvel 46679d111d49SArd Biesheuvel return true; 466894100970SRobert Richter } 466994100970SRobert Richter 46709d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 4671fbf8f40eSGanapatrao Kulkarni { 4672fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 4673fbf8f40eSGanapatrao Kulkarni 4674fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 46759d111d49SArd Biesheuvel 46769d111d49SArd Biesheuvel return true; 4677fbf8f40eSGanapatrao Kulkarni } 4678fbf8f40eSGanapatrao Kulkarni 46799d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 468090922a2dSShanker Donthineni { 468190922a2dSShanker Donthineni struct its_node *its = data; 468290922a2dSShanker Donthineni 468390922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 4684ffedbf0cSMarc Zyngier its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; 4685ffedbf0cSMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); 46869d111d49SArd Biesheuvel 46879d111d49SArd Biesheuvel return true; 468890922a2dSShanker Donthineni } 468990922a2dSShanker Donthineni 4690558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 4691558b0165SArd Biesheuvel { 4692558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 4693558b0165SArd Biesheuvel 4694558b0165SArd Biesheuvel /* 4695558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 4696558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 4697558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 4698558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 4699558b0165SArd Biesheuvel * the window offset. 4700558b0165SArd Biesheuvel */ 4701558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 4702558b0165SArd Biesheuvel } 4703558b0165SArd Biesheuvel 4704558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 4705558b0165SArd Biesheuvel { 4706558b0165SArd Biesheuvel struct its_node *its = data; 4707558b0165SArd Biesheuvel u32 pre_its_window[2]; 4708558b0165SArd Biesheuvel u32 ids; 4709558b0165SArd Biesheuvel 4710558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 4711558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 4712558b0165SArd Biesheuvel pre_its_window, 4713558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 4714558b0165SArd Biesheuvel 4715558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 4716558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 4717558b0165SArd Biesheuvel 4718558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 4719576a8342SMarc Zyngier if (device_ids(its) > ids) { 4720576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 4721576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); 4722576a8342SMarc Zyngier } 4723558b0165SArd Biesheuvel 4724558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 4725dcb83f6eSJason Gunthorpe its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_ISOLATED_MSI; 4726558b0165SArd Biesheuvel return true; 4727558b0165SArd Biesheuvel } 4728558b0165SArd Biesheuvel return false; 4729558b0165SArd Biesheuvel } 4730558b0165SArd Biesheuvel 47315c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 47325c9a882eSMarc Zyngier { 47335c9a882eSMarc Zyngier struct its_node *its = data; 47345c9a882eSMarc Zyngier 47355c9a882eSMarc Zyngier /* 47365c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 47375c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 47385c9a882eSMarc Zyngier */ 47395c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 47405c9a882eSMarc Zyngier return true; 4741cc2d3216SMarc Zyngier } 47424c21f3c2SMarc Zyngier 4743a8707f55SSebastian Reichel static bool __maybe_unused its_enable_rk3588001(void *data) 4744a8707f55SSebastian Reichel { 4745a8707f55SSebastian Reichel struct its_node *its = data; 4746a8707f55SSebastian Reichel 4747a8707f55SSebastian Reichel if (!of_machine_is_compatible("rockchip,rk3588")) 4748a8707f55SSebastian Reichel return false; 4749a8707f55SSebastian Reichel 4750a8707f55SSebastian Reichel its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; 4751a8707f55SSebastian Reichel gic_rdists->flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE; 4752a8707f55SSebastian Reichel 4753a8707f55SSebastian Reichel return true; 4754a8707f55SSebastian Reichel } 4755a8707f55SSebastian Reichel 475667510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 475794100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 475894100970SRobert Richter { 475994100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 476094100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 476194100970SRobert Richter .mask = 0xffff0fff, 476294100970SRobert Richter .init = its_enable_quirk_cavium_22375, 476394100970SRobert Richter }, 476494100970SRobert Richter #endif 4765fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 4766fbf8f40eSGanapatrao Kulkarni { 4767fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 4768fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 4769fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 4770fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 4771fbf8f40eSGanapatrao Kulkarni }, 4772fbf8f40eSGanapatrao Kulkarni #endif 477390922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 477490922a2dSShanker Donthineni { 477590922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 477690922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 477790922a2dSShanker Donthineni .mask = 0xffffffff, 477890922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 477990922a2dSShanker Donthineni }, 478090922a2dSShanker Donthineni #endif 4781558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 4782558b0165SArd Biesheuvel { 4783558b0165SArd Biesheuvel /* 4784558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 4785558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 4786558b0165SArd Biesheuvel * special handling in software. 4787558b0165SArd Biesheuvel */ 4788558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 4789558b0165SArd Biesheuvel .iidr = 0x0001143b, 4790558b0165SArd Biesheuvel .mask = 0xffffffff, 4791558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 4792558b0165SArd Biesheuvel }, 4793558b0165SArd Biesheuvel #endif 47945c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 47955c9a882eSMarc Zyngier { 47965c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 47975c9a882eSMarc Zyngier .iidr = 0x00000004, 47985c9a882eSMarc Zyngier .mask = 0xffffffff, 47995c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 48005c9a882eSMarc Zyngier }, 48015c9a882eSMarc Zyngier #endif 4802a8707f55SSebastian Reichel #ifdef CONFIG_ROCKCHIP_ERRATUM_3588001 4803a8707f55SSebastian Reichel { 4804a8707f55SSebastian Reichel .desc = "ITS: Rockchip erratum RK3588001", 4805a8707f55SSebastian Reichel .iidr = 0x0201743b, 4806a8707f55SSebastian Reichel .mask = 0xffffffff, 4807a8707f55SSebastian Reichel .init = its_enable_rk3588001, 4808a8707f55SSebastian Reichel }, 4809a8707f55SSebastian Reichel #endif 481067510ccaSRobert Richter { 481167510ccaSRobert Richter } 481267510ccaSRobert Richter }; 481367510ccaSRobert Richter 481467510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 481567510ccaSRobert Richter { 481667510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 481767510ccaSRobert Richter 481867510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 481967510ccaSRobert Richter } 482067510ccaSRobert Richter 4821dba0bc7bSDerek Basehore static int its_save_disable(void) 4822dba0bc7bSDerek Basehore { 4823dba0bc7bSDerek Basehore struct its_node *its; 4824dba0bc7bSDerek Basehore int err = 0; 4825dba0bc7bSDerek Basehore 4826a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4827dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4828dba0bc7bSDerek Basehore void __iomem *base; 4829dba0bc7bSDerek Basehore 4830dba0bc7bSDerek Basehore base = its->base; 4831dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 4832dba0bc7bSDerek Basehore err = its_force_quiescent(base); 4833dba0bc7bSDerek Basehore if (err) { 4834dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 4835dba0bc7bSDerek Basehore &its->phys_base, err); 4836dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4837dba0bc7bSDerek Basehore goto err; 4838dba0bc7bSDerek Basehore } 4839dba0bc7bSDerek Basehore 4840dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 4841dba0bc7bSDerek Basehore } 4842dba0bc7bSDerek Basehore 4843dba0bc7bSDerek Basehore err: 4844dba0bc7bSDerek Basehore if (err) { 4845dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 4846dba0bc7bSDerek Basehore void __iomem *base; 4847dba0bc7bSDerek Basehore 4848dba0bc7bSDerek Basehore base = its->base; 4849dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4850dba0bc7bSDerek Basehore } 4851dba0bc7bSDerek Basehore } 4852a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4853dba0bc7bSDerek Basehore 4854dba0bc7bSDerek Basehore return err; 4855dba0bc7bSDerek Basehore } 4856dba0bc7bSDerek Basehore 4857dba0bc7bSDerek Basehore static void its_restore_enable(void) 4858dba0bc7bSDerek Basehore { 4859dba0bc7bSDerek Basehore struct its_node *its; 4860dba0bc7bSDerek Basehore int ret; 4861dba0bc7bSDerek Basehore 4862a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4863dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4864dba0bc7bSDerek Basehore void __iomem *base; 4865dba0bc7bSDerek Basehore int i; 4866dba0bc7bSDerek Basehore 4867dba0bc7bSDerek Basehore base = its->base; 4868dba0bc7bSDerek Basehore 4869dba0bc7bSDerek Basehore /* 4870dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 4871dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 4872dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 4873dba0bc7bSDerek Basehore * Specification. 487474cde1a5SXu Qiang * 487574cde1a5SXu Qiang * Firmware resuming with the ITS enabled is terminally broken. 4876dba0bc7bSDerek Basehore */ 487774cde1a5SXu Qiang WARN_ON(readl_relaxed(base + GITS_CTLR) & GITS_CTLR_ENABLE); 4878dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 4879dba0bc7bSDerek Basehore if (ret) { 4880dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 4881dba0bc7bSDerek Basehore &its->phys_base, ret); 4882dba0bc7bSDerek Basehore continue; 4883dba0bc7bSDerek Basehore } 4884dba0bc7bSDerek Basehore 4885dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 4886dba0bc7bSDerek Basehore 4887dba0bc7bSDerek Basehore /* 4888dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 4889dba0bc7bSDerek Basehore * cmd_write line up with it. 4890dba0bc7bSDerek Basehore */ 4891dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 4892dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 4893dba0bc7bSDerek Basehore 4894dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 4895dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 4896dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 4897dba0bc7bSDerek Basehore 4898dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 4899dba0bc7bSDerek Basehore continue; 4900dba0bc7bSDerek Basehore 4901dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 4902dba0bc7bSDerek Basehore } 4903dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4904920181ceSDerek Basehore 4905920181ceSDerek Basehore /* 4906920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 4907920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 4908920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 4909920181ceSDerek Basehore */ 4910920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 4911920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 4912920181ceSDerek Basehore its_cpu_init_collection(its); 4913dba0bc7bSDerek Basehore } 4914a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4915dba0bc7bSDerek Basehore } 4916dba0bc7bSDerek Basehore 4917dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 4918dba0bc7bSDerek Basehore .suspend = its_save_disable, 4919dba0bc7bSDerek Basehore .resume = its_restore_enable, 4920dba0bc7bSDerek Basehore }; 4921dba0bc7bSDerek Basehore 4922c733ebb7SMarc Zyngier static void __init __iomem *its_map_one(struct resource *res, int *err) 4923c733ebb7SMarc Zyngier { 4924c733ebb7SMarc Zyngier void __iomem *its_base; 4925c733ebb7SMarc Zyngier u32 val; 4926c733ebb7SMarc Zyngier 4927c733ebb7SMarc Zyngier its_base = ioremap(res->start, SZ_64K); 4928c733ebb7SMarc Zyngier if (!its_base) { 4929c733ebb7SMarc Zyngier pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 4930c733ebb7SMarc Zyngier *err = -ENOMEM; 4931c733ebb7SMarc Zyngier return NULL; 4932c733ebb7SMarc Zyngier } 4933c733ebb7SMarc Zyngier 4934c733ebb7SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 4935c733ebb7SMarc Zyngier if (val != 0x30 && val != 0x40) { 4936c733ebb7SMarc Zyngier pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 4937c733ebb7SMarc Zyngier *err = -ENODEV; 4938c733ebb7SMarc Zyngier goto out_unmap; 4939c733ebb7SMarc Zyngier } 4940c733ebb7SMarc Zyngier 4941c733ebb7SMarc Zyngier *err = its_force_quiescent(its_base); 4942c733ebb7SMarc Zyngier if (*err) { 4943c733ebb7SMarc Zyngier pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 4944c733ebb7SMarc Zyngier goto out_unmap; 4945c733ebb7SMarc Zyngier } 4946c733ebb7SMarc Zyngier 4947c733ebb7SMarc Zyngier return its_base; 4948c733ebb7SMarc Zyngier 4949c733ebb7SMarc Zyngier out_unmap: 4950c733ebb7SMarc Zyngier iounmap(its_base); 4951c733ebb7SMarc Zyngier return NULL; 4952c733ebb7SMarc Zyngier } 4953c733ebb7SMarc Zyngier 4954db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 4955d14ae5e6STomasz Nowicki { 4956d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 4957d14ae5e6STomasz Nowicki struct msi_domain_info *info; 4958d14ae5e6STomasz Nowicki 4959d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 4960d14ae5e6STomasz Nowicki if (!info) 4961d14ae5e6STomasz Nowicki return -ENOMEM; 4962d14ae5e6STomasz Nowicki 49631e46e040SJohan Hovold info->ops = &its_msi_domain_ops; 49641e46e040SJohan Hovold info->data = its; 49651e46e040SJohan Hovold 49661e46e040SJohan Hovold inner_domain = irq_domain_create_hierarchy(its_parent, 49671e46e040SJohan Hovold its->msi_domain_flags, 0, 49681e46e040SJohan Hovold handle, &its_domain_ops, 49691e46e040SJohan Hovold info); 4970d14ae5e6STomasz Nowicki if (!inner_domain) { 4971d14ae5e6STomasz Nowicki kfree(info); 4972d14ae5e6STomasz Nowicki return -ENOMEM; 4973d14ae5e6STomasz Nowicki } 4974d14ae5e6STomasz Nowicki 497596f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 4976d14ae5e6STomasz Nowicki 4977d14ae5e6STomasz Nowicki return 0; 4978d14ae5e6STomasz Nowicki } 4979d14ae5e6STomasz Nowicki 49808fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 49818fff27aeSMarc Zyngier { 498220b3d54eSMarc Zyngier struct its_node *its; 498320b3d54eSMarc Zyngier u32 devid; 498420b3d54eSMarc Zyngier int entries; 498520b3d54eSMarc Zyngier 498620b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 498720b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 498820b3d54eSMarc Zyngier return 0; 498920b3d54eSMarc Zyngier } 499020b3d54eSMarc Zyngier 499120b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 499220b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 499320b3d54eSMarc Zyngier 499420b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 49956396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 499620b3d54eSMarc Zyngier GFP_KERNEL); 4997944a1a17SZhen Lei if (!vpe_proxy.vpes) 499820b3d54eSMarc Zyngier return -ENOMEM; 499920b3d54eSMarc Zyngier 500020b3d54eSMarc Zyngier /* Use the last possible DevID */ 5001576a8342SMarc Zyngier devid = GENMASK(device_ids(its) - 1, 0); 500220b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 500320b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 500420b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 500520b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 500620b3d54eSMarc Zyngier return -ENOMEM; 500720b3d54eSMarc Zyngier } 500820b3d54eSMarc Zyngier 5009c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 501020b3d54eSMarc Zyngier 501120b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 501220b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 501320b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 501420b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 501520b3d54eSMarc Zyngier 50168fff27aeSMarc Zyngier return 0; 50178fff27aeSMarc Zyngier } 50188fff27aeSMarc Zyngier 50193dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 50203dfa576bSMarc Zyngier void __iomem *its_base) 50213dfa576bSMarc Zyngier { 50223dfa576bSMarc Zyngier int its_number; 50233dfa576bSMarc Zyngier u32 ctlr; 50243dfa576bSMarc Zyngier 50253dfa576bSMarc Zyngier /* 50263dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 50273dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 50283dfa576bSMarc Zyngier * locking. Should this change, we should address 50293dfa576bSMarc Zyngier * this. 50303dfa576bSMarc Zyngier */ 5031ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 5032ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 50333dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 50343dfa576bSMarc Zyngier &res->start); 50353dfa576bSMarc Zyngier return -EINVAL; 50363dfa576bSMarc Zyngier } 50373dfa576bSMarc Zyngier 50383dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 50393dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 50403dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 50413dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 50423dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 50433dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 50443dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 50453dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 50463dfa576bSMarc Zyngier } 50473dfa576bSMarc Zyngier 50483dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 50493dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 50503dfa576bSMarc Zyngier &res->start, its_number); 50513dfa576bSMarc Zyngier return -EINVAL; 50523dfa576bSMarc Zyngier } 50533dfa576bSMarc Zyngier 50543dfa576bSMarc Zyngier return its_number; 50553dfa576bSMarc Zyngier } 50563dfa576bSMarc Zyngier 5057db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 5058db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 50594c21f3c2SMarc Zyngier { 50604c21f3c2SMarc Zyngier struct its_node *its; 50614c21f3c2SMarc Zyngier void __iomem *its_base; 50623dfa576bSMarc Zyngier u64 baser, tmp, typer; 5063539d3782SShanker Donthineni struct page *page; 5064c733ebb7SMarc Zyngier u32 ctlr; 50654c21f3c2SMarc Zyngier int err; 50664c21f3c2SMarc Zyngier 5067c733ebb7SMarc Zyngier its_base = its_map_one(res, &err); 5068c733ebb7SMarc Zyngier if (!its_base) 5069c733ebb7SMarc Zyngier return err; 50704559fbb3SYun Wu 5071db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 50724c21f3c2SMarc Zyngier 50734c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 50744c21f3c2SMarc Zyngier if (!its) { 50754c21f3c2SMarc Zyngier err = -ENOMEM; 50764c21f3c2SMarc Zyngier goto out_unmap; 50774c21f3c2SMarc Zyngier } 50784c21f3c2SMarc Zyngier 50794c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 50809791ec7dSMarc Zyngier mutex_init(&its->dev_alloc_lock); 50814c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 50824c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 50833dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 50840dd57fedSMarc Zyngier its->typer = typer; 50854c21f3c2SMarc Zyngier its->base = its_base; 5086db40f0a7STomasz Nowicki its->phys_base = res->start; 50870dd57fedSMarc Zyngier if (is_v4(its)) { 50883dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 50893dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 50903dfa576bSMarc Zyngier if (err < 0) 50913dfa576bSMarc Zyngier goto out_free_its; 50923dfa576bSMarc Zyngier 5093debf6d02SMarc Zyngier its->list_nr = err; 5094debf6d02SMarc Zyngier 50953dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 50963dfa576bSMarc Zyngier &res->start, err); 50973dfa576bSMarc Zyngier } else { 50983dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 50993dfa576bSMarc Zyngier } 51005e516846SMarc Zyngier 51015e516846SMarc Zyngier if (is_v4_1(its)) { 51025e516846SMarc Zyngier u32 svpet = FIELD_GET(GITS_TYPER_SVPET, typer); 51035e46a484SMarc Zyngier 51045e46a484SMarc Zyngier its->sgir_base = ioremap(res->start + SZ_128K, SZ_64K); 51055e46a484SMarc Zyngier if (!its->sgir_base) { 51065e46a484SMarc Zyngier err = -ENOMEM; 51075e46a484SMarc Zyngier goto out_free_its; 51085e46a484SMarc Zyngier } 51095e46a484SMarc Zyngier 51105e516846SMarc Zyngier its->mpidr = readl_relaxed(its_base + GITS_MPIDR); 51115e516846SMarc Zyngier 51125e516846SMarc Zyngier pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n", 51135e516846SMarc Zyngier &res->start, its->mpidr, svpet); 51145e516846SMarc Zyngier } 51153dfa576bSMarc Zyngier } 51163dfa576bSMarc Zyngier 5117db40f0a7STomasz Nowicki its->numa_node = numa_node; 51184c21f3c2SMarc Zyngier 5119539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 51205bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 5121539d3782SShanker Donthineni if (!page) { 51224c21f3c2SMarc Zyngier err = -ENOMEM; 51235e46a484SMarc Zyngier goto out_unmap_sgir; 51244c21f3c2SMarc Zyngier } 5125539d3782SShanker Donthineni its->cmd_base = (void *)page_address(page); 51264c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 5127558b0165SArd Biesheuvel its->fwnode_handle = handle; 5128558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 5129dcb83f6eSJason Gunthorpe its->msi_domain_flags = IRQ_DOMAIN_FLAG_ISOLATED_MSI; 51304c21f3c2SMarc Zyngier 513167510ccaSRobert Richter its_enable_quirks(its); 513267510ccaSRobert Richter 51330e0b0f69SShanker Donthineni err = its_alloc_tables(its); 51344c21f3c2SMarc Zyngier if (err) 51354c21f3c2SMarc Zyngier goto out_free_cmd; 51364c21f3c2SMarc Zyngier 51374c21f3c2SMarc Zyngier err = its_alloc_collections(its); 51384c21f3c2SMarc Zyngier if (err) 51394c21f3c2SMarc Zyngier goto out_free_tables; 51404c21f3c2SMarc Zyngier 51414c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 51422fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 51434c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 51444c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 51454c21f3c2SMarc Zyngier GITS_CBASER_VALID); 51464c21f3c2SMarc Zyngier 51470968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 51480968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 51494c21f3c2SMarc Zyngier 5150a8707f55SSebastian Reichel if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) 5151a8707f55SSebastian Reichel tmp &= ~GITS_CBASER_SHAREABILITY_MASK; 5152a8707f55SSebastian Reichel 51534ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 5154241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 5155241a386cSMarc Zyngier /* 5156241a386cSMarc Zyngier * The HW reports non-shareable, we must 5157241a386cSMarc Zyngier * remove the cacheability attributes as 5158241a386cSMarc Zyngier * well. 5159241a386cSMarc Zyngier */ 5160241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 5161241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 5162241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 51630968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 5164241a386cSMarc Zyngier } 51654c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 51664c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 51674c21f3c2SMarc Zyngier } 51684c21f3c2SMarc Zyngier 51690968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 51703dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 5171d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 51720dd57fedSMarc Zyngier if (is_v4(its)) 5173d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 5174d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 5175241a386cSMarc Zyngier 5176db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 5177d14ae5e6STomasz Nowicki if (err) 517854456db9SMarc Zyngier goto out_free_tables; 51794c21f3c2SMarc Zyngier 5180a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 51814c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 5182a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 51834c21f3c2SMarc Zyngier 51844c21f3c2SMarc Zyngier return 0; 51854c21f3c2SMarc Zyngier 51864c21f3c2SMarc Zyngier out_free_tables: 51874c21f3c2SMarc Zyngier its_free_tables(its); 51884c21f3c2SMarc Zyngier out_free_cmd: 51895bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 51905e46a484SMarc Zyngier out_unmap_sgir: 51915e46a484SMarc Zyngier if (its->sgir_base) 51925e46a484SMarc Zyngier iounmap(its->sgir_base); 51934c21f3c2SMarc Zyngier out_free_its: 51944c21f3c2SMarc Zyngier kfree(its); 51954c21f3c2SMarc Zyngier out_unmap: 51964c21f3c2SMarc Zyngier iounmap(its_base); 5197db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 51984c21f3c2SMarc Zyngier return err; 51994c21f3c2SMarc Zyngier } 52004c21f3c2SMarc Zyngier 52014c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 52024c21f3c2SMarc Zyngier { 5203589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 52044c21f3c2SMarc Zyngier } 52054c21f3c2SMarc Zyngier 52066eb486b6SShanker Donthineni static int redist_disable_lpis(void) 52074c21f3c2SMarc Zyngier { 52086eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 52096eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 52106eb486b6SShanker Donthineni u64 val; 52116eb486b6SShanker Donthineni 52124c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 52134c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 52144c21f3c2SMarc Zyngier return -ENXIO; 52154c21f3c2SMarc Zyngier } 52166eb486b6SShanker Donthineni 52176eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 52186eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 52196eb486b6SShanker Donthineni return 0; 52206eb486b6SShanker Donthineni 522111e37d35SMarc Zyngier /* 522211e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 522311e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 522411e37d35SMarc Zyngier * configured and all is well in the world. 5225c440a9d9SMarc Zyngier * 5226c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 522711e37d35SMarc Zyngier */ 5228c0cdc890SValentin Schneider if ((gic_data_rdist()->flags & RD_LOCAL_LPI_ENABLED) || 5229c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 523011e37d35SMarc Zyngier return 0; 523111e37d35SMarc Zyngier 523211e37d35SMarc Zyngier /* 523311e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 523411e37d35SMarc Zyngier */ 523511e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 52366eb486b6SShanker Donthineni smp_processor_id()); 52376eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 52386eb486b6SShanker Donthineni 52396eb486b6SShanker Donthineni /* Disable LPIs */ 52406eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 52416eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 52426eb486b6SShanker Donthineni 52436eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 52446eb486b6SShanker Donthineni dsb(sy); 52456eb486b6SShanker Donthineni 52466eb486b6SShanker Donthineni /* 52476eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 52486eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 52496eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 52506eb486b6SShanker Donthineni */ 52516eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 52526eb486b6SShanker Donthineni if (!timeout) { 52536eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 52546eb486b6SShanker Donthineni smp_processor_id()); 52556eb486b6SShanker Donthineni return -ETIMEDOUT; 52566eb486b6SShanker Donthineni } 52576eb486b6SShanker Donthineni udelay(1); 52586eb486b6SShanker Donthineni timeout--; 52596eb486b6SShanker Donthineni } 52606eb486b6SShanker Donthineni 52616eb486b6SShanker Donthineni /* 52626eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 52636eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 52646eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 52656eb486b6SShanker Donthineni */ 52666eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 52676eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 52686eb486b6SShanker Donthineni return -EBUSY; 52696eb486b6SShanker Donthineni } 52706eb486b6SShanker Donthineni 52716eb486b6SShanker Donthineni return 0; 52726eb486b6SShanker Donthineni } 52736eb486b6SShanker Donthineni 52746eb486b6SShanker Donthineni int its_cpu_init(void) 52756eb486b6SShanker Donthineni { 52766eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 52776eb486b6SShanker Donthineni int ret; 52786eb486b6SShanker Donthineni 52796eb486b6SShanker Donthineni ret = redist_disable_lpis(); 52806eb486b6SShanker Donthineni if (ret) 52816eb486b6SShanker Donthineni return ret; 52826eb486b6SShanker Donthineni 52834c21f3c2SMarc Zyngier its_cpu_init_lpis(); 5284920181ceSDerek Basehore its_cpu_init_collections(); 52854c21f3c2SMarc Zyngier } 52864c21f3c2SMarc Zyngier 52874c21f3c2SMarc Zyngier return 0; 52884c21f3c2SMarc Zyngier } 52894c21f3c2SMarc Zyngier 5290835f442fSValentin Schneider static void rdist_memreserve_cpuhp_cleanup_workfn(struct work_struct *work) 5291835f442fSValentin Schneider { 5292835f442fSValentin Schneider cpuhp_remove_state_nocalls(gic_rdists->cpuhp_memreserve_state); 5293835f442fSValentin Schneider gic_rdists->cpuhp_memreserve_state = CPUHP_INVALID; 5294835f442fSValentin Schneider } 5295835f442fSValentin Schneider 5296835f442fSValentin Schneider static DECLARE_WORK(rdist_memreserve_cpuhp_cleanup_work, 5297835f442fSValentin Schneider rdist_memreserve_cpuhp_cleanup_workfn); 5298835f442fSValentin Schneider 5299d23bc2bcSValentin Schneider static int its_cpu_memreserve_lpi(unsigned int cpu) 5300d23bc2bcSValentin Schneider { 5301d23bc2bcSValentin Schneider struct page *pend_page; 5302d23bc2bcSValentin Schneider int ret = 0; 5303d23bc2bcSValentin Schneider 5304d23bc2bcSValentin Schneider /* This gets to run exactly once per CPU */ 5305d23bc2bcSValentin Schneider if (gic_data_rdist()->flags & RD_LOCAL_MEMRESERVE_DONE) 5306d23bc2bcSValentin Schneider return 0; 5307d23bc2bcSValentin Schneider 5308d23bc2bcSValentin Schneider pend_page = gic_data_rdist()->pend_page; 5309d23bc2bcSValentin Schneider if (WARN_ON(!pend_page)) { 5310d23bc2bcSValentin Schneider ret = -ENOMEM; 5311d23bc2bcSValentin Schneider goto out; 5312d23bc2bcSValentin Schneider } 5313d23bc2bcSValentin Schneider /* 5314d23bc2bcSValentin Schneider * If the pending table was pre-programmed, free the memory we 5315d23bc2bcSValentin Schneider * preemptively allocated. Otherwise, reserve that memory for 5316d23bc2bcSValentin Schneider * later kexecs. 5317d23bc2bcSValentin Schneider */ 5318d23bc2bcSValentin Schneider if (gic_data_rdist()->flags & RD_LOCAL_PENDTABLE_PREALLOCATED) { 5319d23bc2bcSValentin Schneider its_free_pending_table(pend_page); 5320d23bc2bcSValentin Schneider gic_data_rdist()->pend_page = NULL; 5321d23bc2bcSValentin Schneider } else { 5322d23bc2bcSValentin Schneider phys_addr_t paddr = page_to_phys(pend_page); 5323d23bc2bcSValentin Schneider WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 5324d23bc2bcSValentin Schneider } 5325d23bc2bcSValentin Schneider 5326d23bc2bcSValentin Schneider out: 5327835f442fSValentin Schneider /* Last CPU being brought up gets to issue the cleanup */ 532816436f70SArd Biesheuvel if (!IS_ENABLED(CONFIG_SMP) || 532916436f70SArd Biesheuvel cpumask_equal(&cpus_booted_once_mask, cpu_possible_mask)) 5330835f442fSValentin Schneider schedule_work(&rdist_memreserve_cpuhp_cleanup_work); 5331835f442fSValentin Schneider 5332d23bc2bcSValentin Schneider gic_data_rdist()->flags |= RD_LOCAL_MEMRESERVE_DONE; 5333d23bc2bcSValentin Schneider return ret; 5334d23bc2bcSValentin Schneider } 5335d23bc2bcSValentin Schneider 5336c733ebb7SMarc Zyngier /* Mark all the BASER registers as invalid before they get reprogrammed */ 5337c733ebb7SMarc Zyngier static int __init its_reset_one(struct resource *res) 5338c733ebb7SMarc Zyngier { 5339c733ebb7SMarc Zyngier void __iomem *its_base; 5340c733ebb7SMarc Zyngier int err, i; 5341c733ebb7SMarc Zyngier 5342c733ebb7SMarc Zyngier its_base = its_map_one(res, &err); 5343c733ebb7SMarc Zyngier if (!its_base) 5344c733ebb7SMarc Zyngier return err; 5345c733ebb7SMarc Zyngier 5346c733ebb7SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) 5347c733ebb7SMarc Zyngier gits_write_baser(0, its_base + GITS_BASER + (i << 3)); 5348c733ebb7SMarc Zyngier 5349c733ebb7SMarc Zyngier iounmap(its_base); 5350c733ebb7SMarc Zyngier return 0; 5351c733ebb7SMarc Zyngier } 5352c733ebb7SMarc Zyngier 5353935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 53544c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 53554c21f3c2SMarc Zyngier {}, 53564c21f3c2SMarc Zyngier }; 53574c21f3c2SMarc Zyngier 5358db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 53594c21f3c2SMarc Zyngier { 53604c21f3c2SMarc Zyngier struct device_node *np; 5361db40f0a7STomasz Nowicki struct resource res; 53624c21f3c2SMarc Zyngier 5363c733ebb7SMarc Zyngier /* 5364c733ebb7SMarc Zyngier * Make sure *all* the ITS are reset before we probe any, as 5365c733ebb7SMarc Zyngier * they may be sharing memory. If any of the ITS fails to 5366c733ebb7SMarc Zyngier * reset, don't even try to go any further, as this could 5367c733ebb7SMarc Zyngier * result in something even worse. 5368c733ebb7SMarc Zyngier */ 5369c733ebb7SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 5370c733ebb7SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 5371c733ebb7SMarc Zyngier int err; 5372c733ebb7SMarc Zyngier 5373c733ebb7SMarc Zyngier if (!of_device_is_available(np) || 5374c733ebb7SMarc Zyngier !of_property_read_bool(np, "msi-controller") || 5375c733ebb7SMarc Zyngier of_address_to_resource(np, 0, &res)) 5376c733ebb7SMarc Zyngier continue; 5377c733ebb7SMarc Zyngier 5378c733ebb7SMarc Zyngier err = its_reset_one(&res); 5379c733ebb7SMarc Zyngier if (err) 5380c733ebb7SMarc Zyngier return err; 5381c733ebb7SMarc Zyngier } 5382c733ebb7SMarc Zyngier 53834c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 53844c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 538595a25625SStephen Boyd if (!of_device_is_available(np)) 538695a25625SStephen Boyd continue; 5387d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 5388e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 5389e81f54c6SRob Herring np); 5390d14ae5e6STomasz Nowicki continue; 5391d14ae5e6STomasz Nowicki } 5392d14ae5e6STomasz Nowicki 5393db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 5394e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 5395db40f0a7STomasz Nowicki continue; 53964c21f3c2SMarc Zyngier } 53974c21f3c2SMarc Zyngier 5398db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 5399db40f0a7STomasz Nowicki } 5400db40f0a7STomasz Nowicki return 0; 5401db40f0a7STomasz Nowicki } 5402db40f0a7STomasz Nowicki 54033f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 54043f010cf1STomasz Nowicki 54053f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 54063f010cf1STomasz Nowicki 5407d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 5408dbd2b826SGanapatrao Kulkarni struct its_srat_map { 5409dbd2b826SGanapatrao Kulkarni /* numa node id */ 5410dbd2b826SGanapatrao Kulkarni u32 numa_node; 5411dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 5412dbd2b826SGanapatrao Kulkarni u32 its_id; 5413dbd2b826SGanapatrao Kulkarni }; 5414dbd2b826SGanapatrao Kulkarni 5415fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 5416dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 5417dbd2b826SGanapatrao Kulkarni 5418dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 5419dbd2b826SGanapatrao Kulkarni { 5420dbd2b826SGanapatrao Kulkarni int i; 5421dbd2b826SGanapatrao Kulkarni 5422dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 5423dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 5424dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 5425dbd2b826SGanapatrao Kulkarni } 5426dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 5427dbd2b826SGanapatrao Kulkarni } 5428dbd2b826SGanapatrao Kulkarni 542960574d1eSKeith Busch static int __init gic_acpi_match_srat_its(union acpi_subtable_headers *header, 5430fdf6e7a8SHanjun Guo const unsigned long end) 5431fdf6e7a8SHanjun Guo { 5432fdf6e7a8SHanjun Guo return 0; 5433fdf6e7a8SHanjun Guo } 5434fdf6e7a8SHanjun Guo 543560574d1eSKeith Busch static int __init gic_acpi_parse_srat_its(union acpi_subtable_headers *header, 5436dbd2b826SGanapatrao Kulkarni const unsigned long end) 5437dbd2b826SGanapatrao Kulkarni { 5438dbd2b826SGanapatrao Kulkarni int node; 5439dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 5440dbd2b826SGanapatrao Kulkarni 5441dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 5442dbd2b826SGanapatrao Kulkarni if (!its_affinity) 5443dbd2b826SGanapatrao Kulkarni return -EINVAL; 5444dbd2b826SGanapatrao Kulkarni 5445dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 5446dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 5447dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 5448dbd2b826SGanapatrao Kulkarni return -EINVAL; 5449dbd2b826SGanapatrao Kulkarni } 5450dbd2b826SGanapatrao Kulkarni 545195ac5bf4SJonathan Cameron /* 545295ac5bf4SJonathan Cameron * Note that in theory a new proximity node could be created by this 545395ac5bf4SJonathan Cameron * entry as it is an SRAT resource allocation structure. 545495ac5bf4SJonathan Cameron * We do not currently support doing so. 545595ac5bf4SJonathan Cameron */ 545695ac5bf4SJonathan Cameron node = pxm_to_node(its_affinity->proximity_domain); 5457dbd2b826SGanapatrao Kulkarni 5458dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 5459dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 5460dbd2b826SGanapatrao Kulkarni return 0; 5461dbd2b826SGanapatrao Kulkarni } 5462dbd2b826SGanapatrao Kulkarni 5463dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 5464dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 5465dbd2b826SGanapatrao Kulkarni its_in_srat++; 5466dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 5467dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 5468dbd2b826SGanapatrao Kulkarni 5469dbd2b826SGanapatrao Kulkarni return 0; 5470dbd2b826SGanapatrao Kulkarni } 5471dbd2b826SGanapatrao Kulkarni 5472dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 5473dbd2b826SGanapatrao Kulkarni { 5474fdf6e7a8SHanjun Guo int count; 5475fdf6e7a8SHanjun Guo 5476fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 5477fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 5478fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 5479fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 5480fdf6e7a8SHanjun Guo if (count <= 0) 5481fdf6e7a8SHanjun Guo return; 5482fdf6e7a8SHanjun Guo 54836da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 5484fdf6e7a8SHanjun Guo GFP_KERNEL); 5485944a1a17SZhen Lei if (!its_srat_maps) 5486fdf6e7a8SHanjun Guo return; 5487fdf6e7a8SHanjun Guo 5488dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 5489dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 5490dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 5491dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 5492dbd2b826SGanapatrao Kulkarni } 5493fdf6e7a8SHanjun Guo 5494fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 5495fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 5496fdf6e7a8SHanjun Guo { 5497fdf6e7a8SHanjun Guo kfree(its_srat_maps); 5498fdf6e7a8SHanjun Guo } 5499dbd2b826SGanapatrao Kulkarni #else 5500dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 5501dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 5502fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 5503dbd2b826SGanapatrao Kulkarni #endif 5504dbd2b826SGanapatrao Kulkarni 550560574d1eSKeith Busch static int __init gic_acpi_parse_madt_its(union acpi_subtable_headers *header, 55063f010cf1STomasz Nowicki const unsigned long end) 55073f010cf1STomasz Nowicki { 55083f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 55093f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 55103f010cf1STomasz Nowicki struct resource res; 55113f010cf1STomasz Nowicki int err; 55123f010cf1STomasz Nowicki 55133f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 55143f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 55153f010cf1STomasz Nowicki res.start = its_entry->base_address; 55163f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 55173f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 55183f010cf1STomasz Nowicki 55195778cc77SMarc Zyngier dom_handle = irq_domain_alloc_fwnode(&res.start); 55203f010cf1STomasz Nowicki if (!dom_handle) { 55213f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 55223f010cf1STomasz Nowicki &res.start); 55233f010cf1STomasz Nowicki return -ENOMEM; 55243f010cf1STomasz Nowicki } 55253f010cf1STomasz Nowicki 55268b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 55278b4282e6SShameer Kolothum dom_handle); 55283f010cf1STomasz Nowicki if (err) { 55293f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 55303f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 55313f010cf1STomasz Nowicki goto dom_err; 55323f010cf1STomasz Nowicki } 55333f010cf1STomasz Nowicki 5534dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 5535dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 55363f010cf1STomasz Nowicki if (!err) 55373f010cf1STomasz Nowicki return 0; 55383f010cf1STomasz Nowicki 55393f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 55403f010cf1STomasz Nowicki dom_err: 55413f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 55423f010cf1STomasz Nowicki return err; 55433f010cf1STomasz Nowicki } 55443f010cf1STomasz Nowicki 5545c733ebb7SMarc Zyngier static int __init its_acpi_reset(union acpi_subtable_headers *header, 5546c733ebb7SMarc Zyngier const unsigned long end) 5547c733ebb7SMarc Zyngier { 5548c733ebb7SMarc Zyngier struct acpi_madt_generic_translator *its_entry; 5549c733ebb7SMarc Zyngier struct resource res; 5550c733ebb7SMarc Zyngier 5551c733ebb7SMarc Zyngier its_entry = (struct acpi_madt_generic_translator *)header; 5552c733ebb7SMarc Zyngier res = (struct resource) { 5553c733ebb7SMarc Zyngier .start = its_entry->base_address, 5554c733ebb7SMarc Zyngier .end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1, 5555c733ebb7SMarc Zyngier .flags = IORESOURCE_MEM, 5556c733ebb7SMarc Zyngier }; 5557c733ebb7SMarc Zyngier 5558c733ebb7SMarc Zyngier return its_reset_one(&res); 5559c733ebb7SMarc Zyngier } 5560c733ebb7SMarc Zyngier 55613f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 55623f010cf1STomasz Nowicki { 5563dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 5564c733ebb7SMarc Zyngier /* 5565c733ebb7SMarc Zyngier * Make sure *all* the ITS are reset before we probe any, as 5566c733ebb7SMarc Zyngier * they may be sharing memory. If any of the ITS fails to 5567c733ebb7SMarc Zyngier * reset, don't even try to go any further, as this could 5568c733ebb7SMarc Zyngier * result in something even worse. 5569c733ebb7SMarc Zyngier */ 5570c733ebb7SMarc Zyngier if (acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 5571c733ebb7SMarc Zyngier its_acpi_reset, 0) > 0) 55723f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 55733f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 5574fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 55753f010cf1STomasz Nowicki } 55763f010cf1STomasz Nowicki #else 55773f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 55783f010cf1STomasz Nowicki #endif 55793f010cf1STomasz Nowicki 5580d23bc2bcSValentin Schneider int __init its_lpi_memreserve_init(void) 5581d23bc2bcSValentin Schneider { 5582d23bc2bcSValentin Schneider int state; 5583d23bc2bcSValentin Schneider 5584d23bc2bcSValentin Schneider if (!efi_enabled(EFI_CONFIG_TABLES)) 5585d23bc2bcSValentin Schneider return 0; 5586d23bc2bcSValentin Schneider 5587eba1e44bSMarc Zyngier if (list_empty(&its_nodes)) 5588eba1e44bSMarc Zyngier return 0; 5589eba1e44bSMarc Zyngier 5590835f442fSValentin Schneider gic_rdists->cpuhp_memreserve_state = CPUHP_INVALID; 5591d23bc2bcSValentin Schneider state = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, 5592d23bc2bcSValentin Schneider "irqchip/arm/gicv3/memreserve:online", 5593d23bc2bcSValentin Schneider its_cpu_memreserve_lpi, 5594d23bc2bcSValentin Schneider NULL); 5595d23bc2bcSValentin Schneider if (state < 0) 5596d23bc2bcSValentin Schneider return state; 5597d23bc2bcSValentin Schneider 5598835f442fSValentin Schneider gic_rdists->cpuhp_memreserve_state = state; 5599835f442fSValentin Schneider 5600d23bc2bcSValentin Schneider return 0; 5601d23bc2bcSValentin Schneider } 5602d23bc2bcSValentin Schneider 5603db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 5604db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 5605db40f0a7STomasz Nowicki { 5606db40f0a7STomasz Nowicki struct device_node *of_node; 56078fff27aeSMarc Zyngier struct its_node *its; 56088fff27aeSMarc Zyngier bool has_v4 = false; 56093c40706dSMarc Zyngier bool has_v4_1 = false; 56108fff27aeSMarc Zyngier int err; 5611db40f0a7STomasz Nowicki 56125e516846SMarc Zyngier gic_rdists = rdists; 56135e516846SMarc Zyngier 5614db40f0a7STomasz Nowicki its_parent = parent_domain; 5615db40f0a7STomasz Nowicki of_node = to_of_node(handle); 5616db40f0a7STomasz Nowicki if (of_node) 5617db40f0a7STomasz Nowicki its_of_probe(of_node); 5618db40f0a7STomasz Nowicki else 56193f010cf1STomasz Nowicki its_acpi_probe(); 5620db40f0a7STomasz Nowicki 56214c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 56224c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 56234c21f3c2SMarc Zyngier return -ENXIO; 56244c21f3c2SMarc Zyngier } 56254c21f3c2SMarc Zyngier 562611e37d35SMarc Zyngier err = allocate_lpi_tables(); 56278fff27aeSMarc Zyngier if (err) 56288fff27aeSMarc Zyngier return err; 56298fff27aeSMarc Zyngier 56303c40706dSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 56310dd57fedSMarc Zyngier has_v4 |= is_v4(its); 56323c40706dSMarc Zyngier has_v4_1 |= is_v4_1(its); 56333c40706dSMarc Zyngier } 56343c40706dSMarc Zyngier 56353c40706dSMarc Zyngier /* Don't bother with inconsistent systems */ 56363c40706dSMarc Zyngier if (WARN_ON(!has_v4_1 && rdists->has_rvpeid)) 56373c40706dSMarc Zyngier rdists->has_rvpeid = false; 56388fff27aeSMarc Zyngier 56398fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 5640166cba71SMarc Zyngier const struct irq_domain_ops *sgi_ops; 5641166cba71SMarc Zyngier 5642166cba71SMarc Zyngier if (has_v4_1) 5643166cba71SMarc Zyngier sgi_ops = &its_sgi_domain_ops; 5644166cba71SMarc Zyngier else 5645166cba71SMarc Zyngier sgi_ops = NULL; 5646166cba71SMarc Zyngier 56473d63cb53SMarc Zyngier if (its_init_vpe_domain() || 5648166cba71SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops, sgi_ops)) { 56498fff27aeSMarc Zyngier rdists->has_vlpis = false; 56508fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 56518fff27aeSMarc Zyngier } 56528fff27aeSMarc Zyngier } 56538fff27aeSMarc Zyngier 5654dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 5655dba0bc7bSDerek Basehore 56568fff27aeSMarc Zyngier return 0; 56574c21f3c2SMarc Zyngier } 5658