1cc2d3216SMarc Zyngier /* 2d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 183f010cf1STomasz Nowicki #include <linux/acpi.h> 198d3554b8SHanjun Guo #include <linux/acpi_iort.h> 20cc2d3216SMarc Zyngier #include <linux/bitmap.h> 21cc2d3216SMarc Zyngier #include <linux/cpu.h> 22cc2d3216SMarc Zyngier #include <linux/delay.h> 2344bb7e24SRobin Murphy #include <linux/dma-iommu.h> 24cc2d3216SMarc Zyngier #include <linux/interrupt.h> 253f010cf1STomasz Nowicki #include <linux/irqdomain.h> 26cc2d3216SMarc Zyngier #include <linux/log2.h> 27cc2d3216SMarc Zyngier #include <linux/mm.h> 28cc2d3216SMarc Zyngier #include <linux/msi.h> 29cc2d3216SMarc Zyngier #include <linux/of.h> 30cc2d3216SMarc Zyngier #include <linux/of_address.h> 31cc2d3216SMarc Zyngier #include <linux/of_irq.h> 32cc2d3216SMarc Zyngier #include <linux/of_pci.h> 33cc2d3216SMarc Zyngier #include <linux/of_platform.h> 34cc2d3216SMarc Zyngier #include <linux/percpu.h> 35cc2d3216SMarc Zyngier #include <linux/slab.h> 36dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 37cc2d3216SMarc Zyngier 3841a83e06SJoel Porquet #include <linux/irqchip.h> 39cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 40c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 41cc2d3216SMarc Zyngier 42cc2d3216SMarc Zyngier #include <asm/cputype.h> 43cc2d3216SMarc Zyngier #include <asm/exception.h> 44cc2d3216SMarc Zyngier 4567510ccaSRobert Richter #include "irq-gic-common.h" 4667510ccaSRobert Richter 4794100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4894100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 49fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 50dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 51cc2d3216SMarc Zyngier 52c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 53c48ed51cSMarc Zyngier 54a13b0404SMarc Zyngier static u32 lpi_id_bits; 55a13b0404SMarc Zyngier 56a13b0404SMarc Zyngier /* 57a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 58a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 59a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 60a13b0404SMarc Zyngier */ 61a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 62a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 63a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 64a13b0404SMarc Zyngier 65a13b0404SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 66a13b0404SMarc Zyngier 67cc2d3216SMarc Zyngier /* 68cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 69cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 70cc2d3216SMarc Zyngier * CPU. 71cc2d3216SMarc Zyngier */ 72cc2d3216SMarc Zyngier struct its_collection { 73cc2d3216SMarc Zyngier u64 target_address; 74cc2d3216SMarc Zyngier u16 col_id; 75cc2d3216SMarc Zyngier }; 76cc2d3216SMarc Zyngier 77cc2d3216SMarc Zyngier /* 789347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 799347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 80466b7d16SShanker Donthineni */ 81466b7d16SShanker Donthineni struct its_baser { 82466b7d16SShanker Donthineni void *base; 83466b7d16SShanker Donthineni u64 val; 84466b7d16SShanker Donthineni u32 order; 859347359aSShanker Donthineni u32 psz; 86466b7d16SShanker Donthineni }; 87466b7d16SShanker Donthineni 88558b0165SArd Biesheuvel struct its_device; 89558b0165SArd Biesheuvel 90466b7d16SShanker Donthineni /* 91cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 92841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 93841514abSMarc Zyngier * list of devices writing to it. 94cc2d3216SMarc Zyngier */ 95cc2d3216SMarc Zyngier struct its_node { 96cc2d3216SMarc Zyngier raw_spinlock_t lock; 97cc2d3216SMarc Zyngier struct list_head entry; 98cc2d3216SMarc Zyngier void __iomem *base; 99db40f0a7STomasz Nowicki phys_addr_t phys_base; 100cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 101cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 102466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 103cc2d3216SMarc Zyngier struct its_collection *collections; 104558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 105558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 106dba0bc7bSDerek Basehore u64 cbaser_save; 107dba0bc7bSDerek Basehore u32 ctlr_save; 108cc2d3216SMarc Zyngier struct list_head its_device_list; 109cc2d3216SMarc Zyngier u64 flags; 110debf6d02SMarc Zyngier unsigned long list_nr; 111cc2d3216SMarc Zyngier u32 ite_size; 112466b7d16SShanker Donthineni u32 device_ids; 113fbf8f40eSGanapatrao Kulkarni int numa_node; 114558b0165SArd Biesheuvel unsigned int msi_domain_flags; 115558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1163dfa576bSMarc Zyngier bool is_v4; 1175c9a882eSMarc Zyngier int vlpi_redist_offset; 118cc2d3216SMarc Zyngier }; 119cc2d3216SMarc Zyngier 120cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 121cc2d3216SMarc Zyngier 12232bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 12332bd44dcSShanker Donthineni #define ITS_MAX_VPEID_BITS (16) 12432bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 12532bd44dcSShanker Donthineni 1262eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1272eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1282eca0d6cSShanker Donthineni 129591e5becSMarc Zyngier struct event_lpi_map { 130591e5becSMarc Zyngier unsigned long *lpi_map; 131591e5becSMarc Zyngier u16 *col_map; 132591e5becSMarc Zyngier irq_hw_number_t lpi_base; 133591e5becSMarc Zyngier int nr_lpis; 134d011e4e6SMarc Zyngier struct mutex vlpi_lock; 135d011e4e6SMarc Zyngier struct its_vm *vm; 136d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 137d011e4e6SMarc Zyngier int nr_vlpis; 138591e5becSMarc Zyngier }; 139591e5becSMarc Zyngier 140cc2d3216SMarc Zyngier /* 141d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 142d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 143d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 144d011e4e6SMarc Zyngier * indicates which one. 145cc2d3216SMarc Zyngier */ 146cc2d3216SMarc Zyngier struct its_device { 147cc2d3216SMarc Zyngier struct list_head entry; 148cc2d3216SMarc Zyngier struct its_node *its; 149591e5becSMarc Zyngier struct event_lpi_map event_map; 150cc2d3216SMarc Zyngier void *itt; 151cc2d3216SMarc Zyngier u32 nr_ites; 152cc2d3216SMarc Zyngier u32 device_id; 153cc2d3216SMarc Zyngier }; 154cc2d3216SMarc Zyngier 15520b3d54eSMarc Zyngier static struct { 15620b3d54eSMarc Zyngier raw_spinlock_t lock; 15720b3d54eSMarc Zyngier struct its_device *dev; 15820b3d54eSMarc Zyngier struct its_vpe **vpes; 15920b3d54eSMarc Zyngier int next_victim; 16020b3d54eSMarc Zyngier } vpe_proxy; 16120b3d54eSMarc Zyngier 1621ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 1631ac19ca6SMarc Zyngier static DEFINE_SPINLOCK(its_lock); 1641ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 165db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1661ac19ca6SMarc Zyngier 1673dfa576bSMarc Zyngier static unsigned long its_list_map; 1683171a47aSMarc Zyngier static u16 vmovp_seq_num; 1693171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1703171a47aSMarc Zyngier 1717d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1723dfa576bSMarc Zyngier 1731ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 1741ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 175e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1761ac19ca6SMarc Zyngier 177591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 178591e5becSMarc Zyngier u32 event) 179591e5becSMarc Zyngier { 180591e5becSMarc Zyngier struct its_node *its = its_dev->its; 181591e5becSMarc Zyngier 182591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 183591e5becSMarc Zyngier } 184591e5becSMarc Zyngier 185cc2d3216SMarc Zyngier /* 186cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 187cc2d3216SMarc Zyngier * block. 188cc2d3216SMarc Zyngier */ 189cc2d3216SMarc Zyngier struct its_cmd_desc { 190cc2d3216SMarc Zyngier union { 191cc2d3216SMarc Zyngier struct { 192cc2d3216SMarc Zyngier struct its_device *dev; 193cc2d3216SMarc Zyngier u32 event_id; 194cc2d3216SMarc Zyngier } its_inv_cmd; 195cc2d3216SMarc Zyngier 196cc2d3216SMarc Zyngier struct { 197cc2d3216SMarc Zyngier struct its_device *dev; 198cc2d3216SMarc Zyngier u32 event_id; 1998d85dcedSMarc Zyngier } its_clear_cmd; 2008d85dcedSMarc Zyngier 2018d85dcedSMarc Zyngier struct { 2028d85dcedSMarc Zyngier struct its_device *dev; 2038d85dcedSMarc Zyngier u32 event_id; 204cc2d3216SMarc Zyngier } its_int_cmd; 205cc2d3216SMarc Zyngier 206cc2d3216SMarc Zyngier struct { 207cc2d3216SMarc Zyngier struct its_device *dev; 208cc2d3216SMarc Zyngier int valid; 209cc2d3216SMarc Zyngier } its_mapd_cmd; 210cc2d3216SMarc Zyngier 211cc2d3216SMarc Zyngier struct { 212cc2d3216SMarc Zyngier struct its_collection *col; 213cc2d3216SMarc Zyngier int valid; 214cc2d3216SMarc Zyngier } its_mapc_cmd; 215cc2d3216SMarc Zyngier 216cc2d3216SMarc Zyngier struct { 217cc2d3216SMarc Zyngier struct its_device *dev; 218cc2d3216SMarc Zyngier u32 phys_id; 219cc2d3216SMarc Zyngier u32 event_id; 2206a25ad3aSMarc Zyngier } its_mapti_cmd; 221cc2d3216SMarc Zyngier 222cc2d3216SMarc Zyngier struct { 223cc2d3216SMarc Zyngier struct its_device *dev; 224cc2d3216SMarc Zyngier struct its_collection *col; 225591e5becSMarc Zyngier u32 event_id; 226cc2d3216SMarc Zyngier } its_movi_cmd; 227cc2d3216SMarc Zyngier 228cc2d3216SMarc Zyngier struct { 229cc2d3216SMarc Zyngier struct its_device *dev; 230cc2d3216SMarc Zyngier u32 event_id; 231cc2d3216SMarc Zyngier } its_discard_cmd; 232cc2d3216SMarc Zyngier 233cc2d3216SMarc Zyngier struct { 234cc2d3216SMarc Zyngier struct its_collection *col; 235cc2d3216SMarc Zyngier } its_invall_cmd; 236d011e4e6SMarc Zyngier 237d011e4e6SMarc Zyngier struct { 238d011e4e6SMarc Zyngier struct its_vpe *vpe; 239eb78192bSMarc Zyngier } its_vinvall_cmd; 240eb78192bSMarc Zyngier 241eb78192bSMarc Zyngier struct { 242eb78192bSMarc Zyngier struct its_vpe *vpe; 243eb78192bSMarc Zyngier struct its_collection *col; 244eb78192bSMarc Zyngier bool valid; 245eb78192bSMarc Zyngier } its_vmapp_cmd; 246eb78192bSMarc Zyngier 247eb78192bSMarc Zyngier struct { 248eb78192bSMarc Zyngier struct its_vpe *vpe; 249d011e4e6SMarc Zyngier struct its_device *dev; 250d011e4e6SMarc Zyngier u32 virt_id; 251d011e4e6SMarc Zyngier u32 event_id; 252d011e4e6SMarc Zyngier bool db_enabled; 253d011e4e6SMarc Zyngier } its_vmapti_cmd; 254d011e4e6SMarc Zyngier 255d011e4e6SMarc Zyngier struct { 256d011e4e6SMarc Zyngier struct its_vpe *vpe; 257d011e4e6SMarc Zyngier struct its_device *dev; 258d011e4e6SMarc Zyngier u32 event_id; 259d011e4e6SMarc Zyngier bool db_enabled; 260d011e4e6SMarc Zyngier } its_vmovi_cmd; 2613171a47aSMarc Zyngier 2623171a47aSMarc Zyngier struct { 2633171a47aSMarc Zyngier struct its_vpe *vpe; 2643171a47aSMarc Zyngier struct its_collection *col; 2653171a47aSMarc Zyngier u16 seq_num; 2663171a47aSMarc Zyngier u16 its_list; 2673171a47aSMarc Zyngier } its_vmovp_cmd; 268cc2d3216SMarc Zyngier }; 269cc2d3216SMarc Zyngier }; 270cc2d3216SMarc Zyngier 271cc2d3216SMarc Zyngier /* 272cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 273cc2d3216SMarc Zyngier */ 274cc2d3216SMarc Zyngier struct its_cmd_block { 275cc2d3216SMarc Zyngier u64 raw_cmd[4]; 276cc2d3216SMarc Zyngier }; 277cc2d3216SMarc Zyngier 278cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 279cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 280cc2d3216SMarc Zyngier 28167047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 28267047f90SMarc Zyngier struct its_cmd_block *, 283cc2d3216SMarc Zyngier struct its_cmd_desc *); 284cc2d3216SMarc Zyngier 28567047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 28667047f90SMarc Zyngier struct its_cmd_block *, 287d011e4e6SMarc Zyngier struct its_cmd_desc *); 288d011e4e6SMarc Zyngier 2894d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 2904d36f136SMarc Zyngier { 2914d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 2924d36f136SMarc Zyngier *raw_cmd &= ~mask; 2934d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 2944d36f136SMarc Zyngier } 2954d36f136SMarc Zyngier 296cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 297cc2d3216SMarc Zyngier { 2984d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 299cc2d3216SMarc Zyngier } 300cc2d3216SMarc Zyngier 301cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 302cc2d3216SMarc Zyngier { 3034d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 304cc2d3216SMarc Zyngier } 305cc2d3216SMarc Zyngier 306cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 307cc2d3216SMarc Zyngier { 3084d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 309cc2d3216SMarc Zyngier } 310cc2d3216SMarc Zyngier 311cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 312cc2d3216SMarc Zyngier { 3134d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 314cc2d3216SMarc Zyngier } 315cc2d3216SMarc Zyngier 316cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 317cc2d3216SMarc Zyngier { 3184d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 319cc2d3216SMarc Zyngier } 320cc2d3216SMarc Zyngier 321cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 322cc2d3216SMarc Zyngier { 32330ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 324cc2d3216SMarc Zyngier } 325cc2d3216SMarc Zyngier 326cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 327cc2d3216SMarc Zyngier { 3284d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 329cc2d3216SMarc Zyngier } 330cc2d3216SMarc Zyngier 331cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 332cc2d3216SMarc Zyngier { 33330ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 334cc2d3216SMarc Zyngier } 335cc2d3216SMarc Zyngier 336cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 337cc2d3216SMarc Zyngier { 3384d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 339cc2d3216SMarc Zyngier } 340cc2d3216SMarc Zyngier 341d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 342d011e4e6SMarc Zyngier { 343d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 344d011e4e6SMarc Zyngier } 345d011e4e6SMarc Zyngier 346d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 347d011e4e6SMarc Zyngier { 348d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 349d011e4e6SMarc Zyngier } 350d011e4e6SMarc Zyngier 351d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 352d011e4e6SMarc Zyngier { 353d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 354d011e4e6SMarc Zyngier } 355d011e4e6SMarc Zyngier 356d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 357d011e4e6SMarc Zyngier { 358d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 359d011e4e6SMarc Zyngier } 360d011e4e6SMarc Zyngier 3613171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 3623171a47aSMarc Zyngier { 3633171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 3643171a47aSMarc Zyngier } 3653171a47aSMarc Zyngier 3663171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 3673171a47aSMarc Zyngier { 3683171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 3693171a47aSMarc Zyngier } 3703171a47aSMarc Zyngier 371eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 372eb78192bSMarc Zyngier { 37330ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 374eb78192bSMarc Zyngier } 375eb78192bSMarc Zyngier 376eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 377eb78192bSMarc Zyngier { 378eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 379eb78192bSMarc Zyngier } 380eb78192bSMarc Zyngier 381cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 382cc2d3216SMarc Zyngier { 383cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 384cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 385cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 386cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 387cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 388cc2d3216SMarc Zyngier } 389cc2d3216SMarc Zyngier 39067047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 39167047f90SMarc Zyngier struct its_cmd_block *cmd, 392cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 393cc2d3216SMarc Zyngier { 394cc2d3216SMarc Zyngier unsigned long itt_addr; 395c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 396cc2d3216SMarc Zyngier 397cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 398cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 399cc2d3216SMarc Zyngier 400cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 401cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 402cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 403cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 404cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 405cc2d3216SMarc Zyngier 406cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 407cc2d3216SMarc Zyngier 408591e5becSMarc Zyngier return NULL; 409cc2d3216SMarc Zyngier } 410cc2d3216SMarc Zyngier 41167047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 41267047f90SMarc Zyngier struct its_cmd_block *cmd, 413cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 414cc2d3216SMarc Zyngier { 415cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 416cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 417cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 418cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 419cc2d3216SMarc Zyngier 420cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 421cc2d3216SMarc Zyngier 422cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 423cc2d3216SMarc Zyngier } 424cc2d3216SMarc Zyngier 42567047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 42667047f90SMarc Zyngier struct its_cmd_block *cmd, 427cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 428cc2d3216SMarc Zyngier { 429591e5becSMarc Zyngier struct its_collection *col; 430591e5becSMarc Zyngier 4316a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 4326a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 433591e5becSMarc Zyngier 4346a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 4356a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 4366a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 4376a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 438591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 439cc2d3216SMarc Zyngier 440cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 441cc2d3216SMarc Zyngier 442591e5becSMarc Zyngier return col; 443cc2d3216SMarc Zyngier } 444cc2d3216SMarc Zyngier 44567047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 44667047f90SMarc Zyngier struct its_cmd_block *cmd, 447cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 448cc2d3216SMarc Zyngier { 449591e5becSMarc Zyngier struct its_collection *col; 450591e5becSMarc Zyngier 451591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 452591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 453591e5becSMarc Zyngier 454cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 455cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 456591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 457cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 458cc2d3216SMarc Zyngier 459cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 460cc2d3216SMarc Zyngier 461591e5becSMarc Zyngier return col; 462cc2d3216SMarc Zyngier } 463cc2d3216SMarc Zyngier 46467047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 46567047f90SMarc Zyngier struct its_cmd_block *cmd, 466cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 467cc2d3216SMarc Zyngier { 468591e5becSMarc Zyngier struct its_collection *col; 469591e5becSMarc Zyngier 470591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 471591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 472591e5becSMarc Zyngier 473cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 474cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 475cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 476cc2d3216SMarc Zyngier 477cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 478cc2d3216SMarc Zyngier 479591e5becSMarc Zyngier return col; 480cc2d3216SMarc Zyngier } 481cc2d3216SMarc Zyngier 48267047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 48367047f90SMarc Zyngier struct its_cmd_block *cmd, 484cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 485cc2d3216SMarc Zyngier { 486591e5becSMarc Zyngier struct its_collection *col; 487591e5becSMarc Zyngier 488591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 489591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 490591e5becSMarc Zyngier 491cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 492cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 493cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 494cc2d3216SMarc Zyngier 495cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 496cc2d3216SMarc Zyngier 497591e5becSMarc Zyngier return col; 498cc2d3216SMarc Zyngier } 499cc2d3216SMarc Zyngier 50067047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 50167047f90SMarc Zyngier struct its_cmd_block *cmd, 5028d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5038d85dcedSMarc Zyngier { 5048d85dcedSMarc Zyngier struct its_collection *col; 5058d85dcedSMarc Zyngier 5068d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 5078d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 5088d85dcedSMarc Zyngier 5098d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 5108d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 5118d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 5128d85dcedSMarc Zyngier 5138d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5148d85dcedSMarc Zyngier 5158d85dcedSMarc Zyngier return col; 5168d85dcedSMarc Zyngier } 5178d85dcedSMarc Zyngier 51867047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 51967047f90SMarc Zyngier struct its_cmd_block *cmd, 5208d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5218d85dcedSMarc Zyngier { 5228d85dcedSMarc Zyngier struct its_collection *col; 5238d85dcedSMarc Zyngier 5248d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 5258d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 5268d85dcedSMarc Zyngier 5278d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 5288d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 5298d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 5308d85dcedSMarc Zyngier 5318d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5328d85dcedSMarc Zyngier 5338d85dcedSMarc Zyngier return col; 5348d85dcedSMarc Zyngier } 5358d85dcedSMarc Zyngier 53667047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 53767047f90SMarc Zyngier struct its_cmd_block *cmd, 538cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 539cc2d3216SMarc Zyngier { 540cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 541cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 542cc2d3216SMarc Zyngier 543cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 544cc2d3216SMarc Zyngier 545cc2d3216SMarc Zyngier return NULL; 546cc2d3216SMarc Zyngier } 547cc2d3216SMarc Zyngier 54867047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 54967047f90SMarc Zyngier struct its_cmd_block *cmd, 550eb78192bSMarc Zyngier struct its_cmd_desc *desc) 551eb78192bSMarc Zyngier { 552eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 553eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 554eb78192bSMarc Zyngier 555eb78192bSMarc Zyngier its_fixup_cmd(cmd); 556eb78192bSMarc Zyngier 557eb78192bSMarc Zyngier return desc->its_vinvall_cmd.vpe; 558eb78192bSMarc Zyngier } 559eb78192bSMarc Zyngier 56067047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 56167047f90SMarc Zyngier struct its_cmd_block *cmd, 562eb78192bSMarc Zyngier struct its_cmd_desc *desc) 563eb78192bSMarc Zyngier { 564eb78192bSMarc Zyngier unsigned long vpt_addr; 5655c9a882eSMarc Zyngier u64 target; 566eb78192bSMarc Zyngier 567eb78192bSMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 5685c9a882eSMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 569eb78192bSMarc Zyngier 570eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 571eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 572eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 5735c9a882eSMarc Zyngier its_encode_target(cmd, target); 574eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 575eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 576eb78192bSMarc Zyngier 577eb78192bSMarc Zyngier its_fixup_cmd(cmd); 578eb78192bSMarc Zyngier 579eb78192bSMarc Zyngier return desc->its_vmapp_cmd.vpe; 580eb78192bSMarc Zyngier } 581eb78192bSMarc Zyngier 58267047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 58367047f90SMarc Zyngier struct its_cmd_block *cmd, 584d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 585d011e4e6SMarc Zyngier { 586d011e4e6SMarc Zyngier u32 db; 587d011e4e6SMarc Zyngier 588d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 589d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 590d011e4e6SMarc Zyngier else 591d011e4e6SMarc Zyngier db = 1023; 592d011e4e6SMarc Zyngier 593d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 594d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 595d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 596d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 597d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 598d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 599d011e4e6SMarc Zyngier 600d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 601d011e4e6SMarc Zyngier 602d011e4e6SMarc Zyngier return desc->its_vmapti_cmd.vpe; 603d011e4e6SMarc Zyngier } 604d011e4e6SMarc Zyngier 60567047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 60667047f90SMarc Zyngier struct its_cmd_block *cmd, 607d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 608d011e4e6SMarc Zyngier { 609d011e4e6SMarc Zyngier u32 db; 610d011e4e6SMarc Zyngier 611d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 612d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 613d011e4e6SMarc Zyngier else 614d011e4e6SMarc Zyngier db = 1023; 615d011e4e6SMarc Zyngier 616d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 617d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 618d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 619d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 620d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 621d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 622d011e4e6SMarc Zyngier 623d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 624d011e4e6SMarc Zyngier 625d011e4e6SMarc Zyngier return desc->its_vmovi_cmd.vpe; 626d011e4e6SMarc Zyngier } 627d011e4e6SMarc Zyngier 62867047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 62967047f90SMarc Zyngier struct its_cmd_block *cmd, 6303171a47aSMarc Zyngier struct its_cmd_desc *desc) 6313171a47aSMarc Zyngier { 6325c9a882eSMarc Zyngier u64 target; 6335c9a882eSMarc Zyngier 6345c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 6353171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 6363171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 6373171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 6383171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 6395c9a882eSMarc Zyngier its_encode_target(cmd, target); 6403171a47aSMarc Zyngier 6413171a47aSMarc Zyngier its_fixup_cmd(cmd); 6423171a47aSMarc Zyngier 6433171a47aSMarc Zyngier return desc->its_vmovp_cmd.vpe; 6443171a47aSMarc Zyngier } 6453171a47aSMarc Zyngier 646cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 647cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 648cc2d3216SMarc Zyngier { 649cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 650cc2d3216SMarc Zyngier } 651cc2d3216SMarc Zyngier 652cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 653cc2d3216SMarc Zyngier { 654cc2d3216SMarc Zyngier int widx; 655cc2d3216SMarc Zyngier int ridx; 656cc2d3216SMarc Zyngier 657cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 658cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 659cc2d3216SMarc Zyngier 660cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 661cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 662cc2d3216SMarc Zyngier return 1; 663cc2d3216SMarc Zyngier 664cc2d3216SMarc Zyngier return 0; 665cc2d3216SMarc Zyngier } 666cc2d3216SMarc Zyngier 667cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 668cc2d3216SMarc Zyngier { 669cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 670cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 671cc2d3216SMarc Zyngier 672cc2d3216SMarc Zyngier while (its_queue_full(its)) { 673cc2d3216SMarc Zyngier count--; 674cc2d3216SMarc Zyngier if (!count) { 675cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 676cc2d3216SMarc Zyngier return NULL; 677cc2d3216SMarc Zyngier } 678cc2d3216SMarc Zyngier cpu_relax(); 679cc2d3216SMarc Zyngier udelay(1); 680cc2d3216SMarc Zyngier } 681cc2d3216SMarc Zyngier 682cc2d3216SMarc Zyngier cmd = its->cmd_write++; 683cc2d3216SMarc Zyngier 684cc2d3216SMarc Zyngier /* Handle queue wrapping */ 685cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 686cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 687cc2d3216SMarc Zyngier 68834d677a9SMarc Zyngier /* Clear command */ 68934d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 69034d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 69134d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 69234d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 69334d677a9SMarc Zyngier 694cc2d3216SMarc Zyngier return cmd; 695cc2d3216SMarc Zyngier } 696cc2d3216SMarc Zyngier 697cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 698cc2d3216SMarc Zyngier { 699cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 700cc2d3216SMarc Zyngier 701cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 702cc2d3216SMarc Zyngier 703cc2d3216SMarc Zyngier return its->cmd_write; 704cc2d3216SMarc Zyngier } 705cc2d3216SMarc Zyngier 706cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 707cc2d3216SMarc Zyngier { 708cc2d3216SMarc Zyngier /* 709cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 710cc2d3216SMarc Zyngier * the ITS. 711cc2d3216SMarc Zyngier */ 712cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 713328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 714cc2d3216SMarc Zyngier else 715cc2d3216SMarc Zyngier dsb(ishst); 716cc2d3216SMarc Zyngier } 717cc2d3216SMarc Zyngier 718a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 719cc2d3216SMarc Zyngier struct its_cmd_block *from, 720cc2d3216SMarc Zyngier struct its_cmd_block *to) 721cc2d3216SMarc Zyngier { 722cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 723cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 724cc2d3216SMarc Zyngier 725cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 726cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 727cc2d3216SMarc Zyngier 728cc2d3216SMarc Zyngier while (1) { 729cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 7309bdd8b1cSMarc Zyngier 7319bdd8b1cSMarc Zyngier /* Direct case */ 7329bdd8b1cSMarc Zyngier if (from_idx < to_idx && rd_idx >= to_idx) 7339bdd8b1cSMarc Zyngier break; 7349bdd8b1cSMarc Zyngier 7359bdd8b1cSMarc Zyngier /* Wrapped case */ 7369bdd8b1cSMarc Zyngier if (from_idx >= to_idx && rd_idx >= to_idx && rd_idx < from_idx) 737cc2d3216SMarc Zyngier break; 738cc2d3216SMarc Zyngier 739cc2d3216SMarc Zyngier count--; 740cc2d3216SMarc Zyngier if (!count) { 741a19b462fSMarc Zyngier pr_err_ratelimited("ITS queue timeout (%llu %llu %llu)\n", 742a19b462fSMarc Zyngier from_idx, to_idx, rd_idx); 743a19b462fSMarc Zyngier return -1; 744cc2d3216SMarc Zyngier } 745cc2d3216SMarc Zyngier cpu_relax(); 746cc2d3216SMarc Zyngier udelay(1); 747cc2d3216SMarc Zyngier } 748a19b462fSMarc Zyngier 749a19b462fSMarc Zyngier return 0; 750cc2d3216SMarc Zyngier } 751cc2d3216SMarc Zyngier 752e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 753e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 754e4f9094bSMarc Zyngier void name(struct its_node *its, \ 755e4f9094bSMarc Zyngier buildtype builder, \ 756e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 757e4f9094bSMarc Zyngier { \ 758e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 759e4f9094bSMarc Zyngier synctype *sync_obj; \ 760e4f9094bSMarc Zyngier unsigned long flags; \ 761e4f9094bSMarc Zyngier \ 762e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 763e4f9094bSMarc Zyngier \ 764e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 765e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 766e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 767e4f9094bSMarc Zyngier return; \ 768e4f9094bSMarc Zyngier } \ 76967047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 770e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 771e4f9094bSMarc Zyngier \ 772e4f9094bSMarc Zyngier if (sync_obj) { \ 773e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 774e4f9094bSMarc Zyngier if (!sync_cmd) \ 775e4f9094bSMarc Zyngier goto post; \ 776e4f9094bSMarc Zyngier \ 77767047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 778e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 779e4f9094bSMarc Zyngier } \ 780e4f9094bSMarc Zyngier \ 781e4f9094bSMarc Zyngier post: \ 782e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 783e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 784e4f9094bSMarc Zyngier \ 785a19b462fSMarc Zyngier if (its_wait_for_range_completion(its, cmd, next_cmd)) \ 786a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 787e4f9094bSMarc Zyngier } 788e4f9094bSMarc Zyngier 78967047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 79067047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 791e4f9094bSMarc Zyngier struct its_collection *sync_col) 792cc2d3216SMarc Zyngier { 793cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 794cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 795e4f9094bSMarc Zyngier 796cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 797cc2d3216SMarc Zyngier } 798cc2d3216SMarc Zyngier 799e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 800e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 801cc2d3216SMarc Zyngier 80267047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 80367047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 804d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 805d011e4e6SMarc Zyngier { 806d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 807d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 808d011e4e6SMarc Zyngier 809d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 810d011e4e6SMarc Zyngier } 811d011e4e6SMarc Zyngier 812d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 813d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 814d011e4e6SMarc Zyngier 8158d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 8168d85dcedSMarc Zyngier { 8178d85dcedSMarc Zyngier struct its_cmd_desc desc; 8188d85dcedSMarc Zyngier 8198d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 8208d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 8218d85dcedSMarc Zyngier 8228d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 8238d85dcedSMarc Zyngier } 8248d85dcedSMarc Zyngier 8258d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 8268d85dcedSMarc Zyngier { 8278d85dcedSMarc Zyngier struct its_cmd_desc desc; 8288d85dcedSMarc Zyngier 8298d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 8308d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 8318d85dcedSMarc Zyngier 8328d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 833cc2d3216SMarc Zyngier } 834cc2d3216SMarc Zyngier 835cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 836cc2d3216SMarc Zyngier { 837cc2d3216SMarc Zyngier struct its_cmd_desc desc; 838cc2d3216SMarc Zyngier 839cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 840cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 841cc2d3216SMarc Zyngier 842cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 843cc2d3216SMarc Zyngier } 844cc2d3216SMarc Zyngier 845cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 846cc2d3216SMarc Zyngier { 847cc2d3216SMarc Zyngier struct its_cmd_desc desc; 848cc2d3216SMarc Zyngier 849cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 850cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 851cc2d3216SMarc Zyngier 852cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 853cc2d3216SMarc Zyngier } 854cc2d3216SMarc Zyngier 855cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 856cc2d3216SMarc Zyngier int valid) 857cc2d3216SMarc Zyngier { 858cc2d3216SMarc Zyngier struct its_cmd_desc desc; 859cc2d3216SMarc Zyngier 860cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 861cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 862cc2d3216SMarc Zyngier 863cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 864cc2d3216SMarc Zyngier } 865cc2d3216SMarc Zyngier 8666a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 867cc2d3216SMarc Zyngier { 868cc2d3216SMarc Zyngier struct its_cmd_desc desc; 869cc2d3216SMarc Zyngier 8706a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 8716a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 8726a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 873cc2d3216SMarc Zyngier 8746a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 875cc2d3216SMarc Zyngier } 876cc2d3216SMarc Zyngier 877cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 878cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 879cc2d3216SMarc Zyngier { 880cc2d3216SMarc Zyngier struct its_cmd_desc desc; 881cc2d3216SMarc Zyngier 882cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 883cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 884591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 885cc2d3216SMarc Zyngier 886cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 887cc2d3216SMarc Zyngier } 888cc2d3216SMarc Zyngier 889cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 890cc2d3216SMarc Zyngier { 891cc2d3216SMarc Zyngier struct its_cmd_desc desc; 892cc2d3216SMarc Zyngier 893cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 894cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 895cc2d3216SMarc Zyngier 896cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 897cc2d3216SMarc Zyngier } 898cc2d3216SMarc Zyngier 899cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 900cc2d3216SMarc Zyngier { 901cc2d3216SMarc Zyngier struct its_cmd_desc desc; 902cc2d3216SMarc Zyngier 903cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 904cc2d3216SMarc Zyngier 905cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 906cc2d3216SMarc Zyngier } 907c48ed51cSMarc Zyngier 908d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 909d011e4e6SMarc Zyngier { 910d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 911d011e4e6SMarc Zyngier struct its_cmd_desc desc; 912d011e4e6SMarc Zyngier 913d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 914d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 915d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 916d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 917d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 918d011e4e6SMarc Zyngier 919d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 920d011e4e6SMarc Zyngier } 921d011e4e6SMarc Zyngier 922d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 923d011e4e6SMarc Zyngier { 924d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 925d011e4e6SMarc Zyngier struct its_cmd_desc desc; 926d011e4e6SMarc Zyngier 927d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 928d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 929d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 930d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 931d011e4e6SMarc Zyngier 932d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 933d011e4e6SMarc Zyngier } 934d011e4e6SMarc Zyngier 93575fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 93675fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 937eb78192bSMarc Zyngier { 938eb78192bSMarc Zyngier struct its_cmd_desc desc; 939eb78192bSMarc Zyngier 940eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 941eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 942eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 94375fd951bSMarc Zyngier 944eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 945eb78192bSMarc Zyngier } 946eb78192bSMarc Zyngier 9473171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 9483171a47aSMarc Zyngier { 9493171a47aSMarc Zyngier struct its_cmd_desc desc; 9503171a47aSMarc Zyngier struct its_node *its; 9513171a47aSMarc Zyngier unsigned long flags; 9523171a47aSMarc Zyngier int col_id = vpe->col_idx; 9533171a47aSMarc Zyngier 9543171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 9553171a47aSMarc Zyngier desc.its_vmovp_cmd.its_list = (u16)its_list_map; 9563171a47aSMarc Zyngier 9573171a47aSMarc Zyngier if (!its_list_map) { 9583171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 9593171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = 0; 9603171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9613171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9623171a47aSMarc Zyngier return; 9633171a47aSMarc Zyngier } 9643171a47aSMarc Zyngier 9653171a47aSMarc Zyngier /* 9663171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 9673171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 9683171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 9693171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 9703171a47aSMarc Zyngier * 9713171a47aSMarc Zyngier * Wall <-- Head. 9723171a47aSMarc Zyngier */ 9733171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 9743171a47aSMarc Zyngier 9753171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 9763171a47aSMarc Zyngier 9773171a47aSMarc Zyngier /* Emit VMOVPs */ 9783171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 9793171a47aSMarc Zyngier if (!its->is_v4) 9803171a47aSMarc Zyngier continue; 9813171a47aSMarc Zyngier 9822247e1bfSMarc Zyngier if (!vpe->its_vm->vlpi_count[its->list_nr]) 9832247e1bfSMarc Zyngier continue; 9842247e1bfSMarc Zyngier 9853171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9863171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9873171a47aSMarc Zyngier } 9883171a47aSMarc Zyngier 9893171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 9903171a47aSMarc Zyngier } 9913171a47aSMarc Zyngier 99240619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 993eb78192bSMarc Zyngier { 994eb78192bSMarc Zyngier struct its_cmd_desc desc; 995eb78192bSMarc Zyngier 996eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 997eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 998eb78192bSMarc Zyngier } 999eb78192bSMarc Zyngier 1000c48ed51cSMarc Zyngier /* 1001c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1002c48ed51cSMarc Zyngier */ 1003c48ed51cSMarc Zyngier 1004c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 1005c48ed51cSMarc Zyngier { 1006c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1007591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 1008c48ed51cSMarc Zyngier } 1009c48ed51cSMarc Zyngier 1010015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1011c48ed51cSMarc Zyngier { 1012015ec038SMarc Zyngier irq_hw_number_t hwirq; 1013adcdb94eSMarc Zyngier struct page *prop_page; 1014adcdb94eSMarc Zyngier u8 *cfg; 1015c48ed51cSMarc Zyngier 1016015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1017015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1018015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1019d4d7b4adSMarc Zyngier struct its_vlpi_map *map; 1020015ec038SMarc Zyngier 1021015ec038SMarc Zyngier prop_page = its_dev->event_map.vm->vprop_page; 1022d4d7b4adSMarc Zyngier map = &its_dev->event_map.vlpi_maps[event]; 1023d4d7b4adSMarc Zyngier hwirq = map->vintid; 1024d4d7b4adSMarc Zyngier 1025d4d7b4adSMarc Zyngier /* Remember the updated property */ 1026d4d7b4adSMarc Zyngier map->properties &= ~clr; 1027d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1028015ec038SMarc Zyngier } else { 1029adcdb94eSMarc Zyngier prop_page = gic_rdists->prop_page; 1030015ec038SMarc Zyngier hwirq = d->hwirq; 1031015ec038SMarc Zyngier } 1032adcdb94eSMarc Zyngier 1033adcdb94eSMarc Zyngier cfg = page_address(prop_page) + hwirq - 8192; 1034adcdb94eSMarc Zyngier *cfg &= ~clr; 1035015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1036c48ed51cSMarc Zyngier 1037c48ed51cSMarc Zyngier /* 1038c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1039c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1040c48ed51cSMarc Zyngier * Humpf... 1041c48ed51cSMarc Zyngier */ 1042c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1043328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1044c48ed51cSMarc Zyngier else 1045c48ed51cSMarc Zyngier dsb(ishst); 1046015ec038SMarc Zyngier } 1047015ec038SMarc Zyngier 1048015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1049015ec038SMarc Zyngier { 1050015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1051015ec038SMarc Zyngier 1052015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1053adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 1054c48ed51cSMarc Zyngier } 1055c48ed51cSMarc Zyngier 1056015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1057015ec038SMarc Zyngier { 1058015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1059015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1060015ec038SMarc Zyngier 1061015ec038SMarc Zyngier if (its_dev->event_map.vlpi_maps[event].db_enabled == enable) 1062015ec038SMarc Zyngier return; 1063015ec038SMarc Zyngier 1064015ec038SMarc Zyngier its_dev->event_map.vlpi_maps[event].db_enabled = enable; 1065015ec038SMarc Zyngier 1066015ec038SMarc Zyngier /* 1067015ec038SMarc Zyngier * More fun with the architecture: 1068015ec038SMarc Zyngier * 1069015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1070015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1071015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1072015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1073015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1074015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1075015ec038SMarc Zyngier */ 1076015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1077c48ed51cSMarc Zyngier } 1078c48ed51cSMarc Zyngier 1079c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1080c48ed51cSMarc Zyngier { 1081015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1082015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1083015ec038SMarc Zyngier 1084adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1085c48ed51cSMarc Zyngier } 1086c48ed51cSMarc Zyngier 1087c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1088c48ed51cSMarc Zyngier { 1089015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1090015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1091015ec038SMarc Zyngier 1092adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1093c48ed51cSMarc Zyngier } 1094c48ed51cSMarc Zyngier 1095c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1096c48ed51cSMarc Zyngier bool force) 1097c48ed51cSMarc Zyngier { 1098fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1099fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1100c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1101c48ed51cSMarc Zyngier struct its_collection *target_col; 1102c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1103c48ed51cSMarc Zyngier 1104015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1105015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1106015ec038SMarc Zyngier return -EINVAL; 1107015ec038SMarc Zyngier 1108fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1109fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1110fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1111fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1112fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1113fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1114fbf8f40eSGanapatrao Kulkarni } 1115fbf8f40eSGanapatrao Kulkarni } 1116fbf8f40eSGanapatrao Kulkarni 1117fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1118fbf8f40eSGanapatrao Kulkarni 1119c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1120c48ed51cSMarc Zyngier return -EINVAL; 1121c48ed51cSMarc Zyngier 11228b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 11238b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1124c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1125c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1126591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 11270d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 11288b8d94a7SMaJun } 1129c48ed51cSMarc Zyngier 1130c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1131c48ed51cSMarc Zyngier } 1132c48ed51cSMarc Zyngier 1133558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1134558b0165SArd Biesheuvel { 1135558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1136558b0165SArd Biesheuvel 1137558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1138558b0165SArd Biesheuvel } 1139558b0165SArd Biesheuvel 1140b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1141b48ac83dSMarc Zyngier { 1142b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1143b48ac83dSMarc Zyngier struct its_node *its; 1144b48ac83dSMarc Zyngier u64 addr; 1145b48ac83dSMarc Zyngier 1146b48ac83dSMarc Zyngier its = its_dev->its; 1147558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1148b48ac83dSMarc Zyngier 1149b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1150b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1151b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 115244bb7e24SRobin Murphy 115344bb7e24SRobin Murphy iommu_dma_map_msi_msg(d->irq, msg); 1154b48ac83dSMarc Zyngier } 1155b48ac83dSMarc Zyngier 11568d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 11578d85dcedSMarc Zyngier enum irqchip_irq_state which, 11588d85dcedSMarc Zyngier bool state) 11598d85dcedSMarc Zyngier { 11608d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 11618d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 11628d85dcedSMarc Zyngier 11638d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 11648d85dcedSMarc Zyngier return -EINVAL; 11658d85dcedSMarc Zyngier 11668d85dcedSMarc Zyngier if (state) 11678d85dcedSMarc Zyngier its_send_int(its_dev, event); 11688d85dcedSMarc Zyngier else 11698d85dcedSMarc Zyngier its_send_clear(its_dev, event); 11708d85dcedSMarc Zyngier 11718d85dcedSMarc Zyngier return 0; 11728d85dcedSMarc Zyngier } 11738d85dcedSMarc Zyngier 11742247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 11752247e1bfSMarc Zyngier { 11762247e1bfSMarc Zyngier unsigned long flags; 11772247e1bfSMarc Zyngier 11782247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 11792247e1bfSMarc Zyngier if (!its_list_map) 11802247e1bfSMarc Zyngier return; 11812247e1bfSMarc Zyngier 11822247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 11832247e1bfSMarc Zyngier 11842247e1bfSMarc Zyngier /* 11852247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 11862247e1bfSMarc Zyngier * them mapped now. 11872247e1bfSMarc Zyngier */ 11882247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 11892247e1bfSMarc Zyngier 11902247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 11912247e1bfSMarc Zyngier int i; 11922247e1bfSMarc Zyngier 11932247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 11942247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 119544c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 11962247e1bfSMarc Zyngier 11972247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 11982247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 11992247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 12002247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 120144c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 12022247e1bfSMarc Zyngier } 12032247e1bfSMarc Zyngier } 12042247e1bfSMarc Zyngier 12052247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12062247e1bfSMarc Zyngier } 12072247e1bfSMarc Zyngier 12082247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 12092247e1bfSMarc Zyngier { 12102247e1bfSMarc Zyngier unsigned long flags; 12112247e1bfSMarc Zyngier 12122247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12132247e1bfSMarc Zyngier if (!its_list_map) 12142247e1bfSMarc Zyngier return; 12152247e1bfSMarc Zyngier 12162247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12172247e1bfSMarc Zyngier 12182247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 12192247e1bfSMarc Zyngier int i; 12202247e1bfSMarc Zyngier 12212247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 12222247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 12232247e1bfSMarc Zyngier } 12242247e1bfSMarc Zyngier 12252247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12262247e1bfSMarc Zyngier } 12272247e1bfSMarc Zyngier 1228d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1229d011e4e6SMarc Zyngier { 1230d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1231d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1232d011e4e6SMarc Zyngier int ret = 0; 1233d011e4e6SMarc Zyngier 1234d011e4e6SMarc Zyngier if (!info->map) 1235d011e4e6SMarc Zyngier return -EINVAL; 1236d011e4e6SMarc Zyngier 1237d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1238d011e4e6SMarc Zyngier 1239d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1240d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1241d011e4e6SMarc Zyngier 1242d011e4e6SMarc Zyngier maps = kzalloc(sizeof(*maps) * its_dev->event_map.nr_lpis, 1243d011e4e6SMarc Zyngier GFP_KERNEL); 1244d011e4e6SMarc Zyngier if (!maps) { 1245d011e4e6SMarc Zyngier ret = -ENOMEM; 1246d011e4e6SMarc Zyngier goto out; 1247d011e4e6SMarc Zyngier } 1248d011e4e6SMarc Zyngier 1249d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1250d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1251d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1252d011e4e6SMarc Zyngier ret = -EINVAL; 1253d011e4e6SMarc Zyngier goto out; 1254d011e4e6SMarc Zyngier } 1255d011e4e6SMarc Zyngier 1256d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1257d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1258d011e4e6SMarc Zyngier 1259d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1260d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1261d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1262d011e4e6SMarc Zyngier } else { 12632247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 12642247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 12652247e1bfSMarc Zyngier 1266d4d7b4adSMarc Zyngier /* 1267d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1268d4d7b4adSMarc Zyngier * start poking the virtual property table. 1269d4d7b4adSMarc Zyngier */ 1270d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1271d4d7b4adSMarc Zyngier 1272d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1273d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1274d4d7b4adSMarc Zyngier 1275d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1276d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1277d011e4e6SMarc Zyngier 1278d011e4e6SMarc Zyngier /* and install the virtual one */ 1279d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1280d011e4e6SMarc Zyngier 1281d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1282d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1283d011e4e6SMarc Zyngier } 1284d011e4e6SMarc Zyngier 1285d011e4e6SMarc Zyngier out: 1286d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1287d011e4e6SMarc Zyngier return ret; 1288d011e4e6SMarc Zyngier } 1289d011e4e6SMarc Zyngier 1290d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1291d011e4e6SMarc Zyngier { 1292d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1293d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1294d011e4e6SMarc Zyngier int ret = 0; 1295d011e4e6SMarc Zyngier 1296d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1297d011e4e6SMarc Zyngier 1298d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || 1299d011e4e6SMarc Zyngier !its_dev->event_map.vlpi_maps[event].vm) { 1300d011e4e6SMarc Zyngier ret = -EINVAL; 1301d011e4e6SMarc Zyngier goto out; 1302d011e4e6SMarc Zyngier } 1303d011e4e6SMarc Zyngier 1304d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1305d011e4e6SMarc Zyngier *info->map = its_dev->event_map.vlpi_maps[event]; 1306d011e4e6SMarc Zyngier 1307d011e4e6SMarc Zyngier out: 1308d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1309d011e4e6SMarc Zyngier return ret; 1310d011e4e6SMarc Zyngier } 1311d011e4e6SMarc Zyngier 1312d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1313d011e4e6SMarc Zyngier { 1314d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1315d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1316d011e4e6SMarc Zyngier int ret = 0; 1317d011e4e6SMarc Zyngier 1318d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1319d011e4e6SMarc Zyngier 1320d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1321d011e4e6SMarc Zyngier ret = -EINVAL; 1322d011e4e6SMarc Zyngier goto out; 1323d011e4e6SMarc Zyngier } 1324d011e4e6SMarc Zyngier 1325d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1326d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1327d011e4e6SMarc Zyngier 1328d011e4e6SMarc Zyngier /* and restore the physical one */ 1329d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1330d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1331d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1332d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1333d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1334d011e4e6SMarc Zyngier 13352247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 13362247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 13372247e1bfSMarc Zyngier 1338d011e4e6SMarc Zyngier /* 1339d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1340d011e4e6SMarc Zyngier * this was the last VLPI. 1341d011e4e6SMarc Zyngier */ 1342d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1343d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1344d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1345d011e4e6SMarc Zyngier } 1346d011e4e6SMarc Zyngier 1347d011e4e6SMarc Zyngier out: 1348d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1349d011e4e6SMarc Zyngier return ret; 1350d011e4e6SMarc Zyngier } 1351d011e4e6SMarc Zyngier 1352015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1353015ec038SMarc Zyngier { 1354015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1355015ec038SMarc Zyngier 1356015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1357015ec038SMarc Zyngier return -EINVAL; 1358015ec038SMarc Zyngier 1359015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1360015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1361015ec038SMarc Zyngier else 1362015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1363015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1364015ec038SMarc Zyngier 1365015ec038SMarc Zyngier return 0; 1366015ec038SMarc Zyngier } 1367015ec038SMarc Zyngier 1368c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1369c808eea8SMarc Zyngier { 1370c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1371c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1372c808eea8SMarc Zyngier 1373c808eea8SMarc Zyngier /* Need a v4 ITS */ 1374d011e4e6SMarc Zyngier if (!its_dev->its->is_v4) 1375c808eea8SMarc Zyngier return -EINVAL; 1376c808eea8SMarc Zyngier 1377d011e4e6SMarc Zyngier /* Unmap request? */ 1378d011e4e6SMarc Zyngier if (!info) 1379d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1380d011e4e6SMarc Zyngier 1381c808eea8SMarc Zyngier switch (info->cmd_type) { 1382c808eea8SMarc Zyngier case MAP_VLPI: 1383d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1384c808eea8SMarc Zyngier 1385c808eea8SMarc Zyngier case GET_VLPI: 1386d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1387c808eea8SMarc Zyngier 1388c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1389c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1390015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1391c808eea8SMarc Zyngier 1392c808eea8SMarc Zyngier default: 1393c808eea8SMarc Zyngier return -EINVAL; 1394c808eea8SMarc Zyngier } 1395c808eea8SMarc Zyngier } 1396c808eea8SMarc Zyngier 1397c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1398c48ed51cSMarc Zyngier .name = "ITS", 1399c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1400c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1401004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1402c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1403b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 14048d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1405c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1406b48ac83dSMarc Zyngier }; 1407b48ac83dSMarc Zyngier 1408bf9529f8SMarc Zyngier /* 1409bf9529f8SMarc Zyngier * How we allocate LPIs: 1410bf9529f8SMarc Zyngier * 1411bf9529f8SMarc Zyngier * The GIC has id_bits bits for interrupt identifiers. From there, we 1412bf9529f8SMarc Zyngier * must subtract 8192 which are reserved for SGIs/PPIs/SPIs. Then, as 1413bf9529f8SMarc Zyngier * we allocate LPIs by chunks of 32, we can shift the whole thing by 5 1414bf9529f8SMarc Zyngier * bits to the right. 1415bf9529f8SMarc Zyngier * 1416bf9529f8SMarc Zyngier * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations. 1417bf9529f8SMarc Zyngier */ 1418bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK_SHIFT 5 1419bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK (1 << IRQS_PER_CHUNK_SHIFT) 14206c31e123SShanker Donthineni #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1421bf9529f8SMarc Zyngier 1422bf9529f8SMarc Zyngier static unsigned long *lpi_bitmap; 1423bf9529f8SMarc Zyngier static u32 lpi_chunks; 1424bf9529f8SMarc Zyngier static DEFINE_SPINLOCK(lpi_lock); 1425bf9529f8SMarc Zyngier 1426bf9529f8SMarc Zyngier static int its_lpi_to_chunk(int lpi) 1427bf9529f8SMarc Zyngier { 1428bf9529f8SMarc Zyngier return (lpi - 8192) >> IRQS_PER_CHUNK_SHIFT; 1429bf9529f8SMarc Zyngier } 1430bf9529f8SMarc Zyngier 1431bf9529f8SMarc Zyngier static int its_chunk_to_lpi(int chunk) 1432bf9529f8SMarc Zyngier { 1433bf9529f8SMarc Zyngier return (chunk << IRQS_PER_CHUNK_SHIFT) + 8192; 1434bf9529f8SMarc Zyngier } 1435bf9529f8SMarc Zyngier 143604a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1437bf9529f8SMarc Zyngier { 1438bf9529f8SMarc Zyngier lpi_chunks = its_lpi_to_chunk(1UL << id_bits); 1439bf9529f8SMarc Zyngier 1440bf9529f8SMarc Zyngier lpi_bitmap = kzalloc(BITS_TO_LONGS(lpi_chunks) * sizeof(long), 1441bf9529f8SMarc Zyngier GFP_KERNEL); 1442bf9529f8SMarc Zyngier if (!lpi_bitmap) { 1443bf9529f8SMarc Zyngier lpi_chunks = 0; 1444bf9529f8SMarc Zyngier return -ENOMEM; 1445bf9529f8SMarc Zyngier } 1446bf9529f8SMarc Zyngier 1447bf9529f8SMarc Zyngier pr_info("ITS: Allocated %d chunks for LPIs\n", (int)lpi_chunks); 1448bf9529f8SMarc Zyngier return 0; 1449bf9529f8SMarc Zyngier } 1450bf9529f8SMarc Zyngier 1451bf9529f8SMarc Zyngier static unsigned long *its_lpi_alloc_chunks(int nr_irqs, int *base, int *nr_ids) 1452bf9529f8SMarc Zyngier { 1453bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1454bf9529f8SMarc Zyngier int chunk_id; 1455bf9529f8SMarc Zyngier int nr_chunks; 1456bf9529f8SMarc Zyngier int i; 1457bf9529f8SMarc Zyngier 1458bf9529f8SMarc Zyngier nr_chunks = DIV_ROUND_UP(nr_irqs, IRQS_PER_CHUNK); 1459bf9529f8SMarc Zyngier 1460bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 1461bf9529f8SMarc Zyngier 1462bf9529f8SMarc Zyngier do { 1463bf9529f8SMarc Zyngier chunk_id = bitmap_find_next_zero_area(lpi_bitmap, lpi_chunks, 1464bf9529f8SMarc Zyngier 0, nr_chunks, 0); 1465bf9529f8SMarc Zyngier if (chunk_id < lpi_chunks) 1466bf9529f8SMarc Zyngier break; 1467bf9529f8SMarc Zyngier 1468bf9529f8SMarc Zyngier nr_chunks--; 1469bf9529f8SMarc Zyngier } while (nr_chunks > 0); 1470bf9529f8SMarc Zyngier 1471bf9529f8SMarc Zyngier if (!nr_chunks) 1472bf9529f8SMarc Zyngier goto out; 1473bf9529f8SMarc Zyngier 1474bf9529f8SMarc Zyngier bitmap = kzalloc(BITS_TO_LONGS(nr_chunks * IRQS_PER_CHUNK) * sizeof (long), 1475bf9529f8SMarc Zyngier GFP_ATOMIC); 1476bf9529f8SMarc Zyngier if (!bitmap) 1477bf9529f8SMarc Zyngier goto out; 1478bf9529f8SMarc Zyngier 1479bf9529f8SMarc Zyngier for (i = 0; i < nr_chunks; i++) 1480bf9529f8SMarc Zyngier set_bit(chunk_id + i, lpi_bitmap); 1481bf9529f8SMarc Zyngier 1482bf9529f8SMarc Zyngier *base = its_chunk_to_lpi(chunk_id); 1483bf9529f8SMarc Zyngier *nr_ids = nr_chunks * IRQS_PER_CHUNK; 1484bf9529f8SMarc Zyngier 1485bf9529f8SMarc Zyngier out: 1486bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 1487bf9529f8SMarc Zyngier 1488c8415b94SMarc Zyngier if (!bitmap) 1489c8415b94SMarc Zyngier *base = *nr_ids = 0; 1490c8415b94SMarc Zyngier 1491bf9529f8SMarc Zyngier return bitmap; 1492bf9529f8SMarc Zyngier } 1493bf9529f8SMarc Zyngier 1494cf2be8baSMarc Zyngier static void its_lpi_free_chunks(unsigned long *bitmap, int base, int nr_ids) 1495bf9529f8SMarc Zyngier { 1496bf9529f8SMarc Zyngier int lpi; 1497bf9529f8SMarc Zyngier 1498bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 1499bf9529f8SMarc Zyngier 1500bf9529f8SMarc Zyngier for (lpi = base; lpi < (base + nr_ids); lpi += IRQS_PER_CHUNK) { 1501bf9529f8SMarc Zyngier int chunk = its_lpi_to_chunk(lpi); 1502cf2be8baSMarc Zyngier 1503bf9529f8SMarc Zyngier BUG_ON(chunk > lpi_chunks); 1504bf9529f8SMarc Zyngier if (test_bit(chunk, lpi_bitmap)) { 1505bf9529f8SMarc Zyngier clear_bit(chunk, lpi_bitmap); 1506bf9529f8SMarc Zyngier } else { 1507bf9529f8SMarc Zyngier pr_err("Bad LPI chunk %d\n", chunk); 1508bf9529f8SMarc Zyngier } 1509bf9529f8SMarc Zyngier } 1510bf9529f8SMarc Zyngier 1511bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 1512bf9529f8SMarc Zyngier 1513cf2be8baSMarc Zyngier kfree(bitmap); 1514bf9529f8SMarc Zyngier } 15151ac19ca6SMarc Zyngier 15160e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 15170e5ccf91SMarc Zyngier { 15180e5ccf91SMarc Zyngier struct page *prop_page; 15191ac19ca6SMarc Zyngier 15200e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 15210e5ccf91SMarc Zyngier if (!prop_page) 15220e5ccf91SMarc Zyngier return NULL; 15230e5ccf91SMarc Zyngier 15240e5ccf91SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 15250e5ccf91SMarc Zyngier memset(page_address(prop_page), 15260e5ccf91SMarc Zyngier LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, 15270e5ccf91SMarc Zyngier LPI_PROPBASE_SZ); 15280e5ccf91SMarc Zyngier 15290e5ccf91SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 15300e5ccf91SMarc Zyngier gic_flush_dcache_to_poc(page_address(prop_page), LPI_PROPBASE_SZ); 15310e5ccf91SMarc Zyngier 15320e5ccf91SMarc Zyngier return prop_page; 15330e5ccf91SMarc Zyngier } 15340e5ccf91SMarc Zyngier 15357d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 15367d75bbb4SMarc Zyngier { 15377d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 15387d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 15397d75bbb4SMarc Zyngier } 15401ac19ca6SMarc Zyngier 15411ac19ca6SMarc Zyngier static int __init its_alloc_lpi_tables(void) 15421ac19ca6SMarc Zyngier { 15431ac19ca6SMarc Zyngier phys_addr_t paddr; 15441ac19ca6SMarc Zyngier 15456c31e123SShanker Donthineni lpi_id_bits = min_t(u32, gic_rdists->id_bits, ITS_MAX_LPI_NRBITS); 15460e5ccf91SMarc Zyngier gic_rdists->prop_page = its_allocate_prop_table(GFP_NOWAIT); 15471ac19ca6SMarc Zyngier if (!gic_rdists->prop_page) { 15481ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 15491ac19ca6SMarc Zyngier return -ENOMEM; 15501ac19ca6SMarc Zyngier } 15511ac19ca6SMarc Zyngier 15521ac19ca6SMarc Zyngier paddr = page_to_phys(gic_rdists->prop_page); 15531ac19ca6SMarc Zyngier pr_info("GIC: using LPI property table @%pa\n", &paddr); 15541ac19ca6SMarc Zyngier 15556c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 15561ac19ca6SMarc Zyngier } 15571ac19ca6SMarc Zyngier 15581ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 15591ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 15601ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 15614f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 15621ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 15631ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 15641ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 15651ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 15661ac19ca6SMarc Zyngier }; 15671ac19ca6SMarc Zyngier 15682d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 15692d81d425SShanker Donthineni { 15702d81d425SShanker Donthineni u32 idx = baser - its->tables; 15712d81d425SShanker Donthineni 15720968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 15732d81d425SShanker Donthineni } 15742d81d425SShanker Donthineni 15752d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 15762d81d425SShanker Donthineni u64 val) 15772d81d425SShanker Donthineni { 15782d81d425SShanker Donthineni u32 idx = baser - its->tables; 15792d81d425SShanker Donthineni 15800968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 15812d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 15822d81d425SShanker Donthineni } 15832d81d425SShanker Donthineni 15849347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 15853faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 15863faf24eaSShanker Donthineni bool indirect) 15879347359aSShanker Donthineni { 15889347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 15899347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 15909347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 159130ae9610SShanker Donthineni u64 baser_phys, tmp; 15929347359aSShanker Donthineni u32 alloc_pages; 15939347359aSShanker Donthineni void *base; 15949347359aSShanker Donthineni 15959347359aSShanker Donthineni retry_alloc_baser: 15969347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 15979347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 15989347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 15999347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 16009347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 16019347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 16029347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 16039347359aSShanker Donthineni } 16049347359aSShanker Donthineni 16059347359aSShanker Donthineni base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 16069347359aSShanker Donthineni if (!base) 16079347359aSShanker Donthineni return -ENOMEM; 16089347359aSShanker Donthineni 160930ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 161030ae9610SShanker Donthineni 161130ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 161230ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 161330ae9610SShanker Donthineni 161430ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 161530ae9610SShanker Donthineni if (psz != SZ_64K) { 161630ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 161730ae9610SShanker Donthineni free_pages((unsigned long)base, order); 161830ae9610SShanker Donthineni return -ENXIO; 161930ae9610SShanker Donthineni } 162030ae9610SShanker Donthineni 162130ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 162230ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 162330ae9610SShanker Donthineni } 162430ae9610SShanker Donthineni 16259347359aSShanker Donthineni retry_baser: 162630ae9610SShanker Donthineni val = (baser_phys | 16279347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 16289347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 16299347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 16309347359aSShanker Donthineni cache | 16319347359aSShanker Donthineni shr | 16329347359aSShanker Donthineni GITS_BASER_VALID); 16339347359aSShanker Donthineni 16343faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 16353faf24eaSShanker Donthineni 16369347359aSShanker Donthineni switch (psz) { 16379347359aSShanker Donthineni case SZ_4K: 16389347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 16399347359aSShanker Donthineni break; 16409347359aSShanker Donthineni case SZ_16K: 16419347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 16429347359aSShanker Donthineni break; 16439347359aSShanker Donthineni case SZ_64K: 16449347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 16459347359aSShanker Donthineni break; 16469347359aSShanker Donthineni } 16479347359aSShanker Donthineni 16489347359aSShanker Donthineni its_write_baser(its, baser, val); 16499347359aSShanker Donthineni tmp = baser->val; 16509347359aSShanker Donthineni 16519347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 16529347359aSShanker Donthineni /* 16539347359aSShanker Donthineni * Shareability didn't stick. Just use 16549347359aSShanker Donthineni * whatever the read reported, which is likely 16559347359aSShanker Donthineni * to be the only thing this redistributor 16569347359aSShanker Donthineni * supports. If that's zero, make it 16579347359aSShanker Donthineni * non-cacheable as well. 16589347359aSShanker Donthineni */ 16599347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 16609347359aSShanker Donthineni if (!shr) { 16619347359aSShanker Donthineni cache = GITS_BASER_nC; 1662328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 16639347359aSShanker Donthineni } 16649347359aSShanker Donthineni goto retry_baser; 16659347359aSShanker Donthineni } 16669347359aSShanker Donthineni 16679347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 16689347359aSShanker Donthineni /* 16699347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 16709347359aSShanker Donthineni * size and retry. If we reach 4K, then 16719347359aSShanker Donthineni * something is horribly wrong... 16729347359aSShanker Donthineni */ 16739347359aSShanker Donthineni free_pages((unsigned long)base, order); 16749347359aSShanker Donthineni baser->base = NULL; 16759347359aSShanker Donthineni 16769347359aSShanker Donthineni switch (psz) { 16779347359aSShanker Donthineni case SZ_16K: 16789347359aSShanker Donthineni psz = SZ_4K; 16799347359aSShanker Donthineni goto retry_alloc_baser; 16809347359aSShanker Donthineni case SZ_64K: 16819347359aSShanker Donthineni psz = SZ_16K; 16829347359aSShanker Donthineni goto retry_alloc_baser; 16839347359aSShanker Donthineni } 16849347359aSShanker Donthineni } 16859347359aSShanker Donthineni 16869347359aSShanker Donthineni if (val != tmp) { 1687b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 16889347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1689b11283ebSVladimir Murzin val, tmp); 16909347359aSShanker Donthineni free_pages((unsigned long)base, order); 16919347359aSShanker Donthineni return -ENXIO; 16929347359aSShanker Donthineni } 16939347359aSShanker Donthineni 16949347359aSShanker Donthineni baser->order = order; 16959347359aSShanker Donthineni baser->base = base; 16969347359aSShanker Donthineni baser->psz = psz; 16973faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 16989347359aSShanker Donthineni 16993faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1700d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 17019347359aSShanker Donthineni its_base_type_string[type], 17029347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 17033faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 17049347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 17059347359aSShanker Donthineni 17069347359aSShanker Donthineni return 0; 17079347359aSShanker Donthineni } 17089347359aSShanker Donthineni 17094cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 17104cacac57SMarc Zyngier struct its_baser *baser, 171132bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 17124b75c459SShanker Donthineni { 17134cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 17144cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 17154cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 17162fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 17174b75c459SShanker Donthineni u32 new_order = *order; 17183faf24eaSShanker Donthineni bool indirect = false; 17193faf24eaSShanker Donthineni 17203faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 17213faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 17223faf24eaSShanker Donthineni /* 17233faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 17243faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 17253faf24eaSShanker Donthineni */ 17263faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 17273faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 17283faf24eaSShanker Donthineni 17293faf24eaSShanker Donthineni if (indirect) { 17303faf24eaSShanker Donthineni /* 17313faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 17323faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 17333faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 17343faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 17353faf24eaSShanker Donthineni * entry size. 17363faf24eaSShanker Donthineni */ 1737d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 17383faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 17393faf24eaSShanker Donthineni } 17403faf24eaSShanker Donthineni } 17414b75c459SShanker Donthineni 17424b75c459SShanker Donthineni /* 17434b75c459SShanker Donthineni * Allocate as many entries as required to fit the 17444b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 17454b75c459SShanker Donthineni * space being incredibly sparse, this results in a 17463faf24eaSShanker Donthineni * massive waste of memory if two-level device table 17473faf24eaSShanker Donthineni * feature is not supported by hardware. 17484b75c459SShanker Donthineni */ 17494b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 17504b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 17514b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1752d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 17534cacac57SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %u->%u\n", 17544cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 17554cacac57SMarc Zyngier its->device_ids, ids); 17564b75c459SShanker Donthineni } 17574b75c459SShanker Donthineni 17584b75c459SShanker Donthineni *order = new_order; 17593faf24eaSShanker Donthineni 17603faf24eaSShanker Donthineni return indirect; 17614b75c459SShanker Donthineni } 17624b75c459SShanker Donthineni 17631ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 17641ac19ca6SMarc Zyngier { 17651ac19ca6SMarc Zyngier int i; 17661ac19ca6SMarc Zyngier 17671ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 17681a485f4dSShanker Donthineni if (its->tables[i].base) { 17691a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 17701a485f4dSShanker Donthineni its->tables[i].order); 17711a485f4dSShanker Donthineni its->tables[i].base = NULL; 17721ac19ca6SMarc Zyngier } 17731ac19ca6SMarc Zyngier } 17741ac19ca6SMarc Zyngier } 17751ac19ca6SMarc Zyngier 17760e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 17771ac19ca6SMarc Zyngier { 17781ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 17792fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 17809347359aSShanker Donthineni u32 psz = SZ_64K; 17819347359aSShanker Donthineni int err, i; 178294100970SRobert Richter 1783fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 1784fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 17859347359aSShanker Donthineni cache = GITS_BASER_nCnB; 1786466b7d16SShanker Donthineni 17871ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 17882d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 17892d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 17901ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 17919347359aSShanker Donthineni u32 order = get_order(psz); 17923faf24eaSShanker Donthineni bool indirect = false; 17931ac19ca6SMarc Zyngier 17944cacac57SMarc Zyngier switch (type) { 17954cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 17961ac19ca6SMarc Zyngier continue; 17971ac19ca6SMarc Zyngier 17984cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 179932bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 180032bd44dcSShanker Donthineni psz, &order, 180132bd44dcSShanker Donthineni its->device_ids); 18024cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 18034cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 180432bd44dcSShanker Donthineni psz, &order, 180532bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 18064cacac57SMarc Zyngier break; 18074cacac57SMarc Zyngier } 1808f54b97edSMarc Zyngier 18093faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 18109347359aSShanker Donthineni if (err < 0) { 18119347359aSShanker Donthineni its_free_tables(its); 18129347359aSShanker Donthineni return err; 181330f21363SRobert Richter } 181430f21363SRobert Richter 18159347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 18169347359aSShanker Donthineni psz = baser->psz; 18179347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 18189347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 18191ac19ca6SMarc Zyngier } 18201ac19ca6SMarc Zyngier 18211ac19ca6SMarc Zyngier return 0; 18221ac19ca6SMarc Zyngier } 18231ac19ca6SMarc Zyngier 18241ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 18251ac19ca6SMarc Zyngier { 18261ac19ca6SMarc Zyngier its->collections = kzalloc(nr_cpu_ids * sizeof(*its->collections), 18271ac19ca6SMarc Zyngier GFP_KERNEL); 18281ac19ca6SMarc Zyngier if (!its->collections) 18291ac19ca6SMarc Zyngier return -ENOMEM; 18301ac19ca6SMarc Zyngier 18311ac19ca6SMarc Zyngier return 0; 18321ac19ca6SMarc Zyngier } 18331ac19ca6SMarc Zyngier 18347c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 18357c297a2dSMarc Zyngier { 18367c297a2dSMarc Zyngier struct page *pend_page; 18377c297a2dSMarc Zyngier /* 18387c297a2dSMarc Zyngier * The pending pages have to be at least 64kB aligned, 18397c297a2dSMarc Zyngier * hence the 'max(LPI_PENDBASE_SZ, SZ_64K)' below. 18407c297a2dSMarc Zyngier */ 18417c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 18427c297a2dSMarc Zyngier get_order(max_t(u32, LPI_PENDBASE_SZ, SZ_64K))); 18437c297a2dSMarc Zyngier if (!pend_page) 18447c297a2dSMarc Zyngier return NULL; 18457c297a2dSMarc Zyngier 18467c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 18477c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 18487c297a2dSMarc Zyngier 18497c297a2dSMarc Zyngier return pend_page; 18507c297a2dSMarc Zyngier } 18517c297a2dSMarc Zyngier 18527d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 18537d75bbb4SMarc Zyngier { 18547d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(pt), 18557d75bbb4SMarc Zyngier get_order(max_t(u32, LPI_PENDBASE_SZ, SZ_64K))); 18567d75bbb4SMarc Zyngier } 18577d75bbb4SMarc Zyngier 18581ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 18591ac19ca6SMarc Zyngier { 18601ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 18611ac19ca6SMarc Zyngier struct page *pend_page; 18621ac19ca6SMarc Zyngier u64 val, tmp; 18631ac19ca6SMarc Zyngier 18641ac19ca6SMarc Zyngier /* If we didn't allocate the pending table yet, do it now */ 18651ac19ca6SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 18661ac19ca6SMarc Zyngier if (!pend_page) { 18671ac19ca6SMarc Zyngier phys_addr_t paddr; 18687c297a2dSMarc Zyngier 18697c297a2dSMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 18701ac19ca6SMarc Zyngier if (!pend_page) { 18711ac19ca6SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", 18721ac19ca6SMarc Zyngier smp_processor_id()); 18731ac19ca6SMarc Zyngier return; 18741ac19ca6SMarc Zyngier } 18751ac19ca6SMarc Zyngier 18761ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 18771ac19ca6SMarc Zyngier pr_info("CPU%d: using LPI pending table @%pa\n", 18781ac19ca6SMarc Zyngier smp_processor_id(), &paddr); 18791ac19ca6SMarc Zyngier gic_data_rdist()->pend_page = pend_page; 18801ac19ca6SMarc Zyngier } 18811ac19ca6SMarc Zyngier 18821ac19ca6SMarc Zyngier /* Disable LPIs */ 18831ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 18841ac19ca6SMarc Zyngier val &= ~GICR_CTLR_ENABLE_LPIS; 18851ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 18861ac19ca6SMarc Zyngier 18871ac19ca6SMarc Zyngier /* 18881ac19ca6SMarc Zyngier * Make sure any change to the table is observable by the GIC. 18891ac19ca6SMarc Zyngier */ 18901ac19ca6SMarc Zyngier dsb(sy); 18911ac19ca6SMarc Zyngier 18921ac19ca6SMarc Zyngier /* set PROPBASE */ 18931ac19ca6SMarc Zyngier val = (page_to_phys(gic_rdists->prop_page) | 18941ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 18952fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 18961ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 18971ac19ca6SMarc Zyngier 18980968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 18990968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 19001ac19ca6SMarc Zyngier 19011ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 1902241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 1903241a386cSMarc Zyngier /* 1904241a386cSMarc Zyngier * The HW reports non-shareable, we must 1905241a386cSMarc Zyngier * remove the cacheability attributes as 1906241a386cSMarc Zyngier * well. 1907241a386cSMarc Zyngier */ 1908241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 1909241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 1910241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 19110968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 1912241a386cSMarc Zyngier } 19131ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 19141ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 19151ac19ca6SMarc Zyngier } 19161ac19ca6SMarc Zyngier 19171ac19ca6SMarc Zyngier /* set PENDBASE */ 19181ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 19194ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 19202fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 19211ac19ca6SMarc Zyngier 19220968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 19230968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 1924241a386cSMarc Zyngier 1925241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 1926241a386cSMarc Zyngier /* 1927241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 1928241a386cSMarc Zyngier * cacheability attributes as well. 1929241a386cSMarc Zyngier */ 1930241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 1931241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 1932241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 19330968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 1934241a386cSMarc Zyngier } 19351ac19ca6SMarc Zyngier 19361ac19ca6SMarc Zyngier /* Enable LPIs */ 19371ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 19381ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 19391ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 19401ac19ca6SMarc Zyngier 19411ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 19421ac19ca6SMarc Zyngier dsb(sy); 19431ac19ca6SMarc Zyngier } 19441ac19ca6SMarc Zyngier 1945920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 19461ac19ca6SMarc Zyngier { 1947920181ceSDerek Basehore int cpu = smp_processor_id(); 19481ac19ca6SMarc Zyngier u64 target; 19491ac19ca6SMarc Zyngier 1950fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 1951fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1952fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 1953fbf8f40eSGanapatrao Kulkarni 1954fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 1955fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 1956fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 1957920181ceSDerek Basehore return; 1958fbf8f40eSGanapatrao Kulkarni } 1959fbf8f40eSGanapatrao Kulkarni 19601ac19ca6SMarc Zyngier /* 19611ac19ca6SMarc Zyngier * We now have to bind each collection to its target 19621ac19ca6SMarc Zyngier * redistributor. 19631ac19ca6SMarc Zyngier */ 1964589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 19651ac19ca6SMarc Zyngier /* 19661ac19ca6SMarc Zyngier * This ITS wants the physical address of the 19671ac19ca6SMarc Zyngier * redistributor. 19681ac19ca6SMarc Zyngier */ 19691ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 19701ac19ca6SMarc Zyngier } else { 1971920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 1972589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 1973263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 19741ac19ca6SMarc Zyngier } 19751ac19ca6SMarc Zyngier 19761ac19ca6SMarc Zyngier /* Perform collection mapping */ 19771ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 19781ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 19791ac19ca6SMarc Zyngier 19801ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 19811ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 19821ac19ca6SMarc Zyngier } 19831ac19ca6SMarc Zyngier 1984920181ceSDerek Basehore static void its_cpu_init_collections(void) 1985920181ceSDerek Basehore { 1986920181ceSDerek Basehore struct its_node *its; 1987920181ceSDerek Basehore 1988920181ceSDerek Basehore spin_lock(&its_lock); 1989920181ceSDerek Basehore 1990920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 1991920181ceSDerek Basehore its_cpu_init_collection(its); 1992920181ceSDerek Basehore 19931ac19ca6SMarc Zyngier spin_unlock(&its_lock); 19941ac19ca6SMarc Zyngier } 199584a6a2e7SMarc Zyngier 199684a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 199784a6a2e7SMarc Zyngier { 199884a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 19993e39e8f5SMarc Zyngier unsigned long flags; 200084a6a2e7SMarc Zyngier 20013e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 200284a6a2e7SMarc Zyngier 200384a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 200484a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 200584a6a2e7SMarc Zyngier its_dev = tmp; 200684a6a2e7SMarc Zyngier break; 200784a6a2e7SMarc Zyngier } 200884a6a2e7SMarc Zyngier } 200984a6a2e7SMarc Zyngier 20103e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 201184a6a2e7SMarc Zyngier 201284a6a2e7SMarc Zyngier return its_dev; 201384a6a2e7SMarc Zyngier } 201484a6a2e7SMarc Zyngier 2015466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 2016466b7d16SShanker Donthineni { 2017466b7d16SShanker Donthineni int i; 2018466b7d16SShanker Donthineni 2019466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 2020466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 2021466b7d16SShanker Donthineni return &its->tables[i]; 2022466b7d16SShanker Donthineni } 2023466b7d16SShanker Donthineni 2024466b7d16SShanker Donthineni return NULL; 2025466b7d16SShanker Donthineni } 2026466b7d16SShanker Donthineni 202770cc81edSMarc Zyngier static bool its_alloc_table_entry(struct its_baser *baser, u32 id) 20283faf24eaSShanker Donthineni { 20293faf24eaSShanker Donthineni struct page *page; 20303faf24eaSShanker Donthineni u32 esz, idx; 20313faf24eaSShanker Donthineni __le64 *table; 20323faf24eaSShanker Donthineni 20333faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 20343faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 20353faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 203670cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 20373faf24eaSShanker Donthineni 20383faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 203970cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 20403faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 20413faf24eaSShanker Donthineni return false; 20423faf24eaSShanker Donthineni 20433faf24eaSShanker Donthineni table = baser->base; 20443faf24eaSShanker Donthineni 20453faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 20463faf24eaSShanker Donthineni if (!table[idx]) { 20473faf24eaSShanker Donthineni page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(baser->psz)); 20483faf24eaSShanker Donthineni if (!page) 20493faf24eaSShanker Donthineni return false; 20503faf24eaSShanker Donthineni 20513faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 20523faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2053328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 20543faf24eaSShanker Donthineni 20553faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 20563faf24eaSShanker Donthineni 20573faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 20583faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2059328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 20603faf24eaSShanker Donthineni 20613faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 20623faf24eaSShanker Donthineni dsb(sy); 20633faf24eaSShanker Donthineni } 20643faf24eaSShanker Donthineni 20653faf24eaSShanker Donthineni return true; 20663faf24eaSShanker Donthineni } 20673faf24eaSShanker Donthineni 206870cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 206970cc81edSMarc Zyngier { 207070cc81edSMarc Zyngier struct its_baser *baser; 207170cc81edSMarc Zyngier 207270cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 207370cc81edSMarc Zyngier 207470cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 207570cc81edSMarc Zyngier if (!baser) 207670cc81edSMarc Zyngier return (ilog2(dev_id) < its->device_ids); 207770cc81edSMarc Zyngier 207870cc81edSMarc Zyngier return its_alloc_table_entry(baser, dev_id); 207970cc81edSMarc Zyngier } 208070cc81edSMarc Zyngier 20817d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 20827d75bbb4SMarc Zyngier { 20837d75bbb4SMarc Zyngier struct its_node *its; 20847d75bbb4SMarc Zyngier 20857d75bbb4SMarc Zyngier /* 20867d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 20877d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 20887d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 20897d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 20907d75bbb4SMarc Zyngier * anyway, right?). 20917d75bbb4SMarc Zyngier */ 20927d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 20937d75bbb4SMarc Zyngier struct its_baser *baser; 20947d75bbb4SMarc Zyngier 20957d75bbb4SMarc Zyngier if (!its->is_v4) 20967d75bbb4SMarc Zyngier continue; 20977d75bbb4SMarc Zyngier 20987d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 20997d75bbb4SMarc Zyngier if (!baser) 21007d75bbb4SMarc Zyngier return false; 21017d75bbb4SMarc Zyngier 21027d75bbb4SMarc Zyngier if (!its_alloc_table_entry(baser, vpe_id)) 21037d75bbb4SMarc Zyngier return false; 21047d75bbb4SMarc Zyngier } 21057d75bbb4SMarc Zyngier 21067d75bbb4SMarc Zyngier return true; 21077d75bbb4SMarc Zyngier } 21087d75bbb4SMarc Zyngier 210984a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 211093f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 211184a6a2e7SMarc Zyngier { 211284a6a2e7SMarc Zyngier struct its_device *dev; 211393f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 21143e39e8f5SMarc Zyngier unsigned long flags; 2115591e5becSMarc Zyngier u16 *col_map = NULL; 211684a6a2e7SMarc Zyngier void *itt; 211784a6a2e7SMarc Zyngier int lpi_base; 211884a6a2e7SMarc Zyngier int nr_lpis; 2119c8481267SMarc Zyngier int nr_ites; 212084a6a2e7SMarc Zyngier int sz; 212184a6a2e7SMarc Zyngier 21223faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2123466b7d16SShanker Donthineni return NULL; 2124466b7d16SShanker Donthineni 212584a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2126c8481267SMarc Zyngier /* 2127c8481267SMarc Zyngier * At least one bit of EventID is being used, hence a minimum 2128c8481267SMarc Zyngier * of two entries. No, the architecture doesn't let you 2129c8481267SMarc Zyngier * express an ITT with a single entry. 2130c8481267SMarc Zyngier */ 213196555c47SWill Deacon nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 2132c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 213384a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 21346c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 213593f94ea0SMarc Zyngier if (alloc_lpis) { 213684a6a2e7SMarc Zyngier lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 2137591e5becSMarc Zyngier if (lpi_map) 213893f94ea0SMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_lpis, 213993f94ea0SMarc Zyngier GFP_KERNEL); 214093f94ea0SMarc Zyngier } else { 214193f94ea0SMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_ites, GFP_KERNEL); 214293f94ea0SMarc Zyngier nr_lpis = 0; 214393f94ea0SMarc Zyngier lpi_base = 0; 214493f94ea0SMarc Zyngier } 214584a6a2e7SMarc Zyngier 214693f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 214784a6a2e7SMarc Zyngier kfree(dev); 214884a6a2e7SMarc Zyngier kfree(itt); 214984a6a2e7SMarc Zyngier kfree(lpi_map); 2150591e5becSMarc Zyngier kfree(col_map); 215184a6a2e7SMarc Zyngier return NULL; 215284a6a2e7SMarc Zyngier } 215384a6a2e7SMarc Zyngier 2154328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 21555a9a8915SMarc Zyngier 215684a6a2e7SMarc Zyngier dev->its = its; 215784a6a2e7SMarc Zyngier dev->itt = itt; 2158c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2159591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2160591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2161591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2162591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 2163d011e4e6SMarc Zyngier mutex_init(&dev->event_map.vlpi_lock); 216484a6a2e7SMarc Zyngier dev->device_id = dev_id; 216584a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 216684a6a2e7SMarc Zyngier 21673e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 216884a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 21693e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 217084a6a2e7SMarc Zyngier 217184a6a2e7SMarc Zyngier /* Map device to its ITT */ 217284a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 217384a6a2e7SMarc Zyngier 217484a6a2e7SMarc Zyngier return dev; 217584a6a2e7SMarc Zyngier } 217684a6a2e7SMarc Zyngier 217784a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 217884a6a2e7SMarc Zyngier { 21793e39e8f5SMarc Zyngier unsigned long flags; 21803e39e8f5SMarc Zyngier 21813e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 218284a6a2e7SMarc Zyngier list_del(&its_dev->entry); 21833e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 218484a6a2e7SMarc Zyngier kfree(its_dev->itt); 218584a6a2e7SMarc Zyngier kfree(its_dev); 218684a6a2e7SMarc Zyngier } 2187b48ac83dSMarc Zyngier 2188b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 2189b48ac83dSMarc Zyngier { 2190b48ac83dSMarc Zyngier int idx; 2191b48ac83dSMarc Zyngier 2192591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 2193591e5becSMarc Zyngier dev->event_map.nr_lpis); 2194591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 2195b48ac83dSMarc Zyngier return -ENOSPC; 2196b48ac83dSMarc Zyngier 2197591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 2198591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 2199b48ac83dSMarc Zyngier 2200b48ac83dSMarc Zyngier return 0; 2201b48ac83dSMarc Zyngier } 2202b48ac83dSMarc Zyngier 220354456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 2204b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 2205b48ac83dSMarc Zyngier { 2206b48ac83dSMarc Zyngier struct its_node *its; 2207b48ac83dSMarc Zyngier struct its_device *its_dev; 220854456db9SMarc Zyngier struct msi_domain_info *msi_info; 220954456db9SMarc Zyngier u32 dev_id; 2210b48ac83dSMarc Zyngier 221154456db9SMarc Zyngier /* 221254456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 221354456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 221454456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 221554456db9SMarc Zyngier * are built on top of the ITS. 221654456db9SMarc Zyngier */ 221754456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 221854456db9SMarc Zyngier 221954456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 222054456db9SMarc Zyngier its = msi_info->data; 222154456db9SMarc Zyngier 222220b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 222320b3d54eSMarc Zyngier vpe_proxy.dev && 222420b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 222520b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 222620b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 222720b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 222820b3d54eSMarc Zyngier dev_id); 222920b3d54eSMarc Zyngier return -EINVAL; 223020b3d54eSMarc Zyngier } 223120b3d54eSMarc Zyngier 2232f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 2233e8137f4fSMarc Zyngier if (its_dev) { 2234e8137f4fSMarc Zyngier /* 2235e8137f4fSMarc Zyngier * We already have seen this ID, probably through 2236e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 2237e8137f4fSMarc Zyngier * create the device. 2238e8137f4fSMarc Zyngier */ 2239f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 2240e8137f4fSMarc Zyngier goto out; 2241e8137f4fSMarc Zyngier } 2242b48ac83dSMarc Zyngier 224393f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 2244b48ac83dSMarc Zyngier if (!its_dev) 2245b48ac83dSMarc Zyngier return -ENOMEM; 2246b48ac83dSMarc Zyngier 2247f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 2248e8137f4fSMarc Zyngier out: 2249b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 2250b48ac83dSMarc Zyngier return 0; 2251b48ac83dSMarc Zyngier } 2252b48ac83dSMarc Zyngier 225354456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 225454456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 225554456db9SMarc Zyngier }; 225654456db9SMarc Zyngier 2257b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 2258b48ac83dSMarc Zyngier unsigned int virq, 2259b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 2260b48ac83dSMarc Zyngier { 2261f833f57fSMarc Zyngier struct irq_fwspec fwspec; 2262b48ac83dSMarc Zyngier 2263f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 2264f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 2265f833f57fSMarc Zyngier fwspec.param_count = 3; 2266f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 2267f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 2268f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 22693f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 22703f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 22713f010cf1STomasz Nowicki fwspec.param_count = 2; 22723f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 22733f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 2274f833f57fSMarc Zyngier } else { 2275f833f57fSMarc Zyngier return -EINVAL; 2276f833f57fSMarc Zyngier } 2277b48ac83dSMarc Zyngier 2278f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 2279b48ac83dSMarc Zyngier } 2280b48ac83dSMarc Zyngier 2281b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 2282b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 2283b48ac83dSMarc Zyngier { 2284b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 2285b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 2286b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 2287b48ac83dSMarc Zyngier int err; 2288b48ac83dSMarc Zyngier int i; 2289b48ac83dSMarc Zyngier 2290b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2291b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 2292b48ac83dSMarc Zyngier if (err) 2293b48ac83dSMarc Zyngier return err; 2294b48ac83dSMarc Zyngier 2295b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 2296b48ac83dSMarc Zyngier if (err) 2297b48ac83dSMarc Zyngier return err; 2298b48ac83dSMarc Zyngier 2299b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 2300b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 23010d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 2302f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 2303591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 2304591e5becSMarc Zyngier (int) hwirq, virq + i); 2305b48ac83dSMarc Zyngier } 2306b48ac83dSMarc Zyngier 2307b48ac83dSMarc Zyngier return 0; 2308b48ac83dSMarc Zyngier } 2309b48ac83dSMarc Zyngier 231072491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 2311702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2312aca268dfSMarc Zyngier { 2313aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2314aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2315fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 23160d224d35SMarc Zyngier int cpu; 2317fbf8f40eSGanapatrao Kulkarni 2318fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 2319fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 2320fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 2321aca268dfSMarc Zyngier 2322591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 23230d224d35SMarc Zyngier cpu = cpumask_first(cpu_mask); 23240d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 23250d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 2326591e5becSMarc Zyngier 2327aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 23286a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 232972491643SThomas Gleixner return 0; 2330aca268dfSMarc Zyngier } 2331aca268dfSMarc Zyngier 2332aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 2333aca268dfSMarc Zyngier struct irq_data *d) 2334aca268dfSMarc Zyngier { 2335aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2336aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2337aca268dfSMarc Zyngier 2338aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 2339aca268dfSMarc Zyngier its_send_discard(its_dev, event); 2340aca268dfSMarc Zyngier } 2341aca268dfSMarc Zyngier 2342b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 2343b48ac83dSMarc Zyngier unsigned int nr_irqs) 2344b48ac83dSMarc Zyngier { 2345b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 2346b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2347b48ac83dSMarc Zyngier int i; 2348b48ac83dSMarc Zyngier 2349b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2350b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 2351b48ac83dSMarc Zyngier virq + i); 2352aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 2353b48ac83dSMarc Zyngier 2354b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 2355591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 2356b48ac83dSMarc Zyngier 2357b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 23582da39949SMarc Zyngier irq_domain_reset_irq_data(data); 2359b48ac83dSMarc Zyngier } 2360b48ac83dSMarc Zyngier 2361b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 2362591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 2363591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 2364cf2be8baSMarc Zyngier its_lpi_free_chunks(its_dev->event_map.lpi_map, 2365cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 2366cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 2367cf2be8baSMarc Zyngier kfree(its_dev->event_map.col_map); 2368b48ac83dSMarc Zyngier 2369b48ac83dSMarc Zyngier /* Unmap device/itt */ 2370b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 2371b48ac83dSMarc Zyngier its_free_device(its_dev); 2372b48ac83dSMarc Zyngier } 2373b48ac83dSMarc Zyngier 2374b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 2375b48ac83dSMarc Zyngier } 2376b48ac83dSMarc Zyngier 2377b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 2378b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 2379b48ac83dSMarc Zyngier .free = its_irq_domain_free, 2380aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 2381aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 2382b48ac83dSMarc Zyngier }; 23834c21f3c2SMarc Zyngier 238420b3d54eSMarc Zyngier /* 238520b3d54eSMarc Zyngier * This is insane. 238620b3d54eSMarc Zyngier * 238720b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 238820b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 238920b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 239020b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 239120b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 239220b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 239320b3d54eSMarc Zyngier * 239420b3d54eSMarc Zyngier * Broken by design(tm). 239520b3d54eSMarc Zyngier */ 239620b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 239720b3d54eSMarc Zyngier { 239820b3d54eSMarc Zyngier /* Already unmapped? */ 239920b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 240020b3d54eSMarc Zyngier return; 240120b3d54eSMarc Zyngier 240220b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 240320b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 240420b3d54eSMarc Zyngier 240520b3d54eSMarc Zyngier /* 240620b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 240720b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 240820b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 240920b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 241020b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 241120b3d54eSMarc Zyngier */ 241220b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 241320b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 241420b3d54eSMarc Zyngier 241520b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 241620b3d54eSMarc Zyngier } 241720b3d54eSMarc Zyngier 241820b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 241920b3d54eSMarc Zyngier { 242020b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 242120b3d54eSMarc Zyngier unsigned long flags; 242220b3d54eSMarc Zyngier 242320b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 242420b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 242520b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 242620b3d54eSMarc Zyngier } 242720b3d54eSMarc Zyngier } 242820b3d54eSMarc Zyngier 242920b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 243020b3d54eSMarc Zyngier { 243120b3d54eSMarc Zyngier /* Already mapped? */ 243220b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 243320b3d54eSMarc Zyngier return; 243420b3d54eSMarc Zyngier 243520b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 243620b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 243720b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 243820b3d54eSMarc Zyngier 243920b3d54eSMarc Zyngier /* Map the new VPE instead */ 244020b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 244120b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 244220b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 244320b3d54eSMarc Zyngier 244420b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 244520b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 244620b3d54eSMarc Zyngier } 244720b3d54eSMarc Zyngier 2448958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 2449958b90d1SMarc Zyngier { 2450958b90d1SMarc Zyngier unsigned long flags; 2451958b90d1SMarc Zyngier struct its_collection *target_col; 2452958b90d1SMarc Zyngier 2453958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2454958b90d1SMarc Zyngier void __iomem *rdbase; 2455958b90d1SMarc Zyngier 2456958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 2457958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2458958b90d1SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2459958b90d1SMarc Zyngier cpu_relax(); 2460958b90d1SMarc Zyngier 2461958b90d1SMarc Zyngier return; 2462958b90d1SMarc Zyngier } 2463958b90d1SMarc Zyngier 2464958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 2465958b90d1SMarc Zyngier 2466958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 2467958b90d1SMarc Zyngier 2468958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 2469958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 2470958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 2471958b90d1SMarc Zyngier 2472958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 2473958b90d1SMarc Zyngier } 2474958b90d1SMarc Zyngier 24753171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 24763171a47aSMarc Zyngier const struct cpumask *mask_val, 24773171a47aSMarc Zyngier bool force) 24783171a47aSMarc Zyngier { 24793171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 24803171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 24813171a47aSMarc Zyngier 24823171a47aSMarc Zyngier /* 24833171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 248420b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 2485958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 2486958b90d1SMarc Zyngier * interrupt to its new location. 24873171a47aSMarc Zyngier */ 24883171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 2489958b90d1SMarc Zyngier int from = vpe->col_idx; 2490958b90d1SMarc Zyngier 24913171a47aSMarc Zyngier vpe->col_idx = cpu; 24923171a47aSMarc Zyngier its_send_vmovp(vpe); 2493958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 24943171a47aSMarc Zyngier } 24953171a47aSMarc Zyngier 249644c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 249744c4c25eSMarc Zyngier 24983171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 24993171a47aSMarc Zyngier } 25003171a47aSMarc Zyngier 2501e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 2502e643d803SMarc Zyngier { 2503e643d803SMarc Zyngier void * __iomem vlpi_base = gic_data_rdist_vlpi_base(); 2504e643d803SMarc Zyngier u64 val; 2505e643d803SMarc Zyngier 2506e643d803SMarc Zyngier /* Schedule the VPE */ 2507e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 2508e643d803SMarc Zyngier GENMASK_ULL(51, 12); 2509e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 2510e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 2511e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 2512e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 2513e643d803SMarc Zyngier 2514e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 2515e643d803SMarc Zyngier GENMASK_ULL(51, 16); 2516e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 2517e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 2518e643d803SMarc Zyngier /* 2519e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 2520e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 2521e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 2522e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 2523e643d803SMarc Zyngier * that the pending table is empty. A good implementation 2524e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 2525e643d803SMarc Zyngier * making this a tolerable issue. 2526e643d803SMarc Zyngier */ 2527e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2528e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 2529e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 2530e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2531e643d803SMarc Zyngier } 2532e643d803SMarc Zyngier 2533e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 2534e643d803SMarc Zyngier { 2535e643d803SMarc Zyngier void * __iomem vlpi_base = gic_data_rdist_vlpi_base(); 2536e643d803SMarc Zyngier u32 count = 1000000; /* 1s! */ 2537e643d803SMarc Zyngier bool clean; 2538e643d803SMarc Zyngier u64 val; 2539e643d803SMarc Zyngier 2540e643d803SMarc Zyngier /* We're being scheduled out */ 2541e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2542e643d803SMarc Zyngier val &= ~GICR_VPENDBASER_Valid; 2543e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2544e643d803SMarc Zyngier 2545e643d803SMarc Zyngier do { 2546e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2547e643d803SMarc Zyngier clean = !(val & GICR_VPENDBASER_Dirty); 2548e643d803SMarc Zyngier if (!clean) { 2549e643d803SMarc Zyngier count--; 2550e643d803SMarc Zyngier cpu_relax(); 2551e643d803SMarc Zyngier udelay(1); 2552e643d803SMarc Zyngier } 2553e643d803SMarc Zyngier } while (!clean && count); 2554e643d803SMarc Zyngier 2555e643d803SMarc Zyngier if (unlikely(!clean && !count)) { 2556e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2557e643d803SMarc Zyngier vpe->idai = false; 2558e643d803SMarc Zyngier vpe->pending_last = true; 2559e643d803SMarc Zyngier } else { 2560e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 2561e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 2562e643d803SMarc Zyngier } 2563e643d803SMarc Zyngier } 2564e643d803SMarc Zyngier 256540619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 256640619a2eSMarc Zyngier { 256740619a2eSMarc Zyngier struct its_node *its; 256840619a2eSMarc Zyngier 256940619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 257040619a2eSMarc Zyngier if (!its->is_v4) 257140619a2eSMarc Zyngier continue; 257240619a2eSMarc Zyngier 25732247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 25742247e1bfSMarc Zyngier continue; 25752247e1bfSMarc Zyngier 25763c1cceebSMarc Zyngier /* 25773c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 25783c1cceebSMarc Zyngier * we need is to reach the redistributors. 25793c1cceebSMarc Zyngier */ 258040619a2eSMarc Zyngier its_send_vinvall(its, vpe); 25813c1cceebSMarc Zyngier return; 258240619a2eSMarc Zyngier } 258340619a2eSMarc Zyngier } 258440619a2eSMarc Zyngier 2585e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 2586e643d803SMarc Zyngier { 2587e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2588e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 2589e643d803SMarc Zyngier 2590e643d803SMarc Zyngier switch (info->cmd_type) { 2591e643d803SMarc Zyngier case SCHEDULE_VPE: 2592e643d803SMarc Zyngier its_vpe_schedule(vpe); 2593e643d803SMarc Zyngier return 0; 2594e643d803SMarc Zyngier 2595e643d803SMarc Zyngier case DESCHEDULE_VPE: 2596e643d803SMarc Zyngier its_vpe_deschedule(vpe); 2597e643d803SMarc Zyngier return 0; 2598e643d803SMarc Zyngier 25995e2f7642SMarc Zyngier case INVALL_VPE: 260040619a2eSMarc Zyngier its_vpe_invall(vpe); 26015e2f7642SMarc Zyngier return 0; 26025e2f7642SMarc Zyngier 2603e643d803SMarc Zyngier default: 2604e643d803SMarc Zyngier return -EINVAL; 2605e643d803SMarc Zyngier } 2606e643d803SMarc Zyngier } 2607e643d803SMarc Zyngier 260820b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 260920b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 261020b3d54eSMarc Zyngier { 261120b3d54eSMarc Zyngier unsigned long flags; 261220b3d54eSMarc Zyngier 261320b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 261420b3d54eSMarc Zyngier 261520b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 261620b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 261720b3d54eSMarc Zyngier 261820b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 261920b3d54eSMarc Zyngier } 262020b3d54eSMarc Zyngier 2621f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 2622f6a91da7SMarc Zyngier { 2623f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 262420b3d54eSMarc Zyngier 262520b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 2626f6a91da7SMarc Zyngier void __iomem *rdbase; 2627f6a91da7SMarc Zyngier 2628f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2629f6a91da7SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_INVLPIR); 2630f6a91da7SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2631f6a91da7SMarc Zyngier cpu_relax(); 263220b3d54eSMarc Zyngier } else { 263320b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 263420b3d54eSMarc Zyngier } 2635f6a91da7SMarc Zyngier } 2636f6a91da7SMarc Zyngier 2637f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 2638f6a91da7SMarc Zyngier { 2639f6a91da7SMarc Zyngier /* 2640f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 2641f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 2642f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 2643f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 2644f6a91da7SMarc Zyngier */ 2645f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 2646f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2647f6a91da7SMarc Zyngier } 2648f6a91da7SMarc Zyngier 2649f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 2650f6a91da7SMarc Zyngier { 2651f6a91da7SMarc Zyngier /* Same hack as above... */ 2652f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 2653f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2654f6a91da7SMarc Zyngier } 2655f6a91da7SMarc Zyngier 2656e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 2657e57a3e28SMarc Zyngier enum irqchip_irq_state which, 2658e57a3e28SMarc Zyngier bool state) 2659e57a3e28SMarc Zyngier { 2660e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2661e57a3e28SMarc Zyngier 2662e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 2663e57a3e28SMarc Zyngier return -EINVAL; 2664e57a3e28SMarc Zyngier 2665e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2666e57a3e28SMarc Zyngier void __iomem *rdbase; 2667e57a3e28SMarc Zyngier 2668e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2669e57a3e28SMarc Zyngier if (state) { 2670e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 2671e57a3e28SMarc Zyngier } else { 2672e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2673e57a3e28SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2674e57a3e28SMarc Zyngier cpu_relax(); 2675e57a3e28SMarc Zyngier } 2676e57a3e28SMarc Zyngier } else { 2677e57a3e28SMarc Zyngier if (state) 2678e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 2679e57a3e28SMarc Zyngier else 2680e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 2681e57a3e28SMarc Zyngier } 2682e57a3e28SMarc Zyngier 2683e57a3e28SMarc Zyngier return 0; 2684e57a3e28SMarc Zyngier } 2685e57a3e28SMarc Zyngier 26868fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 26878fff27aeSMarc Zyngier .name = "GICv4-vpe", 2688f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 2689f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 2690f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 26913171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 2692e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 2693e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 26948fff27aeSMarc Zyngier }; 26958fff27aeSMarc Zyngier 26967d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 26977d75bbb4SMarc Zyngier { 269832bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 26997d75bbb4SMarc Zyngier } 27007d75bbb4SMarc Zyngier 27017d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 27027d75bbb4SMarc Zyngier { 27037d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 27047d75bbb4SMarc Zyngier } 27057d75bbb4SMarc Zyngier 27067d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 27077d75bbb4SMarc Zyngier { 27087d75bbb4SMarc Zyngier struct page *vpt_page; 27097d75bbb4SMarc Zyngier int vpe_id; 27107d75bbb4SMarc Zyngier 27117d75bbb4SMarc Zyngier /* Allocate vpe_id */ 27127d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 27137d75bbb4SMarc Zyngier if (vpe_id < 0) 27147d75bbb4SMarc Zyngier return vpe_id; 27157d75bbb4SMarc Zyngier 27167d75bbb4SMarc Zyngier /* Allocate VPT */ 27177d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 27187d75bbb4SMarc Zyngier if (!vpt_page) { 27197d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 27207d75bbb4SMarc Zyngier return -ENOMEM; 27217d75bbb4SMarc Zyngier } 27227d75bbb4SMarc Zyngier 27237d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 27247d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 27257d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 27267d75bbb4SMarc Zyngier return -ENOMEM; 27277d75bbb4SMarc Zyngier } 27287d75bbb4SMarc Zyngier 27297d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 27307d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 273120b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 27327d75bbb4SMarc Zyngier 27337d75bbb4SMarc Zyngier return 0; 27347d75bbb4SMarc Zyngier } 27357d75bbb4SMarc Zyngier 27367d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 27377d75bbb4SMarc Zyngier { 273820b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 27397d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 27407d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 27417d75bbb4SMarc Zyngier } 27427d75bbb4SMarc Zyngier 27437d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 27447d75bbb4SMarc Zyngier unsigned int virq, 27457d75bbb4SMarc Zyngier unsigned int nr_irqs) 27467d75bbb4SMarc Zyngier { 27477d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 27487d75bbb4SMarc Zyngier int i; 27497d75bbb4SMarc Zyngier 27507d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 27517d75bbb4SMarc Zyngier 27527d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 27537d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 27547d75bbb4SMarc Zyngier virq + i); 27557d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 27567d75bbb4SMarc Zyngier 27577d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 27587d75bbb4SMarc Zyngier 27597d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 27607d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 27617d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 27627d75bbb4SMarc Zyngier } 27637d75bbb4SMarc Zyngier 27647d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 27657d75bbb4SMarc Zyngier its_lpi_free_chunks(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 27667d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 27677d75bbb4SMarc Zyngier } 27687d75bbb4SMarc Zyngier } 27697d75bbb4SMarc Zyngier 27707d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 27717d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 27727d75bbb4SMarc Zyngier { 27737d75bbb4SMarc Zyngier struct its_vm *vm = args; 27747d75bbb4SMarc Zyngier unsigned long *bitmap; 27757d75bbb4SMarc Zyngier struct page *vprop_page; 27767d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 27777d75bbb4SMarc Zyngier 27787d75bbb4SMarc Zyngier BUG_ON(!vm); 27797d75bbb4SMarc Zyngier 27807d75bbb4SMarc Zyngier bitmap = its_lpi_alloc_chunks(nr_irqs, &base, &nr_ids); 27817d75bbb4SMarc Zyngier if (!bitmap) 27827d75bbb4SMarc Zyngier return -ENOMEM; 27837d75bbb4SMarc Zyngier 27847d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 27857d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 27867d75bbb4SMarc Zyngier return -ENOMEM; 27877d75bbb4SMarc Zyngier } 27887d75bbb4SMarc Zyngier 27897d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 27907d75bbb4SMarc Zyngier if (!vprop_page) { 27917d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 27927d75bbb4SMarc Zyngier return -ENOMEM; 27937d75bbb4SMarc Zyngier } 27947d75bbb4SMarc Zyngier 27957d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 27967d75bbb4SMarc Zyngier vm->db_lpi_base = base; 27977d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 27987d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 27997d75bbb4SMarc Zyngier 28007d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 28017d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 28027d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 28037d75bbb4SMarc Zyngier if (err) 28047d75bbb4SMarc Zyngier break; 28057d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 28067d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 28077d75bbb4SMarc Zyngier if (err) 28087d75bbb4SMarc Zyngier break; 28097d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 28107d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 28117d75bbb4SMarc Zyngier set_bit(i, bitmap); 28127d75bbb4SMarc Zyngier } 28137d75bbb4SMarc Zyngier 28147d75bbb4SMarc Zyngier if (err) { 28157d75bbb4SMarc Zyngier if (i > 0) 28167d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 28177d75bbb4SMarc Zyngier 28187d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 28197d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 28207d75bbb4SMarc Zyngier } 28217d75bbb4SMarc Zyngier 28227d75bbb4SMarc Zyngier return err; 28237d75bbb4SMarc Zyngier } 28247d75bbb4SMarc Zyngier 282572491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 2826702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2827eb78192bSMarc Zyngier { 2828eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 282940619a2eSMarc Zyngier struct its_node *its; 2830eb78192bSMarc Zyngier 28312247e1bfSMarc Zyngier /* If we use the list map, we issue VMAPP on demand... */ 28322247e1bfSMarc Zyngier if (its_list_map) 28336ef930f2SMarc Zyngier return 0; 2834eb78192bSMarc Zyngier 2835eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 2836eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 283740619a2eSMarc Zyngier 283840619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 283940619a2eSMarc Zyngier if (!its->is_v4) 284040619a2eSMarc Zyngier continue; 284140619a2eSMarc Zyngier 284275fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 284340619a2eSMarc Zyngier its_send_vinvall(its, vpe); 284440619a2eSMarc Zyngier } 284540619a2eSMarc Zyngier 284644c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 284744c4c25eSMarc Zyngier 284872491643SThomas Gleixner return 0; 2849eb78192bSMarc Zyngier } 2850eb78192bSMarc Zyngier 2851eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 2852eb78192bSMarc Zyngier struct irq_data *d) 2853eb78192bSMarc Zyngier { 2854eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 285575fd951bSMarc Zyngier struct its_node *its; 2856eb78192bSMarc Zyngier 28572247e1bfSMarc Zyngier /* 28582247e1bfSMarc Zyngier * If we use the list map, we unmap the VPE once no VLPIs are 28592247e1bfSMarc Zyngier * associated with the VM. 28602247e1bfSMarc Zyngier */ 28612247e1bfSMarc Zyngier if (its_list_map) 28622247e1bfSMarc Zyngier return; 28632247e1bfSMarc Zyngier 286475fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 286575fd951bSMarc Zyngier if (!its->is_v4) 286675fd951bSMarc Zyngier continue; 286775fd951bSMarc Zyngier 286875fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 286975fd951bSMarc Zyngier } 2870eb78192bSMarc Zyngier } 2871eb78192bSMarc Zyngier 28728fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 28737d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 28747d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 2875eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 2876eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 28778fff27aeSMarc Zyngier }; 28788fff27aeSMarc Zyngier 28794559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 28804559fbb3SYun Wu { 28814559fbb3SYun Wu u32 count = 1000000; /* 1s */ 28824559fbb3SYun Wu u32 val; 28834559fbb3SYun Wu 28844559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 28857611da86SDavid Daney /* 28867611da86SDavid Daney * GIC architecture specification requires the ITS to be both 28877611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 28887611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 28897611da86SDavid Daney */ 28907611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 28914559fbb3SYun Wu return 0; 28924559fbb3SYun Wu 28934559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 2894d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 28954559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 28964559fbb3SYun Wu 28974559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 28984559fbb3SYun Wu while (1) { 28994559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 29004559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 29014559fbb3SYun Wu return 0; 29024559fbb3SYun Wu 29034559fbb3SYun Wu count--; 29044559fbb3SYun Wu if (!count) 29054559fbb3SYun Wu return -EBUSY; 29064559fbb3SYun Wu 29074559fbb3SYun Wu cpu_relax(); 29084559fbb3SYun Wu udelay(1); 29094559fbb3SYun Wu } 29104559fbb3SYun Wu } 29114559fbb3SYun Wu 29129d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 291394100970SRobert Richter { 291494100970SRobert Richter struct its_node *its = data; 291594100970SRobert Richter 2916fa150019SArd Biesheuvel /* erratum 22375: only alloc 8MB table size */ 2917fa150019SArd Biesheuvel its->device_ids = 0x14; /* 20 bits, 8MB */ 291894100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 29199d111d49SArd Biesheuvel 29209d111d49SArd Biesheuvel return true; 292194100970SRobert Richter } 292294100970SRobert Richter 29239d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 2924fbf8f40eSGanapatrao Kulkarni { 2925fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 2926fbf8f40eSGanapatrao Kulkarni 2927fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 29289d111d49SArd Biesheuvel 29299d111d49SArd Biesheuvel return true; 2930fbf8f40eSGanapatrao Kulkarni } 2931fbf8f40eSGanapatrao Kulkarni 29329d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 293390922a2dSShanker Donthineni { 293490922a2dSShanker Donthineni struct its_node *its = data; 293590922a2dSShanker Donthineni 293690922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 293790922a2dSShanker Donthineni its->ite_size = 16; 29389d111d49SArd Biesheuvel 29399d111d49SArd Biesheuvel return true; 294090922a2dSShanker Donthineni } 294190922a2dSShanker Donthineni 2942558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 2943558b0165SArd Biesheuvel { 2944558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 2945558b0165SArd Biesheuvel 2946558b0165SArd Biesheuvel /* 2947558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 2948558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 2949558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 2950558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 2951558b0165SArd Biesheuvel * the window offset. 2952558b0165SArd Biesheuvel */ 2953558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 2954558b0165SArd Biesheuvel } 2955558b0165SArd Biesheuvel 2956558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 2957558b0165SArd Biesheuvel { 2958558b0165SArd Biesheuvel struct its_node *its = data; 2959558b0165SArd Biesheuvel u32 pre_its_window[2]; 2960558b0165SArd Biesheuvel u32 ids; 2961558b0165SArd Biesheuvel 2962558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 2963558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 2964558b0165SArd Biesheuvel pre_its_window, 2965558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 2966558b0165SArd Biesheuvel 2967558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 2968558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 2969558b0165SArd Biesheuvel 2970558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 2971558b0165SArd Biesheuvel if (its->device_ids > ids) 2972558b0165SArd Biesheuvel its->device_ids = ids; 2973558b0165SArd Biesheuvel 2974558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 2975558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 2976558b0165SArd Biesheuvel return true; 2977558b0165SArd Biesheuvel } 2978558b0165SArd Biesheuvel return false; 2979558b0165SArd Biesheuvel } 2980558b0165SArd Biesheuvel 29815c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 29825c9a882eSMarc Zyngier { 29835c9a882eSMarc Zyngier struct its_node *its = data; 29845c9a882eSMarc Zyngier 29855c9a882eSMarc Zyngier /* 29865c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 29875c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 29885c9a882eSMarc Zyngier */ 29895c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 29905c9a882eSMarc Zyngier return true; 2991cc2d3216SMarc Zyngier } 29924c21f3c2SMarc Zyngier 299367510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 299494100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 299594100970SRobert Richter { 299694100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 299794100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 299894100970SRobert Richter .mask = 0xffff0fff, 299994100970SRobert Richter .init = its_enable_quirk_cavium_22375, 300094100970SRobert Richter }, 300194100970SRobert Richter #endif 3002fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 3003fbf8f40eSGanapatrao Kulkarni { 3004fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 3005fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 3006fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 3007fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 3008fbf8f40eSGanapatrao Kulkarni }, 3009fbf8f40eSGanapatrao Kulkarni #endif 301090922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 301190922a2dSShanker Donthineni { 301290922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 301390922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 301490922a2dSShanker Donthineni .mask = 0xffffffff, 301590922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 301690922a2dSShanker Donthineni }, 301790922a2dSShanker Donthineni #endif 3018558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 3019558b0165SArd Biesheuvel { 3020558b0165SArd Biesheuvel /* 3021558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 3022558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 3023558b0165SArd Biesheuvel * special handling in software. 3024558b0165SArd Biesheuvel */ 3025558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 3026558b0165SArd Biesheuvel .iidr = 0x0001143b, 3027558b0165SArd Biesheuvel .mask = 0xffffffff, 3028558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 3029558b0165SArd Biesheuvel }, 3030558b0165SArd Biesheuvel #endif 30315c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 30325c9a882eSMarc Zyngier { 30335c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 30345c9a882eSMarc Zyngier .iidr = 0x00000004, 30355c9a882eSMarc Zyngier .mask = 0xffffffff, 30365c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 30375c9a882eSMarc Zyngier }, 30385c9a882eSMarc Zyngier #endif 303967510ccaSRobert Richter { 304067510ccaSRobert Richter } 304167510ccaSRobert Richter }; 304267510ccaSRobert Richter 304367510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 304467510ccaSRobert Richter { 304567510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 304667510ccaSRobert Richter 304767510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 304867510ccaSRobert Richter } 304967510ccaSRobert Richter 3050dba0bc7bSDerek Basehore static int its_save_disable(void) 3051dba0bc7bSDerek Basehore { 3052dba0bc7bSDerek Basehore struct its_node *its; 3053dba0bc7bSDerek Basehore int err = 0; 3054dba0bc7bSDerek Basehore 3055dba0bc7bSDerek Basehore spin_lock(&its_lock); 3056dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3057dba0bc7bSDerek Basehore void __iomem *base; 3058dba0bc7bSDerek Basehore 3059dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3060dba0bc7bSDerek Basehore continue; 3061dba0bc7bSDerek Basehore 3062dba0bc7bSDerek Basehore base = its->base; 3063dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 3064dba0bc7bSDerek Basehore err = its_force_quiescent(base); 3065dba0bc7bSDerek Basehore if (err) { 3066dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 3067dba0bc7bSDerek Basehore &its->phys_base, err); 3068dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3069dba0bc7bSDerek Basehore goto err; 3070dba0bc7bSDerek Basehore } 3071dba0bc7bSDerek Basehore 3072dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 3073dba0bc7bSDerek Basehore } 3074dba0bc7bSDerek Basehore 3075dba0bc7bSDerek Basehore err: 3076dba0bc7bSDerek Basehore if (err) { 3077dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 3078dba0bc7bSDerek Basehore void __iomem *base; 3079dba0bc7bSDerek Basehore 3080dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3081dba0bc7bSDerek Basehore continue; 3082dba0bc7bSDerek Basehore 3083dba0bc7bSDerek Basehore base = its->base; 3084dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3085dba0bc7bSDerek Basehore } 3086dba0bc7bSDerek Basehore } 3087dba0bc7bSDerek Basehore spin_unlock(&its_lock); 3088dba0bc7bSDerek Basehore 3089dba0bc7bSDerek Basehore return err; 3090dba0bc7bSDerek Basehore } 3091dba0bc7bSDerek Basehore 3092dba0bc7bSDerek Basehore static void its_restore_enable(void) 3093dba0bc7bSDerek Basehore { 3094dba0bc7bSDerek Basehore struct its_node *its; 3095dba0bc7bSDerek Basehore int ret; 3096dba0bc7bSDerek Basehore 3097dba0bc7bSDerek Basehore spin_lock(&its_lock); 3098dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3099dba0bc7bSDerek Basehore void __iomem *base; 3100dba0bc7bSDerek Basehore int i; 3101dba0bc7bSDerek Basehore 3102dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3103dba0bc7bSDerek Basehore continue; 3104dba0bc7bSDerek Basehore 3105dba0bc7bSDerek Basehore base = its->base; 3106dba0bc7bSDerek Basehore 3107dba0bc7bSDerek Basehore /* 3108dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 3109dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 3110dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 3111dba0bc7bSDerek Basehore * Specification. 3112dba0bc7bSDerek Basehore */ 3113dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 3114dba0bc7bSDerek Basehore if (ret) { 3115dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 3116dba0bc7bSDerek Basehore &its->phys_base, ret); 3117dba0bc7bSDerek Basehore continue; 3118dba0bc7bSDerek Basehore } 3119dba0bc7bSDerek Basehore 3120dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 3121dba0bc7bSDerek Basehore 3122dba0bc7bSDerek Basehore /* 3123dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 3124dba0bc7bSDerek Basehore * cmd_write line up with it. 3125dba0bc7bSDerek Basehore */ 3126dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 3127dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 3128dba0bc7bSDerek Basehore 3129dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 3130dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3131dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 3132dba0bc7bSDerek Basehore 3133dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 3134dba0bc7bSDerek Basehore continue; 3135dba0bc7bSDerek Basehore 3136dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 3137dba0bc7bSDerek Basehore } 3138dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3139920181ceSDerek Basehore 3140920181ceSDerek Basehore /* 3141920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 3142920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 3143920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 3144920181ceSDerek Basehore */ 3145920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 3146920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 3147920181ceSDerek Basehore its_cpu_init_collection(its); 3148dba0bc7bSDerek Basehore } 3149dba0bc7bSDerek Basehore spin_unlock(&its_lock); 3150dba0bc7bSDerek Basehore } 3151dba0bc7bSDerek Basehore 3152dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 3153dba0bc7bSDerek Basehore .suspend = its_save_disable, 3154dba0bc7bSDerek Basehore .resume = its_restore_enable, 3155dba0bc7bSDerek Basehore }; 3156dba0bc7bSDerek Basehore 3157db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 3158d14ae5e6STomasz Nowicki { 3159d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 3160d14ae5e6STomasz Nowicki struct msi_domain_info *info; 3161d14ae5e6STomasz Nowicki 3162d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 3163d14ae5e6STomasz Nowicki if (!info) 3164d14ae5e6STomasz Nowicki return -ENOMEM; 3165d14ae5e6STomasz Nowicki 3166db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 3167d14ae5e6STomasz Nowicki if (!inner_domain) { 3168d14ae5e6STomasz Nowicki kfree(info); 3169d14ae5e6STomasz Nowicki return -ENOMEM; 3170d14ae5e6STomasz Nowicki } 3171d14ae5e6STomasz Nowicki 3172db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 317396f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 3174558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 3175d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 3176d14ae5e6STomasz Nowicki info->data = its; 3177d14ae5e6STomasz Nowicki inner_domain->host_data = info; 3178d14ae5e6STomasz Nowicki 3179d14ae5e6STomasz Nowicki return 0; 3180d14ae5e6STomasz Nowicki } 3181d14ae5e6STomasz Nowicki 31828fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 31838fff27aeSMarc Zyngier { 318420b3d54eSMarc Zyngier struct its_node *its; 318520b3d54eSMarc Zyngier u32 devid; 318620b3d54eSMarc Zyngier int entries; 318720b3d54eSMarc Zyngier 318820b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 318920b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 319020b3d54eSMarc Zyngier return 0; 319120b3d54eSMarc Zyngier } 319220b3d54eSMarc Zyngier 319320b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 319420b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 319520b3d54eSMarc Zyngier 319620b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 319720b3d54eSMarc Zyngier vpe_proxy.vpes = kzalloc(sizeof(*vpe_proxy.vpes) * entries, 319820b3d54eSMarc Zyngier GFP_KERNEL); 319920b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 320020b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 320120b3d54eSMarc Zyngier return -ENOMEM; 320220b3d54eSMarc Zyngier } 320320b3d54eSMarc Zyngier 320420b3d54eSMarc Zyngier /* Use the last possible DevID */ 320520b3d54eSMarc Zyngier devid = GENMASK(its->device_ids - 1, 0); 320620b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 320720b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 320820b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 320920b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 321020b3d54eSMarc Zyngier return -ENOMEM; 321120b3d54eSMarc Zyngier } 321220b3d54eSMarc Zyngier 3213c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 321420b3d54eSMarc Zyngier 321520b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 321620b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 321720b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 321820b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 321920b3d54eSMarc Zyngier 32208fff27aeSMarc Zyngier return 0; 32218fff27aeSMarc Zyngier } 32228fff27aeSMarc Zyngier 32233dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 32243dfa576bSMarc Zyngier void __iomem *its_base) 32253dfa576bSMarc Zyngier { 32263dfa576bSMarc Zyngier int its_number; 32273dfa576bSMarc Zyngier u32 ctlr; 32283dfa576bSMarc Zyngier 32293dfa576bSMarc Zyngier /* 32303dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 32313dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 32323dfa576bSMarc Zyngier * locking. Should this change, we should address 32333dfa576bSMarc Zyngier * this. 32343dfa576bSMarc Zyngier */ 3235ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 3236ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 32373dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 32383dfa576bSMarc Zyngier &res->start); 32393dfa576bSMarc Zyngier return -EINVAL; 32403dfa576bSMarc Zyngier } 32413dfa576bSMarc Zyngier 32423dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 32433dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 32443dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 32453dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 32463dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 32473dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 32483dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 32493dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 32503dfa576bSMarc Zyngier } 32513dfa576bSMarc Zyngier 32523dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 32533dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 32543dfa576bSMarc Zyngier &res->start, its_number); 32553dfa576bSMarc Zyngier return -EINVAL; 32563dfa576bSMarc Zyngier } 32573dfa576bSMarc Zyngier 32583dfa576bSMarc Zyngier return its_number; 32593dfa576bSMarc Zyngier } 32603dfa576bSMarc Zyngier 3261db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 3262db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 32634c21f3c2SMarc Zyngier { 32644c21f3c2SMarc Zyngier struct its_node *its; 32654c21f3c2SMarc Zyngier void __iomem *its_base; 32663dfa576bSMarc Zyngier u32 val, ctlr; 32673dfa576bSMarc Zyngier u64 baser, tmp, typer; 32684c21f3c2SMarc Zyngier int err; 32694c21f3c2SMarc Zyngier 3270db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 32714c21f3c2SMarc Zyngier if (!its_base) { 3272db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 32734c21f3c2SMarc Zyngier return -ENOMEM; 32744c21f3c2SMarc Zyngier } 32754c21f3c2SMarc Zyngier 32764c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 32774c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 3278db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 32794c21f3c2SMarc Zyngier err = -ENODEV; 32804c21f3c2SMarc Zyngier goto out_unmap; 32814c21f3c2SMarc Zyngier } 32824c21f3c2SMarc Zyngier 32834559fbb3SYun Wu err = its_force_quiescent(its_base); 32844559fbb3SYun Wu if (err) { 3285db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 32864559fbb3SYun Wu goto out_unmap; 32874559fbb3SYun Wu } 32884559fbb3SYun Wu 3289db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 32904c21f3c2SMarc Zyngier 32914c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 32924c21f3c2SMarc Zyngier if (!its) { 32934c21f3c2SMarc Zyngier err = -ENOMEM; 32944c21f3c2SMarc Zyngier goto out_unmap; 32954c21f3c2SMarc Zyngier } 32964c21f3c2SMarc Zyngier 32974c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 32984c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 32994c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 33003dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 33014c21f3c2SMarc Zyngier its->base = its_base; 3302db40f0a7STomasz Nowicki its->phys_base = res->start; 33033dfa576bSMarc Zyngier its->ite_size = GITS_TYPER_ITT_ENTRY_SIZE(typer); 3304fa150019SArd Biesheuvel its->device_ids = GITS_TYPER_DEVBITS(typer); 33053dfa576bSMarc Zyngier its->is_v4 = !!(typer & GITS_TYPER_VLPIS); 33063dfa576bSMarc Zyngier if (its->is_v4) { 33073dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 33083dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 33093dfa576bSMarc Zyngier if (err < 0) 33103dfa576bSMarc Zyngier goto out_free_its; 33113dfa576bSMarc Zyngier 3312debf6d02SMarc Zyngier its->list_nr = err; 3313debf6d02SMarc Zyngier 33143dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 33153dfa576bSMarc Zyngier &res->start, err); 33163dfa576bSMarc Zyngier } else { 33173dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 33183dfa576bSMarc Zyngier } 33193dfa576bSMarc Zyngier } 33203dfa576bSMarc Zyngier 3321db40f0a7STomasz Nowicki its->numa_node = numa_node; 33224c21f3c2SMarc Zyngier 33235bc13c2cSRobert Richter its->cmd_base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 33245bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 33254c21f3c2SMarc Zyngier if (!its->cmd_base) { 33264c21f3c2SMarc Zyngier err = -ENOMEM; 33274c21f3c2SMarc Zyngier goto out_free_its; 33284c21f3c2SMarc Zyngier } 33294c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 3330558b0165SArd Biesheuvel its->fwnode_handle = handle; 3331558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 3332558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 33334c21f3c2SMarc Zyngier 333467510ccaSRobert Richter its_enable_quirks(its); 333567510ccaSRobert Richter 33360e0b0f69SShanker Donthineni err = its_alloc_tables(its); 33374c21f3c2SMarc Zyngier if (err) 33384c21f3c2SMarc Zyngier goto out_free_cmd; 33394c21f3c2SMarc Zyngier 33404c21f3c2SMarc Zyngier err = its_alloc_collections(its); 33414c21f3c2SMarc Zyngier if (err) 33424c21f3c2SMarc Zyngier goto out_free_tables; 33434c21f3c2SMarc Zyngier 33444c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 33452fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 33464c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 33474c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 33484c21f3c2SMarc Zyngier GITS_CBASER_VALID); 33494c21f3c2SMarc Zyngier 33500968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 33510968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 33524c21f3c2SMarc Zyngier 33534ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 3354241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 3355241a386cSMarc Zyngier /* 3356241a386cSMarc Zyngier * The HW reports non-shareable, we must 3357241a386cSMarc Zyngier * remove the cacheability attributes as 3358241a386cSMarc Zyngier * well. 3359241a386cSMarc Zyngier */ 3360241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 3361241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 3362241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 33630968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 3364241a386cSMarc Zyngier } 33654c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 33664c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 33674c21f3c2SMarc Zyngier } 33684c21f3c2SMarc Zyngier 33690968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 33703dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 3371d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 3372d51c4b4dSMarc Zyngier if (its->is_v4) 3373d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 3374d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 3375241a386cSMarc Zyngier 3376dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 3377dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 3378dba0bc7bSDerek Basehore 3379db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 3380d14ae5e6STomasz Nowicki if (err) 338154456db9SMarc Zyngier goto out_free_tables; 33824c21f3c2SMarc Zyngier 33834c21f3c2SMarc Zyngier spin_lock(&its_lock); 33844c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 33854c21f3c2SMarc Zyngier spin_unlock(&its_lock); 33864c21f3c2SMarc Zyngier 33874c21f3c2SMarc Zyngier return 0; 33884c21f3c2SMarc Zyngier 33894c21f3c2SMarc Zyngier out_free_tables: 33904c21f3c2SMarc Zyngier its_free_tables(its); 33914c21f3c2SMarc Zyngier out_free_cmd: 33925bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 33934c21f3c2SMarc Zyngier out_free_its: 33944c21f3c2SMarc Zyngier kfree(its); 33954c21f3c2SMarc Zyngier out_unmap: 33964c21f3c2SMarc Zyngier iounmap(its_base); 3397db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 33984c21f3c2SMarc Zyngier return err; 33994c21f3c2SMarc Zyngier } 34004c21f3c2SMarc Zyngier 34014c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 34024c21f3c2SMarc Zyngier { 3403589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 34044c21f3c2SMarc Zyngier } 34054c21f3c2SMarc Zyngier 34064c21f3c2SMarc Zyngier int its_cpu_init(void) 34074c21f3c2SMarc Zyngier { 340816acae72SVladimir Murzin if (!list_empty(&its_nodes)) { 34094c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 34104c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 34114c21f3c2SMarc Zyngier return -ENXIO; 34124c21f3c2SMarc Zyngier } 34134c21f3c2SMarc Zyngier its_cpu_init_lpis(); 3414920181ceSDerek Basehore its_cpu_init_collections(); 34154c21f3c2SMarc Zyngier } 34164c21f3c2SMarc Zyngier 34174c21f3c2SMarc Zyngier return 0; 34184c21f3c2SMarc Zyngier } 34194c21f3c2SMarc Zyngier 3420935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 34214c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 34224c21f3c2SMarc Zyngier {}, 34234c21f3c2SMarc Zyngier }; 34244c21f3c2SMarc Zyngier 3425db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 34264c21f3c2SMarc Zyngier { 34274c21f3c2SMarc Zyngier struct device_node *np; 3428db40f0a7STomasz Nowicki struct resource res; 34294c21f3c2SMarc Zyngier 34304c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 34314c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 343295a25625SStephen Boyd if (!of_device_is_available(np)) 343395a25625SStephen Boyd continue; 3434d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 3435e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 3436e81f54c6SRob Herring np); 3437d14ae5e6STomasz Nowicki continue; 3438d14ae5e6STomasz Nowicki } 3439d14ae5e6STomasz Nowicki 3440db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 3441e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 3442db40f0a7STomasz Nowicki continue; 34434c21f3c2SMarc Zyngier } 34444c21f3c2SMarc Zyngier 3445db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 3446db40f0a7STomasz Nowicki } 3447db40f0a7STomasz Nowicki return 0; 3448db40f0a7STomasz Nowicki } 3449db40f0a7STomasz Nowicki 34503f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 34513f010cf1STomasz Nowicki 34523f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 34533f010cf1STomasz Nowicki 3454d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 3455dbd2b826SGanapatrao Kulkarni struct its_srat_map { 3456dbd2b826SGanapatrao Kulkarni /* numa node id */ 3457dbd2b826SGanapatrao Kulkarni u32 numa_node; 3458dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 3459dbd2b826SGanapatrao Kulkarni u32 its_id; 3460dbd2b826SGanapatrao Kulkarni }; 3461dbd2b826SGanapatrao Kulkarni 3462fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 3463dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 3464dbd2b826SGanapatrao Kulkarni 3465dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 3466dbd2b826SGanapatrao Kulkarni { 3467dbd2b826SGanapatrao Kulkarni int i; 3468dbd2b826SGanapatrao Kulkarni 3469dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 3470dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 3471dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 3472dbd2b826SGanapatrao Kulkarni } 3473dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 3474dbd2b826SGanapatrao Kulkarni } 3475dbd2b826SGanapatrao Kulkarni 3476fdf6e7a8SHanjun Guo static int __init gic_acpi_match_srat_its(struct acpi_subtable_header *header, 3477fdf6e7a8SHanjun Guo const unsigned long end) 3478fdf6e7a8SHanjun Guo { 3479fdf6e7a8SHanjun Guo return 0; 3480fdf6e7a8SHanjun Guo } 3481fdf6e7a8SHanjun Guo 3482dbd2b826SGanapatrao Kulkarni static int __init gic_acpi_parse_srat_its(struct acpi_subtable_header *header, 3483dbd2b826SGanapatrao Kulkarni const unsigned long end) 3484dbd2b826SGanapatrao Kulkarni { 3485dbd2b826SGanapatrao Kulkarni int node; 3486dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 3487dbd2b826SGanapatrao Kulkarni 3488dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 3489dbd2b826SGanapatrao Kulkarni if (!its_affinity) 3490dbd2b826SGanapatrao Kulkarni return -EINVAL; 3491dbd2b826SGanapatrao Kulkarni 3492dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 3493dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 3494dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 3495dbd2b826SGanapatrao Kulkarni return -EINVAL; 3496dbd2b826SGanapatrao Kulkarni } 3497dbd2b826SGanapatrao Kulkarni 3498dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 3499dbd2b826SGanapatrao Kulkarni 3500dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 3501dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 3502dbd2b826SGanapatrao Kulkarni return 0; 3503dbd2b826SGanapatrao Kulkarni } 3504dbd2b826SGanapatrao Kulkarni 3505dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 3506dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 3507dbd2b826SGanapatrao Kulkarni its_in_srat++; 3508dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 3509dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 3510dbd2b826SGanapatrao Kulkarni 3511dbd2b826SGanapatrao Kulkarni return 0; 3512dbd2b826SGanapatrao Kulkarni } 3513dbd2b826SGanapatrao Kulkarni 3514dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 3515dbd2b826SGanapatrao Kulkarni { 3516fdf6e7a8SHanjun Guo int count; 3517fdf6e7a8SHanjun Guo 3518fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 3519fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 3520fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3521fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 3522fdf6e7a8SHanjun Guo if (count <= 0) 3523fdf6e7a8SHanjun Guo return; 3524fdf6e7a8SHanjun Guo 3525fdf6e7a8SHanjun Guo its_srat_maps = kmalloc(count * sizeof(struct its_srat_map), 3526fdf6e7a8SHanjun Guo GFP_KERNEL); 3527fdf6e7a8SHanjun Guo if (!its_srat_maps) { 3528fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 3529fdf6e7a8SHanjun Guo return; 3530fdf6e7a8SHanjun Guo } 3531fdf6e7a8SHanjun Guo 3532dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 3533dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 3534dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3535dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 3536dbd2b826SGanapatrao Kulkarni } 3537fdf6e7a8SHanjun Guo 3538fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 3539fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 3540fdf6e7a8SHanjun Guo { 3541fdf6e7a8SHanjun Guo kfree(its_srat_maps); 3542fdf6e7a8SHanjun Guo } 3543dbd2b826SGanapatrao Kulkarni #else 3544dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 3545dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 3546fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 3547dbd2b826SGanapatrao Kulkarni #endif 3548dbd2b826SGanapatrao Kulkarni 35493f010cf1STomasz Nowicki static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header, 35503f010cf1STomasz Nowicki const unsigned long end) 35513f010cf1STomasz Nowicki { 35523f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 35533f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 35543f010cf1STomasz Nowicki struct resource res; 35553f010cf1STomasz Nowicki int err; 35563f010cf1STomasz Nowicki 35573f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 35583f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 35593f010cf1STomasz Nowicki res.start = its_entry->base_address; 35603f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 35613f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 35623f010cf1STomasz Nowicki 35633f010cf1STomasz Nowicki dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address); 35643f010cf1STomasz Nowicki if (!dom_handle) { 35653f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 35663f010cf1STomasz Nowicki &res.start); 35673f010cf1STomasz Nowicki return -ENOMEM; 35683f010cf1STomasz Nowicki } 35693f010cf1STomasz Nowicki 35703f010cf1STomasz Nowicki err = iort_register_domain_token(its_entry->translation_id, dom_handle); 35713f010cf1STomasz Nowicki if (err) { 35723f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 35733f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 35743f010cf1STomasz Nowicki goto dom_err; 35753f010cf1STomasz Nowicki } 35763f010cf1STomasz Nowicki 3577dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 3578dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 35793f010cf1STomasz Nowicki if (!err) 35803f010cf1STomasz Nowicki return 0; 35813f010cf1STomasz Nowicki 35823f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 35833f010cf1STomasz Nowicki dom_err: 35843f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 35853f010cf1STomasz Nowicki return err; 35863f010cf1STomasz Nowicki } 35873f010cf1STomasz Nowicki 35883f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 35893f010cf1STomasz Nowicki { 3590dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 35913f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 35923f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 3593fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 35943f010cf1STomasz Nowicki } 35953f010cf1STomasz Nowicki #else 35963f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 35973f010cf1STomasz Nowicki #endif 35983f010cf1STomasz Nowicki 3599db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 3600db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 3601db40f0a7STomasz Nowicki { 3602db40f0a7STomasz Nowicki struct device_node *of_node; 36038fff27aeSMarc Zyngier struct its_node *its; 36048fff27aeSMarc Zyngier bool has_v4 = false; 36058fff27aeSMarc Zyngier int err; 3606db40f0a7STomasz Nowicki 3607db40f0a7STomasz Nowicki its_parent = parent_domain; 3608db40f0a7STomasz Nowicki of_node = to_of_node(handle); 3609db40f0a7STomasz Nowicki if (of_node) 3610db40f0a7STomasz Nowicki its_of_probe(of_node); 3611db40f0a7STomasz Nowicki else 36123f010cf1STomasz Nowicki its_acpi_probe(); 3613db40f0a7STomasz Nowicki 36144c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 36154c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 36164c21f3c2SMarc Zyngier return -ENXIO; 36174c21f3c2SMarc Zyngier } 36184c21f3c2SMarc Zyngier 36194c21f3c2SMarc Zyngier gic_rdists = rdists; 36208fff27aeSMarc Zyngier err = its_alloc_lpi_tables(); 36218fff27aeSMarc Zyngier if (err) 36228fff27aeSMarc Zyngier return err; 36238fff27aeSMarc Zyngier 36248fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 36258fff27aeSMarc Zyngier has_v4 |= its->is_v4; 36268fff27aeSMarc Zyngier 36278fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 36283d63cb53SMarc Zyngier if (its_init_vpe_domain() || 36293d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 36308fff27aeSMarc Zyngier rdists->has_vlpis = false; 36318fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 36328fff27aeSMarc Zyngier } 36338fff27aeSMarc Zyngier } 36348fff27aeSMarc Zyngier 3635dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 3636dba0bc7bSDerek Basehore 36378fff27aeSMarc Zyngier return 0; 36384c21f3c2SMarc Zyngier } 3639