1cc2d3216SMarc Zyngier /* 2d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 183f010cf1STomasz Nowicki #include <linux/acpi.h> 198d3554b8SHanjun Guo #include <linux/acpi_iort.h> 20cc2d3216SMarc Zyngier #include <linux/bitmap.h> 21cc2d3216SMarc Zyngier #include <linux/cpu.h> 22cc2d3216SMarc Zyngier #include <linux/delay.h> 2344bb7e24SRobin Murphy #include <linux/dma-iommu.h> 24cc2d3216SMarc Zyngier #include <linux/interrupt.h> 253f010cf1STomasz Nowicki #include <linux/irqdomain.h> 26*880cb3cdSMarc Zyngier #include <linux/list.h> 27*880cb3cdSMarc Zyngier #include <linux/list_sort.h> 28cc2d3216SMarc Zyngier #include <linux/log2.h> 29cc2d3216SMarc Zyngier #include <linux/mm.h> 30cc2d3216SMarc Zyngier #include <linux/msi.h> 31cc2d3216SMarc Zyngier #include <linux/of.h> 32cc2d3216SMarc Zyngier #include <linux/of_address.h> 33cc2d3216SMarc Zyngier #include <linux/of_irq.h> 34cc2d3216SMarc Zyngier #include <linux/of_pci.h> 35cc2d3216SMarc Zyngier #include <linux/of_platform.h> 36cc2d3216SMarc Zyngier #include <linux/percpu.h> 37cc2d3216SMarc Zyngier #include <linux/slab.h> 38dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 39cc2d3216SMarc Zyngier 4041a83e06SJoel Porquet #include <linux/irqchip.h> 41cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 42c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 43cc2d3216SMarc Zyngier 44cc2d3216SMarc Zyngier #include <asm/cputype.h> 45cc2d3216SMarc Zyngier #include <asm/exception.h> 46cc2d3216SMarc Zyngier 4767510ccaSRobert Richter #include "irq-gic-common.h" 4867510ccaSRobert Richter 4994100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 5094100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 51fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 52dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 53cc2d3216SMarc Zyngier 54c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 55c48ed51cSMarc Zyngier 56a13b0404SMarc Zyngier static u32 lpi_id_bits; 57a13b0404SMarc Zyngier 58a13b0404SMarc Zyngier /* 59a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 60a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 61a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 62a13b0404SMarc Zyngier */ 63a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 64a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 65a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 66a13b0404SMarc Zyngier 67a13b0404SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 68a13b0404SMarc Zyngier 69cc2d3216SMarc Zyngier /* 70cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 71cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 72cc2d3216SMarc Zyngier * CPU. 73cc2d3216SMarc Zyngier */ 74cc2d3216SMarc Zyngier struct its_collection { 75cc2d3216SMarc Zyngier u64 target_address; 76cc2d3216SMarc Zyngier u16 col_id; 77cc2d3216SMarc Zyngier }; 78cc2d3216SMarc Zyngier 79cc2d3216SMarc Zyngier /* 809347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 819347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 82466b7d16SShanker Donthineni */ 83466b7d16SShanker Donthineni struct its_baser { 84466b7d16SShanker Donthineni void *base; 85466b7d16SShanker Donthineni u64 val; 86466b7d16SShanker Donthineni u32 order; 879347359aSShanker Donthineni u32 psz; 88466b7d16SShanker Donthineni }; 89466b7d16SShanker Donthineni 90558b0165SArd Biesheuvel struct its_device; 91558b0165SArd Biesheuvel 92466b7d16SShanker Donthineni /* 93cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 94841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 95841514abSMarc Zyngier * list of devices writing to it. 96cc2d3216SMarc Zyngier */ 97cc2d3216SMarc Zyngier struct its_node { 98cc2d3216SMarc Zyngier raw_spinlock_t lock; 99cc2d3216SMarc Zyngier struct list_head entry; 100cc2d3216SMarc Zyngier void __iomem *base; 101db40f0a7STomasz Nowicki phys_addr_t phys_base; 102cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 103cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 104466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 105cc2d3216SMarc Zyngier struct its_collection *collections; 106558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 107558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 108dba0bc7bSDerek Basehore u64 cbaser_save; 109dba0bc7bSDerek Basehore u32 ctlr_save; 110cc2d3216SMarc Zyngier struct list_head its_device_list; 111cc2d3216SMarc Zyngier u64 flags; 112debf6d02SMarc Zyngier unsigned long list_nr; 113cc2d3216SMarc Zyngier u32 ite_size; 114466b7d16SShanker Donthineni u32 device_ids; 115fbf8f40eSGanapatrao Kulkarni int numa_node; 116558b0165SArd Biesheuvel unsigned int msi_domain_flags; 117558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1183dfa576bSMarc Zyngier bool is_v4; 1195c9a882eSMarc Zyngier int vlpi_redist_offset; 120cc2d3216SMarc Zyngier }; 121cc2d3216SMarc Zyngier 122cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 123cc2d3216SMarc Zyngier 12432bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 12532bd44dcSShanker Donthineni #define ITS_MAX_VPEID_BITS (16) 12632bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 12732bd44dcSShanker Donthineni 1282eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1292eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1302eca0d6cSShanker Donthineni 131591e5becSMarc Zyngier struct event_lpi_map { 132591e5becSMarc Zyngier unsigned long *lpi_map; 133591e5becSMarc Zyngier u16 *col_map; 134591e5becSMarc Zyngier irq_hw_number_t lpi_base; 135591e5becSMarc Zyngier int nr_lpis; 136d011e4e6SMarc Zyngier struct mutex vlpi_lock; 137d011e4e6SMarc Zyngier struct its_vm *vm; 138d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 139d011e4e6SMarc Zyngier int nr_vlpis; 140591e5becSMarc Zyngier }; 141591e5becSMarc Zyngier 142cc2d3216SMarc Zyngier /* 143d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 144d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 145d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 146d011e4e6SMarc Zyngier * indicates which one. 147cc2d3216SMarc Zyngier */ 148cc2d3216SMarc Zyngier struct its_device { 149cc2d3216SMarc Zyngier struct list_head entry; 150cc2d3216SMarc Zyngier struct its_node *its; 151591e5becSMarc Zyngier struct event_lpi_map event_map; 152cc2d3216SMarc Zyngier void *itt; 153cc2d3216SMarc Zyngier u32 nr_ites; 154cc2d3216SMarc Zyngier u32 device_id; 155cc2d3216SMarc Zyngier }; 156cc2d3216SMarc Zyngier 15720b3d54eSMarc Zyngier static struct { 15820b3d54eSMarc Zyngier raw_spinlock_t lock; 15920b3d54eSMarc Zyngier struct its_device *dev; 16020b3d54eSMarc Zyngier struct its_vpe **vpes; 16120b3d54eSMarc Zyngier int next_victim; 16220b3d54eSMarc Zyngier } vpe_proxy; 16320b3d54eSMarc Zyngier 1641ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 1651ac19ca6SMarc Zyngier static DEFINE_SPINLOCK(its_lock); 1661ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 167db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1681ac19ca6SMarc Zyngier 1693dfa576bSMarc Zyngier static unsigned long its_list_map; 1703171a47aSMarc Zyngier static u16 vmovp_seq_num; 1713171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1723171a47aSMarc Zyngier 1737d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1743dfa576bSMarc Zyngier 1751ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 1761ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 177e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1781ac19ca6SMarc Zyngier 179591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 180591e5becSMarc Zyngier u32 event) 181591e5becSMarc Zyngier { 182591e5becSMarc Zyngier struct its_node *its = its_dev->its; 183591e5becSMarc Zyngier 184591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 185591e5becSMarc Zyngier } 186591e5becSMarc Zyngier 18783559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 18883559b47SMarc Zyngier { 18983559b47SMarc Zyngier if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(0, 15))) 19083559b47SMarc Zyngier return NULL; 19183559b47SMarc Zyngier 19283559b47SMarc Zyngier return col; 19383559b47SMarc Zyngier } 19483559b47SMarc Zyngier 195205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 196205e065dSMarc Zyngier { 197205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 198205e065dSMarc Zyngier return vpe; 199205e065dSMarc Zyngier 200205e065dSMarc Zyngier return NULL; 201205e065dSMarc Zyngier } 202205e065dSMarc Zyngier 203cc2d3216SMarc Zyngier /* 204cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 205cc2d3216SMarc Zyngier * block. 206cc2d3216SMarc Zyngier */ 207cc2d3216SMarc Zyngier struct its_cmd_desc { 208cc2d3216SMarc Zyngier union { 209cc2d3216SMarc Zyngier struct { 210cc2d3216SMarc Zyngier struct its_device *dev; 211cc2d3216SMarc Zyngier u32 event_id; 212cc2d3216SMarc Zyngier } its_inv_cmd; 213cc2d3216SMarc Zyngier 214cc2d3216SMarc Zyngier struct { 215cc2d3216SMarc Zyngier struct its_device *dev; 216cc2d3216SMarc Zyngier u32 event_id; 2178d85dcedSMarc Zyngier } its_clear_cmd; 2188d85dcedSMarc Zyngier 2198d85dcedSMarc Zyngier struct { 2208d85dcedSMarc Zyngier struct its_device *dev; 2218d85dcedSMarc Zyngier u32 event_id; 222cc2d3216SMarc Zyngier } its_int_cmd; 223cc2d3216SMarc Zyngier 224cc2d3216SMarc Zyngier struct { 225cc2d3216SMarc Zyngier struct its_device *dev; 226cc2d3216SMarc Zyngier int valid; 227cc2d3216SMarc Zyngier } its_mapd_cmd; 228cc2d3216SMarc Zyngier 229cc2d3216SMarc Zyngier struct { 230cc2d3216SMarc Zyngier struct its_collection *col; 231cc2d3216SMarc Zyngier int valid; 232cc2d3216SMarc Zyngier } its_mapc_cmd; 233cc2d3216SMarc Zyngier 234cc2d3216SMarc Zyngier struct { 235cc2d3216SMarc Zyngier struct its_device *dev; 236cc2d3216SMarc Zyngier u32 phys_id; 237cc2d3216SMarc Zyngier u32 event_id; 2386a25ad3aSMarc Zyngier } its_mapti_cmd; 239cc2d3216SMarc Zyngier 240cc2d3216SMarc Zyngier struct { 241cc2d3216SMarc Zyngier struct its_device *dev; 242cc2d3216SMarc Zyngier struct its_collection *col; 243591e5becSMarc Zyngier u32 event_id; 244cc2d3216SMarc Zyngier } its_movi_cmd; 245cc2d3216SMarc Zyngier 246cc2d3216SMarc Zyngier struct { 247cc2d3216SMarc Zyngier struct its_device *dev; 248cc2d3216SMarc Zyngier u32 event_id; 249cc2d3216SMarc Zyngier } its_discard_cmd; 250cc2d3216SMarc Zyngier 251cc2d3216SMarc Zyngier struct { 252cc2d3216SMarc Zyngier struct its_collection *col; 253cc2d3216SMarc Zyngier } its_invall_cmd; 254d011e4e6SMarc Zyngier 255d011e4e6SMarc Zyngier struct { 256d011e4e6SMarc Zyngier struct its_vpe *vpe; 257eb78192bSMarc Zyngier } its_vinvall_cmd; 258eb78192bSMarc Zyngier 259eb78192bSMarc Zyngier struct { 260eb78192bSMarc Zyngier struct its_vpe *vpe; 261eb78192bSMarc Zyngier struct its_collection *col; 262eb78192bSMarc Zyngier bool valid; 263eb78192bSMarc Zyngier } its_vmapp_cmd; 264eb78192bSMarc Zyngier 265eb78192bSMarc Zyngier struct { 266eb78192bSMarc Zyngier struct its_vpe *vpe; 267d011e4e6SMarc Zyngier struct its_device *dev; 268d011e4e6SMarc Zyngier u32 virt_id; 269d011e4e6SMarc Zyngier u32 event_id; 270d011e4e6SMarc Zyngier bool db_enabled; 271d011e4e6SMarc Zyngier } its_vmapti_cmd; 272d011e4e6SMarc Zyngier 273d011e4e6SMarc Zyngier struct { 274d011e4e6SMarc Zyngier struct its_vpe *vpe; 275d011e4e6SMarc Zyngier struct its_device *dev; 276d011e4e6SMarc Zyngier u32 event_id; 277d011e4e6SMarc Zyngier bool db_enabled; 278d011e4e6SMarc Zyngier } its_vmovi_cmd; 2793171a47aSMarc Zyngier 2803171a47aSMarc Zyngier struct { 2813171a47aSMarc Zyngier struct its_vpe *vpe; 2823171a47aSMarc Zyngier struct its_collection *col; 2833171a47aSMarc Zyngier u16 seq_num; 2843171a47aSMarc Zyngier u16 its_list; 2853171a47aSMarc Zyngier } its_vmovp_cmd; 286cc2d3216SMarc Zyngier }; 287cc2d3216SMarc Zyngier }; 288cc2d3216SMarc Zyngier 289cc2d3216SMarc Zyngier /* 290cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 291cc2d3216SMarc Zyngier */ 292cc2d3216SMarc Zyngier struct its_cmd_block { 293cc2d3216SMarc Zyngier u64 raw_cmd[4]; 294cc2d3216SMarc Zyngier }; 295cc2d3216SMarc Zyngier 296cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 297cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 298cc2d3216SMarc Zyngier 29967047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 30067047f90SMarc Zyngier struct its_cmd_block *, 301cc2d3216SMarc Zyngier struct its_cmd_desc *); 302cc2d3216SMarc Zyngier 30367047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 30467047f90SMarc Zyngier struct its_cmd_block *, 305d011e4e6SMarc Zyngier struct its_cmd_desc *); 306d011e4e6SMarc Zyngier 3074d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 3084d36f136SMarc Zyngier { 3094d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 3104d36f136SMarc Zyngier *raw_cmd &= ~mask; 3114d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 3124d36f136SMarc Zyngier } 3134d36f136SMarc Zyngier 314cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 315cc2d3216SMarc Zyngier { 3164d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 317cc2d3216SMarc Zyngier } 318cc2d3216SMarc Zyngier 319cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 320cc2d3216SMarc Zyngier { 3214d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 322cc2d3216SMarc Zyngier } 323cc2d3216SMarc Zyngier 324cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 325cc2d3216SMarc Zyngier { 3264d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 327cc2d3216SMarc Zyngier } 328cc2d3216SMarc Zyngier 329cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 330cc2d3216SMarc Zyngier { 3314d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 332cc2d3216SMarc Zyngier } 333cc2d3216SMarc Zyngier 334cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 335cc2d3216SMarc Zyngier { 3364d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 337cc2d3216SMarc Zyngier } 338cc2d3216SMarc Zyngier 339cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 340cc2d3216SMarc Zyngier { 34130ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 342cc2d3216SMarc Zyngier } 343cc2d3216SMarc Zyngier 344cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 345cc2d3216SMarc Zyngier { 3464d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 347cc2d3216SMarc Zyngier } 348cc2d3216SMarc Zyngier 349cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 350cc2d3216SMarc Zyngier { 35130ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 352cc2d3216SMarc Zyngier } 353cc2d3216SMarc Zyngier 354cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 355cc2d3216SMarc Zyngier { 3564d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 357cc2d3216SMarc Zyngier } 358cc2d3216SMarc Zyngier 359d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 360d011e4e6SMarc Zyngier { 361d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 362d011e4e6SMarc Zyngier } 363d011e4e6SMarc Zyngier 364d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 365d011e4e6SMarc Zyngier { 366d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 367d011e4e6SMarc Zyngier } 368d011e4e6SMarc Zyngier 369d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 370d011e4e6SMarc Zyngier { 371d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 372d011e4e6SMarc Zyngier } 373d011e4e6SMarc Zyngier 374d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 375d011e4e6SMarc Zyngier { 376d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 377d011e4e6SMarc Zyngier } 378d011e4e6SMarc Zyngier 3793171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 3803171a47aSMarc Zyngier { 3813171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 3823171a47aSMarc Zyngier } 3833171a47aSMarc Zyngier 3843171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 3853171a47aSMarc Zyngier { 3863171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 3873171a47aSMarc Zyngier } 3883171a47aSMarc Zyngier 389eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 390eb78192bSMarc Zyngier { 39130ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 392eb78192bSMarc Zyngier } 393eb78192bSMarc Zyngier 394eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 395eb78192bSMarc Zyngier { 396eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 397eb78192bSMarc Zyngier } 398eb78192bSMarc Zyngier 399cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 400cc2d3216SMarc Zyngier { 401cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 402cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 403cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 404cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 405cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 406cc2d3216SMarc Zyngier } 407cc2d3216SMarc Zyngier 40867047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 40967047f90SMarc Zyngier struct its_cmd_block *cmd, 410cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 411cc2d3216SMarc Zyngier { 412cc2d3216SMarc Zyngier unsigned long itt_addr; 413c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 414cc2d3216SMarc Zyngier 415cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 416cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 417cc2d3216SMarc Zyngier 418cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 419cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 420cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 421cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 422cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 423cc2d3216SMarc Zyngier 424cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 425cc2d3216SMarc Zyngier 426591e5becSMarc Zyngier return NULL; 427cc2d3216SMarc Zyngier } 428cc2d3216SMarc Zyngier 42967047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 43067047f90SMarc Zyngier struct its_cmd_block *cmd, 431cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 432cc2d3216SMarc Zyngier { 433cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 434cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 435cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 436cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 437cc2d3216SMarc Zyngier 438cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 439cc2d3216SMarc Zyngier 440cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 441cc2d3216SMarc Zyngier } 442cc2d3216SMarc Zyngier 44367047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 44467047f90SMarc Zyngier struct its_cmd_block *cmd, 445cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 446cc2d3216SMarc Zyngier { 447591e5becSMarc Zyngier struct its_collection *col; 448591e5becSMarc Zyngier 4496a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 4506a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 451591e5becSMarc Zyngier 4526a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 4536a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 4546a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 4556a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 456591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 457cc2d3216SMarc Zyngier 458cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 459cc2d3216SMarc Zyngier 46083559b47SMarc Zyngier return valid_col(col); 461cc2d3216SMarc Zyngier } 462cc2d3216SMarc Zyngier 46367047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 46467047f90SMarc Zyngier struct its_cmd_block *cmd, 465cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 466cc2d3216SMarc Zyngier { 467591e5becSMarc Zyngier struct its_collection *col; 468591e5becSMarc Zyngier 469591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 470591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 471591e5becSMarc Zyngier 472cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 473cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 474591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 475cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 476cc2d3216SMarc Zyngier 477cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 478cc2d3216SMarc Zyngier 47983559b47SMarc Zyngier return valid_col(col); 480cc2d3216SMarc Zyngier } 481cc2d3216SMarc Zyngier 48267047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 48367047f90SMarc Zyngier struct its_cmd_block *cmd, 484cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 485cc2d3216SMarc Zyngier { 486591e5becSMarc Zyngier struct its_collection *col; 487591e5becSMarc Zyngier 488591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 489591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 490591e5becSMarc Zyngier 491cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 492cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 493cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 494cc2d3216SMarc Zyngier 495cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 496cc2d3216SMarc Zyngier 49783559b47SMarc Zyngier return valid_col(col); 498cc2d3216SMarc Zyngier } 499cc2d3216SMarc Zyngier 50067047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 50167047f90SMarc Zyngier struct its_cmd_block *cmd, 502cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 503cc2d3216SMarc Zyngier { 504591e5becSMarc Zyngier struct its_collection *col; 505591e5becSMarc Zyngier 506591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 507591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 508591e5becSMarc Zyngier 509cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 510cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 511cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 512cc2d3216SMarc Zyngier 513cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 514cc2d3216SMarc Zyngier 51583559b47SMarc Zyngier return valid_col(col); 516cc2d3216SMarc Zyngier } 517cc2d3216SMarc Zyngier 51867047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 51967047f90SMarc Zyngier struct its_cmd_block *cmd, 5208d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5218d85dcedSMarc Zyngier { 5228d85dcedSMarc Zyngier struct its_collection *col; 5238d85dcedSMarc Zyngier 5248d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 5258d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 5268d85dcedSMarc Zyngier 5278d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 5288d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 5298d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 5308d85dcedSMarc Zyngier 5318d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5328d85dcedSMarc Zyngier 53383559b47SMarc Zyngier return valid_col(col); 5348d85dcedSMarc Zyngier } 5358d85dcedSMarc Zyngier 53667047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 53767047f90SMarc Zyngier struct its_cmd_block *cmd, 5388d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5398d85dcedSMarc Zyngier { 5408d85dcedSMarc Zyngier struct its_collection *col; 5418d85dcedSMarc Zyngier 5428d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 5438d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 5448d85dcedSMarc Zyngier 5458d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 5468d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 5478d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 5488d85dcedSMarc Zyngier 5498d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5508d85dcedSMarc Zyngier 55183559b47SMarc Zyngier return valid_col(col); 5528d85dcedSMarc Zyngier } 5538d85dcedSMarc Zyngier 55467047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 55567047f90SMarc Zyngier struct its_cmd_block *cmd, 556cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 557cc2d3216SMarc Zyngier { 558cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 559cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 560cc2d3216SMarc Zyngier 561cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 562cc2d3216SMarc Zyngier 563cc2d3216SMarc Zyngier return NULL; 564cc2d3216SMarc Zyngier } 565cc2d3216SMarc Zyngier 56667047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 56767047f90SMarc Zyngier struct its_cmd_block *cmd, 568eb78192bSMarc Zyngier struct its_cmd_desc *desc) 569eb78192bSMarc Zyngier { 570eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 571eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 572eb78192bSMarc Zyngier 573eb78192bSMarc Zyngier its_fixup_cmd(cmd); 574eb78192bSMarc Zyngier 575205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 576eb78192bSMarc Zyngier } 577eb78192bSMarc Zyngier 57867047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 57967047f90SMarc Zyngier struct its_cmd_block *cmd, 580eb78192bSMarc Zyngier struct its_cmd_desc *desc) 581eb78192bSMarc Zyngier { 582eb78192bSMarc Zyngier unsigned long vpt_addr; 5835c9a882eSMarc Zyngier u64 target; 584eb78192bSMarc Zyngier 585eb78192bSMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 5865c9a882eSMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 587eb78192bSMarc Zyngier 588eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 589eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 590eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 5915c9a882eSMarc Zyngier its_encode_target(cmd, target); 592eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 593eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 594eb78192bSMarc Zyngier 595eb78192bSMarc Zyngier its_fixup_cmd(cmd); 596eb78192bSMarc Zyngier 597205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 598eb78192bSMarc Zyngier } 599eb78192bSMarc Zyngier 60067047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 60167047f90SMarc Zyngier struct its_cmd_block *cmd, 602d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 603d011e4e6SMarc Zyngier { 604d011e4e6SMarc Zyngier u32 db; 605d011e4e6SMarc Zyngier 606d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 607d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 608d011e4e6SMarc Zyngier else 609d011e4e6SMarc Zyngier db = 1023; 610d011e4e6SMarc Zyngier 611d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 612d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 613d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 614d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 615d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 616d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 617d011e4e6SMarc Zyngier 618d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 619d011e4e6SMarc Zyngier 620205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 621d011e4e6SMarc Zyngier } 622d011e4e6SMarc Zyngier 62367047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 62467047f90SMarc Zyngier struct its_cmd_block *cmd, 625d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 626d011e4e6SMarc Zyngier { 627d011e4e6SMarc Zyngier u32 db; 628d011e4e6SMarc Zyngier 629d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 630d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 631d011e4e6SMarc Zyngier else 632d011e4e6SMarc Zyngier db = 1023; 633d011e4e6SMarc Zyngier 634d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 635d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 636d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 637d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 638d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 639d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 640d011e4e6SMarc Zyngier 641d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 642d011e4e6SMarc Zyngier 643205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 644d011e4e6SMarc Zyngier } 645d011e4e6SMarc Zyngier 64667047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 64767047f90SMarc Zyngier struct its_cmd_block *cmd, 6483171a47aSMarc Zyngier struct its_cmd_desc *desc) 6493171a47aSMarc Zyngier { 6505c9a882eSMarc Zyngier u64 target; 6515c9a882eSMarc Zyngier 6525c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 6533171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 6543171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 6553171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 6563171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 6575c9a882eSMarc Zyngier its_encode_target(cmd, target); 6583171a47aSMarc Zyngier 6593171a47aSMarc Zyngier its_fixup_cmd(cmd); 6603171a47aSMarc Zyngier 661205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 6623171a47aSMarc Zyngier } 6633171a47aSMarc Zyngier 664cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 665cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 666cc2d3216SMarc Zyngier { 667cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 668cc2d3216SMarc Zyngier } 669cc2d3216SMarc Zyngier 670cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 671cc2d3216SMarc Zyngier { 672cc2d3216SMarc Zyngier int widx; 673cc2d3216SMarc Zyngier int ridx; 674cc2d3216SMarc Zyngier 675cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 676cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 677cc2d3216SMarc Zyngier 678cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 679cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 680cc2d3216SMarc Zyngier return 1; 681cc2d3216SMarc Zyngier 682cc2d3216SMarc Zyngier return 0; 683cc2d3216SMarc Zyngier } 684cc2d3216SMarc Zyngier 685cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 686cc2d3216SMarc Zyngier { 687cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 688cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 689cc2d3216SMarc Zyngier 690cc2d3216SMarc Zyngier while (its_queue_full(its)) { 691cc2d3216SMarc Zyngier count--; 692cc2d3216SMarc Zyngier if (!count) { 693cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 694cc2d3216SMarc Zyngier return NULL; 695cc2d3216SMarc Zyngier } 696cc2d3216SMarc Zyngier cpu_relax(); 697cc2d3216SMarc Zyngier udelay(1); 698cc2d3216SMarc Zyngier } 699cc2d3216SMarc Zyngier 700cc2d3216SMarc Zyngier cmd = its->cmd_write++; 701cc2d3216SMarc Zyngier 702cc2d3216SMarc Zyngier /* Handle queue wrapping */ 703cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 704cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 705cc2d3216SMarc Zyngier 70634d677a9SMarc Zyngier /* Clear command */ 70734d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 70834d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 70934d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 71034d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 71134d677a9SMarc Zyngier 712cc2d3216SMarc Zyngier return cmd; 713cc2d3216SMarc Zyngier } 714cc2d3216SMarc Zyngier 715cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 716cc2d3216SMarc Zyngier { 717cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 718cc2d3216SMarc Zyngier 719cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 720cc2d3216SMarc Zyngier 721cc2d3216SMarc Zyngier return its->cmd_write; 722cc2d3216SMarc Zyngier } 723cc2d3216SMarc Zyngier 724cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 725cc2d3216SMarc Zyngier { 726cc2d3216SMarc Zyngier /* 727cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 728cc2d3216SMarc Zyngier * the ITS. 729cc2d3216SMarc Zyngier */ 730cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 731328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 732cc2d3216SMarc Zyngier else 733cc2d3216SMarc Zyngier dsb(ishst); 734cc2d3216SMarc Zyngier } 735cc2d3216SMarc Zyngier 736a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 737cc2d3216SMarc Zyngier struct its_cmd_block *from, 738cc2d3216SMarc Zyngier struct its_cmd_block *to) 739cc2d3216SMarc Zyngier { 740cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 741cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 742cc2d3216SMarc Zyngier 743cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 744cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 745cc2d3216SMarc Zyngier 746cc2d3216SMarc Zyngier while (1) { 747cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 7489bdd8b1cSMarc Zyngier 7499bdd8b1cSMarc Zyngier /* Direct case */ 7509bdd8b1cSMarc Zyngier if (from_idx < to_idx && rd_idx >= to_idx) 7519bdd8b1cSMarc Zyngier break; 7529bdd8b1cSMarc Zyngier 7539bdd8b1cSMarc Zyngier /* Wrapped case */ 7549bdd8b1cSMarc Zyngier if (from_idx >= to_idx && rd_idx >= to_idx && rd_idx < from_idx) 755cc2d3216SMarc Zyngier break; 756cc2d3216SMarc Zyngier 757cc2d3216SMarc Zyngier count--; 758cc2d3216SMarc Zyngier if (!count) { 759a19b462fSMarc Zyngier pr_err_ratelimited("ITS queue timeout (%llu %llu %llu)\n", 760a19b462fSMarc Zyngier from_idx, to_idx, rd_idx); 761a19b462fSMarc Zyngier return -1; 762cc2d3216SMarc Zyngier } 763cc2d3216SMarc Zyngier cpu_relax(); 764cc2d3216SMarc Zyngier udelay(1); 765cc2d3216SMarc Zyngier } 766a19b462fSMarc Zyngier 767a19b462fSMarc Zyngier return 0; 768cc2d3216SMarc Zyngier } 769cc2d3216SMarc Zyngier 770e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 771e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 772e4f9094bSMarc Zyngier void name(struct its_node *its, \ 773e4f9094bSMarc Zyngier buildtype builder, \ 774e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 775e4f9094bSMarc Zyngier { \ 776e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 777e4f9094bSMarc Zyngier synctype *sync_obj; \ 778e4f9094bSMarc Zyngier unsigned long flags; \ 779e4f9094bSMarc Zyngier \ 780e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 781e4f9094bSMarc Zyngier \ 782e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 783e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 784e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 785e4f9094bSMarc Zyngier return; \ 786e4f9094bSMarc Zyngier } \ 78767047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 788e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 789e4f9094bSMarc Zyngier \ 790e4f9094bSMarc Zyngier if (sync_obj) { \ 791e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 792e4f9094bSMarc Zyngier if (!sync_cmd) \ 793e4f9094bSMarc Zyngier goto post; \ 794e4f9094bSMarc Zyngier \ 79567047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 796e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 797e4f9094bSMarc Zyngier } \ 798e4f9094bSMarc Zyngier \ 799e4f9094bSMarc Zyngier post: \ 800e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 801e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 802e4f9094bSMarc Zyngier \ 803a19b462fSMarc Zyngier if (its_wait_for_range_completion(its, cmd, next_cmd)) \ 804a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 805e4f9094bSMarc Zyngier } 806e4f9094bSMarc Zyngier 80767047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 80867047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 809e4f9094bSMarc Zyngier struct its_collection *sync_col) 810cc2d3216SMarc Zyngier { 811cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 812cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 813e4f9094bSMarc Zyngier 814cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 815cc2d3216SMarc Zyngier } 816cc2d3216SMarc Zyngier 817e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 818e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 819cc2d3216SMarc Zyngier 82067047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 82167047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 822d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 823d011e4e6SMarc Zyngier { 824d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 825d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 826d011e4e6SMarc Zyngier 827d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 828d011e4e6SMarc Zyngier } 829d011e4e6SMarc Zyngier 830d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 831d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 832d011e4e6SMarc Zyngier 8338d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 8348d85dcedSMarc Zyngier { 8358d85dcedSMarc Zyngier struct its_cmd_desc desc; 8368d85dcedSMarc Zyngier 8378d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 8388d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 8398d85dcedSMarc Zyngier 8408d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 8418d85dcedSMarc Zyngier } 8428d85dcedSMarc Zyngier 8438d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 8448d85dcedSMarc Zyngier { 8458d85dcedSMarc Zyngier struct its_cmd_desc desc; 8468d85dcedSMarc Zyngier 8478d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 8488d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 8498d85dcedSMarc Zyngier 8508d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 851cc2d3216SMarc Zyngier } 852cc2d3216SMarc Zyngier 853cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 854cc2d3216SMarc Zyngier { 855cc2d3216SMarc Zyngier struct its_cmd_desc desc; 856cc2d3216SMarc Zyngier 857cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 858cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 859cc2d3216SMarc Zyngier 860cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 861cc2d3216SMarc Zyngier } 862cc2d3216SMarc Zyngier 863cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 864cc2d3216SMarc Zyngier { 865cc2d3216SMarc Zyngier struct its_cmd_desc desc; 866cc2d3216SMarc Zyngier 867cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 868cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 869cc2d3216SMarc Zyngier 870cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 871cc2d3216SMarc Zyngier } 872cc2d3216SMarc Zyngier 873cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 874cc2d3216SMarc Zyngier int valid) 875cc2d3216SMarc Zyngier { 876cc2d3216SMarc Zyngier struct its_cmd_desc desc; 877cc2d3216SMarc Zyngier 878cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 879cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 880cc2d3216SMarc Zyngier 881cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 882cc2d3216SMarc Zyngier } 883cc2d3216SMarc Zyngier 8846a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 885cc2d3216SMarc Zyngier { 886cc2d3216SMarc Zyngier struct its_cmd_desc desc; 887cc2d3216SMarc Zyngier 8886a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 8896a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 8906a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 891cc2d3216SMarc Zyngier 8926a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 893cc2d3216SMarc Zyngier } 894cc2d3216SMarc Zyngier 895cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 896cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 897cc2d3216SMarc Zyngier { 898cc2d3216SMarc Zyngier struct its_cmd_desc desc; 899cc2d3216SMarc Zyngier 900cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 901cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 902591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 903cc2d3216SMarc Zyngier 904cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 905cc2d3216SMarc Zyngier } 906cc2d3216SMarc Zyngier 907cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 908cc2d3216SMarc Zyngier { 909cc2d3216SMarc Zyngier struct its_cmd_desc desc; 910cc2d3216SMarc Zyngier 911cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 912cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 913cc2d3216SMarc Zyngier 914cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 915cc2d3216SMarc Zyngier } 916cc2d3216SMarc Zyngier 917cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 918cc2d3216SMarc Zyngier { 919cc2d3216SMarc Zyngier struct its_cmd_desc desc; 920cc2d3216SMarc Zyngier 921cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 922cc2d3216SMarc Zyngier 923cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 924cc2d3216SMarc Zyngier } 925c48ed51cSMarc Zyngier 926d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 927d011e4e6SMarc Zyngier { 928d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 929d011e4e6SMarc Zyngier struct its_cmd_desc desc; 930d011e4e6SMarc Zyngier 931d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 932d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 933d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 934d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 935d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 936d011e4e6SMarc Zyngier 937d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 938d011e4e6SMarc Zyngier } 939d011e4e6SMarc Zyngier 940d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 941d011e4e6SMarc Zyngier { 942d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 943d011e4e6SMarc Zyngier struct its_cmd_desc desc; 944d011e4e6SMarc Zyngier 945d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 946d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 947d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 948d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 949d011e4e6SMarc Zyngier 950d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 951d011e4e6SMarc Zyngier } 952d011e4e6SMarc Zyngier 95375fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 95475fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 955eb78192bSMarc Zyngier { 956eb78192bSMarc Zyngier struct its_cmd_desc desc; 957eb78192bSMarc Zyngier 958eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 959eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 960eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 96175fd951bSMarc Zyngier 962eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 963eb78192bSMarc Zyngier } 964eb78192bSMarc Zyngier 9653171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 9663171a47aSMarc Zyngier { 9673171a47aSMarc Zyngier struct its_cmd_desc desc; 9683171a47aSMarc Zyngier struct its_node *its; 9693171a47aSMarc Zyngier unsigned long flags; 9703171a47aSMarc Zyngier int col_id = vpe->col_idx; 9713171a47aSMarc Zyngier 9723171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 9733171a47aSMarc Zyngier desc.its_vmovp_cmd.its_list = (u16)its_list_map; 9743171a47aSMarc Zyngier 9753171a47aSMarc Zyngier if (!its_list_map) { 9763171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 9773171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = 0; 9783171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9793171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9803171a47aSMarc Zyngier return; 9813171a47aSMarc Zyngier } 9823171a47aSMarc Zyngier 9833171a47aSMarc Zyngier /* 9843171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 9853171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 9863171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 9873171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 9883171a47aSMarc Zyngier * 9893171a47aSMarc Zyngier * Wall <-- Head. 9903171a47aSMarc Zyngier */ 9913171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 9923171a47aSMarc Zyngier 9933171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 9943171a47aSMarc Zyngier 9953171a47aSMarc Zyngier /* Emit VMOVPs */ 9963171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 9973171a47aSMarc Zyngier if (!its->is_v4) 9983171a47aSMarc Zyngier continue; 9993171a47aSMarc Zyngier 10002247e1bfSMarc Zyngier if (!vpe->its_vm->vlpi_count[its->list_nr]) 10012247e1bfSMarc Zyngier continue; 10022247e1bfSMarc Zyngier 10033171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 10043171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 10053171a47aSMarc Zyngier } 10063171a47aSMarc Zyngier 10073171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 10083171a47aSMarc Zyngier } 10093171a47aSMarc Zyngier 101040619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1011eb78192bSMarc Zyngier { 1012eb78192bSMarc Zyngier struct its_cmd_desc desc; 1013eb78192bSMarc Zyngier 1014eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1015eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1016eb78192bSMarc Zyngier } 1017eb78192bSMarc Zyngier 1018c48ed51cSMarc Zyngier /* 1019c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1020c48ed51cSMarc Zyngier */ 1021c48ed51cSMarc Zyngier 1022c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 1023c48ed51cSMarc Zyngier { 1024c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1025591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 1026c48ed51cSMarc Zyngier } 1027c48ed51cSMarc Zyngier 1028015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1029c48ed51cSMarc Zyngier { 1030015ec038SMarc Zyngier irq_hw_number_t hwirq; 1031adcdb94eSMarc Zyngier struct page *prop_page; 1032adcdb94eSMarc Zyngier u8 *cfg; 1033c48ed51cSMarc Zyngier 1034015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1035015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1036015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1037d4d7b4adSMarc Zyngier struct its_vlpi_map *map; 1038015ec038SMarc Zyngier 1039015ec038SMarc Zyngier prop_page = its_dev->event_map.vm->vprop_page; 1040d4d7b4adSMarc Zyngier map = &its_dev->event_map.vlpi_maps[event]; 1041d4d7b4adSMarc Zyngier hwirq = map->vintid; 1042d4d7b4adSMarc Zyngier 1043d4d7b4adSMarc Zyngier /* Remember the updated property */ 1044d4d7b4adSMarc Zyngier map->properties &= ~clr; 1045d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1046015ec038SMarc Zyngier } else { 1047adcdb94eSMarc Zyngier prop_page = gic_rdists->prop_page; 1048015ec038SMarc Zyngier hwirq = d->hwirq; 1049015ec038SMarc Zyngier } 1050adcdb94eSMarc Zyngier 1051adcdb94eSMarc Zyngier cfg = page_address(prop_page) + hwirq - 8192; 1052adcdb94eSMarc Zyngier *cfg &= ~clr; 1053015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1054c48ed51cSMarc Zyngier 1055c48ed51cSMarc Zyngier /* 1056c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1057c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1058c48ed51cSMarc Zyngier * Humpf... 1059c48ed51cSMarc Zyngier */ 1060c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1061328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1062c48ed51cSMarc Zyngier else 1063c48ed51cSMarc Zyngier dsb(ishst); 1064015ec038SMarc Zyngier } 1065015ec038SMarc Zyngier 1066015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1067015ec038SMarc Zyngier { 1068015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1069015ec038SMarc Zyngier 1070015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1071adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 1072c48ed51cSMarc Zyngier } 1073c48ed51cSMarc Zyngier 1074015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1075015ec038SMarc Zyngier { 1076015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1077015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1078015ec038SMarc Zyngier 1079015ec038SMarc Zyngier if (its_dev->event_map.vlpi_maps[event].db_enabled == enable) 1080015ec038SMarc Zyngier return; 1081015ec038SMarc Zyngier 1082015ec038SMarc Zyngier its_dev->event_map.vlpi_maps[event].db_enabled = enable; 1083015ec038SMarc Zyngier 1084015ec038SMarc Zyngier /* 1085015ec038SMarc Zyngier * More fun with the architecture: 1086015ec038SMarc Zyngier * 1087015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1088015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1089015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1090015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1091015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1092015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1093015ec038SMarc Zyngier */ 1094015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1095c48ed51cSMarc Zyngier } 1096c48ed51cSMarc Zyngier 1097c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1098c48ed51cSMarc Zyngier { 1099015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1100015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1101015ec038SMarc Zyngier 1102adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1103c48ed51cSMarc Zyngier } 1104c48ed51cSMarc Zyngier 1105c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1106c48ed51cSMarc Zyngier { 1107015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1108015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1109015ec038SMarc Zyngier 1110adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1111c48ed51cSMarc Zyngier } 1112c48ed51cSMarc Zyngier 1113c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1114c48ed51cSMarc Zyngier bool force) 1115c48ed51cSMarc Zyngier { 1116fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1117fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1118c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1119c48ed51cSMarc Zyngier struct its_collection *target_col; 1120c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1121c48ed51cSMarc Zyngier 1122015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1123015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1124015ec038SMarc Zyngier return -EINVAL; 1125015ec038SMarc Zyngier 1126fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1127fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1128fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1129fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1130fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1131fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1132fbf8f40eSGanapatrao Kulkarni } 1133fbf8f40eSGanapatrao Kulkarni } 1134fbf8f40eSGanapatrao Kulkarni 1135fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1136fbf8f40eSGanapatrao Kulkarni 1137c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1138c48ed51cSMarc Zyngier return -EINVAL; 1139c48ed51cSMarc Zyngier 11408b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 11418b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1142c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1143c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1144591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 11450d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 11468b8d94a7SMaJun } 1147c48ed51cSMarc Zyngier 1148c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1149c48ed51cSMarc Zyngier } 1150c48ed51cSMarc Zyngier 1151558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1152558b0165SArd Biesheuvel { 1153558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1154558b0165SArd Biesheuvel 1155558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1156558b0165SArd Biesheuvel } 1157558b0165SArd Biesheuvel 1158b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1159b48ac83dSMarc Zyngier { 1160b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1161b48ac83dSMarc Zyngier struct its_node *its; 1162b48ac83dSMarc Zyngier u64 addr; 1163b48ac83dSMarc Zyngier 1164b48ac83dSMarc Zyngier its = its_dev->its; 1165558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1166b48ac83dSMarc Zyngier 1167b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1168b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1169b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 117044bb7e24SRobin Murphy 117144bb7e24SRobin Murphy iommu_dma_map_msi_msg(d->irq, msg); 1172b48ac83dSMarc Zyngier } 1173b48ac83dSMarc Zyngier 11748d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 11758d85dcedSMarc Zyngier enum irqchip_irq_state which, 11768d85dcedSMarc Zyngier bool state) 11778d85dcedSMarc Zyngier { 11788d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 11798d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 11808d85dcedSMarc Zyngier 11818d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 11828d85dcedSMarc Zyngier return -EINVAL; 11838d85dcedSMarc Zyngier 11848d85dcedSMarc Zyngier if (state) 11858d85dcedSMarc Zyngier its_send_int(its_dev, event); 11868d85dcedSMarc Zyngier else 11878d85dcedSMarc Zyngier its_send_clear(its_dev, event); 11888d85dcedSMarc Zyngier 11898d85dcedSMarc Zyngier return 0; 11908d85dcedSMarc Zyngier } 11918d85dcedSMarc Zyngier 11922247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 11932247e1bfSMarc Zyngier { 11942247e1bfSMarc Zyngier unsigned long flags; 11952247e1bfSMarc Zyngier 11962247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 11972247e1bfSMarc Zyngier if (!its_list_map) 11982247e1bfSMarc Zyngier return; 11992247e1bfSMarc Zyngier 12002247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12012247e1bfSMarc Zyngier 12022247e1bfSMarc Zyngier /* 12032247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 12042247e1bfSMarc Zyngier * them mapped now. 12052247e1bfSMarc Zyngier */ 12062247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 12072247e1bfSMarc Zyngier 12082247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 12092247e1bfSMarc Zyngier int i; 12102247e1bfSMarc Zyngier 12112247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 12122247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 121344c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 12142247e1bfSMarc Zyngier 12152247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 12162247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 12172247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 12182247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 121944c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 12202247e1bfSMarc Zyngier } 12212247e1bfSMarc Zyngier } 12222247e1bfSMarc Zyngier 12232247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12242247e1bfSMarc Zyngier } 12252247e1bfSMarc Zyngier 12262247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 12272247e1bfSMarc Zyngier { 12282247e1bfSMarc Zyngier unsigned long flags; 12292247e1bfSMarc Zyngier 12302247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12312247e1bfSMarc Zyngier if (!its_list_map) 12322247e1bfSMarc Zyngier return; 12332247e1bfSMarc Zyngier 12342247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12352247e1bfSMarc Zyngier 12362247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 12372247e1bfSMarc Zyngier int i; 12382247e1bfSMarc Zyngier 12392247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 12402247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 12412247e1bfSMarc Zyngier } 12422247e1bfSMarc Zyngier 12432247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12442247e1bfSMarc Zyngier } 12452247e1bfSMarc Zyngier 1246d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1247d011e4e6SMarc Zyngier { 1248d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1249d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1250d011e4e6SMarc Zyngier int ret = 0; 1251d011e4e6SMarc Zyngier 1252d011e4e6SMarc Zyngier if (!info->map) 1253d011e4e6SMarc Zyngier return -EINVAL; 1254d011e4e6SMarc Zyngier 1255d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1256d011e4e6SMarc Zyngier 1257d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1258d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1259d011e4e6SMarc Zyngier 12606396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 1261d011e4e6SMarc Zyngier GFP_KERNEL); 1262d011e4e6SMarc Zyngier if (!maps) { 1263d011e4e6SMarc Zyngier ret = -ENOMEM; 1264d011e4e6SMarc Zyngier goto out; 1265d011e4e6SMarc Zyngier } 1266d011e4e6SMarc Zyngier 1267d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1268d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1269d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1270d011e4e6SMarc Zyngier ret = -EINVAL; 1271d011e4e6SMarc Zyngier goto out; 1272d011e4e6SMarc Zyngier } 1273d011e4e6SMarc Zyngier 1274d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1275d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1276d011e4e6SMarc Zyngier 1277d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1278d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1279d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1280d011e4e6SMarc Zyngier } else { 12812247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 12822247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 12832247e1bfSMarc Zyngier 1284d4d7b4adSMarc Zyngier /* 1285d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1286d4d7b4adSMarc Zyngier * start poking the virtual property table. 1287d4d7b4adSMarc Zyngier */ 1288d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1289d4d7b4adSMarc Zyngier 1290d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1291d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1292d4d7b4adSMarc Zyngier 1293d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1294d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1295d011e4e6SMarc Zyngier 1296d011e4e6SMarc Zyngier /* and install the virtual one */ 1297d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1298d011e4e6SMarc Zyngier 1299d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1300d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1301d011e4e6SMarc Zyngier } 1302d011e4e6SMarc Zyngier 1303d011e4e6SMarc Zyngier out: 1304d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1305d011e4e6SMarc Zyngier return ret; 1306d011e4e6SMarc Zyngier } 1307d011e4e6SMarc Zyngier 1308d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1309d011e4e6SMarc Zyngier { 1310d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1311d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1312d011e4e6SMarc Zyngier int ret = 0; 1313d011e4e6SMarc Zyngier 1314d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1315d011e4e6SMarc Zyngier 1316d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || 1317d011e4e6SMarc Zyngier !its_dev->event_map.vlpi_maps[event].vm) { 1318d011e4e6SMarc Zyngier ret = -EINVAL; 1319d011e4e6SMarc Zyngier goto out; 1320d011e4e6SMarc Zyngier } 1321d011e4e6SMarc Zyngier 1322d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1323d011e4e6SMarc Zyngier *info->map = its_dev->event_map.vlpi_maps[event]; 1324d011e4e6SMarc Zyngier 1325d011e4e6SMarc Zyngier out: 1326d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1327d011e4e6SMarc Zyngier return ret; 1328d011e4e6SMarc Zyngier } 1329d011e4e6SMarc Zyngier 1330d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1331d011e4e6SMarc Zyngier { 1332d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1333d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1334d011e4e6SMarc Zyngier int ret = 0; 1335d011e4e6SMarc Zyngier 1336d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1337d011e4e6SMarc Zyngier 1338d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1339d011e4e6SMarc Zyngier ret = -EINVAL; 1340d011e4e6SMarc Zyngier goto out; 1341d011e4e6SMarc Zyngier } 1342d011e4e6SMarc Zyngier 1343d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1344d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1345d011e4e6SMarc Zyngier 1346d011e4e6SMarc Zyngier /* and restore the physical one */ 1347d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1348d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1349d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1350d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1351d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1352d011e4e6SMarc Zyngier 13532247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 13542247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 13552247e1bfSMarc Zyngier 1356d011e4e6SMarc Zyngier /* 1357d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1358d011e4e6SMarc Zyngier * this was the last VLPI. 1359d011e4e6SMarc Zyngier */ 1360d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1361d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1362d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1363d011e4e6SMarc Zyngier } 1364d011e4e6SMarc Zyngier 1365d011e4e6SMarc Zyngier out: 1366d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1367d011e4e6SMarc Zyngier return ret; 1368d011e4e6SMarc Zyngier } 1369d011e4e6SMarc Zyngier 1370015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1371015ec038SMarc Zyngier { 1372015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1373015ec038SMarc Zyngier 1374015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1375015ec038SMarc Zyngier return -EINVAL; 1376015ec038SMarc Zyngier 1377015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1378015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1379015ec038SMarc Zyngier else 1380015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1381015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1382015ec038SMarc Zyngier 1383015ec038SMarc Zyngier return 0; 1384015ec038SMarc Zyngier } 1385015ec038SMarc Zyngier 1386c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1387c808eea8SMarc Zyngier { 1388c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1389c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1390c808eea8SMarc Zyngier 1391c808eea8SMarc Zyngier /* Need a v4 ITS */ 1392d011e4e6SMarc Zyngier if (!its_dev->its->is_v4) 1393c808eea8SMarc Zyngier return -EINVAL; 1394c808eea8SMarc Zyngier 1395d011e4e6SMarc Zyngier /* Unmap request? */ 1396d011e4e6SMarc Zyngier if (!info) 1397d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1398d011e4e6SMarc Zyngier 1399c808eea8SMarc Zyngier switch (info->cmd_type) { 1400c808eea8SMarc Zyngier case MAP_VLPI: 1401d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1402c808eea8SMarc Zyngier 1403c808eea8SMarc Zyngier case GET_VLPI: 1404d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1405c808eea8SMarc Zyngier 1406c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1407c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1408015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1409c808eea8SMarc Zyngier 1410c808eea8SMarc Zyngier default: 1411c808eea8SMarc Zyngier return -EINVAL; 1412c808eea8SMarc Zyngier } 1413c808eea8SMarc Zyngier } 1414c808eea8SMarc Zyngier 1415c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1416c48ed51cSMarc Zyngier .name = "ITS", 1417c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1418c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1419004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1420c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1421b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 14228d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1423c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1424b48ac83dSMarc Zyngier }; 1425b48ac83dSMarc Zyngier 1426*880cb3cdSMarc Zyngier 1427bf9529f8SMarc Zyngier /* 1428bf9529f8SMarc Zyngier * How we allocate LPIs: 1429bf9529f8SMarc Zyngier * 1430*880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1431*880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1432*880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1433*880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1434bf9529f8SMarc Zyngier * 1435*880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1436*880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1437*880cb3cdSMarc Zyngier * already free block. 1438*880cb3cdSMarc Zyngier * 1439*880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1440*880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1441*880cb3cdSMarc Zyngier */ 1442*880cb3cdSMarc Zyngier 1443*880cb3cdSMarc Zyngier /* 1444*880cb3cdSMarc Zyngier * Compatibility defines until we fully refactor the allocator 1445bf9529f8SMarc Zyngier */ 1446bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK_SHIFT 5 14474f2c7583SArd Biesheuvel #define IRQS_PER_CHUNK (1UL << IRQS_PER_CHUNK_SHIFT) 14486c31e123SShanker Donthineni #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1449bf9529f8SMarc Zyngier 1450*880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 1451*880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 1452bf9529f8SMarc Zyngier 1453*880cb3cdSMarc Zyngier struct lpi_range { 1454*880cb3cdSMarc Zyngier struct list_head entry; 1455*880cb3cdSMarc Zyngier u32 base_id; 1456*880cb3cdSMarc Zyngier u32 span; 1457*880cb3cdSMarc Zyngier }; 1458*880cb3cdSMarc Zyngier 1459*880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 1460bf9529f8SMarc Zyngier { 1461*880cb3cdSMarc Zyngier struct lpi_range *range; 1462*880cb3cdSMarc Zyngier 1463*880cb3cdSMarc Zyngier range = kzalloc(sizeof(*range), GFP_KERNEL); 1464*880cb3cdSMarc Zyngier if (range) { 1465*880cb3cdSMarc Zyngier INIT_LIST_HEAD(&range->entry); 1466*880cb3cdSMarc Zyngier range->base_id = base; 1467*880cb3cdSMarc Zyngier range->span = span; 1468bf9529f8SMarc Zyngier } 1469bf9529f8SMarc Zyngier 1470*880cb3cdSMarc Zyngier return range; 1471*880cb3cdSMarc Zyngier } 1472*880cb3cdSMarc Zyngier 1473*880cb3cdSMarc Zyngier static int lpi_range_cmp(void *priv, struct list_head *a, struct list_head *b) 1474bf9529f8SMarc Zyngier { 1475*880cb3cdSMarc Zyngier struct lpi_range *ra, *rb; 1476*880cb3cdSMarc Zyngier 1477*880cb3cdSMarc Zyngier ra = container_of(a, struct lpi_range, entry); 1478*880cb3cdSMarc Zyngier rb = container_of(b, struct lpi_range, entry); 1479*880cb3cdSMarc Zyngier 1480*880cb3cdSMarc Zyngier return rb->base_id - ra->base_id; 1481*880cb3cdSMarc Zyngier } 1482*880cb3cdSMarc Zyngier 1483*880cb3cdSMarc Zyngier static void merge_lpi_ranges(void) 1484*880cb3cdSMarc Zyngier { 1485*880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1486*880cb3cdSMarc Zyngier 1487*880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1488*880cb3cdSMarc Zyngier if (!list_is_last(&range->entry, &lpi_range_list) && 1489*880cb3cdSMarc Zyngier (tmp->base_id == (range->base_id + range->span))) { 1490*880cb3cdSMarc Zyngier tmp->base_id = range->base_id; 1491*880cb3cdSMarc Zyngier tmp->span += range->span; 1492*880cb3cdSMarc Zyngier list_del(&range->entry); 1493*880cb3cdSMarc Zyngier kfree(range); 1494*880cb3cdSMarc Zyngier } 1495*880cb3cdSMarc Zyngier } 1496*880cb3cdSMarc Zyngier } 1497*880cb3cdSMarc Zyngier 1498*880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 1499*880cb3cdSMarc Zyngier { 1500*880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1501*880cb3cdSMarc Zyngier int err = -ENOSPC; 1502*880cb3cdSMarc Zyngier 1503*880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1504*880cb3cdSMarc Zyngier 1505*880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1506*880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 1507*880cb3cdSMarc Zyngier *base = range->base_id; 1508*880cb3cdSMarc Zyngier range->base_id += nr_lpis; 1509*880cb3cdSMarc Zyngier range->span -= nr_lpis; 1510*880cb3cdSMarc Zyngier 1511*880cb3cdSMarc Zyngier if (range->span == 0) { 1512*880cb3cdSMarc Zyngier list_del(&range->entry); 1513*880cb3cdSMarc Zyngier kfree(range); 1514*880cb3cdSMarc Zyngier } 1515*880cb3cdSMarc Zyngier 1516*880cb3cdSMarc Zyngier err = 0; 1517*880cb3cdSMarc Zyngier break; 1518*880cb3cdSMarc Zyngier } 1519*880cb3cdSMarc Zyngier } 1520*880cb3cdSMarc Zyngier 1521*880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1522*880cb3cdSMarc Zyngier 1523*880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 1524*880cb3cdSMarc Zyngier return err; 1525*880cb3cdSMarc Zyngier } 1526*880cb3cdSMarc Zyngier 1527*880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 1528*880cb3cdSMarc Zyngier { 1529*880cb3cdSMarc Zyngier struct lpi_range *new; 1530*880cb3cdSMarc Zyngier int err = 0; 1531*880cb3cdSMarc Zyngier 1532*880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1533*880cb3cdSMarc Zyngier 1534*880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 1535*880cb3cdSMarc Zyngier if (!new) { 1536*880cb3cdSMarc Zyngier err = -ENOMEM; 1537*880cb3cdSMarc Zyngier goto out; 1538*880cb3cdSMarc Zyngier } 1539*880cb3cdSMarc Zyngier 1540*880cb3cdSMarc Zyngier list_add(&new->entry, &lpi_range_list); 1541*880cb3cdSMarc Zyngier list_sort(NULL, &lpi_range_list, lpi_range_cmp); 1542*880cb3cdSMarc Zyngier merge_lpi_ranges(); 1543*880cb3cdSMarc Zyngier out: 1544*880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1545*880cb3cdSMarc Zyngier return err; 1546bf9529f8SMarc Zyngier } 1547bf9529f8SMarc Zyngier 154804a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1549bf9529f8SMarc Zyngier { 1550*880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 1551*880cb3cdSMarc Zyngier int err; 1552bf9529f8SMarc Zyngier 1553*880cb3cdSMarc Zyngier /* 1554*880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 1555*880cb3cdSMarc Zyngier * full range of LPIs. 1556*880cb3cdSMarc Zyngier */ 1557*880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 1558*880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 1559*880cb3cdSMarc Zyngier return err; 1560bf9529f8SMarc Zyngier } 1561bf9529f8SMarc Zyngier 1562*880cb3cdSMarc Zyngier static unsigned long *its_lpi_alloc_chunks(int nr_irqs, u32 *base, int *nr_ids) 1563bf9529f8SMarc Zyngier { 1564bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1565*880cb3cdSMarc Zyngier int err = 0; 1566*880cb3cdSMarc Zyngier int nr_lpis; 1567bf9529f8SMarc Zyngier 1568*880cb3cdSMarc Zyngier nr_lpis = round_up(nr_irqs, IRQS_PER_CHUNK); 1569bf9529f8SMarc Zyngier 1570bf9529f8SMarc Zyngier do { 1571*880cb3cdSMarc Zyngier err = alloc_lpi_range(nr_lpis, base); 1572*880cb3cdSMarc Zyngier if (!err) 1573bf9529f8SMarc Zyngier break; 1574bf9529f8SMarc Zyngier 1575*880cb3cdSMarc Zyngier nr_lpis -= IRQS_PER_CHUNK; 1576*880cb3cdSMarc Zyngier } while (nr_lpis > 0); 1577bf9529f8SMarc Zyngier 1578*880cb3cdSMarc Zyngier if (err) 1579bf9529f8SMarc Zyngier goto out; 1580bf9529f8SMarc Zyngier 1581*880cb3cdSMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_lpis), sizeof (long), GFP_ATOMIC); 1582bf9529f8SMarc Zyngier if (!bitmap) 1583bf9529f8SMarc Zyngier goto out; 1584bf9529f8SMarc Zyngier 1585*880cb3cdSMarc Zyngier *nr_ids = nr_lpis; 1586bf9529f8SMarc Zyngier 1587bf9529f8SMarc Zyngier out: 1588c8415b94SMarc Zyngier if (!bitmap) 1589c8415b94SMarc Zyngier *base = *nr_ids = 0; 1590c8415b94SMarc Zyngier 1591bf9529f8SMarc Zyngier return bitmap; 1592bf9529f8SMarc Zyngier } 1593bf9529f8SMarc Zyngier 1594*880cb3cdSMarc Zyngier static void its_lpi_free_chunks(unsigned long *bitmap, u32 base, u32 nr_ids) 1595bf9529f8SMarc Zyngier { 1596*880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 1597cf2be8baSMarc Zyngier kfree(bitmap); 1598bf9529f8SMarc Zyngier } 15991ac19ca6SMarc Zyngier 16000e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 16010e5ccf91SMarc Zyngier { 16020e5ccf91SMarc Zyngier struct page *prop_page; 16031ac19ca6SMarc Zyngier 16040e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 16050e5ccf91SMarc Zyngier if (!prop_page) 16060e5ccf91SMarc Zyngier return NULL; 16070e5ccf91SMarc Zyngier 16080e5ccf91SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 16090e5ccf91SMarc Zyngier memset(page_address(prop_page), 16100e5ccf91SMarc Zyngier LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, 16110e5ccf91SMarc Zyngier LPI_PROPBASE_SZ); 16120e5ccf91SMarc Zyngier 16130e5ccf91SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 16140e5ccf91SMarc Zyngier gic_flush_dcache_to_poc(page_address(prop_page), LPI_PROPBASE_SZ); 16150e5ccf91SMarc Zyngier 16160e5ccf91SMarc Zyngier return prop_page; 16170e5ccf91SMarc Zyngier } 16180e5ccf91SMarc Zyngier 16197d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 16207d75bbb4SMarc Zyngier { 16217d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 16227d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 16237d75bbb4SMarc Zyngier } 16241ac19ca6SMarc Zyngier 16251ac19ca6SMarc Zyngier static int __init its_alloc_lpi_tables(void) 16261ac19ca6SMarc Zyngier { 16271ac19ca6SMarc Zyngier phys_addr_t paddr; 16281ac19ca6SMarc Zyngier 16296c31e123SShanker Donthineni lpi_id_bits = min_t(u32, gic_rdists->id_bits, ITS_MAX_LPI_NRBITS); 16300e5ccf91SMarc Zyngier gic_rdists->prop_page = its_allocate_prop_table(GFP_NOWAIT); 16311ac19ca6SMarc Zyngier if (!gic_rdists->prop_page) { 16321ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 16331ac19ca6SMarc Zyngier return -ENOMEM; 16341ac19ca6SMarc Zyngier } 16351ac19ca6SMarc Zyngier 16361ac19ca6SMarc Zyngier paddr = page_to_phys(gic_rdists->prop_page); 16371ac19ca6SMarc Zyngier pr_info("GIC: using LPI property table @%pa\n", &paddr); 16381ac19ca6SMarc Zyngier 16396c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 16401ac19ca6SMarc Zyngier } 16411ac19ca6SMarc Zyngier 16421ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 16431ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 16441ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 16454f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 16461ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 16471ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 16481ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 16491ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 16501ac19ca6SMarc Zyngier }; 16511ac19ca6SMarc Zyngier 16522d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 16532d81d425SShanker Donthineni { 16542d81d425SShanker Donthineni u32 idx = baser - its->tables; 16552d81d425SShanker Donthineni 16560968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 16572d81d425SShanker Donthineni } 16582d81d425SShanker Donthineni 16592d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 16602d81d425SShanker Donthineni u64 val) 16612d81d425SShanker Donthineni { 16622d81d425SShanker Donthineni u32 idx = baser - its->tables; 16632d81d425SShanker Donthineni 16640968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 16652d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 16662d81d425SShanker Donthineni } 16672d81d425SShanker Donthineni 16689347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 16693faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 16703faf24eaSShanker Donthineni bool indirect) 16719347359aSShanker Donthineni { 16729347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 16739347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 16749347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 167530ae9610SShanker Donthineni u64 baser_phys, tmp; 16769347359aSShanker Donthineni u32 alloc_pages; 16779347359aSShanker Donthineni void *base; 16789347359aSShanker Donthineni 16799347359aSShanker Donthineni retry_alloc_baser: 16809347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 16819347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 16829347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 16839347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 16849347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 16859347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 16869347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 16879347359aSShanker Donthineni } 16889347359aSShanker Donthineni 16899347359aSShanker Donthineni base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 16909347359aSShanker Donthineni if (!base) 16919347359aSShanker Donthineni return -ENOMEM; 16929347359aSShanker Donthineni 169330ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 169430ae9610SShanker Donthineni 169530ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 169630ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 169730ae9610SShanker Donthineni 169830ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 169930ae9610SShanker Donthineni if (psz != SZ_64K) { 170030ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 170130ae9610SShanker Donthineni free_pages((unsigned long)base, order); 170230ae9610SShanker Donthineni return -ENXIO; 170330ae9610SShanker Donthineni } 170430ae9610SShanker Donthineni 170530ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 170630ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 170730ae9610SShanker Donthineni } 170830ae9610SShanker Donthineni 17099347359aSShanker Donthineni retry_baser: 171030ae9610SShanker Donthineni val = (baser_phys | 17119347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 17129347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 17139347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 17149347359aSShanker Donthineni cache | 17159347359aSShanker Donthineni shr | 17169347359aSShanker Donthineni GITS_BASER_VALID); 17179347359aSShanker Donthineni 17183faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 17193faf24eaSShanker Donthineni 17209347359aSShanker Donthineni switch (psz) { 17219347359aSShanker Donthineni case SZ_4K: 17229347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 17239347359aSShanker Donthineni break; 17249347359aSShanker Donthineni case SZ_16K: 17259347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 17269347359aSShanker Donthineni break; 17279347359aSShanker Donthineni case SZ_64K: 17289347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 17299347359aSShanker Donthineni break; 17309347359aSShanker Donthineni } 17319347359aSShanker Donthineni 17329347359aSShanker Donthineni its_write_baser(its, baser, val); 17339347359aSShanker Donthineni tmp = baser->val; 17349347359aSShanker Donthineni 17359347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 17369347359aSShanker Donthineni /* 17379347359aSShanker Donthineni * Shareability didn't stick. Just use 17389347359aSShanker Donthineni * whatever the read reported, which is likely 17399347359aSShanker Donthineni * to be the only thing this redistributor 17409347359aSShanker Donthineni * supports. If that's zero, make it 17419347359aSShanker Donthineni * non-cacheable as well. 17429347359aSShanker Donthineni */ 17439347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 17449347359aSShanker Donthineni if (!shr) { 17459347359aSShanker Donthineni cache = GITS_BASER_nC; 1746328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 17479347359aSShanker Donthineni } 17489347359aSShanker Donthineni goto retry_baser; 17499347359aSShanker Donthineni } 17509347359aSShanker Donthineni 17519347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 17529347359aSShanker Donthineni /* 17539347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 17549347359aSShanker Donthineni * size and retry. If we reach 4K, then 17559347359aSShanker Donthineni * something is horribly wrong... 17569347359aSShanker Donthineni */ 17579347359aSShanker Donthineni free_pages((unsigned long)base, order); 17589347359aSShanker Donthineni baser->base = NULL; 17599347359aSShanker Donthineni 17609347359aSShanker Donthineni switch (psz) { 17619347359aSShanker Donthineni case SZ_16K: 17629347359aSShanker Donthineni psz = SZ_4K; 17639347359aSShanker Donthineni goto retry_alloc_baser; 17649347359aSShanker Donthineni case SZ_64K: 17659347359aSShanker Donthineni psz = SZ_16K; 17669347359aSShanker Donthineni goto retry_alloc_baser; 17679347359aSShanker Donthineni } 17689347359aSShanker Donthineni } 17699347359aSShanker Donthineni 17709347359aSShanker Donthineni if (val != tmp) { 1771b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 17729347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1773b11283ebSVladimir Murzin val, tmp); 17749347359aSShanker Donthineni free_pages((unsigned long)base, order); 17759347359aSShanker Donthineni return -ENXIO; 17769347359aSShanker Donthineni } 17779347359aSShanker Donthineni 17789347359aSShanker Donthineni baser->order = order; 17799347359aSShanker Donthineni baser->base = base; 17809347359aSShanker Donthineni baser->psz = psz; 17813faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 17829347359aSShanker Donthineni 17833faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1784d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 17859347359aSShanker Donthineni its_base_type_string[type], 17869347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 17873faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 17889347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 17899347359aSShanker Donthineni 17909347359aSShanker Donthineni return 0; 17919347359aSShanker Donthineni } 17929347359aSShanker Donthineni 17934cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 17944cacac57SMarc Zyngier struct its_baser *baser, 179532bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 17964b75c459SShanker Donthineni { 17974cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 17984cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 17994cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 18002fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 18014b75c459SShanker Donthineni u32 new_order = *order; 18023faf24eaSShanker Donthineni bool indirect = false; 18033faf24eaSShanker Donthineni 18043faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 18053faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 18063faf24eaSShanker Donthineni /* 18073faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 18083faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 18093faf24eaSShanker Donthineni */ 18103faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 18113faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 18123faf24eaSShanker Donthineni 18133faf24eaSShanker Donthineni if (indirect) { 18143faf24eaSShanker Donthineni /* 18153faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 18163faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 18173faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 18183faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 18193faf24eaSShanker Donthineni * entry size. 18203faf24eaSShanker Donthineni */ 1821d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 18223faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 18233faf24eaSShanker Donthineni } 18243faf24eaSShanker Donthineni } 18254b75c459SShanker Donthineni 18264b75c459SShanker Donthineni /* 18274b75c459SShanker Donthineni * Allocate as many entries as required to fit the 18284b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 18294b75c459SShanker Donthineni * space being incredibly sparse, this results in a 18303faf24eaSShanker Donthineni * massive waste of memory if two-level device table 18313faf24eaSShanker Donthineni * feature is not supported by hardware. 18324b75c459SShanker Donthineni */ 18334b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 18344b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 18354b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1836d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 18374cacac57SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %u->%u\n", 18384cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 18394cacac57SMarc Zyngier its->device_ids, ids); 18404b75c459SShanker Donthineni } 18414b75c459SShanker Donthineni 18424b75c459SShanker Donthineni *order = new_order; 18433faf24eaSShanker Donthineni 18443faf24eaSShanker Donthineni return indirect; 18454b75c459SShanker Donthineni } 18464b75c459SShanker Donthineni 18471ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 18481ac19ca6SMarc Zyngier { 18491ac19ca6SMarc Zyngier int i; 18501ac19ca6SMarc Zyngier 18511ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 18521a485f4dSShanker Donthineni if (its->tables[i].base) { 18531a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 18541a485f4dSShanker Donthineni its->tables[i].order); 18551a485f4dSShanker Donthineni its->tables[i].base = NULL; 18561ac19ca6SMarc Zyngier } 18571ac19ca6SMarc Zyngier } 18581ac19ca6SMarc Zyngier } 18591ac19ca6SMarc Zyngier 18600e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 18611ac19ca6SMarc Zyngier { 18621ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 18632fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 18649347359aSShanker Donthineni u32 psz = SZ_64K; 18659347359aSShanker Donthineni int err, i; 186694100970SRobert Richter 1867fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 1868fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 18699347359aSShanker Donthineni cache = GITS_BASER_nCnB; 1870466b7d16SShanker Donthineni 18711ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 18722d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 18732d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 18741ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 18759347359aSShanker Donthineni u32 order = get_order(psz); 18763faf24eaSShanker Donthineni bool indirect = false; 18771ac19ca6SMarc Zyngier 18784cacac57SMarc Zyngier switch (type) { 18794cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 18801ac19ca6SMarc Zyngier continue; 18811ac19ca6SMarc Zyngier 18824cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 188332bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 188432bd44dcSShanker Donthineni psz, &order, 188532bd44dcSShanker Donthineni its->device_ids); 18864cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 18874cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 188832bd44dcSShanker Donthineni psz, &order, 188932bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 18904cacac57SMarc Zyngier break; 18914cacac57SMarc Zyngier } 1892f54b97edSMarc Zyngier 18933faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 18949347359aSShanker Donthineni if (err < 0) { 18959347359aSShanker Donthineni its_free_tables(its); 18969347359aSShanker Donthineni return err; 189730f21363SRobert Richter } 189830f21363SRobert Richter 18999347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 19009347359aSShanker Donthineni psz = baser->psz; 19019347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 19029347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 19031ac19ca6SMarc Zyngier } 19041ac19ca6SMarc Zyngier 19051ac19ca6SMarc Zyngier return 0; 19061ac19ca6SMarc Zyngier } 19071ac19ca6SMarc Zyngier 19081ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 19091ac19ca6SMarc Zyngier { 191083559b47SMarc Zyngier int i; 191183559b47SMarc Zyngier 19126396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 19131ac19ca6SMarc Zyngier GFP_KERNEL); 19141ac19ca6SMarc Zyngier if (!its->collections) 19151ac19ca6SMarc Zyngier return -ENOMEM; 19161ac19ca6SMarc Zyngier 191783559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 191883559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 191983559b47SMarc Zyngier 19201ac19ca6SMarc Zyngier return 0; 19211ac19ca6SMarc Zyngier } 19221ac19ca6SMarc Zyngier 19237c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 19247c297a2dSMarc Zyngier { 19257c297a2dSMarc Zyngier struct page *pend_page; 19267c297a2dSMarc Zyngier /* 19277c297a2dSMarc Zyngier * The pending pages have to be at least 64kB aligned, 19287c297a2dSMarc Zyngier * hence the 'max(LPI_PENDBASE_SZ, SZ_64K)' below. 19297c297a2dSMarc Zyngier */ 19307c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 19317c297a2dSMarc Zyngier get_order(max_t(u32, LPI_PENDBASE_SZ, SZ_64K))); 19327c297a2dSMarc Zyngier if (!pend_page) 19337c297a2dSMarc Zyngier return NULL; 19347c297a2dSMarc Zyngier 19357c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 19367c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 19377c297a2dSMarc Zyngier 19387c297a2dSMarc Zyngier return pend_page; 19397c297a2dSMarc Zyngier } 19407c297a2dSMarc Zyngier 19417d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 19427d75bbb4SMarc Zyngier { 19437d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(pt), 19447d75bbb4SMarc Zyngier get_order(max_t(u32, LPI_PENDBASE_SZ, SZ_64K))); 19457d75bbb4SMarc Zyngier } 19467d75bbb4SMarc Zyngier 19471ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 19481ac19ca6SMarc Zyngier { 19491ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 19501ac19ca6SMarc Zyngier struct page *pend_page; 19511ac19ca6SMarc Zyngier u64 val, tmp; 19521ac19ca6SMarc Zyngier 19531ac19ca6SMarc Zyngier /* If we didn't allocate the pending table yet, do it now */ 19541ac19ca6SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 19551ac19ca6SMarc Zyngier if (!pend_page) { 19561ac19ca6SMarc Zyngier phys_addr_t paddr; 19577c297a2dSMarc Zyngier 19587c297a2dSMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 19591ac19ca6SMarc Zyngier if (!pend_page) { 19601ac19ca6SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", 19611ac19ca6SMarc Zyngier smp_processor_id()); 19621ac19ca6SMarc Zyngier return; 19631ac19ca6SMarc Zyngier } 19641ac19ca6SMarc Zyngier 19651ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 19661ac19ca6SMarc Zyngier pr_info("CPU%d: using LPI pending table @%pa\n", 19671ac19ca6SMarc Zyngier smp_processor_id(), &paddr); 19681ac19ca6SMarc Zyngier gic_data_rdist()->pend_page = pend_page; 19691ac19ca6SMarc Zyngier } 19701ac19ca6SMarc Zyngier 19711ac19ca6SMarc Zyngier /* set PROPBASE */ 19721ac19ca6SMarc Zyngier val = (page_to_phys(gic_rdists->prop_page) | 19731ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 19742fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 19751ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 19761ac19ca6SMarc Zyngier 19770968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 19780968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 19791ac19ca6SMarc Zyngier 19801ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 1981241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 1982241a386cSMarc Zyngier /* 1983241a386cSMarc Zyngier * The HW reports non-shareable, we must 1984241a386cSMarc Zyngier * remove the cacheability attributes as 1985241a386cSMarc Zyngier * well. 1986241a386cSMarc Zyngier */ 1987241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 1988241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 1989241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 19900968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 1991241a386cSMarc Zyngier } 19921ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 19931ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 19941ac19ca6SMarc Zyngier } 19951ac19ca6SMarc Zyngier 19961ac19ca6SMarc Zyngier /* set PENDBASE */ 19971ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 19984ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 19992fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 20001ac19ca6SMarc Zyngier 20010968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 20020968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2003241a386cSMarc Zyngier 2004241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 2005241a386cSMarc Zyngier /* 2006241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 2007241a386cSMarc Zyngier * cacheability attributes as well. 2008241a386cSMarc Zyngier */ 2009241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 2010241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 2011241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 20120968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 2013241a386cSMarc Zyngier } 20141ac19ca6SMarc Zyngier 20151ac19ca6SMarc Zyngier /* Enable LPIs */ 20161ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 20171ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 20181ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 20191ac19ca6SMarc Zyngier 20201ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 20211ac19ca6SMarc Zyngier dsb(sy); 20221ac19ca6SMarc Zyngier } 20231ac19ca6SMarc Zyngier 2024920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 20251ac19ca6SMarc Zyngier { 2026920181ceSDerek Basehore int cpu = smp_processor_id(); 20271ac19ca6SMarc Zyngier u64 target; 20281ac19ca6SMarc Zyngier 2029fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 2030fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 2031fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 2032fbf8f40eSGanapatrao Kulkarni 2033fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 2034fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 2035fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 2036920181ceSDerek Basehore return; 2037fbf8f40eSGanapatrao Kulkarni } 2038fbf8f40eSGanapatrao Kulkarni 20391ac19ca6SMarc Zyngier /* 20401ac19ca6SMarc Zyngier * We now have to bind each collection to its target 20411ac19ca6SMarc Zyngier * redistributor. 20421ac19ca6SMarc Zyngier */ 2043589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 20441ac19ca6SMarc Zyngier /* 20451ac19ca6SMarc Zyngier * This ITS wants the physical address of the 20461ac19ca6SMarc Zyngier * redistributor. 20471ac19ca6SMarc Zyngier */ 20481ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 20491ac19ca6SMarc Zyngier } else { 2050920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 2051589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 2052263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 20531ac19ca6SMarc Zyngier } 20541ac19ca6SMarc Zyngier 20551ac19ca6SMarc Zyngier /* Perform collection mapping */ 20561ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 20571ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 20581ac19ca6SMarc Zyngier 20591ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 20601ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 20611ac19ca6SMarc Zyngier } 20621ac19ca6SMarc Zyngier 2063920181ceSDerek Basehore static void its_cpu_init_collections(void) 2064920181ceSDerek Basehore { 2065920181ceSDerek Basehore struct its_node *its; 2066920181ceSDerek Basehore 2067920181ceSDerek Basehore spin_lock(&its_lock); 2068920181ceSDerek Basehore 2069920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 2070920181ceSDerek Basehore its_cpu_init_collection(its); 2071920181ceSDerek Basehore 20721ac19ca6SMarc Zyngier spin_unlock(&its_lock); 20731ac19ca6SMarc Zyngier } 207484a6a2e7SMarc Zyngier 207584a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 207684a6a2e7SMarc Zyngier { 207784a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 20783e39e8f5SMarc Zyngier unsigned long flags; 207984a6a2e7SMarc Zyngier 20803e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 208184a6a2e7SMarc Zyngier 208284a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 208384a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 208484a6a2e7SMarc Zyngier its_dev = tmp; 208584a6a2e7SMarc Zyngier break; 208684a6a2e7SMarc Zyngier } 208784a6a2e7SMarc Zyngier } 208884a6a2e7SMarc Zyngier 20893e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 209084a6a2e7SMarc Zyngier 209184a6a2e7SMarc Zyngier return its_dev; 209284a6a2e7SMarc Zyngier } 209384a6a2e7SMarc Zyngier 2094466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 2095466b7d16SShanker Donthineni { 2096466b7d16SShanker Donthineni int i; 2097466b7d16SShanker Donthineni 2098466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 2099466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 2100466b7d16SShanker Donthineni return &its->tables[i]; 2101466b7d16SShanker Donthineni } 2102466b7d16SShanker Donthineni 2103466b7d16SShanker Donthineni return NULL; 2104466b7d16SShanker Donthineni } 2105466b7d16SShanker Donthineni 210670cc81edSMarc Zyngier static bool its_alloc_table_entry(struct its_baser *baser, u32 id) 21073faf24eaSShanker Donthineni { 21083faf24eaSShanker Donthineni struct page *page; 21093faf24eaSShanker Donthineni u32 esz, idx; 21103faf24eaSShanker Donthineni __le64 *table; 21113faf24eaSShanker Donthineni 21123faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 21133faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 21143faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 211570cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 21163faf24eaSShanker Donthineni 21173faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 211870cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 21193faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 21203faf24eaSShanker Donthineni return false; 21213faf24eaSShanker Donthineni 21223faf24eaSShanker Donthineni table = baser->base; 21233faf24eaSShanker Donthineni 21243faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 21253faf24eaSShanker Donthineni if (!table[idx]) { 21263faf24eaSShanker Donthineni page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(baser->psz)); 21273faf24eaSShanker Donthineni if (!page) 21283faf24eaSShanker Donthineni return false; 21293faf24eaSShanker Donthineni 21303faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 21313faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2132328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 21333faf24eaSShanker Donthineni 21343faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 21353faf24eaSShanker Donthineni 21363faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 21373faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2138328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 21393faf24eaSShanker Donthineni 21403faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 21413faf24eaSShanker Donthineni dsb(sy); 21423faf24eaSShanker Donthineni } 21433faf24eaSShanker Donthineni 21443faf24eaSShanker Donthineni return true; 21453faf24eaSShanker Donthineni } 21463faf24eaSShanker Donthineni 214770cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 214870cc81edSMarc Zyngier { 214970cc81edSMarc Zyngier struct its_baser *baser; 215070cc81edSMarc Zyngier 215170cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 215270cc81edSMarc Zyngier 215370cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 215470cc81edSMarc Zyngier if (!baser) 215570cc81edSMarc Zyngier return (ilog2(dev_id) < its->device_ids); 215670cc81edSMarc Zyngier 215770cc81edSMarc Zyngier return its_alloc_table_entry(baser, dev_id); 215870cc81edSMarc Zyngier } 215970cc81edSMarc Zyngier 21607d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 21617d75bbb4SMarc Zyngier { 21627d75bbb4SMarc Zyngier struct its_node *its; 21637d75bbb4SMarc Zyngier 21647d75bbb4SMarc Zyngier /* 21657d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 21667d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 21677d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 21687d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 21697d75bbb4SMarc Zyngier * anyway, right?). 21707d75bbb4SMarc Zyngier */ 21717d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 21727d75bbb4SMarc Zyngier struct its_baser *baser; 21737d75bbb4SMarc Zyngier 21747d75bbb4SMarc Zyngier if (!its->is_v4) 21757d75bbb4SMarc Zyngier continue; 21767d75bbb4SMarc Zyngier 21777d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 21787d75bbb4SMarc Zyngier if (!baser) 21797d75bbb4SMarc Zyngier return false; 21807d75bbb4SMarc Zyngier 21817d75bbb4SMarc Zyngier if (!its_alloc_table_entry(baser, vpe_id)) 21827d75bbb4SMarc Zyngier return false; 21837d75bbb4SMarc Zyngier } 21847d75bbb4SMarc Zyngier 21857d75bbb4SMarc Zyngier return true; 21867d75bbb4SMarc Zyngier } 21877d75bbb4SMarc Zyngier 218884a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 218993f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 219084a6a2e7SMarc Zyngier { 219184a6a2e7SMarc Zyngier struct its_device *dev; 219293f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 21933e39e8f5SMarc Zyngier unsigned long flags; 2194591e5becSMarc Zyngier u16 *col_map = NULL; 219584a6a2e7SMarc Zyngier void *itt; 219684a6a2e7SMarc Zyngier int lpi_base; 219784a6a2e7SMarc Zyngier int nr_lpis; 2198c8481267SMarc Zyngier int nr_ites; 219984a6a2e7SMarc Zyngier int sz; 220084a6a2e7SMarc Zyngier 22013faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2202466b7d16SShanker Donthineni return NULL; 2203466b7d16SShanker Donthineni 220484a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2205c8481267SMarc Zyngier /* 22064f2c7583SArd Biesheuvel * We allocate at least one chunk worth of LPIs bet device, 22074f2c7583SArd Biesheuvel * and thus that many ITEs. The device may require less though. 2208c8481267SMarc Zyngier */ 22094f2c7583SArd Biesheuvel nr_ites = max(IRQS_PER_CHUNK, roundup_pow_of_two(nvecs)); 2210c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 221184a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 22126c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 221393f94ea0SMarc Zyngier if (alloc_lpis) { 221484a6a2e7SMarc Zyngier lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 2215591e5becSMarc Zyngier if (lpi_map) 22166396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 221793f94ea0SMarc Zyngier GFP_KERNEL); 221893f94ea0SMarc Zyngier } else { 22196396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 222093f94ea0SMarc Zyngier nr_lpis = 0; 222193f94ea0SMarc Zyngier lpi_base = 0; 222293f94ea0SMarc Zyngier } 222384a6a2e7SMarc Zyngier 222493f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 222584a6a2e7SMarc Zyngier kfree(dev); 222684a6a2e7SMarc Zyngier kfree(itt); 222784a6a2e7SMarc Zyngier kfree(lpi_map); 2228591e5becSMarc Zyngier kfree(col_map); 222984a6a2e7SMarc Zyngier return NULL; 223084a6a2e7SMarc Zyngier } 223184a6a2e7SMarc Zyngier 2232328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 22335a9a8915SMarc Zyngier 223484a6a2e7SMarc Zyngier dev->its = its; 223584a6a2e7SMarc Zyngier dev->itt = itt; 2236c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2237591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2238591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2239591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2240591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 2241d011e4e6SMarc Zyngier mutex_init(&dev->event_map.vlpi_lock); 224284a6a2e7SMarc Zyngier dev->device_id = dev_id; 224384a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 224484a6a2e7SMarc Zyngier 22453e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 224684a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 22473e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 224884a6a2e7SMarc Zyngier 224984a6a2e7SMarc Zyngier /* Map device to its ITT */ 225084a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 225184a6a2e7SMarc Zyngier 225284a6a2e7SMarc Zyngier return dev; 225384a6a2e7SMarc Zyngier } 225484a6a2e7SMarc Zyngier 225584a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 225684a6a2e7SMarc Zyngier { 22573e39e8f5SMarc Zyngier unsigned long flags; 22583e39e8f5SMarc Zyngier 22593e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 226084a6a2e7SMarc Zyngier list_del(&its_dev->entry); 22613e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 226284a6a2e7SMarc Zyngier kfree(its_dev->itt); 226384a6a2e7SMarc Zyngier kfree(its_dev); 226484a6a2e7SMarc Zyngier } 2265b48ac83dSMarc Zyngier 2266b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 2267b48ac83dSMarc Zyngier { 2268b48ac83dSMarc Zyngier int idx; 2269b48ac83dSMarc Zyngier 2270591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 2271591e5becSMarc Zyngier dev->event_map.nr_lpis); 2272591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 2273b48ac83dSMarc Zyngier return -ENOSPC; 2274b48ac83dSMarc Zyngier 2275591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 2276591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 2277b48ac83dSMarc Zyngier 2278b48ac83dSMarc Zyngier return 0; 2279b48ac83dSMarc Zyngier } 2280b48ac83dSMarc Zyngier 228154456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 2282b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 2283b48ac83dSMarc Zyngier { 2284b48ac83dSMarc Zyngier struct its_node *its; 2285b48ac83dSMarc Zyngier struct its_device *its_dev; 228654456db9SMarc Zyngier struct msi_domain_info *msi_info; 228754456db9SMarc Zyngier u32 dev_id; 2288b48ac83dSMarc Zyngier 228954456db9SMarc Zyngier /* 229054456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 229154456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 229254456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 229354456db9SMarc Zyngier * are built on top of the ITS. 229454456db9SMarc Zyngier */ 229554456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 229654456db9SMarc Zyngier 229754456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 229854456db9SMarc Zyngier its = msi_info->data; 229954456db9SMarc Zyngier 230020b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 230120b3d54eSMarc Zyngier vpe_proxy.dev && 230220b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 230320b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 230420b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 230520b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 230620b3d54eSMarc Zyngier dev_id); 230720b3d54eSMarc Zyngier return -EINVAL; 230820b3d54eSMarc Zyngier } 230920b3d54eSMarc Zyngier 2310f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 2311e8137f4fSMarc Zyngier if (its_dev) { 2312e8137f4fSMarc Zyngier /* 2313e8137f4fSMarc Zyngier * We already have seen this ID, probably through 2314e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 2315e8137f4fSMarc Zyngier * create the device. 2316e8137f4fSMarc Zyngier */ 2317f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 2318e8137f4fSMarc Zyngier goto out; 2319e8137f4fSMarc Zyngier } 2320b48ac83dSMarc Zyngier 232193f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 2322b48ac83dSMarc Zyngier if (!its_dev) 2323b48ac83dSMarc Zyngier return -ENOMEM; 2324b48ac83dSMarc Zyngier 2325f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 2326e8137f4fSMarc Zyngier out: 2327b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 2328b48ac83dSMarc Zyngier return 0; 2329b48ac83dSMarc Zyngier } 2330b48ac83dSMarc Zyngier 233154456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 233254456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 233354456db9SMarc Zyngier }; 233454456db9SMarc Zyngier 2335b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 2336b48ac83dSMarc Zyngier unsigned int virq, 2337b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 2338b48ac83dSMarc Zyngier { 2339f833f57fSMarc Zyngier struct irq_fwspec fwspec; 2340b48ac83dSMarc Zyngier 2341f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 2342f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 2343f833f57fSMarc Zyngier fwspec.param_count = 3; 2344f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 2345f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 2346f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 23473f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 23483f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 23493f010cf1STomasz Nowicki fwspec.param_count = 2; 23503f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 23513f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 2352f833f57fSMarc Zyngier } else { 2353f833f57fSMarc Zyngier return -EINVAL; 2354f833f57fSMarc Zyngier } 2355b48ac83dSMarc Zyngier 2356f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 2357b48ac83dSMarc Zyngier } 2358b48ac83dSMarc Zyngier 2359b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 2360b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 2361b48ac83dSMarc Zyngier { 2362b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 2363b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 2364b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 2365b48ac83dSMarc Zyngier int err; 2366b48ac83dSMarc Zyngier int i; 2367b48ac83dSMarc Zyngier 2368b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2369b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 2370b48ac83dSMarc Zyngier if (err) 2371b48ac83dSMarc Zyngier return err; 2372b48ac83dSMarc Zyngier 2373b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 2374b48ac83dSMarc Zyngier if (err) 2375b48ac83dSMarc Zyngier return err; 2376b48ac83dSMarc Zyngier 2377b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 2378b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 23790d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 2380f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 2381591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 2382591e5becSMarc Zyngier (int) hwirq, virq + i); 2383b48ac83dSMarc Zyngier } 2384b48ac83dSMarc Zyngier 2385b48ac83dSMarc Zyngier return 0; 2386b48ac83dSMarc Zyngier } 2387b48ac83dSMarc Zyngier 238872491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 2389702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2390aca268dfSMarc Zyngier { 2391aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2392aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2393fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 23940d224d35SMarc Zyngier int cpu; 2395fbf8f40eSGanapatrao Kulkarni 2396fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 2397fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 2398fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 2399aca268dfSMarc Zyngier 2400591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 2401c1797b11SYang Yingliang cpu = cpumask_first_and(cpu_mask, cpu_online_mask); 2402c1797b11SYang Yingliang if (cpu >= nr_cpu_ids) { 2403c1797b11SYang Yingliang if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) 2404c1797b11SYang Yingliang return -EINVAL; 2405c1797b11SYang Yingliang 2406c1797b11SYang Yingliang cpu = cpumask_first(cpu_online_mask); 2407c1797b11SYang Yingliang } 2408c1797b11SYang Yingliang 24090d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 24100d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 2411591e5becSMarc Zyngier 2412aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 24136a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 241472491643SThomas Gleixner return 0; 2415aca268dfSMarc Zyngier } 2416aca268dfSMarc Zyngier 2417aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 2418aca268dfSMarc Zyngier struct irq_data *d) 2419aca268dfSMarc Zyngier { 2420aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2421aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2422aca268dfSMarc Zyngier 2423aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 2424aca268dfSMarc Zyngier its_send_discard(its_dev, event); 2425aca268dfSMarc Zyngier } 2426aca268dfSMarc Zyngier 2427b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 2428b48ac83dSMarc Zyngier unsigned int nr_irqs) 2429b48ac83dSMarc Zyngier { 2430b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 2431b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2432b48ac83dSMarc Zyngier int i; 2433b48ac83dSMarc Zyngier 2434b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2435b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 2436b48ac83dSMarc Zyngier virq + i); 2437aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 2438b48ac83dSMarc Zyngier 2439b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 2440591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 2441b48ac83dSMarc Zyngier 2442b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 24432da39949SMarc Zyngier irq_domain_reset_irq_data(data); 2444b48ac83dSMarc Zyngier } 2445b48ac83dSMarc Zyngier 2446b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 2447591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 2448591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 2449cf2be8baSMarc Zyngier its_lpi_free_chunks(its_dev->event_map.lpi_map, 2450cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 2451cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 2452cf2be8baSMarc Zyngier kfree(its_dev->event_map.col_map); 2453b48ac83dSMarc Zyngier 2454b48ac83dSMarc Zyngier /* Unmap device/itt */ 2455b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 2456b48ac83dSMarc Zyngier its_free_device(its_dev); 2457b48ac83dSMarc Zyngier } 2458b48ac83dSMarc Zyngier 2459b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 2460b48ac83dSMarc Zyngier } 2461b48ac83dSMarc Zyngier 2462b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 2463b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 2464b48ac83dSMarc Zyngier .free = its_irq_domain_free, 2465aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 2466aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 2467b48ac83dSMarc Zyngier }; 24684c21f3c2SMarc Zyngier 246920b3d54eSMarc Zyngier /* 247020b3d54eSMarc Zyngier * This is insane. 247120b3d54eSMarc Zyngier * 247220b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 247320b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 247420b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 247520b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 247620b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 247720b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 247820b3d54eSMarc Zyngier * 247920b3d54eSMarc Zyngier * Broken by design(tm). 248020b3d54eSMarc Zyngier */ 248120b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 248220b3d54eSMarc Zyngier { 248320b3d54eSMarc Zyngier /* Already unmapped? */ 248420b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 248520b3d54eSMarc Zyngier return; 248620b3d54eSMarc Zyngier 248720b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 248820b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 248920b3d54eSMarc Zyngier 249020b3d54eSMarc Zyngier /* 249120b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 249220b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 249320b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 249420b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 249520b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 249620b3d54eSMarc Zyngier */ 249720b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 249820b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 249920b3d54eSMarc Zyngier 250020b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 250120b3d54eSMarc Zyngier } 250220b3d54eSMarc Zyngier 250320b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 250420b3d54eSMarc Zyngier { 250520b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 250620b3d54eSMarc Zyngier unsigned long flags; 250720b3d54eSMarc Zyngier 250820b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 250920b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 251020b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 251120b3d54eSMarc Zyngier } 251220b3d54eSMarc Zyngier } 251320b3d54eSMarc Zyngier 251420b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 251520b3d54eSMarc Zyngier { 251620b3d54eSMarc Zyngier /* Already mapped? */ 251720b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 251820b3d54eSMarc Zyngier return; 251920b3d54eSMarc Zyngier 252020b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 252120b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 252220b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 252320b3d54eSMarc Zyngier 252420b3d54eSMarc Zyngier /* Map the new VPE instead */ 252520b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 252620b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 252720b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 252820b3d54eSMarc Zyngier 252920b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 253020b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 253120b3d54eSMarc Zyngier } 253220b3d54eSMarc Zyngier 2533958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 2534958b90d1SMarc Zyngier { 2535958b90d1SMarc Zyngier unsigned long flags; 2536958b90d1SMarc Zyngier struct its_collection *target_col; 2537958b90d1SMarc Zyngier 2538958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2539958b90d1SMarc Zyngier void __iomem *rdbase; 2540958b90d1SMarc Zyngier 2541958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 2542958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2543958b90d1SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2544958b90d1SMarc Zyngier cpu_relax(); 2545958b90d1SMarc Zyngier 2546958b90d1SMarc Zyngier return; 2547958b90d1SMarc Zyngier } 2548958b90d1SMarc Zyngier 2549958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 2550958b90d1SMarc Zyngier 2551958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 2552958b90d1SMarc Zyngier 2553958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 2554958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 2555958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 2556958b90d1SMarc Zyngier 2557958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 2558958b90d1SMarc Zyngier } 2559958b90d1SMarc Zyngier 25603171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 25613171a47aSMarc Zyngier const struct cpumask *mask_val, 25623171a47aSMarc Zyngier bool force) 25633171a47aSMarc Zyngier { 25643171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 25653171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 25663171a47aSMarc Zyngier 25673171a47aSMarc Zyngier /* 25683171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 256920b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 2570958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 2571958b90d1SMarc Zyngier * interrupt to its new location. 25723171a47aSMarc Zyngier */ 25733171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 2574958b90d1SMarc Zyngier int from = vpe->col_idx; 2575958b90d1SMarc Zyngier 25763171a47aSMarc Zyngier vpe->col_idx = cpu; 25773171a47aSMarc Zyngier its_send_vmovp(vpe); 2578958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 25793171a47aSMarc Zyngier } 25803171a47aSMarc Zyngier 258144c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 258244c4c25eSMarc Zyngier 25833171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 25843171a47aSMarc Zyngier } 25853171a47aSMarc Zyngier 2586e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 2587e643d803SMarc Zyngier { 258850c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2589e643d803SMarc Zyngier u64 val; 2590e643d803SMarc Zyngier 2591e643d803SMarc Zyngier /* Schedule the VPE */ 2592e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 2593e643d803SMarc Zyngier GENMASK_ULL(51, 12); 2594e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 2595e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 2596e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 2597e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 2598e643d803SMarc Zyngier 2599e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 2600e643d803SMarc Zyngier GENMASK_ULL(51, 16); 2601e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 2602e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 2603e643d803SMarc Zyngier /* 2604e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 2605e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 2606e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 2607e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 2608e643d803SMarc Zyngier * that the pending table is empty. A good implementation 2609e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 2610e643d803SMarc Zyngier * making this a tolerable issue. 2611e643d803SMarc Zyngier */ 2612e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2613e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 2614e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 2615e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2616e643d803SMarc Zyngier } 2617e643d803SMarc Zyngier 2618e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 2619e643d803SMarc Zyngier { 262050c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2621e643d803SMarc Zyngier u32 count = 1000000; /* 1s! */ 2622e643d803SMarc Zyngier bool clean; 2623e643d803SMarc Zyngier u64 val; 2624e643d803SMarc Zyngier 2625e643d803SMarc Zyngier /* We're being scheduled out */ 2626e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2627e643d803SMarc Zyngier val &= ~GICR_VPENDBASER_Valid; 2628e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2629e643d803SMarc Zyngier 2630e643d803SMarc Zyngier do { 2631e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2632e643d803SMarc Zyngier clean = !(val & GICR_VPENDBASER_Dirty); 2633e643d803SMarc Zyngier if (!clean) { 2634e643d803SMarc Zyngier count--; 2635e643d803SMarc Zyngier cpu_relax(); 2636e643d803SMarc Zyngier udelay(1); 2637e643d803SMarc Zyngier } 2638e643d803SMarc Zyngier } while (!clean && count); 2639e643d803SMarc Zyngier 2640e643d803SMarc Zyngier if (unlikely(!clean && !count)) { 2641e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2642e643d803SMarc Zyngier vpe->idai = false; 2643e643d803SMarc Zyngier vpe->pending_last = true; 2644e643d803SMarc Zyngier } else { 2645e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 2646e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 2647e643d803SMarc Zyngier } 2648e643d803SMarc Zyngier } 2649e643d803SMarc Zyngier 265040619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 265140619a2eSMarc Zyngier { 265240619a2eSMarc Zyngier struct its_node *its; 265340619a2eSMarc Zyngier 265440619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 265540619a2eSMarc Zyngier if (!its->is_v4) 265640619a2eSMarc Zyngier continue; 265740619a2eSMarc Zyngier 26582247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 26592247e1bfSMarc Zyngier continue; 26602247e1bfSMarc Zyngier 26613c1cceebSMarc Zyngier /* 26623c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 26633c1cceebSMarc Zyngier * we need is to reach the redistributors. 26643c1cceebSMarc Zyngier */ 266540619a2eSMarc Zyngier its_send_vinvall(its, vpe); 26663c1cceebSMarc Zyngier return; 266740619a2eSMarc Zyngier } 266840619a2eSMarc Zyngier } 266940619a2eSMarc Zyngier 2670e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 2671e643d803SMarc Zyngier { 2672e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2673e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 2674e643d803SMarc Zyngier 2675e643d803SMarc Zyngier switch (info->cmd_type) { 2676e643d803SMarc Zyngier case SCHEDULE_VPE: 2677e643d803SMarc Zyngier its_vpe_schedule(vpe); 2678e643d803SMarc Zyngier return 0; 2679e643d803SMarc Zyngier 2680e643d803SMarc Zyngier case DESCHEDULE_VPE: 2681e643d803SMarc Zyngier its_vpe_deschedule(vpe); 2682e643d803SMarc Zyngier return 0; 2683e643d803SMarc Zyngier 26845e2f7642SMarc Zyngier case INVALL_VPE: 268540619a2eSMarc Zyngier its_vpe_invall(vpe); 26865e2f7642SMarc Zyngier return 0; 26875e2f7642SMarc Zyngier 2688e643d803SMarc Zyngier default: 2689e643d803SMarc Zyngier return -EINVAL; 2690e643d803SMarc Zyngier } 2691e643d803SMarc Zyngier } 2692e643d803SMarc Zyngier 269320b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 269420b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 269520b3d54eSMarc Zyngier { 269620b3d54eSMarc Zyngier unsigned long flags; 269720b3d54eSMarc Zyngier 269820b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 269920b3d54eSMarc Zyngier 270020b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 270120b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 270220b3d54eSMarc Zyngier 270320b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 270420b3d54eSMarc Zyngier } 270520b3d54eSMarc Zyngier 2706f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 2707f6a91da7SMarc Zyngier { 2708f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 270920b3d54eSMarc Zyngier 271020b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 2711f6a91da7SMarc Zyngier void __iomem *rdbase; 2712f6a91da7SMarc Zyngier 2713f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2714f6a91da7SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_INVLPIR); 2715f6a91da7SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2716f6a91da7SMarc Zyngier cpu_relax(); 271720b3d54eSMarc Zyngier } else { 271820b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 271920b3d54eSMarc Zyngier } 2720f6a91da7SMarc Zyngier } 2721f6a91da7SMarc Zyngier 2722f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 2723f6a91da7SMarc Zyngier { 2724f6a91da7SMarc Zyngier /* 2725f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 2726f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 2727f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 2728f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 2729f6a91da7SMarc Zyngier */ 2730f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 2731f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2732f6a91da7SMarc Zyngier } 2733f6a91da7SMarc Zyngier 2734f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 2735f6a91da7SMarc Zyngier { 2736f6a91da7SMarc Zyngier /* Same hack as above... */ 2737f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 2738f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2739f6a91da7SMarc Zyngier } 2740f6a91da7SMarc Zyngier 2741e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 2742e57a3e28SMarc Zyngier enum irqchip_irq_state which, 2743e57a3e28SMarc Zyngier bool state) 2744e57a3e28SMarc Zyngier { 2745e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2746e57a3e28SMarc Zyngier 2747e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 2748e57a3e28SMarc Zyngier return -EINVAL; 2749e57a3e28SMarc Zyngier 2750e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2751e57a3e28SMarc Zyngier void __iomem *rdbase; 2752e57a3e28SMarc Zyngier 2753e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2754e57a3e28SMarc Zyngier if (state) { 2755e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 2756e57a3e28SMarc Zyngier } else { 2757e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2758e57a3e28SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2759e57a3e28SMarc Zyngier cpu_relax(); 2760e57a3e28SMarc Zyngier } 2761e57a3e28SMarc Zyngier } else { 2762e57a3e28SMarc Zyngier if (state) 2763e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 2764e57a3e28SMarc Zyngier else 2765e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 2766e57a3e28SMarc Zyngier } 2767e57a3e28SMarc Zyngier 2768e57a3e28SMarc Zyngier return 0; 2769e57a3e28SMarc Zyngier } 2770e57a3e28SMarc Zyngier 27718fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 27728fff27aeSMarc Zyngier .name = "GICv4-vpe", 2773f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 2774f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 2775f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 27763171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 2777e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 2778e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 27798fff27aeSMarc Zyngier }; 27808fff27aeSMarc Zyngier 27817d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 27827d75bbb4SMarc Zyngier { 278332bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 27847d75bbb4SMarc Zyngier } 27857d75bbb4SMarc Zyngier 27867d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 27877d75bbb4SMarc Zyngier { 27887d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 27897d75bbb4SMarc Zyngier } 27907d75bbb4SMarc Zyngier 27917d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 27927d75bbb4SMarc Zyngier { 27937d75bbb4SMarc Zyngier struct page *vpt_page; 27947d75bbb4SMarc Zyngier int vpe_id; 27957d75bbb4SMarc Zyngier 27967d75bbb4SMarc Zyngier /* Allocate vpe_id */ 27977d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 27987d75bbb4SMarc Zyngier if (vpe_id < 0) 27997d75bbb4SMarc Zyngier return vpe_id; 28007d75bbb4SMarc Zyngier 28017d75bbb4SMarc Zyngier /* Allocate VPT */ 28027d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 28037d75bbb4SMarc Zyngier if (!vpt_page) { 28047d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 28057d75bbb4SMarc Zyngier return -ENOMEM; 28067d75bbb4SMarc Zyngier } 28077d75bbb4SMarc Zyngier 28087d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 28097d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 28107d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 28117d75bbb4SMarc Zyngier return -ENOMEM; 28127d75bbb4SMarc Zyngier } 28137d75bbb4SMarc Zyngier 28147d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 28157d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 281620b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 28177d75bbb4SMarc Zyngier 28187d75bbb4SMarc Zyngier return 0; 28197d75bbb4SMarc Zyngier } 28207d75bbb4SMarc Zyngier 28217d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 28227d75bbb4SMarc Zyngier { 282320b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 28247d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 28257d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 28267d75bbb4SMarc Zyngier } 28277d75bbb4SMarc Zyngier 28287d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 28297d75bbb4SMarc Zyngier unsigned int virq, 28307d75bbb4SMarc Zyngier unsigned int nr_irqs) 28317d75bbb4SMarc Zyngier { 28327d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 28337d75bbb4SMarc Zyngier int i; 28347d75bbb4SMarc Zyngier 28357d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 28367d75bbb4SMarc Zyngier 28377d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 28387d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 28397d75bbb4SMarc Zyngier virq + i); 28407d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 28417d75bbb4SMarc Zyngier 28427d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 28437d75bbb4SMarc Zyngier 28447d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 28457d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 28467d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 28477d75bbb4SMarc Zyngier } 28487d75bbb4SMarc Zyngier 28497d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 28507d75bbb4SMarc Zyngier its_lpi_free_chunks(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 28517d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 28527d75bbb4SMarc Zyngier } 28537d75bbb4SMarc Zyngier } 28547d75bbb4SMarc Zyngier 28557d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 28567d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 28577d75bbb4SMarc Zyngier { 28587d75bbb4SMarc Zyngier struct its_vm *vm = args; 28597d75bbb4SMarc Zyngier unsigned long *bitmap; 28607d75bbb4SMarc Zyngier struct page *vprop_page; 28617d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 28627d75bbb4SMarc Zyngier 28637d75bbb4SMarc Zyngier BUG_ON(!vm); 28647d75bbb4SMarc Zyngier 28657d75bbb4SMarc Zyngier bitmap = its_lpi_alloc_chunks(nr_irqs, &base, &nr_ids); 28667d75bbb4SMarc Zyngier if (!bitmap) 28677d75bbb4SMarc Zyngier return -ENOMEM; 28687d75bbb4SMarc Zyngier 28697d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 28707d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 28717d75bbb4SMarc Zyngier return -ENOMEM; 28727d75bbb4SMarc Zyngier } 28737d75bbb4SMarc Zyngier 28747d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 28757d75bbb4SMarc Zyngier if (!vprop_page) { 28767d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 28777d75bbb4SMarc Zyngier return -ENOMEM; 28787d75bbb4SMarc Zyngier } 28797d75bbb4SMarc Zyngier 28807d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 28817d75bbb4SMarc Zyngier vm->db_lpi_base = base; 28827d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 28837d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 28847d75bbb4SMarc Zyngier 28857d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 28867d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 28877d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 28887d75bbb4SMarc Zyngier if (err) 28897d75bbb4SMarc Zyngier break; 28907d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 28917d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 28927d75bbb4SMarc Zyngier if (err) 28937d75bbb4SMarc Zyngier break; 28947d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 28957d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 28967d75bbb4SMarc Zyngier set_bit(i, bitmap); 28977d75bbb4SMarc Zyngier } 28987d75bbb4SMarc Zyngier 28997d75bbb4SMarc Zyngier if (err) { 29007d75bbb4SMarc Zyngier if (i > 0) 29017d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 29027d75bbb4SMarc Zyngier 29037d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 29047d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 29057d75bbb4SMarc Zyngier } 29067d75bbb4SMarc Zyngier 29077d75bbb4SMarc Zyngier return err; 29087d75bbb4SMarc Zyngier } 29097d75bbb4SMarc Zyngier 291072491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 2911702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2912eb78192bSMarc Zyngier { 2913eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 291440619a2eSMarc Zyngier struct its_node *its; 2915eb78192bSMarc Zyngier 29162247e1bfSMarc Zyngier /* If we use the list map, we issue VMAPP on demand... */ 29172247e1bfSMarc Zyngier if (its_list_map) 29186ef930f2SMarc Zyngier return 0; 2919eb78192bSMarc Zyngier 2920eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 2921eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 292240619a2eSMarc Zyngier 292340619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 292440619a2eSMarc Zyngier if (!its->is_v4) 292540619a2eSMarc Zyngier continue; 292640619a2eSMarc Zyngier 292775fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 292840619a2eSMarc Zyngier its_send_vinvall(its, vpe); 292940619a2eSMarc Zyngier } 293040619a2eSMarc Zyngier 293144c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 293244c4c25eSMarc Zyngier 293372491643SThomas Gleixner return 0; 2934eb78192bSMarc Zyngier } 2935eb78192bSMarc Zyngier 2936eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 2937eb78192bSMarc Zyngier struct irq_data *d) 2938eb78192bSMarc Zyngier { 2939eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 294075fd951bSMarc Zyngier struct its_node *its; 2941eb78192bSMarc Zyngier 29422247e1bfSMarc Zyngier /* 29432247e1bfSMarc Zyngier * If we use the list map, we unmap the VPE once no VLPIs are 29442247e1bfSMarc Zyngier * associated with the VM. 29452247e1bfSMarc Zyngier */ 29462247e1bfSMarc Zyngier if (its_list_map) 29472247e1bfSMarc Zyngier return; 29482247e1bfSMarc Zyngier 294975fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 295075fd951bSMarc Zyngier if (!its->is_v4) 295175fd951bSMarc Zyngier continue; 295275fd951bSMarc Zyngier 295375fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 295475fd951bSMarc Zyngier } 2955eb78192bSMarc Zyngier } 2956eb78192bSMarc Zyngier 29578fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 29587d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 29597d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 2960eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 2961eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 29628fff27aeSMarc Zyngier }; 29638fff27aeSMarc Zyngier 29644559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 29654559fbb3SYun Wu { 29664559fbb3SYun Wu u32 count = 1000000; /* 1s */ 29674559fbb3SYun Wu u32 val; 29684559fbb3SYun Wu 29694559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 29707611da86SDavid Daney /* 29717611da86SDavid Daney * GIC architecture specification requires the ITS to be both 29727611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 29737611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 29747611da86SDavid Daney */ 29757611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 29764559fbb3SYun Wu return 0; 29774559fbb3SYun Wu 29784559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 2979d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 29804559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 29814559fbb3SYun Wu 29824559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 29834559fbb3SYun Wu while (1) { 29844559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 29854559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 29864559fbb3SYun Wu return 0; 29874559fbb3SYun Wu 29884559fbb3SYun Wu count--; 29894559fbb3SYun Wu if (!count) 29904559fbb3SYun Wu return -EBUSY; 29914559fbb3SYun Wu 29924559fbb3SYun Wu cpu_relax(); 29934559fbb3SYun Wu udelay(1); 29944559fbb3SYun Wu } 29954559fbb3SYun Wu } 29964559fbb3SYun Wu 29979d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 299894100970SRobert Richter { 299994100970SRobert Richter struct its_node *its = data; 300094100970SRobert Richter 3001fa150019SArd Biesheuvel /* erratum 22375: only alloc 8MB table size */ 3002fa150019SArd Biesheuvel its->device_ids = 0x14; /* 20 bits, 8MB */ 300394100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 30049d111d49SArd Biesheuvel 30059d111d49SArd Biesheuvel return true; 300694100970SRobert Richter } 300794100970SRobert Richter 30089d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 3009fbf8f40eSGanapatrao Kulkarni { 3010fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 3011fbf8f40eSGanapatrao Kulkarni 3012fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 30139d111d49SArd Biesheuvel 30149d111d49SArd Biesheuvel return true; 3015fbf8f40eSGanapatrao Kulkarni } 3016fbf8f40eSGanapatrao Kulkarni 30179d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 301890922a2dSShanker Donthineni { 301990922a2dSShanker Donthineni struct its_node *its = data; 302090922a2dSShanker Donthineni 302190922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 302290922a2dSShanker Donthineni its->ite_size = 16; 30239d111d49SArd Biesheuvel 30249d111d49SArd Biesheuvel return true; 302590922a2dSShanker Donthineni } 302690922a2dSShanker Donthineni 3027558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 3028558b0165SArd Biesheuvel { 3029558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 3030558b0165SArd Biesheuvel 3031558b0165SArd Biesheuvel /* 3032558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 3033558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 3034558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 3035558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 3036558b0165SArd Biesheuvel * the window offset. 3037558b0165SArd Biesheuvel */ 3038558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 3039558b0165SArd Biesheuvel } 3040558b0165SArd Biesheuvel 3041558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 3042558b0165SArd Biesheuvel { 3043558b0165SArd Biesheuvel struct its_node *its = data; 3044558b0165SArd Biesheuvel u32 pre_its_window[2]; 3045558b0165SArd Biesheuvel u32 ids; 3046558b0165SArd Biesheuvel 3047558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 3048558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 3049558b0165SArd Biesheuvel pre_its_window, 3050558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 3051558b0165SArd Biesheuvel 3052558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 3053558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 3054558b0165SArd Biesheuvel 3055558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 3056558b0165SArd Biesheuvel if (its->device_ids > ids) 3057558b0165SArd Biesheuvel its->device_ids = ids; 3058558b0165SArd Biesheuvel 3059558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 3060558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 3061558b0165SArd Biesheuvel return true; 3062558b0165SArd Biesheuvel } 3063558b0165SArd Biesheuvel return false; 3064558b0165SArd Biesheuvel } 3065558b0165SArd Biesheuvel 30665c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 30675c9a882eSMarc Zyngier { 30685c9a882eSMarc Zyngier struct its_node *its = data; 30695c9a882eSMarc Zyngier 30705c9a882eSMarc Zyngier /* 30715c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 30725c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 30735c9a882eSMarc Zyngier */ 30745c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 30755c9a882eSMarc Zyngier return true; 3076cc2d3216SMarc Zyngier } 30774c21f3c2SMarc Zyngier 307867510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 307994100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 308094100970SRobert Richter { 308194100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 308294100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 308394100970SRobert Richter .mask = 0xffff0fff, 308494100970SRobert Richter .init = its_enable_quirk_cavium_22375, 308594100970SRobert Richter }, 308694100970SRobert Richter #endif 3087fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 3088fbf8f40eSGanapatrao Kulkarni { 3089fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 3090fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 3091fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 3092fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 3093fbf8f40eSGanapatrao Kulkarni }, 3094fbf8f40eSGanapatrao Kulkarni #endif 309590922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 309690922a2dSShanker Donthineni { 309790922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 309890922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 309990922a2dSShanker Donthineni .mask = 0xffffffff, 310090922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 310190922a2dSShanker Donthineni }, 310290922a2dSShanker Donthineni #endif 3103558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 3104558b0165SArd Biesheuvel { 3105558b0165SArd Biesheuvel /* 3106558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 3107558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 3108558b0165SArd Biesheuvel * special handling in software. 3109558b0165SArd Biesheuvel */ 3110558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 3111558b0165SArd Biesheuvel .iidr = 0x0001143b, 3112558b0165SArd Biesheuvel .mask = 0xffffffff, 3113558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 3114558b0165SArd Biesheuvel }, 3115558b0165SArd Biesheuvel #endif 31165c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 31175c9a882eSMarc Zyngier { 31185c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 31195c9a882eSMarc Zyngier .iidr = 0x00000004, 31205c9a882eSMarc Zyngier .mask = 0xffffffff, 31215c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 31225c9a882eSMarc Zyngier }, 31235c9a882eSMarc Zyngier #endif 312467510ccaSRobert Richter { 312567510ccaSRobert Richter } 312667510ccaSRobert Richter }; 312767510ccaSRobert Richter 312867510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 312967510ccaSRobert Richter { 313067510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 313167510ccaSRobert Richter 313267510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 313367510ccaSRobert Richter } 313467510ccaSRobert Richter 3135dba0bc7bSDerek Basehore static int its_save_disable(void) 3136dba0bc7bSDerek Basehore { 3137dba0bc7bSDerek Basehore struct its_node *its; 3138dba0bc7bSDerek Basehore int err = 0; 3139dba0bc7bSDerek Basehore 3140dba0bc7bSDerek Basehore spin_lock(&its_lock); 3141dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3142dba0bc7bSDerek Basehore void __iomem *base; 3143dba0bc7bSDerek Basehore 3144dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3145dba0bc7bSDerek Basehore continue; 3146dba0bc7bSDerek Basehore 3147dba0bc7bSDerek Basehore base = its->base; 3148dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 3149dba0bc7bSDerek Basehore err = its_force_quiescent(base); 3150dba0bc7bSDerek Basehore if (err) { 3151dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 3152dba0bc7bSDerek Basehore &its->phys_base, err); 3153dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3154dba0bc7bSDerek Basehore goto err; 3155dba0bc7bSDerek Basehore } 3156dba0bc7bSDerek Basehore 3157dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 3158dba0bc7bSDerek Basehore } 3159dba0bc7bSDerek Basehore 3160dba0bc7bSDerek Basehore err: 3161dba0bc7bSDerek Basehore if (err) { 3162dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 3163dba0bc7bSDerek Basehore void __iomem *base; 3164dba0bc7bSDerek Basehore 3165dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3166dba0bc7bSDerek Basehore continue; 3167dba0bc7bSDerek Basehore 3168dba0bc7bSDerek Basehore base = its->base; 3169dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3170dba0bc7bSDerek Basehore } 3171dba0bc7bSDerek Basehore } 3172dba0bc7bSDerek Basehore spin_unlock(&its_lock); 3173dba0bc7bSDerek Basehore 3174dba0bc7bSDerek Basehore return err; 3175dba0bc7bSDerek Basehore } 3176dba0bc7bSDerek Basehore 3177dba0bc7bSDerek Basehore static void its_restore_enable(void) 3178dba0bc7bSDerek Basehore { 3179dba0bc7bSDerek Basehore struct its_node *its; 3180dba0bc7bSDerek Basehore int ret; 3181dba0bc7bSDerek Basehore 3182dba0bc7bSDerek Basehore spin_lock(&its_lock); 3183dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3184dba0bc7bSDerek Basehore void __iomem *base; 3185dba0bc7bSDerek Basehore int i; 3186dba0bc7bSDerek Basehore 3187dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3188dba0bc7bSDerek Basehore continue; 3189dba0bc7bSDerek Basehore 3190dba0bc7bSDerek Basehore base = its->base; 3191dba0bc7bSDerek Basehore 3192dba0bc7bSDerek Basehore /* 3193dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 3194dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 3195dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 3196dba0bc7bSDerek Basehore * Specification. 3197dba0bc7bSDerek Basehore */ 3198dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 3199dba0bc7bSDerek Basehore if (ret) { 3200dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 3201dba0bc7bSDerek Basehore &its->phys_base, ret); 3202dba0bc7bSDerek Basehore continue; 3203dba0bc7bSDerek Basehore } 3204dba0bc7bSDerek Basehore 3205dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 3206dba0bc7bSDerek Basehore 3207dba0bc7bSDerek Basehore /* 3208dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 3209dba0bc7bSDerek Basehore * cmd_write line up with it. 3210dba0bc7bSDerek Basehore */ 3211dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 3212dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 3213dba0bc7bSDerek Basehore 3214dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 3215dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3216dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 3217dba0bc7bSDerek Basehore 3218dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 3219dba0bc7bSDerek Basehore continue; 3220dba0bc7bSDerek Basehore 3221dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 3222dba0bc7bSDerek Basehore } 3223dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3224920181ceSDerek Basehore 3225920181ceSDerek Basehore /* 3226920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 3227920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 3228920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 3229920181ceSDerek Basehore */ 3230920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 3231920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 3232920181ceSDerek Basehore its_cpu_init_collection(its); 3233dba0bc7bSDerek Basehore } 3234dba0bc7bSDerek Basehore spin_unlock(&its_lock); 3235dba0bc7bSDerek Basehore } 3236dba0bc7bSDerek Basehore 3237dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 3238dba0bc7bSDerek Basehore .suspend = its_save_disable, 3239dba0bc7bSDerek Basehore .resume = its_restore_enable, 3240dba0bc7bSDerek Basehore }; 3241dba0bc7bSDerek Basehore 3242db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 3243d14ae5e6STomasz Nowicki { 3244d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 3245d14ae5e6STomasz Nowicki struct msi_domain_info *info; 3246d14ae5e6STomasz Nowicki 3247d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 3248d14ae5e6STomasz Nowicki if (!info) 3249d14ae5e6STomasz Nowicki return -ENOMEM; 3250d14ae5e6STomasz Nowicki 3251db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 3252d14ae5e6STomasz Nowicki if (!inner_domain) { 3253d14ae5e6STomasz Nowicki kfree(info); 3254d14ae5e6STomasz Nowicki return -ENOMEM; 3255d14ae5e6STomasz Nowicki } 3256d14ae5e6STomasz Nowicki 3257db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 325896f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 3259558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 3260d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 3261d14ae5e6STomasz Nowicki info->data = its; 3262d14ae5e6STomasz Nowicki inner_domain->host_data = info; 3263d14ae5e6STomasz Nowicki 3264d14ae5e6STomasz Nowicki return 0; 3265d14ae5e6STomasz Nowicki } 3266d14ae5e6STomasz Nowicki 32678fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 32688fff27aeSMarc Zyngier { 326920b3d54eSMarc Zyngier struct its_node *its; 327020b3d54eSMarc Zyngier u32 devid; 327120b3d54eSMarc Zyngier int entries; 327220b3d54eSMarc Zyngier 327320b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 327420b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 327520b3d54eSMarc Zyngier return 0; 327620b3d54eSMarc Zyngier } 327720b3d54eSMarc Zyngier 327820b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 327920b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 328020b3d54eSMarc Zyngier 328120b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 32826396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 328320b3d54eSMarc Zyngier GFP_KERNEL); 328420b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 328520b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 328620b3d54eSMarc Zyngier return -ENOMEM; 328720b3d54eSMarc Zyngier } 328820b3d54eSMarc Zyngier 328920b3d54eSMarc Zyngier /* Use the last possible DevID */ 329020b3d54eSMarc Zyngier devid = GENMASK(its->device_ids - 1, 0); 329120b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 329220b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 329320b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 329420b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 329520b3d54eSMarc Zyngier return -ENOMEM; 329620b3d54eSMarc Zyngier } 329720b3d54eSMarc Zyngier 3298c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 329920b3d54eSMarc Zyngier 330020b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 330120b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 330220b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 330320b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 330420b3d54eSMarc Zyngier 33058fff27aeSMarc Zyngier return 0; 33068fff27aeSMarc Zyngier } 33078fff27aeSMarc Zyngier 33083dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 33093dfa576bSMarc Zyngier void __iomem *its_base) 33103dfa576bSMarc Zyngier { 33113dfa576bSMarc Zyngier int its_number; 33123dfa576bSMarc Zyngier u32 ctlr; 33133dfa576bSMarc Zyngier 33143dfa576bSMarc Zyngier /* 33153dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 33163dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 33173dfa576bSMarc Zyngier * locking. Should this change, we should address 33183dfa576bSMarc Zyngier * this. 33193dfa576bSMarc Zyngier */ 3320ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 3321ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 33223dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 33233dfa576bSMarc Zyngier &res->start); 33243dfa576bSMarc Zyngier return -EINVAL; 33253dfa576bSMarc Zyngier } 33263dfa576bSMarc Zyngier 33273dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 33283dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 33293dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 33303dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 33313dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 33323dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 33333dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 33343dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 33353dfa576bSMarc Zyngier } 33363dfa576bSMarc Zyngier 33373dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 33383dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 33393dfa576bSMarc Zyngier &res->start, its_number); 33403dfa576bSMarc Zyngier return -EINVAL; 33413dfa576bSMarc Zyngier } 33423dfa576bSMarc Zyngier 33433dfa576bSMarc Zyngier return its_number; 33443dfa576bSMarc Zyngier } 33453dfa576bSMarc Zyngier 3346db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 3347db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 33484c21f3c2SMarc Zyngier { 33494c21f3c2SMarc Zyngier struct its_node *its; 33504c21f3c2SMarc Zyngier void __iomem *its_base; 33513dfa576bSMarc Zyngier u32 val, ctlr; 33523dfa576bSMarc Zyngier u64 baser, tmp, typer; 33534c21f3c2SMarc Zyngier int err; 33544c21f3c2SMarc Zyngier 3355db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 33564c21f3c2SMarc Zyngier if (!its_base) { 3357db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 33584c21f3c2SMarc Zyngier return -ENOMEM; 33594c21f3c2SMarc Zyngier } 33604c21f3c2SMarc Zyngier 33614c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 33624c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 3363db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 33644c21f3c2SMarc Zyngier err = -ENODEV; 33654c21f3c2SMarc Zyngier goto out_unmap; 33664c21f3c2SMarc Zyngier } 33674c21f3c2SMarc Zyngier 33684559fbb3SYun Wu err = its_force_quiescent(its_base); 33694559fbb3SYun Wu if (err) { 3370db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 33714559fbb3SYun Wu goto out_unmap; 33724559fbb3SYun Wu } 33734559fbb3SYun Wu 3374db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 33754c21f3c2SMarc Zyngier 33764c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 33774c21f3c2SMarc Zyngier if (!its) { 33784c21f3c2SMarc Zyngier err = -ENOMEM; 33794c21f3c2SMarc Zyngier goto out_unmap; 33804c21f3c2SMarc Zyngier } 33814c21f3c2SMarc Zyngier 33824c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 33834c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 33844c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 33853dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 33864c21f3c2SMarc Zyngier its->base = its_base; 3387db40f0a7STomasz Nowicki its->phys_base = res->start; 33883dfa576bSMarc Zyngier its->ite_size = GITS_TYPER_ITT_ENTRY_SIZE(typer); 3389fa150019SArd Biesheuvel its->device_ids = GITS_TYPER_DEVBITS(typer); 33903dfa576bSMarc Zyngier its->is_v4 = !!(typer & GITS_TYPER_VLPIS); 33913dfa576bSMarc Zyngier if (its->is_v4) { 33923dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 33933dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 33943dfa576bSMarc Zyngier if (err < 0) 33953dfa576bSMarc Zyngier goto out_free_its; 33963dfa576bSMarc Zyngier 3397debf6d02SMarc Zyngier its->list_nr = err; 3398debf6d02SMarc Zyngier 33993dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 34003dfa576bSMarc Zyngier &res->start, err); 34013dfa576bSMarc Zyngier } else { 34023dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 34033dfa576bSMarc Zyngier } 34043dfa576bSMarc Zyngier } 34053dfa576bSMarc Zyngier 3406db40f0a7STomasz Nowicki its->numa_node = numa_node; 34074c21f3c2SMarc Zyngier 34085bc13c2cSRobert Richter its->cmd_base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 34095bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 34104c21f3c2SMarc Zyngier if (!its->cmd_base) { 34114c21f3c2SMarc Zyngier err = -ENOMEM; 34124c21f3c2SMarc Zyngier goto out_free_its; 34134c21f3c2SMarc Zyngier } 34144c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 3415558b0165SArd Biesheuvel its->fwnode_handle = handle; 3416558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 3417558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 34184c21f3c2SMarc Zyngier 341967510ccaSRobert Richter its_enable_quirks(its); 342067510ccaSRobert Richter 34210e0b0f69SShanker Donthineni err = its_alloc_tables(its); 34224c21f3c2SMarc Zyngier if (err) 34234c21f3c2SMarc Zyngier goto out_free_cmd; 34244c21f3c2SMarc Zyngier 34254c21f3c2SMarc Zyngier err = its_alloc_collections(its); 34264c21f3c2SMarc Zyngier if (err) 34274c21f3c2SMarc Zyngier goto out_free_tables; 34284c21f3c2SMarc Zyngier 34294c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 34302fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 34314c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 34324c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 34334c21f3c2SMarc Zyngier GITS_CBASER_VALID); 34344c21f3c2SMarc Zyngier 34350968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 34360968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 34374c21f3c2SMarc Zyngier 34384ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 3439241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 3440241a386cSMarc Zyngier /* 3441241a386cSMarc Zyngier * The HW reports non-shareable, we must 3442241a386cSMarc Zyngier * remove the cacheability attributes as 3443241a386cSMarc Zyngier * well. 3444241a386cSMarc Zyngier */ 3445241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 3446241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 3447241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 34480968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 3449241a386cSMarc Zyngier } 34504c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 34514c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 34524c21f3c2SMarc Zyngier } 34534c21f3c2SMarc Zyngier 34540968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 34553dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 3456d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 3457d51c4b4dSMarc Zyngier if (its->is_v4) 3458d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 3459d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 3460241a386cSMarc Zyngier 3461dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 3462dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 3463dba0bc7bSDerek Basehore 3464db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 3465d14ae5e6STomasz Nowicki if (err) 346654456db9SMarc Zyngier goto out_free_tables; 34674c21f3c2SMarc Zyngier 34684c21f3c2SMarc Zyngier spin_lock(&its_lock); 34694c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 34704c21f3c2SMarc Zyngier spin_unlock(&its_lock); 34714c21f3c2SMarc Zyngier 34724c21f3c2SMarc Zyngier return 0; 34734c21f3c2SMarc Zyngier 34744c21f3c2SMarc Zyngier out_free_tables: 34754c21f3c2SMarc Zyngier its_free_tables(its); 34764c21f3c2SMarc Zyngier out_free_cmd: 34775bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 34784c21f3c2SMarc Zyngier out_free_its: 34794c21f3c2SMarc Zyngier kfree(its); 34804c21f3c2SMarc Zyngier out_unmap: 34814c21f3c2SMarc Zyngier iounmap(its_base); 3482db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 34834c21f3c2SMarc Zyngier return err; 34844c21f3c2SMarc Zyngier } 34854c21f3c2SMarc Zyngier 34864c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 34874c21f3c2SMarc Zyngier { 3488589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 34894c21f3c2SMarc Zyngier } 34904c21f3c2SMarc Zyngier 34916eb486b6SShanker Donthineni static int redist_disable_lpis(void) 34924c21f3c2SMarc Zyngier { 34936eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 34946eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 34956eb486b6SShanker Donthineni u64 val; 34966eb486b6SShanker Donthineni 349782f499c8SMarc Zyngier /* 349882f499c8SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 349982f499c8SMarc Zyngier * LPIs before trying to re-enable them. They are already 350082f499c8SMarc Zyngier * configured and all is well in the world. Detect this case 350182f499c8SMarc Zyngier * by checking the allocation of the pending table for the 350282f499c8SMarc Zyngier * current CPU. 350382f499c8SMarc Zyngier */ 350482f499c8SMarc Zyngier if (gic_data_rdist()->pend_page) 350582f499c8SMarc Zyngier return 0; 350682f499c8SMarc Zyngier 35074c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 35084c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 35094c21f3c2SMarc Zyngier return -ENXIO; 35104c21f3c2SMarc Zyngier } 35116eb486b6SShanker Donthineni 35126eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 35136eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 35146eb486b6SShanker Donthineni return 0; 35156eb486b6SShanker Donthineni 35166eb486b6SShanker Donthineni pr_warn("CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 35176eb486b6SShanker Donthineni smp_processor_id()); 35186eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 35196eb486b6SShanker Donthineni 35206eb486b6SShanker Donthineni /* Disable LPIs */ 35216eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 35226eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 35236eb486b6SShanker Donthineni 35246eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 35256eb486b6SShanker Donthineni dsb(sy); 35266eb486b6SShanker Donthineni 35276eb486b6SShanker Donthineni /* 35286eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 35296eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 35306eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 35316eb486b6SShanker Donthineni */ 35326eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 35336eb486b6SShanker Donthineni if (!timeout) { 35346eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 35356eb486b6SShanker Donthineni smp_processor_id()); 35366eb486b6SShanker Donthineni return -ETIMEDOUT; 35376eb486b6SShanker Donthineni } 35386eb486b6SShanker Donthineni udelay(1); 35396eb486b6SShanker Donthineni timeout--; 35406eb486b6SShanker Donthineni } 35416eb486b6SShanker Donthineni 35426eb486b6SShanker Donthineni /* 35436eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 35446eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 35456eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 35466eb486b6SShanker Donthineni */ 35476eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 35486eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 35496eb486b6SShanker Donthineni return -EBUSY; 35506eb486b6SShanker Donthineni } 35516eb486b6SShanker Donthineni 35526eb486b6SShanker Donthineni return 0; 35536eb486b6SShanker Donthineni } 35546eb486b6SShanker Donthineni 35556eb486b6SShanker Donthineni int its_cpu_init(void) 35566eb486b6SShanker Donthineni { 35576eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 35586eb486b6SShanker Donthineni int ret; 35596eb486b6SShanker Donthineni 35606eb486b6SShanker Donthineni ret = redist_disable_lpis(); 35616eb486b6SShanker Donthineni if (ret) 35626eb486b6SShanker Donthineni return ret; 35636eb486b6SShanker Donthineni 35644c21f3c2SMarc Zyngier its_cpu_init_lpis(); 3565920181ceSDerek Basehore its_cpu_init_collections(); 35664c21f3c2SMarc Zyngier } 35674c21f3c2SMarc Zyngier 35684c21f3c2SMarc Zyngier return 0; 35694c21f3c2SMarc Zyngier } 35704c21f3c2SMarc Zyngier 3571935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 35724c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 35734c21f3c2SMarc Zyngier {}, 35744c21f3c2SMarc Zyngier }; 35754c21f3c2SMarc Zyngier 3576db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 35774c21f3c2SMarc Zyngier { 35784c21f3c2SMarc Zyngier struct device_node *np; 3579db40f0a7STomasz Nowicki struct resource res; 35804c21f3c2SMarc Zyngier 35814c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 35824c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 358395a25625SStephen Boyd if (!of_device_is_available(np)) 358495a25625SStephen Boyd continue; 3585d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 3586e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 3587e81f54c6SRob Herring np); 3588d14ae5e6STomasz Nowicki continue; 3589d14ae5e6STomasz Nowicki } 3590d14ae5e6STomasz Nowicki 3591db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 3592e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 3593db40f0a7STomasz Nowicki continue; 35944c21f3c2SMarc Zyngier } 35954c21f3c2SMarc Zyngier 3596db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 3597db40f0a7STomasz Nowicki } 3598db40f0a7STomasz Nowicki return 0; 3599db40f0a7STomasz Nowicki } 3600db40f0a7STomasz Nowicki 36013f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 36023f010cf1STomasz Nowicki 36033f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 36043f010cf1STomasz Nowicki 3605d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 3606dbd2b826SGanapatrao Kulkarni struct its_srat_map { 3607dbd2b826SGanapatrao Kulkarni /* numa node id */ 3608dbd2b826SGanapatrao Kulkarni u32 numa_node; 3609dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 3610dbd2b826SGanapatrao Kulkarni u32 its_id; 3611dbd2b826SGanapatrao Kulkarni }; 3612dbd2b826SGanapatrao Kulkarni 3613fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 3614dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 3615dbd2b826SGanapatrao Kulkarni 3616dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 3617dbd2b826SGanapatrao Kulkarni { 3618dbd2b826SGanapatrao Kulkarni int i; 3619dbd2b826SGanapatrao Kulkarni 3620dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 3621dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 3622dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 3623dbd2b826SGanapatrao Kulkarni } 3624dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 3625dbd2b826SGanapatrao Kulkarni } 3626dbd2b826SGanapatrao Kulkarni 3627fdf6e7a8SHanjun Guo static int __init gic_acpi_match_srat_its(struct acpi_subtable_header *header, 3628fdf6e7a8SHanjun Guo const unsigned long end) 3629fdf6e7a8SHanjun Guo { 3630fdf6e7a8SHanjun Guo return 0; 3631fdf6e7a8SHanjun Guo } 3632fdf6e7a8SHanjun Guo 3633dbd2b826SGanapatrao Kulkarni static int __init gic_acpi_parse_srat_its(struct acpi_subtable_header *header, 3634dbd2b826SGanapatrao Kulkarni const unsigned long end) 3635dbd2b826SGanapatrao Kulkarni { 3636dbd2b826SGanapatrao Kulkarni int node; 3637dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 3638dbd2b826SGanapatrao Kulkarni 3639dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 3640dbd2b826SGanapatrao Kulkarni if (!its_affinity) 3641dbd2b826SGanapatrao Kulkarni return -EINVAL; 3642dbd2b826SGanapatrao Kulkarni 3643dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 3644dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 3645dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 3646dbd2b826SGanapatrao Kulkarni return -EINVAL; 3647dbd2b826SGanapatrao Kulkarni } 3648dbd2b826SGanapatrao Kulkarni 3649dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 3650dbd2b826SGanapatrao Kulkarni 3651dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 3652dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 3653dbd2b826SGanapatrao Kulkarni return 0; 3654dbd2b826SGanapatrao Kulkarni } 3655dbd2b826SGanapatrao Kulkarni 3656dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 3657dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 3658dbd2b826SGanapatrao Kulkarni its_in_srat++; 3659dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 3660dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 3661dbd2b826SGanapatrao Kulkarni 3662dbd2b826SGanapatrao Kulkarni return 0; 3663dbd2b826SGanapatrao Kulkarni } 3664dbd2b826SGanapatrao Kulkarni 3665dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 3666dbd2b826SGanapatrao Kulkarni { 3667fdf6e7a8SHanjun Guo int count; 3668fdf6e7a8SHanjun Guo 3669fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 3670fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 3671fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3672fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 3673fdf6e7a8SHanjun Guo if (count <= 0) 3674fdf6e7a8SHanjun Guo return; 3675fdf6e7a8SHanjun Guo 36766da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 3677fdf6e7a8SHanjun Guo GFP_KERNEL); 3678fdf6e7a8SHanjun Guo if (!its_srat_maps) { 3679fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 3680fdf6e7a8SHanjun Guo return; 3681fdf6e7a8SHanjun Guo } 3682fdf6e7a8SHanjun Guo 3683dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 3684dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 3685dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3686dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 3687dbd2b826SGanapatrao Kulkarni } 3688fdf6e7a8SHanjun Guo 3689fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 3690fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 3691fdf6e7a8SHanjun Guo { 3692fdf6e7a8SHanjun Guo kfree(its_srat_maps); 3693fdf6e7a8SHanjun Guo } 3694dbd2b826SGanapatrao Kulkarni #else 3695dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 3696dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 3697fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 3698dbd2b826SGanapatrao Kulkarni #endif 3699dbd2b826SGanapatrao Kulkarni 37003f010cf1STomasz Nowicki static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header, 37013f010cf1STomasz Nowicki const unsigned long end) 37023f010cf1STomasz Nowicki { 37033f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 37043f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 37053f010cf1STomasz Nowicki struct resource res; 37063f010cf1STomasz Nowicki int err; 37073f010cf1STomasz Nowicki 37083f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 37093f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 37103f010cf1STomasz Nowicki res.start = its_entry->base_address; 37113f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 37123f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 37133f010cf1STomasz Nowicki 37143f010cf1STomasz Nowicki dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address); 37153f010cf1STomasz Nowicki if (!dom_handle) { 37163f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 37173f010cf1STomasz Nowicki &res.start); 37183f010cf1STomasz Nowicki return -ENOMEM; 37193f010cf1STomasz Nowicki } 37203f010cf1STomasz Nowicki 37218b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 37228b4282e6SShameer Kolothum dom_handle); 37233f010cf1STomasz Nowicki if (err) { 37243f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 37253f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 37263f010cf1STomasz Nowicki goto dom_err; 37273f010cf1STomasz Nowicki } 37283f010cf1STomasz Nowicki 3729dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 3730dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 37313f010cf1STomasz Nowicki if (!err) 37323f010cf1STomasz Nowicki return 0; 37333f010cf1STomasz Nowicki 37343f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 37353f010cf1STomasz Nowicki dom_err: 37363f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 37373f010cf1STomasz Nowicki return err; 37383f010cf1STomasz Nowicki } 37393f010cf1STomasz Nowicki 37403f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 37413f010cf1STomasz Nowicki { 3742dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 37433f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 37443f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 3745fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 37463f010cf1STomasz Nowicki } 37473f010cf1STomasz Nowicki #else 37483f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 37493f010cf1STomasz Nowicki #endif 37503f010cf1STomasz Nowicki 3751db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 3752db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 3753db40f0a7STomasz Nowicki { 3754db40f0a7STomasz Nowicki struct device_node *of_node; 37558fff27aeSMarc Zyngier struct its_node *its; 37568fff27aeSMarc Zyngier bool has_v4 = false; 37578fff27aeSMarc Zyngier int err; 3758db40f0a7STomasz Nowicki 3759db40f0a7STomasz Nowicki its_parent = parent_domain; 3760db40f0a7STomasz Nowicki of_node = to_of_node(handle); 3761db40f0a7STomasz Nowicki if (of_node) 3762db40f0a7STomasz Nowicki its_of_probe(of_node); 3763db40f0a7STomasz Nowicki else 37643f010cf1STomasz Nowicki its_acpi_probe(); 3765db40f0a7STomasz Nowicki 37664c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 37674c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 37684c21f3c2SMarc Zyngier return -ENXIO; 37694c21f3c2SMarc Zyngier } 37704c21f3c2SMarc Zyngier 37714c21f3c2SMarc Zyngier gic_rdists = rdists; 37728fff27aeSMarc Zyngier err = its_alloc_lpi_tables(); 37738fff27aeSMarc Zyngier if (err) 37748fff27aeSMarc Zyngier return err; 37758fff27aeSMarc Zyngier 37768fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 37778fff27aeSMarc Zyngier has_v4 |= its->is_v4; 37788fff27aeSMarc Zyngier 37798fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 37803d63cb53SMarc Zyngier if (its_init_vpe_domain() || 37813d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 37828fff27aeSMarc Zyngier rdists->has_vlpis = false; 37838fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 37848fff27aeSMarc Zyngier } 37858fff27aeSMarc Zyngier } 37868fff27aeSMarc Zyngier 3787dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 3788dba0bc7bSDerek Basehore 37898fff27aeSMarc Zyngier return 0; 37904c21f3c2SMarc Zyngier } 3791