1cc2d3216SMarc Zyngier /* 2cc2d3216SMarc Zyngier * Copyright (C) 2013, 2014 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 18cc2d3216SMarc Zyngier #include <linux/bitmap.h> 19cc2d3216SMarc Zyngier #include <linux/cpu.h> 20cc2d3216SMarc Zyngier #include <linux/delay.h> 21cc2d3216SMarc Zyngier #include <linux/interrupt.h> 22cc2d3216SMarc Zyngier #include <linux/log2.h> 23cc2d3216SMarc Zyngier #include <linux/mm.h> 24cc2d3216SMarc Zyngier #include <linux/msi.h> 25cc2d3216SMarc Zyngier #include <linux/of.h> 26cc2d3216SMarc Zyngier #include <linux/of_address.h> 27cc2d3216SMarc Zyngier #include <linux/of_irq.h> 28cc2d3216SMarc Zyngier #include <linux/of_pci.h> 29cc2d3216SMarc Zyngier #include <linux/of_platform.h> 30cc2d3216SMarc Zyngier #include <linux/percpu.h> 31cc2d3216SMarc Zyngier #include <linux/slab.h> 32cc2d3216SMarc Zyngier 33cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 34cc2d3216SMarc Zyngier 35cc2d3216SMarc Zyngier #include <asm/cacheflush.h> 36cc2d3216SMarc Zyngier #include <asm/cputype.h> 37cc2d3216SMarc Zyngier #include <asm/exception.h> 38cc2d3216SMarc Zyngier 39cc2d3216SMarc Zyngier #include "irqchip.h" 40cc2d3216SMarc Zyngier 41cc2d3216SMarc Zyngier #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1 << 0) 42cc2d3216SMarc Zyngier 43c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 44c48ed51cSMarc Zyngier 45cc2d3216SMarc Zyngier /* 46cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 47cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 48cc2d3216SMarc Zyngier * CPU. 49cc2d3216SMarc Zyngier */ 50cc2d3216SMarc Zyngier struct its_collection { 51cc2d3216SMarc Zyngier u64 target_address; 52cc2d3216SMarc Zyngier u16 col_id; 53cc2d3216SMarc Zyngier }; 54cc2d3216SMarc Zyngier 55cc2d3216SMarc Zyngier /* 56cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 57cc2d3216SMarc Zyngier * msi_controller, the command queue, the collections, and the list of 58cc2d3216SMarc Zyngier * devices writing to it. 59cc2d3216SMarc Zyngier */ 60cc2d3216SMarc Zyngier struct its_node { 61cc2d3216SMarc Zyngier raw_spinlock_t lock; 62cc2d3216SMarc Zyngier struct list_head entry; 63cc2d3216SMarc Zyngier struct msi_controller msi_chip; 64cc2d3216SMarc Zyngier struct irq_domain *domain; 65cc2d3216SMarc Zyngier void __iomem *base; 66cc2d3216SMarc Zyngier unsigned long phys_base; 67cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 68cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 69cc2d3216SMarc Zyngier void *tables[GITS_BASER_NR_REGS]; 70cc2d3216SMarc Zyngier struct its_collection *collections; 71cc2d3216SMarc Zyngier struct list_head its_device_list; 72cc2d3216SMarc Zyngier u64 flags; 73cc2d3216SMarc Zyngier u32 ite_size; 74cc2d3216SMarc Zyngier }; 75cc2d3216SMarc Zyngier 76cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 77cc2d3216SMarc Zyngier 78cc2d3216SMarc Zyngier /* 79cc2d3216SMarc Zyngier * The ITS view of a device - belongs to an ITS, a collection, owns an 80cc2d3216SMarc Zyngier * interrupt translation table, and a list of interrupts. 81cc2d3216SMarc Zyngier */ 82cc2d3216SMarc Zyngier struct its_device { 83cc2d3216SMarc Zyngier struct list_head entry; 84cc2d3216SMarc Zyngier struct its_node *its; 85cc2d3216SMarc Zyngier struct its_collection *collection; 86cc2d3216SMarc Zyngier void *itt; 87cc2d3216SMarc Zyngier unsigned long *lpi_map; 88cc2d3216SMarc Zyngier irq_hw_number_t lpi_base; 89cc2d3216SMarc Zyngier int nr_lpis; 90cc2d3216SMarc Zyngier u32 nr_ites; 91cc2d3216SMarc Zyngier u32 device_id; 92cc2d3216SMarc Zyngier }; 93cc2d3216SMarc Zyngier 941ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 951ac19ca6SMarc Zyngier static DEFINE_SPINLOCK(its_lock); 961ac19ca6SMarc Zyngier static struct device_node *gic_root_node; 971ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 981ac19ca6SMarc Zyngier 991ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 1001ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 1011ac19ca6SMarc Zyngier 102cc2d3216SMarc Zyngier /* 103cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 104cc2d3216SMarc Zyngier * block. 105cc2d3216SMarc Zyngier */ 106cc2d3216SMarc Zyngier struct its_cmd_desc { 107cc2d3216SMarc Zyngier union { 108cc2d3216SMarc Zyngier struct { 109cc2d3216SMarc Zyngier struct its_device *dev; 110cc2d3216SMarc Zyngier u32 event_id; 111cc2d3216SMarc Zyngier } its_inv_cmd; 112cc2d3216SMarc Zyngier 113cc2d3216SMarc Zyngier struct { 114cc2d3216SMarc Zyngier struct its_device *dev; 115cc2d3216SMarc Zyngier u32 event_id; 116cc2d3216SMarc Zyngier } its_int_cmd; 117cc2d3216SMarc Zyngier 118cc2d3216SMarc Zyngier struct { 119cc2d3216SMarc Zyngier struct its_device *dev; 120cc2d3216SMarc Zyngier int valid; 121cc2d3216SMarc Zyngier } its_mapd_cmd; 122cc2d3216SMarc Zyngier 123cc2d3216SMarc Zyngier struct { 124cc2d3216SMarc Zyngier struct its_collection *col; 125cc2d3216SMarc Zyngier int valid; 126cc2d3216SMarc Zyngier } its_mapc_cmd; 127cc2d3216SMarc Zyngier 128cc2d3216SMarc Zyngier struct { 129cc2d3216SMarc Zyngier struct its_device *dev; 130cc2d3216SMarc Zyngier u32 phys_id; 131cc2d3216SMarc Zyngier u32 event_id; 132cc2d3216SMarc Zyngier } its_mapvi_cmd; 133cc2d3216SMarc Zyngier 134cc2d3216SMarc Zyngier struct { 135cc2d3216SMarc Zyngier struct its_device *dev; 136cc2d3216SMarc Zyngier struct its_collection *col; 137cc2d3216SMarc Zyngier u32 id; 138cc2d3216SMarc Zyngier } its_movi_cmd; 139cc2d3216SMarc Zyngier 140cc2d3216SMarc Zyngier struct { 141cc2d3216SMarc Zyngier struct its_device *dev; 142cc2d3216SMarc Zyngier u32 event_id; 143cc2d3216SMarc Zyngier } its_discard_cmd; 144cc2d3216SMarc Zyngier 145cc2d3216SMarc Zyngier struct { 146cc2d3216SMarc Zyngier struct its_collection *col; 147cc2d3216SMarc Zyngier } its_invall_cmd; 148cc2d3216SMarc Zyngier }; 149cc2d3216SMarc Zyngier }; 150cc2d3216SMarc Zyngier 151cc2d3216SMarc Zyngier /* 152cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 153cc2d3216SMarc Zyngier */ 154cc2d3216SMarc Zyngier struct its_cmd_block { 155cc2d3216SMarc Zyngier u64 raw_cmd[4]; 156cc2d3216SMarc Zyngier }; 157cc2d3216SMarc Zyngier 158cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 159cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 160cc2d3216SMarc Zyngier 161cc2d3216SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_cmd_block *, 162cc2d3216SMarc Zyngier struct its_cmd_desc *); 163cc2d3216SMarc Zyngier 164cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 165cc2d3216SMarc Zyngier { 166cc2d3216SMarc Zyngier cmd->raw_cmd[0] &= ~0xffUL; 167cc2d3216SMarc Zyngier cmd->raw_cmd[0] |= cmd_nr; 168cc2d3216SMarc Zyngier } 169cc2d3216SMarc Zyngier 170cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 171cc2d3216SMarc Zyngier { 172cc2d3216SMarc Zyngier cmd->raw_cmd[0] &= ~(0xffffUL << 32); 173cc2d3216SMarc Zyngier cmd->raw_cmd[0] |= ((u64)devid) << 32; 174cc2d3216SMarc Zyngier } 175cc2d3216SMarc Zyngier 176cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 177cc2d3216SMarc Zyngier { 178cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= ~0xffffffffUL; 179cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= id; 180cc2d3216SMarc Zyngier } 181cc2d3216SMarc Zyngier 182cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 183cc2d3216SMarc Zyngier { 184cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= 0xffffffffUL; 185cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= ((u64)phys_id) << 32; 186cc2d3216SMarc Zyngier } 187cc2d3216SMarc Zyngier 188cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 189cc2d3216SMarc Zyngier { 190cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= ~0x1fUL; 191cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= size & 0x1f; 192cc2d3216SMarc Zyngier } 193cc2d3216SMarc Zyngier 194cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 195cc2d3216SMarc Zyngier { 196cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~0xffffffffffffUL; 197cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= itt_addr & 0xffffffffff00UL; 198cc2d3216SMarc Zyngier } 199cc2d3216SMarc Zyngier 200cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 201cc2d3216SMarc Zyngier { 202cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~(1UL << 63); 203cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= ((u64)!!valid) << 63; 204cc2d3216SMarc Zyngier } 205cc2d3216SMarc Zyngier 206cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 207cc2d3216SMarc Zyngier { 208cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~(0xffffffffUL << 16); 209cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= (target_addr & (0xffffffffUL << 16)); 210cc2d3216SMarc Zyngier } 211cc2d3216SMarc Zyngier 212cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 213cc2d3216SMarc Zyngier { 214cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~0xffffUL; 215cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= col; 216cc2d3216SMarc Zyngier } 217cc2d3216SMarc Zyngier 218cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 219cc2d3216SMarc Zyngier { 220cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 221cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 222cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 223cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 224cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 225cc2d3216SMarc Zyngier } 226cc2d3216SMarc Zyngier 227cc2d3216SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_cmd_block *cmd, 228cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 229cc2d3216SMarc Zyngier { 230cc2d3216SMarc Zyngier unsigned long itt_addr; 231c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 232cc2d3216SMarc Zyngier 233cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 234cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 235cc2d3216SMarc Zyngier 236cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 237cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 238cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 239cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 240cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 241cc2d3216SMarc Zyngier 242cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 243cc2d3216SMarc Zyngier 244cc2d3216SMarc Zyngier return desc->its_mapd_cmd.dev->collection; 245cc2d3216SMarc Zyngier } 246cc2d3216SMarc Zyngier 247cc2d3216SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_cmd_block *cmd, 248cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 249cc2d3216SMarc Zyngier { 250cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 251cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 252cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 253cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 254cc2d3216SMarc Zyngier 255cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 256cc2d3216SMarc Zyngier 257cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 258cc2d3216SMarc Zyngier } 259cc2d3216SMarc Zyngier 260cc2d3216SMarc Zyngier static struct its_collection *its_build_mapvi_cmd(struct its_cmd_block *cmd, 261cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 262cc2d3216SMarc Zyngier { 263cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPVI); 264cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapvi_cmd.dev->device_id); 265cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_mapvi_cmd.event_id); 266cc2d3216SMarc Zyngier its_encode_phys_id(cmd, desc->its_mapvi_cmd.phys_id); 267cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapvi_cmd.dev->collection->col_id); 268cc2d3216SMarc Zyngier 269cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 270cc2d3216SMarc Zyngier 271cc2d3216SMarc Zyngier return desc->its_mapvi_cmd.dev->collection; 272cc2d3216SMarc Zyngier } 273cc2d3216SMarc Zyngier 274cc2d3216SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_cmd_block *cmd, 275cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 276cc2d3216SMarc Zyngier { 277cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 278cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 279cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.id); 280cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 281cc2d3216SMarc Zyngier 282cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 283cc2d3216SMarc Zyngier 284cc2d3216SMarc Zyngier return desc->its_movi_cmd.dev->collection; 285cc2d3216SMarc Zyngier } 286cc2d3216SMarc Zyngier 287cc2d3216SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_cmd_block *cmd, 288cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 289cc2d3216SMarc Zyngier { 290cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 291cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 292cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 293cc2d3216SMarc Zyngier 294cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 295cc2d3216SMarc Zyngier 296cc2d3216SMarc Zyngier return desc->its_discard_cmd.dev->collection; 297cc2d3216SMarc Zyngier } 298cc2d3216SMarc Zyngier 299cc2d3216SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_cmd_block *cmd, 300cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 301cc2d3216SMarc Zyngier { 302cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 303cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 304cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 305cc2d3216SMarc Zyngier 306cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 307cc2d3216SMarc Zyngier 308cc2d3216SMarc Zyngier return desc->its_inv_cmd.dev->collection; 309cc2d3216SMarc Zyngier } 310cc2d3216SMarc Zyngier 311cc2d3216SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd, 312cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 313cc2d3216SMarc Zyngier { 314cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 315cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 316cc2d3216SMarc Zyngier 317cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 318cc2d3216SMarc Zyngier 319cc2d3216SMarc Zyngier return NULL; 320cc2d3216SMarc Zyngier } 321cc2d3216SMarc Zyngier 322cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 323cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 324cc2d3216SMarc Zyngier { 325cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 326cc2d3216SMarc Zyngier } 327cc2d3216SMarc Zyngier 328cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 329cc2d3216SMarc Zyngier { 330cc2d3216SMarc Zyngier int widx; 331cc2d3216SMarc Zyngier int ridx; 332cc2d3216SMarc Zyngier 333cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 334cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 335cc2d3216SMarc Zyngier 336cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 337cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 338cc2d3216SMarc Zyngier return 1; 339cc2d3216SMarc Zyngier 340cc2d3216SMarc Zyngier return 0; 341cc2d3216SMarc Zyngier } 342cc2d3216SMarc Zyngier 343cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 344cc2d3216SMarc Zyngier { 345cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 346cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 347cc2d3216SMarc Zyngier 348cc2d3216SMarc Zyngier while (its_queue_full(its)) { 349cc2d3216SMarc Zyngier count--; 350cc2d3216SMarc Zyngier if (!count) { 351cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 352cc2d3216SMarc Zyngier return NULL; 353cc2d3216SMarc Zyngier } 354cc2d3216SMarc Zyngier cpu_relax(); 355cc2d3216SMarc Zyngier udelay(1); 356cc2d3216SMarc Zyngier } 357cc2d3216SMarc Zyngier 358cc2d3216SMarc Zyngier cmd = its->cmd_write++; 359cc2d3216SMarc Zyngier 360cc2d3216SMarc Zyngier /* Handle queue wrapping */ 361cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 362cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 363cc2d3216SMarc Zyngier 364cc2d3216SMarc Zyngier return cmd; 365cc2d3216SMarc Zyngier } 366cc2d3216SMarc Zyngier 367cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 368cc2d3216SMarc Zyngier { 369cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 370cc2d3216SMarc Zyngier 371cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 372cc2d3216SMarc Zyngier 373cc2d3216SMarc Zyngier return its->cmd_write; 374cc2d3216SMarc Zyngier } 375cc2d3216SMarc Zyngier 376cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 377cc2d3216SMarc Zyngier { 378cc2d3216SMarc Zyngier /* 379cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 380cc2d3216SMarc Zyngier * the ITS. 381cc2d3216SMarc Zyngier */ 382cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 383cc2d3216SMarc Zyngier __flush_dcache_area(cmd, sizeof(*cmd)); 384cc2d3216SMarc Zyngier else 385cc2d3216SMarc Zyngier dsb(ishst); 386cc2d3216SMarc Zyngier } 387cc2d3216SMarc Zyngier 388cc2d3216SMarc Zyngier static void its_wait_for_range_completion(struct its_node *its, 389cc2d3216SMarc Zyngier struct its_cmd_block *from, 390cc2d3216SMarc Zyngier struct its_cmd_block *to) 391cc2d3216SMarc Zyngier { 392cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 393cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 394cc2d3216SMarc Zyngier 395cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 396cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 397cc2d3216SMarc Zyngier 398cc2d3216SMarc Zyngier while (1) { 399cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 400cc2d3216SMarc Zyngier if (rd_idx >= to_idx || rd_idx < from_idx) 401cc2d3216SMarc Zyngier break; 402cc2d3216SMarc Zyngier 403cc2d3216SMarc Zyngier count--; 404cc2d3216SMarc Zyngier if (!count) { 405cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue timeout\n"); 406cc2d3216SMarc Zyngier return; 407cc2d3216SMarc Zyngier } 408cc2d3216SMarc Zyngier cpu_relax(); 409cc2d3216SMarc Zyngier udelay(1); 410cc2d3216SMarc Zyngier } 411cc2d3216SMarc Zyngier } 412cc2d3216SMarc Zyngier 413cc2d3216SMarc Zyngier static void its_send_single_command(struct its_node *its, 414cc2d3216SMarc Zyngier its_cmd_builder_t builder, 415cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 416cc2d3216SMarc Zyngier { 417cc2d3216SMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; 418cc2d3216SMarc Zyngier struct its_collection *sync_col; 4193e39e8f5SMarc Zyngier unsigned long flags; 420cc2d3216SMarc Zyngier 4213e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 422cc2d3216SMarc Zyngier 423cc2d3216SMarc Zyngier cmd = its_allocate_entry(its); 424cc2d3216SMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ 425cc2d3216SMarc Zyngier pr_err_ratelimited("ITS can't allocate, dropping command\n"); 4263e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 427cc2d3216SMarc Zyngier return; 428cc2d3216SMarc Zyngier } 429cc2d3216SMarc Zyngier sync_col = builder(cmd, desc); 430cc2d3216SMarc Zyngier its_flush_cmd(its, cmd); 431cc2d3216SMarc Zyngier 432cc2d3216SMarc Zyngier if (sync_col) { 433cc2d3216SMarc Zyngier sync_cmd = its_allocate_entry(its); 434cc2d3216SMarc Zyngier if (!sync_cmd) { 435cc2d3216SMarc Zyngier pr_err_ratelimited("ITS can't SYNC, skipping\n"); 436cc2d3216SMarc Zyngier goto post; 437cc2d3216SMarc Zyngier } 438cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 439cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 440cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 441cc2d3216SMarc Zyngier its_flush_cmd(its, sync_cmd); 442cc2d3216SMarc Zyngier } 443cc2d3216SMarc Zyngier 444cc2d3216SMarc Zyngier post: 445cc2d3216SMarc Zyngier next_cmd = its_post_commands(its); 4463e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 447cc2d3216SMarc Zyngier 448cc2d3216SMarc Zyngier its_wait_for_range_completion(its, cmd, next_cmd); 449cc2d3216SMarc Zyngier } 450cc2d3216SMarc Zyngier 451cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 452cc2d3216SMarc Zyngier { 453cc2d3216SMarc Zyngier struct its_cmd_desc desc; 454cc2d3216SMarc Zyngier 455cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 456cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 457cc2d3216SMarc Zyngier 458cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 459cc2d3216SMarc Zyngier } 460cc2d3216SMarc Zyngier 461cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 462cc2d3216SMarc Zyngier { 463cc2d3216SMarc Zyngier struct its_cmd_desc desc; 464cc2d3216SMarc Zyngier 465cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 466cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 467cc2d3216SMarc Zyngier 468cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 469cc2d3216SMarc Zyngier } 470cc2d3216SMarc Zyngier 471cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 472cc2d3216SMarc Zyngier int valid) 473cc2d3216SMarc Zyngier { 474cc2d3216SMarc Zyngier struct its_cmd_desc desc; 475cc2d3216SMarc Zyngier 476cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 477cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 478cc2d3216SMarc Zyngier 479cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 480cc2d3216SMarc Zyngier } 481cc2d3216SMarc Zyngier 482cc2d3216SMarc Zyngier static void its_send_mapvi(struct its_device *dev, u32 irq_id, u32 id) 483cc2d3216SMarc Zyngier { 484cc2d3216SMarc Zyngier struct its_cmd_desc desc; 485cc2d3216SMarc Zyngier 486cc2d3216SMarc Zyngier desc.its_mapvi_cmd.dev = dev; 487cc2d3216SMarc Zyngier desc.its_mapvi_cmd.phys_id = irq_id; 488cc2d3216SMarc Zyngier desc.its_mapvi_cmd.event_id = id; 489cc2d3216SMarc Zyngier 490cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapvi_cmd, &desc); 491cc2d3216SMarc Zyngier } 492cc2d3216SMarc Zyngier 493cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 494cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 495cc2d3216SMarc Zyngier { 496cc2d3216SMarc Zyngier struct its_cmd_desc desc; 497cc2d3216SMarc Zyngier 498cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 499cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 500cc2d3216SMarc Zyngier desc.its_movi_cmd.id = id; 501cc2d3216SMarc Zyngier 502cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 503cc2d3216SMarc Zyngier } 504cc2d3216SMarc Zyngier 505cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 506cc2d3216SMarc Zyngier { 507cc2d3216SMarc Zyngier struct its_cmd_desc desc; 508cc2d3216SMarc Zyngier 509cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 510cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 511cc2d3216SMarc Zyngier 512cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 513cc2d3216SMarc Zyngier } 514cc2d3216SMarc Zyngier 515cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 516cc2d3216SMarc Zyngier { 517cc2d3216SMarc Zyngier struct its_cmd_desc desc; 518cc2d3216SMarc Zyngier 519cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 520cc2d3216SMarc Zyngier 521cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 522cc2d3216SMarc Zyngier } 523c48ed51cSMarc Zyngier 524c48ed51cSMarc Zyngier /* 525c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 526c48ed51cSMarc Zyngier */ 527c48ed51cSMarc Zyngier 528c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 529c48ed51cSMarc Zyngier { 530c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 531c48ed51cSMarc Zyngier return d->hwirq - its_dev->lpi_base; 532c48ed51cSMarc Zyngier } 533c48ed51cSMarc Zyngier 534c48ed51cSMarc Zyngier static void lpi_set_config(struct irq_data *d, bool enable) 535c48ed51cSMarc Zyngier { 536c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 537c48ed51cSMarc Zyngier irq_hw_number_t hwirq = d->hwirq; 538c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 539c48ed51cSMarc Zyngier u8 *cfg = page_address(gic_rdists->prop_page) + hwirq - 8192; 540c48ed51cSMarc Zyngier 541c48ed51cSMarc Zyngier if (enable) 542c48ed51cSMarc Zyngier *cfg |= LPI_PROP_ENABLED; 543c48ed51cSMarc Zyngier else 544c48ed51cSMarc Zyngier *cfg &= ~LPI_PROP_ENABLED; 545c48ed51cSMarc Zyngier 546c48ed51cSMarc Zyngier /* 547c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 548c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 549c48ed51cSMarc Zyngier * Humpf... 550c48ed51cSMarc Zyngier */ 551c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 552c48ed51cSMarc Zyngier __flush_dcache_area(cfg, sizeof(*cfg)); 553c48ed51cSMarc Zyngier else 554c48ed51cSMarc Zyngier dsb(ishst); 555c48ed51cSMarc Zyngier its_send_inv(its_dev, id); 556c48ed51cSMarc Zyngier } 557c48ed51cSMarc Zyngier 558c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 559c48ed51cSMarc Zyngier { 560c48ed51cSMarc Zyngier lpi_set_config(d, false); 561c48ed51cSMarc Zyngier } 562c48ed51cSMarc Zyngier 563c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 564c48ed51cSMarc Zyngier { 565c48ed51cSMarc Zyngier lpi_set_config(d, true); 566c48ed51cSMarc Zyngier } 567c48ed51cSMarc Zyngier 568c48ed51cSMarc Zyngier static void its_eoi_irq(struct irq_data *d) 569c48ed51cSMarc Zyngier { 570c48ed51cSMarc Zyngier gic_write_eoir(d->hwirq); 571c48ed51cSMarc Zyngier } 572c48ed51cSMarc Zyngier 573c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 574c48ed51cSMarc Zyngier bool force) 575c48ed51cSMarc Zyngier { 576c48ed51cSMarc Zyngier unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask); 577c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 578c48ed51cSMarc Zyngier struct its_collection *target_col; 579c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 580c48ed51cSMarc Zyngier 581c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 582c48ed51cSMarc Zyngier return -EINVAL; 583c48ed51cSMarc Zyngier 584c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 585c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 586c48ed51cSMarc Zyngier its_dev->collection = target_col; 587c48ed51cSMarc Zyngier 588c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 589c48ed51cSMarc Zyngier } 590c48ed51cSMarc Zyngier 591b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 592b48ac83dSMarc Zyngier { 593b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 594b48ac83dSMarc Zyngier struct its_node *its; 595b48ac83dSMarc Zyngier u64 addr; 596b48ac83dSMarc Zyngier 597b48ac83dSMarc Zyngier its = its_dev->its; 598b48ac83dSMarc Zyngier addr = its->phys_base + GITS_TRANSLATER; 599b48ac83dSMarc Zyngier 600b48ac83dSMarc Zyngier msg->address_lo = addr & ((1UL << 32) - 1); 601b48ac83dSMarc Zyngier msg->address_hi = addr >> 32; 602b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 603b48ac83dSMarc Zyngier } 604b48ac83dSMarc Zyngier 605c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 606c48ed51cSMarc Zyngier .name = "ITS", 607c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 608c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 609c48ed51cSMarc Zyngier .irq_eoi = its_eoi_irq, 610c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 611b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 612b48ac83dSMarc Zyngier }; 613b48ac83dSMarc Zyngier 614b48ac83dSMarc Zyngier static void its_mask_msi_irq(struct irq_data *d) 615b48ac83dSMarc Zyngier { 616b48ac83dSMarc Zyngier pci_msi_mask_irq(d); 617b48ac83dSMarc Zyngier irq_chip_mask_parent(d); 618b48ac83dSMarc Zyngier } 619b48ac83dSMarc Zyngier 620b48ac83dSMarc Zyngier static void its_unmask_msi_irq(struct irq_data *d) 621b48ac83dSMarc Zyngier { 622b48ac83dSMarc Zyngier pci_msi_unmask_irq(d); 623b48ac83dSMarc Zyngier irq_chip_unmask_parent(d); 624b48ac83dSMarc Zyngier } 625b48ac83dSMarc Zyngier 626b48ac83dSMarc Zyngier static struct irq_chip its_msi_irq_chip = { 627b48ac83dSMarc Zyngier .name = "ITS-MSI", 628b48ac83dSMarc Zyngier .irq_unmask = its_unmask_msi_irq, 629b48ac83dSMarc Zyngier .irq_mask = its_mask_msi_irq, 630b48ac83dSMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 631b48ac83dSMarc Zyngier .irq_write_msi_msg = pci_msi_domain_write_msg, 632c48ed51cSMarc Zyngier }; 633bf9529f8SMarc Zyngier 634bf9529f8SMarc Zyngier /* 635bf9529f8SMarc Zyngier * How we allocate LPIs: 636bf9529f8SMarc Zyngier * 637bf9529f8SMarc Zyngier * The GIC has id_bits bits for interrupt identifiers. From there, we 638bf9529f8SMarc Zyngier * must subtract 8192 which are reserved for SGIs/PPIs/SPIs. Then, as 639bf9529f8SMarc Zyngier * we allocate LPIs by chunks of 32, we can shift the whole thing by 5 640bf9529f8SMarc Zyngier * bits to the right. 641bf9529f8SMarc Zyngier * 642bf9529f8SMarc Zyngier * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations. 643bf9529f8SMarc Zyngier */ 644bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK_SHIFT 5 645bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK (1 << IRQS_PER_CHUNK_SHIFT) 646bf9529f8SMarc Zyngier 647bf9529f8SMarc Zyngier static unsigned long *lpi_bitmap; 648bf9529f8SMarc Zyngier static u32 lpi_chunks; 649bf9529f8SMarc Zyngier static DEFINE_SPINLOCK(lpi_lock); 650bf9529f8SMarc Zyngier 651bf9529f8SMarc Zyngier static int its_lpi_to_chunk(int lpi) 652bf9529f8SMarc Zyngier { 653bf9529f8SMarc Zyngier return (lpi - 8192) >> IRQS_PER_CHUNK_SHIFT; 654bf9529f8SMarc Zyngier } 655bf9529f8SMarc Zyngier 656bf9529f8SMarc Zyngier static int its_chunk_to_lpi(int chunk) 657bf9529f8SMarc Zyngier { 658bf9529f8SMarc Zyngier return (chunk << IRQS_PER_CHUNK_SHIFT) + 8192; 659bf9529f8SMarc Zyngier } 660bf9529f8SMarc Zyngier 661bf9529f8SMarc Zyngier static int its_lpi_init(u32 id_bits) 662bf9529f8SMarc Zyngier { 663bf9529f8SMarc Zyngier lpi_chunks = its_lpi_to_chunk(1UL << id_bits); 664bf9529f8SMarc Zyngier 665bf9529f8SMarc Zyngier lpi_bitmap = kzalloc(BITS_TO_LONGS(lpi_chunks) * sizeof(long), 666bf9529f8SMarc Zyngier GFP_KERNEL); 667bf9529f8SMarc Zyngier if (!lpi_bitmap) { 668bf9529f8SMarc Zyngier lpi_chunks = 0; 669bf9529f8SMarc Zyngier return -ENOMEM; 670bf9529f8SMarc Zyngier } 671bf9529f8SMarc Zyngier 672bf9529f8SMarc Zyngier pr_info("ITS: Allocated %d chunks for LPIs\n", (int)lpi_chunks); 673bf9529f8SMarc Zyngier return 0; 674bf9529f8SMarc Zyngier } 675bf9529f8SMarc Zyngier 676bf9529f8SMarc Zyngier static unsigned long *its_lpi_alloc_chunks(int nr_irqs, int *base, int *nr_ids) 677bf9529f8SMarc Zyngier { 678bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 679bf9529f8SMarc Zyngier int chunk_id; 680bf9529f8SMarc Zyngier int nr_chunks; 681bf9529f8SMarc Zyngier int i; 682bf9529f8SMarc Zyngier 683bf9529f8SMarc Zyngier nr_chunks = DIV_ROUND_UP(nr_irqs, IRQS_PER_CHUNK); 684bf9529f8SMarc Zyngier 685bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 686bf9529f8SMarc Zyngier 687bf9529f8SMarc Zyngier do { 688bf9529f8SMarc Zyngier chunk_id = bitmap_find_next_zero_area(lpi_bitmap, lpi_chunks, 689bf9529f8SMarc Zyngier 0, nr_chunks, 0); 690bf9529f8SMarc Zyngier if (chunk_id < lpi_chunks) 691bf9529f8SMarc Zyngier break; 692bf9529f8SMarc Zyngier 693bf9529f8SMarc Zyngier nr_chunks--; 694bf9529f8SMarc Zyngier } while (nr_chunks > 0); 695bf9529f8SMarc Zyngier 696bf9529f8SMarc Zyngier if (!nr_chunks) 697bf9529f8SMarc Zyngier goto out; 698bf9529f8SMarc Zyngier 699bf9529f8SMarc Zyngier bitmap = kzalloc(BITS_TO_LONGS(nr_chunks * IRQS_PER_CHUNK) * sizeof (long), 700bf9529f8SMarc Zyngier GFP_ATOMIC); 701bf9529f8SMarc Zyngier if (!bitmap) 702bf9529f8SMarc Zyngier goto out; 703bf9529f8SMarc Zyngier 704bf9529f8SMarc Zyngier for (i = 0; i < nr_chunks; i++) 705bf9529f8SMarc Zyngier set_bit(chunk_id + i, lpi_bitmap); 706bf9529f8SMarc Zyngier 707bf9529f8SMarc Zyngier *base = its_chunk_to_lpi(chunk_id); 708bf9529f8SMarc Zyngier *nr_ids = nr_chunks * IRQS_PER_CHUNK; 709bf9529f8SMarc Zyngier 710bf9529f8SMarc Zyngier out: 711bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 712bf9529f8SMarc Zyngier 713bf9529f8SMarc Zyngier return bitmap; 714bf9529f8SMarc Zyngier } 715bf9529f8SMarc Zyngier 716bf9529f8SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, int base, int nr_ids) 717bf9529f8SMarc Zyngier { 718bf9529f8SMarc Zyngier int lpi; 719bf9529f8SMarc Zyngier 720bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 721bf9529f8SMarc Zyngier 722bf9529f8SMarc Zyngier for (lpi = base; lpi < (base + nr_ids); lpi += IRQS_PER_CHUNK) { 723bf9529f8SMarc Zyngier int chunk = its_lpi_to_chunk(lpi); 724bf9529f8SMarc Zyngier BUG_ON(chunk > lpi_chunks); 725bf9529f8SMarc Zyngier if (test_bit(chunk, lpi_bitmap)) { 726bf9529f8SMarc Zyngier clear_bit(chunk, lpi_bitmap); 727bf9529f8SMarc Zyngier } else { 728bf9529f8SMarc Zyngier pr_err("Bad LPI chunk %d\n", chunk); 729bf9529f8SMarc Zyngier } 730bf9529f8SMarc Zyngier } 731bf9529f8SMarc Zyngier 732bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 733bf9529f8SMarc Zyngier 734bf9529f8SMarc Zyngier kfree(bitmap); 735bf9529f8SMarc Zyngier } 7361ac19ca6SMarc Zyngier 7371ac19ca6SMarc Zyngier /* 7381ac19ca6SMarc Zyngier * We allocate 64kB for PROPBASE. That gives us at most 64K LPIs to 7391ac19ca6SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 7401ac19ca6SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 7411ac19ca6SMarc Zyngier */ 7421ac19ca6SMarc Zyngier #define LPI_PROPBASE_SZ SZ_64K 7431ac19ca6SMarc Zyngier #define LPI_PENDBASE_SZ (LPI_PROPBASE_SZ / 8 + SZ_1K) 7441ac19ca6SMarc Zyngier 7451ac19ca6SMarc Zyngier /* 7461ac19ca6SMarc Zyngier * This is how many bits of ID we need, including the useless ones. 7471ac19ca6SMarc Zyngier */ 7481ac19ca6SMarc Zyngier #define LPI_NRBITS ilog2(LPI_PROPBASE_SZ + SZ_8K) 7491ac19ca6SMarc Zyngier 7501ac19ca6SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 7511ac19ca6SMarc Zyngier 7521ac19ca6SMarc Zyngier static int __init its_alloc_lpi_tables(void) 7531ac19ca6SMarc Zyngier { 7541ac19ca6SMarc Zyngier phys_addr_t paddr; 7551ac19ca6SMarc Zyngier 7561ac19ca6SMarc Zyngier gic_rdists->prop_page = alloc_pages(GFP_NOWAIT, 7571ac19ca6SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 7581ac19ca6SMarc Zyngier if (!gic_rdists->prop_page) { 7591ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 7601ac19ca6SMarc Zyngier return -ENOMEM; 7611ac19ca6SMarc Zyngier } 7621ac19ca6SMarc Zyngier 7631ac19ca6SMarc Zyngier paddr = page_to_phys(gic_rdists->prop_page); 7641ac19ca6SMarc Zyngier pr_info("GIC: using LPI property table @%pa\n", &paddr); 7651ac19ca6SMarc Zyngier 7661ac19ca6SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 7671ac19ca6SMarc Zyngier memset(page_address(gic_rdists->prop_page), 7681ac19ca6SMarc Zyngier LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, 7691ac19ca6SMarc Zyngier LPI_PROPBASE_SZ); 7701ac19ca6SMarc Zyngier 7711ac19ca6SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 7721ac19ca6SMarc Zyngier __flush_dcache_area(page_address(gic_rdists->prop_page), LPI_PROPBASE_SZ); 7731ac19ca6SMarc Zyngier 7741ac19ca6SMarc Zyngier return 0; 7751ac19ca6SMarc Zyngier } 7761ac19ca6SMarc Zyngier 7771ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 7781ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 7791ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 7801ac19ca6SMarc Zyngier [GITS_BASER_TYPE_CPU] = "Physical CPUs", 7811ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 7821ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 7831ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 7841ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 7851ac19ca6SMarc Zyngier }; 7861ac19ca6SMarc Zyngier 7871ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 7881ac19ca6SMarc Zyngier { 7891ac19ca6SMarc Zyngier int i; 7901ac19ca6SMarc Zyngier 7911ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 7921ac19ca6SMarc Zyngier if (its->tables[i]) { 7931ac19ca6SMarc Zyngier free_page((unsigned long)its->tables[i]); 7941ac19ca6SMarc Zyngier its->tables[i] = NULL; 7951ac19ca6SMarc Zyngier } 7961ac19ca6SMarc Zyngier } 7971ac19ca6SMarc Zyngier } 7981ac19ca6SMarc Zyngier 7991ac19ca6SMarc Zyngier static int its_alloc_tables(struct its_node *its) 8001ac19ca6SMarc Zyngier { 8011ac19ca6SMarc Zyngier int err; 8021ac19ca6SMarc Zyngier int i; 803790b57aeSYun Wu int psz = SZ_64K; 8041ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 8051ac19ca6SMarc Zyngier 8061ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 8071ac19ca6SMarc Zyngier u64 val = readq_relaxed(its->base + GITS_BASER + i * 8); 8081ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 8091ac19ca6SMarc Zyngier u64 entry_size = GITS_BASER_ENTRY_SIZE(val); 810790b57aeSYun Wu int order = get_order(psz); 811f54b97edSMarc Zyngier int alloc_size; 8121ac19ca6SMarc Zyngier u64 tmp; 8131ac19ca6SMarc Zyngier void *base; 8141ac19ca6SMarc Zyngier 8151ac19ca6SMarc Zyngier if (type == GITS_BASER_TYPE_NONE) 8161ac19ca6SMarc Zyngier continue; 8171ac19ca6SMarc Zyngier 818f54b97edSMarc Zyngier /* 819f54b97edSMarc Zyngier * Allocate as many entries as required to fit the 820f54b97edSMarc Zyngier * range of device IDs that the ITS can grok... The ID 821f54b97edSMarc Zyngier * space being incredibly sparse, this results in a 822f54b97edSMarc Zyngier * massive waste of memory. 823f54b97edSMarc Zyngier * 824f54b97edSMarc Zyngier * For other tables, only allocate a single page. 825f54b97edSMarc Zyngier */ 826f54b97edSMarc Zyngier if (type == GITS_BASER_TYPE_DEVICE) { 827f54b97edSMarc Zyngier u64 typer = readq_relaxed(its->base + GITS_TYPER); 828f54b97edSMarc Zyngier u32 ids = GITS_TYPER_DEVBITS(typer); 829f54b97edSMarc Zyngier 830f54b97edSMarc Zyngier order = get_order((1UL << ids) * entry_size); 8311d27704aSYun Wu if (order >= MAX_ORDER) { 8321d27704aSYun Wu order = MAX_ORDER - 1; 8331d27704aSYun Wu pr_warn("%s: Device Table too large, reduce its page order to %u\n", 8341d27704aSYun Wu its->msi_chip.of_node->full_name, order); 8351d27704aSYun Wu } 836f54b97edSMarc Zyngier } 837f54b97edSMarc Zyngier 838f54b97edSMarc Zyngier alloc_size = (1 << order) * PAGE_SIZE; 839f54b97edSMarc Zyngier base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 8401ac19ca6SMarc Zyngier if (!base) { 8411ac19ca6SMarc Zyngier err = -ENOMEM; 8421ac19ca6SMarc Zyngier goto out_free; 8431ac19ca6SMarc Zyngier } 8441ac19ca6SMarc Zyngier 8451ac19ca6SMarc Zyngier its->tables[i] = base; 8461ac19ca6SMarc Zyngier 8471ac19ca6SMarc Zyngier retry_baser: 8481ac19ca6SMarc Zyngier val = (virt_to_phys(base) | 8491ac19ca6SMarc Zyngier (type << GITS_BASER_TYPE_SHIFT) | 8501ac19ca6SMarc Zyngier ((entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 8511ac19ca6SMarc Zyngier GITS_BASER_WaWb | 8521ac19ca6SMarc Zyngier shr | 8531ac19ca6SMarc Zyngier GITS_BASER_VALID); 8541ac19ca6SMarc Zyngier 8551ac19ca6SMarc Zyngier switch (psz) { 8561ac19ca6SMarc Zyngier case SZ_4K: 8571ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_4K; 8581ac19ca6SMarc Zyngier break; 8591ac19ca6SMarc Zyngier case SZ_16K: 8601ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_16K; 8611ac19ca6SMarc Zyngier break; 8621ac19ca6SMarc Zyngier case SZ_64K: 8631ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_64K; 8641ac19ca6SMarc Zyngier break; 8651ac19ca6SMarc Zyngier } 8661ac19ca6SMarc Zyngier 867f54b97edSMarc Zyngier val |= (alloc_size / psz) - 1; 8681ac19ca6SMarc Zyngier 8691ac19ca6SMarc Zyngier writeq_relaxed(val, its->base + GITS_BASER + i * 8); 8701ac19ca6SMarc Zyngier tmp = readq_relaxed(its->base + GITS_BASER + i * 8); 8711ac19ca6SMarc Zyngier 8721ac19ca6SMarc Zyngier if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 8731ac19ca6SMarc Zyngier /* 8741ac19ca6SMarc Zyngier * Shareability didn't stick. Just use 8751ac19ca6SMarc Zyngier * whatever the read reported, which is likely 8761ac19ca6SMarc Zyngier * to be the only thing this redistributor 8771ac19ca6SMarc Zyngier * supports. 8781ac19ca6SMarc Zyngier */ 8791ac19ca6SMarc Zyngier shr = tmp & GITS_BASER_SHAREABILITY_MASK; 8801ac19ca6SMarc Zyngier goto retry_baser; 8811ac19ca6SMarc Zyngier } 8821ac19ca6SMarc Zyngier 8831ac19ca6SMarc Zyngier if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 8841ac19ca6SMarc Zyngier /* 8851ac19ca6SMarc Zyngier * Page size didn't stick. Let's try a smaller 8861ac19ca6SMarc Zyngier * size and retry. If we reach 4K, then 8871ac19ca6SMarc Zyngier * something is horribly wrong... 8881ac19ca6SMarc Zyngier */ 8891ac19ca6SMarc Zyngier switch (psz) { 8901ac19ca6SMarc Zyngier case SZ_16K: 8911ac19ca6SMarc Zyngier psz = SZ_4K; 8921ac19ca6SMarc Zyngier goto retry_baser; 8931ac19ca6SMarc Zyngier case SZ_64K: 8941ac19ca6SMarc Zyngier psz = SZ_16K; 8951ac19ca6SMarc Zyngier goto retry_baser; 8961ac19ca6SMarc Zyngier } 8971ac19ca6SMarc Zyngier } 8981ac19ca6SMarc Zyngier 8991ac19ca6SMarc Zyngier if (val != tmp) { 9001ac19ca6SMarc Zyngier pr_err("ITS: %s: GITS_BASER%d doesn't stick: %lx %lx\n", 9011ac19ca6SMarc Zyngier its->msi_chip.of_node->full_name, i, 9021ac19ca6SMarc Zyngier (unsigned long) val, (unsigned long) tmp); 9031ac19ca6SMarc Zyngier err = -ENXIO; 9041ac19ca6SMarc Zyngier goto out_free; 9051ac19ca6SMarc Zyngier } 9061ac19ca6SMarc Zyngier 9071ac19ca6SMarc Zyngier pr_info("ITS: allocated %d %s @%lx (psz %dK, shr %d)\n", 908f54b97edSMarc Zyngier (int)(alloc_size / entry_size), 9091ac19ca6SMarc Zyngier its_base_type_string[type], 9101ac19ca6SMarc Zyngier (unsigned long)virt_to_phys(base), 9111ac19ca6SMarc Zyngier psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 9121ac19ca6SMarc Zyngier } 9131ac19ca6SMarc Zyngier 9141ac19ca6SMarc Zyngier return 0; 9151ac19ca6SMarc Zyngier 9161ac19ca6SMarc Zyngier out_free: 9171ac19ca6SMarc Zyngier its_free_tables(its); 9181ac19ca6SMarc Zyngier 9191ac19ca6SMarc Zyngier return err; 9201ac19ca6SMarc Zyngier } 9211ac19ca6SMarc Zyngier 9221ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 9231ac19ca6SMarc Zyngier { 9241ac19ca6SMarc Zyngier its->collections = kzalloc(nr_cpu_ids * sizeof(*its->collections), 9251ac19ca6SMarc Zyngier GFP_KERNEL); 9261ac19ca6SMarc Zyngier if (!its->collections) 9271ac19ca6SMarc Zyngier return -ENOMEM; 9281ac19ca6SMarc Zyngier 9291ac19ca6SMarc Zyngier return 0; 9301ac19ca6SMarc Zyngier } 9311ac19ca6SMarc Zyngier 9321ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 9331ac19ca6SMarc Zyngier { 9341ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 9351ac19ca6SMarc Zyngier struct page *pend_page; 9361ac19ca6SMarc Zyngier u64 val, tmp; 9371ac19ca6SMarc Zyngier 9381ac19ca6SMarc Zyngier /* If we didn't allocate the pending table yet, do it now */ 9391ac19ca6SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 9401ac19ca6SMarc Zyngier if (!pend_page) { 9411ac19ca6SMarc Zyngier phys_addr_t paddr; 9421ac19ca6SMarc Zyngier /* 9431ac19ca6SMarc Zyngier * The pending pages have to be at least 64kB aligned, 9441ac19ca6SMarc Zyngier * hence the 'max(LPI_PENDBASE_SZ, SZ_64K)' below. 9451ac19ca6SMarc Zyngier */ 9461ac19ca6SMarc Zyngier pend_page = alloc_pages(GFP_NOWAIT | __GFP_ZERO, 9471ac19ca6SMarc Zyngier get_order(max(LPI_PENDBASE_SZ, SZ_64K))); 9481ac19ca6SMarc Zyngier if (!pend_page) { 9491ac19ca6SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", 9501ac19ca6SMarc Zyngier smp_processor_id()); 9511ac19ca6SMarc Zyngier return; 9521ac19ca6SMarc Zyngier } 9531ac19ca6SMarc Zyngier 9541ac19ca6SMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 9551ac19ca6SMarc Zyngier __flush_dcache_area(page_address(pend_page), LPI_PENDBASE_SZ); 9561ac19ca6SMarc Zyngier 9571ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 9581ac19ca6SMarc Zyngier pr_info("CPU%d: using LPI pending table @%pa\n", 9591ac19ca6SMarc Zyngier smp_processor_id(), &paddr); 9601ac19ca6SMarc Zyngier gic_data_rdist()->pend_page = pend_page; 9611ac19ca6SMarc Zyngier } 9621ac19ca6SMarc Zyngier 9631ac19ca6SMarc Zyngier /* Disable LPIs */ 9641ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 9651ac19ca6SMarc Zyngier val &= ~GICR_CTLR_ENABLE_LPIS; 9661ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 9671ac19ca6SMarc Zyngier 9681ac19ca6SMarc Zyngier /* 9691ac19ca6SMarc Zyngier * Make sure any change to the table is observable by the GIC. 9701ac19ca6SMarc Zyngier */ 9711ac19ca6SMarc Zyngier dsb(sy); 9721ac19ca6SMarc Zyngier 9731ac19ca6SMarc Zyngier /* set PROPBASE */ 9741ac19ca6SMarc Zyngier val = (page_to_phys(gic_rdists->prop_page) | 9751ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 9761ac19ca6SMarc Zyngier GICR_PROPBASER_WaWb | 9771ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 9781ac19ca6SMarc Zyngier 9791ac19ca6SMarc Zyngier writeq_relaxed(val, rbase + GICR_PROPBASER); 9801ac19ca6SMarc Zyngier tmp = readq_relaxed(rbase + GICR_PROPBASER); 9811ac19ca6SMarc Zyngier 9821ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 9831ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 9841ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 9851ac19ca6SMarc Zyngier } 9861ac19ca6SMarc Zyngier 9871ac19ca6SMarc Zyngier /* set PENDBASE */ 9881ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 9891ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 9901ac19ca6SMarc Zyngier GICR_PROPBASER_WaWb); 9911ac19ca6SMarc Zyngier 9921ac19ca6SMarc Zyngier writeq_relaxed(val, rbase + GICR_PENDBASER); 9931ac19ca6SMarc Zyngier 9941ac19ca6SMarc Zyngier /* Enable LPIs */ 9951ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 9961ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 9971ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 9981ac19ca6SMarc Zyngier 9991ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 10001ac19ca6SMarc Zyngier dsb(sy); 10011ac19ca6SMarc Zyngier } 10021ac19ca6SMarc Zyngier 10031ac19ca6SMarc Zyngier static void its_cpu_init_collection(void) 10041ac19ca6SMarc Zyngier { 10051ac19ca6SMarc Zyngier struct its_node *its; 10061ac19ca6SMarc Zyngier int cpu; 10071ac19ca6SMarc Zyngier 10081ac19ca6SMarc Zyngier spin_lock(&its_lock); 10091ac19ca6SMarc Zyngier cpu = smp_processor_id(); 10101ac19ca6SMarc Zyngier 10111ac19ca6SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 10121ac19ca6SMarc Zyngier u64 target; 10131ac19ca6SMarc Zyngier 10141ac19ca6SMarc Zyngier /* 10151ac19ca6SMarc Zyngier * We now have to bind each collection to its target 10161ac19ca6SMarc Zyngier * redistributor. 10171ac19ca6SMarc Zyngier */ 10181ac19ca6SMarc Zyngier if (readq_relaxed(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 10191ac19ca6SMarc Zyngier /* 10201ac19ca6SMarc Zyngier * This ITS wants the physical address of the 10211ac19ca6SMarc Zyngier * redistributor. 10221ac19ca6SMarc Zyngier */ 10231ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 10241ac19ca6SMarc Zyngier } else { 10251ac19ca6SMarc Zyngier /* 10261ac19ca6SMarc Zyngier * This ITS wants a linear CPU number. 10271ac19ca6SMarc Zyngier */ 10281ac19ca6SMarc Zyngier target = readq_relaxed(gic_data_rdist_rd_base() + GICR_TYPER); 10291ac19ca6SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target); 10301ac19ca6SMarc Zyngier } 10311ac19ca6SMarc Zyngier 10321ac19ca6SMarc Zyngier /* Perform collection mapping */ 10331ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 10341ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 10351ac19ca6SMarc Zyngier 10361ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 10371ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 10381ac19ca6SMarc Zyngier } 10391ac19ca6SMarc Zyngier 10401ac19ca6SMarc Zyngier spin_unlock(&its_lock); 10411ac19ca6SMarc Zyngier } 104284a6a2e7SMarc Zyngier 104384a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 104484a6a2e7SMarc Zyngier { 104584a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 10463e39e8f5SMarc Zyngier unsigned long flags; 104784a6a2e7SMarc Zyngier 10483e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 104984a6a2e7SMarc Zyngier 105084a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 105184a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 105284a6a2e7SMarc Zyngier its_dev = tmp; 105384a6a2e7SMarc Zyngier break; 105484a6a2e7SMarc Zyngier } 105584a6a2e7SMarc Zyngier } 105684a6a2e7SMarc Zyngier 10573e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 105884a6a2e7SMarc Zyngier 105984a6a2e7SMarc Zyngier return its_dev; 106084a6a2e7SMarc Zyngier } 106184a6a2e7SMarc Zyngier 106284a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 106384a6a2e7SMarc Zyngier int nvecs) 106484a6a2e7SMarc Zyngier { 106584a6a2e7SMarc Zyngier struct its_device *dev; 106684a6a2e7SMarc Zyngier unsigned long *lpi_map; 10673e39e8f5SMarc Zyngier unsigned long flags; 106884a6a2e7SMarc Zyngier void *itt; 106984a6a2e7SMarc Zyngier int lpi_base; 107084a6a2e7SMarc Zyngier int nr_lpis; 1071c8481267SMarc Zyngier int nr_ites; 107284a6a2e7SMarc Zyngier int cpu; 107384a6a2e7SMarc Zyngier int sz; 107484a6a2e7SMarc Zyngier 107584a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1076c8481267SMarc Zyngier /* 1077c8481267SMarc Zyngier * At least one bit of EventID is being used, hence a minimum 1078c8481267SMarc Zyngier * of two entries. No, the architecture doesn't let you 1079c8481267SMarc Zyngier * express an ITT with a single entry. 1080c8481267SMarc Zyngier */ 108196555c47SWill Deacon nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 1082c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 108384a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 10846c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 108584a6a2e7SMarc Zyngier lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 108684a6a2e7SMarc Zyngier 108784a6a2e7SMarc Zyngier if (!dev || !itt || !lpi_map) { 108884a6a2e7SMarc Zyngier kfree(dev); 108984a6a2e7SMarc Zyngier kfree(itt); 109084a6a2e7SMarc Zyngier kfree(lpi_map); 109184a6a2e7SMarc Zyngier return NULL; 109284a6a2e7SMarc Zyngier } 109384a6a2e7SMarc Zyngier 109484a6a2e7SMarc Zyngier dev->its = its; 109584a6a2e7SMarc Zyngier dev->itt = itt; 1096c8481267SMarc Zyngier dev->nr_ites = nr_ites; 109784a6a2e7SMarc Zyngier dev->lpi_map = lpi_map; 109884a6a2e7SMarc Zyngier dev->lpi_base = lpi_base; 109984a6a2e7SMarc Zyngier dev->nr_lpis = nr_lpis; 110084a6a2e7SMarc Zyngier dev->device_id = dev_id; 110184a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 110284a6a2e7SMarc Zyngier 11033e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 110484a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 11053e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 110684a6a2e7SMarc Zyngier 110784a6a2e7SMarc Zyngier /* Bind the device to the first possible CPU */ 110884a6a2e7SMarc Zyngier cpu = cpumask_first(cpu_online_mask); 110984a6a2e7SMarc Zyngier dev->collection = &its->collections[cpu]; 111084a6a2e7SMarc Zyngier 111184a6a2e7SMarc Zyngier /* Map device to its ITT */ 111284a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 111384a6a2e7SMarc Zyngier 111484a6a2e7SMarc Zyngier return dev; 111584a6a2e7SMarc Zyngier } 111684a6a2e7SMarc Zyngier 111784a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 111884a6a2e7SMarc Zyngier { 11193e39e8f5SMarc Zyngier unsigned long flags; 11203e39e8f5SMarc Zyngier 11213e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 112284a6a2e7SMarc Zyngier list_del(&its_dev->entry); 11233e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 112484a6a2e7SMarc Zyngier kfree(its_dev->itt); 112584a6a2e7SMarc Zyngier kfree(its_dev); 112684a6a2e7SMarc Zyngier } 1127b48ac83dSMarc Zyngier 1128b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 1129b48ac83dSMarc Zyngier { 1130b48ac83dSMarc Zyngier int idx; 1131b48ac83dSMarc Zyngier 1132b48ac83dSMarc Zyngier idx = find_first_zero_bit(dev->lpi_map, dev->nr_lpis); 1133b48ac83dSMarc Zyngier if (idx == dev->nr_lpis) 1134b48ac83dSMarc Zyngier return -ENOSPC; 1135b48ac83dSMarc Zyngier 1136b48ac83dSMarc Zyngier *hwirq = dev->lpi_base + idx; 1137b48ac83dSMarc Zyngier set_bit(idx, dev->lpi_map); 1138b48ac83dSMarc Zyngier 1139b48ac83dSMarc Zyngier return 0; 1140b48ac83dSMarc Zyngier } 1141b48ac83dSMarc Zyngier 1142e8137f4fSMarc Zyngier struct its_pci_alias { 1143e8137f4fSMarc Zyngier struct pci_dev *pdev; 1144e8137f4fSMarc Zyngier u32 dev_id; 1145e8137f4fSMarc Zyngier u32 count; 1146e8137f4fSMarc Zyngier }; 1147e8137f4fSMarc Zyngier 1148e8137f4fSMarc Zyngier static int its_pci_msi_vec_count(struct pci_dev *pdev) 1149e8137f4fSMarc Zyngier { 1150e8137f4fSMarc Zyngier int msi, msix; 1151e8137f4fSMarc Zyngier 1152e8137f4fSMarc Zyngier msi = max(pci_msi_vec_count(pdev), 0); 1153e8137f4fSMarc Zyngier msix = max(pci_msix_vec_count(pdev), 0); 1154e8137f4fSMarc Zyngier 1155e8137f4fSMarc Zyngier return max(msi, msix); 1156e8137f4fSMarc Zyngier } 1157e8137f4fSMarc Zyngier 1158e8137f4fSMarc Zyngier static int its_get_pci_alias(struct pci_dev *pdev, u16 alias, void *data) 1159e8137f4fSMarc Zyngier { 1160e8137f4fSMarc Zyngier struct its_pci_alias *dev_alias = data; 1161e8137f4fSMarc Zyngier 1162e8137f4fSMarc Zyngier dev_alias->dev_id = alias; 1163e8137f4fSMarc Zyngier if (pdev != dev_alias->pdev) 1164e8137f4fSMarc Zyngier dev_alias->count += its_pci_msi_vec_count(dev_alias->pdev); 1165e8137f4fSMarc Zyngier 1166e8137f4fSMarc Zyngier return 0; 1167e8137f4fSMarc Zyngier } 1168e8137f4fSMarc Zyngier 1169b48ac83dSMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 1170b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 1171b48ac83dSMarc Zyngier { 1172b48ac83dSMarc Zyngier struct pci_dev *pdev; 1173b48ac83dSMarc Zyngier struct its_node *its; 1174b48ac83dSMarc Zyngier struct its_device *its_dev; 1175e8137f4fSMarc Zyngier struct its_pci_alias dev_alias; 1176b48ac83dSMarc Zyngier 1177b48ac83dSMarc Zyngier if (!dev_is_pci(dev)) 1178b48ac83dSMarc Zyngier return -EINVAL; 1179b48ac83dSMarc Zyngier 1180b48ac83dSMarc Zyngier pdev = to_pci_dev(dev); 1181e8137f4fSMarc Zyngier dev_alias.pdev = pdev; 1182e8137f4fSMarc Zyngier dev_alias.count = nvec; 1183e8137f4fSMarc Zyngier 1184e8137f4fSMarc Zyngier pci_for_each_dma_alias(pdev, its_get_pci_alias, &dev_alias); 1185b48ac83dSMarc Zyngier its = domain->parent->host_data; 1186b48ac83dSMarc Zyngier 1187e8137f4fSMarc Zyngier its_dev = its_find_device(its, dev_alias.dev_id); 1188e8137f4fSMarc Zyngier if (its_dev) { 1189e8137f4fSMarc Zyngier /* 1190e8137f4fSMarc Zyngier * We already have seen this ID, probably through 1191e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 1192e8137f4fSMarc Zyngier * create the device. 1193e8137f4fSMarc Zyngier */ 1194e8137f4fSMarc Zyngier dev_dbg(dev, "Reusing ITT for devID %x\n", dev_alias.dev_id); 1195e8137f4fSMarc Zyngier goto out; 1196e8137f4fSMarc Zyngier } 1197b48ac83dSMarc Zyngier 1198e8137f4fSMarc Zyngier its_dev = its_create_device(its, dev_alias.dev_id, dev_alias.count); 1199b48ac83dSMarc Zyngier if (!its_dev) 1200b48ac83dSMarc Zyngier return -ENOMEM; 1201b48ac83dSMarc Zyngier 1202e8137f4fSMarc Zyngier dev_dbg(&pdev->dev, "ITT %d entries, %d bits\n", 1203e8137f4fSMarc Zyngier dev_alias.count, ilog2(dev_alias.count)); 1204e8137f4fSMarc Zyngier out: 1205b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 1206b48ac83dSMarc Zyngier info->scratchpad[1].ptr = dev; 1207b48ac83dSMarc Zyngier return 0; 1208b48ac83dSMarc Zyngier } 1209b48ac83dSMarc Zyngier 1210b48ac83dSMarc Zyngier static struct msi_domain_ops its_pci_msi_ops = { 1211b48ac83dSMarc Zyngier .msi_prepare = its_msi_prepare, 1212b48ac83dSMarc Zyngier }; 1213b48ac83dSMarc Zyngier 1214b48ac83dSMarc Zyngier static struct msi_domain_info its_pci_msi_domain_info = { 1215b48ac83dSMarc Zyngier .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | 1216b48ac83dSMarc Zyngier MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), 1217b48ac83dSMarc Zyngier .ops = &its_pci_msi_ops, 1218b48ac83dSMarc Zyngier .chip = &its_msi_irq_chip, 1219b48ac83dSMarc Zyngier }; 1220b48ac83dSMarc Zyngier 1221b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 1222b48ac83dSMarc Zyngier unsigned int virq, 1223b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 1224b48ac83dSMarc Zyngier { 1225b48ac83dSMarc Zyngier struct of_phandle_args args; 1226b48ac83dSMarc Zyngier 1227b48ac83dSMarc Zyngier args.np = domain->parent->of_node; 1228b48ac83dSMarc Zyngier args.args_count = 3; 1229b48ac83dSMarc Zyngier args.args[0] = GIC_IRQ_TYPE_LPI; 1230b48ac83dSMarc Zyngier args.args[1] = hwirq; 1231b48ac83dSMarc Zyngier args.args[2] = IRQ_TYPE_EDGE_RISING; 1232b48ac83dSMarc Zyngier 1233b48ac83dSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &args); 1234b48ac83dSMarc Zyngier } 1235b48ac83dSMarc Zyngier 1236b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 1237b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 1238b48ac83dSMarc Zyngier { 1239b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 1240b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 1241b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 1242b48ac83dSMarc Zyngier int err; 1243b48ac83dSMarc Zyngier int i; 1244b48ac83dSMarc Zyngier 1245b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1246b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 1247b48ac83dSMarc Zyngier if (err) 1248b48ac83dSMarc Zyngier return err; 1249b48ac83dSMarc Zyngier 1250b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 1251b48ac83dSMarc Zyngier if (err) 1252b48ac83dSMarc Zyngier return err; 1253b48ac83dSMarc Zyngier 1254b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 1255b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 1256b48ac83dSMarc Zyngier dev_dbg(info->scratchpad[1].ptr, "ID:%d pID:%d vID:%d\n", 1257b48ac83dSMarc Zyngier (int)(hwirq - its_dev->lpi_base), (int)hwirq, virq + i); 1258b48ac83dSMarc Zyngier } 1259b48ac83dSMarc Zyngier 1260b48ac83dSMarc Zyngier return 0; 1261b48ac83dSMarc Zyngier } 1262b48ac83dSMarc Zyngier 1263aca268dfSMarc Zyngier static void its_irq_domain_activate(struct irq_domain *domain, 1264aca268dfSMarc Zyngier struct irq_data *d) 1265aca268dfSMarc Zyngier { 1266aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1267aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 1268aca268dfSMarc Zyngier 1269aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 1270aca268dfSMarc Zyngier its_send_mapvi(its_dev, d->hwirq, event); 1271aca268dfSMarc Zyngier } 1272aca268dfSMarc Zyngier 1273aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 1274aca268dfSMarc Zyngier struct irq_data *d) 1275aca268dfSMarc Zyngier { 1276aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1277aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 1278aca268dfSMarc Zyngier 1279aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 1280aca268dfSMarc Zyngier its_send_discard(its_dev, event); 1281aca268dfSMarc Zyngier } 1282aca268dfSMarc Zyngier 1283b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 1284b48ac83dSMarc Zyngier unsigned int nr_irqs) 1285b48ac83dSMarc Zyngier { 1286b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 1287b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1288b48ac83dSMarc Zyngier int i; 1289b48ac83dSMarc Zyngier 1290b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1291b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 1292b48ac83dSMarc Zyngier virq + i); 1293aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 1294b48ac83dSMarc Zyngier 1295b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 1296b48ac83dSMarc Zyngier clear_bit(event, its_dev->lpi_map); 1297b48ac83dSMarc Zyngier 1298b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 12992da39949SMarc Zyngier irq_domain_reset_irq_data(data); 1300b48ac83dSMarc Zyngier } 1301b48ac83dSMarc Zyngier 1302b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 1303b48ac83dSMarc Zyngier if (bitmap_empty(its_dev->lpi_map, its_dev->nr_lpis)) { 1304b48ac83dSMarc Zyngier its_lpi_free(its_dev->lpi_map, 1305b48ac83dSMarc Zyngier its_dev->lpi_base, 1306b48ac83dSMarc Zyngier its_dev->nr_lpis); 1307b48ac83dSMarc Zyngier 1308b48ac83dSMarc Zyngier /* Unmap device/itt */ 1309b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 1310b48ac83dSMarc Zyngier its_free_device(its_dev); 1311b48ac83dSMarc Zyngier } 1312b48ac83dSMarc Zyngier 1313b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 1314b48ac83dSMarc Zyngier } 1315b48ac83dSMarc Zyngier 1316b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 1317b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 1318b48ac83dSMarc Zyngier .free = its_irq_domain_free, 1319aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 1320aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 1321b48ac83dSMarc Zyngier }; 13224c21f3c2SMarc Zyngier 13234c21f3c2SMarc Zyngier static int its_probe(struct device_node *node, struct irq_domain *parent) 13244c21f3c2SMarc Zyngier { 13254c21f3c2SMarc Zyngier struct resource res; 13264c21f3c2SMarc Zyngier struct its_node *its; 13274c21f3c2SMarc Zyngier void __iomem *its_base; 13284c21f3c2SMarc Zyngier u32 val; 13294c21f3c2SMarc Zyngier u64 baser, tmp; 13304c21f3c2SMarc Zyngier int err; 13314c21f3c2SMarc Zyngier 13324c21f3c2SMarc Zyngier err = of_address_to_resource(node, 0, &res); 13334c21f3c2SMarc Zyngier if (err) { 13344c21f3c2SMarc Zyngier pr_warn("%s: no regs?\n", node->full_name); 13354c21f3c2SMarc Zyngier return -ENXIO; 13364c21f3c2SMarc Zyngier } 13374c21f3c2SMarc Zyngier 13384c21f3c2SMarc Zyngier its_base = ioremap(res.start, resource_size(&res)); 13394c21f3c2SMarc Zyngier if (!its_base) { 13404c21f3c2SMarc Zyngier pr_warn("%s: unable to map registers\n", node->full_name); 13414c21f3c2SMarc Zyngier return -ENOMEM; 13424c21f3c2SMarc Zyngier } 13434c21f3c2SMarc Zyngier 13444c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 13454c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 13464c21f3c2SMarc Zyngier pr_warn("%s: no ITS detected, giving up\n", node->full_name); 13474c21f3c2SMarc Zyngier err = -ENODEV; 13484c21f3c2SMarc Zyngier goto out_unmap; 13494c21f3c2SMarc Zyngier } 13504c21f3c2SMarc Zyngier 13514c21f3c2SMarc Zyngier pr_info("ITS: %s\n", node->full_name); 13524c21f3c2SMarc Zyngier 13534c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 13544c21f3c2SMarc Zyngier if (!its) { 13554c21f3c2SMarc Zyngier err = -ENOMEM; 13564c21f3c2SMarc Zyngier goto out_unmap; 13574c21f3c2SMarc Zyngier } 13584c21f3c2SMarc Zyngier 13594c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 13604c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 13614c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 13624c21f3c2SMarc Zyngier its->base = its_base; 13634c21f3c2SMarc Zyngier its->phys_base = res.start; 13644c21f3c2SMarc Zyngier its->msi_chip.of_node = node; 13654c21f3c2SMarc Zyngier its->ite_size = ((readl_relaxed(its_base + GITS_TYPER) >> 4) & 0xf) + 1; 13664c21f3c2SMarc Zyngier 13674c21f3c2SMarc Zyngier its->cmd_base = kzalloc(ITS_CMD_QUEUE_SZ, GFP_KERNEL); 13684c21f3c2SMarc Zyngier if (!its->cmd_base) { 13694c21f3c2SMarc Zyngier err = -ENOMEM; 13704c21f3c2SMarc Zyngier goto out_free_its; 13714c21f3c2SMarc Zyngier } 13724c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 13734c21f3c2SMarc Zyngier 13744c21f3c2SMarc Zyngier err = its_alloc_tables(its); 13754c21f3c2SMarc Zyngier if (err) 13764c21f3c2SMarc Zyngier goto out_free_cmd; 13774c21f3c2SMarc Zyngier 13784c21f3c2SMarc Zyngier err = its_alloc_collections(its); 13794c21f3c2SMarc Zyngier if (err) 13804c21f3c2SMarc Zyngier goto out_free_tables; 13814c21f3c2SMarc Zyngier 13824c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 13834c21f3c2SMarc Zyngier GITS_CBASER_WaWb | 13844c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 13854c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 13864c21f3c2SMarc Zyngier GITS_CBASER_VALID); 13874c21f3c2SMarc Zyngier 13884c21f3c2SMarc Zyngier writeq_relaxed(baser, its->base + GITS_CBASER); 13894c21f3c2SMarc Zyngier tmp = readq_relaxed(its->base + GITS_CBASER); 13904c21f3c2SMarc Zyngier writeq_relaxed(0, its->base + GITS_CWRITER); 1391*7cb99116SYun Wu writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR); 13924c21f3c2SMarc Zyngier 13934c21f3c2SMarc Zyngier if ((tmp ^ baser) & GITS_BASER_SHAREABILITY_MASK) { 13944c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 13954c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 13964c21f3c2SMarc Zyngier } 13974c21f3c2SMarc Zyngier 13984c21f3c2SMarc Zyngier if (of_property_read_bool(its->msi_chip.of_node, "msi-controller")) { 13994c21f3c2SMarc Zyngier its->domain = irq_domain_add_tree(NULL, &its_domain_ops, its); 14004c21f3c2SMarc Zyngier if (!its->domain) { 14014c21f3c2SMarc Zyngier err = -ENOMEM; 14024c21f3c2SMarc Zyngier goto out_free_tables; 14034c21f3c2SMarc Zyngier } 14044c21f3c2SMarc Zyngier 14054c21f3c2SMarc Zyngier its->domain->parent = parent; 14064c21f3c2SMarc Zyngier 14074c21f3c2SMarc Zyngier its->msi_chip.domain = pci_msi_create_irq_domain(node, 14084c21f3c2SMarc Zyngier &its_pci_msi_domain_info, 14094c21f3c2SMarc Zyngier its->domain); 14104c21f3c2SMarc Zyngier if (!its->msi_chip.domain) { 14114c21f3c2SMarc Zyngier err = -ENOMEM; 14124c21f3c2SMarc Zyngier goto out_free_domains; 14134c21f3c2SMarc Zyngier } 14144c21f3c2SMarc Zyngier 14154c21f3c2SMarc Zyngier err = of_pci_msi_chip_add(&its->msi_chip); 14164c21f3c2SMarc Zyngier if (err) 14174c21f3c2SMarc Zyngier goto out_free_domains; 14184c21f3c2SMarc Zyngier } 14194c21f3c2SMarc Zyngier 14204c21f3c2SMarc Zyngier spin_lock(&its_lock); 14214c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 14224c21f3c2SMarc Zyngier spin_unlock(&its_lock); 14234c21f3c2SMarc Zyngier 14244c21f3c2SMarc Zyngier return 0; 14254c21f3c2SMarc Zyngier 14264c21f3c2SMarc Zyngier out_free_domains: 14274c21f3c2SMarc Zyngier if (its->msi_chip.domain) 14284c21f3c2SMarc Zyngier irq_domain_remove(its->msi_chip.domain); 14294c21f3c2SMarc Zyngier if (its->domain) 14304c21f3c2SMarc Zyngier irq_domain_remove(its->domain); 14314c21f3c2SMarc Zyngier out_free_tables: 14324c21f3c2SMarc Zyngier its_free_tables(its); 14334c21f3c2SMarc Zyngier out_free_cmd: 14344c21f3c2SMarc Zyngier kfree(its->cmd_base); 14354c21f3c2SMarc Zyngier out_free_its: 14364c21f3c2SMarc Zyngier kfree(its); 14374c21f3c2SMarc Zyngier out_unmap: 14384c21f3c2SMarc Zyngier iounmap(its_base); 14394c21f3c2SMarc Zyngier pr_err("ITS: failed probing %s (%d)\n", node->full_name, err); 14404c21f3c2SMarc Zyngier return err; 14414c21f3c2SMarc Zyngier } 14424c21f3c2SMarc Zyngier 14434c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 14444c21f3c2SMarc Zyngier { 14454c21f3c2SMarc Zyngier return !!(readl_relaxed(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 14464c21f3c2SMarc Zyngier } 14474c21f3c2SMarc Zyngier 14484c21f3c2SMarc Zyngier int its_cpu_init(void) 14494c21f3c2SMarc Zyngier { 145016acae72SVladimir Murzin if (!list_empty(&its_nodes)) { 14514c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 14524c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 14534c21f3c2SMarc Zyngier return -ENXIO; 14544c21f3c2SMarc Zyngier } 14554c21f3c2SMarc Zyngier its_cpu_init_lpis(); 14564c21f3c2SMarc Zyngier its_cpu_init_collection(); 14574c21f3c2SMarc Zyngier } 14584c21f3c2SMarc Zyngier 14594c21f3c2SMarc Zyngier return 0; 14604c21f3c2SMarc Zyngier } 14614c21f3c2SMarc Zyngier 14624c21f3c2SMarc Zyngier static struct of_device_id its_device_id[] = { 14634c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 14644c21f3c2SMarc Zyngier {}, 14654c21f3c2SMarc Zyngier }; 14664c21f3c2SMarc Zyngier 14674c21f3c2SMarc Zyngier int its_init(struct device_node *node, struct rdists *rdists, 14684c21f3c2SMarc Zyngier struct irq_domain *parent_domain) 14694c21f3c2SMarc Zyngier { 14704c21f3c2SMarc Zyngier struct device_node *np; 14714c21f3c2SMarc Zyngier 14724c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 14734c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 14744c21f3c2SMarc Zyngier its_probe(np, parent_domain); 14754c21f3c2SMarc Zyngier } 14764c21f3c2SMarc Zyngier 14774c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 14784c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 14794c21f3c2SMarc Zyngier return -ENXIO; 14804c21f3c2SMarc Zyngier } 14814c21f3c2SMarc Zyngier 14824c21f3c2SMarc Zyngier gic_rdists = rdists; 14834c21f3c2SMarc Zyngier gic_root_node = node; 14844c21f3c2SMarc Zyngier 14854c21f3c2SMarc Zyngier its_alloc_lpi_tables(); 14864c21f3c2SMarc Zyngier its_lpi_init(rdists->id_bits); 14874c21f3c2SMarc Zyngier 14884c21f3c2SMarc Zyngier return 0; 14894c21f3c2SMarc Zyngier } 1490