1cc2d3216SMarc Zyngier /* 2d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 183f010cf1STomasz Nowicki #include <linux/acpi.h> 198d3554b8SHanjun Guo #include <linux/acpi_iort.h> 20cc2d3216SMarc Zyngier #include <linux/bitmap.h> 21cc2d3216SMarc Zyngier #include <linux/cpu.h> 22cc2d3216SMarc Zyngier #include <linux/delay.h> 2344bb7e24SRobin Murphy #include <linux/dma-iommu.h> 24cc2d3216SMarc Zyngier #include <linux/interrupt.h> 253f010cf1STomasz Nowicki #include <linux/irqdomain.h> 26cc2d3216SMarc Zyngier #include <linux/log2.h> 27cc2d3216SMarc Zyngier #include <linux/mm.h> 28cc2d3216SMarc Zyngier #include <linux/msi.h> 29cc2d3216SMarc Zyngier #include <linux/of.h> 30cc2d3216SMarc Zyngier #include <linux/of_address.h> 31cc2d3216SMarc Zyngier #include <linux/of_irq.h> 32cc2d3216SMarc Zyngier #include <linux/of_pci.h> 33cc2d3216SMarc Zyngier #include <linux/of_platform.h> 34cc2d3216SMarc Zyngier #include <linux/percpu.h> 35cc2d3216SMarc Zyngier #include <linux/slab.h> 36cc2d3216SMarc Zyngier 3741a83e06SJoel Porquet #include <linux/irqchip.h> 38cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 39c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 40cc2d3216SMarc Zyngier 41cc2d3216SMarc Zyngier #include <asm/cputype.h> 42cc2d3216SMarc Zyngier #include <asm/exception.h> 43cc2d3216SMarc Zyngier 4467510ccaSRobert Richter #include "irq-gic-common.h" 4567510ccaSRobert Richter 4694100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4794100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 48fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 49cc2d3216SMarc Zyngier 50c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 51c48ed51cSMarc Zyngier 52a13b0404SMarc Zyngier static u32 lpi_id_bits; 53a13b0404SMarc Zyngier 54a13b0404SMarc Zyngier /* 55a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 56a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 57a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 58a13b0404SMarc Zyngier */ 59a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 60a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 61a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 62a13b0404SMarc Zyngier 63a13b0404SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 64a13b0404SMarc Zyngier 65cc2d3216SMarc Zyngier /* 66cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 67cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 68cc2d3216SMarc Zyngier * CPU. 69cc2d3216SMarc Zyngier */ 70cc2d3216SMarc Zyngier struct its_collection { 71cc2d3216SMarc Zyngier u64 target_address; 72cc2d3216SMarc Zyngier u16 col_id; 73cc2d3216SMarc Zyngier }; 74cc2d3216SMarc Zyngier 75cc2d3216SMarc Zyngier /* 769347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 779347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 78466b7d16SShanker Donthineni */ 79466b7d16SShanker Donthineni struct its_baser { 80466b7d16SShanker Donthineni void *base; 81466b7d16SShanker Donthineni u64 val; 82466b7d16SShanker Donthineni u32 order; 839347359aSShanker Donthineni u32 psz; 84466b7d16SShanker Donthineni }; 85466b7d16SShanker Donthineni 86558b0165SArd Biesheuvel struct its_device; 87558b0165SArd Biesheuvel 88466b7d16SShanker Donthineni /* 89cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 90841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 91841514abSMarc Zyngier * list of devices writing to it. 92cc2d3216SMarc Zyngier */ 93cc2d3216SMarc Zyngier struct its_node { 94cc2d3216SMarc Zyngier raw_spinlock_t lock; 95cc2d3216SMarc Zyngier struct list_head entry; 96cc2d3216SMarc Zyngier void __iomem *base; 97db40f0a7STomasz Nowicki phys_addr_t phys_base; 98cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 99cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 100466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 101cc2d3216SMarc Zyngier struct its_collection *collections; 102558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 103558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 104cc2d3216SMarc Zyngier struct list_head its_device_list; 105cc2d3216SMarc Zyngier u64 flags; 106debf6d02SMarc Zyngier unsigned long list_nr; 107cc2d3216SMarc Zyngier u32 ite_size; 108466b7d16SShanker Donthineni u32 device_ids; 109fbf8f40eSGanapatrao Kulkarni int numa_node; 110558b0165SArd Biesheuvel unsigned int msi_domain_flags; 111558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1123dfa576bSMarc Zyngier bool is_v4; 1135c9a882eSMarc Zyngier int vlpi_redist_offset; 114cc2d3216SMarc Zyngier }; 115cc2d3216SMarc Zyngier 116cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 117cc2d3216SMarc Zyngier 1182eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1192eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1202eca0d6cSShanker Donthineni 121591e5becSMarc Zyngier struct event_lpi_map { 122591e5becSMarc Zyngier unsigned long *lpi_map; 123591e5becSMarc Zyngier u16 *col_map; 124591e5becSMarc Zyngier irq_hw_number_t lpi_base; 125591e5becSMarc Zyngier int nr_lpis; 126d011e4e6SMarc Zyngier struct mutex vlpi_lock; 127d011e4e6SMarc Zyngier struct its_vm *vm; 128d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 129d011e4e6SMarc Zyngier int nr_vlpis; 130591e5becSMarc Zyngier }; 131591e5becSMarc Zyngier 132cc2d3216SMarc Zyngier /* 133d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 134d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 135d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 136d011e4e6SMarc Zyngier * indicates which one. 137cc2d3216SMarc Zyngier */ 138cc2d3216SMarc Zyngier struct its_device { 139cc2d3216SMarc Zyngier struct list_head entry; 140cc2d3216SMarc Zyngier struct its_node *its; 141591e5becSMarc Zyngier struct event_lpi_map event_map; 142cc2d3216SMarc Zyngier void *itt; 143cc2d3216SMarc Zyngier u32 nr_ites; 144cc2d3216SMarc Zyngier u32 device_id; 145cc2d3216SMarc Zyngier }; 146cc2d3216SMarc Zyngier 14720b3d54eSMarc Zyngier static struct { 14820b3d54eSMarc Zyngier raw_spinlock_t lock; 14920b3d54eSMarc Zyngier struct its_device *dev; 15020b3d54eSMarc Zyngier struct its_vpe **vpes; 15120b3d54eSMarc Zyngier int next_victim; 15220b3d54eSMarc Zyngier } vpe_proxy; 15320b3d54eSMarc Zyngier 1541ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 1551ac19ca6SMarc Zyngier static DEFINE_SPINLOCK(its_lock); 1561ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 157db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1581ac19ca6SMarc Zyngier 1593dfa576bSMarc Zyngier static unsigned long its_list_map; 1603171a47aSMarc Zyngier static u16 vmovp_seq_num; 1613171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1623171a47aSMarc Zyngier 1637d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1643dfa576bSMarc Zyngier 1651ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 1661ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 167e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1681ac19ca6SMarc Zyngier 169591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 170591e5becSMarc Zyngier u32 event) 171591e5becSMarc Zyngier { 172591e5becSMarc Zyngier struct its_node *its = its_dev->its; 173591e5becSMarc Zyngier 174591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 175591e5becSMarc Zyngier } 176591e5becSMarc Zyngier 177cc2d3216SMarc Zyngier /* 178cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 179cc2d3216SMarc Zyngier * block. 180cc2d3216SMarc Zyngier */ 181cc2d3216SMarc Zyngier struct its_cmd_desc { 182cc2d3216SMarc Zyngier union { 183cc2d3216SMarc Zyngier struct { 184cc2d3216SMarc Zyngier struct its_device *dev; 185cc2d3216SMarc Zyngier u32 event_id; 186cc2d3216SMarc Zyngier } its_inv_cmd; 187cc2d3216SMarc Zyngier 188cc2d3216SMarc Zyngier struct { 189cc2d3216SMarc Zyngier struct its_device *dev; 190cc2d3216SMarc Zyngier u32 event_id; 1918d85dcedSMarc Zyngier } its_clear_cmd; 1928d85dcedSMarc Zyngier 1938d85dcedSMarc Zyngier struct { 1948d85dcedSMarc Zyngier struct its_device *dev; 1958d85dcedSMarc Zyngier u32 event_id; 196cc2d3216SMarc Zyngier } its_int_cmd; 197cc2d3216SMarc Zyngier 198cc2d3216SMarc Zyngier struct { 199cc2d3216SMarc Zyngier struct its_device *dev; 200cc2d3216SMarc Zyngier int valid; 201cc2d3216SMarc Zyngier } its_mapd_cmd; 202cc2d3216SMarc Zyngier 203cc2d3216SMarc Zyngier struct { 204cc2d3216SMarc Zyngier struct its_collection *col; 205cc2d3216SMarc Zyngier int valid; 206cc2d3216SMarc Zyngier } its_mapc_cmd; 207cc2d3216SMarc Zyngier 208cc2d3216SMarc Zyngier struct { 209cc2d3216SMarc Zyngier struct its_device *dev; 210cc2d3216SMarc Zyngier u32 phys_id; 211cc2d3216SMarc Zyngier u32 event_id; 2126a25ad3aSMarc Zyngier } its_mapti_cmd; 213cc2d3216SMarc Zyngier 214cc2d3216SMarc Zyngier struct { 215cc2d3216SMarc Zyngier struct its_device *dev; 216cc2d3216SMarc Zyngier struct its_collection *col; 217591e5becSMarc Zyngier u32 event_id; 218cc2d3216SMarc Zyngier } its_movi_cmd; 219cc2d3216SMarc Zyngier 220cc2d3216SMarc Zyngier struct { 221cc2d3216SMarc Zyngier struct its_device *dev; 222cc2d3216SMarc Zyngier u32 event_id; 223cc2d3216SMarc Zyngier } its_discard_cmd; 224cc2d3216SMarc Zyngier 225cc2d3216SMarc Zyngier struct { 226cc2d3216SMarc Zyngier struct its_collection *col; 227cc2d3216SMarc Zyngier } its_invall_cmd; 228d011e4e6SMarc Zyngier 229d011e4e6SMarc Zyngier struct { 230d011e4e6SMarc Zyngier struct its_vpe *vpe; 231eb78192bSMarc Zyngier } its_vinvall_cmd; 232eb78192bSMarc Zyngier 233eb78192bSMarc Zyngier struct { 234eb78192bSMarc Zyngier struct its_vpe *vpe; 235eb78192bSMarc Zyngier struct its_collection *col; 236eb78192bSMarc Zyngier bool valid; 237eb78192bSMarc Zyngier } its_vmapp_cmd; 238eb78192bSMarc Zyngier 239eb78192bSMarc Zyngier struct { 240eb78192bSMarc Zyngier struct its_vpe *vpe; 241d011e4e6SMarc Zyngier struct its_device *dev; 242d011e4e6SMarc Zyngier u32 virt_id; 243d011e4e6SMarc Zyngier u32 event_id; 244d011e4e6SMarc Zyngier bool db_enabled; 245d011e4e6SMarc Zyngier } its_vmapti_cmd; 246d011e4e6SMarc Zyngier 247d011e4e6SMarc Zyngier struct { 248d011e4e6SMarc Zyngier struct its_vpe *vpe; 249d011e4e6SMarc Zyngier struct its_device *dev; 250d011e4e6SMarc Zyngier u32 event_id; 251d011e4e6SMarc Zyngier bool db_enabled; 252d011e4e6SMarc Zyngier } its_vmovi_cmd; 2533171a47aSMarc Zyngier 2543171a47aSMarc Zyngier struct { 2553171a47aSMarc Zyngier struct its_vpe *vpe; 2563171a47aSMarc Zyngier struct its_collection *col; 2573171a47aSMarc Zyngier u16 seq_num; 2583171a47aSMarc Zyngier u16 its_list; 2593171a47aSMarc Zyngier } its_vmovp_cmd; 260cc2d3216SMarc Zyngier }; 261cc2d3216SMarc Zyngier }; 262cc2d3216SMarc Zyngier 263cc2d3216SMarc Zyngier /* 264cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 265cc2d3216SMarc Zyngier */ 266cc2d3216SMarc Zyngier struct its_cmd_block { 267cc2d3216SMarc Zyngier u64 raw_cmd[4]; 268cc2d3216SMarc Zyngier }; 269cc2d3216SMarc Zyngier 270cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 271cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 272cc2d3216SMarc Zyngier 27367047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 27467047f90SMarc Zyngier struct its_cmd_block *, 275cc2d3216SMarc Zyngier struct its_cmd_desc *); 276cc2d3216SMarc Zyngier 27767047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 27867047f90SMarc Zyngier struct its_cmd_block *, 279d011e4e6SMarc Zyngier struct its_cmd_desc *); 280d011e4e6SMarc Zyngier 2814d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 2824d36f136SMarc Zyngier { 2834d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 2844d36f136SMarc Zyngier *raw_cmd &= ~mask; 2854d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 2864d36f136SMarc Zyngier } 2874d36f136SMarc Zyngier 288cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 289cc2d3216SMarc Zyngier { 2904d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 291cc2d3216SMarc Zyngier } 292cc2d3216SMarc Zyngier 293cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 294cc2d3216SMarc Zyngier { 2954d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 296cc2d3216SMarc Zyngier } 297cc2d3216SMarc Zyngier 298cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 299cc2d3216SMarc Zyngier { 3004d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 301cc2d3216SMarc Zyngier } 302cc2d3216SMarc Zyngier 303cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 304cc2d3216SMarc Zyngier { 3054d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 306cc2d3216SMarc Zyngier } 307cc2d3216SMarc Zyngier 308cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 309cc2d3216SMarc Zyngier { 3104d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 311cc2d3216SMarc Zyngier } 312cc2d3216SMarc Zyngier 313cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 314cc2d3216SMarc Zyngier { 3154d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 50, 8); 316cc2d3216SMarc Zyngier } 317cc2d3216SMarc Zyngier 318cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 319cc2d3216SMarc Zyngier { 3204d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 321cc2d3216SMarc Zyngier } 322cc2d3216SMarc Zyngier 323cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 324cc2d3216SMarc Zyngier { 3254d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 50, 16); 326cc2d3216SMarc Zyngier } 327cc2d3216SMarc Zyngier 328cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 329cc2d3216SMarc Zyngier { 3304d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 331cc2d3216SMarc Zyngier } 332cc2d3216SMarc Zyngier 333d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 334d011e4e6SMarc Zyngier { 335d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 336d011e4e6SMarc Zyngier } 337d011e4e6SMarc Zyngier 338d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 339d011e4e6SMarc Zyngier { 340d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 341d011e4e6SMarc Zyngier } 342d011e4e6SMarc Zyngier 343d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 344d011e4e6SMarc Zyngier { 345d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 346d011e4e6SMarc Zyngier } 347d011e4e6SMarc Zyngier 348d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 349d011e4e6SMarc Zyngier { 350d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 351d011e4e6SMarc Zyngier } 352d011e4e6SMarc Zyngier 3533171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 3543171a47aSMarc Zyngier { 3553171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 3563171a47aSMarc Zyngier } 3573171a47aSMarc Zyngier 3583171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 3593171a47aSMarc Zyngier { 3603171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 3613171a47aSMarc Zyngier } 3623171a47aSMarc Zyngier 363eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 364eb78192bSMarc Zyngier { 365eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 50, 16); 366eb78192bSMarc Zyngier } 367eb78192bSMarc Zyngier 368eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 369eb78192bSMarc Zyngier { 370eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 371eb78192bSMarc Zyngier } 372eb78192bSMarc Zyngier 373cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 374cc2d3216SMarc Zyngier { 375cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 376cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 377cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 378cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 379cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 380cc2d3216SMarc Zyngier } 381cc2d3216SMarc Zyngier 38267047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 38367047f90SMarc Zyngier struct its_cmd_block *cmd, 384cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 385cc2d3216SMarc Zyngier { 386cc2d3216SMarc Zyngier unsigned long itt_addr; 387c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 388cc2d3216SMarc Zyngier 389cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 390cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 391cc2d3216SMarc Zyngier 392cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 393cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 394cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 395cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 396cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 397cc2d3216SMarc Zyngier 398cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 399cc2d3216SMarc Zyngier 400591e5becSMarc Zyngier return NULL; 401cc2d3216SMarc Zyngier } 402cc2d3216SMarc Zyngier 40367047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 40467047f90SMarc Zyngier struct its_cmd_block *cmd, 405cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 406cc2d3216SMarc Zyngier { 407cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 408cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 409cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 410cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 411cc2d3216SMarc Zyngier 412cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 413cc2d3216SMarc Zyngier 414cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 415cc2d3216SMarc Zyngier } 416cc2d3216SMarc Zyngier 41767047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 41867047f90SMarc Zyngier struct its_cmd_block *cmd, 419cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 420cc2d3216SMarc Zyngier { 421591e5becSMarc Zyngier struct its_collection *col; 422591e5becSMarc Zyngier 4236a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 4246a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 425591e5becSMarc Zyngier 4266a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 4276a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 4286a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 4296a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 430591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 431cc2d3216SMarc Zyngier 432cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 433cc2d3216SMarc Zyngier 434591e5becSMarc Zyngier return col; 435cc2d3216SMarc Zyngier } 436cc2d3216SMarc Zyngier 43767047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 43867047f90SMarc Zyngier struct its_cmd_block *cmd, 439cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 440cc2d3216SMarc Zyngier { 441591e5becSMarc Zyngier struct its_collection *col; 442591e5becSMarc Zyngier 443591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 444591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 445591e5becSMarc Zyngier 446cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 447cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 448591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 449cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 450cc2d3216SMarc Zyngier 451cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 452cc2d3216SMarc Zyngier 453591e5becSMarc Zyngier return col; 454cc2d3216SMarc Zyngier } 455cc2d3216SMarc Zyngier 45667047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 45767047f90SMarc Zyngier struct its_cmd_block *cmd, 458cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 459cc2d3216SMarc Zyngier { 460591e5becSMarc Zyngier struct its_collection *col; 461591e5becSMarc Zyngier 462591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 463591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 464591e5becSMarc Zyngier 465cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 466cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 467cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 468cc2d3216SMarc Zyngier 469cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 470cc2d3216SMarc Zyngier 471591e5becSMarc Zyngier return col; 472cc2d3216SMarc Zyngier } 473cc2d3216SMarc Zyngier 47467047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 47567047f90SMarc Zyngier struct its_cmd_block *cmd, 476cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 477cc2d3216SMarc Zyngier { 478591e5becSMarc Zyngier struct its_collection *col; 479591e5becSMarc Zyngier 480591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 481591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 482591e5becSMarc Zyngier 483cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 484cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 485cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 486cc2d3216SMarc Zyngier 487cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 488cc2d3216SMarc Zyngier 489591e5becSMarc Zyngier return col; 490cc2d3216SMarc Zyngier } 491cc2d3216SMarc Zyngier 49267047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 49367047f90SMarc Zyngier struct its_cmd_block *cmd, 4948d85dcedSMarc Zyngier struct its_cmd_desc *desc) 4958d85dcedSMarc Zyngier { 4968d85dcedSMarc Zyngier struct its_collection *col; 4978d85dcedSMarc Zyngier 4988d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 4998d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 5008d85dcedSMarc Zyngier 5018d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 5028d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 5038d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 5048d85dcedSMarc Zyngier 5058d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5068d85dcedSMarc Zyngier 5078d85dcedSMarc Zyngier return col; 5088d85dcedSMarc Zyngier } 5098d85dcedSMarc Zyngier 51067047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 51167047f90SMarc Zyngier struct its_cmd_block *cmd, 5128d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5138d85dcedSMarc Zyngier { 5148d85dcedSMarc Zyngier struct its_collection *col; 5158d85dcedSMarc Zyngier 5168d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 5178d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 5188d85dcedSMarc Zyngier 5198d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 5208d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 5218d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 5228d85dcedSMarc Zyngier 5238d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5248d85dcedSMarc Zyngier 5258d85dcedSMarc Zyngier return col; 5268d85dcedSMarc Zyngier } 5278d85dcedSMarc Zyngier 52867047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 52967047f90SMarc Zyngier struct its_cmd_block *cmd, 530cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 531cc2d3216SMarc Zyngier { 532cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 533cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 534cc2d3216SMarc Zyngier 535cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 536cc2d3216SMarc Zyngier 537cc2d3216SMarc Zyngier return NULL; 538cc2d3216SMarc Zyngier } 539cc2d3216SMarc Zyngier 54067047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 54167047f90SMarc Zyngier struct its_cmd_block *cmd, 542eb78192bSMarc Zyngier struct its_cmd_desc *desc) 543eb78192bSMarc Zyngier { 544eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 545eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 546eb78192bSMarc Zyngier 547eb78192bSMarc Zyngier its_fixup_cmd(cmd); 548eb78192bSMarc Zyngier 549eb78192bSMarc Zyngier return desc->its_vinvall_cmd.vpe; 550eb78192bSMarc Zyngier } 551eb78192bSMarc Zyngier 55267047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 55367047f90SMarc Zyngier struct its_cmd_block *cmd, 554eb78192bSMarc Zyngier struct its_cmd_desc *desc) 555eb78192bSMarc Zyngier { 556eb78192bSMarc Zyngier unsigned long vpt_addr; 5575c9a882eSMarc Zyngier u64 target; 558eb78192bSMarc Zyngier 559eb78192bSMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 5605c9a882eSMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 561eb78192bSMarc Zyngier 562eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 563eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 564eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 5655c9a882eSMarc Zyngier its_encode_target(cmd, target); 566eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 567eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 568eb78192bSMarc Zyngier 569eb78192bSMarc Zyngier its_fixup_cmd(cmd); 570eb78192bSMarc Zyngier 571eb78192bSMarc Zyngier return desc->its_vmapp_cmd.vpe; 572eb78192bSMarc Zyngier } 573eb78192bSMarc Zyngier 57467047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 57567047f90SMarc Zyngier struct its_cmd_block *cmd, 576d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 577d011e4e6SMarc Zyngier { 578d011e4e6SMarc Zyngier u32 db; 579d011e4e6SMarc Zyngier 580d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 581d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 582d011e4e6SMarc Zyngier else 583d011e4e6SMarc Zyngier db = 1023; 584d011e4e6SMarc Zyngier 585d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 586d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 587d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 588d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 589d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 590d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 591d011e4e6SMarc Zyngier 592d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 593d011e4e6SMarc Zyngier 594d011e4e6SMarc Zyngier return desc->its_vmapti_cmd.vpe; 595d011e4e6SMarc Zyngier } 596d011e4e6SMarc Zyngier 59767047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 59867047f90SMarc Zyngier struct its_cmd_block *cmd, 599d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 600d011e4e6SMarc Zyngier { 601d011e4e6SMarc Zyngier u32 db; 602d011e4e6SMarc Zyngier 603d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 604d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 605d011e4e6SMarc Zyngier else 606d011e4e6SMarc Zyngier db = 1023; 607d011e4e6SMarc Zyngier 608d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 609d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 610d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 611d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 612d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 613d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 614d011e4e6SMarc Zyngier 615d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 616d011e4e6SMarc Zyngier 617d011e4e6SMarc Zyngier return desc->its_vmovi_cmd.vpe; 618d011e4e6SMarc Zyngier } 619d011e4e6SMarc Zyngier 62067047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 62167047f90SMarc Zyngier struct its_cmd_block *cmd, 6223171a47aSMarc Zyngier struct its_cmd_desc *desc) 6233171a47aSMarc Zyngier { 6245c9a882eSMarc Zyngier u64 target; 6255c9a882eSMarc Zyngier 6265c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 6273171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 6283171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 6293171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 6303171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 6315c9a882eSMarc Zyngier its_encode_target(cmd, target); 6323171a47aSMarc Zyngier 6333171a47aSMarc Zyngier its_fixup_cmd(cmd); 6343171a47aSMarc Zyngier 6353171a47aSMarc Zyngier return desc->its_vmovp_cmd.vpe; 6363171a47aSMarc Zyngier } 6373171a47aSMarc Zyngier 638cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 639cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 640cc2d3216SMarc Zyngier { 641cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 642cc2d3216SMarc Zyngier } 643cc2d3216SMarc Zyngier 644cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 645cc2d3216SMarc Zyngier { 646cc2d3216SMarc Zyngier int widx; 647cc2d3216SMarc Zyngier int ridx; 648cc2d3216SMarc Zyngier 649cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 650cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 651cc2d3216SMarc Zyngier 652cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 653cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 654cc2d3216SMarc Zyngier return 1; 655cc2d3216SMarc Zyngier 656cc2d3216SMarc Zyngier return 0; 657cc2d3216SMarc Zyngier } 658cc2d3216SMarc Zyngier 659cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 660cc2d3216SMarc Zyngier { 661cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 662cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 663cc2d3216SMarc Zyngier 664cc2d3216SMarc Zyngier while (its_queue_full(its)) { 665cc2d3216SMarc Zyngier count--; 666cc2d3216SMarc Zyngier if (!count) { 667cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 668cc2d3216SMarc Zyngier return NULL; 669cc2d3216SMarc Zyngier } 670cc2d3216SMarc Zyngier cpu_relax(); 671cc2d3216SMarc Zyngier udelay(1); 672cc2d3216SMarc Zyngier } 673cc2d3216SMarc Zyngier 674cc2d3216SMarc Zyngier cmd = its->cmd_write++; 675cc2d3216SMarc Zyngier 676cc2d3216SMarc Zyngier /* Handle queue wrapping */ 677cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 678cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 679cc2d3216SMarc Zyngier 68034d677a9SMarc Zyngier /* Clear command */ 68134d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 68234d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 68334d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 68434d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 68534d677a9SMarc Zyngier 686cc2d3216SMarc Zyngier return cmd; 687cc2d3216SMarc Zyngier } 688cc2d3216SMarc Zyngier 689cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 690cc2d3216SMarc Zyngier { 691cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 692cc2d3216SMarc Zyngier 693cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 694cc2d3216SMarc Zyngier 695cc2d3216SMarc Zyngier return its->cmd_write; 696cc2d3216SMarc Zyngier } 697cc2d3216SMarc Zyngier 698cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 699cc2d3216SMarc Zyngier { 700cc2d3216SMarc Zyngier /* 701cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 702cc2d3216SMarc Zyngier * the ITS. 703cc2d3216SMarc Zyngier */ 704cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 705328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 706cc2d3216SMarc Zyngier else 707cc2d3216SMarc Zyngier dsb(ishst); 708cc2d3216SMarc Zyngier } 709cc2d3216SMarc Zyngier 710a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 711cc2d3216SMarc Zyngier struct its_cmd_block *from, 712cc2d3216SMarc Zyngier struct its_cmd_block *to) 713cc2d3216SMarc Zyngier { 714cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 715cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 716cc2d3216SMarc Zyngier 717cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 718cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 719cc2d3216SMarc Zyngier 720cc2d3216SMarc Zyngier while (1) { 721cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 7229bdd8b1cSMarc Zyngier 7239bdd8b1cSMarc Zyngier /* Direct case */ 7249bdd8b1cSMarc Zyngier if (from_idx < to_idx && rd_idx >= to_idx) 7259bdd8b1cSMarc Zyngier break; 7269bdd8b1cSMarc Zyngier 7279bdd8b1cSMarc Zyngier /* Wrapped case */ 7289bdd8b1cSMarc Zyngier if (from_idx >= to_idx && rd_idx >= to_idx && rd_idx < from_idx) 729cc2d3216SMarc Zyngier break; 730cc2d3216SMarc Zyngier 731cc2d3216SMarc Zyngier count--; 732cc2d3216SMarc Zyngier if (!count) { 733a19b462fSMarc Zyngier pr_err_ratelimited("ITS queue timeout (%llu %llu %llu)\n", 734a19b462fSMarc Zyngier from_idx, to_idx, rd_idx); 735a19b462fSMarc Zyngier return -1; 736cc2d3216SMarc Zyngier } 737cc2d3216SMarc Zyngier cpu_relax(); 738cc2d3216SMarc Zyngier udelay(1); 739cc2d3216SMarc Zyngier } 740a19b462fSMarc Zyngier 741a19b462fSMarc Zyngier return 0; 742cc2d3216SMarc Zyngier } 743cc2d3216SMarc Zyngier 744e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 745e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 746e4f9094bSMarc Zyngier void name(struct its_node *its, \ 747e4f9094bSMarc Zyngier buildtype builder, \ 748e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 749e4f9094bSMarc Zyngier { \ 750e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 751e4f9094bSMarc Zyngier synctype *sync_obj; \ 752e4f9094bSMarc Zyngier unsigned long flags; \ 753e4f9094bSMarc Zyngier \ 754e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 755e4f9094bSMarc Zyngier \ 756e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 757e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 758e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 759e4f9094bSMarc Zyngier return; \ 760e4f9094bSMarc Zyngier } \ 76167047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 762e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 763e4f9094bSMarc Zyngier \ 764e4f9094bSMarc Zyngier if (sync_obj) { \ 765e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 766e4f9094bSMarc Zyngier if (!sync_cmd) \ 767e4f9094bSMarc Zyngier goto post; \ 768e4f9094bSMarc Zyngier \ 76967047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 770e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 771e4f9094bSMarc Zyngier } \ 772e4f9094bSMarc Zyngier \ 773e4f9094bSMarc Zyngier post: \ 774e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 775e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 776e4f9094bSMarc Zyngier \ 777a19b462fSMarc Zyngier if (its_wait_for_range_completion(its, cmd, next_cmd)) \ 778a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 779e4f9094bSMarc Zyngier } 780e4f9094bSMarc Zyngier 78167047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 78267047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 783e4f9094bSMarc Zyngier struct its_collection *sync_col) 784cc2d3216SMarc Zyngier { 785cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 786cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 787e4f9094bSMarc Zyngier 788cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 789cc2d3216SMarc Zyngier } 790cc2d3216SMarc Zyngier 791e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 792e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 793cc2d3216SMarc Zyngier 79467047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 79567047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 796d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 797d011e4e6SMarc Zyngier { 798d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 799d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 800d011e4e6SMarc Zyngier 801d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 802d011e4e6SMarc Zyngier } 803d011e4e6SMarc Zyngier 804d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 805d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 806d011e4e6SMarc Zyngier 8078d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 8088d85dcedSMarc Zyngier { 8098d85dcedSMarc Zyngier struct its_cmd_desc desc; 8108d85dcedSMarc Zyngier 8118d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 8128d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 8138d85dcedSMarc Zyngier 8148d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 8158d85dcedSMarc Zyngier } 8168d85dcedSMarc Zyngier 8178d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 8188d85dcedSMarc Zyngier { 8198d85dcedSMarc Zyngier struct its_cmd_desc desc; 8208d85dcedSMarc Zyngier 8218d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 8228d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 8238d85dcedSMarc Zyngier 8248d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 825cc2d3216SMarc Zyngier } 826cc2d3216SMarc Zyngier 827cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 828cc2d3216SMarc Zyngier { 829cc2d3216SMarc Zyngier struct its_cmd_desc desc; 830cc2d3216SMarc Zyngier 831cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 832cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 833cc2d3216SMarc Zyngier 834cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 835cc2d3216SMarc Zyngier } 836cc2d3216SMarc Zyngier 837cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 838cc2d3216SMarc Zyngier { 839cc2d3216SMarc Zyngier struct its_cmd_desc desc; 840cc2d3216SMarc Zyngier 841cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 842cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 843cc2d3216SMarc Zyngier 844cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 845cc2d3216SMarc Zyngier } 846cc2d3216SMarc Zyngier 847cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 848cc2d3216SMarc Zyngier int valid) 849cc2d3216SMarc Zyngier { 850cc2d3216SMarc Zyngier struct its_cmd_desc desc; 851cc2d3216SMarc Zyngier 852cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 853cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 854cc2d3216SMarc Zyngier 855cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 856cc2d3216SMarc Zyngier } 857cc2d3216SMarc Zyngier 8586a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 859cc2d3216SMarc Zyngier { 860cc2d3216SMarc Zyngier struct its_cmd_desc desc; 861cc2d3216SMarc Zyngier 8626a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 8636a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 8646a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 865cc2d3216SMarc Zyngier 8666a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 867cc2d3216SMarc Zyngier } 868cc2d3216SMarc Zyngier 869cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 870cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 871cc2d3216SMarc Zyngier { 872cc2d3216SMarc Zyngier struct its_cmd_desc desc; 873cc2d3216SMarc Zyngier 874cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 875cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 876591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 877cc2d3216SMarc Zyngier 878cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 879cc2d3216SMarc Zyngier } 880cc2d3216SMarc Zyngier 881cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 882cc2d3216SMarc Zyngier { 883cc2d3216SMarc Zyngier struct its_cmd_desc desc; 884cc2d3216SMarc Zyngier 885cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 886cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 887cc2d3216SMarc Zyngier 888cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 889cc2d3216SMarc Zyngier } 890cc2d3216SMarc Zyngier 891cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 892cc2d3216SMarc Zyngier { 893cc2d3216SMarc Zyngier struct its_cmd_desc desc; 894cc2d3216SMarc Zyngier 895cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 896cc2d3216SMarc Zyngier 897cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 898cc2d3216SMarc Zyngier } 899c48ed51cSMarc Zyngier 900d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 901d011e4e6SMarc Zyngier { 902d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 903d011e4e6SMarc Zyngier struct its_cmd_desc desc; 904d011e4e6SMarc Zyngier 905d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 906d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 907d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 908d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 909d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 910d011e4e6SMarc Zyngier 911d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 912d011e4e6SMarc Zyngier } 913d011e4e6SMarc Zyngier 914d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 915d011e4e6SMarc Zyngier { 916d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 917d011e4e6SMarc Zyngier struct its_cmd_desc desc; 918d011e4e6SMarc Zyngier 919d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 920d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 921d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 922d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 923d011e4e6SMarc Zyngier 924d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 925d011e4e6SMarc Zyngier } 926d011e4e6SMarc Zyngier 92775fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 92875fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 929eb78192bSMarc Zyngier { 930eb78192bSMarc Zyngier struct its_cmd_desc desc; 931eb78192bSMarc Zyngier 932eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 933eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 934eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 93575fd951bSMarc Zyngier 936eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 937eb78192bSMarc Zyngier } 938eb78192bSMarc Zyngier 9393171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 9403171a47aSMarc Zyngier { 9413171a47aSMarc Zyngier struct its_cmd_desc desc; 9423171a47aSMarc Zyngier struct its_node *its; 9433171a47aSMarc Zyngier unsigned long flags; 9443171a47aSMarc Zyngier int col_id = vpe->col_idx; 9453171a47aSMarc Zyngier 9463171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 9473171a47aSMarc Zyngier desc.its_vmovp_cmd.its_list = (u16)its_list_map; 9483171a47aSMarc Zyngier 9493171a47aSMarc Zyngier if (!its_list_map) { 9503171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 9513171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = 0; 9523171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9533171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9543171a47aSMarc Zyngier return; 9553171a47aSMarc Zyngier } 9563171a47aSMarc Zyngier 9573171a47aSMarc Zyngier /* 9583171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 9593171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 9603171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 9613171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 9623171a47aSMarc Zyngier * 9633171a47aSMarc Zyngier * Wall <-- Head. 9643171a47aSMarc Zyngier */ 9653171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 9663171a47aSMarc Zyngier 9673171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 9683171a47aSMarc Zyngier 9693171a47aSMarc Zyngier /* Emit VMOVPs */ 9703171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 9713171a47aSMarc Zyngier if (!its->is_v4) 9723171a47aSMarc Zyngier continue; 9733171a47aSMarc Zyngier 9743171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9753171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9763171a47aSMarc Zyngier } 9773171a47aSMarc Zyngier 9783171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 9793171a47aSMarc Zyngier } 9803171a47aSMarc Zyngier 98140619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 982eb78192bSMarc Zyngier { 983eb78192bSMarc Zyngier struct its_cmd_desc desc; 984eb78192bSMarc Zyngier 985eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 986eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 987eb78192bSMarc Zyngier } 988eb78192bSMarc Zyngier 989c48ed51cSMarc Zyngier /* 990c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 991c48ed51cSMarc Zyngier */ 992c48ed51cSMarc Zyngier 993c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 994c48ed51cSMarc Zyngier { 995c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 996591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 997c48ed51cSMarc Zyngier } 998c48ed51cSMarc Zyngier 999015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1000c48ed51cSMarc Zyngier { 1001015ec038SMarc Zyngier irq_hw_number_t hwirq; 1002adcdb94eSMarc Zyngier struct page *prop_page; 1003adcdb94eSMarc Zyngier u8 *cfg; 1004c48ed51cSMarc Zyngier 1005015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1006015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1007015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1008015ec038SMarc Zyngier 1009015ec038SMarc Zyngier prop_page = its_dev->event_map.vm->vprop_page; 1010015ec038SMarc Zyngier hwirq = its_dev->event_map.vlpi_maps[event].vintid; 1011015ec038SMarc Zyngier } else { 1012adcdb94eSMarc Zyngier prop_page = gic_rdists->prop_page; 1013015ec038SMarc Zyngier hwirq = d->hwirq; 1014015ec038SMarc Zyngier } 1015adcdb94eSMarc Zyngier 1016adcdb94eSMarc Zyngier cfg = page_address(prop_page) + hwirq - 8192; 1017adcdb94eSMarc Zyngier *cfg &= ~clr; 1018015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1019c48ed51cSMarc Zyngier 1020c48ed51cSMarc Zyngier /* 1021c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1022c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1023c48ed51cSMarc Zyngier * Humpf... 1024c48ed51cSMarc Zyngier */ 1025c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1026328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1027c48ed51cSMarc Zyngier else 1028c48ed51cSMarc Zyngier dsb(ishst); 1029015ec038SMarc Zyngier } 1030015ec038SMarc Zyngier 1031015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1032015ec038SMarc Zyngier { 1033015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1034015ec038SMarc Zyngier 1035015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1036adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 1037c48ed51cSMarc Zyngier } 1038c48ed51cSMarc Zyngier 1039015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1040015ec038SMarc Zyngier { 1041015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1042015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1043015ec038SMarc Zyngier 1044015ec038SMarc Zyngier if (its_dev->event_map.vlpi_maps[event].db_enabled == enable) 1045015ec038SMarc Zyngier return; 1046015ec038SMarc Zyngier 1047015ec038SMarc Zyngier its_dev->event_map.vlpi_maps[event].db_enabled = enable; 1048015ec038SMarc Zyngier 1049015ec038SMarc Zyngier /* 1050015ec038SMarc Zyngier * More fun with the architecture: 1051015ec038SMarc Zyngier * 1052015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1053015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1054015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1055015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1056015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1057015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1058015ec038SMarc Zyngier */ 1059015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1060c48ed51cSMarc Zyngier } 1061c48ed51cSMarc Zyngier 1062c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1063c48ed51cSMarc Zyngier { 1064015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1065015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1066015ec038SMarc Zyngier 1067adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1068c48ed51cSMarc Zyngier } 1069c48ed51cSMarc Zyngier 1070c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1071c48ed51cSMarc Zyngier { 1072015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1073015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1074015ec038SMarc Zyngier 1075adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1076c48ed51cSMarc Zyngier } 1077c48ed51cSMarc Zyngier 1078c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1079c48ed51cSMarc Zyngier bool force) 1080c48ed51cSMarc Zyngier { 1081fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1082fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1083c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1084c48ed51cSMarc Zyngier struct its_collection *target_col; 1085c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1086c48ed51cSMarc Zyngier 1087015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1088015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1089015ec038SMarc Zyngier return -EINVAL; 1090015ec038SMarc Zyngier 1091fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1092fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1093fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1094fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1095fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1096fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1097fbf8f40eSGanapatrao Kulkarni } 1098fbf8f40eSGanapatrao Kulkarni } 1099fbf8f40eSGanapatrao Kulkarni 1100fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1101fbf8f40eSGanapatrao Kulkarni 1102c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1103c48ed51cSMarc Zyngier return -EINVAL; 1104c48ed51cSMarc Zyngier 11058b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 11068b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1107c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1108c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1109591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 11100d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 11118b8d94a7SMaJun } 1112c48ed51cSMarc Zyngier 1113c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1114c48ed51cSMarc Zyngier } 1115c48ed51cSMarc Zyngier 1116558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1117558b0165SArd Biesheuvel { 1118558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1119558b0165SArd Biesheuvel 1120558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1121558b0165SArd Biesheuvel } 1122558b0165SArd Biesheuvel 1123b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1124b48ac83dSMarc Zyngier { 1125b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1126b48ac83dSMarc Zyngier struct its_node *its; 1127b48ac83dSMarc Zyngier u64 addr; 1128b48ac83dSMarc Zyngier 1129b48ac83dSMarc Zyngier its = its_dev->its; 1130558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1131b48ac83dSMarc Zyngier 1132b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1133b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1134b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 113544bb7e24SRobin Murphy 113644bb7e24SRobin Murphy iommu_dma_map_msi_msg(d->irq, msg); 1137b48ac83dSMarc Zyngier } 1138b48ac83dSMarc Zyngier 11398d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 11408d85dcedSMarc Zyngier enum irqchip_irq_state which, 11418d85dcedSMarc Zyngier bool state) 11428d85dcedSMarc Zyngier { 11438d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 11448d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 11458d85dcedSMarc Zyngier 11468d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 11478d85dcedSMarc Zyngier return -EINVAL; 11488d85dcedSMarc Zyngier 11498d85dcedSMarc Zyngier if (state) 11508d85dcedSMarc Zyngier its_send_int(its_dev, event); 11518d85dcedSMarc Zyngier else 11528d85dcedSMarc Zyngier its_send_clear(its_dev, event); 11538d85dcedSMarc Zyngier 11548d85dcedSMarc Zyngier return 0; 11558d85dcedSMarc Zyngier } 11568d85dcedSMarc Zyngier 1157d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1158d011e4e6SMarc Zyngier { 1159d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1160d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1161d011e4e6SMarc Zyngier int ret = 0; 1162d011e4e6SMarc Zyngier 1163d011e4e6SMarc Zyngier if (!info->map) 1164d011e4e6SMarc Zyngier return -EINVAL; 1165d011e4e6SMarc Zyngier 1166d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1167d011e4e6SMarc Zyngier 1168d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1169d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1170d011e4e6SMarc Zyngier 1171d011e4e6SMarc Zyngier maps = kzalloc(sizeof(*maps) * its_dev->event_map.nr_lpis, 1172d011e4e6SMarc Zyngier GFP_KERNEL); 1173d011e4e6SMarc Zyngier if (!maps) { 1174d011e4e6SMarc Zyngier ret = -ENOMEM; 1175d011e4e6SMarc Zyngier goto out; 1176d011e4e6SMarc Zyngier } 1177d011e4e6SMarc Zyngier 1178d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1179d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1180d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1181d011e4e6SMarc Zyngier ret = -EINVAL; 1182d011e4e6SMarc Zyngier goto out; 1183d011e4e6SMarc Zyngier } 1184d011e4e6SMarc Zyngier 1185d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1186d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1187d011e4e6SMarc Zyngier 1188d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1189d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1190d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1191d011e4e6SMarc Zyngier } else { 1192d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1193d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1194d011e4e6SMarc Zyngier 1195d011e4e6SMarc Zyngier /* and install the virtual one */ 1196d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1197d011e4e6SMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1198d011e4e6SMarc Zyngier 1199d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1200d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1201d011e4e6SMarc Zyngier } 1202d011e4e6SMarc Zyngier 1203d011e4e6SMarc Zyngier out: 1204d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1205d011e4e6SMarc Zyngier return ret; 1206d011e4e6SMarc Zyngier } 1207d011e4e6SMarc Zyngier 1208d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1209d011e4e6SMarc Zyngier { 1210d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1211d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1212d011e4e6SMarc Zyngier int ret = 0; 1213d011e4e6SMarc Zyngier 1214d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1215d011e4e6SMarc Zyngier 1216d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || 1217d011e4e6SMarc Zyngier !its_dev->event_map.vlpi_maps[event].vm) { 1218d011e4e6SMarc Zyngier ret = -EINVAL; 1219d011e4e6SMarc Zyngier goto out; 1220d011e4e6SMarc Zyngier } 1221d011e4e6SMarc Zyngier 1222d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1223d011e4e6SMarc Zyngier *info->map = its_dev->event_map.vlpi_maps[event]; 1224d011e4e6SMarc Zyngier 1225d011e4e6SMarc Zyngier out: 1226d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1227d011e4e6SMarc Zyngier return ret; 1228d011e4e6SMarc Zyngier } 1229d011e4e6SMarc Zyngier 1230d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1231d011e4e6SMarc Zyngier { 1232d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1233d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1234d011e4e6SMarc Zyngier int ret = 0; 1235d011e4e6SMarc Zyngier 1236d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1237d011e4e6SMarc Zyngier 1238d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1239d011e4e6SMarc Zyngier ret = -EINVAL; 1240d011e4e6SMarc Zyngier goto out; 1241d011e4e6SMarc Zyngier } 1242d011e4e6SMarc Zyngier 1243d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1244d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1245d011e4e6SMarc Zyngier 1246d011e4e6SMarc Zyngier /* and restore the physical one */ 1247d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1248d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1249d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1250d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1251d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1252d011e4e6SMarc Zyngier 1253d011e4e6SMarc Zyngier /* 1254d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1255d011e4e6SMarc Zyngier * this was the last VLPI. 1256d011e4e6SMarc Zyngier */ 1257d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1258d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1259d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1260d011e4e6SMarc Zyngier } 1261d011e4e6SMarc Zyngier 1262d011e4e6SMarc Zyngier out: 1263d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1264d011e4e6SMarc Zyngier return ret; 1265d011e4e6SMarc Zyngier } 1266d011e4e6SMarc Zyngier 1267015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1268015ec038SMarc Zyngier { 1269015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1270015ec038SMarc Zyngier 1271015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1272015ec038SMarc Zyngier return -EINVAL; 1273015ec038SMarc Zyngier 1274015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1275015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1276015ec038SMarc Zyngier else 1277015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1278015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1279015ec038SMarc Zyngier 1280015ec038SMarc Zyngier return 0; 1281015ec038SMarc Zyngier } 1282015ec038SMarc Zyngier 1283c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1284c808eea8SMarc Zyngier { 1285c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1286c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1287c808eea8SMarc Zyngier 1288c808eea8SMarc Zyngier /* Need a v4 ITS */ 1289d011e4e6SMarc Zyngier if (!its_dev->its->is_v4) 1290c808eea8SMarc Zyngier return -EINVAL; 1291c808eea8SMarc Zyngier 1292d011e4e6SMarc Zyngier /* Unmap request? */ 1293d011e4e6SMarc Zyngier if (!info) 1294d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1295d011e4e6SMarc Zyngier 1296c808eea8SMarc Zyngier switch (info->cmd_type) { 1297c808eea8SMarc Zyngier case MAP_VLPI: 1298d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1299c808eea8SMarc Zyngier 1300c808eea8SMarc Zyngier case GET_VLPI: 1301d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1302c808eea8SMarc Zyngier 1303c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1304c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1305015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1306c808eea8SMarc Zyngier 1307c808eea8SMarc Zyngier default: 1308c808eea8SMarc Zyngier return -EINVAL; 1309c808eea8SMarc Zyngier } 1310c808eea8SMarc Zyngier } 1311c808eea8SMarc Zyngier 1312c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1313c48ed51cSMarc Zyngier .name = "ITS", 1314c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1315c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1316004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1317c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1318b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 13198d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1320c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1321b48ac83dSMarc Zyngier }; 1322b48ac83dSMarc Zyngier 1323bf9529f8SMarc Zyngier /* 1324bf9529f8SMarc Zyngier * How we allocate LPIs: 1325bf9529f8SMarc Zyngier * 1326bf9529f8SMarc Zyngier * The GIC has id_bits bits for interrupt identifiers. From there, we 1327bf9529f8SMarc Zyngier * must subtract 8192 which are reserved for SGIs/PPIs/SPIs. Then, as 1328bf9529f8SMarc Zyngier * we allocate LPIs by chunks of 32, we can shift the whole thing by 5 1329bf9529f8SMarc Zyngier * bits to the right. 1330bf9529f8SMarc Zyngier * 1331bf9529f8SMarc Zyngier * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations. 1332bf9529f8SMarc Zyngier */ 1333bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK_SHIFT 5 1334bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK (1 << IRQS_PER_CHUNK_SHIFT) 13356c31e123SShanker Donthineni #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1336bf9529f8SMarc Zyngier 1337bf9529f8SMarc Zyngier static unsigned long *lpi_bitmap; 1338bf9529f8SMarc Zyngier static u32 lpi_chunks; 1339bf9529f8SMarc Zyngier static DEFINE_SPINLOCK(lpi_lock); 1340bf9529f8SMarc Zyngier 1341bf9529f8SMarc Zyngier static int its_lpi_to_chunk(int lpi) 1342bf9529f8SMarc Zyngier { 1343bf9529f8SMarc Zyngier return (lpi - 8192) >> IRQS_PER_CHUNK_SHIFT; 1344bf9529f8SMarc Zyngier } 1345bf9529f8SMarc Zyngier 1346bf9529f8SMarc Zyngier static int its_chunk_to_lpi(int chunk) 1347bf9529f8SMarc Zyngier { 1348bf9529f8SMarc Zyngier return (chunk << IRQS_PER_CHUNK_SHIFT) + 8192; 1349bf9529f8SMarc Zyngier } 1350bf9529f8SMarc Zyngier 135104a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1352bf9529f8SMarc Zyngier { 1353bf9529f8SMarc Zyngier lpi_chunks = its_lpi_to_chunk(1UL << id_bits); 1354bf9529f8SMarc Zyngier 1355bf9529f8SMarc Zyngier lpi_bitmap = kzalloc(BITS_TO_LONGS(lpi_chunks) * sizeof(long), 1356bf9529f8SMarc Zyngier GFP_KERNEL); 1357bf9529f8SMarc Zyngier if (!lpi_bitmap) { 1358bf9529f8SMarc Zyngier lpi_chunks = 0; 1359bf9529f8SMarc Zyngier return -ENOMEM; 1360bf9529f8SMarc Zyngier } 1361bf9529f8SMarc Zyngier 1362bf9529f8SMarc Zyngier pr_info("ITS: Allocated %d chunks for LPIs\n", (int)lpi_chunks); 1363bf9529f8SMarc Zyngier return 0; 1364bf9529f8SMarc Zyngier } 1365bf9529f8SMarc Zyngier 1366bf9529f8SMarc Zyngier static unsigned long *its_lpi_alloc_chunks(int nr_irqs, int *base, int *nr_ids) 1367bf9529f8SMarc Zyngier { 1368bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1369bf9529f8SMarc Zyngier int chunk_id; 1370bf9529f8SMarc Zyngier int nr_chunks; 1371bf9529f8SMarc Zyngier int i; 1372bf9529f8SMarc Zyngier 1373bf9529f8SMarc Zyngier nr_chunks = DIV_ROUND_UP(nr_irqs, IRQS_PER_CHUNK); 1374bf9529f8SMarc Zyngier 1375bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 1376bf9529f8SMarc Zyngier 1377bf9529f8SMarc Zyngier do { 1378bf9529f8SMarc Zyngier chunk_id = bitmap_find_next_zero_area(lpi_bitmap, lpi_chunks, 1379bf9529f8SMarc Zyngier 0, nr_chunks, 0); 1380bf9529f8SMarc Zyngier if (chunk_id < lpi_chunks) 1381bf9529f8SMarc Zyngier break; 1382bf9529f8SMarc Zyngier 1383bf9529f8SMarc Zyngier nr_chunks--; 1384bf9529f8SMarc Zyngier } while (nr_chunks > 0); 1385bf9529f8SMarc Zyngier 1386bf9529f8SMarc Zyngier if (!nr_chunks) 1387bf9529f8SMarc Zyngier goto out; 1388bf9529f8SMarc Zyngier 1389bf9529f8SMarc Zyngier bitmap = kzalloc(BITS_TO_LONGS(nr_chunks * IRQS_PER_CHUNK) * sizeof (long), 1390bf9529f8SMarc Zyngier GFP_ATOMIC); 1391bf9529f8SMarc Zyngier if (!bitmap) 1392bf9529f8SMarc Zyngier goto out; 1393bf9529f8SMarc Zyngier 1394bf9529f8SMarc Zyngier for (i = 0; i < nr_chunks; i++) 1395bf9529f8SMarc Zyngier set_bit(chunk_id + i, lpi_bitmap); 1396bf9529f8SMarc Zyngier 1397bf9529f8SMarc Zyngier *base = its_chunk_to_lpi(chunk_id); 1398bf9529f8SMarc Zyngier *nr_ids = nr_chunks * IRQS_PER_CHUNK; 1399bf9529f8SMarc Zyngier 1400bf9529f8SMarc Zyngier out: 1401bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 1402bf9529f8SMarc Zyngier 1403c8415b94SMarc Zyngier if (!bitmap) 1404c8415b94SMarc Zyngier *base = *nr_ids = 0; 1405c8415b94SMarc Zyngier 1406bf9529f8SMarc Zyngier return bitmap; 1407bf9529f8SMarc Zyngier } 1408bf9529f8SMarc Zyngier 1409cf2be8baSMarc Zyngier static void its_lpi_free_chunks(unsigned long *bitmap, int base, int nr_ids) 1410bf9529f8SMarc Zyngier { 1411bf9529f8SMarc Zyngier int lpi; 1412bf9529f8SMarc Zyngier 1413bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 1414bf9529f8SMarc Zyngier 1415bf9529f8SMarc Zyngier for (lpi = base; lpi < (base + nr_ids); lpi += IRQS_PER_CHUNK) { 1416bf9529f8SMarc Zyngier int chunk = its_lpi_to_chunk(lpi); 1417cf2be8baSMarc Zyngier 1418bf9529f8SMarc Zyngier BUG_ON(chunk > lpi_chunks); 1419bf9529f8SMarc Zyngier if (test_bit(chunk, lpi_bitmap)) { 1420bf9529f8SMarc Zyngier clear_bit(chunk, lpi_bitmap); 1421bf9529f8SMarc Zyngier } else { 1422bf9529f8SMarc Zyngier pr_err("Bad LPI chunk %d\n", chunk); 1423bf9529f8SMarc Zyngier } 1424bf9529f8SMarc Zyngier } 1425bf9529f8SMarc Zyngier 1426bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 1427bf9529f8SMarc Zyngier 1428cf2be8baSMarc Zyngier kfree(bitmap); 1429bf9529f8SMarc Zyngier } 14301ac19ca6SMarc Zyngier 14310e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 14320e5ccf91SMarc Zyngier { 14330e5ccf91SMarc Zyngier struct page *prop_page; 14341ac19ca6SMarc Zyngier 14350e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 14360e5ccf91SMarc Zyngier if (!prop_page) 14370e5ccf91SMarc Zyngier return NULL; 14380e5ccf91SMarc Zyngier 14390e5ccf91SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 14400e5ccf91SMarc Zyngier memset(page_address(prop_page), 14410e5ccf91SMarc Zyngier LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, 14420e5ccf91SMarc Zyngier LPI_PROPBASE_SZ); 14430e5ccf91SMarc Zyngier 14440e5ccf91SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 14450e5ccf91SMarc Zyngier gic_flush_dcache_to_poc(page_address(prop_page), LPI_PROPBASE_SZ); 14460e5ccf91SMarc Zyngier 14470e5ccf91SMarc Zyngier return prop_page; 14480e5ccf91SMarc Zyngier } 14490e5ccf91SMarc Zyngier 14507d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 14517d75bbb4SMarc Zyngier { 14527d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 14537d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 14547d75bbb4SMarc Zyngier } 14551ac19ca6SMarc Zyngier 14561ac19ca6SMarc Zyngier static int __init its_alloc_lpi_tables(void) 14571ac19ca6SMarc Zyngier { 14581ac19ca6SMarc Zyngier phys_addr_t paddr; 14591ac19ca6SMarc Zyngier 14606c31e123SShanker Donthineni lpi_id_bits = min_t(u32, gic_rdists->id_bits, ITS_MAX_LPI_NRBITS); 14610e5ccf91SMarc Zyngier gic_rdists->prop_page = its_allocate_prop_table(GFP_NOWAIT); 14621ac19ca6SMarc Zyngier if (!gic_rdists->prop_page) { 14631ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 14641ac19ca6SMarc Zyngier return -ENOMEM; 14651ac19ca6SMarc Zyngier } 14661ac19ca6SMarc Zyngier 14671ac19ca6SMarc Zyngier paddr = page_to_phys(gic_rdists->prop_page); 14681ac19ca6SMarc Zyngier pr_info("GIC: using LPI property table @%pa\n", &paddr); 14691ac19ca6SMarc Zyngier 14706c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 14711ac19ca6SMarc Zyngier } 14721ac19ca6SMarc Zyngier 14731ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 14741ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 14751ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 14764f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 14771ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 14781ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 14791ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 14801ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 14811ac19ca6SMarc Zyngier }; 14821ac19ca6SMarc Zyngier 14832d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 14842d81d425SShanker Donthineni { 14852d81d425SShanker Donthineni u32 idx = baser - its->tables; 14862d81d425SShanker Donthineni 14870968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 14882d81d425SShanker Donthineni } 14892d81d425SShanker Donthineni 14902d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 14912d81d425SShanker Donthineni u64 val) 14922d81d425SShanker Donthineni { 14932d81d425SShanker Donthineni u32 idx = baser - its->tables; 14942d81d425SShanker Donthineni 14950968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 14962d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 14972d81d425SShanker Donthineni } 14982d81d425SShanker Donthineni 14999347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 15003faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 15013faf24eaSShanker Donthineni bool indirect) 15029347359aSShanker Donthineni { 15039347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 15049347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 15059347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 15069347359aSShanker Donthineni u32 alloc_pages; 15079347359aSShanker Donthineni void *base; 15089347359aSShanker Donthineni u64 tmp; 15099347359aSShanker Donthineni 15109347359aSShanker Donthineni retry_alloc_baser: 15119347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 15129347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 15139347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 15149347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 15159347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 15169347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 15179347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 15189347359aSShanker Donthineni } 15199347359aSShanker Donthineni 15209347359aSShanker Donthineni base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 15219347359aSShanker Donthineni if (!base) 15229347359aSShanker Donthineni return -ENOMEM; 15239347359aSShanker Donthineni 15249347359aSShanker Donthineni retry_baser: 15259347359aSShanker Donthineni val = (virt_to_phys(base) | 15269347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 15279347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 15289347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 15299347359aSShanker Donthineni cache | 15309347359aSShanker Donthineni shr | 15319347359aSShanker Donthineni GITS_BASER_VALID); 15329347359aSShanker Donthineni 15333faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 15343faf24eaSShanker Donthineni 15359347359aSShanker Donthineni switch (psz) { 15369347359aSShanker Donthineni case SZ_4K: 15379347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 15389347359aSShanker Donthineni break; 15399347359aSShanker Donthineni case SZ_16K: 15409347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 15419347359aSShanker Donthineni break; 15429347359aSShanker Donthineni case SZ_64K: 15439347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 15449347359aSShanker Donthineni break; 15459347359aSShanker Donthineni } 15469347359aSShanker Donthineni 15479347359aSShanker Donthineni its_write_baser(its, baser, val); 15489347359aSShanker Donthineni tmp = baser->val; 15499347359aSShanker Donthineni 15509347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 15519347359aSShanker Donthineni /* 15529347359aSShanker Donthineni * Shareability didn't stick. Just use 15539347359aSShanker Donthineni * whatever the read reported, which is likely 15549347359aSShanker Donthineni * to be the only thing this redistributor 15559347359aSShanker Donthineni * supports. If that's zero, make it 15569347359aSShanker Donthineni * non-cacheable as well. 15579347359aSShanker Donthineni */ 15589347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 15599347359aSShanker Donthineni if (!shr) { 15609347359aSShanker Donthineni cache = GITS_BASER_nC; 1561328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 15629347359aSShanker Donthineni } 15639347359aSShanker Donthineni goto retry_baser; 15649347359aSShanker Donthineni } 15659347359aSShanker Donthineni 15669347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 15679347359aSShanker Donthineni /* 15689347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 15699347359aSShanker Donthineni * size and retry. If we reach 4K, then 15709347359aSShanker Donthineni * something is horribly wrong... 15719347359aSShanker Donthineni */ 15729347359aSShanker Donthineni free_pages((unsigned long)base, order); 15739347359aSShanker Donthineni baser->base = NULL; 15749347359aSShanker Donthineni 15759347359aSShanker Donthineni switch (psz) { 15769347359aSShanker Donthineni case SZ_16K: 15779347359aSShanker Donthineni psz = SZ_4K; 15789347359aSShanker Donthineni goto retry_alloc_baser; 15799347359aSShanker Donthineni case SZ_64K: 15809347359aSShanker Donthineni psz = SZ_16K; 15819347359aSShanker Donthineni goto retry_alloc_baser; 15829347359aSShanker Donthineni } 15839347359aSShanker Donthineni } 15849347359aSShanker Donthineni 15859347359aSShanker Donthineni if (val != tmp) { 1586b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 15879347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1588b11283ebSVladimir Murzin val, tmp); 15899347359aSShanker Donthineni free_pages((unsigned long)base, order); 15909347359aSShanker Donthineni return -ENXIO; 15919347359aSShanker Donthineni } 15929347359aSShanker Donthineni 15939347359aSShanker Donthineni baser->order = order; 15949347359aSShanker Donthineni baser->base = base; 15959347359aSShanker Donthineni baser->psz = psz; 15963faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 15979347359aSShanker Donthineni 15983faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1599d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 16009347359aSShanker Donthineni its_base_type_string[type], 16019347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 16023faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 16039347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 16049347359aSShanker Donthineni 16059347359aSShanker Donthineni return 0; 16069347359aSShanker Donthineni } 16079347359aSShanker Donthineni 16084cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 16094cacac57SMarc Zyngier struct its_baser *baser, 16103faf24eaSShanker Donthineni u32 psz, u32 *order) 16114b75c459SShanker Donthineni { 16124cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 16134cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 16144cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 16152fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 16164b75c459SShanker Donthineni u32 ids = its->device_ids; 16174b75c459SShanker Donthineni u32 new_order = *order; 16183faf24eaSShanker Donthineni bool indirect = false; 16193faf24eaSShanker Donthineni 16203faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 16213faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 16223faf24eaSShanker Donthineni /* 16233faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 16243faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 16253faf24eaSShanker Donthineni */ 16263faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 16273faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 16283faf24eaSShanker Donthineni 16293faf24eaSShanker Donthineni if (indirect) { 16303faf24eaSShanker Donthineni /* 16313faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 16323faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 16333faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 16343faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 16353faf24eaSShanker Donthineni * entry size. 16363faf24eaSShanker Donthineni */ 1637d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 16383faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 16393faf24eaSShanker Donthineni } 16403faf24eaSShanker Donthineni } 16414b75c459SShanker Donthineni 16424b75c459SShanker Donthineni /* 16434b75c459SShanker Donthineni * Allocate as many entries as required to fit the 16444b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 16454b75c459SShanker Donthineni * space being incredibly sparse, this results in a 16463faf24eaSShanker Donthineni * massive waste of memory if two-level device table 16473faf24eaSShanker Donthineni * feature is not supported by hardware. 16484b75c459SShanker Donthineni */ 16494b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 16504b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 16514b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1652d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 16534cacac57SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %u->%u\n", 16544cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 16554cacac57SMarc Zyngier its->device_ids, ids); 16564b75c459SShanker Donthineni } 16574b75c459SShanker Donthineni 16584b75c459SShanker Donthineni *order = new_order; 16593faf24eaSShanker Donthineni 16603faf24eaSShanker Donthineni return indirect; 16614b75c459SShanker Donthineni } 16624b75c459SShanker Donthineni 16631ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 16641ac19ca6SMarc Zyngier { 16651ac19ca6SMarc Zyngier int i; 16661ac19ca6SMarc Zyngier 16671ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 16681a485f4dSShanker Donthineni if (its->tables[i].base) { 16691a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 16701a485f4dSShanker Donthineni its->tables[i].order); 16711a485f4dSShanker Donthineni its->tables[i].base = NULL; 16721ac19ca6SMarc Zyngier } 16731ac19ca6SMarc Zyngier } 16741ac19ca6SMarc Zyngier } 16751ac19ca6SMarc Zyngier 16760e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 16771ac19ca6SMarc Zyngier { 16781ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 16792fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 16809347359aSShanker Donthineni u32 psz = SZ_64K; 16819347359aSShanker Donthineni int err, i; 168294100970SRobert Richter 1683fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 1684fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 16859347359aSShanker Donthineni cache = GITS_BASER_nCnB; 1686466b7d16SShanker Donthineni 16871ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 16882d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 16892d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 16901ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 16919347359aSShanker Donthineni u32 order = get_order(psz); 16923faf24eaSShanker Donthineni bool indirect = false; 16931ac19ca6SMarc Zyngier 16944cacac57SMarc Zyngier switch (type) { 16954cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 16961ac19ca6SMarc Zyngier continue; 16971ac19ca6SMarc Zyngier 16984cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 16994cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 17004cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 17014cacac57SMarc Zyngier psz, &order); 17024cacac57SMarc Zyngier break; 17034cacac57SMarc Zyngier } 1704f54b97edSMarc Zyngier 17053faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 17069347359aSShanker Donthineni if (err < 0) { 17079347359aSShanker Donthineni its_free_tables(its); 17089347359aSShanker Donthineni return err; 170930f21363SRobert Richter } 171030f21363SRobert Richter 17119347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 17129347359aSShanker Donthineni psz = baser->psz; 17139347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 17149347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 17151ac19ca6SMarc Zyngier } 17161ac19ca6SMarc Zyngier 17171ac19ca6SMarc Zyngier return 0; 17181ac19ca6SMarc Zyngier } 17191ac19ca6SMarc Zyngier 17201ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 17211ac19ca6SMarc Zyngier { 17221ac19ca6SMarc Zyngier its->collections = kzalloc(nr_cpu_ids * sizeof(*its->collections), 17231ac19ca6SMarc Zyngier GFP_KERNEL); 17241ac19ca6SMarc Zyngier if (!its->collections) 17251ac19ca6SMarc Zyngier return -ENOMEM; 17261ac19ca6SMarc Zyngier 17271ac19ca6SMarc Zyngier return 0; 17281ac19ca6SMarc Zyngier } 17291ac19ca6SMarc Zyngier 17307c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 17317c297a2dSMarc Zyngier { 17327c297a2dSMarc Zyngier struct page *pend_page; 17337c297a2dSMarc Zyngier /* 17347c297a2dSMarc Zyngier * The pending pages have to be at least 64kB aligned, 17357c297a2dSMarc Zyngier * hence the 'max(LPI_PENDBASE_SZ, SZ_64K)' below. 17367c297a2dSMarc Zyngier */ 17377c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 17387c297a2dSMarc Zyngier get_order(max_t(u32, LPI_PENDBASE_SZ, SZ_64K))); 17397c297a2dSMarc Zyngier if (!pend_page) 17407c297a2dSMarc Zyngier return NULL; 17417c297a2dSMarc Zyngier 17427c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 17437c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 17447c297a2dSMarc Zyngier 17457c297a2dSMarc Zyngier return pend_page; 17467c297a2dSMarc Zyngier } 17477c297a2dSMarc Zyngier 17487d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 17497d75bbb4SMarc Zyngier { 17507d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(pt), 17517d75bbb4SMarc Zyngier get_order(max_t(u32, LPI_PENDBASE_SZ, SZ_64K))); 17527d75bbb4SMarc Zyngier } 17537d75bbb4SMarc Zyngier 17541ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 17551ac19ca6SMarc Zyngier { 17561ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 17571ac19ca6SMarc Zyngier struct page *pend_page; 17581ac19ca6SMarc Zyngier u64 val, tmp; 17591ac19ca6SMarc Zyngier 17601ac19ca6SMarc Zyngier /* If we didn't allocate the pending table yet, do it now */ 17611ac19ca6SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 17621ac19ca6SMarc Zyngier if (!pend_page) { 17631ac19ca6SMarc Zyngier phys_addr_t paddr; 17647c297a2dSMarc Zyngier 17657c297a2dSMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 17661ac19ca6SMarc Zyngier if (!pend_page) { 17671ac19ca6SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", 17681ac19ca6SMarc Zyngier smp_processor_id()); 17691ac19ca6SMarc Zyngier return; 17701ac19ca6SMarc Zyngier } 17711ac19ca6SMarc Zyngier 17721ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 17731ac19ca6SMarc Zyngier pr_info("CPU%d: using LPI pending table @%pa\n", 17741ac19ca6SMarc Zyngier smp_processor_id(), &paddr); 17751ac19ca6SMarc Zyngier gic_data_rdist()->pend_page = pend_page; 17761ac19ca6SMarc Zyngier } 17771ac19ca6SMarc Zyngier 17781ac19ca6SMarc Zyngier /* Disable LPIs */ 17791ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 17801ac19ca6SMarc Zyngier val &= ~GICR_CTLR_ENABLE_LPIS; 17811ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 17821ac19ca6SMarc Zyngier 17831ac19ca6SMarc Zyngier /* 17841ac19ca6SMarc Zyngier * Make sure any change to the table is observable by the GIC. 17851ac19ca6SMarc Zyngier */ 17861ac19ca6SMarc Zyngier dsb(sy); 17871ac19ca6SMarc Zyngier 17881ac19ca6SMarc Zyngier /* set PROPBASE */ 17891ac19ca6SMarc Zyngier val = (page_to_phys(gic_rdists->prop_page) | 17901ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 17912fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 17921ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 17931ac19ca6SMarc Zyngier 17940968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 17950968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 17961ac19ca6SMarc Zyngier 17971ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 1798241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 1799241a386cSMarc Zyngier /* 1800241a386cSMarc Zyngier * The HW reports non-shareable, we must 1801241a386cSMarc Zyngier * remove the cacheability attributes as 1802241a386cSMarc Zyngier * well. 1803241a386cSMarc Zyngier */ 1804241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 1805241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 1806241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 18070968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 1808241a386cSMarc Zyngier } 18091ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 18101ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 18111ac19ca6SMarc Zyngier } 18121ac19ca6SMarc Zyngier 18131ac19ca6SMarc Zyngier /* set PENDBASE */ 18141ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 18154ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 18162fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 18171ac19ca6SMarc Zyngier 18180968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 18190968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 1820241a386cSMarc Zyngier 1821241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 1822241a386cSMarc Zyngier /* 1823241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 1824241a386cSMarc Zyngier * cacheability attributes as well. 1825241a386cSMarc Zyngier */ 1826241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 1827241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 1828241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 18290968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 1830241a386cSMarc Zyngier } 18311ac19ca6SMarc Zyngier 18321ac19ca6SMarc Zyngier /* Enable LPIs */ 18331ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 18341ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 18351ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 18361ac19ca6SMarc Zyngier 18371ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 18381ac19ca6SMarc Zyngier dsb(sy); 18391ac19ca6SMarc Zyngier } 18401ac19ca6SMarc Zyngier 18411ac19ca6SMarc Zyngier static void its_cpu_init_collection(void) 18421ac19ca6SMarc Zyngier { 18431ac19ca6SMarc Zyngier struct its_node *its; 18441ac19ca6SMarc Zyngier int cpu; 18451ac19ca6SMarc Zyngier 18461ac19ca6SMarc Zyngier spin_lock(&its_lock); 18471ac19ca6SMarc Zyngier cpu = smp_processor_id(); 18481ac19ca6SMarc Zyngier 18491ac19ca6SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 18501ac19ca6SMarc Zyngier u64 target; 18511ac19ca6SMarc Zyngier 1852fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 1853fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1854fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 1855fbf8f40eSGanapatrao Kulkarni 1856fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 1857fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 1858fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 1859fbf8f40eSGanapatrao Kulkarni continue; 1860fbf8f40eSGanapatrao Kulkarni } 1861fbf8f40eSGanapatrao Kulkarni 18621ac19ca6SMarc Zyngier /* 18631ac19ca6SMarc Zyngier * We now have to bind each collection to its target 18641ac19ca6SMarc Zyngier * redistributor. 18651ac19ca6SMarc Zyngier */ 1866589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 18671ac19ca6SMarc Zyngier /* 18681ac19ca6SMarc Zyngier * This ITS wants the physical address of the 18691ac19ca6SMarc Zyngier * redistributor. 18701ac19ca6SMarc Zyngier */ 18711ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 18721ac19ca6SMarc Zyngier } else { 18731ac19ca6SMarc Zyngier /* 18741ac19ca6SMarc Zyngier * This ITS wants a linear CPU number. 18751ac19ca6SMarc Zyngier */ 1876589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 1877263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 18781ac19ca6SMarc Zyngier } 18791ac19ca6SMarc Zyngier 18801ac19ca6SMarc Zyngier /* Perform collection mapping */ 18811ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 18821ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 18831ac19ca6SMarc Zyngier 18841ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 18851ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 18861ac19ca6SMarc Zyngier } 18871ac19ca6SMarc Zyngier 18881ac19ca6SMarc Zyngier spin_unlock(&its_lock); 18891ac19ca6SMarc Zyngier } 189084a6a2e7SMarc Zyngier 189184a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 189284a6a2e7SMarc Zyngier { 189384a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 18943e39e8f5SMarc Zyngier unsigned long flags; 189584a6a2e7SMarc Zyngier 18963e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 189784a6a2e7SMarc Zyngier 189884a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 189984a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 190084a6a2e7SMarc Zyngier its_dev = tmp; 190184a6a2e7SMarc Zyngier break; 190284a6a2e7SMarc Zyngier } 190384a6a2e7SMarc Zyngier } 190484a6a2e7SMarc Zyngier 19053e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 190684a6a2e7SMarc Zyngier 190784a6a2e7SMarc Zyngier return its_dev; 190884a6a2e7SMarc Zyngier } 190984a6a2e7SMarc Zyngier 1910466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 1911466b7d16SShanker Donthineni { 1912466b7d16SShanker Donthineni int i; 1913466b7d16SShanker Donthineni 1914466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 1915466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 1916466b7d16SShanker Donthineni return &its->tables[i]; 1917466b7d16SShanker Donthineni } 1918466b7d16SShanker Donthineni 1919466b7d16SShanker Donthineni return NULL; 1920466b7d16SShanker Donthineni } 1921466b7d16SShanker Donthineni 192270cc81edSMarc Zyngier static bool its_alloc_table_entry(struct its_baser *baser, u32 id) 19233faf24eaSShanker Donthineni { 19243faf24eaSShanker Donthineni struct page *page; 19253faf24eaSShanker Donthineni u32 esz, idx; 19263faf24eaSShanker Donthineni __le64 *table; 19273faf24eaSShanker Donthineni 19283faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 19293faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 19303faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 193170cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 19323faf24eaSShanker Donthineni 19333faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 193470cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 19353faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 19363faf24eaSShanker Donthineni return false; 19373faf24eaSShanker Donthineni 19383faf24eaSShanker Donthineni table = baser->base; 19393faf24eaSShanker Donthineni 19403faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 19413faf24eaSShanker Donthineni if (!table[idx]) { 19423faf24eaSShanker Donthineni page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(baser->psz)); 19433faf24eaSShanker Donthineni if (!page) 19443faf24eaSShanker Donthineni return false; 19453faf24eaSShanker Donthineni 19463faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 19473faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 1948328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 19493faf24eaSShanker Donthineni 19503faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 19513faf24eaSShanker Donthineni 19523faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 19533faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 1954328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 19553faf24eaSShanker Donthineni 19563faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 19573faf24eaSShanker Donthineni dsb(sy); 19583faf24eaSShanker Donthineni } 19593faf24eaSShanker Donthineni 19603faf24eaSShanker Donthineni return true; 19613faf24eaSShanker Donthineni } 19623faf24eaSShanker Donthineni 196370cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 196470cc81edSMarc Zyngier { 196570cc81edSMarc Zyngier struct its_baser *baser; 196670cc81edSMarc Zyngier 196770cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 196870cc81edSMarc Zyngier 196970cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 197070cc81edSMarc Zyngier if (!baser) 197170cc81edSMarc Zyngier return (ilog2(dev_id) < its->device_ids); 197270cc81edSMarc Zyngier 197370cc81edSMarc Zyngier return its_alloc_table_entry(baser, dev_id); 197470cc81edSMarc Zyngier } 197570cc81edSMarc Zyngier 19767d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 19777d75bbb4SMarc Zyngier { 19787d75bbb4SMarc Zyngier struct its_node *its; 19797d75bbb4SMarc Zyngier 19807d75bbb4SMarc Zyngier /* 19817d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 19827d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 19837d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 19847d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 19857d75bbb4SMarc Zyngier * anyway, right?). 19867d75bbb4SMarc Zyngier */ 19877d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 19887d75bbb4SMarc Zyngier struct its_baser *baser; 19897d75bbb4SMarc Zyngier 19907d75bbb4SMarc Zyngier if (!its->is_v4) 19917d75bbb4SMarc Zyngier continue; 19927d75bbb4SMarc Zyngier 19937d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 19947d75bbb4SMarc Zyngier if (!baser) 19957d75bbb4SMarc Zyngier return false; 19967d75bbb4SMarc Zyngier 19977d75bbb4SMarc Zyngier if (!its_alloc_table_entry(baser, vpe_id)) 19987d75bbb4SMarc Zyngier return false; 19997d75bbb4SMarc Zyngier } 20007d75bbb4SMarc Zyngier 20017d75bbb4SMarc Zyngier return true; 20027d75bbb4SMarc Zyngier } 20037d75bbb4SMarc Zyngier 200484a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 200593f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 200684a6a2e7SMarc Zyngier { 200784a6a2e7SMarc Zyngier struct its_device *dev; 200893f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 20093e39e8f5SMarc Zyngier unsigned long flags; 2010591e5becSMarc Zyngier u16 *col_map = NULL; 201184a6a2e7SMarc Zyngier void *itt; 201284a6a2e7SMarc Zyngier int lpi_base; 201384a6a2e7SMarc Zyngier int nr_lpis; 2014c8481267SMarc Zyngier int nr_ites; 201584a6a2e7SMarc Zyngier int sz; 201684a6a2e7SMarc Zyngier 20173faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2018466b7d16SShanker Donthineni return NULL; 2019466b7d16SShanker Donthineni 202084a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2021c8481267SMarc Zyngier /* 2022c8481267SMarc Zyngier * At least one bit of EventID is being used, hence a minimum 2023c8481267SMarc Zyngier * of two entries. No, the architecture doesn't let you 2024c8481267SMarc Zyngier * express an ITT with a single entry. 2025c8481267SMarc Zyngier */ 202696555c47SWill Deacon nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 2027c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 202884a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 20296c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 203093f94ea0SMarc Zyngier if (alloc_lpis) { 203184a6a2e7SMarc Zyngier lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 2032591e5becSMarc Zyngier if (lpi_map) 203393f94ea0SMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_lpis, 203493f94ea0SMarc Zyngier GFP_KERNEL); 203593f94ea0SMarc Zyngier } else { 203693f94ea0SMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_ites, GFP_KERNEL); 203793f94ea0SMarc Zyngier nr_lpis = 0; 203893f94ea0SMarc Zyngier lpi_base = 0; 203993f94ea0SMarc Zyngier } 204084a6a2e7SMarc Zyngier 204193f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 204284a6a2e7SMarc Zyngier kfree(dev); 204384a6a2e7SMarc Zyngier kfree(itt); 204484a6a2e7SMarc Zyngier kfree(lpi_map); 2045591e5becSMarc Zyngier kfree(col_map); 204684a6a2e7SMarc Zyngier return NULL; 204784a6a2e7SMarc Zyngier } 204884a6a2e7SMarc Zyngier 2049328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 20505a9a8915SMarc Zyngier 205184a6a2e7SMarc Zyngier dev->its = its; 205284a6a2e7SMarc Zyngier dev->itt = itt; 2053c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2054591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2055591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2056591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2057591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 2058d011e4e6SMarc Zyngier mutex_init(&dev->event_map.vlpi_lock); 205984a6a2e7SMarc Zyngier dev->device_id = dev_id; 206084a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 206184a6a2e7SMarc Zyngier 20623e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 206384a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 20643e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 206584a6a2e7SMarc Zyngier 206684a6a2e7SMarc Zyngier /* Map device to its ITT */ 206784a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 206884a6a2e7SMarc Zyngier 206984a6a2e7SMarc Zyngier return dev; 207084a6a2e7SMarc Zyngier } 207184a6a2e7SMarc Zyngier 207284a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 207384a6a2e7SMarc Zyngier { 20743e39e8f5SMarc Zyngier unsigned long flags; 20753e39e8f5SMarc Zyngier 20763e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 207784a6a2e7SMarc Zyngier list_del(&its_dev->entry); 20783e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 207984a6a2e7SMarc Zyngier kfree(its_dev->itt); 208084a6a2e7SMarc Zyngier kfree(its_dev); 208184a6a2e7SMarc Zyngier } 2082b48ac83dSMarc Zyngier 2083b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 2084b48ac83dSMarc Zyngier { 2085b48ac83dSMarc Zyngier int idx; 2086b48ac83dSMarc Zyngier 2087591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 2088591e5becSMarc Zyngier dev->event_map.nr_lpis); 2089591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 2090b48ac83dSMarc Zyngier return -ENOSPC; 2091b48ac83dSMarc Zyngier 2092591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 2093591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 2094b48ac83dSMarc Zyngier 2095b48ac83dSMarc Zyngier return 0; 2096b48ac83dSMarc Zyngier } 2097b48ac83dSMarc Zyngier 209854456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 2099b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 2100b48ac83dSMarc Zyngier { 2101b48ac83dSMarc Zyngier struct its_node *its; 2102b48ac83dSMarc Zyngier struct its_device *its_dev; 210354456db9SMarc Zyngier struct msi_domain_info *msi_info; 210454456db9SMarc Zyngier u32 dev_id; 2105b48ac83dSMarc Zyngier 210654456db9SMarc Zyngier /* 210754456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 210854456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 210954456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 211054456db9SMarc Zyngier * are built on top of the ITS. 211154456db9SMarc Zyngier */ 211254456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 211354456db9SMarc Zyngier 211454456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 211554456db9SMarc Zyngier its = msi_info->data; 211654456db9SMarc Zyngier 211720b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 211820b3d54eSMarc Zyngier vpe_proxy.dev && 211920b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 212020b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 212120b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 212220b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 212320b3d54eSMarc Zyngier dev_id); 212420b3d54eSMarc Zyngier return -EINVAL; 212520b3d54eSMarc Zyngier } 212620b3d54eSMarc Zyngier 2127f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 2128e8137f4fSMarc Zyngier if (its_dev) { 2129e8137f4fSMarc Zyngier /* 2130e8137f4fSMarc Zyngier * We already have seen this ID, probably through 2131e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 2132e8137f4fSMarc Zyngier * create the device. 2133e8137f4fSMarc Zyngier */ 2134f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 2135e8137f4fSMarc Zyngier goto out; 2136e8137f4fSMarc Zyngier } 2137b48ac83dSMarc Zyngier 213893f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 2139b48ac83dSMarc Zyngier if (!its_dev) 2140b48ac83dSMarc Zyngier return -ENOMEM; 2141b48ac83dSMarc Zyngier 2142f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 2143e8137f4fSMarc Zyngier out: 2144b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 2145b48ac83dSMarc Zyngier return 0; 2146b48ac83dSMarc Zyngier } 2147b48ac83dSMarc Zyngier 214854456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 214954456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 215054456db9SMarc Zyngier }; 215154456db9SMarc Zyngier 2152b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 2153b48ac83dSMarc Zyngier unsigned int virq, 2154b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 2155b48ac83dSMarc Zyngier { 2156f833f57fSMarc Zyngier struct irq_fwspec fwspec; 2157b48ac83dSMarc Zyngier 2158f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 2159f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 2160f833f57fSMarc Zyngier fwspec.param_count = 3; 2161f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 2162f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 2163f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 21643f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 21653f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 21663f010cf1STomasz Nowicki fwspec.param_count = 2; 21673f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 21683f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 2169f833f57fSMarc Zyngier } else { 2170f833f57fSMarc Zyngier return -EINVAL; 2171f833f57fSMarc Zyngier } 2172b48ac83dSMarc Zyngier 2173f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 2174b48ac83dSMarc Zyngier } 2175b48ac83dSMarc Zyngier 2176b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 2177b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 2178b48ac83dSMarc Zyngier { 2179b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 2180b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 2181b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 2182b48ac83dSMarc Zyngier int err; 2183b48ac83dSMarc Zyngier int i; 2184b48ac83dSMarc Zyngier 2185b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2186b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 2187b48ac83dSMarc Zyngier if (err) 2188b48ac83dSMarc Zyngier return err; 2189b48ac83dSMarc Zyngier 2190b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 2191b48ac83dSMarc Zyngier if (err) 2192b48ac83dSMarc Zyngier return err; 2193b48ac83dSMarc Zyngier 2194b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 2195b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 21960d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 2197f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 2198591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 2199591e5becSMarc Zyngier (int) hwirq, virq + i); 2200b48ac83dSMarc Zyngier } 2201b48ac83dSMarc Zyngier 2202b48ac83dSMarc Zyngier return 0; 2203b48ac83dSMarc Zyngier } 2204b48ac83dSMarc Zyngier 220572491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 220672491643SThomas Gleixner struct irq_data *d, bool early) 2207aca268dfSMarc Zyngier { 2208aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2209aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2210fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 22110d224d35SMarc Zyngier int cpu; 2212fbf8f40eSGanapatrao Kulkarni 2213fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 2214fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 2215fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 2216aca268dfSMarc Zyngier 2217591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 22180d224d35SMarc Zyngier cpu = cpumask_first(cpu_mask); 22190d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 22200d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 2221591e5becSMarc Zyngier 2222aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 22236a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 222472491643SThomas Gleixner return 0; 2225aca268dfSMarc Zyngier } 2226aca268dfSMarc Zyngier 2227aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 2228aca268dfSMarc Zyngier struct irq_data *d) 2229aca268dfSMarc Zyngier { 2230aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2231aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2232aca268dfSMarc Zyngier 2233aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 2234aca268dfSMarc Zyngier its_send_discard(its_dev, event); 2235aca268dfSMarc Zyngier } 2236aca268dfSMarc Zyngier 2237b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 2238b48ac83dSMarc Zyngier unsigned int nr_irqs) 2239b48ac83dSMarc Zyngier { 2240b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 2241b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2242b48ac83dSMarc Zyngier int i; 2243b48ac83dSMarc Zyngier 2244b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2245b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 2246b48ac83dSMarc Zyngier virq + i); 2247aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 2248b48ac83dSMarc Zyngier 2249b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 2250591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 2251b48ac83dSMarc Zyngier 2252b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 22532da39949SMarc Zyngier irq_domain_reset_irq_data(data); 2254b48ac83dSMarc Zyngier } 2255b48ac83dSMarc Zyngier 2256b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 2257591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 2258591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 2259cf2be8baSMarc Zyngier its_lpi_free_chunks(its_dev->event_map.lpi_map, 2260cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 2261cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 2262cf2be8baSMarc Zyngier kfree(its_dev->event_map.col_map); 2263b48ac83dSMarc Zyngier 2264b48ac83dSMarc Zyngier /* Unmap device/itt */ 2265b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 2266b48ac83dSMarc Zyngier its_free_device(its_dev); 2267b48ac83dSMarc Zyngier } 2268b48ac83dSMarc Zyngier 2269b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 2270b48ac83dSMarc Zyngier } 2271b48ac83dSMarc Zyngier 2272b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 2273b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 2274b48ac83dSMarc Zyngier .free = its_irq_domain_free, 2275aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 2276aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 2277b48ac83dSMarc Zyngier }; 22784c21f3c2SMarc Zyngier 227920b3d54eSMarc Zyngier /* 228020b3d54eSMarc Zyngier * This is insane. 228120b3d54eSMarc Zyngier * 228220b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 228320b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 228420b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 228520b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 228620b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 228720b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 228820b3d54eSMarc Zyngier * 228920b3d54eSMarc Zyngier * Broken by design(tm). 229020b3d54eSMarc Zyngier */ 229120b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 229220b3d54eSMarc Zyngier { 229320b3d54eSMarc Zyngier /* Already unmapped? */ 229420b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 229520b3d54eSMarc Zyngier return; 229620b3d54eSMarc Zyngier 229720b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 229820b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 229920b3d54eSMarc Zyngier 230020b3d54eSMarc Zyngier /* 230120b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 230220b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 230320b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 230420b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 230520b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 230620b3d54eSMarc Zyngier */ 230720b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 230820b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 230920b3d54eSMarc Zyngier 231020b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 231120b3d54eSMarc Zyngier } 231220b3d54eSMarc Zyngier 231320b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 231420b3d54eSMarc Zyngier { 231520b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 231620b3d54eSMarc Zyngier unsigned long flags; 231720b3d54eSMarc Zyngier 231820b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 231920b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 232020b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 232120b3d54eSMarc Zyngier } 232220b3d54eSMarc Zyngier } 232320b3d54eSMarc Zyngier 232420b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 232520b3d54eSMarc Zyngier { 232620b3d54eSMarc Zyngier /* Already mapped? */ 232720b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 232820b3d54eSMarc Zyngier return; 232920b3d54eSMarc Zyngier 233020b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 233120b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 233220b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 233320b3d54eSMarc Zyngier 233420b3d54eSMarc Zyngier /* Map the new VPE instead */ 233520b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 233620b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 233720b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 233820b3d54eSMarc Zyngier 233920b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 234020b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 234120b3d54eSMarc Zyngier } 234220b3d54eSMarc Zyngier 2343958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 2344958b90d1SMarc Zyngier { 2345958b90d1SMarc Zyngier unsigned long flags; 2346958b90d1SMarc Zyngier struct its_collection *target_col; 2347958b90d1SMarc Zyngier 2348958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2349958b90d1SMarc Zyngier void __iomem *rdbase; 2350958b90d1SMarc Zyngier 2351958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 2352958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2353958b90d1SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2354958b90d1SMarc Zyngier cpu_relax(); 2355958b90d1SMarc Zyngier 2356958b90d1SMarc Zyngier return; 2357958b90d1SMarc Zyngier } 2358958b90d1SMarc Zyngier 2359958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 2360958b90d1SMarc Zyngier 2361958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 2362958b90d1SMarc Zyngier 2363958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 2364958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 2365958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 2366958b90d1SMarc Zyngier 2367958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 2368958b90d1SMarc Zyngier } 2369958b90d1SMarc Zyngier 23703171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 23713171a47aSMarc Zyngier const struct cpumask *mask_val, 23723171a47aSMarc Zyngier bool force) 23733171a47aSMarc Zyngier { 23743171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 23753171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 23763171a47aSMarc Zyngier 23773171a47aSMarc Zyngier /* 23783171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 237920b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 2380958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 2381958b90d1SMarc Zyngier * interrupt to its new location. 23823171a47aSMarc Zyngier */ 23833171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 2384958b90d1SMarc Zyngier int from = vpe->col_idx; 2385958b90d1SMarc Zyngier 23863171a47aSMarc Zyngier vpe->col_idx = cpu; 23873171a47aSMarc Zyngier its_send_vmovp(vpe); 2388958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 23893171a47aSMarc Zyngier } 23903171a47aSMarc Zyngier 23913171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 23923171a47aSMarc Zyngier } 23933171a47aSMarc Zyngier 2394e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 2395e643d803SMarc Zyngier { 2396e643d803SMarc Zyngier void * __iomem vlpi_base = gic_data_rdist_vlpi_base(); 2397e643d803SMarc Zyngier u64 val; 2398e643d803SMarc Zyngier 2399e643d803SMarc Zyngier /* Schedule the VPE */ 2400e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 2401e643d803SMarc Zyngier GENMASK_ULL(51, 12); 2402e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 2403e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 2404e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 2405e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 2406e643d803SMarc Zyngier 2407e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 2408e643d803SMarc Zyngier GENMASK_ULL(51, 16); 2409e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 2410e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 2411e643d803SMarc Zyngier /* 2412e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 2413e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 2414e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 2415e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 2416e643d803SMarc Zyngier * that the pending table is empty. A good implementation 2417e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 2418e643d803SMarc Zyngier * making this a tolerable issue. 2419e643d803SMarc Zyngier */ 2420e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2421e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 2422e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 2423e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2424e643d803SMarc Zyngier } 2425e643d803SMarc Zyngier 2426e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 2427e643d803SMarc Zyngier { 2428e643d803SMarc Zyngier void * __iomem vlpi_base = gic_data_rdist_vlpi_base(); 2429e643d803SMarc Zyngier u32 count = 1000000; /* 1s! */ 2430e643d803SMarc Zyngier bool clean; 2431e643d803SMarc Zyngier u64 val; 2432e643d803SMarc Zyngier 2433e643d803SMarc Zyngier /* We're being scheduled out */ 2434e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2435e643d803SMarc Zyngier val &= ~GICR_VPENDBASER_Valid; 2436e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2437e643d803SMarc Zyngier 2438e643d803SMarc Zyngier do { 2439e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2440e643d803SMarc Zyngier clean = !(val & GICR_VPENDBASER_Dirty); 2441e643d803SMarc Zyngier if (!clean) { 2442e643d803SMarc Zyngier count--; 2443e643d803SMarc Zyngier cpu_relax(); 2444e643d803SMarc Zyngier udelay(1); 2445e643d803SMarc Zyngier } 2446e643d803SMarc Zyngier } while (!clean && count); 2447e643d803SMarc Zyngier 2448e643d803SMarc Zyngier if (unlikely(!clean && !count)) { 2449e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2450e643d803SMarc Zyngier vpe->idai = false; 2451e643d803SMarc Zyngier vpe->pending_last = true; 2452e643d803SMarc Zyngier } else { 2453e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 2454e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 2455e643d803SMarc Zyngier } 2456e643d803SMarc Zyngier } 2457e643d803SMarc Zyngier 245840619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 245940619a2eSMarc Zyngier { 246040619a2eSMarc Zyngier struct its_node *its; 246140619a2eSMarc Zyngier 246240619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 246340619a2eSMarc Zyngier if (!its->is_v4) 246440619a2eSMarc Zyngier continue; 246540619a2eSMarc Zyngier 246640619a2eSMarc Zyngier its_send_vinvall(its, vpe); 246740619a2eSMarc Zyngier } 246840619a2eSMarc Zyngier } 246940619a2eSMarc Zyngier 2470e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 2471e643d803SMarc Zyngier { 2472e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2473e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 2474e643d803SMarc Zyngier 2475e643d803SMarc Zyngier switch (info->cmd_type) { 2476e643d803SMarc Zyngier case SCHEDULE_VPE: 2477e643d803SMarc Zyngier its_vpe_schedule(vpe); 2478e643d803SMarc Zyngier return 0; 2479e643d803SMarc Zyngier 2480e643d803SMarc Zyngier case DESCHEDULE_VPE: 2481e643d803SMarc Zyngier its_vpe_deschedule(vpe); 2482e643d803SMarc Zyngier return 0; 2483e643d803SMarc Zyngier 24845e2f7642SMarc Zyngier case INVALL_VPE: 248540619a2eSMarc Zyngier its_vpe_invall(vpe); 24865e2f7642SMarc Zyngier return 0; 24875e2f7642SMarc Zyngier 2488e643d803SMarc Zyngier default: 2489e643d803SMarc Zyngier return -EINVAL; 2490e643d803SMarc Zyngier } 2491e643d803SMarc Zyngier } 2492e643d803SMarc Zyngier 249320b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 249420b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 249520b3d54eSMarc Zyngier { 249620b3d54eSMarc Zyngier unsigned long flags; 249720b3d54eSMarc Zyngier 249820b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 249920b3d54eSMarc Zyngier 250020b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 250120b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 250220b3d54eSMarc Zyngier 250320b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 250420b3d54eSMarc Zyngier } 250520b3d54eSMarc Zyngier 2506f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 2507f6a91da7SMarc Zyngier { 2508f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 250920b3d54eSMarc Zyngier 251020b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 2511f6a91da7SMarc Zyngier void __iomem *rdbase; 2512f6a91da7SMarc Zyngier 2513f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2514f6a91da7SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_INVLPIR); 2515f6a91da7SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2516f6a91da7SMarc Zyngier cpu_relax(); 251720b3d54eSMarc Zyngier } else { 251820b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 251920b3d54eSMarc Zyngier } 2520f6a91da7SMarc Zyngier } 2521f6a91da7SMarc Zyngier 2522f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 2523f6a91da7SMarc Zyngier { 2524f6a91da7SMarc Zyngier /* 2525f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 2526f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 2527f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 2528f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 2529f6a91da7SMarc Zyngier */ 2530f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 2531f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2532f6a91da7SMarc Zyngier } 2533f6a91da7SMarc Zyngier 2534f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 2535f6a91da7SMarc Zyngier { 2536f6a91da7SMarc Zyngier /* Same hack as above... */ 2537f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 2538f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2539f6a91da7SMarc Zyngier } 2540f6a91da7SMarc Zyngier 2541e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 2542e57a3e28SMarc Zyngier enum irqchip_irq_state which, 2543e57a3e28SMarc Zyngier bool state) 2544e57a3e28SMarc Zyngier { 2545e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2546e57a3e28SMarc Zyngier 2547e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 2548e57a3e28SMarc Zyngier return -EINVAL; 2549e57a3e28SMarc Zyngier 2550e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2551e57a3e28SMarc Zyngier void __iomem *rdbase; 2552e57a3e28SMarc Zyngier 2553e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2554e57a3e28SMarc Zyngier if (state) { 2555e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 2556e57a3e28SMarc Zyngier } else { 2557e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2558e57a3e28SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2559e57a3e28SMarc Zyngier cpu_relax(); 2560e57a3e28SMarc Zyngier } 2561e57a3e28SMarc Zyngier } else { 2562e57a3e28SMarc Zyngier if (state) 2563e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 2564e57a3e28SMarc Zyngier else 2565e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 2566e57a3e28SMarc Zyngier } 2567e57a3e28SMarc Zyngier 2568e57a3e28SMarc Zyngier return 0; 2569e57a3e28SMarc Zyngier } 2570e57a3e28SMarc Zyngier 25718fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 25728fff27aeSMarc Zyngier .name = "GICv4-vpe", 2573f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 2574f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 2575f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 25763171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 2577e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 2578e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 25798fff27aeSMarc Zyngier }; 25808fff27aeSMarc Zyngier 25817d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 25827d75bbb4SMarc Zyngier { 25837d75bbb4SMarc Zyngier return ida_simple_get(&its_vpeid_ida, 0, 1 << 16, GFP_KERNEL); 25847d75bbb4SMarc Zyngier } 25857d75bbb4SMarc Zyngier 25867d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 25877d75bbb4SMarc Zyngier { 25887d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 25897d75bbb4SMarc Zyngier } 25907d75bbb4SMarc Zyngier 25917d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 25927d75bbb4SMarc Zyngier { 25937d75bbb4SMarc Zyngier struct page *vpt_page; 25947d75bbb4SMarc Zyngier int vpe_id; 25957d75bbb4SMarc Zyngier 25967d75bbb4SMarc Zyngier /* Allocate vpe_id */ 25977d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 25987d75bbb4SMarc Zyngier if (vpe_id < 0) 25997d75bbb4SMarc Zyngier return vpe_id; 26007d75bbb4SMarc Zyngier 26017d75bbb4SMarc Zyngier /* Allocate VPT */ 26027d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 26037d75bbb4SMarc Zyngier if (!vpt_page) { 26047d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 26057d75bbb4SMarc Zyngier return -ENOMEM; 26067d75bbb4SMarc Zyngier } 26077d75bbb4SMarc Zyngier 26087d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 26097d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 26107d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 26117d75bbb4SMarc Zyngier return -ENOMEM; 26127d75bbb4SMarc Zyngier } 26137d75bbb4SMarc Zyngier 26147d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 26157d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 261620b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 26177d75bbb4SMarc Zyngier 26187d75bbb4SMarc Zyngier return 0; 26197d75bbb4SMarc Zyngier } 26207d75bbb4SMarc Zyngier 26217d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 26227d75bbb4SMarc Zyngier { 262320b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 26247d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 26257d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 26267d75bbb4SMarc Zyngier } 26277d75bbb4SMarc Zyngier 26287d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 26297d75bbb4SMarc Zyngier unsigned int virq, 26307d75bbb4SMarc Zyngier unsigned int nr_irqs) 26317d75bbb4SMarc Zyngier { 26327d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 26337d75bbb4SMarc Zyngier int i; 26347d75bbb4SMarc Zyngier 26357d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 26367d75bbb4SMarc Zyngier 26377d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 26387d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 26397d75bbb4SMarc Zyngier virq + i); 26407d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 26417d75bbb4SMarc Zyngier 26427d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 26437d75bbb4SMarc Zyngier 26447d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 26457d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 26467d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 26477d75bbb4SMarc Zyngier } 26487d75bbb4SMarc Zyngier 26497d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 26507d75bbb4SMarc Zyngier its_lpi_free_chunks(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 26517d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 26527d75bbb4SMarc Zyngier } 26537d75bbb4SMarc Zyngier } 26547d75bbb4SMarc Zyngier 26557d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 26567d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 26577d75bbb4SMarc Zyngier { 26587d75bbb4SMarc Zyngier struct its_vm *vm = args; 26597d75bbb4SMarc Zyngier unsigned long *bitmap; 26607d75bbb4SMarc Zyngier struct page *vprop_page; 26617d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 26627d75bbb4SMarc Zyngier 26637d75bbb4SMarc Zyngier BUG_ON(!vm); 26647d75bbb4SMarc Zyngier 26657d75bbb4SMarc Zyngier bitmap = its_lpi_alloc_chunks(nr_irqs, &base, &nr_ids); 26667d75bbb4SMarc Zyngier if (!bitmap) 26677d75bbb4SMarc Zyngier return -ENOMEM; 26687d75bbb4SMarc Zyngier 26697d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 26707d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 26717d75bbb4SMarc Zyngier return -ENOMEM; 26727d75bbb4SMarc Zyngier } 26737d75bbb4SMarc Zyngier 26747d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 26757d75bbb4SMarc Zyngier if (!vprop_page) { 26767d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 26777d75bbb4SMarc Zyngier return -ENOMEM; 26787d75bbb4SMarc Zyngier } 26797d75bbb4SMarc Zyngier 26807d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 26817d75bbb4SMarc Zyngier vm->db_lpi_base = base; 26827d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 26837d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 26847d75bbb4SMarc Zyngier 26857d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 26867d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 26877d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 26887d75bbb4SMarc Zyngier if (err) 26897d75bbb4SMarc Zyngier break; 26907d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 26917d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 26927d75bbb4SMarc Zyngier if (err) 26937d75bbb4SMarc Zyngier break; 26947d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 26957d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 26967d75bbb4SMarc Zyngier set_bit(i, bitmap); 26977d75bbb4SMarc Zyngier } 26987d75bbb4SMarc Zyngier 26997d75bbb4SMarc Zyngier if (err) { 27007d75bbb4SMarc Zyngier if (i > 0) 27017d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 27027d75bbb4SMarc Zyngier 27037d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 27047d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 27057d75bbb4SMarc Zyngier } 27067d75bbb4SMarc Zyngier 27077d75bbb4SMarc Zyngier return err; 27087d75bbb4SMarc Zyngier } 27097d75bbb4SMarc Zyngier 271072491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 271172491643SThomas Gleixner struct irq_data *d, bool early) 2712eb78192bSMarc Zyngier { 2713eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 271440619a2eSMarc Zyngier struct its_node *its; 2715eb78192bSMarc Zyngier 2716eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 2717eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 271840619a2eSMarc Zyngier 271940619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 272040619a2eSMarc Zyngier if (!its->is_v4) 272140619a2eSMarc Zyngier continue; 272240619a2eSMarc Zyngier 272375fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 272440619a2eSMarc Zyngier its_send_vinvall(its, vpe); 272540619a2eSMarc Zyngier } 272640619a2eSMarc Zyngier 272772491643SThomas Gleixner return 0; 2728eb78192bSMarc Zyngier } 2729eb78192bSMarc Zyngier 2730eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 2731eb78192bSMarc Zyngier struct irq_data *d) 2732eb78192bSMarc Zyngier { 2733eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 273475fd951bSMarc Zyngier struct its_node *its; 2735eb78192bSMarc Zyngier 273675fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 273775fd951bSMarc Zyngier if (!its->is_v4) 273875fd951bSMarc Zyngier continue; 273975fd951bSMarc Zyngier 274075fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 274175fd951bSMarc Zyngier } 2742eb78192bSMarc Zyngier } 2743eb78192bSMarc Zyngier 27448fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 27457d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 27467d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 2747eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 2748eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 27498fff27aeSMarc Zyngier }; 27508fff27aeSMarc Zyngier 27514559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 27524559fbb3SYun Wu { 27534559fbb3SYun Wu u32 count = 1000000; /* 1s */ 27544559fbb3SYun Wu u32 val; 27554559fbb3SYun Wu 27564559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 27577611da86SDavid Daney /* 27587611da86SDavid Daney * GIC architecture specification requires the ITS to be both 27597611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 27607611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 27617611da86SDavid Daney */ 27627611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 27634559fbb3SYun Wu return 0; 27644559fbb3SYun Wu 27654559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 2766d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 27674559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 27684559fbb3SYun Wu 27694559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 27704559fbb3SYun Wu while (1) { 27714559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 27724559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 27734559fbb3SYun Wu return 0; 27744559fbb3SYun Wu 27754559fbb3SYun Wu count--; 27764559fbb3SYun Wu if (!count) 27774559fbb3SYun Wu return -EBUSY; 27784559fbb3SYun Wu 27794559fbb3SYun Wu cpu_relax(); 27804559fbb3SYun Wu udelay(1); 27814559fbb3SYun Wu } 27824559fbb3SYun Wu } 27834559fbb3SYun Wu 27849d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 278594100970SRobert Richter { 278694100970SRobert Richter struct its_node *its = data; 278794100970SRobert Richter 2788fa150019SArd Biesheuvel /* erratum 22375: only alloc 8MB table size */ 2789fa150019SArd Biesheuvel its->device_ids = 0x14; /* 20 bits, 8MB */ 279094100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 27919d111d49SArd Biesheuvel 27929d111d49SArd Biesheuvel return true; 279394100970SRobert Richter } 279494100970SRobert Richter 27959d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 2796fbf8f40eSGanapatrao Kulkarni { 2797fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 2798fbf8f40eSGanapatrao Kulkarni 2799fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 28009d111d49SArd Biesheuvel 28019d111d49SArd Biesheuvel return true; 2802fbf8f40eSGanapatrao Kulkarni } 2803fbf8f40eSGanapatrao Kulkarni 28049d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 280590922a2dSShanker Donthineni { 280690922a2dSShanker Donthineni struct its_node *its = data; 280790922a2dSShanker Donthineni 280890922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 280990922a2dSShanker Donthineni its->ite_size = 16; 28109d111d49SArd Biesheuvel 28119d111d49SArd Biesheuvel return true; 281290922a2dSShanker Donthineni } 281390922a2dSShanker Donthineni 2814558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 2815558b0165SArd Biesheuvel { 2816558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 2817558b0165SArd Biesheuvel 2818558b0165SArd Biesheuvel /* 2819558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 2820558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 2821558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 2822558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 2823558b0165SArd Biesheuvel * the window offset. 2824558b0165SArd Biesheuvel */ 2825558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 2826558b0165SArd Biesheuvel } 2827558b0165SArd Biesheuvel 2828558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 2829558b0165SArd Biesheuvel { 2830558b0165SArd Biesheuvel struct its_node *its = data; 2831558b0165SArd Biesheuvel u32 pre_its_window[2]; 2832558b0165SArd Biesheuvel u32 ids; 2833558b0165SArd Biesheuvel 2834558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 2835558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 2836558b0165SArd Biesheuvel pre_its_window, 2837558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 2838558b0165SArd Biesheuvel 2839558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 2840558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 2841558b0165SArd Biesheuvel 2842558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 2843558b0165SArd Biesheuvel if (its->device_ids > ids) 2844558b0165SArd Biesheuvel its->device_ids = ids; 2845558b0165SArd Biesheuvel 2846558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 2847558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 2848558b0165SArd Biesheuvel return true; 2849558b0165SArd Biesheuvel } 2850558b0165SArd Biesheuvel return false; 2851558b0165SArd Biesheuvel } 2852558b0165SArd Biesheuvel 28535c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 28545c9a882eSMarc Zyngier { 28555c9a882eSMarc Zyngier struct its_node *its = data; 28565c9a882eSMarc Zyngier 28575c9a882eSMarc Zyngier /* 28585c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 28595c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 28605c9a882eSMarc Zyngier */ 28615c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 28625c9a882eSMarc Zyngier return true; 28635c9a882eSMarc Zyngier } 28645c9a882eSMarc Zyngier 286567510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 286694100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 286794100970SRobert Richter { 286894100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 286994100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 287094100970SRobert Richter .mask = 0xffff0fff, 287194100970SRobert Richter .init = its_enable_quirk_cavium_22375, 287294100970SRobert Richter }, 287394100970SRobert Richter #endif 2874fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 2875fbf8f40eSGanapatrao Kulkarni { 2876fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 2877fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 2878fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 2879fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 2880fbf8f40eSGanapatrao Kulkarni }, 2881fbf8f40eSGanapatrao Kulkarni #endif 288290922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 288390922a2dSShanker Donthineni { 288490922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 288590922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 288690922a2dSShanker Donthineni .mask = 0xffffffff, 288790922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 288890922a2dSShanker Donthineni }, 288990922a2dSShanker Donthineni #endif 2890558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 2891558b0165SArd Biesheuvel { 2892558b0165SArd Biesheuvel /* 2893558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 2894558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 2895558b0165SArd Biesheuvel * special handling in software. 2896558b0165SArd Biesheuvel */ 2897558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 2898558b0165SArd Biesheuvel .iidr = 0x0001143b, 2899558b0165SArd Biesheuvel .mask = 0xffffffff, 2900558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 2901558b0165SArd Biesheuvel }, 2902558b0165SArd Biesheuvel #endif 29035c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 29045c9a882eSMarc Zyngier { 29055c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 29065c9a882eSMarc Zyngier .iidr = 0x00000004, 29075c9a882eSMarc Zyngier .mask = 0xffffffff, 29085c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 29095c9a882eSMarc Zyngier }, 29105c9a882eSMarc Zyngier #endif 291167510ccaSRobert Richter { 291267510ccaSRobert Richter } 291367510ccaSRobert Richter }; 291467510ccaSRobert Richter 291567510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 291667510ccaSRobert Richter { 291767510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 291867510ccaSRobert Richter 291967510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 292067510ccaSRobert Richter } 292167510ccaSRobert Richter 2922db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 2923d14ae5e6STomasz Nowicki { 2924d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 2925d14ae5e6STomasz Nowicki struct msi_domain_info *info; 2926d14ae5e6STomasz Nowicki 2927d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 2928d14ae5e6STomasz Nowicki if (!info) 2929d14ae5e6STomasz Nowicki return -ENOMEM; 2930d14ae5e6STomasz Nowicki 2931db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 2932d14ae5e6STomasz Nowicki if (!inner_domain) { 2933d14ae5e6STomasz Nowicki kfree(info); 2934d14ae5e6STomasz Nowicki return -ENOMEM; 2935d14ae5e6STomasz Nowicki } 2936d14ae5e6STomasz Nowicki 2937db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 293896f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 2939558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 2940d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 2941d14ae5e6STomasz Nowicki info->data = its; 2942d14ae5e6STomasz Nowicki inner_domain->host_data = info; 2943d14ae5e6STomasz Nowicki 2944d14ae5e6STomasz Nowicki return 0; 2945d14ae5e6STomasz Nowicki } 2946d14ae5e6STomasz Nowicki 29478fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 29488fff27aeSMarc Zyngier { 294920b3d54eSMarc Zyngier struct its_node *its; 295020b3d54eSMarc Zyngier u32 devid; 295120b3d54eSMarc Zyngier int entries; 295220b3d54eSMarc Zyngier 295320b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 295420b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 295520b3d54eSMarc Zyngier return 0; 295620b3d54eSMarc Zyngier } 295720b3d54eSMarc Zyngier 295820b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 295920b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 296020b3d54eSMarc Zyngier 296120b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 296220b3d54eSMarc Zyngier vpe_proxy.vpes = kzalloc(sizeof(*vpe_proxy.vpes) * entries, 296320b3d54eSMarc Zyngier GFP_KERNEL); 296420b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 296520b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 296620b3d54eSMarc Zyngier return -ENOMEM; 296720b3d54eSMarc Zyngier } 296820b3d54eSMarc Zyngier 296920b3d54eSMarc Zyngier /* Use the last possible DevID */ 297020b3d54eSMarc Zyngier devid = GENMASK(its->device_ids - 1, 0); 297120b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 297220b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 297320b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 297420b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 297520b3d54eSMarc Zyngier return -ENOMEM; 297620b3d54eSMarc Zyngier } 297720b3d54eSMarc Zyngier 297820b3d54eSMarc Zyngier BUG_ON(entries != vpe_proxy.dev->nr_ites); 297920b3d54eSMarc Zyngier 298020b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 298120b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 298220b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 298320b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 298420b3d54eSMarc Zyngier 29858fff27aeSMarc Zyngier return 0; 29868fff27aeSMarc Zyngier } 29878fff27aeSMarc Zyngier 29883dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 29893dfa576bSMarc Zyngier void __iomem *its_base) 29903dfa576bSMarc Zyngier { 29913dfa576bSMarc Zyngier int its_number; 29923dfa576bSMarc Zyngier u32 ctlr; 29933dfa576bSMarc Zyngier 29943dfa576bSMarc Zyngier /* 29953dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 29963dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 29973dfa576bSMarc Zyngier * locking. Should this change, we should address 29983dfa576bSMarc Zyngier * this. 29993dfa576bSMarc Zyngier */ 3000ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 3001ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 30023dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 30033dfa576bSMarc Zyngier &res->start); 30043dfa576bSMarc Zyngier return -EINVAL; 30053dfa576bSMarc Zyngier } 30063dfa576bSMarc Zyngier 30073dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 30083dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 30093dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 30103dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 30113dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 30123dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 30133dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 30143dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 30153dfa576bSMarc Zyngier } 30163dfa576bSMarc Zyngier 30173dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 30183dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 30193dfa576bSMarc Zyngier &res->start, its_number); 30203dfa576bSMarc Zyngier return -EINVAL; 30213dfa576bSMarc Zyngier } 30223dfa576bSMarc Zyngier 30233dfa576bSMarc Zyngier return its_number; 30243dfa576bSMarc Zyngier } 30253dfa576bSMarc Zyngier 3026db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 3027db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 30284c21f3c2SMarc Zyngier { 30294c21f3c2SMarc Zyngier struct its_node *its; 30304c21f3c2SMarc Zyngier void __iomem *its_base; 30313dfa576bSMarc Zyngier u32 val, ctlr; 30323dfa576bSMarc Zyngier u64 baser, tmp, typer; 30334c21f3c2SMarc Zyngier int err; 30344c21f3c2SMarc Zyngier 3035db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 30364c21f3c2SMarc Zyngier if (!its_base) { 3037db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 30384c21f3c2SMarc Zyngier return -ENOMEM; 30394c21f3c2SMarc Zyngier } 30404c21f3c2SMarc Zyngier 30414c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 30424c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 3043db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 30444c21f3c2SMarc Zyngier err = -ENODEV; 30454c21f3c2SMarc Zyngier goto out_unmap; 30464c21f3c2SMarc Zyngier } 30474c21f3c2SMarc Zyngier 30484559fbb3SYun Wu err = its_force_quiescent(its_base); 30494559fbb3SYun Wu if (err) { 3050db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 30514559fbb3SYun Wu goto out_unmap; 30524559fbb3SYun Wu } 30534559fbb3SYun Wu 3054db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 30554c21f3c2SMarc Zyngier 30564c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 30574c21f3c2SMarc Zyngier if (!its) { 30584c21f3c2SMarc Zyngier err = -ENOMEM; 30594c21f3c2SMarc Zyngier goto out_unmap; 30604c21f3c2SMarc Zyngier } 30614c21f3c2SMarc Zyngier 30624c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 30634c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 30644c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 30653dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 30664c21f3c2SMarc Zyngier its->base = its_base; 3067db40f0a7STomasz Nowicki its->phys_base = res->start; 30683dfa576bSMarc Zyngier its->ite_size = GITS_TYPER_ITT_ENTRY_SIZE(typer); 3069fa150019SArd Biesheuvel its->device_ids = GITS_TYPER_DEVBITS(typer); 30703dfa576bSMarc Zyngier its->is_v4 = !!(typer & GITS_TYPER_VLPIS); 30713dfa576bSMarc Zyngier if (its->is_v4) { 30723dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 30733dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 30743dfa576bSMarc Zyngier if (err < 0) 30753dfa576bSMarc Zyngier goto out_free_its; 30763dfa576bSMarc Zyngier 3077debf6d02SMarc Zyngier its->list_nr = err; 3078debf6d02SMarc Zyngier 30793dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 30803dfa576bSMarc Zyngier &res->start, err); 30813dfa576bSMarc Zyngier } else { 30823dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 30833dfa576bSMarc Zyngier } 30843dfa576bSMarc Zyngier } 30853dfa576bSMarc Zyngier 3086db40f0a7STomasz Nowicki its->numa_node = numa_node; 30874c21f3c2SMarc Zyngier 30885bc13c2cSRobert Richter its->cmd_base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 30895bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 30904c21f3c2SMarc Zyngier if (!its->cmd_base) { 30914c21f3c2SMarc Zyngier err = -ENOMEM; 30924c21f3c2SMarc Zyngier goto out_free_its; 30934c21f3c2SMarc Zyngier } 30944c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 3095558b0165SArd Biesheuvel its->fwnode_handle = handle; 3096558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 3097558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 30984c21f3c2SMarc Zyngier 309967510ccaSRobert Richter its_enable_quirks(its); 310067510ccaSRobert Richter 31010e0b0f69SShanker Donthineni err = its_alloc_tables(its); 31024c21f3c2SMarc Zyngier if (err) 31034c21f3c2SMarc Zyngier goto out_free_cmd; 31044c21f3c2SMarc Zyngier 31054c21f3c2SMarc Zyngier err = its_alloc_collections(its); 31064c21f3c2SMarc Zyngier if (err) 31074c21f3c2SMarc Zyngier goto out_free_tables; 31084c21f3c2SMarc Zyngier 31094c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 31102fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 31114c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 31124c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 31134c21f3c2SMarc Zyngier GITS_CBASER_VALID); 31144c21f3c2SMarc Zyngier 31150968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 31160968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 31174c21f3c2SMarc Zyngier 31184ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 3119241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 3120241a386cSMarc Zyngier /* 3121241a386cSMarc Zyngier * The HW reports non-shareable, we must 3122241a386cSMarc Zyngier * remove the cacheability attributes as 3123241a386cSMarc Zyngier * well. 3124241a386cSMarc Zyngier */ 3125241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 3126241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 3127241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 31280968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 3129241a386cSMarc Zyngier } 31304c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 31314c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 31324c21f3c2SMarc Zyngier } 31334c21f3c2SMarc Zyngier 31340968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 31353dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 3136d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 3137d51c4b4dSMarc Zyngier if (its->is_v4) 3138d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 3139d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 3140241a386cSMarc Zyngier 3141db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 3142d14ae5e6STomasz Nowicki if (err) 314354456db9SMarc Zyngier goto out_free_tables; 31444c21f3c2SMarc Zyngier 31454c21f3c2SMarc Zyngier spin_lock(&its_lock); 31464c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 31474c21f3c2SMarc Zyngier spin_unlock(&its_lock); 31484c21f3c2SMarc Zyngier 31494c21f3c2SMarc Zyngier return 0; 31504c21f3c2SMarc Zyngier 31514c21f3c2SMarc Zyngier out_free_tables: 31524c21f3c2SMarc Zyngier its_free_tables(its); 31534c21f3c2SMarc Zyngier out_free_cmd: 31545bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 31554c21f3c2SMarc Zyngier out_free_its: 31564c21f3c2SMarc Zyngier kfree(its); 31574c21f3c2SMarc Zyngier out_unmap: 31584c21f3c2SMarc Zyngier iounmap(its_base); 3159db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 31604c21f3c2SMarc Zyngier return err; 31614c21f3c2SMarc Zyngier } 31624c21f3c2SMarc Zyngier 31634c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 31644c21f3c2SMarc Zyngier { 3165589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 31664c21f3c2SMarc Zyngier } 31674c21f3c2SMarc Zyngier 31684c21f3c2SMarc Zyngier int its_cpu_init(void) 31694c21f3c2SMarc Zyngier { 317016acae72SVladimir Murzin if (!list_empty(&its_nodes)) { 31714c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 31724c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 31734c21f3c2SMarc Zyngier return -ENXIO; 31744c21f3c2SMarc Zyngier } 31754c21f3c2SMarc Zyngier its_cpu_init_lpis(); 31764c21f3c2SMarc Zyngier its_cpu_init_collection(); 31774c21f3c2SMarc Zyngier } 31784c21f3c2SMarc Zyngier 31794c21f3c2SMarc Zyngier return 0; 31804c21f3c2SMarc Zyngier } 31814c21f3c2SMarc Zyngier 3182935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 31834c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 31844c21f3c2SMarc Zyngier {}, 31854c21f3c2SMarc Zyngier }; 31864c21f3c2SMarc Zyngier 3187db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 31884c21f3c2SMarc Zyngier { 31894c21f3c2SMarc Zyngier struct device_node *np; 3190db40f0a7STomasz Nowicki struct resource res; 31914c21f3c2SMarc Zyngier 31924c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 31934c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 3194d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 3195e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 3196e81f54c6SRob Herring np); 3197d14ae5e6STomasz Nowicki continue; 3198d14ae5e6STomasz Nowicki } 3199d14ae5e6STomasz Nowicki 3200db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 3201e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 3202db40f0a7STomasz Nowicki continue; 32034c21f3c2SMarc Zyngier } 32044c21f3c2SMarc Zyngier 3205db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 3206db40f0a7STomasz Nowicki } 3207db40f0a7STomasz Nowicki return 0; 3208db40f0a7STomasz Nowicki } 3209db40f0a7STomasz Nowicki 32103f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 32113f010cf1STomasz Nowicki 32123f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 32133f010cf1STomasz Nowicki 3214d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 3215dbd2b826SGanapatrao Kulkarni struct its_srat_map { 3216dbd2b826SGanapatrao Kulkarni /* numa node id */ 3217dbd2b826SGanapatrao Kulkarni u32 numa_node; 3218dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 3219dbd2b826SGanapatrao Kulkarni u32 its_id; 3220dbd2b826SGanapatrao Kulkarni }; 3221dbd2b826SGanapatrao Kulkarni 3222fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 3223dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 3224dbd2b826SGanapatrao Kulkarni 3225dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 3226dbd2b826SGanapatrao Kulkarni { 3227dbd2b826SGanapatrao Kulkarni int i; 3228dbd2b826SGanapatrao Kulkarni 3229dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 3230dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 3231dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 3232dbd2b826SGanapatrao Kulkarni } 3233dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 3234dbd2b826SGanapatrao Kulkarni } 3235dbd2b826SGanapatrao Kulkarni 3236fdf6e7a8SHanjun Guo static int __init gic_acpi_match_srat_its(struct acpi_subtable_header *header, 3237fdf6e7a8SHanjun Guo const unsigned long end) 3238fdf6e7a8SHanjun Guo { 3239fdf6e7a8SHanjun Guo return 0; 3240fdf6e7a8SHanjun Guo } 3241fdf6e7a8SHanjun Guo 3242dbd2b826SGanapatrao Kulkarni static int __init gic_acpi_parse_srat_its(struct acpi_subtable_header *header, 3243dbd2b826SGanapatrao Kulkarni const unsigned long end) 3244dbd2b826SGanapatrao Kulkarni { 3245dbd2b826SGanapatrao Kulkarni int node; 3246dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 3247dbd2b826SGanapatrao Kulkarni 3248dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 3249dbd2b826SGanapatrao Kulkarni if (!its_affinity) 3250dbd2b826SGanapatrao Kulkarni return -EINVAL; 3251dbd2b826SGanapatrao Kulkarni 3252dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 3253dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 3254dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 3255dbd2b826SGanapatrao Kulkarni return -EINVAL; 3256dbd2b826SGanapatrao Kulkarni } 3257dbd2b826SGanapatrao Kulkarni 3258dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 3259dbd2b826SGanapatrao Kulkarni 3260dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 3261dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 3262dbd2b826SGanapatrao Kulkarni return 0; 3263dbd2b826SGanapatrao Kulkarni } 3264dbd2b826SGanapatrao Kulkarni 3265dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 3266dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 3267dbd2b826SGanapatrao Kulkarni its_in_srat++; 3268dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 3269dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 3270dbd2b826SGanapatrao Kulkarni 3271dbd2b826SGanapatrao Kulkarni return 0; 3272dbd2b826SGanapatrao Kulkarni } 3273dbd2b826SGanapatrao Kulkarni 3274dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 3275dbd2b826SGanapatrao Kulkarni { 3276fdf6e7a8SHanjun Guo int count; 3277fdf6e7a8SHanjun Guo 3278fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 3279fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 3280fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3281fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 3282fdf6e7a8SHanjun Guo if (count <= 0) 3283fdf6e7a8SHanjun Guo return; 3284fdf6e7a8SHanjun Guo 3285fdf6e7a8SHanjun Guo its_srat_maps = kmalloc(count * sizeof(struct its_srat_map), 3286fdf6e7a8SHanjun Guo GFP_KERNEL); 3287fdf6e7a8SHanjun Guo if (!its_srat_maps) { 3288fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 3289fdf6e7a8SHanjun Guo return; 3290fdf6e7a8SHanjun Guo } 3291fdf6e7a8SHanjun Guo 3292dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 3293dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 3294dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3295dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 3296dbd2b826SGanapatrao Kulkarni } 3297fdf6e7a8SHanjun Guo 3298fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 3299fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 3300fdf6e7a8SHanjun Guo { 3301fdf6e7a8SHanjun Guo kfree(its_srat_maps); 3302fdf6e7a8SHanjun Guo } 3303dbd2b826SGanapatrao Kulkarni #else 3304dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 3305dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 3306fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 3307dbd2b826SGanapatrao Kulkarni #endif 3308dbd2b826SGanapatrao Kulkarni 33093f010cf1STomasz Nowicki static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header, 33103f010cf1STomasz Nowicki const unsigned long end) 33113f010cf1STomasz Nowicki { 33123f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 33133f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 33143f010cf1STomasz Nowicki struct resource res; 33153f010cf1STomasz Nowicki int err; 33163f010cf1STomasz Nowicki 33173f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 33183f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 33193f010cf1STomasz Nowicki res.start = its_entry->base_address; 33203f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 33213f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 33223f010cf1STomasz Nowicki 33233f010cf1STomasz Nowicki dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address); 33243f010cf1STomasz Nowicki if (!dom_handle) { 33253f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 33263f010cf1STomasz Nowicki &res.start); 33273f010cf1STomasz Nowicki return -ENOMEM; 33283f010cf1STomasz Nowicki } 33293f010cf1STomasz Nowicki 33303f010cf1STomasz Nowicki err = iort_register_domain_token(its_entry->translation_id, dom_handle); 33313f010cf1STomasz Nowicki if (err) { 33323f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 33333f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 33343f010cf1STomasz Nowicki goto dom_err; 33353f010cf1STomasz Nowicki } 33363f010cf1STomasz Nowicki 3337dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 3338dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 33393f010cf1STomasz Nowicki if (!err) 33403f010cf1STomasz Nowicki return 0; 33413f010cf1STomasz Nowicki 33423f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 33433f010cf1STomasz Nowicki dom_err: 33443f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 33453f010cf1STomasz Nowicki return err; 33463f010cf1STomasz Nowicki } 33473f010cf1STomasz Nowicki 33483f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 33493f010cf1STomasz Nowicki { 3350dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 33513f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 33523f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 3353fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 33543f010cf1STomasz Nowicki } 33553f010cf1STomasz Nowicki #else 33563f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 33573f010cf1STomasz Nowicki #endif 33583f010cf1STomasz Nowicki 3359db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 3360db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 3361db40f0a7STomasz Nowicki { 3362db40f0a7STomasz Nowicki struct device_node *of_node; 33638fff27aeSMarc Zyngier struct its_node *its; 33648fff27aeSMarc Zyngier bool has_v4 = false; 33658fff27aeSMarc Zyngier int err; 3366db40f0a7STomasz Nowicki 3367db40f0a7STomasz Nowicki its_parent = parent_domain; 3368db40f0a7STomasz Nowicki of_node = to_of_node(handle); 3369db40f0a7STomasz Nowicki if (of_node) 3370db40f0a7STomasz Nowicki its_of_probe(of_node); 3371db40f0a7STomasz Nowicki else 33723f010cf1STomasz Nowicki its_acpi_probe(); 3373db40f0a7STomasz Nowicki 33744c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 33754c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 33764c21f3c2SMarc Zyngier return -ENXIO; 33774c21f3c2SMarc Zyngier } 33784c21f3c2SMarc Zyngier 33794c21f3c2SMarc Zyngier gic_rdists = rdists; 33808fff27aeSMarc Zyngier err = its_alloc_lpi_tables(); 33818fff27aeSMarc Zyngier if (err) 33828fff27aeSMarc Zyngier return err; 33838fff27aeSMarc Zyngier 33848fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 33858fff27aeSMarc Zyngier has_v4 |= its->is_v4; 33868fff27aeSMarc Zyngier 33878fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 33883d63cb53SMarc Zyngier if (its_init_vpe_domain() || 33893d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 33908fff27aeSMarc Zyngier rdists->has_vlpis = false; 33918fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 33928fff27aeSMarc Zyngier } 33938fff27aeSMarc Zyngier } 33948fff27aeSMarc Zyngier 33958fff27aeSMarc Zyngier return 0; 33964c21f3c2SMarc Zyngier } 3397