1cc2d3216SMarc Zyngier /* 2cc2d3216SMarc Zyngier * Copyright (C) 2013, 2014 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 18cc2d3216SMarc Zyngier #include <linux/bitmap.h> 19cc2d3216SMarc Zyngier #include <linux/cpu.h> 20cc2d3216SMarc Zyngier #include <linux/delay.h> 21cc2d3216SMarc Zyngier #include <linux/interrupt.h> 22cc2d3216SMarc Zyngier #include <linux/log2.h> 23cc2d3216SMarc Zyngier #include <linux/mm.h> 24cc2d3216SMarc Zyngier #include <linux/msi.h> 25cc2d3216SMarc Zyngier #include <linux/of.h> 26cc2d3216SMarc Zyngier #include <linux/of_address.h> 27cc2d3216SMarc Zyngier #include <linux/of_irq.h> 28cc2d3216SMarc Zyngier #include <linux/of_pci.h> 29cc2d3216SMarc Zyngier #include <linux/of_platform.h> 30cc2d3216SMarc Zyngier #include <linux/percpu.h> 31cc2d3216SMarc Zyngier #include <linux/slab.h> 32cc2d3216SMarc Zyngier 3341a83e06SJoel Porquet #include <linux/irqchip.h> 34cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 35cc2d3216SMarc Zyngier 36cc2d3216SMarc Zyngier #include <asm/cacheflush.h> 37cc2d3216SMarc Zyngier #include <asm/cputype.h> 38cc2d3216SMarc Zyngier #include <asm/exception.h> 39cc2d3216SMarc Zyngier 40*67510ccaSRobert Richter #include "irq-gic-common.h" 41*67510ccaSRobert Richter 42cc2d3216SMarc Zyngier #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1 << 0) 43cc2d3216SMarc Zyngier 44c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 45c48ed51cSMarc Zyngier 46cc2d3216SMarc Zyngier /* 47cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 48cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 49cc2d3216SMarc Zyngier * CPU. 50cc2d3216SMarc Zyngier */ 51cc2d3216SMarc Zyngier struct its_collection { 52cc2d3216SMarc Zyngier u64 target_address; 53cc2d3216SMarc Zyngier u16 col_id; 54cc2d3216SMarc Zyngier }; 55cc2d3216SMarc Zyngier 56cc2d3216SMarc Zyngier /* 57cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 58841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 59841514abSMarc Zyngier * list of devices writing to it. 60cc2d3216SMarc Zyngier */ 61cc2d3216SMarc Zyngier struct its_node { 62cc2d3216SMarc Zyngier raw_spinlock_t lock; 63cc2d3216SMarc Zyngier struct list_head entry; 64cc2d3216SMarc Zyngier void __iomem *base; 65cc2d3216SMarc Zyngier unsigned long phys_base; 66cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 67cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 68cc2d3216SMarc Zyngier void *tables[GITS_BASER_NR_REGS]; 69cc2d3216SMarc Zyngier struct its_collection *collections; 70cc2d3216SMarc Zyngier struct list_head its_device_list; 71cc2d3216SMarc Zyngier u64 flags; 72cc2d3216SMarc Zyngier u32 ite_size; 73cc2d3216SMarc Zyngier }; 74cc2d3216SMarc Zyngier 75cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 76cc2d3216SMarc Zyngier 77591e5becSMarc Zyngier struct event_lpi_map { 78591e5becSMarc Zyngier unsigned long *lpi_map; 79591e5becSMarc Zyngier u16 *col_map; 80591e5becSMarc Zyngier irq_hw_number_t lpi_base; 81591e5becSMarc Zyngier int nr_lpis; 82591e5becSMarc Zyngier }; 83591e5becSMarc Zyngier 84cc2d3216SMarc Zyngier /* 85cc2d3216SMarc Zyngier * The ITS view of a device - belongs to an ITS, a collection, owns an 86cc2d3216SMarc Zyngier * interrupt translation table, and a list of interrupts. 87cc2d3216SMarc Zyngier */ 88cc2d3216SMarc Zyngier struct its_device { 89cc2d3216SMarc Zyngier struct list_head entry; 90cc2d3216SMarc Zyngier struct its_node *its; 91591e5becSMarc Zyngier struct event_lpi_map event_map; 92cc2d3216SMarc Zyngier void *itt; 93cc2d3216SMarc Zyngier u32 nr_ites; 94cc2d3216SMarc Zyngier u32 device_id; 95cc2d3216SMarc Zyngier }; 96cc2d3216SMarc Zyngier 971ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 981ac19ca6SMarc Zyngier static DEFINE_SPINLOCK(its_lock); 991ac19ca6SMarc Zyngier static struct device_node *gic_root_node; 1001ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 1011ac19ca6SMarc Zyngier 1021ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 1031ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 1041ac19ca6SMarc Zyngier 105591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 106591e5becSMarc Zyngier u32 event) 107591e5becSMarc Zyngier { 108591e5becSMarc Zyngier struct its_node *its = its_dev->its; 109591e5becSMarc Zyngier 110591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 111591e5becSMarc Zyngier } 112591e5becSMarc Zyngier 113cc2d3216SMarc Zyngier /* 114cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 115cc2d3216SMarc Zyngier * block. 116cc2d3216SMarc Zyngier */ 117cc2d3216SMarc Zyngier struct its_cmd_desc { 118cc2d3216SMarc Zyngier union { 119cc2d3216SMarc Zyngier struct { 120cc2d3216SMarc Zyngier struct its_device *dev; 121cc2d3216SMarc Zyngier u32 event_id; 122cc2d3216SMarc Zyngier } its_inv_cmd; 123cc2d3216SMarc Zyngier 124cc2d3216SMarc Zyngier struct { 125cc2d3216SMarc Zyngier struct its_device *dev; 126cc2d3216SMarc Zyngier u32 event_id; 127cc2d3216SMarc Zyngier } its_int_cmd; 128cc2d3216SMarc Zyngier 129cc2d3216SMarc Zyngier struct { 130cc2d3216SMarc Zyngier struct its_device *dev; 131cc2d3216SMarc Zyngier int valid; 132cc2d3216SMarc Zyngier } its_mapd_cmd; 133cc2d3216SMarc Zyngier 134cc2d3216SMarc Zyngier struct { 135cc2d3216SMarc Zyngier struct its_collection *col; 136cc2d3216SMarc Zyngier int valid; 137cc2d3216SMarc Zyngier } its_mapc_cmd; 138cc2d3216SMarc Zyngier 139cc2d3216SMarc Zyngier struct { 140cc2d3216SMarc Zyngier struct its_device *dev; 141cc2d3216SMarc Zyngier u32 phys_id; 142cc2d3216SMarc Zyngier u32 event_id; 143cc2d3216SMarc Zyngier } its_mapvi_cmd; 144cc2d3216SMarc Zyngier 145cc2d3216SMarc Zyngier struct { 146cc2d3216SMarc Zyngier struct its_device *dev; 147cc2d3216SMarc Zyngier struct its_collection *col; 148591e5becSMarc Zyngier u32 event_id; 149cc2d3216SMarc Zyngier } its_movi_cmd; 150cc2d3216SMarc Zyngier 151cc2d3216SMarc Zyngier struct { 152cc2d3216SMarc Zyngier struct its_device *dev; 153cc2d3216SMarc Zyngier u32 event_id; 154cc2d3216SMarc Zyngier } its_discard_cmd; 155cc2d3216SMarc Zyngier 156cc2d3216SMarc Zyngier struct { 157cc2d3216SMarc Zyngier struct its_collection *col; 158cc2d3216SMarc Zyngier } its_invall_cmd; 159cc2d3216SMarc Zyngier }; 160cc2d3216SMarc Zyngier }; 161cc2d3216SMarc Zyngier 162cc2d3216SMarc Zyngier /* 163cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 164cc2d3216SMarc Zyngier */ 165cc2d3216SMarc Zyngier struct its_cmd_block { 166cc2d3216SMarc Zyngier u64 raw_cmd[4]; 167cc2d3216SMarc Zyngier }; 168cc2d3216SMarc Zyngier 169cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 170cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 171cc2d3216SMarc Zyngier 172cc2d3216SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_cmd_block *, 173cc2d3216SMarc Zyngier struct its_cmd_desc *); 174cc2d3216SMarc Zyngier 175cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 176cc2d3216SMarc Zyngier { 177cc2d3216SMarc Zyngier cmd->raw_cmd[0] &= ~0xffUL; 178cc2d3216SMarc Zyngier cmd->raw_cmd[0] |= cmd_nr; 179cc2d3216SMarc Zyngier } 180cc2d3216SMarc Zyngier 181cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 182cc2d3216SMarc Zyngier { 1837e195ba0SAndre Przywara cmd->raw_cmd[0] &= BIT_ULL(32) - 1; 184cc2d3216SMarc Zyngier cmd->raw_cmd[0] |= ((u64)devid) << 32; 185cc2d3216SMarc Zyngier } 186cc2d3216SMarc Zyngier 187cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 188cc2d3216SMarc Zyngier { 189cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= ~0xffffffffUL; 190cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= id; 191cc2d3216SMarc Zyngier } 192cc2d3216SMarc Zyngier 193cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 194cc2d3216SMarc Zyngier { 195cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= 0xffffffffUL; 196cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= ((u64)phys_id) << 32; 197cc2d3216SMarc Zyngier } 198cc2d3216SMarc Zyngier 199cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 200cc2d3216SMarc Zyngier { 201cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= ~0x1fUL; 202cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= size & 0x1f; 203cc2d3216SMarc Zyngier } 204cc2d3216SMarc Zyngier 205cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 206cc2d3216SMarc Zyngier { 207cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~0xffffffffffffUL; 208cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= itt_addr & 0xffffffffff00UL; 209cc2d3216SMarc Zyngier } 210cc2d3216SMarc Zyngier 211cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 212cc2d3216SMarc Zyngier { 213cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~(1UL << 63); 214cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= ((u64)!!valid) << 63; 215cc2d3216SMarc Zyngier } 216cc2d3216SMarc Zyngier 217cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 218cc2d3216SMarc Zyngier { 219cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~(0xffffffffUL << 16); 220cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= (target_addr & (0xffffffffUL << 16)); 221cc2d3216SMarc Zyngier } 222cc2d3216SMarc Zyngier 223cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 224cc2d3216SMarc Zyngier { 225cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~0xffffUL; 226cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= col; 227cc2d3216SMarc Zyngier } 228cc2d3216SMarc Zyngier 229cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 230cc2d3216SMarc Zyngier { 231cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 232cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 233cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 234cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 235cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 236cc2d3216SMarc Zyngier } 237cc2d3216SMarc Zyngier 238cc2d3216SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_cmd_block *cmd, 239cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 240cc2d3216SMarc Zyngier { 241cc2d3216SMarc Zyngier unsigned long itt_addr; 242c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 243cc2d3216SMarc Zyngier 244cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 245cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 246cc2d3216SMarc Zyngier 247cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 248cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 249cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 250cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 251cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 252cc2d3216SMarc Zyngier 253cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 254cc2d3216SMarc Zyngier 255591e5becSMarc Zyngier return NULL; 256cc2d3216SMarc Zyngier } 257cc2d3216SMarc Zyngier 258cc2d3216SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_cmd_block *cmd, 259cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 260cc2d3216SMarc Zyngier { 261cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 262cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 263cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 264cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 265cc2d3216SMarc Zyngier 266cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 267cc2d3216SMarc Zyngier 268cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 269cc2d3216SMarc Zyngier } 270cc2d3216SMarc Zyngier 271cc2d3216SMarc Zyngier static struct its_collection *its_build_mapvi_cmd(struct its_cmd_block *cmd, 272cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 273cc2d3216SMarc Zyngier { 274591e5becSMarc Zyngier struct its_collection *col; 275591e5becSMarc Zyngier 276591e5becSMarc Zyngier col = dev_event_to_col(desc->its_mapvi_cmd.dev, 277591e5becSMarc Zyngier desc->its_mapvi_cmd.event_id); 278591e5becSMarc Zyngier 279cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPVI); 280cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapvi_cmd.dev->device_id); 281cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_mapvi_cmd.event_id); 282cc2d3216SMarc Zyngier its_encode_phys_id(cmd, desc->its_mapvi_cmd.phys_id); 283591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 284cc2d3216SMarc Zyngier 285cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 286cc2d3216SMarc Zyngier 287591e5becSMarc Zyngier return col; 288cc2d3216SMarc Zyngier } 289cc2d3216SMarc Zyngier 290cc2d3216SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_cmd_block *cmd, 291cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 292cc2d3216SMarc Zyngier { 293591e5becSMarc Zyngier struct its_collection *col; 294591e5becSMarc Zyngier 295591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 296591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 297591e5becSMarc Zyngier 298cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 299cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 300591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 301cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 302cc2d3216SMarc Zyngier 303cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 304cc2d3216SMarc Zyngier 305591e5becSMarc Zyngier return col; 306cc2d3216SMarc Zyngier } 307cc2d3216SMarc Zyngier 308cc2d3216SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_cmd_block *cmd, 309cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 310cc2d3216SMarc Zyngier { 311591e5becSMarc Zyngier struct its_collection *col; 312591e5becSMarc Zyngier 313591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 314591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 315591e5becSMarc Zyngier 316cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 317cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 318cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 319cc2d3216SMarc Zyngier 320cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 321cc2d3216SMarc Zyngier 322591e5becSMarc Zyngier return col; 323cc2d3216SMarc Zyngier } 324cc2d3216SMarc Zyngier 325cc2d3216SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_cmd_block *cmd, 326cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 327cc2d3216SMarc Zyngier { 328591e5becSMarc Zyngier struct its_collection *col; 329591e5becSMarc Zyngier 330591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 331591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 332591e5becSMarc Zyngier 333cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 334cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 335cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 336cc2d3216SMarc Zyngier 337cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 338cc2d3216SMarc Zyngier 339591e5becSMarc Zyngier return col; 340cc2d3216SMarc Zyngier } 341cc2d3216SMarc Zyngier 342cc2d3216SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd, 343cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 344cc2d3216SMarc Zyngier { 345cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 346cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 347cc2d3216SMarc Zyngier 348cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 349cc2d3216SMarc Zyngier 350cc2d3216SMarc Zyngier return NULL; 351cc2d3216SMarc Zyngier } 352cc2d3216SMarc Zyngier 353cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 354cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 355cc2d3216SMarc Zyngier { 356cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 357cc2d3216SMarc Zyngier } 358cc2d3216SMarc Zyngier 359cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 360cc2d3216SMarc Zyngier { 361cc2d3216SMarc Zyngier int widx; 362cc2d3216SMarc Zyngier int ridx; 363cc2d3216SMarc Zyngier 364cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 365cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 366cc2d3216SMarc Zyngier 367cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 368cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 369cc2d3216SMarc Zyngier return 1; 370cc2d3216SMarc Zyngier 371cc2d3216SMarc Zyngier return 0; 372cc2d3216SMarc Zyngier } 373cc2d3216SMarc Zyngier 374cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 375cc2d3216SMarc Zyngier { 376cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 377cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 378cc2d3216SMarc Zyngier 379cc2d3216SMarc Zyngier while (its_queue_full(its)) { 380cc2d3216SMarc Zyngier count--; 381cc2d3216SMarc Zyngier if (!count) { 382cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 383cc2d3216SMarc Zyngier return NULL; 384cc2d3216SMarc Zyngier } 385cc2d3216SMarc Zyngier cpu_relax(); 386cc2d3216SMarc Zyngier udelay(1); 387cc2d3216SMarc Zyngier } 388cc2d3216SMarc Zyngier 389cc2d3216SMarc Zyngier cmd = its->cmd_write++; 390cc2d3216SMarc Zyngier 391cc2d3216SMarc Zyngier /* Handle queue wrapping */ 392cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 393cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 394cc2d3216SMarc Zyngier 395cc2d3216SMarc Zyngier return cmd; 396cc2d3216SMarc Zyngier } 397cc2d3216SMarc Zyngier 398cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 399cc2d3216SMarc Zyngier { 400cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 401cc2d3216SMarc Zyngier 402cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 403cc2d3216SMarc Zyngier 404cc2d3216SMarc Zyngier return its->cmd_write; 405cc2d3216SMarc Zyngier } 406cc2d3216SMarc Zyngier 407cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 408cc2d3216SMarc Zyngier { 409cc2d3216SMarc Zyngier /* 410cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 411cc2d3216SMarc Zyngier * the ITS. 412cc2d3216SMarc Zyngier */ 413cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 414cc2d3216SMarc Zyngier __flush_dcache_area(cmd, sizeof(*cmd)); 415cc2d3216SMarc Zyngier else 416cc2d3216SMarc Zyngier dsb(ishst); 417cc2d3216SMarc Zyngier } 418cc2d3216SMarc Zyngier 419cc2d3216SMarc Zyngier static void its_wait_for_range_completion(struct its_node *its, 420cc2d3216SMarc Zyngier struct its_cmd_block *from, 421cc2d3216SMarc Zyngier struct its_cmd_block *to) 422cc2d3216SMarc Zyngier { 423cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 424cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 425cc2d3216SMarc Zyngier 426cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 427cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 428cc2d3216SMarc Zyngier 429cc2d3216SMarc Zyngier while (1) { 430cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 431cc2d3216SMarc Zyngier if (rd_idx >= to_idx || rd_idx < from_idx) 432cc2d3216SMarc Zyngier break; 433cc2d3216SMarc Zyngier 434cc2d3216SMarc Zyngier count--; 435cc2d3216SMarc Zyngier if (!count) { 436cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue timeout\n"); 437cc2d3216SMarc Zyngier return; 438cc2d3216SMarc Zyngier } 439cc2d3216SMarc Zyngier cpu_relax(); 440cc2d3216SMarc Zyngier udelay(1); 441cc2d3216SMarc Zyngier } 442cc2d3216SMarc Zyngier } 443cc2d3216SMarc Zyngier 444cc2d3216SMarc Zyngier static void its_send_single_command(struct its_node *its, 445cc2d3216SMarc Zyngier its_cmd_builder_t builder, 446cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 447cc2d3216SMarc Zyngier { 448cc2d3216SMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; 449cc2d3216SMarc Zyngier struct its_collection *sync_col; 4503e39e8f5SMarc Zyngier unsigned long flags; 451cc2d3216SMarc Zyngier 4523e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 453cc2d3216SMarc Zyngier 454cc2d3216SMarc Zyngier cmd = its_allocate_entry(its); 455cc2d3216SMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ 456cc2d3216SMarc Zyngier pr_err_ratelimited("ITS can't allocate, dropping command\n"); 4573e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 458cc2d3216SMarc Zyngier return; 459cc2d3216SMarc Zyngier } 460cc2d3216SMarc Zyngier sync_col = builder(cmd, desc); 461cc2d3216SMarc Zyngier its_flush_cmd(its, cmd); 462cc2d3216SMarc Zyngier 463cc2d3216SMarc Zyngier if (sync_col) { 464cc2d3216SMarc Zyngier sync_cmd = its_allocate_entry(its); 465cc2d3216SMarc Zyngier if (!sync_cmd) { 466cc2d3216SMarc Zyngier pr_err_ratelimited("ITS can't SYNC, skipping\n"); 467cc2d3216SMarc Zyngier goto post; 468cc2d3216SMarc Zyngier } 469cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 470cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 471cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 472cc2d3216SMarc Zyngier its_flush_cmd(its, sync_cmd); 473cc2d3216SMarc Zyngier } 474cc2d3216SMarc Zyngier 475cc2d3216SMarc Zyngier post: 476cc2d3216SMarc Zyngier next_cmd = its_post_commands(its); 4773e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 478cc2d3216SMarc Zyngier 479cc2d3216SMarc Zyngier its_wait_for_range_completion(its, cmd, next_cmd); 480cc2d3216SMarc Zyngier } 481cc2d3216SMarc Zyngier 482cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 483cc2d3216SMarc Zyngier { 484cc2d3216SMarc Zyngier struct its_cmd_desc desc; 485cc2d3216SMarc Zyngier 486cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 487cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 488cc2d3216SMarc Zyngier 489cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 490cc2d3216SMarc Zyngier } 491cc2d3216SMarc Zyngier 492cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 493cc2d3216SMarc Zyngier { 494cc2d3216SMarc Zyngier struct its_cmd_desc desc; 495cc2d3216SMarc Zyngier 496cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 497cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 498cc2d3216SMarc Zyngier 499cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 500cc2d3216SMarc Zyngier } 501cc2d3216SMarc Zyngier 502cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 503cc2d3216SMarc Zyngier int valid) 504cc2d3216SMarc Zyngier { 505cc2d3216SMarc Zyngier struct its_cmd_desc desc; 506cc2d3216SMarc Zyngier 507cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 508cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 509cc2d3216SMarc Zyngier 510cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 511cc2d3216SMarc Zyngier } 512cc2d3216SMarc Zyngier 513cc2d3216SMarc Zyngier static void its_send_mapvi(struct its_device *dev, u32 irq_id, u32 id) 514cc2d3216SMarc Zyngier { 515cc2d3216SMarc Zyngier struct its_cmd_desc desc; 516cc2d3216SMarc Zyngier 517cc2d3216SMarc Zyngier desc.its_mapvi_cmd.dev = dev; 518cc2d3216SMarc Zyngier desc.its_mapvi_cmd.phys_id = irq_id; 519cc2d3216SMarc Zyngier desc.its_mapvi_cmd.event_id = id; 520cc2d3216SMarc Zyngier 521cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapvi_cmd, &desc); 522cc2d3216SMarc Zyngier } 523cc2d3216SMarc Zyngier 524cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 525cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 526cc2d3216SMarc Zyngier { 527cc2d3216SMarc Zyngier struct its_cmd_desc desc; 528cc2d3216SMarc Zyngier 529cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 530cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 531591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 532cc2d3216SMarc Zyngier 533cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 534cc2d3216SMarc Zyngier } 535cc2d3216SMarc Zyngier 536cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 537cc2d3216SMarc Zyngier { 538cc2d3216SMarc Zyngier struct its_cmd_desc desc; 539cc2d3216SMarc Zyngier 540cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 541cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 542cc2d3216SMarc Zyngier 543cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 544cc2d3216SMarc Zyngier } 545cc2d3216SMarc Zyngier 546cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 547cc2d3216SMarc Zyngier { 548cc2d3216SMarc Zyngier struct its_cmd_desc desc; 549cc2d3216SMarc Zyngier 550cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 551cc2d3216SMarc Zyngier 552cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 553cc2d3216SMarc Zyngier } 554c48ed51cSMarc Zyngier 555c48ed51cSMarc Zyngier /* 556c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 557c48ed51cSMarc Zyngier */ 558c48ed51cSMarc Zyngier 559c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 560c48ed51cSMarc Zyngier { 561c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 562591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 563c48ed51cSMarc Zyngier } 564c48ed51cSMarc Zyngier 565c48ed51cSMarc Zyngier static void lpi_set_config(struct irq_data *d, bool enable) 566c48ed51cSMarc Zyngier { 567c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 568c48ed51cSMarc Zyngier irq_hw_number_t hwirq = d->hwirq; 569c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 570c48ed51cSMarc Zyngier u8 *cfg = page_address(gic_rdists->prop_page) + hwirq - 8192; 571c48ed51cSMarc Zyngier 572c48ed51cSMarc Zyngier if (enable) 573c48ed51cSMarc Zyngier *cfg |= LPI_PROP_ENABLED; 574c48ed51cSMarc Zyngier else 575c48ed51cSMarc Zyngier *cfg &= ~LPI_PROP_ENABLED; 576c48ed51cSMarc Zyngier 577c48ed51cSMarc Zyngier /* 578c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 579c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 580c48ed51cSMarc Zyngier * Humpf... 581c48ed51cSMarc Zyngier */ 582c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 583c48ed51cSMarc Zyngier __flush_dcache_area(cfg, sizeof(*cfg)); 584c48ed51cSMarc Zyngier else 585c48ed51cSMarc Zyngier dsb(ishst); 586c48ed51cSMarc Zyngier its_send_inv(its_dev, id); 587c48ed51cSMarc Zyngier } 588c48ed51cSMarc Zyngier 589c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 590c48ed51cSMarc Zyngier { 591c48ed51cSMarc Zyngier lpi_set_config(d, false); 592c48ed51cSMarc Zyngier } 593c48ed51cSMarc Zyngier 594c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 595c48ed51cSMarc Zyngier { 596c48ed51cSMarc Zyngier lpi_set_config(d, true); 597c48ed51cSMarc Zyngier } 598c48ed51cSMarc Zyngier 599c48ed51cSMarc Zyngier static void its_eoi_irq(struct irq_data *d) 600c48ed51cSMarc Zyngier { 601c48ed51cSMarc Zyngier gic_write_eoir(d->hwirq); 602c48ed51cSMarc Zyngier } 603c48ed51cSMarc Zyngier 604c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 605c48ed51cSMarc Zyngier bool force) 606c48ed51cSMarc Zyngier { 607c48ed51cSMarc Zyngier unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask); 608c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 609c48ed51cSMarc Zyngier struct its_collection *target_col; 610c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 611c48ed51cSMarc Zyngier 612c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 613c48ed51cSMarc Zyngier return -EINVAL; 614c48ed51cSMarc Zyngier 615c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 616c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 617591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 618c48ed51cSMarc Zyngier 619c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 620c48ed51cSMarc Zyngier } 621c48ed51cSMarc Zyngier 622b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 623b48ac83dSMarc Zyngier { 624b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 625b48ac83dSMarc Zyngier struct its_node *its; 626b48ac83dSMarc Zyngier u64 addr; 627b48ac83dSMarc Zyngier 628b48ac83dSMarc Zyngier its = its_dev->its; 629b48ac83dSMarc Zyngier addr = its->phys_base + GITS_TRANSLATER; 630b48ac83dSMarc Zyngier 631b48ac83dSMarc Zyngier msg->address_lo = addr & ((1UL << 32) - 1); 632b48ac83dSMarc Zyngier msg->address_hi = addr >> 32; 633b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 634b48ac83dSMarc Zyngier } 635b48ac83dSMarc Zyngier 636c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 637c48ed51cSMarc Zyngier .name = "ITS", 638c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 639c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 640c48ed51cSMarc Zyngier .irq_eoi = its_eoi_irq, 641c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 642b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 643b48ac83dSMarc Zyngier }; 644b48ac83dSMarc Zyngier 645bf9529f8SMarc Zyngier /* 646bf9529f8SMarc Zyngier * How we allocate LPIs: 647bf9529f8SMarc Zyngier * 648bf9529f8SMarc Zyngier * The GIC has id_bits bits for interrupt identifiers. From there, we 649bf9529f8SMarc Zyngier * must subtract 8192 which are reserved for SGIs/PPIs/SPIs. Then, as 650bf9529f8SMarc Zyngier * we allocate LPIs by chunks of 32, we can shift the whole thing by 5 651bf9529f8SMarc Zyngier * bits to the right. 652bf9529f8SMarc Zyngier * 653bf9529f8SMarc Zyngier * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations. 654bf9529f8SMarc Zyngier */ 655bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK_SHIFT 5 656bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK (1 << IRQS_PER_CHUNK_SHIFT) 657bf9529f8SMarc Zyngier 658bf9529f8SMarc Zyngier static unsigned long *lpi_bitmap; 659bf9529f8SMarc Zyngier static u32 lpi_chunks; 660bf9529f8SMarc Zyngier static DEFINE_SPINLOCK(lpi_lock); 661bf9529f8SMarc Zyngier 662bf9529f8SMarc Zyngier static int its_lpi_to_chunk(int lpi) 663bf9529f8SMarc Zyngier { 664bf9529f8SMarc Zyngier return (lpi - 8192) >> IRQS_PER_CHUNK_SHIFT; 665bf9529f8SMarc Zyngier } 666bf9529f8SMarc Zyngier 667bf9529f8SMarc Zyngier static int its_chunk_to_lpi(int chunk) 668bf9529f8SMarc Zyngier { 669bf9529f8SMarc Zyngier return (chunk << IRQS_PER_CHUNK_SHIFT) + 8192; 670bf9529f8SMarc Zyngier } 671bf9529f8SMarc Zyngier 672bf9529f8SMarc Zyngier static int its_lpi_init(u32 id_bits) 673bf9529f8SMarc Zyngier { 674bf9529f8SMarc Zyngier lpi_chunks = its_lpi_to_chunk(1UL << id_bits); 675bf9529f8SMarc Zyngier 676bf9529f8SMarc Zyngier lpi_bitmap = kzalloc(BITS_TO_LONGS(lpi_chunks) * sizeof(long), 677bf9529f8SMarc Zyngier GFP_KERNEL); 678bf9529f8SMarc Zyngier if (!lpi_bitmap) { 679bf9529f8SMarc Zyngier lpi_chunks = 0; 680bf9529f8SMarc Zyngier return -ENOMEM; 681bf9529f8SMarc Zyngier } 682bf9529f8SMarc Zyngier 683bf9529f8SMarc Zyngier pr_info("ITS: Allocated %d chunks for LPIs\n", (int)lpi_chunks); 684bf9529f8SMarc Zyngier return 0; 685bf9529f8SMarc Zyngier } 686bf9529f8SMarc Zyngier 687bf9529f8SMarc Zyngier static unsigned long *its_lpi_alloc_chunks(int nr_irqs, int *base, int *nr_ids) 688bf9529f8SMarc Zyngier { 689bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 690bf9529f8SMarc Zyngier int chunk_id; 691bf9529f8SMarc Zyngier int nr_chunks; 692bf9529f8SMarc Zyngier int i; 693bf9529f8SMarc Zyngier 694bf9529f8SMarc Zyngier nr_chunks = DIV_ROUND_UP(nr_irqs, IRQS_PER_CHUNK); 695bf9529f8SMarc Zyngier 696bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 697bf9529f8SMarc Zyngier 698bf9529f8SMarc Zyngier do { 699bf9529f8SMarc Zyngier chunk_id = bitmap_find_next_zero_area(lpi_bitmap, lpi_chunks, 700bf9529f8SMarc Zyngier 0, nr_chunks, 0); 701bf9529f8SMarc Zyngier if (chunk_id < lpi_chunks) 702bf9529f8SMarc Zyngier break; 703bf9529f8SMarc Zyngier 704bf9529f8SMarc Zyngier nr_chunks--; 705bf9529f8SMarc Zyngier } while (nr_chunks > 0); 706bf9529f8SMarc Zyngier 707bf9529f8SMarc Zyngier if (!nr_chunks) 708bf9529f8SMarc Zyngier goto out; 709bf9529f8SMarc Zyngier 710bf9529f8SMarc Zyngier bitmap = kzalloc(BITS_TO_LONGS(nr_chunks * IRQS_PER_CHUNK) * sizeof (long), 711bf9529f8SMarc Zyngier GFP_ATOMIC); 712bf9529f8SMarc Zyngier if (!bitmap) 713bf9529f8SMarc Zyngier goto out; 714bf9529f8SMarc Zyngier 715bf9529f8SMarc Zyngier for (i = 0; i < nr_chunks; i++) 716bf9529f8SMarc Zyngier set_bit(chunk_id + i, lpi_bitmap); 717bf9529f8SMarc Zyngier 718bf9529f8SMarc Zyngier *base = its_chunk_to_lpi(chunk_id); 719bf9529f8SMarc Zyngier *nr_ids = nr_chunks * IRQS_PER_CHUNK; 720bf9529f8SMarc Zyngier 721bf9529f8SMarc Zyngier out: 722bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 723bf9529f8SMarc Zyngier 724bf9529f8SMarc Zyngier return bitmap; 725bf9529f8SMarc Zyngier } 726bf9529f8SMarc Zyngier 727591e5becSMarc Zyngier static void its_lpi_free(struct event_lpi_map *map) 728bf9529f8SMarc Zyngier { 729591e5becSMarc Zyngier int base = map->lpi_base; 730591e5becSMarc Zyngier int nr_ids = map->nr_lpis; 731bf9529f8SMarc Zyngier int lpi; 732bf9529f8SMarc Zyngier 733bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 734bf9529f8SMarc Zyngier 735bf9529f8SMarc Zyngier for (lpi = base; lpi < (base + nr_ids); lpi += IRQS_PER_CHUNK) { 736bf9529f8SMarc Zyngier int chunk = its_lpi_to_chunk(lpi); 737bf9529f8SMarc Zyngier BUG_ON(chunk > lpi_chunks); 738bf9529f8SMarc Zyngier if (test_bit(chunk, lpi_bitmap)) { 739bf9529f8SMarc Zyngier clear_bit(chunk, lpi_bitmap); 740bf9529f8SMarc Zyngier } else { 741bf9529f8SMarc Zyngier pr_err("Bad LPI chunk %d\n", chunk); 742bf9529f8SMarc Zyngier } 743bf9529f8SMarc Zyngier } 744bf9529f8SMarc Zyngier 745bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 746bf9529f8SMarc Zyngier 747591e5becSMarc Zyngier kfree(map->lpi_map); 748591e5becSMarc Zyngier kfree(map->col_map); 749bf9529f8SMarc Zyngier } 7501ac19ca6SMarc Zyngier 7511ac19ca6SMarc Zyngier /* 7521ac19ca6SMarc Zyngier * We allocate 64kB for PROPBASE. That gives us at most 64K LPIs to 7531ac19ca6SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 7541ac19ca6SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 7551ac19ca6SMarc Zyngier */ 7561ac19ca6SMarc Zyngier #define LPI_PROPBASE_SZ SZ_64K 7571ac19ca6SMarc Zyngier #define LPI_PENDBASE_SZ (LPI_PROPBASE_SZ / 8 + SZ_1K) 7581ac19ca6SMarc Zyngier 7591ac19ca6SMarc Zyngier /* 7601ac19ca6SMarc Zyngier * This is how many bits of ID we need, including the useless ones. 7611ac19ca6SMarc Zyngier */ 7621ac19ca6SMarc Zyngier #define LPI_NRBITS ilog2(LPI_PROPBASE_SZ + SZ_8K) 7631ac19ca6SMarc Zyngier 7641ac19ca6SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 7651ac19ca6SMarc Zyngier 7661ac19ca6SMarc Zyngier static int __init its_alloc_lpi_tables(void) 7671ac19ca6SMarc Zyngier { 7681ac19ca6SMarc Zyngier phys_addr_t paddr; 7691ac19ca6SMarc Zyngier 7701ac19ca6SMarc Zyngier gic_rdists->prop_page = alloc_pages(GFP_NOWAIT, 7711ac19ca6SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 7721ac19ca6SMarc Zyngier if (!gic_rdists->prop_page) { 7731ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 7741ac19ca6SMarc Zyngier return -ENOMEM; 7751ac19ca6SMarc Zyngier } 7761ac19ca6SMarc Zyngier 7771ac19ca6SMarc Zyngier paddr = page_to_phys(gic_rdists->prop_page); 7781ac19ca6SMarc Zyngier pr_info("GIC: using LPI property table @%pa\n", &paddr); 7791ac19ca6SMarc Zyngier 7801ac19ca6SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 7811ac19ca6SMarc Zyngier memset(page_address(gic_rdists->prop_page), 7821ac19ca6SMarc Zyngier LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, 7831ac19ca6SMarc Zyngier LPI_PROPBASE_SZ); 7841ac19ca6SMarc Zyngier 7851ac19ca6SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 7861ac19ca6SMarc Zyngier __flush_dcache_area(page_address(gic_rdists->prop_page), LPI_PROPBASE_SZ); 7871ac19ca6SMarc Zyngier 7881ac19ca6SMarc Zyngier return 0; 7891ac19ca6SMarc Zyngier } 7901ac19ca6SMarc Zyngier 7911ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 7921ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 7931ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 7941ac19ca6SMarc Zyngier [GITS_BASER_TYPE_CPU] = "Physical CPUs", 7951ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 7961ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 7971ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 7981ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 7991ac19ca6SMarc Zyngier }; 8001ac19ca6SMarc Zyngier 8011ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 8021ac19ca6SMarc Zyngier { 8031ac19ca6SMarc Zyngier int i; 8041ac19ca6SMarc Zyngier 8051ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 8061ac19ca6SMarc Zyngier if (its->tables[i]) { 8071ac19ca6SMarc Zyngier free_page((unsigned long)its->tables[i]); 8081ac19ca6SMarc Zyngier its->tables[i] = NULL; 8091ac19ca6SMarc Zyngier } 8101ac19ca6SMarc Zyngier } 8111ac19ca6SMarc Zyngier } 8121ac19ca6SMarc Zyngier 813841514abSMarc Zyngier static int its_alloc_tables(const char *node_name, struct its_node *its) 8141ac19ca6SMarc Zyngier { 8151ac19ca6SMarc Zyngier int err; 8161ac19ca6SMarc Zyngier int i; 817790b57aeSYun Wu int psz = SZ_64K; 8181ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 819241a386cSMarc Zyngier u64 cache = GITS_BASER_WaWb; 820c14e3673SRobert Richter u64 typer = readq_relaxed(its->base + GITS_TYPER); 821c14e3673SRobert Richter u32 ids = GITS_TYPER_DEVBITS(typer); 8221ac19ca6SMarc Zyngier 8231ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 8241ac19ca6SMarc Zyngier u64 val = readq_relaxed(its->base + GITS_BASER + i * 8); 8251ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 8261ac19ca6SMarc Zyngier u64 entry_size = GITS_BASER_ENTRY_SIZE(val); 827790b57aeSYun Wu int order = get_order(psz); 828f54b97edSMarc Zyngier int alloc_size; 82930f21363SRobert Richter int alloc_pages; 8301ac19ca6SMarc Zyngier u64 tmp; 8311ac19ca6SMarc Zyngier void *base; 8321ac19ca6SMarc Zyngier 8331ac19ca6SMarc Zyngier if (type == GITS_BASER_TYPE_NONE) 8341ac19ca6SMarc Zyngier continue; 8351ac19ca6SMarc Zyngier 836f54b97edSMarc Zyngier /* 837f54b97edSMarc Zyngier * Allocate as many entries as required to fit the 838f54b97edSMarc Zyngier * range of device IDs that the ITS can grok... The ID 839f54b97edSMarc Zyngier * space being incredibly sparse, this results in a 840f54b97edSMarc Zyngier * massive waste of memory. 841f54b97edSMarc Zyngier * 842f54b97edSMarc Zyngier * For other tables, only allocate a single page. 843f54b97edSMarc Zyngier */ 844f54b97edSMarc Zyngier if (type == GITS_BASER_TYPE_DEVICE) { 8453ad2a5f5SMinghuan Lian /* 8463ad2a5f5SMinghuan Lian * 'order' was initialized earlier to the default page 8473ad2a5f5SMinghuan Lian * granule of the the ITS. We can't have an allocation 8483ad2a5f5SMinghuan Lian * smaller than that. If the requested allocation 8493ad2a5f5SMinghuan Lian * is smaller, round up to the default page granule. 8503ad2a5f5SMinghuan Lian */ 8513ad2a5f5SMinghuan Lian order = max(get_order((1UL << ids) * entry_size), 8523ad2a5f5SMinghuan Lian order); 8531d27704aSYun Wu if (order >= MAX_ORDER) { 8541d27704aSYun Wu order = MAX_ORDER - 1; 8551d27704aSYun Wu pr_warn("%s: Device Table too large, reduce its page order to %u\n", 856841514abSMarc Zyngier node_name, order); 8571d27704aSYun Wu } 858f54b97edSMarc Zyngier } 859f54b97edSMarc Zyngier 860f54b97edSMarc Zyngier alloc_size = (1 << order) * PAGE_SIZE; 86130f21363SRobert Richter alloc_pages = (alloc_size / psz); 86230f21363SRobert Richter if (alloc_pages > GITS_BASER_PAGES_MAX) { 86330f21363SRobert Richter alloc_pages = GITS_BASER_PAGES_MAX; 86430f21363SRobert Richter order = get_order(GITS_BASER_PAGES_MAX * psz); 86530f21363SRobert Richter pr_warn("%s: Device Table too large, reduce its page order to %u (%u pages)\n", 86630f21363SRobert Richter node_name, order, alloc_pages); 86730f21363SRobert Richter } 86830f21363SRobert Richter 869f54b97edSMarc Zyngier base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 8701ac19ca6SMarc Zyngier if (!base) { 8711ac19ca6SMarc Zyngier err = -ENOMEM; 8721ac19ca6SMarc Zyngier goto out_free; 8731ac19ca6SMarc Zyngier } 8741ac19ca6SMarc Zyngier 8751ac19ca6SMarc Zyngier its->tables[i] = base; 8761ac19ca6SMarc Zyngier 8771ac19ca6SMarc Zyngier retry_baser: 8781ac19ca6SMarc Zyngier val = (virt_to_phys(base) | 8791ac19ca6SMarc Zyngier (type << GITS_BASER_TYPE_SHIFT) | 8801ac19ca6SMarc Zyngier ((entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 881241a386cSMarc Zyngier cache | 8821ac19ca6SMarc Zyngier shr | 8831ac19ca6SMarc Zyngier GITS_BASER_VALID); 8841ac19ca6SMarc Zyngier 8851ac19ca6SMarc Zyngier switch (psz) { 8861ac19ca6SMarc Zyngier case SZ_4K: 8871ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_4K; 8881ac19ca6SMarc Zyngier break; 8891ac19ca6SMarc Zyngier case SZ_16K: 8901ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_16K; 8911ac19ca6SMarc Zyngier break; 8921ac19ca6SMarc Zyngier case SZ_64K: 8931ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_64K; 8941ac19ca6SMarc Zyngier break; 8951ac19ca6SMarc Zyngier } 8961ac19ca6SMarc Zyngier 89730f21363SRobert Richter val |= alloc_pages - 1; 8981ac19ca6SMarc Zyngier 8991ac19ca6SMarc Zyngier writeq_relaxed(val, its->base + GITS_BASER + i * 8); 9001ac19ca6SMarc Zyngier tmp = readq_relaxed(its->base + GITS_BASER + i * 8); 9011ac19ca6SMarc Zyngier 9021ac19ca6SMarc Zyngier if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 9031ac19ca6SMarc Zyngier /* 9041ac19ca6SMarc Zyngier * Shareability didn't stick. Just use 9051ac19ca6SMarc Zyngier * whatever the read reported, which is likely 9061ac19ca6SMarc Zyngier * to be the only thing this redistributor 907241a386cSMarc Zyngier * supports. If that's zero, make it 908241a386cSMarc Zyngier * non-cacheable as well. 9091ac19ca6SMarc Zyngier */ 9101ac19ca6SMarc Zyngier shr = tmp & GITS_BASER_SHAREABILITY_MASK; 9115a9a8915SMarc Zyngier if (!shr) { 912241a386cSMarc Zyngier cache = GITS_BASER_nC; 9135a9a8915SMarc Zyngier __flush_dcache_area(base, alloc_size); 9145a9a8915SMarc Zyngier } 9151ac19ca6SMarc Zyngier goto retry_baser; 9161ac19ca6SMarc Zyngier } 9171ac19ca6SMarc Zyngier 9181ac19ca6SMarc Zyngier if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 9191ac19ca6SMarc Zyngier /* 9201ac19ca6SMarc Zyngier * Page size didn't stick. Let's try a smaller 9211ac19ca6SMarc Zyngier * size and retry. If we reach 4K, then 9221ac19ca6SMarc Zyngier * something is horribly wrong... 9231ac19ca6SMarc Zyngier */ 9241ac19ca6SMarc Zyngier switch (psz) { 9251ac19ca6SMarc Zyngier case SZ_16K: 9261ac19ca6SMarc Zyngier psz = SZ_4K; 9271ac19ca6SMarc Zyngier goto retry_baser; 9281ac19ca6SMarc Zyngier case SZ_64K: 9291ac19ca6SMarc Zyngier psz = SZ_16K; 9301ac19ca6SMarc Zyngier goto retry_baser; 9311ac19ca6SMarc Zyngier } 9321ac19ca6SMarc Zyngier } 9331ac19ca6SMarc Zyngier 9341ac19ca6SMarc Zyngier if (val != tmp) { 9351ac19ca6SMarc Zyngier pr_err("ITS: %s: GITS_BASER%d doesn't stick: %lx %lx\n", 936841514abSMarc Zyngier node_name, i, 9371ac19ca6SMarc Zyngier (unsigned long) val, (unsigned long) tmp); 9381ac19ca6SMarc Zyngier err = -ENXIO; 9391ac19ca6SMarc Zyngier goto out_free; 9401ac19ca6SMarc Zyngier } 9411ac19ca6SMarc Zyngier 9421ac19ca6SMarc Zyngier pr_info("ITS: allocated %d %s @%lx (psz %dK, shr %d)\n", 943f54b97edSMarc Zyngier (int)(alloc_size / entry_size), 9441ac19ca6SMarc Zyngier its_base_type_string[type], 9451ac19ca6SMarc Zyngier (unsigned long)virt_to_phys(base), 9461ac19ca6SMarc Zyngier psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 9471ac19ca6SMarc Zyngier } 9481ac19ca6SMarc Zyngier 9491ac19ca6SMarc Zyngier return 0; 9501ac19ca6SMarc Zyngier 9511ac19ca6SMarc Zyngier out_free: 9521ac19ca6SMarc Zyngier its_free_tables(its); 9531ac19ca6SMarc Zyngier 9541ac19ca6SMarc Zyngier return err; 9551ac19ca6SMarc Zyngier } 9561ac19ca6SMarc Zyngier 9571ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 9581ac19ca6SMarc Zyngier { 9591ac19ca6SMarc Zyngier its->collections = kzalloc(nr_cpu_ids * sizeof(*its->collections), 9601ac19ca6SMarc Zyngier GFP_KERNEL); 9611ac19ca6SMarc Zyngier if (!its->collections) 9621ac19ca6SMarc Zyngier return -ENOMEM; 9631ac19ca6SMarc Zyngier 9641ac19ca6SMarc Zyngier return 0; 9651ac19ca6SMarc Zyngier } 9661ac19ca6SMarc Zyngier 9671ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 9681ac19ca6SMarc Zyngier { 9691ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 9701ac19ca6SMarc Zyngier struct page *pend_page; 9711ac19ca6SMarc Zyngier u64 val, tmp; 9721ac19ca6SMarc Zyngier 9731ac19ca6SMarc Zyngier /* If we didn't allocate the pending table yet, do it now */ 9741ac19ca6SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 9751ac19ca6SMarc Zyngier if (!pend_page) { 9761ac19ca6SMarc Zyngier phys_addr_t paddr; 9771ac19ca6SMarc Zyngier /* 9781ac19ca6SMarc Zyngier * The pending pages have to be at least 64kB aligned, 9791ac19ca6SMarc Zyngier * hence the 'max(LPI_PENDBASE_SZ, SZ_64K)' below. 9801ac19ca6SMarc Zyngier */ 9811ac19ca6SMarc Zyngier pend_page = alloc_pages(GFP_NOWAIT | __GFP_ZERO, 9821ac19ca6SMarc Zyngier get_order(max(LPI_PENDBASE_SZ, SZ_64K))); 9831ac19ca6SMarc Zyngier if (!pend_page) { 9841ac19ca6SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", 9851ac19ca6SMarc Zyngier smp_processor_id()); 9861ac19ca6SMarc Zyngier return; 9871ac19ca6SMarc Zyngier } 9881ac19ca6SMarc Zyngier 9891ac19ca6SMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 9901ac19ca6SMarc Zyngier __flush_dcache_area(page_address(pend_page), LPI_PENDBASE_SZ); 9911ac19ca6SMarc Zyngier 9921ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 9931ac19ca6SMarc Zyngier pr_info("CPU%d: using LPI pending table @%pa\n", 9941ac19ca6SMarc Zyngier smp_processor_id(), &paddr); 9951ac19ca6SMarc Zyngier gic_data_rdist()->pend_page = pend_page; 9961ac19ca6SMarc Zyngier } 9971ac19ca6SMarc Zyngier 9981ac19ca6SMarc Zyngier /* Disable LPIs */ 9991ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 10001ac19ca6SMarc Zyngier val &= ~GICR_CTLR_ENABLE_LPIS; 10011ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 10021ac19ca6SMarc Zyngier 10031ac19ca6SMarc Zyngier /* 10041ac19ca6SMarc Zyngier * Make sure any change to the table is observable by the GIC. 10051ac19ca6SMarc Zyngier */ 10061ac19ca6SMarc Zyngier dsb(sy); 10071ac19ca6SMarc Zyngier 10081ac19ca6SMarc Zyngier /* set PROPBASE */ 10091ac19ca6SMarc Zyngier val = (page_to_phys(gic_rdists->prop_page) | 10101ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 10111ac19ca6SMarc Zyngier GICR_PROPBASER_WaWb | 10121ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 10131ac19ca6SMarc Zyngier 10141ac19ca6SMarc Zyngier writeq_relaxed(val, rbase + GICR_PROPBASER); 10151ac19ca6SMarc Zyngier tmp = readq_relaxed(rbase + GICR_PROPBASER); 10161ac19ca6SMarc Zyngier 10171ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 1018241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 1019241a386cSMarc Zyngier /* 1020241a386cSMarc Zyngier * The HW reports non-shareable, we must 1021241a386cSMarc Zyngier * remove the cacheability attributes as 1022241a386cSMarc Zyngier * well. 1023241a386cSMarc Zyngier */ 1024241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 1025241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 1026241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 1027241a386cSMarc Zyngier writeq_relaxed(val, rbase + GICR_PROPBASER); 1028241a386cSMarc Zyngier } 10291ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 10301ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 10311ac19ca6SMarc Zyngier } 10321ac19ca6SMarc Zyngier 10331ac19ca6SMarc Zyngier /* set PENDBASE */ 10341ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 10354ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 10364ad3e363SMarc Zyngier GICR_PENDBASER_WaWb); 10371ac19ca6SMarc Zyngier 10381ac19ca6SMarc Zyngier writeq_relaxed(val, rbase + GICR_PENDBASER); 1039241a386cSMarc Zyngier tmp = readq_relaxed(rbase + GICR_PENDBASER); 1040241a386cSMarc Zyngier 1041241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 1042241a386cSMarc Zyngier /* 1043241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 1044241a386cSMarc Zyngier * cacheability attributes as well. 1045241a386cSMarc Zyngier */ 1046241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 1047241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 1048241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 1049241a386cSMarc Zyngier writeq_relaxed(val, rbase + GICR_PENDBASER); 1050241a386cSMarc Zyngier } 10511ac19ca6SMarc Zyngier 10521ac19ca6SMarc Zyngier /* Enable LPIs */ 10531ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 10541ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 10551ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 10561ac19ca6SMarc Zyngier 10571ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 10581ac19ca6SMarc Zyngier dsb(sy); 10591ac19ca6SMarc Zyngier } 10601ac19ca6SMarc Zyngier 10611ac19ca6SMarc Zyngier static void its_cpu_init_collection(void) 10621ac19ca6SMarc Zyngier { 10631ac19ca6SMarc Zyngier struct its_node *its; 10641ac19ca6SMarc Zyngier int cpu; 10651ac19ca6SMarc Zyngier 10661ac19ca6SMarc Zyngier spin_lock(&its_lock); 10671ac19ca6SMarc Zyngier cpu = smp_processor_id(); 10681ac19ca6SMarc Zyngier 10691ac19ca6SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 10701ac19ca6SMarc Zyngier u64 target; 10711ac19ca6SMarc Zyngier 10721ac19ca6SMarc Zyngier /* 10731ac19ca6SMarc Zyngier * We now have to bind each collection to its target 10741ac19ca6SMarc Zyngier * redistributor. 10751ac19ca6SMarc Zyngier */ 10761ac19ca6SMarc Zyngier if (readq_relaxed(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 10771ac19ca6SMarc Zyngier /* 10781ac19ca6SMarc Zyngier * This ITS wants the physical address of the 10791ac19ca6SMarc Zyngier * redistributor. 10801ac19ca6SMarc Zyngier */ 10811ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 10821ac19ca6SMarc Zyngier } else { 10831ac19ca6SMarc Zyngier /* 10841ac19ca6SMarc Zyngier * This ITS wants a linear CPU number. 10851ac19ca6SMarc Zyngier */ 10861ac19ca6SMarc Zyngier target = readq_relaxed(gic_data_rdist_rd_base() + GICR_TYPER); 1087263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 10881ac19ca6SMarc Zyngier } 10891ac19ca6SMarc Zyngier 10901ac19ca6SMarc Zyngier /* Perform collection mapping */ 10911ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 10921ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 10931ac19ca6SMarc Zyngier 10941ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 10951ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 10961ac19ca6SMarc Zyngier } 10971ac19ca6SMarc Zyngier 10981ac19ca6SMarc Zyngier spin_unlock(&its_lock); 10991ac19ca6SMarc Zyngier } 110084a6a2e7SMarc Zyngier 110184a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 110284a6a2e7SMarc Zyngier { 110384a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 11043e39e8f5SMarc Zyngier unsigned long flags; 110584a6a2e7SMarc Zyngier 11063e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 110784a6a2e7SMarc Zyngier 110884a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 110984a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 111084a6a2e7SMarc Zyngier its_dev = tmp; 111184a6a2e7SMarc Zyngier break; 111284a6a2e7SMarc Zyngier } 111384a6a2e7SMarc Zyngier } 111484a6a2e7SMarc Zyngier 11153e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 111684a6a2e7SMarc Zyngier 111784a6a2e7SMarc Zyngier return its_dev; 111884a6a2e7SMarc Zyngier } 111984a6a2e7SMarc Zyngier 112084a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 112184a6a2e7SMarc Zyngier int nvecs) 112284a6a2e7SMarc Zyngier { 112384a6a2e7SMarc Zyngier struct its_device *dev; 112484a6a2e7SMarc Zyngier unsigned long *lpi_map; 11253e39e8f5SMarc Zyngier unsigned long flags; 1126591e5becSMarc Zyngier u16 *col_map = NULL; 112784a6a2e7SMarc Zyngier void *itt; 112884a6a2e7SMarc Zyngier int lpi_base; 112984a6a2e7SMarc Zyngier int nr_lpis; 1130c8481267SMarc Zyngier int nr_ites; 113184a6a2e7SMarc Zyngier int sz; 113284a6a2e7SMarc Zyngier 113384a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1134c8481267SMarc Zyngier /* 1135c8481267SMarc Zyngier * At least one bit of EventID is being used, hence a minimum 1136c8481267SMarc Zyngier * of two entries. No, the architecture doesn't let you 1137c8481267SMarc Zyngier * express an ITT with a single entry. 1138c8481267SMarc Zyngier */ 113996555c47SWill Deacon nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 1140c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 114184a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 11426c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 114384a6a2e7SMarc Zyngier lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 1144591e5becSMarc Zyngier if (lpi_map) 1145591e5becSMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_lpis, GFP_KERNEL); 114684a6a2e7SMarc Zyngier 1147591e5becSMarc Zyngier if (!dev || !itt || !lpi_map || !col_map) { 114884a6a2e7SMarc Zyngier kfree(dev); 114984a6a2e7SMarc Zyngier kfree(itt); 115084a6a2e7SMarc Zyngier kfree(lpi_map); 1151591e5becSMarc Zyngier kfree(col_map); 115284a6a2e7SMarc Zyngier return NULL; 115384a6a2e7SMarc Zyngier } 115484a6a2e7SMarc Zyngier 11555a9a8915SMarc Zyngier __flush_dcache_area(itt, sz); 11565a9a8915SMarc Zyngier 115784a6a2e7SMarc Zyngier dev->its = its; 115884a6a2e7SMarc Zyngier dev->itt = itt; 1159c8481267SMarc Zyngier dev->nr_ites = nr_ites; 1160591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 1161591e5becSMarc Zyngier dev->event_map.col_map = col_map; 1162591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 1163591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 116484a6a2e7SMarc Zyngier dev->device_id = dev_id; 116584a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 116684a6a2e7SMarc Zyngier 11673e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 116884a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 11693e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 117084a6a2e7SMarc Zyngier 117184a6a2e7SMarc Zyngier /* Map device to its ITT */ 117284a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 117384a6a2e7SMarc Zyngier 117484a6a2e7SMarc Zyngier return dev; 117584a6a2e7SMarc Zyngier } 117684a6a2e7SMarc Zyngier 117784a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 117884a6a2e7SMarc Zyngier { 11793e39e8f5SMarc Zyngier unsigned long flags; 11803e39e8f5SMarc Zyngier 11813e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 118284a6a2e7SMarc Zyngier list_del(&its_dev->entry); 11833e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 118484a6a2e7SMarc Zyngier kfree(its_dev->itt); 118584a6a2e7SMarc Zyngier kfree(its_dev); 118684a6a2e7SMarc Zyngier } 1187b48ac83dSMarc Zyngier 1188b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 1189b48ac83dSMarc Zyngier { 1190b48ac83dSMarc Zyngier int idx; 1191b48ac83dSMarc Zyngier 1192591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 1193591e5becSMarc Zyngier dev->event_map.nr_lpis); 1194591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 1195b48ac83dSMarc Zyngier return -ENOSPC; 1196b48ac83dSMarc Zyngier 1197591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 1198591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 1199b48ac83dSMarc Zyngier 1200b48ac83dSMarc Zyngier return 0; 1201b48ac83dSMarc Zyngier } 1202b48ac83dSMarc Zyngier 120354456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 1204b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 1205b48ac83dSMarc Zyngier { 1206b48ac83dSMarc Zyngier struct its_node *its; 1207b48ac83dSMarc Zyngier struct its_device *its_dev; 120854456db9SMarc Zyngier struct msi_domain_info *msi_info; 120954456db9SMarc Zyngier u32 dev_id; 1210b48ac83dSMarc Zyngier 121154456db9SMarc Zyngier /* 121254456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 121354456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 121454456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 121554456db9SMarc Zyngier * are built on top of the ITS. 121654456db9SMarc Zyngier */ 121754456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 121854456db9SMarc Zyngier 121954456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 122054456db9SMarc Zyngier its = msi_info->data; 122154456db9SMarc Zyngier 1222f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 1223e8137f4fSMarc Zyngier if (its_dev) { 1224e8137f4fSMarc Zyngier /* 1225e8137f4fSMarc Zyngier * We already have seen this ID, probably through 1226e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 1227e8137f4fSMarc Zyngier * create the device. 1228e8137f4fSMarc Zyngier */ 1229f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 1230e8137f4fSMarc Zyngier goto out; 1231e8137f4fSMarc Zyngier } 1232b48ac83dSMarc Zyngier 1233f130420eSMarc Zyngier its_dev = its_create_device(its, dev_id, nvec); 1234b48ac83dSMarc Zyngier if (!its_dev) 1235b48ac83dSMarc Zyngier return -ENOMEM; 1236b48ac83dSMarc Zyngier 1237f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 1238e8137f4fSMarc Zyngier out: 1239b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 1240b48ac83dSMarc Zyngier return 0; 1241b48ac83dSMarc Zyngier } 1242b48ac83dSMarc Zyngier 124354456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 124454456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 124554456db9SMarc Zyngier }; 124654456db9SMarc Zyngier 1247b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 1248b48ac83dSMarc Zyngier unsigned int virq, 1249b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 1250b48ac83dSMarc Zyngier { 1251b48ac83dSMarc Zyngier struct of_phandle_args args; 1252b48ac83dSMarc Zyngier 1253b48ac83dSMarc Zyngier args.np = domain->parent->of_node; 1254b48ac83dSMarc Zyngier args.args_count = 3; 1255b48ac83dSMarc Zyngier args.args[0] = GIC_IRQ_TYPE_LPI; 1256b48ac83dSMarc Zyngier args.args[1] = hwirq; 1257b48ac83dSMarc Zyngier args.args[2] = IRQ_TYPE_EDGE_RISING; 1258b48ac83dSMarc Zyngier 1259b48ac83dSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &args); 1260b48ac83dSMarc Zyngier } 1261b48ac83dSMarc Zyngier 1262b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 1263b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 1264b48ac83dSMarc Zyngier { 1265b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 1266b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 1267b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 1268b48ac83dSMarc Zyngier int err; 1269b48ac83dSMarc Zyngier int i; 1270b48ac83dSMarc Zyngier 1271b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1272b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 1273b48ac83dSMarc Zyngier if (err) 1274b48ac83dSMarc Zyngier return err; 1275b48ac83dSMarc Zyngier 1276b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 1277b48ac83dSMarc Zyngier if (err) 1278b48ac83dSMarc Zyngier return err; 1279b48ac83dSMarc Zyngier 1280b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 1281b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 1282f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 1283591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 1284591e5becSMarc Zyngier (int) hwirq, virq + i); 1285b48ac83dSMarc Zyngier } 1286b48ac83dSMarc Zyngier 1287b48ac83dSMarc Zyngier return 0; 1288b48ac83dSMarc Zyngier } 1289b48ac83dSMarc Zyngier 1290aca268dfSMarc Zyngier static void its_irq_domain_activate(struct irq_domain *domain, 1291aca268dfSMarc Zyngier struct irq_data *d) 1292aca268dfSMarc Zyngier { 1293aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1294aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 1295aca268dfSMarc Zyngier 1296591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 1297591e5becSMarc Zyngier its_dev->event_map.col_map[event] = cpumask_first(cpu_online_mask); 1298591e5becSMarc Zyngier 1299aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 1300aca268dfSMarc Zyngier its_send_mapvi(its_dev, d->hwirq, event); 1301aca268dfSMarc Zyngier } 1302aca268dfSMarc Zyngier 1303aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 1304aca268dfSMarc Zyngier struct irq_data *d) 1305aca268dfSMarc Zyngier { 1306aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1307aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 1308aca268dfSMarc Zyngier 1309aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 1310aca268dfSMarc Zyngier its_send_discard(its_dev, event); 1311aca268dfSMarc Zyngier } 1312aca268dfSMarc Zyngier 1313b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 1314b48ac83dSMarc Zyngier unsigned int nr_irqs) 1315b48ac83dSMarc Zyngier { 1316b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 1317b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1318b48ac83dSMarc Zyngier int i; 1319b48ac83dSMarc Zyngier 1320b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1321b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 1322b48ac83dSMarc Zyngier virq + i); 1323aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 1324b48ac83dSMarc Zyngier 1325b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 1326591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 1327b48ac83dSMarc Zyngier 1328b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 13292da39949SMarc Zyngier irq_domain_reset_irq_data(data); 1330b48ac83dSMarc Zyngier } 1331b48ac83dSMarc Zyngier 1332b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 1333591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 1334591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 1335591e5becSMarc Zyngier its_lpi_free(&its_dev->event_map); 1336b48ac83dSMarc Zyngier 1337b48ac83dSMarc Zyngier /* Unmap device/itt */ 1338b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 1339b48ac83dSMarc Zyngier its_free_device(its_dev); 1340b48ac83dSMarc Zyngier } 1341b48ac83dSMarc Zyngier 1342b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 1343b48ac83dSMarc Zyngier } 1344b48ac83dSMarc Zyngier 1345b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 1346b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 1347b48ac83dSMarc Zyngier .free = its_irq_domain_free, 1348aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 1349aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 1350b48ac83dSMarc Zyngier }; 13514c21f3c2SMarc Zyngier 13524559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 13534559fbb3SYun Wu { 13544559fbb3SYun Wu u32 count = 1000000; /* 1s */ 13554559fbb3SYun Wu u32 val; 13564559fbb3SYun Wu 13574559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 13584559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 13594559fbb3SYun Wu return 0; 13604559fbb3SYun Wu 13614559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 13624559fbb3SYun Wu val &= ~GITS_CTLR_ENABLE; 13634559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 13644559fbb3SYun Wu 13654559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 13664559fbb3SYun Wu while (1) { 13674559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 13684559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 13694559fbb3SYun Wu return 0; 13704559fbb3SYun Wu 13714559fbb3SYun Wu count--; 13724559fbb3SYun Wu if (!count) 13734559fbb3SYun Wu return -EBUSY; 13744559fbb3SYun Wu 13754559fbb3SYun Wu cpu_relax(); 13764559fbb3SYun Wu udelay(1); 13774559fbb3SYun Wu } 13784559fbb3SYun Wu } 13794559fbb3SYun Wu 1380*67510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 1381*67510ccaSRobert Richter { 1382*67510ccaSRobert Richter } 1383*67510ccaSRobert Richter }; 1384*67510ccaSRobert Richter 1385*67510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 1386*67510ccaSRobert Richter { 1387*67510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 1388*67510ccaSRobert Richter 1389*67510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 1390*67510ccaSRobert Richter } 1391*67510ccaSRobert Richter 13924c21f3c2SMarc Zyngier static int its_probe(struct device_node *node, struct irq_domain *parent) 13934c21f3c2SMarc Zyngier { 13944c21f3c2SMarc Zyngier struct resource res; 13954c21f3c2SMarc Zyngier struct its_node *its; 13964c21f3c2SMarc Zyngier void __iomem *its_base; 139754456db9SMarc Zyngier struct irq_domain *inner_domain; 13984c21f3c2SMarc Zyngier u32 val; 13994c21f3c2SMarc Zyngier u64 baser, tmp; 14004c21f3c2SMarc Zyngier int err; 14014c21f3c2SMarc Zyngier 14024c21f3c2SMarc Zyngier err = of_address_to_resource(node, 0, &res); 14034c21f3c2SMarc Zyngier if (err) { 14044c21f3c2SMarc Zyngier pr_warn("%s: no regs?\n", node->full_name); 14054c21f3c2SMarc Zyngier return -ENXIO; 14064c21f3c2SMarc Zyngier } 14074c21f3c2SMarc Zyngier 14084c21f3c2SMarc Zyngier its_base = ioremap(res.start, resource_size(&res)); 14094c21f3c2SMarc Zyngier if (!its_base) { 14104c21f3c2SMarc Zyngier pr_warn("%s: unable to map registers\n", node->full_name); 14114c21f3c2SMarc Zyngier return -ENOMEM; 14124c21f3c2SMarc Zyngier } 14134c21f3c2SMarc Zyngier 14144c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 14154c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 14164c21f3c2SMarc Zyngier pr_warn("%s: no ITS detected, giving up\n", node->full_name); 14174c21f3c2SMarc Zyngier err = -ENODEV; 14184c21f3c2SMarc Zyngier goto out_unmap; 14194c21f3c2SMarc Zyngier } 14204c21f3c2SMarc Zyngier 14214559fbb3SYun Wu err = its_force_quiescent(its_base); 14224559fbb3SYun Wu if (err) { 14234559fbb3SYun Wu pr_warn("%s: failed to quiesce, giving up\n", 14244559fbb3SYun Wu node->full_name); 14254559fbb3SYun Wu goto out_unmap; 14264559fbb3SYun Wu } 14274559fbb3SYun Wu 14284c21f3c2SMarc Zyngier pr_info("ITS: %s\n", node->full_name); 14294c21f3c2SMarc Zyngier 14304c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 14314c21f3c2SMarc Zyngier if (!its) { 14324c21f3c2SMarc Zyngier err = -ENOMEM; 14334c21f3c2SMarc Zyngier goto out_unmap; 14344c21f3c2SMarc Zyngier } 14354c21f3c2SMarc Zyngier 14364c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 14374c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 14384c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 14394c21f3c2SMarc Zyngier its->base = its_base; 14404c21f3c2SMarc Zyngier its->phys_base = res.start; 14414c21f3c2SMarc Zyngier its->ite_size = ((readl_relaxed(its_base + GITS_TYPER) >> 4) & 0xf) + 1; 14424c21f3c2SMarc Zyngier 14434c21f3c2SMarc Zyngier its->cmd_base = kzalloc(ITS_CMD_QUEUE_SZ, GFP_KERNEL); 14444c21f3c2SMarc Zyngier if (!its->cmd_base) { 14454c21f3c2SMarc Zyngier err = -ENOMEM; 14464c21f3c2SMarc Zyngier goto out_free_its; 14474c21f3c2SMarc Zyngier } 14484c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 14494c21f3c2SMarc Zyngier 1450*67510ccaSRobert Richter its_enable_quirks(its); 1451*67510ccaSRobert Richter 1452841514abSMarc Zyngier err = its_alloc_tables(node->full_name, its); 14534c21f3c2SMarc Zyngier if (err) 14544c21f3c2SMarc Zyngier goto out_free_cmd; 14554c21f3c2SMarc Zyngier 14564c21f3c2SMarc Zyngier err = its_alloc_collections(its); 14574c21f3c2SMarc Zyngier if (err) 14584c21f3c2SMarc Zyngier goto out_free_tables; 14594c21f3c2SMarc Zyngier 14604c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 14614c21f3c2SMarc Zyngier GITS_CBASER_WaWb | 14624c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 14634c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 14644c21f3c2SMarc Zyngier GITS_CBASER_VALID); 14654c21f3c2SMarc Zyngier 14664c21f3c2SMarc Zyngier writeq_relaxed(baser, its->base + GITS_CBASER); 14674c21f3c2SMarc Zyngier tmp = readq_relaxed(its->base + GITS_CBASER); 14684c21f3c2SMarc Zyngier 14694ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 1470241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 1471241a386cSMarc Zyngier /* 1472241a386cSMarc Zyngier * The HW reports non-shareable, we must 1473241a386cSMarc Zyngier * remove the cacheability attributes as 1474241a386cSMarc Zyngier * well. 1475241a386cSMarc Zyngier */ 1476241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 1477241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 1478241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 1479241a386cSMarc Zyngier writeq_relaxed(baser, its->base + GITS_CBASER); 1480241a386cSMarc Zyngier } 14814c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 14824c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 14834c21f3c2SMarc Zyngier } 14844c21f3c2SMarc Zyngier 1485241a386cSMarc Zyngier writeq_relaxed(0, its->base + GITS_CWRITER); 1486241a386cSMarc Zyngier writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR); 1487241a386cSMarc Zyngier 1488841514abSMarc Zyngier if (of_property_read_bool(node, "msi-controller")) { 148954456db9SMarc Zyngier struct msi_domain_info *info; 149054456db9SMarc Zyngier 149154456db9SMarc Zyngier info = kzalloc(sizeof(*info), GFP_KERNEL); 149254456db9SMarc Zyngier if (!info) { 149354456db9SMarc Zyngier err = -ENOMEM; 149454456db9SMarc Zyngier goto out_free_tables; 149554456db9SMarc Zyngier } 149654456db9SMarc Zyngier 1497841514abSMarc Zyngier inner_domain = irq_domain_add_tree(node, &its_domain_ops, its); 1498841514abSMarc Zyngier if (!inner_domain) { 14994c21f3c2SMarc Zyngier err = -ENOMEM; 150054456db9SMarc Zyngier kfree(info); 15014c21f3c2SMarc Zyngier goto out_free_tables; 15024c21f3c2SMarc Zyngier } 15034c21f3c2SMarc Zyngier 1504841514abSMarc Zyngier inner_domain->parent = parent; 1505841514abSMarc Zyngier inner_domain->bus_token = DOMAIN_BUS_NEXUS; 150654456db9SMarc Zyngier info->ops = &its_msi_domain_ops; 150754456db9SMarc Zyngier info->data = its; 150854456db9SMarc Zyngier inner_domain->host_data = info; 15094c21f3c2SMarc Zyngier } 15104c21f3c2SMarc Zyngier 15114c21f3c2SMarc Zyngier spin_lock(&its_lock); 15124c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 15134c21f3c2SMarc Zyngier spin_unlock(&its_lock); 15144c21f3c2SMarc Zyngier 15154c21f3c2SMarc Zyngier return 0; 15164c21f3c2SMarc Zyngier 15174c21f3c2SMarc Zyngier out_free_tables: 15184c21f3c2SMarc Zyngier its_free_tables(its); 15194c21f3c2SMarc Zyngier out_free_cmd: 15204c21f3c2SMarc Zyngier kfree(its->cmd_base); 15214c21f3c2SMarc Zyngier out_free_its: 15224c21f3c2SMarc Zyngier kfree(its); 15234c21f3c2SMarc Zyngier out_unmap: 15244c21f3c2SMarc Zyngier iounmap(its_base); 15254c21f3c2SMarc Zyngier pr_err("ITS: failed probing %s (%d)\n", node->full_name, err); 15264c21f3c2SMarc Zyngier return err; 15274c21f3c2SMarc Zyngier } 15284c21f3c2SMarc Zyngier 15294c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 15304c21f3c2SMarc Zyngier { 15314c21f3c2SMarc Zyngier return !!(readl_relaxed(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 15324c21f3c2SMarc Zyngier } 15334c21f3c2SMarc Zyngier 15344c21f3c2SMarc Zyngier int its_cpu_init(void) 15354c21f3c2SMarc Zyngier { 153616acae72SVladimir Murzin if (!list_empty(&its_nodes)) { 15374c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 15384c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 15394c21f3c2SMarc Zyngier return -ENXIO; 15404c21f3c2SMarc Zyngier } 15414c21f3c2SMarc Zyngier its_cpu_init_lpis(); 15424c21f3c2SMarc Zyngier its_cpu_init_collection(); 15434c21f3c2SMarc Zyngier } 15444c21f3c2SMarc Zyngier 15454c21f3c2SMarc Zyngier return 0; 15464c21f3c2SMarc Zyngier } 15474c21f3c2SMarc Zyngier 15484c21f3c2SMarc Zyngier static struct of_device_id its_device_id[] = { 15494c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 15504c21f3c2SMarc Zyngier {}, 15514c21f3c2SMarc Zyngier }; 15524c21f3c2SMarc Zyngier 15534c21f3c2SMarc Zyngier int its_init(struct device_node *node, struct rdists *rdists, 15544c21f3c2SMarc Zyngier struct irq_domain *parent_domain) 15554c21f3c2SMarc Zyngier { 15564c21f3c2SMarc Zyngier struct device_node *np; 15574c21f3c2SMarc Zyngier 15584c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 15594c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 15604c21f3c2SMarc Zyngier its_probe(np, parent_domain); 15614c21f3c2SMarc Zyngier } 15624c21f3c2SMarc Zyngier 15634c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 15644c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 15654c21f3c2SMarc Zyngier return -ENXIO; 15664c21f3c2SMarc Zyngier } 15674c21f3c2SMarc Zyngier 15684c21f3c2SMarc Zyngier gic_rdists = rdists; 15694c21f3c2SMarc Zyngier gic_root_node = node; 15704c21f3c2SMarc Zyngier 15714c21f3c2SMarc Zyngier its_alloc_lpi_tables(); 15724c21f3c2SMarc Zyngier its_lpi_init(rdists->id_bits); 15734c21f3c2SMarc Zyngier 15744c21f3c2SMarc Zyngier return 0; 15754c21f3c2SMarc Zyngier } 1576