1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2cc2d3216SMarc Zyngier /* 3d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 4cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 5cc2d3216SMarc Zyngier */ 6cc2d3216SMarc Zyngier 73f010cf1STomasz Nowicki #include <linux/acpi.h> 88d3554b8SHanjun Guo #include <linux/acpi_iort.h> 9ffedbf0cSMarc Zyngier #include <linux/bitfield.h> 10cc2d3216SMarc Zyngier #include <linux/bitmap.h> 11cc2d3216SMarc Zyngier #include <linux/cpu.h> 12c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 13cc2d3216SMarc Zyngier #include <linux/delay.h> 1444bb7e24SRobin Murphy #include <linux/dma-iommu.h> 153fb68faeSMarc Zyngier #include <linux/efi.h> 16cc2d3216SMarc Zyngier #include <linux/interrupt.h> 173f010cf1STomasz Nowicki #include <linux/irqdomain.h> 18880cb3cdSMarc Zyngier #include <linux/list.h> 19cc2d3216SMarc Zyngier #include <linux/log2.h> 205e2c9f9aSMarc Zyngier #include <linux/memblock.h> 21cc2d3216SMarc Zyngier #include <linux/mm.h> 22cc2d3216SMarc Zyngier #include <linux/msi.h> 23cc2d3216SMarc Zyngier #include <linux/of.h> 24cc2d3216SMarc Zyngier #include <linux/of_address.h> 25cc2d3216SMarc Zyngier #include <linux/of_irq.h> 26cc2d3216SMarc Zyngier #include <linux/of_pci.h> 27cc2d3216SMarc Zyngier #include <linux/of_platform.h> 28cc2d3216SMarc Zyngier #include <linux/percpu.h> 29cc2d3216SMarc Zyngier #include <linux/slab.h> 30dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 31cc2d3216SMarc Zyngier 3241a83e06SJoel Porquet #include <linux/irqchip.h> 33cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 34c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 35cc2d3216SMarc Zyngier 36cc2d3216SMarc Zyngier #include <asm/cputype.h> 37cc2d3216SMarc Zyngier #include <asm/exception.h> 38cc2d3216SMarc Zyngier 3967510ccaSRobert Richter #include "irq-gic-common.h" 4067510ccaSRobert Richter 4194100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4294100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 43fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 44dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 45cc2d3216SMarc Zyngier 46c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 47c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 48c48ed51cSMarc Zyngier 49a13b0404SMarc Zyngier static u32 lpi_id_bits; 50a13b0404SMarc Zyngier 51a13b0404SMarc Zyngier /* 52a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 53a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 54a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 55a13b0404SMarc Zyngier */ 56a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 57a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 58a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 59a13b0404SMarc Zyngier 602130b789SJulien Thierry #define LPI_PROP_DEFAULT_PRIO GICD_INT_DEF_PRI 61a13b0404SMarc Zyngier 62cc2d3216SMarc Zyngier /* 63cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 64cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 65cc2d3216SMarc Zyngier * CPU. 66cc2d3216SMarc Zyngier */ 67cc2d3216SMarc Zyngier struct its_collection { 68cc2d3216SMarc Zyngier u64 target_address; 69cc2d3216SMarc Zyngier u16 col_id; 70cc2d3216SMarc Zyngier }; 71cc2d3216SMarc Zyngier 72cc2d3216SMarc Zyngier /* 739347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 749347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 75466b7d16SShanker Donthineni */ 76466b7d16SShanker Donthineni struct its_baser { 77466b7d16SShanker Donthineni void *base; 78466b7d16SShanker Donthineni u64 val; 79466b7d16SShanker Donthineni u32 order; 809347359aSShanker Donthineni u32 psz; 81466b7d16SShanker Donthineni }; 82466b7d16SShanker Donthineni 83558b0165SArd Biesheuvel struct its_device; 84558b0165SArd Biesheuvel 85466b7d16SShanker Donthineni /* 86cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 87841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 88841514abSMarc Zyngier * list of devices writing to it. 899791ec7dSMarc Zyngier * 909791ec7dSMarc Zyngier * dev_alloc_lock has to be taken for device allocations, while the 919791ec7dSMarc Zyngier * spinlock must be taken to parse data structures such as the device 929791ec7dSMarc Zyngier * list. 93cc2d3216SMarc Zyngier */ 94cc2d3216SMarc Zyngier struct its_node { 95cc2d3216SMarc Zyngier raw_spinlock_t lock; 969791ec7dSMarc Zyngier struct mutex dev_alloc_lock; 97cc2d3216SMarc Zyngier struct list_head entry; 98cc2d3216SMarc Zyngier void __iomem *base; 99db40f0a7STomasz Nowicki phys_addr_t phys_base; 100cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 101cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 102466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 103cc2d3216SMarc Zyngier struct its_collection *collections; 104558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 105558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 1060dd57fedSMarc Zyngier u64 typer; 107dba0bc7bSDerek Basehore u64 cbaser_save; 108dba0bc7bSDerek Basehore u32 ctlr_save; 1095e516846SMarc Zyngier u32 mpidr; 110cc2d3216SMarc Zyngier struct list_head its_device_list; 111cc2d3216SMarc Zyngier u64 flags; 112debf6d02SMarc Zyngier unsigned long list_nr; 113fbf8f40eSGanapatrao Kulkarni int numa_node; 114558b0165SArd Biesheuvel unsigned int msi_domain_flags; 115558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1165c9a882eSMarc Zyngier int vlpi_redist_offset; 117cc2d3216SMarc Zyngier }; 118cc2d3216SMarc Zyngier 1190dd57fedSMarc Zyngier #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) 1205e516846SMarc Zyngier #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) 121576a8342SMarc Zyngier #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) 1220dd57fedSMarc Zyngier 123cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 124cc2d3216SMarc Zyngier 12532bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 126f2d83409SMarc Zyngier #define ITS_MAX_VPEID_BITS \ 127f2d83409SMarc Zyngier ({ \ 128f2d83409SMarc Zyngier int nvpeid = 16; \ 129f2d83409SMarc Zyngier if (gic_rdists->has_rvpeid && \ 130f2d83409SMarc Zyngier gic_rdists->gicd_typer2 & GICD_TYPER2_VIL) \ 131f2d83409SMarc Zyngier nvpeid = 1 + (gic_rdists->gicd_typer2 & \ 132f2d83409SMarc Zyngier GICD_TYPER2_VID); \ 133f2d83409SMarc Zyngier \ 134f2d83409SMarc Zyngier nvpeid; \ 135f2d83409SMarc Zyngier }) 13632bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 13732bd44dcSShanker Donthineni 1382eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1392eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1402eca0d6cSShanker Donthineni 141591e5becSMarc Zyngier struct event_lpi_map { 142591e5becSMarc Zyngier unsigned long *lpi_map; 143591e5becSMarc Zyngier u16 *col_map; 144591e5becSMarc Zyngier irq_hw_number_t lpi_base; 145591e5becSMarc Zyngier int nr_lpis; 14611635fa2SMarc Zyngier raw_spinlock_t vlpi_lock; 147d011e4e6SMarc Zyngier struct its_vm *vm; 148d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 149d011e4e6SMarc Zyngier int nr_vlpis; 150591e5becSMarc Zyngier }; 151591e5becSMarc Zyngier 152cc2d3216SMarc Zyngier /* 153d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 154d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 155d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 156d011e4e6SMarc Zyngier * indicates which one. 157cc2d3216SMarc Zyngier */ 158cc2d3216SMarc Zyngier struct its_device { 159cc2d3216SMarc Zyngier struct list_head entry; 160cc2d3216SMarc Zyngier struct its_node *its; 161591e5becSMarc Zyngier struct event_lpi_map event_map; 162cc2d3216SMarc Zyngier void *itt; 163cc2d3216SMarc Zyngier u32 nr_ites; 164cc2d3216SMarc Zyngier u32 device_id; 1659791ec7dSMarc Zyngier bool shared; 166cc2d3216SMarc Zyngier }; 167cc2d3216SMarc Zyngier 16820b3d54eSMarc Zyngier static struct { 16920b3d54eSMarc Zyngier raw_spinlock_t lock; 17020b3d54eSMarc Zyngier struct its_device *dev; 17120b3d54eSMarc Zyngier struct its_vpe **vpes; 17220b3d54eSMarc Zyngier int next_victim; 17320b3d54eSMarc Zyngier } vpe_proxy; 17420b3d54eSMarc Zyngier 1751ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 176a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1771ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 178db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1791ac19ca6SMarc Zyngier 1803dfa576bSMarc Zyngier static unsigned long its_list_map; 1813171a47aSMarc Zyngier static u16 vmovp_seq_num; 1823171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1833171a47aSMarc Zyngier 1847d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1853dfa576bSMarc Zyngier 1861ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 18711e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1881ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 189e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1901ac19ca6SMarc Zyngier 19184243125SZenghui Yu static u16 get_its_list(struct its_vm *vm) 19284243125SZenghui Yu { 19384243125SZenghui Yu struct its_node *its; 19484243125SZenghui Yu unsigned long its_list = 0; 19584243125SZenghui Yu 19684243125SZenghui Yu list_for_each_entry(its, &its_nodes, entry) { 1970dd57fedSMarc Zyngier if (!is_v4(its)) 19884243125SZenghui Yu continue; 19984243125SZenghui Yu 20084243125SZenghui Yu if (vm->vlpi_count[its->list_nr]) 20184243125SZenghui Yu __set_bit(its->list_nr, &its_list); 20284243125SZenghui Yu } 20384243125SZenghui Yu 20484243125SZenghui Yu return (u16)its_list; 20584243125SZenghui Yu } 20684243125SZenghui Yu 207425c09beSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 208425c09beSMarc Zyngier { 209425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 210425c09beSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 211425c09beSMarc Zyngier } 212425c09beSMarc Zyngier 213591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 214591e5becSMarc Zyngier u32 event) 215591e5becSMarc Zyngier { 216591e5becSMarc Zyngier struct its_node *its = its_dev->its; 217591e5becSMarc Zyngier 218591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 219591e5becSMarc Zyngier } 220591e5becSMarc Zyngier 221c1d4d5cdSMarc Zyngier static struct its_vlpi_map *dev_event_to_vlpi_map(struct its_device *its_dev, 222c1d4d5cdSMarc Zyngier u32 event) 223c1d4d5cdSMarc Zyngier { 224c1d4d5cdSMarc Zyngier if (WARN_ON_ONCE(event >= its_dev->event_map.nr_lpis)) 225c1d4d5cdSMarc Zyngier return NULL; 226c1d4d5cdSMarc Zyngier 227c1d4d5cdSMarc Zyngier return &its_dev->event_map.vlpi_maps[event]; 228c1d4d5cdSMarc Zyngier } 229c1d4d5cdSMarc Zyngier 230425c09beSMarc Zyngier static struct its_collection *irq_to_col(struct irq_data *d) 231425c09beSMarc Zyngier { 232425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 233425c09beSMarc Zyngier 234425c09beSMarc Zyngier return dev_event_to_col(its_dev, its_get_event_id(d)); 235425c09beSMarc Zyngier } 236425c09beSMarc Zyngier 23783559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 23883559b47SMarc Zyngier { 23920faba84SJoe Perches if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(15, 0))) 24083559b47SMarc Zyngier return NULL; 24183559b47SMarc Zyngier 24283559b47SMarc Zyngier return col; 24383559b47SMarc Zyngier } 24483559b47SMarc Zyngier 245205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 246205e065dSMarc Zyngier { 247205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 248205e065dSMarc Zyngier return vpe; 249205e065dSMarc Zyngier 250205e065dSMarc Zyngier return NULL; 251205e065dSMarc Zyngier } 252205e065dSMarc Zyngier 253cc2d3216SMarc Zyngier /* 254cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 255cc2d3216SMarc Zyngier * block. 256cc2d3216SMarc Zyngier */ 257cc2d3216SMarc Zyngier struct its_cmd_desc { 258cc2d3216SMarc Zyngier union { 259cc2d3216SMarc Zyngier struct { 260cc2d3216SMarc Zyngier struct its_device *dev; 261cc2d3216SMarc Zyngier u32 event_id; 262cc2d3216SMarc Zyngier } its_inv_cmd; 263cc2d3216SMarc Zyngier 264cc2d3216SMarc Zyngier struct { 265cc2d3216SMarc Zyngier struct its_device *dev; 266cc2d3216SMarc Zyngier u32 event_id; 2678d85dcedSMarc Zyngier } its_clear_cmd; 2688d85dcedSMarc Zyngier 2698d85dcedSMarc Zyngier struct { 2708d85dcedSMarc Zyngier struct its_device *dev; 2718d85dcedSMarc Zyngier u32 event_id; 272cc2d3216SMarc Zyngier } its_int_cmd; 273cc2d3216SMarc Zyngier 274cc2d3216SMarc Zyngier struct { 275cc2d3216SMarc Zyngier struct its_device *dev; 276cc2d3216SMarc Zyngier int valid; 277cc2d3216SMarc Zyngier } its_mapd_cmd; 278cc2d3216SMarc Zyngier 279cc2d3216SMarc Zyngier struct { 280cc2d3216SMarc Zyngier struct its_collection *col; 281cc2d3216SMarc Zyngier int valid; 282cc2d3216SMarc Zyngier } its_mapc_cmd; 283cc2d3216SMarc Zyngier 284cc2d3216SMarc Zyngier struct { 285cc2d3216SMarc Zyngier struct its_device *dev; 286cc2d3216SMarc Zyngier u32 phys_id; 287cc2d3216SMarc Zyngier u32 event_id; 2886a25ad3aSMarc Zyngier } its_mapti_cmd; 289cc2d3216SMarc Zyngier 290cc2d3216SMarc Zyngier struct { 291cc2d3216SMarc Zyngier struct its_device *dev; 292cc2d3216SMarc Zyngier struct its_collection *col; 293591e5becSMarc Zyngier u32 event_id; 294cc2d3216SMarc Zyngier } its_movi_cmd; 295cc2d3216SMarc Zyngier 296cc2d3216SMarc Zyngier struct { 297cc2d3216SMarc Zyngier struct its_device *dev; 298cc2d3216SMarc Zyngier u32 event_id; 299cc2d3216SMarc Zyngier } its_discard_cmd; 300cc2d3216SMarc Zyngier 301cc2d3216SMarc Zyngier struct { 302cc2d3216SMarc Zyngier struct its_collection *col; 303cc2d3216SMarc Zyngier } its_invall_cmd; 304d011e4e6SMarc Zyngier 305d011e4e6SMarc Zyngier struct { 306d011e4e6SMarc Zyngier struct its_vpe *vpe; 307eb78192bSMarc Zyngier } its_vinvall_cmd; 308eb78192bSMarc Zyngier 309eb78192bSMarc Zyngier struct { 310eb78192bSMarc Zyngier struct its_vpe *vpe; 311eb78192bSMarc Zyngier struct its_collection *col; 312eb78192bSMarc Zyngier bool valid; 313eb78192bSMarc Zyngier } its_vmapp_cmd; 314eb78192bSMarc Zyngier 315eb78192bSMarc Zyngier struct { 316eb78192bSMarc Zyngier struct its_vpe *vpe; 317d011e4e6SMarc Zyngier struct its_device *dev; 318d011e4e6SMarc Zyngier u32 virt_id; 319d011e4e6SMarc Zyngier u32 event_id; 320d011e4e6SMarc Zyngier bool db_enabled; 321d011e4e6SMarc Zyngier } its_vmapti_cmd; 322d011e4e6SMarc Zyngier 323d011e4e6SMarc Zyngier struct { 324d011e4e6SMarc Zyngier struct its_vpe *vpe; 325d011e4e6SMarc Zyngier struct its_device *dev; 326d011e4e6SMarc Zyngier u32 event_id; 327d011e4e6SMarc Zyngier bool db_enabled; 328d011e4e6SMarc Zyngier } its_vmovi_cmd; 3293171a47aSMarc Zyngier 3303171a47aSMarc Zyngier struct { 3313171a47aSMarc Zyngier struct its_vpe *vpe; 3323171a47aSMarc Zyngier struct its_collection *col; 3333171a47aSMarc Zyngier u16 seq_num; 3343171a47aSMarc Zyngier u16 its_list; 3353171a47aSMarc Zyngier } its_vmovp_cmd; 336cc2d3216SMarc Zyngier }; 337cc2d3216SMarc Zyngier }; 338cc2d3216SMarc Zyngier 339cc2d3216SMarc Zyngier /* 340cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 341cc2d3216SMarc Zyngier */ 342cc2d3216SMarc Zyngier struct its_cmd_block { 3432bbdfcc5SBen Dooks (Codethink) union { 344cc2d3216SMarc Zyngier u64 raw_cmd[4]; 3452bbdfcc5SBen Dooks (Codethink) __le64 raw_cmd_le[4]; 3462bbdfcc5SBen Dooks (Codethink) }; 347cc2d3216SMarc Zyngier }; 348cc2d3216SMarc Zyngier 349cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 350cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 351cc2d3216SMarc Zyngier 35267047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 35367047f90SMarc Zyngier struct its_cmd_block *, 354cc2d3216SMarc Zyngier struct its_cmd_desc *); 355cc2d3216SMarc Zyngier 35667047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 35767047f90SMarc Zyngier struct its_cmd_block *, 358d011e4e6SMarc Zyngier struct its_cmd_desc *); 359d011e4e6SMarc Zyngier 3604d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 3614d36f136SMarc Zyngier { 3624d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 3634d36f136SMarc Zyngier *raw_cmd &= ~mask; 3644d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 3654d36f136SMarc Zyngier } 3664d36f136SMarc Zyngier 367cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 368cc2d3216SMarc Zyngier { 3694d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 370cc2d3216SMarc Zyngier } 371cc2d3216SMarc Zyngier 372cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 373cc2d3216SMarc Zyngier { 3744d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 375cc2d3216SMarc Zyngier } 376cc2d3216SMarc Zyngier 377cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 378cc2d3216SMarc Zyngier { 3794d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 380cc2d3216SMarc Zyngier } 381cc2d3216SMarc Zyngier 382cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 383cc2d3216SMarc Zyngier { 3844d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 385cc2d3216SMarc Zyngier } 386cc2d3216SMarc Zyngier 387cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 388cc2d3216SMarc Zyngier { 3894d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 390cc2d3216SMarc Zyngier } 391cc2d3216SMarc Zyngier 392cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 393cc2d3216SMarc Zyngier { 39430ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 395cc2d3216SMarc Zyngier } 396cc2d3216SMarc Zyngier 397cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 398cc2d3216SMarc Zyngier { 3994d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 400cc2d3216SMarc Zyngier } 401cc2d3216SMarc Zyngier 402cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 403cc2d3216SMarc Zyngier { 40430ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 405cc2d3216SMarc Zyngier } 406cc2d3216SMarc Zyngier 407cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 408cc2d3216SMarc Zyngier { 4094d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 410cc2d3216SMarc Zyngier } 411cc2d3216SMarc Zyngier 412d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 413d011e4e6SMarc Zyngier { 414d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 415d011e4e6SMarc Zyngier } 416d011e4e6SMarc Zyngier 417d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 418d011e4e6SMarc Zyngier { 419d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 420d011e4e6SMarc Zyngier } 421d011e4e6SMarc Zyngier 422d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 423d011e4e6SMarc Zyngier { 424d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 425d011e4e6SMarc Zyngier } 426d011e4e6SMarc Zyngier 427d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 428d011e4e6SMarc Zyngier { 429d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 430d011e4e6SMarc Zyngier } 431d011e4e6SMarc Zyngier 4323171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 4333171a47aSMarc Zyngier { 4343171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 4353171a47aSMarc Zyngier } 4363171a47aSMarc Zyngier 4373171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 4383171a47aSMarc Zyngier { 4393171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 4403171a47aSMarc Zyngier } 4413171a47aSMarc Zyngier 442eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 443eb78192bSMarc Zyngier { 44430ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 445eb78192bSMarc Zyngier } 446eb78192bSMarc Zyngier 447eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 448eb78192bSMarc Zyngier { 449eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 450eb78192bSMarc Zyngier } 451eb78192bSMarc Zyngier 45264edfaa9SMarc Zyngier static void its_encode_vconf_addr(struct its_cmd_block *cmd, u64 vconf_pa) 45364edfaa9SMarc Zyngier { 45464edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], vconf_pa >> 16, 51, 16); 45564edfaa9SMarc Zyngier } 45664edfaa9SMarc Zyngier 45764edfaa9SMarc Zyngier static void its_encode_alloc(struct its_cmd_block *cmd, bool alloc) 45864edfaa9SMarc Zyngier { 45964edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], alloc, 8, 8); 46064edfaa9SMarc Zyngier } 46164edfaa9SMarc Zyngier 46264edfaa9SMarc Zyngier static void its_encode_ptz(struct its_cmd_block *cmd, bool ptz) 46364edfaa9SMarc Zyngier { 46464edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], ptz, 9, 9); 46564edfaa9SMarc Zyngier } 46664edfaa9SMarc Zyngier 46764edfaa9SMarc Zyngier static void its_encode_vmapp_default_db(struct its_cmd_block *cmd, 46864edfaa9SMarc Zyngier u32 vpe_db_lpi) 46964edfaa9SMarc Zyngier { 47064edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpe_db_lpi, 31, 0); 47164edfaa9SMarc Zyngier } 47264edfaa9SMarc Zyngier 473cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 474cc2d3216SMarc Zyngier { 475cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 4762bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[0] = cpu_to_le64(cmd->raw_cmd[0]); 4772bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[1] = cpu_to_le64(cmd->raw_cmd[1]); 4782bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[2] = cpu_to_le64(cmd->raw_cmd[2]); 4792bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[3] = cpu_to_le64(cmd->raw_cmd[3]); 480cc2d3216SMarc Zyngier } 481cc2d3216SMarc Zyngier 48267047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 48367047f90SMarc Zyngier struct its_cmd_block *cmd, 484cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 485cc2d3216SMarc Zyngier { 486cc2d3216SMarc Zyngier unsigned long itt_addr; 487c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 488cc2d3216SMarc Zyngier 489cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 490cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 491cc2d3216SMarc Zyngier 492cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 493cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 494cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 495cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 496cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 497cc2d3216SMarc Zyngier 498cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 499cc2d3216SMarc Zyngier 500591e5becSMarc Zyngier return NULL; 501cc2d3216SMarc Zyngier } 502cc2d3216SMarc Zyngier 50367047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 50467047f90SMarc Zyngier struct its_cmd_block *cmd, 505cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 506cc2d3216SMarc Zyngier { 507cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 508cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 509cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 510cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 511cc2d3216SMarc Zyngier 512cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 513cc2d3216SMarc Zyngier 514cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 515cc2d3216SMarc Zyngier } 516cc2d3216SMarc Zyngier 51767047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 51867047f90SMarc Zyngier struct its_cmd_block *cmd, 519cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 520cc2d3216SMarc Zyngier { 521591e5becSMarc Zyngier struct its_collection *col; 522591e5becSMarc Zyngier 5236a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 5246a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 525591e5becSMarc Zyngier 5266a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 5276a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 5286a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 5296a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 530591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 531cc2d3216SMarc Zyngier 532cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 533cc2d3216SMarc Zyngier 53483559b47SMarc Zyngier return valid_col(col); 535cc2d3216SMarc Zyngier } 536cc2d3216SMarc Zyngier 53767047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 53867047f90SMarc Zyngier struct its_cmd_block *cmd, 539cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 540cc2d3216SMarc Zyngier { 541591e5becSMarc Zyngier struct its_collection *col; 542591e5becSMarc Zyngier 543591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 544591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 545591e5becSMarc Zyngier 546cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 547cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 548591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 549cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 550cc2d3216SMarc Zyngier 551cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 552cc2d3216SMarc Zyngier 55383559b47SMarc Zyngier return valid_col(col); 554cc2d3216SMarc Zyngier } 555cc2d3216SMarc Zyngier 55667047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 55767047f90SMarc Zyngier struct its_cmd_block *cmd, 558cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 559cc2d3216SMarc Zyngier { 560591e5becSMarc Zyngier struct its_collection *col; 561591e5becSMarc Zyngier 562591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 563591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 564591e5becSMarc Zyngier 565cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 566cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 567cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 568cc2d3216SMarc Zyngier 569cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 570cc2d3216SMarc Zyngier 57183559b47SMarc Zyngier return valid_col(col); 572cc2d3216SMarc Zyngier } 573cc2d3216SMarc Zyngier 57467047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 57567047f90SMarc Zyngier struct its_cmd_block *cmd, 576cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 577cc2d3216SMarc Zyngier { 578591e5becSMarc Zyngier struct its_collection *col; 579591e5becSMarc Zyngier 580591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 581591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 582591e5becSMarc Zyngier 583cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 584cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 585cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 586cc2d3216SMarc Zyngier 587cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 588cc2d3216SMarc Zyngier 58983559b47SMarc Zyngier return valid_col(col); 590cc2d3216SMarc Zyngier } 591cc2d3216SMarc Zyngier 59267047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 59367047f90SMarc Zyngier struct its_cmd_block *cmd, 5948d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5958d85dcedSMarc Zyngier { 5968d85dcedSMarc Zyngier struct its_collection *col; 5978d85dcedSMarc Zyngier 5988d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 5998d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 6008d85dcedSMarc Zyngier 6018d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 6028d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 6038d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 6048d85dcedSMarc Zyngier 6058d85dcedSMarc Zyngier its_fixup_cmd(cmd); 6068d85dcedSMarc Zyngier 60783559b47SMarc Zyngier return valid_col(col); 6088d85dcedSMarc Zyngier } 6098d85dcedSMarc Zyngier 61067047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 61167047f90SMarc Zyngier struct its_cmd_block *cmd, 6128d85dcedSMarc Zyngier struct its_cmd_desc *desc) 6138d85dcedSMarc Zyngier { 6148d85dcedSMarc Zyngier struct its_collection *col; 6158d85dcedSMarc Zyngier 6168d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 6178d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 6188d85dcedSMarc Zyngier 6198d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 6208d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 6218d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 6228d85dcedSMarc Zyngier 6238d85dcedSMarc Zyngier its_fixup_cmd(cmd); 6248d85dcedSMarc Zyngier 62583559b47SMarc Zyngier return valid_col(col); 6268d85dcedSMarc Zyngier } 6278d85dcedSMarc Zyngier 62867047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 62967047f90SMarc Zyngier struct its_cmd_block *cmd, 630cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 631cc2d3216SMarc Zyngier { 632cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 633cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 634cc2d3216SMarc Zyngier 635cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 636cc2d3216SMarc Zyngier 637cc2d3216SMarc Zyngier return NULL; 638cc2d3216SMarc Zyngier } 639cc2d3216SMarc Zyngier 64067047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 64167047f90SMarc Zyngier struct its_cmd_block *cmd, 642eb78192bSMarc Zyngier struct its_cmd_desc *desc) 643eb78192bSMarc Zyngier { 644eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 645eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 646eb78192bSMarc Zyngier 647eb78192bSMarc Zyngier its_fixup_cmd(cmd); 648eb78192bSMarc Zyngier 649205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 650eb78192bSMarc Zyngier } 651eb78192bSMarc Zyngier 65267047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 65367047f90SMarc Zyngier struct its_cmd_block *cmd, 654eb78192bSMarc Zyngier struct its_cmd_desc *desc) 655eb78192bSMarc Zyngier { 65664edfaa9SMarc Zyngier unsigned long vpt_addr, vconf_addr; 6575c9a882eSMarc Zyngier u64 target; 65864edfaa9SMarc Zyngier bool alloc; 659eb78192bSMarc Zyngier 660eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 661eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 662eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 66364edfaa9SMarc Zyngier 66464edfaa9SMarc Zyngier if (!desc->its_vmapp_cmd.valid) { 66564edfaa9SMarc Zyngier if (is_v4_1(its)) { 66664edfaa9SMarc Zyngier alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count); 66764edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 66864edfaa9SMarc Zyngier } 66964edfaa9SMarc Zyngier 67064edfaa9SMarc Zyngier goto out; 67164edfaa9SMarc Zyngier } 67264edfaa9SMarc Zyngier 67364edfaa9SMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 67464edfaa9SMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 67564edfaa9SMarc Zyngier 6765c9a882eSMarc Zyngier its_encode_target(cmd, target); 677eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 678eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 679eb78192bSMarc Zyngier 68064edfaa9SMarc Zyngier if (!is_v4_1(its)) 68164edfaa9SMarc Zyngier goto out; 68264edfaa9SMarc Zyngier 68364edfaa9SMarc Zyngier vconf_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->its_vm->vprop_page)); 68464edfaa9SMarc Zyngier 68564edfaa9SMarc Zyngier alloc = !atomic_fetch_inc(&desc->its_vmapp_cmd.vpe->vmapp_count); 68664edfaa9SMarc Zyngier 68764edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 68864edfaa9SMarc Zyngier 68964edfaa9SMarc Zyngier /* We can only signal PTZ when alloc==1. Why do we have two bits? */ 69064edfaa9SMarc Zyngier its_encode_ptz(cmd, alloc); 69164edfaa9SMarc Zyngier its_encode_vconf_addr(cmd, vconf_addr); 69264edfaa9SMarc Zyngier its_encode_vmapp_default_db(cmd, desc->its_vmapp_cmd.vpe->vpe_db_lpi); 69364edfaa9SMarc Zyngier 69464edfaa9SMarc Zyngier out: 695eb78192bSMarc Zyngier its_fixup_cmd(cmd); 696eb78192bSMarc Zyngier 697205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 698eb78192bSMarc Zyngier } 699eb78192bSMarc Zyngier 70067047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 70167047f90SMarc Zyngier struct its_cmd_block *cmd, 702d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 703d011e4e6SMarc Zyngier { 704d011e4e6SMarc Zyngier u32 db; 705d011e4e6SMarc Zyngier 706d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 707d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 708d011e4e6SMarc Zyngier else 709d011e4e6SMarc Zyngier db = 1023; 710d011e4e6SMarc Zyngier 711d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 712d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 713d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 714d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 715d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 716d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 717d011e4e6SMarc Zyngier 718d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 719d011e4e6SMarc Zyngier 720205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 721d011e4e6SMarc Zyngier } 722d011e4e6SMarc Zyngier 72367047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 72467047f90SMarc Zyngier struct its_cmd_block *cmd, 725d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 726d011e4e6SMarc Zyngier { 727d011e4e6SMarc Zyngier u32 db; 728d011e4e6SMarc Zyngier 729d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 730d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 731d011e4e6SMarc Zyngier else 732d011e4e6SMarc Zyngier db = 1023; 733d011e4e6SMarc Zyngier 734d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 735d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 736d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 737d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 738d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 739d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 740d011e4e6SMarc Zyngier 741d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 742d011e4e6SMarc Zyngier 743205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 744d011e4e6SMarc Zyngier } 745d011e4e6SMarc Zyngier 74667047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 74767047f90SMarc Zyngier struct its_cmd_block *cmd, 7483171a47aSMarc Zyngier struct its_cmd_desc *desc) 7493171a47aSMarc Zyngier { 7505c9a882eSMarc Zyngier u64 target; 7515c9a882eSMarc Zyngier 7525c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 7533171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 7543171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 7553171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 7563171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 7575c9a882eSMarc Zyngier its_encode_target(cmd, target); 7583171a47aSMarc Zyngier 7593171a47aSMarc Zyngier its_fixup_cmd(cmd); 7603171a47aSMarc Zyngier 761205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 7623171a47aSMarc Zyngier } 7633171a47aSMarc Zyngier 76428614696SMarc Zyngier static struct its_vpe *its_build_vinv_cmd(struct its_node *its, 76528614696SMarc Zyngier struct its_cmd_block *cmd, 76628614696SMarc Zyngier struct its_cmd_desc *desc) 76728614696SMarc Zyngier { 76828614696SMarc Zyngier struct its_vlpi_map *map; 76928614696SMarc Zyngier 77028614696SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_inv_cmd.dev, 77128614696SMarc Zyngier desc->its_inv_cmd.event_id); 77228614696SMarc Zyngier 77328614696SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 77428614696SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 77528614696SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 77628614696SMarc Zyngier 77728614696SMarc Zyngier its_fixup_cmd(cmd); 77828614696SMarc Zyngier 77928614696SMarc Zyngier return valid_vpe(its, map->vpe); 78028614696SMarc Zyngier } 78128614696SMarc Zyngier 782ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vint_cmd(struct its_node *its, 783ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 784ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 785ed0e4aa9SMarc Zyngier { 786ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 787ed0e4aa9SMarc Zyngier 788ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_int_cmd.dev, 789ed0e4aa9SMarc Zyngier desc->its_int_cmd.event_id); 790ed0e4aa9SMarc Zyngier 791ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 792ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 793ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 794ed0e4aa9SMarc Zyngier 795ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 796ed0e4aa9SMarc Zyngier 797ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 798ed0e4aa9SMarc Zyngier } 799ed0e4aa9SMarc Zyngier 800ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vclear_cmd(struct its_node *its, 801ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 802ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 803ed0e4aa9SMarc Zyngier { 804ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 805ed0e4aa9SMarc Zyngier 806ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_clear_cmd.dev, 807ed0e4aa9SMarc Zyngier desc->its_clear_cmd.event_id); 808ed0e4aa9SMarc Zyngier 809ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 810ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 811ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 812ed0e4aa9SMarc Zyngier 813ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 814ed0e4aa9SMarc Zyngier 815ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 816ed0e4aa9SMarc Zyngier } 817ed0e4aa9SMarc Zyngier 818cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 819cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 820cc2d3216SMarc Zyngier { 821cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 822cc2d3216SMarc Zyngier } 823cc2d3216SMarc Zyngier 824cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 825cc2d3216SMarc Zyngier { 826cc2d3216SMarc Zyngier int widx; 827cc2d3216SMarc Zyngier int ridx; 828cc2d3216SMarc Zyngier 829cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 830cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 831cc2d3216SMarc Zyngier 832cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 833cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 834cc2d3216SMarc Zyngier return 1; 835cc2d3216SMarc Zyngier 836cc2d3216SMarc Zyngier return 0; 837cc2d3216SMarc Zyngier } 838cc2d3216SMarc Zyngier 839cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 840cc2d3216SMarc Zyngier { 841cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 842cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 843cc2d3216SMarc Zyngier 844cc2d3216SMarc Zyngier while (its_queue_full(its)) { 845cc2d3216SMarc Zyngier count--; 846cc2d3216SMarc Zyngier if (!count) { 847cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 848cc2d3216SMarc Zyngier return NULL; 849cc2d3216SMarc Zyngier } 850cc2d3216SMarc Zyngier cpu_relax(); 851cc2d3216SMarc Zyngier udelay(1); 852cc2d3216SMarc Zyngier } 853cc2d3216SMarc Zyngier 854cc2d3216SMarc Zyngier cmd = its->cmd_write++; 855cc2d3216SMarc Zyngier 856cc2d3216SMarc Zyngier /* Handle queue wrapping */ 857cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 858cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 859cc2d3216SMarc Zyngier 86034d677a9SMarc Zyngier /* Clear command */ 86134d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 86234d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 86334d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 86434d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 86534d677a9SMarc Zyngier 866cc2d3216SMarc Zyngier return cmd; 867cc2d3216SMarc Zyngier } 868cc2d3216SMarc Zyngier 869cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 870cc2d3216SMarc Zyngier { 871cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 872cc2d3216SMarc Zyngier 873cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 874cc2d3216SMarc Zyngier 875cc2d3216SMarc Zyngier return its->cmd_write; 876cc2d3216SMarc Zyngier } 877cc2d3216SMarc Zyngier 878cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 879cc2d3216SMarc Zyngier { 880cc2d3216SMarc Zyngier /* 881cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 882cc2d3216SMarc Zyngier * the ITS. 883cc2d3216SMarc Zyngier */ 884cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 885328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 886cc2d3216SMarc Zyngier else 887cc2d3216SMarc Zyngier dsb(ishst); 888cc2d3216SMarc Zyngier } 889cc2d3216SMarc Zyngier 890a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 891a050fa54SHeyi Guo u64 prev_idx, 892cc2d3216SMarc Zyngier struct its_cmd_block *to) 893cc2d3216SMarc Zyngier { 894a050fa54SHeyi Guo u64 rd_idx, to_idx, linear_idx; 895cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 896cc2d3216SMarc Zyngier 897a050fa54SHeyi Guo /* Linearize to_idx if the command set has wrapped around */ 898cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 899a050fa54SHeyi Guo if (to_idx < prev_idx) 900a050fa54SHeyi Guo to_idx += ITS_CMD_QUEUE_SZ; 901a050fa54SHeyi Guo 902a050fa54SHeyi Guo linear_idx = prev_idx; 903cc2d3216SMarc Zyngier 904cc2d3216SMarc Zyngier while (1) { 905a050fa54SHeyi Guo s64 delta; 906a050fa54SHeyi Guo 907cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 9089bdd8b1cSMarc Zyngier 909a050fa54SHeyi Guo /* 910a050fa54SHeyi Guo * Compute the read pointer progress, taking the 911a050fa54SHeyi Guo * potential wrap-around into account. 912a050fa54SHeyi Guo */ 913a050fa54SHeyi Guo delta = rd_idx - prev_idx; 914a050fa54SHeyi Guo if (rd_idx < prev_idx) 915a050fa54SHeyi Guo delta += ITS_CMD_QUEUE_SZ; 9169bdd8b1cSMarc Zyngier 917a050fa54SHeyi Guo linear_idx += delta; 918a050fa54SHeyi Guo if (linear_idx >= to_idx) 919cc2d3216SMarc Zyngier break; 920cc2d3216SMarc Zyngier 921cc2d3216SMarc Zyngier count--; 922cc2d3216SMarc Zyngier if (!count) { 923a050fa54SHeyi Guo pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", 924a050fa54SHeyi Guo to_idx, linear_idx); 925a19b462fSMarc Zyngier return -1; 926cc2d3216SMarc Zyngier } 927a050fa54SHeyi Guo prev_idx = rd_idx; 928cc2d3216SMarc Zyngier cpu_relax(); 929cc2d3216SMarc Zyngier udelay(1); 930cc2d3216SMarc Zyngier } 931a19b462fSMarc Zyngier 932a19b462fSMarc Zyngier return 0; 933cc2d3216SMarc Zyngier } 934cc2d3216SMarc Zyngier 935e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 936e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 937e4f9094bSMarc Zyngier void name(struct its_node *its, \ 938e4f9094bSMarc Zyngier buildtype builder, \ 939e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 940e4f9094bSMarc Zyngier { \ 941e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 942e4f9094bSMarc Zyngier synctype *sync_obj; \ 943e4f9094bSMarc Zyngier unsigned long flags; \ 944a050fa54SHeyi Guo u64 rd_idx; \ 945e4f9094bSMarc Zyngier \ 946e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 947e4f9094bSMarc Zyngier \ 948e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 949e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 950e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 951e4f9094bSMarc Zyngier return; \ 952e4f9094bSMarc Zyngier } \ 95367047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 954e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 955e4f9094bSMarc Zyngier \ 956e4f9094bSMarc Zyngier if (sync_obj) { \ 957e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 958e4f9094bSMarc Zyngier if (!sync_cmd) \ 959e4f9094bSMarc Zyngier goto post; \ 960e4f9094bSMarc Zyngier \ 96167047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 962e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 963e4f9094bSMarc Zyngier } \ 964e4f9094bSMarc Zyngier \ 965e4f9094bSMarc Zyngier post: \ 966a050fa54SHeyi Guo rd_idx = readl_relaxed(its->base + GITS_CREADR); \ 967e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 968e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 969e4f9094bSMarc Zyngier \ 970a050fa54SHeyi Guo if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \ 971a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 972e4f9094bSMarc Zyngier } 973e4f9094bSMarc Zyngier 97467047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 97567047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 976e4f9094bSMarc Zyngier struct its_collection *sync_col) 977cc2d3216SMarc Zyngier { 978cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 979cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 980e4f9094bSMarc Zyngier 981cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 982cc2d3216SMarc Zyngier } 983cc2d3216SMarc Zyngier 984e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 985e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 986cc2d3216SMarc Zyngier 98767047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 98867047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 989d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 990d011e4e6SMarc Zyngier { 991d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 992d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 993d011e4e6SMarc Zyngier 994d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 995d011e4e6SMarc Zyngier } 996d011e4e6SMarc Zyngier 997d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 998d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 999d011e4e6SMarc Zyngier 10008d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 10018d85dcedSMarc Zyngier { 10028d85dcedSMarc Zyngier struct its_cmd_desc desc; 10038d85dcedSMarc Zyngier 10048d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 10058d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 10068d85dcedSMarc Zyngier 10078d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 10088d85dcedSMarc Zyngier } 10098d85dcedSMarc Zyngier 10108d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 10118d85dcedSMarc Zyngier { 10128d85dcedSMarc Zyngier struct its_cmd_desc desc; 10138d85dcedSMarc Zyngier 10148d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 10158d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 10168d85dcedSMarc Zyngier 10178d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 1018cc2d3216SMarc Zyngier } 1019cc2d3216SMarc Zyngier 1020cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 1021cc2d3216SMarc Zyngier { 1022cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1023cc2d3216SMarc Zyngier 1024cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 1025cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 1026cc2d3216SMarc Zyngier 1027cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 1028cc2d3216SMarc Zyngier } 1029cc2d3216SMarc Zyngier 1030cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 1031cc2d3216SMarc Zyngier { 1032cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1033cc2d3216SMarc Zyngier 1034cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 1035cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 1036cc2d3216SMarc Zyngier 1037cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 1038cc2d3216SMarc Zyngier } 1039cc2d3216SMarc Zyngier 1040cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 1041cc2d3216SMarc Zyngier int valid) 1042cc2d3216SMarc Zyngier { 1043cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1044cc2d3216SMarc Zyngier 1045cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 1046cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 1047cc2d3216SMarc Zyngier 1048cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 1049cc2d3216SMarc Zyngier } 1050cc2d3216SMarc Zyngier 10516a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 1052cc2d3216SMarc Zyngier { 1053cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1054cc2d3216SMarc Zyngier 10556a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 10566a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 10576a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 1058cc2d3216SMarc Zyngier 10596a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 1060cc2d3216SMarc Zyngier } 1061cc2d3216SMarc Zyngier 1062cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 1063cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 1064cc2d3216SMarc Zyngier { 1065cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1066cc2d3216SMarc Zyngier 1067cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 1068cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 1069591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 1070cc2d3216SMarc Zyngier 1071cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 1072cc2d3216SMarc Zyngier } 1073cc2d3216SMarc Zyngier 1074cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 1075cc2d3216SMarc Zyngier { 1076cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1077cc2d3216SMarc Zyngier 1078cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 1079cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 1080cc2d3216SMarc Zyngier 1081cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 1082cc2d3216SMarc Zyngier } 1083cc2d3216SMarc Zyngier 1084cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 1085cc2d3216SMarc Zyngier { 1086cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1087cc2d3216SMarc Zyngier 1088cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 1089cc2d3216SMarc Zyngier 1090cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 1091cc2d3216SMarc Zyngier } 1092c48ed51cSMarc Zyngier 1093d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 1094d011e4e6SMarc Zyngier { 1095c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1096d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1097d011e4e6SMarc Zyngier 1098d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 1099d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 1100d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 1101d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 1102d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 1103d011e4e6SMarc Zyngier 1104d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 1105d011e4e6SMarc Zyngier } 1106d011e4e6SMarc Zyngier 1107d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 1108d011e4e6SMarc Zyngier { 1109c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1110d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1111d011e4e6SMarc Zyngier 1112d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 1113d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 1114d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 1115d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 1116d011e4e6SMarc Zyngier 1117d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 1118d011e4e6SMarc Zyngier } 1119d011e4e6SMarc Zyngier 112075fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 112175fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 1122eb78192bSMarc Zyngier { 1123eb78192bSMarc Zyngier struct its_cmd_desc desc; 1124eb78192bSMarc Zyngier 1125eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 1126eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 1127eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 112875fd951bSMarc Zyngier 1129eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 1130eb78192bSMarc Zyngier } 1131eb78192bSMarc Zyngier 11323171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 11333171a47aSMarc Zyngier { 113484243125SZenghui Yu struct its_cmd_desc desc = {}; 11353171a47aSMarc Zyngier struct its_node *its; 11363171a47aSMarc Zyngier unsigned long flags; 11373171a47aSMarc Zyngier int col_id = vpe->col_idx; 11383171a47aSMarc Zyngier 11393171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 11403171a47aSMarc Zyngier 11413171a47aSMarc Zyngier if (!its_list_map) { 11423171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 11433171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 11443171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 11453171a47aSMarc Zyngier return; 11463171a47aSMarc Zyngier } 11473171a47aSMarc Zyngier 11483171a47aSMarc Zyngier /* 11493171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 11503171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 11513171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 11523171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 11533171a47aSMarc Zyngier * 11543171a47aSMarc Zyngier * Wall <-- Head. 11553171a47aSMarc Zyngier */ 11563171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 11573171a47aSMarc Zyngier 11583171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 115984243125SZenghui Yu desc.its_vmovp_cmd.its_list = get_its_list(vpe->its_vm); 11603171a47aSMarc Zyngier 11613171a47aSMarc Zyngier /* Emit VMOVPs */ 11623171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 11630dd57fedSMarc Zyngier if (!is_v4(its)) 11643171a47aSMarc Zyngier continue; 11653171a47aSMarc Zyngier 11662247e1bfSMarc Zyngier if (!vpe->its_vm->vlpi_count[its->list_nr]) 11672247e1bfSMarc Zyngier continue; 11682247e1bfSMarc Zyngier 11693171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 11703171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 11713171a47aSMarc Zyngier } 11723171a47aSMarc Zyngier 11733171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 11743171a47aSMarc Zyngier } 11753171a47aSMarc Zyngier 117640619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1177eb78192bSMarc Zyngier { 1178eb78192bSMarc Zyngier struct its_cmd_desc desc; 1179eb78192bSMarc Zyngier 1180eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1181eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1182eb78192bSMarc Zyngier } 1183eb78192bSMarc Zyngier 118428614696SMarc Zyngier static void its_send_vinv(struct its_device *dev, u32 event_id) 118528614696SMarc Zyngier { 118628614696SMarc Zyngier struct its_cmd_desc desc; 118728614696SMarc Zyngier 118828614696SMarc Zyngier /* 118928614696SMarc Zyngier * There is no real VINV command. This is just a normal INV, 119028614696SMarc Zyngier * with a VSYNC instead of a SYNC. 119128614696SMarc Zyngier */ 119228614696SMarc Zyngier desc.its_inv_cmd.dev = dev; 119328614696SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 119428614696SMarc Zyngier 119528614696SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); 119628614696SMarc Zyngier } 119728614696SMarc Zyngier 1198ed0e4aa9SMarc Zyngier static void its_send_vint(struct its_device *dev, u32 event_id) 1199ed0e4aa9SMarc Zyngier { 1200ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1201ed0e4aa9SMarc Zyngier 1202ed0e4aa9SMarc Zyngier /* 1203ed0e4aa9SMarc Zyngier * There is no real VINT command. This is just a normal INT, 1204ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1205ed0e4aa9SMarc Zyngier */ 1206ed0e4aa9SMarc Zyngier desc.its_int_cmd.dev = dev; 1207ed0e4aa9SMarc Zyngier desc.its_int_cmd.event_id = event_id; 1208ed0e4aa9SMarc Zyngier 1209ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); 1210ed0e4aa9SMarc Zyngier } 1211ed0e4aa9SMarc Zyngier 1212ed0e4aa9SMarc Zyngier static void its_send_vclear(struct its_device *dev, u32 event_id) 1213ed0e4aa9SMarc Zyngier { 1214ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1215ed0e4aa9SMarc Zyngier 1216ed0e4aa9SMarc Zyngier /* 1217ed0e4aa9SMarc Zyngier * There is no real VCLEAR command. This is just a normal CLEAR, 1218ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1219ed0e4aa9SMarc Zyngier */ 1220ed0e4aa9SMarc Zyngier desc.its_clear_cmd.dev = dev; 1221ed0e4aa9SMarc Zyngier desc.its_clear_cmd.event_id = event_id; 1222ed0e4aa9SMarc Zyngier 1223ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); 1224ed0e4aa9SMarc Zyngier } 1225ed0e4aa9SMarc Zyngier 1226c48ed51cSMarc Zyngier /* 1227c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1228c48ed51cSMarc Zyngier */ 1229c1d4d5cdSMarc Zyngier static struct its_vlpi_map *get_vlpi_map(struct irq_data *d) 1230c1d4d5cdSMarc Zyngier { 1231093bf439SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1232c1d4d5cdSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1233c1d4d5cdSMarc Zyngier u32 event = its_get_event_id(d); 1234c1d4d5cdSMarc Zyngier 1235c1d4d5cdSMarc Zyngier return dev_event_to_vlpi_map(its_dev, event); 1236c1d4d5cdSMarc Zyngier } 1237c48ed51cSMarc Zyngier 1238093bf439SMarc Zyngier return NULL; 1239093bf439SMarc Zyngier } 1240093bf439SMarc Zyngier 1241015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1242c48ed51cSMarc Zyngier { 1243c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1244015ec038SMarc Zyngier irq_hw_number_t hwirq; 1245e1a2e201SMarc Zyngier void *va; 1246adcdb94eSMarc Zyngier u8 *cfg; 1247c48ed51cSMarc Zyngier 1248c1d4d5cdSMarc Zyngier if (map) { 1249c1d4d5cdSMarc Zyngier va = page_address(map->vm->vprop_page); 1250d4d7b4adSMarc Zyngier hwirq = map->vintid; 1251d4d7b4adSMarc Zyngier 1252d4d7b4adSMarc Zyngier /* Remember the updated property */ 1253d4d7b4adSMarc Zyngier map->properties &= ~clr; 1254d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1255015ec038SMarc Zyngier } else { 1256e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1257015ec038SMarc Zyngier hwirq = d->hwirq; 1258015ec038SMarc Zyngier } 1259adcdb94eSMarc Zyngier 1260e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1261adcdb94eSMarc Zyngier *cfg &= ~clr; 1262015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1263c48ed51cSMarc Zyngier 1264c48ed51cSMarc Zyngier /* 1265c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1266c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1267c48ed51cSMarc Zyngier * Humpf... 1268c48ed51cSMarc Zyngier */ 1269c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1270328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1271c48ed51cSMarc Zyngier else 1272c48ed51cSMarc Zyngier dsb(ishst); 1273015ec038SMarc Zyngier } 1274015ec038SMarc Zyngier 12752f4f064bSMarc Zyngier static void wait_for_syncr(void __iomem *rdbase) 12762f4f064bSMarc Zyngier { 12772f4f064bSMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 12782f4f064bSMarc Zyngier cpu_relax(); 12792f4f064bSMarc Zyngier } 12802f4f064bSMarc Zyngier 1281425c09beSMarc Zyngier static void direct_lpi_inv(struct irq_data *d) 1282425c09beSMarc Zyngier { 1283425c09beSMarc Zyngier struct its_collection *col; 1284425c09beSMarc Zyngier void __iomem *rdbase; 1285425c09beSMarc Zyngier 1286425c09beSMarc Zyngier /* Target the redistributor this LPI is currently routed to */ 1287425c09beSMarc Zyngier col = irq_to_col(d); 1288425c09beSMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, col->col_id)->rd_base; 1289425c09beSMarc Zyngier gic_write_lpir(d->hwirq, rdbase + GICR_INVLPIR); 1290425c09beSMarc Zyngier 1291425c09beSMarc Zyngier wait_for_syncr(rdbase); 1292425c09beSMarc Zyngier } 1293425c09beSMarc Zyngier 1294015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1295015ec038SMarc Zyngier { 1296015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1297015ec038SMarc Zyngier 1298015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1299425c09beSMarc Zyngier if (gic_rdists->has_direct_lpi && !irqd_is_forwarded_to_vcpu(d)) 1300425c09beSMarc Zyngier direct_lpi_inv(d); 130128614696SMarc Zyngier else if (!irqd_is_forwarded_to_vcpu(d)) 1302adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 130328614696SMarc Zyngier else 130428614696SMarc Zyngier its_send_vinv(its_dev, its_get_event_id(d)); 1305c48ed51cSMarc Zyngier } 1306c48ed51cSMarc Zyngier 1307015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1308015ec038SMarc Zyngier { 1309015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1310015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1311c1d4d5cdSMarc Zyngier struct its_vlpi_map *map; 1312015ec038SMarc Zyngier 1313c1d4d5cdSMarc Zyngier map = dev_event_to_vlpi_map(its_dev, event); 1314c1d4d5cdSMarc Zyngier 1315c1d4d5cdSMarc Zyngier if (map->db_enabled == enable) 1316015ec038SMarc Zyngier return; 1317015ec038SMarc Zyngier 1318c1d4d5cdSMarc Zyngier map->db_enabled = enable; 1319015ec038SMarc Zyngier 1320015ec038SMarc Zyngier /* 1321015ec038SMarc Zyngier * More fun with the architecture: 1322015ec038SMarc Zyngier * 1323015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1324015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1325015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1326015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1327015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1328015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1329015ec038SMarc Zyngier */ 1330015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1331c48ed51cSMarc Zyngier } 1332c48ed51cSMarc Zyngier 1333c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1334c48ed51cSMarc Zyngier { 1335015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1336015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1337015ec038SMarc Zyngier 1338adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1339c48ed51cSMarc Zyngier } 1340c48ed51cSMarc Zyngier 1341c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1342c48ed51cSMarc Zyngier { 1343015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1344015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1345015ec038SMarc Zyngier 1346adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1347c48ed51cSMarc Zyngier } 1348c48ed51cSMarc Zyngier 1349c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1350c48ed51cSMarc Zyngier bool force) 1351c48ed51cSMarc Zyngier { 1352fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1353fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1354c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1355c48ed51cSMarc Zyngier struct its_collection *target_col; 1356c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1357c48ed51cSMarc Zyngier 1358015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1359015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1360015ec038SMarc Zyngier return -EINVAL; 1361015ec038SMarc Zyngier 1362fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1363fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1364fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1365fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1366fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1367fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1368fbf8f40eSGanapatrao Kulkarni } 1369fbf8f40eSGanapatrao Kulkarni } 1370fbf8f40eSGanapatrao Kulkarni 1371fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1372fbf8f40eSGanapatrao Kulkarni 1373c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1374c48ed51cSMarc Zyngier return -EINVAL; 1375c48ed51cSMarc Zyngier 13768b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 13778b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1378c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1379c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1380591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 13810d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 13828b8d94a7SMaJun } 1383c48ed51cSMarc Zyngier 1384c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1385c48ed51cSMarc Zyngier } 1386c48ed51cSMarc Zyngier 1387558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1388558b0165SArd Biesheuvel { 1389558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1390558b0165SArd Biesheuvel 1391558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1392558b0165SArd Biesheuvel } 1393558b0165SArd Biesheuvel 1394b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1395b48ac83dSMarc Zyngier { 1396b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1397b48ac83dSMarc Zyngier struct its_node *its; 1398b48ac83dSMarc Zyngier u64 addr; 1399b48ac83dSMarc Zyngier 1400b48ac83dSMarc Zyngier its = its_dev->its; 1401558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1402b48ac83dSMarc Zyngier 1403b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1404b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1405b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 140644bb7e24SRobin Murphy 140735ae7df2SJulien Grall iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); 1408b48ac83dSMarc Zyngier } 1409b48ac83dSMarc Zyngier 14108d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 14118d85dcedSMarc Zyngier enum irqchip_irq_state which, 14128d85dcedSMarc Zyngier bool state) 14138d85dcedSMarc Zyngier { 14148d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 14158d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 14168d85dcedSMarc Zyngier 14178d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 14188d85dcedSMarc Zyngier return -EINVAL; 14198d85dcedSMarc Zyngier 1420ed0e4aa9SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1421ed0e4aa9SMarc Zyngier if (state) 1422ed0e4aa9SMarc Zyngier its_send_vint(its_dev, event); 1423ed0e4aa9SMarc Zyngier else 1424ed0e4aa9SMarc Zyngier its_send_vclear(its_dev, event); 1425ed0e4aa9SMarc Zyngier } else { 14268d85dcedSMarc Zyngier if (state) 14278d85dcedSMarc Zyngier its_send_int(its_dev, event); 14288d85dcedSMarc Zyngier else 14298d85dcedSMarc Zyngier its_send_clear(its_dev, event); 1430ed0e4aa9SMarc Zyngier } 14318d85dcedSMarc Zyngier 14328d85dcedSMarc Zyngier return 0; 14338d85dcedSMarc Zyngier } 14348d85dcedSMarc Zyngier 14352247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 14362247e1bfSMarc Zyngier { 14372247e1bfSMarc Zyngier unsigned long flags; 14382247e1bfSMarc Zyngier 14392247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 14402247e1bfSMarc Zyngier if (!its_list_map) 14412247e1bfSMarc Zyngier return; 14422247e1bfSMarc Zyngier 14432247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 14442247e1bfSMarc Zyngier 14452247e1bfSMarc Zyngier /* 14462247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 14472247e1bfSMarc Zyngier * them mapped now. 14482247e1bfSMarc Zyngier */ 14492247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 14502247e1bfSMarc Zyngier 14512247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 14522247e1bfSMarc Zyngier int i; 14532247e1bfSMarc Zyngier 14542247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 14552247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 145644c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 14572247e1bfSMarc Zyngier 14582247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 14592247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 14602247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 14612247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 146244c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 14632247e1bfSMarc Zyngier } 14642247e1bfSMarc Zyngier } 14652247e1bfSMarc Zyngier 14662247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 14672247e1bfSMarc Zyngier } 14682247e1bfSMarc Zyngier 14692247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 14702247e1bfSMarc Zyngier { 14712247e1bfSMarc Zyngier unsigned long flags; 14722247e1bfSMarc Zyngier 14732247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 14742247e1bfSMarc Zyngier if (!its_list_map) 14752247e1bfSMarc Zyngier return; 14762247e1bfSMarc Zyngier 14772247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 14782247e1bfSMarc Zyngier 14792247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 14802247e1bfSMarc Zyngier int i; 14812247e1bfSMarc Zyngier 14822247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 14832247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 14842247e1bfSMarc Zyngier } 14852247e1bfSMarc Zyngier 14862247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 14872247e1bfSMarc Zyngier } 14882247e1bfSMarc Zyngier 1489d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1490d011e4e6SMarc Zyngier { 1491d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1492d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1493d011e4e6SMarc Zyngier int ret = 0; 1494d011e4e6SMarc Zyngier 1495d011e4e6SMarc Zyngier if (!info->map) 1496d011e4e6SMarc Zyngier return -EINVAL; 1497d011e4e6SMarc Zyngier 149811635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1499d011e4e6SMarc Zyngier 1500d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1501d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1502d011e4e6SMarc Zyngier 15036396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 150411635fa2SMarc Zyngier GFP_ATOMIC); 1505d011e4e6SMarc Zyngier if (!maps) { 1506d011e4e6SMarc Zyngier ret = -ENOMEM; 1507d011e4e6SMarc Zyngier goto out; 1508d011e4e6SMarc Zyngier } 1509d011e4e6SMarc Zyngier 1510d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1511d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1512d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1513d011e4e6SMarc Zyngier ret = -EINVAL; 1514d011e4e6SMarc Zyngier goto out; 1515d011e4e6SMarc Zyngier } 1516d011e4e6SMarc Zyngier 1517d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1518d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1519d011e4e6SMarc Zyngier 1520d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1521d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1522d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1523d011e4e6SMarc Zyngier } else { 15242247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 15252247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 15262247e1bfSMarc Zyngier 1527d4d7b4adSMarc Zyngier /* 1528d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1529d4d7b4adSMarc Zyngier * start poking the virtual property table. 1530d4d7b4adSMarc Zyngier */ 1531d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1532d4d7b4adSMarc Zyngier 1533d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1534d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1535d4d7b4adSMarc Zyngier 1536d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1537d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1538d011e4e6SMarc Zyngier 1539d011e4e6SMarc Zyngier /* and install the virtual one */ 1540d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1541d011e4e6SMarc Zyngier 1542d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1543d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1544d011e4e6SMarc Zyngier } 1545d011e4e6SMarc Zyngier 1546d011e4e6SMarc Zyngier out: 154711635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1548d011e4e6SMarc Zyngier return ret; 1549d011e4e6SMarc Zyngier } 1550d011e4e6SMarc Zyngier 1551d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1552d011e4e6SMarc Zyngier { 1553d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1554046b5054SMarc Zyngier struct its_vlpi_map *map; 1555d011e4e6SMarc Zyngier int ret = 0; 1556d011e4e6SMarc Zyngier 155711635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1558d011e4e6SMarc Zyngier 1559046b5054SMarc Zyngier map = get_vlpi_map(d); 1560046b5054SMarc Zyngier 1561046b5054SMarc Zyngier if (!its_dev->event_map.vm || !map) { 1562d011e4e6SMarc Zyngier ret = -EINVAL; 1563d011e4e6SMarc Zyngier goto out; 1564d011e4e6SMarc Zyngier } 1565d011e4e6SMarc Zyngier 1566d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1567c1d4d5cdSMarc Zyngier *info->map = *map; 1568d011e4e6SMarc Zyngier 1569d011e4e6SMarc Zyngier out: 157011635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1571d011e4e6SMarc Zyngier return ret; 1572d011e4e6SMarc Zyngier } 1573d011e4e6SMarc Zyngier 1574d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1575d011e4e6SMarc Zyngier { 1576d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1577d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1578d011e4e6SMarc Zyngier int ret = 0; 1579d011e4e6SMarc Zyngier 158011635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1581d011e4e6SMarc Zyngier 1582d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1583d011e4e6SMarc Zyngier ret = -EINVAL; 1584d011e4e6SMarc Zyngier goto out; 1585d011e4e6SMarc Zyngier } 1586d011e4e6SMarc Zyngier 1587d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1588d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1589d011e4e6SMarc Zyngier 1590d011e4e6SMarc Zyngier /* and restore the physical one */ 1591d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1592d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1593d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1594d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1595d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1596d011e4e6SMarc Zyngier 15972247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 15982247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 15992247e1bfSMarc Zyngier 1600d011e4e6SMarc Zyngier /* 1601d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1602d011e4e6SMarc Zyngier * this was the last VLPI. 1603d011e4e6SMarc Zyngier */ 1604d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1605d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1606d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1607d011e4e6SMarc Zyngier } 1608d011e4e6SMarc Zyngier 1609d011e4e6SMarc Zyngier out: 161011635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1611d011e4e6SMarc Zyngier return ret; 1612d011e4e6SMarc Zyngier } 1613d011e4e6SMarc Zyngier 1614015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1615015ec038SMarc Zyngier { 1616015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1617015ec038SMarc Zyngier 1618015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1619015ec038SMarc Zyngier return -EINVAL; 1620015ec038SMarc Zyngier 1621015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1622015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1623015ec038SMarc Zyngier else 1624015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1625015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1626015ec038SMarc Zyngier 1627015ec038SMarc Zyngier return 0; 1628015ec038SMarc Zyngier } 1629015ec038SMarc Zyngier 1630c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1631c808eea8SMarc Zyngier { 1632c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1633c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1634c808eea8SMarc Zyngier 1635c808eea8SMarc Zyngier /* Need a v4 ITS */ 16360dd57fedSMarc Zyngier if (!is_v4(its_dev->its)) 1637c808eea8SMarc Zyngier return -EINVAL; 1638c808eea8SMarc Zyngier 1639d011e4e6SMarc Zyngier /* Unmap request? */ 1640d011e4e6SMarc Zyngier if (!info) 1641d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1642d011e4e6SMarc Zyngier 1643c808eea8SMarc Zyngier switch (info->cmd_type) { 1644c808eea8SMarc Zyngier case MAP_VLPI: 1645d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1646c808eea8SMarc Zyngier 1647c808eea8SMarc Zyngier case GET_VLPI: 1648d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1649c808eea8SMarc Zyngier 1650c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1651c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1652015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1653c808eea8SMarc Zyngier 1654c808eea8SMarc Zyngier default: 1655c808eea8SMarc Zyngier return -EINVAL; 1656c808eea8SMarc Zyngier } 1657c808eea8SMarc Zyngier } 1658c808eea8SMarc Zyngier 1659c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1660c48ed51cSMarc Zyngier .name = "ITS", 1661c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1662c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1663004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1664c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1665b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 16668d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1667c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1668b48ac83dSMarc Zyngier }; 1669b48ac83dSMarc Zyngier 1670880cb3cdSMarc Zyngier 1671bf9529f8SMarc Zyngier /* 1672bf9529f8SMarc Zyngier * How we allocate LPIs: 1673bf9529f8SMarc Zyngier * 1674880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1675880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1676880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1677880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1678bf9529f8SMarc Zyngier * 1679880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1680880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1681880cb3cdSMarc Zyngier * already free block. 1682880cb3cdSMarc Zyngier * 1683880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1684880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1685880cb3cdSMarc Zyngier */ 16864cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1687880cb3cdSMarc Zyngier 1688880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 1689880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 1690bf9529f8SMarc Zyngier 1691880cb3cdSMarc Zyngier struct lpi_range { 1692880cb3cdSMarc Zyngier struct list_head entry; 1693880cb3cdSMarc Zyngier u32 base_id; 1694880cb3cdSMarc Zyngier u32 span; 1695880cb3cdSMarc Zyngier }; 1696880cb3cdSMarc Zyngier 1697880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 1698bf9529f8SMarc Zyngier { 1699880cb3cdSMarc Zyngier struct lpi_range *range; 1700880cb3cdSMarc Zyngier 17011c73fac5SRasmus Villemoes range = kmalloc(sizeof(*range), GFP_KERNEL); 1702880cb3cdSMarc Zyngier if (range) { 1703880cb3cdSMarc Zyngier range->base_id = base; 1704880cb3cdSMarc Zyngier range->span = span; 1705bf9529f8SMarc Zyngier } 1706bf9529f8SMarc Zyngier 1707880cb3cdSMarc Zyngier return range; 1708880cb3cdSMarc Zyngier } 1709880cb3cdSMarc Zyngier 1710880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 1711880cb3cdSMarc Zyngier { 1712880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1713880cb3cdSMarc Zyngier int err = -ENOSPC; 1714880cb3cdSMarc Zyngier 1715880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1716880cb3cdSMarc Zyngier 1717880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1718880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 1719880cb3cdSMarc Zyngier *base = range->base_id; 1720880cb3cdSMarc Zyngier range->base_id += nr_lpis; 1721880cb3cdSMarc Zyngier range->span -= nr_lpis; 1722880cb3cdSMarc Zyngier 1723880cb3cdSMarc Zyngier if (range->span == 0) { 1724880cb3cdSMarc Zyngier list_del(&range->entry); 1725880cb3cdSMarc Zyngier kfree(range); 1726880cb3cdSMarc Zyngier } 1727880cb3cdSMarc Zyngier 1728880cb3cdSMarc Zyngier err = 0; 1729880cb3cdSMarc Zyngier break; 1730880cb3cdSMarc Zyngier } 1731880cb3cdSMarc Zyngier } 1732880cb3cdSMarc Zyngier 1733880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1734880cb3cdSMarc Zyngier 1735880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 1736880cb3cdSMarc Zyngier return err; 1737880cb3cdSMarc Zyngier } 1738880cb3cdSMarc Zyngier 173912eade12SRasmus Villemoes static void merge_lpi_ranges(struct lpi_range *a, struct lpi_range *b) 174012eade12SRasmus Villemoes { 174112eade12SRasmus Villemoes if (&a->entry == &lpi_range_list || &b->entry == &lpi_range_list) 174212eade12SRasmus Villemoes return; 174312eade12SRasmus Villemoes if (a->base_id + a->span != b->base_id) 174412eade12SRasmus Villemoes return; 174512eade12SRasmus Villemoes b->base_id = a->base_id; 174612eade12SRasmus Villemoes b->span += a->span; 174712eade12SRasmus Villemoes list_del(&a->entry); 174812eade12SRasmus Villemoes kfree(a); 174912eade12SRasmus Villemoes } 175012eade12SRasmus Villemoes 1751880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 1752880cb3cdSMarc Zyngier { 175312eade12SRasmus Villemoes struct lpi_range *new, *old; 1754880cb3cdSMarc Zyngier 1755880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 1756b31a3838SRasmus Villemoes if (!new) 1757b31a3838SRasmus Villemoes return -ENOMEM; 1758880cb3cdSMarc Zyngier 1759880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1760880cb3cdSMarc Zyngier 176112eade12SRasmus Villemoes list_for_each_entry_reverse(old, &lpi_range_list, entry) { 176212eade12SRasmus Villemoes if (old->base_id < base) 176312eade12SRasmus Villemoes break; 1764880cb3cdSMarc Zyngier } 176512eade12SRasmus Villemoes /* 176612eade12SRasmus Villemoes * old is the last element with ->base_id smaller than base, 176712eade12SRasmus Villemoes * so new goes right after it. If there are no elements with 176812eade12SRasmus Villemoes * ->base_id smaller than base, &old->entry ends up pointing 176912eade12SRasmus Villemoes * at the head of the list, and inserting new it the start of 177012eade12SRasmus Villemoes * the list is the right thing to do in that case as well. 177112eade12SRasmus Villemoes */ 177212eade12SRasmus Villemoes list_add(&new->entry, &old->entry); 177312eade12SRasmus Villemoes /* 177412eade12SRasmus Villemoes * Now check if we can merge with the preceding and/or 177512eade12SRasmus Villemoes * following ranges. 177612eade12SRasmus Villemoes */ 177712eade12SRasmus Villemoes merge_lpi_ranges(old, new); 177812eade12SRasmus Villemoes merge_lpi_ranges(new, list_next_entry(new, entry)); 1779880cb3cdSMarc Zyngier 1780880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1781b31a3838SRasmus Villemoes return 0; 1782bf9529f8SMarc Zyngier } 1783bf9529f8SMarc Zyngier 178404a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1785bf9529f8SMarc Zyngier { 1786880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 178712b2905aSMarc Zyngier u32 numlpis; 1788880cb3cdSMarc Zyngier int err; 1789bf9529f8SMarc Zyngier 179012b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 179112b2905aSMarc Zyngier 179212b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 179312b2905aSMarc Zyngier lpis = numlpis; 179412b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 179512b2905aSMarc Zyngier lpis); 179612b2905aSMarc Zyngier } 179712b2905aSMarc Zyngier 1798880cb3cdSMarc Zyngier /* 1799880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 1800880cb3cdSMarc Zyngier * full range of LPIs. 1801880cb3cdSMarc Zyngier */ 1802880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 1803880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 1804880cb3cdSMarc Zyngier return err; 1805bf9529f8SMarc Zyngier } 1806bf9529f8SMarc Zyngier 180738dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 1808bf9529f8SMarc Zyngier { 1809bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1810880cb3cdSMarc Zyngier int err = 0; 1811bf9529f8SMarc Zyngier 1812bf9529f8SMarc Zyngier do { 181338dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 1814880cb3cdSMarc Zyngier if (!err) 1815bf9529f8SMarc Zyngier break; 1816bf9529f8SMarc Zyngier 181738dd7c49SMarc Zyngier nr_irqs /= 2; 181838dd7c49SMarc Zyngier } while (nr_irqs > 0); 1819bf9529f8SMarc Zyngier 182045725e0fSMarc Zyngier if (!nr_irqs) 182145725e0fSMarc Zyngier err = -ENOSPC; 182245725e0fSMarc Zyngier 1823880cb3cdSMarc Zyngier if (err) 1824bf9529f8SMarc Zyngier goto out; 1825bf9529f8SMarc Zyngier 182638dd7c49SMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_irqs), sizeof (long), GFP_ATOMIC); 1827bf9529f8SMarc Zyngier if (!bitmap) 1828bf9529f8SMarc Zyngier goto out; 1829bf9529f8SMarc Zyngier 183038dd7c49SMarc Zyngier *nr_ids = nr_irqs; 1831bf9529f8SMarc Zyngier 1832bf9529f8SMarc Zyngier out: 1833c8415b94SMarc Zyngier if (!bitmap) 1834c8415b94SMarc Zyngier *base = *nr_ids = 0; 1835c8415b94SMarc Zyngier 1836bf9529f8SMarc Zyngier return bitmap; 1837bf9529f8SMarc Zyngier } 1838bf9529f8SMarc Zyngier 183938dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 1840bf9529f8SMarc Zyngier { 1841880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 1842cf2be8baSMarc Zyngier kfree(bitmap); 1843bf9529f8SMarc Zyngier } 18441ac19ca6SMarc Zyngier 1845053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 1846053be485SMarc Zyngier { 1847053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 1848053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 1849053be485SMarc Zyngier 1850053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 1851053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 1852053be485SMarc Zyngier } 1853053be485SMarc Zyngier 18540e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 18550e5ccf91SMarc Zyngier { 18560e5ccf91SMarc Zyngier struct page *prop_page; 18571ac19ca6SMarc Zyngier 18580e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 18590e5ccf91SMarc Zyngier if (!prop_page) 18600e5ccf91SMarc Zyngier return NULL; 18610e5ccf91SMarc Zyngier 1862053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 18630e5ccf91SMarc Zyngier 18640e5ccf91SMarc Zyngier return prop_page; 18650e5ccf91SMarc Zyngier } 18660e5ccf91SMarc Zyngier 18677d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 18687d75bbb4SMarc Zyngier { 18697d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 18707d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 18717d75bbb4SMarc Zyngier } 18721ac19ca6SMarc Zyngier 18735e2c9f9aSMarc Zyngier static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) 18745e2c9f9aSMarc Zyngier { 18755e2c9f9aSMarc Zyngier phys_addr_t start, end, addr_end; 18765e2c9f9aSMarc Zyngier u64 i; 18775e2c9f9aSMarc Zyngier 18785e2c9f9aSMarc Zyngier /* 18795e2c9f9aSMarc Zyngier * We don't bother checking for a kdump kernel as by 18805e2c9f9aSMarc Zyngier * construction, the LPI tables are out of this kernel's 18815e2c9f9aSMarc Zyngier * memory map. 18825e2c9f9aSMarc Zyngier */ 18835e2c9f9aSMarc Zyngier if (is_kdump_kernel()) 18845e2c9f9aSMarc Zyngier return true; 18855e2c9f9aSMarc Zyngier 18865e2c9f9aSMarc Zyngier addr_end = addr + size - 1; 18875e2c9f9aSMarc Zyngier 18885e2c9f9aSMarc Zyngier for_each_reserved_mem_region(i, &start, &end) { 18895e2c9f9aSMarc Zyngier if (addr >= start && addr_end <= end) 18905e2c9f9aSMarc Zyngier return true; 18915e2c9f9aSMarc Zyngier } 18925e2c9f9aSMarc Zyngier 18935e2c9f9aSMarc Zyngier /* Not found, not a good sign... */ 18945e2c9f9aSMarc Zyngier pr_warn("GICv3: Expected reserved range [%pa:%pa], not found\n", 18955e2c9f9aSMarc Zyngier &addr, &addr_end); 18965e2c9f9aSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 18975e2c9f9aSMarc Zyngier return false; 18985e2c9f9aSMarc Zyngier } 18995e2c9f9aSMarc Zyngier 19003fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 19013fb68faeSMarc Zyngier { 19023fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 19033fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 19043fb68faeSMarc Zyngier 19053fb68faeSMarc Zyngier return 0; 19063fb68faeSMarc Zyngier } 19073fb68faeSMarc Zyngier 190811e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 19091ac19ca6SMarc Zyngier { 1910c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 1911c440a9d9SMarc Zyngier u64 val; 1912c440a9d9SMarc Zyngier 1913c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 1914c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 1915c440a9d9SMarc Zyngier 1916c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 1917c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 1918c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 1919c440a9d9SMarc Zyngier MEMREMAP_WB); 1920c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 1921c440a9d9SMarc Zyngier } else { 1922e1a2e201SMarc Zyngier struct page *page; 19231ac19ca6SMarc Zyngier 1924c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 1925c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 19264cb205c0SJia He ITS_MAX_LPI_NRBITS); 1927e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 1928e1a2e201SMarc Zyngier if (!page) { 19291ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 19301ac19ca6SMarc Zyngier return -ENOMEM; 19311ac19ca6SMarc Zyngier } 19321ac19ca6SMarc Zyngier 1933e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 1934e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 19353fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 19363fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 1937c440a9d9SMarc Zyngier } 1938e1a2e201SMarc Zyngier 1939e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 1940e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 19411ac19ca6SMarc Zyngier 19426c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 19431ac19ca6SMarc Zyngier } 19441ac19ca6SMarc Zyngier 19451ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 19461ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 19471ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 19484f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 19491ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 19501ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 19511ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 19521ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 19531ac19ca6SMarc Zyngier }; 19541ac19ca6SMarc Zyngier 19552d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 19562d81d425SShanker Donthineni { 19572d81d425SShanker Donthineni u32 idx = baser - its->tables; 19582d81d425SShanker Donthineni 19590968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 19602d81d425SShanker Donthineni } 19612d81d425SShanker Donthineni 19622d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 19632d81d425SShanker Donthineni u64 val) 19642d81d425SShanker Donthineni { 19652d81d425SShanker Donthineni u32 idx = baser - its->tables; 19662d81d425SShanker Donthineni 19670968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 19682d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 19692d81d425SShanker Donthineni } 19702d81d425SShanker Donthineni 19719347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 19723faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 19733faf24eaSShanker Donthineni bool indirect) 19749347359aSShanker Donthineni { 19759347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 19769347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 19779347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 197830ae9610SShanker Donthineni u64 baser_phys, tmp; 19799347359aSShanker Donthineni u32 alloc_pages; 1980539d3782SShanker Donthineni struct page *page; 19819347359aSShanker Donthineni void *base; 19829347359aSShanker Donthineni 19839347359aSShanker Donthineni retry_alloc_baser: 19849347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 19859347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 19869347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 19879347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 19889347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 19899347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 19909347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 19919347359aSShanker Donthineni } 19929347359aSShanker Donthineni 1993539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); 1994539d3782SShanker Donthineni if (!page) 19959347359aSShanker Donthineni return -ENOMEM; 19969347359aSShanker Donthineni 1997539d3782SShanker Donthineni base = (void *)page_address(page); 199830ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 199930ae9610SShanker Donthineni 200030ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 200130ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 200230ae9610SShanker Donthineni 200330ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 200430ae9610SShanker Donthineni if (psz != SZ_64K) { 200530ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 200630ae9610SShanker Donthineni free_pages((unsigned long)base, order); 200730ae9610SShanker Donthineni return -ENXIO; 200830ae9610SShanker Donthineni } 200930ae9610SShanker Donthineni 201030ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 201130ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 201230ae9610SShanker Donthineni } 201330ae9610SShanker Donthineni 20149347359aSShanker Donthineni retry_baser: 201530ae9610SShanker Donthineni val = (baser_phys | 20169347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 20179347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 20189347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 20199347359aSShanker Donthineni cache | 20209347359aSShanker Donthineni shr | 20219347359aSShanker Donthineni GITS_BASER_VALID); 20229347359aSShanker Donthineni 20233faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 20243faf24eaSShanker Donthineni 20259347359aSShanker Donthineni switch (psz) { 20269347359aSShanker Donthineni case SZ_4K: 20279347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 20289347359aSShanker Donthineni break; 20299347359aSShanker Donthineni case SZ_16K: 20309347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 20319347359aSShanker Donthineni break; 20329347359aSShanker Donthineni case SZ_64K: 20339347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 20349347359aSShanker Donthineni break; 20359347359aSShanker Donthineni } 20369347359aSShanker Donthineni 20379347359aSShanker Donthineni its_write_baser(its, baser, val); 20389347359aSShanker Donthineni tmp = baser->val; 20399347359aSShanker Donthineni 20409347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 20419347359aSShanker Donthineni /* 20429347359aSShanker Donthineni * Shareability didn't stick. Just use 20439347359aSShanker Donthineni * whatever the read reported, which is likely 20449347359aSShanker Donthineni * to be the only thing this redistributor 20459347359aSShanker Donthineni * supports. If that's zero, make it 20469347359aSShanker Donthineni * non-cacheable as well. 20479347359aSShanker Donthineni */ 20489347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 20499347359aSShanker Donthineni if (!shr) { 20509347359aSShanker Donthineni cache = GITS_BASER_nC; 2051328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 20529347359aSShanker Donthineni } 20539347359aSShanker Donthineni goto retry_baser; 20549347359aSShanker Donthineni } 20559347359aSShanker Donthineni 20569347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 20579347359aSShanker Donthineni /* 20589347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 20599347359aSShanker Donthineni * size and retry. If we reach 4K, then 20609347359aSShanker Donthineni * something is horribly wrong... 20619347359aSShanker Donthineni */ 20629347359aSShanker Donthineni free_pages((unsigned long)base, order); 20639347359aSShanker Donthineni baser->base = NULL; 20649347359aSShanker Donthineni 20659347359aSShanker Donthineni switch (psz) { 20669347359aSShanker Donthineni case SZ_16K: 20679347359aSShanker Donthineni psz = SZ_4K; 20689347359aSShanker Donthineni goto retry_alloc_baser; 20699347359aSShanker Donthineni case SZ_64K: 20709347359aSShanker Donthineni psz = SZ_16K; 20719347359aSShanker Donthineni goto retry_alloc_baser; 20729347359aSShanker Donthineni } 20739347359aSShanker Donthineni } 20749347359aSShanker Donthineni 20759347359aSShanker Donthineni if (val != tmp) { 2076b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 20779347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 2078b11283ebSVladimir Murzin val, tmp); 20799347359aSShanker Donthineni free_pages((unsigned long)base, order); 20809347359aSShanker Donthineni return -ENXIO; 20819347359aSShanker Donthineni } 20829347359aSShanker Donthineni 20839347359aSShanker Donthineni baser->order = order; 20849347359aSShanker Donthineni baser->base = base; 20859347359aSShanker Donthineni baser->psz = psz; 20863faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 20879347359aSShanker Donthineni 20883faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 2089d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 20909347359aSShanker Donthineni its_base_type_string[type], 20919347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 20923faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 20939347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 20949347359aSShanker Donthineni 20959347359aSShanker Donthineni return 0; 20969347359aSShanker Donthineni } 20979347359aSShanker Donthineni 20984cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 20994cacac57SMarc Zyngier struct its_baser *baser, 210032bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 21014b75c459SShanker Donthineni { 21024cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 21034cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 21044cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 21052fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 21064b75c459SShanker Donthineni u32 new_order = *order; 21073faf24eaSShanker Donthineni bool indirect = false; 21083faf24eaSShanker Donthineni 21093faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 21103faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 21113faf24eaSShanker Donthineni /* 21123faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 21133faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 21143faf24eaSShanker Donthineni */ 21153faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 21163faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 21173faf24eaSShanker Donthineni 21183faf24eaSShanker Donthineni if (indirect) { 21193faf24eaSShanker Donthineni /* 21203faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 21213faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 21223faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 21233faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 21243faf24eaSShanker Donthineni * entry size. 21253faf24eaSShanker Donthineni */ 2126d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 21273faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 21283faf24eaSShanker Donthineni } 21293faf24eaSShanker Donthineni } 21304b75c459SShanker Donthineni 21314b75c459SShanker Donthineni /* 21324b75c459SShanker Donthineni * Allocate as many entries as required to fit the 21334b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 21344b75c459SShanker Donthineni * space being incredibly sparse, this results in a 21353faf24eaSShanker Donthineni * massive waste of memory if two-level device table 21363faf24eaSShanker Donthineni * feature is not supported by hardware. 21374b75c459SShanker Donthineni */ 21384b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 21394b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 21404b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 2141d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 2142576a8342SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", 21434cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 2144576a8342SMarc Zyngier device_ids(its), ids); 21454b75c459SShanker Donthineni } 21464b75c459SShanker Donthineni 21474b75c459SShanker Donthineni *order = new_order; 21483faf24eaSShanker Donthineni 21493faf24eaSShanker Donthineni return indirect; 21504b75c459SShanker Donthineni } 21514b75c459SShanker Donthineni 21525e516846SMarc Zyngier static u32 compute_common_aff(u64 val) 21535e516846SMarc Zyngier { 21545e516846SMarc Zyngier u32 aff, clpiaff; 21555e516846SMarc Zyngier 21565e516846SMarc Zyngier aff = FIELD_GET(GICR_TYPER_AFFINITY, val); 21575e516846SMarc Zyngier clpiaff = FIELD_GET(GICR_TYPER_COMMON_LPI_AFF, val); 21585e516846SMarc Zyngier 21595e516846SMarc Zyngier return aff & ~(GENMASK(31, 0) >> (clpiaff * 8)); 21605e516846SMarc Zyngier } 21615e516846SMarc Zyngier 21625e516846SMarc Zyngier static u32 compute_its_aff(struct its_node *its) 21635e516846SMarc Zyngier { 21645e516846SMarc Zyngier u64 val; 21655e516846SMarc Zyngier u32 svpet; 21665e516846SMarc Zyngier 21675e516846SMarc Zyngier /* 21685e516846SMarc Zyngier * Reencode the ITS SVPET and MPIDR as a GICR_TYPER, and compute 21695e516846SMarc Zyngier * the resulting affinity. We then use that to see if this match 21705e516846SMarc Zyngier * our own affinity. 21715e516846SMarc Zyngier */ 21725e516846SMarc Zyngier svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); 21735e516846SMarc Zyngier val = FIELD_PREP(GICR_TYPER_COMMON_LPI_AFF, svpet); 21745e516846SMarc Zyngier val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); 21755e516846SMarc Zyngier return compute_common_aff(val); 21765e516846SMarc Zyngier } 21775e516846SMarc Zyngier 21785e516846SMarc Zyngier static struct its_node *find_sibling_its(struct its_node *cur_its) 21795e516846SMarc Zyngier { 21805e516846SMarc Zyngier struct its_node *its; 21815e516846SMarc Zyngier u32 aff; 21825e516846SMarc Zyngier 21835e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, cur_its->typer)) 21845e516846SMarc Zyngier return NULL; 21855e516846SMarc Zyngier 21865e516846SMarc Zyngier aff = compute_its_aff(cur_its); 21875e516846SMarc Zyngier 21885e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 21895e516846SMarc Zyngier u64 baser; 21905e516846SMarc Zyngier 21915e516846SMarc Zyngier if (!is_v4_1(its) || its == cur_its) 21925e516846SMarc Zyngier continue; 21935e516846SMarc Zyngier 21945e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 21955e516846SMarc Zyngier continue; 21965e516846SMarc Zyngier 21975e516846SMarc Zyngier if (aff != compute_its_aff(its)) 21985e516846SMarc Zyngier continue; 21995e516846SMarc Zyngier 22005e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 22015e516846SMarc Zyngier baser = its->tables[2].val; 22025e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 22035e516846SMarc Zyngier continue; 22045e516846SMarc Zyngier 22055e516846SMarc Zyngier return its; 22065e516846SMarc Zyngier } 22075e516846SMarc Zyngier 22085e516846SMarc Zyngier return NULL; 22095e516846SMarc Zyngier } 22105e516846SMarc Zyngier 22111ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 22121ac19ca6SMarc Zyngier { 22131ac19ca6SMarc Zyngier int i; 22141ac19ca6SMarc Zyngier 22151ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 22161a485f4dSShanker Donthineni if (its->tables[i].base) { 22171a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 22181a485f4dSShanker Donthineni its->tables[i].order); 22191a485f4dSShanker Donthineni its->tables[i].base = NULL; 22201ac19ca6SMarc Zyngier } 22211ac19ca6SMarc Zyngier } 22221ac19ca6SMarc Zyngier } 22231ac19ca6SMarc Zyngier 22240e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 22251ac19ca6SMarc Zyngier { 22261ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 22272fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 22289347359aSShanker Donthineni u32 psz = SZ_64K; 22299347359aSShanker Donthineni int err, i; 223094100970SRobert Richter 2231fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 2232fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 22339347359aSShanker Donthineni cache = GITS_BASER_nCnB; 2234466b7d16SShanker Donthineni 22351ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 22362d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 22372d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 22381ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 22399347359aSShanker Donthineni u32 order = get_order(psz); 22403faf24eaSShanker Donthineni bool indirect = false; 22411ac19ca6SMarc Zyngier 22424cacac57SMarc Zyngier switch (type) { 22434cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 22441ac19ca6SMarc Zyngier continue; 22451ac19ca6SMarc Zyngier 22464cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 224732bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 224832bd44dcSShanker Donthineni psz, &order, 2249576a8342SMarc Zyngier device_ids(its)); 22508d565748SZenghui Yu break; 22518d565748SZenghui Yu 22524cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 22535e516846SMarc Zyngier if (is_v4_1(its)) { 22545e516846SMarc Zyngier struct its_node *sibling; 22555e516846SMarc Zyngier 22565e516846SMarc Zyngier WARN_ON(i != 2); 22575e516846SMarc Zyngier if ((sibling = find_sibling_its(its))) { 22585e516846SMarc Zyngier *baser = sibling->tables[2]; 22595e516846SMarc Zyngier its_write_baser(its, baser, baser->val); 22605e516846SMarc Zyngier continue; 22615e516846SMarc Zyngier } 22625e516846SMarc Zyngier } 22635e516846SMarc Zyngier 22644cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 226532bd44dcSShanker Donthineni psz, &order, 226632bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 22674cacac57SMarc Zyngier break; 22684cacac57SMarc Zyngier } 2269f54b97edSMarc Zyngier 22703faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 22719347359aSShanker Donthineni if (err < 0) { 22729347359aSShanker Donthineni its_free_tables(its); 22739347359aSShanker Donthineni return err; 227430f21363SRobert Richter } 227530f21363SRobert Richter 22769347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 22779347359aSShanker Donthineni psz = baser->psz; 22789347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 22799347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 22801ac19ca6SMarc Zyngier } 22811ac19ca6SMarc Zyngier 22821ac19ca6SMarc Zyngier return 0; 22831ac19ca6SMarc Zyngier } 22841ac19ca6SMarc Zyngier 22855e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_its(void) 22865e516846SMarc Zyngier { 22875e516846SMarc Zyngier struct its_node *its; 22885e516846SMarc Zyngier u64 val; 22895e516846SMarc Zyngier u32 aff; 22905e516846SMarc Zyngier 22915e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 22925e516846SMarc Zyngier aff = compute_common_aff(val); 22935e516846SMarc Zyngier 22945e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 22955e516846SMarc Zyngier u64 baser, addr; 22965e516846SMarc Zyngier 22975e516846SMarc Zyngier if (!is_v4_1(its)) 22985e516846SMarc Zyngier continue; 22995e516846SMarc Zyngier 23005e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 23015e516846SMarc Zyngier continue; 23025e516846SMarc Zyngier 23035e516846SMarc Zyngier if (aff != compute_its_aff(its)) 23045e516846SMarc Zyngier continue; 23055e516846SMarc Zyngier 23065e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 23075e516846SMarc Zyngier baser = its->tables[2].val; 23085e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 23095e516846SMarc Zyngier continue; 23105e516846SMarc Zyngier 23115e516846SMarc Zyngier /* We have a winner! */ 23125e516846SMarc Zyngier val = GICR_VPROPBASER_4_1_VALID; 23135e516846SMarc Zyngier if (baser & GITS_BASER_INDIRECT) 23145e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 23155e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, 23165e516846SMarc Zyngier FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)); 23175e516846SMarc Zyngier switch (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)) { 23185e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 23195e516846SMarc Zyngier addr = GITS_BASER_ADDR_48_to_52(baser); 23205e516846SMarc Zyngier break; 23215e516846SMarc Zyngier default: 23225e516846SMarc Zyngier addr = baser & GENMASK_ULL(47, 12); 23235e516846SMarc Zyngier break; 23245e516846SMarc Zyngier } 23255e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, addr >> 12); 23265e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_SHAREABILITY_MASK, 23275e516846SMarc Zyngier FIELD_GET(GITS_BASER_SHAREABILITY_MASK, baser)); 23285e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_INNER_CACHEABILITY_MASK, 23295e516846SMarc Zyngier FIELD_GET(GITS_BASER_INNER_CACHEABILITY_MASK, baser)); 23305e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, GITS_BASER_NR_PAGES(baser) - 1); 23315e516846SMarc Zyngier 23325e516846SMarc Zyngier return val; 23335e516846SMarc Zyngier } 23345e516846SMarc Zyngier 23355e516846SMarc Zyngier return 0; 23365e516846SMarc Zyngier } 23375e516846SMarc Zyngier 23385e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_rd(cpumask_t **mask) 23395e516846SMarc Zyngier { 23405e516846SMarc Zyngier u32 aff; 23415e516846SMarc Zyngier u64 val; 23425e516846SMarc Zyngier int cpu; 23435e516846SMarc Zyngier 23445e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 23455e516846SMarc Zyngier aff = compute_common_aff(val); 23465e516846SMarc Zyngier 23475e516846SMarc Zyngier for_each_possible_cpu(cpu) { 23485e516846SMarc Zyngier void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 23495e516846SMarc Zyngier u32 tmp; 23505e516846SMarc Zyngier 23515e516846SMarc Zyngier if (!base || cpu == smp_processor_id()) 23525e516846SMarc Zyngier continue; 23535e516846SMarc Zyngier 23545e516846SMarc Zyngier val = gic_read_typer(base + GICR_TYPER); 23555e516846SMarc Zyngier tmp = compute_common_aff(val); 23565e516846SMarc Zyngier if (tmp != aff) 23575e516846SMarc Zyngier continue; 23585e516846SMarc Zyngier 23595e516846SMarc Zyngier /* 23605e516846SMarc Zyngier * At this point, we have a victim. This particular CPU 23615e516846SMarc Zyngier * has already booted, and has an affinity that matches 23625e516846SMarc Zyngier * ours wrt CommonLPIAff. Let's use its own VPROPBASER. 23635e516846SMarc Zyngier * Make sure we don't write the Z bit in that case. 23645e516846SMarc Zyngier */ 23655e516846SMarc Zyngier val = gits_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 23665e516846SMarc Zyngier val &= ~GICR_VPROPBASER_4_1_Z; 23675e516846SMarc Zyngier 23685e516846SMarc Zyngier *mask = gic_data_rdist_cpu(cpu)->vpe_table_mask; 23695e516846SMarc Zyngier 23705e516846SMarc Zyngier return val; 23715e516846SMarc Zyngier } 23725e516846SMarc Zyngier 23735e516846SMarc Zyngier return 0; 23745e516846SMarc Zyngier } 23755e516846SMarc Zyngier 23765e516846SMarc Zyngier static int allocate_vpe_l1_table(void) 23775e516846SMarc Zyngier { 23785e516846SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 23795e516846SMarc Zyngier u64 val, gpsz, npg, pa; 23805e516846SMarc Zyngier unsigned int psz = SZ_64K; 23815e516846SMarc Zyngier unsigned int np, epp, esz; 23825e516846SMarc Zyngier struct page *page; 23835e516846SMarc Zyngier 23845e516846SMarc Zyngier if (!gic_rdists->has_rvpeid) 23855e516846SMarc Zyngier return 0; 23865e516846SMarc Zyngier 23875e516846SMarc Zyngier /* 23885e516846SMarc Zyngier * if VPENDBASER.Valid is set, disable any previously programmed 23895e516846SMarc Zyngier * VPE by setting PendingLast while clearing Valid. This has the 23905e516846SMarc Zyngier * effect of making sure no doorbell will be generated and we can 23915e516846SMarc Zyngier * then safely clear VPROPBASER.Valid. 23925e516846SMarc Zyngier */ 23935e516846SMarc Zyngier if (gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER) & GICR_VPENDBASER_Valid) 23945e516846SMarc Zyngier gits_write_vpendbaser(GICR_VPENDBASER_PendingLast, 23955e516846SMarc Zyngier vlpi_base + GICR_VPENDBASER); 23965e516846SMarc Zyngier 23975e516846SMarc Zyngier /* 23985e516846SMarc Zyngier * If we can inherit the configuration from another RD, let's do 23995e516846SMarc Zyngier * so. Otherwise, we have to go through the allocation process. We 24005e516846SMarc Zyngier * assume that all RDs have the exact same requirements, as 24015e516846SMarc Zyngier * nothing will work otherwise. 24025e516846SMarc Zyngier */ 24035e516846SMarc Zyngier val = inherit_vpe_l1_table_from_rd(&gic_data_rdist()->vpe_table_mask); 24045e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 24055e516846SMarc Zyngier goto out; 24065e516846SMarc Zyngier 24075e516846SMarc Zyngier gic_data_rdist()->vpe_table_mask = kzalloc(sizeof(cpumask_t), GFP_KERNEL); 24085e516846SMarc Zyngier if (!gic_data_rdist()->vpe_table_mask) 24095e516846SMarc Zyngier return -ENOMEM; 24105e516846SMarc Zyngier 24115e516846SMarc Zyngier val = inherit_vpe_l1_table_from_its(); 24125e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 24135e516846SMarc Zyngier goto out; 24145e516846SMarc Zyngier 24155e516846SMarc Zyngier /* First probe the page size */ 24165e516846SMarc Zyngier val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K); 24175e516846SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 24185e516846SMarc Zyngier val = gits_read_vpropbaser(vlpi_base + GICR_VPROPBASER); 24195e516846SMarc Zyngier gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 24205e516846SMarc Zyngier esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val); 24215e516846SMarc Zyngier 24225e516846SMarc Zyngier switch (gpsz) { 24235e516846SMarc Zyngier default: 24245e516846SMarc Zyngier gpsz = GIC_PAGE_SIZE_4K; 24255e516846SMarc Zyngier /* fall through */ 24265e516846SMarc Zyngier case GIC_PAGE_SIZE_4K: 24275e516846SMarc Zyngier psz = SZ_4K; 24285e516846SMarc Zyngier break; 24295e516846SMarc Zyngier case GIC_PAGE_SIZE_16K: 24305e516846SMarc Zyngier psz = SZ_16K; 24315e516846SMarc Zyngier break; 24325e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 24335e516846SMarc Zyngier psz = SZ_64K; 24345e516846SMarc Zyngier break; 24355e516846SMarc Zyngier } 24365e516846SMarc Zyngier 24375e516846SMarc Zyngier /* 24385e516846SMarc Zyngier * Start populating the register from scratch, including RO fields 24395e516846SMarc Zyngier * (which we want to print in debug cases...) 24405e516846SMarc Zyngier */ 24415e516846SMarc Zyngier val = 0; 24425e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, gpsz); 24435e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ENTRY_SIZE, esz); 24445e516846SMarc Zyngier 24455e516846SMarc Zyngier /* How many entries per GIC page? */ 24465e516846SMarc Zyngier esz++; 24475e516846SMarc Zyngier epp = psz / (esz * SZ_8); 24485e516846SMarc Zyngier 24495e516846SMarc Zyngier /* 24505e516846SMarc Zyngier * If we need more than just a single L1 page, flag the table 24515e516846SMarc Zyngier * as indirect and compute the number of required L1 pages. 24525e516846SMarc Zyngier */ 24535e516846SMarc Zyngier if (epp < ITS_MAX_VPEID) { 24545e516846SMarc Zyngier int nl2; 24555e516846SMarc Zyngier 24565e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 24575e516846SMarc Zyngier 24585e516846SMarc Zyngier /* Number of L2 pages required to cover the VPEID space */ 24595e516846SMarc Zyngier nl2 = DIV_ROUND_UP(ITS_MAX_VPEID, epp); 24605e516846SMarc Zyngier 24615e516846SMarc Zyngier /* Number of L1 pages to point to the L2 pages */ 24625e516846SMarc Zyngier npg = DIV_ROUND_UP(nl2 * SZ_8, psz); 24635e516846SMarc Zyngier } else { 24645e516846SMarc Zyngier npg = 1; 24655e516846SMarc Zyngier } 24665e516846SMarc Zyngier 24675e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg); 24685e516846SMarc Zyngier 24695e516846SMarc Zyngier /* Right, that's the number of CPU pages we need for L1 */ 24705e516846SMarc Zyngier np = DIV_ROUND_UP(npg * psz, PAGE_SIZE); 24715e516846SMarc Zyngier 24725e516846SMarc Zyngier pr_debug("np = %d, npg = %lld, psz = %d, epp = %d, esz = %d\n", 24735e516846SMarc Zyngier np, npg, psz, epp, esz); 24745e516846SMarc Zyngier page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(np * PAGE_SIZE)); 24755e516846SMarc Zyngier if (!page) 24765e516846SMarc Zyngier return -ENOMEM; 24775e516846SMarc Zyngier 24785e516846SMarc Zyngier gic_data_rdist()->vpe_l1_page = page; 24795e516846SMarc Zyngier pa = virt_to_phys(page_address(page)); 24805e516846SMarc Zyngier WARN_ON(!IS_ALIGNED(pa, psz)); 24815e516846SMarc Zyngier 24825e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, pa >> 12); 24835e516846SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 24845e516846SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 24855e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_Z; 24865e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_VALID; 24875e516846SMarc Zyngier 24885e516846SMarc Zyngier out: 24895e516846SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 24905e516846SMarc Zyngier cpumask_set_cpu(smp_processor_id(), gic_data_rdist()->vpe_table_mask); 24915e516846SMarc Zyngier 24925e516846SMarc Zyngier pr_debug("CPU%d: VPROPBASER = %llx %*pbl\n", 24935e516846SMarc Zyngier smp_processor_id(), val, 24945e516846SMarc Zyngier cpumask_pr_args(gic_data_rdist()->vpe_table_mask)); 24955e516846SMarc Zyngier 24965e516846SMarc Zyngier return 0; 24975e516846SMarc Zyngier } 24985e516846SMarc Zyngier 24991ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 25001ac19ca6SMarc Zyngier { 250183559b47SMarc Zyngier int i; 250283559b47SMarc Zyngier 25036396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 25041ac19ca6SMarc Zyngier GFP_KERNEL); 25051ac19ca6SMarc Zyngier if (!its->collections) 25061ac19ca6SMarc Zyngier return -ENOMEM; 25071ac19ca6SMarc Zyngier 250883559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 250983559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 251083559b47SMarc Zyngier 25111ac19ca6SMarc Zyngier return 0; 25121ac19ca6SMarc Zyngier } 25131ac19ca6SMarc Zyngier 25147c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 25157c297a2dSMarc Zyngier { 25167c297a2dSMarc Zyngier struct page *pend_page; 2517adaab500SMarc Zyngier 25187c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 2519adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 25207c297a2dSMarc Zyngier if (!pend_page) 25217c297a2dSMarc Zyngier return NULL; 25227c297a2dSMarc Zyngier 25237c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 25247c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 25257c297a2dSMarc Zyngier 25267c297a2dSMarc Zyngier return pend_page; 25277c297a2dSMarc Zyngier } 25287c297a2dSMarc Zyngier 25297d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 25307d75bbb4SMarc Zyngier { 2531adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 25327d75bbb4SMarc Zyngier } 25337d75bbb4SMarc Zyngier 2534c6e2ccb6SMarc Zyngier /* 25355e2c9f9aSMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. Any other 25365e2c9f9aSMarc Zyngier * case is wrong in the absence of firmware/EFI support. 2537c6e2ccb6SMarc Zyngier */ 2538c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 2539c440a9d9SMarc Zyngier { 25405e2c9f9aSMarc Zyngier phys_addr_t addr; 25415e2c9f9aSMarc Zyngier u64 val; 2542c6e2ccb6SMarc Zyngier 25435e2c9f9aSMarc Zyngier /* Check whether the property table is in a reserved region */ 25445e2c9f9aSMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 25455e2c9f9aSMarc Zyngier addr = val & GENMASK_ULL(51, 12); 25465e2c9f9aSMarc Zyngier 25475e2c9f9aSMarc Zyngier return gic_check_reserved_range(addr, LPI_PROPBASE_SZ); 2548c440a9d9SMarc Zyngier } 2549c440a9d9SMarc Zyngier 255011e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 255111e37d35SMarc Zyngier { 2552c440a9d9SMarc Zyngier u64 val; 255311e37d35SMarc Zyngier int err, cpu; 255411e37d35SMarc Zyngier 2555c440a9d9SMarc Zyngier /* 2556c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 2557c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 2558c440a9d9SMarc Zyngier */ 2559c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 2560c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 2561c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 2562c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 2563c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 2564c440a9d9SMarc Zyngier } 2565c440a9d9SMarc Zyngier 256611e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 256711e37d35SMarc Zyngier if (err) 256811e37d35SMarc Zyngier return err; 256911e37d35SMarc Zyngier 257011e37d35SMarc Zyngier /* 257111e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 257211e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 257311e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 257411e37d35SMarc Zyngier */ 257511e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 257611e37d35SMarc Zyngier struct page *pend_page; 257711e37d35SMarc Zyngier 257811e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 257911e37d35SMarc Zyngier if (!pend_page) { 258011e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 258111e37d35SMarc Zyngier return -ENOMEM; 258211e37d35SMarc Zyngier } 258311e37d35SMarc Zyngier 258411e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 258511e37d35SMarc Zyngier } 258611e37d35SMarc Zyngier 258711e37d35SMarc Zyngier return 0; 258811e37d35SMarc Zyngier } 258911e37d35SMarc Zyngier 25906479450fSHeyi Guo static u64 its_clear_vpend_valid(void __iomem *vlpi_base) 25916479450fSHeyi Guo { 25926479450fSHeyi Guo u32 count = 1000000; /* 1s! */ 25936479450fSHeyi Guo bool clean; 25946479450fSHeyi Guo u64 val; 25956479450fSHeyi Guo 25966479450fSHeyi Guo val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 25976479450fSHeyi Guo val &= ~GICR_VPENDBASER_Valid; 25986479450fSHeyi Guo gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 25996479450fSHeyi Guo 26006479450fSHeyi Guo do { 26016479450fSHeyi Guo val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 26026479450fSHeyi Guo clean = !(val & GICR_VPENDBASER_Dirty); 26036479450fSHeyi Guo if (!clean) { 26046479450fSHeyi Guo count--; 26056479450fSHeyi Guo cpu_relax(); 26066479450fSHeyi Guo udelay(1); 26076479450fSHeyi Guo } 26086479450fSHeyi Guo } while (!clean && count); 26096479450fSHeyi Guo 26106479450fSHeyi Guo return val; 26116479450fSHeyi Guo } 26126479450fSHeyi Guo 26131ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 26141ac19ca6SMarc Zyngier { 26151ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 26161ac19ca6SMarc Zyngier struct page *pend_page; 261711e37d35SMarc Zyngier phys_addr_t paddr; 26181ac19ca6SMarc Zyngier u64 val, tmp; 26191ac19ca6SMarc Zyngier 262011e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 26211ac19ca6SMarc Zyngier return; 26221ac19ca6SMarc Zyngier 2623c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 2624c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 2625c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 2626f842ca8eSMarc Zyngier /* 2627f842ca8eSMarc Zyngier * Check that we get the same property table on all 2628f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 2629f842ca8eSMarc Zyngier */ 2630f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 2631f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 2632f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 2633f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 2634f842ca8eSMarc Zyngier 2635c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2636c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 2637c440a9d9SMarc Zyngier 26385e2c9f9aSMarc Zyngier WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ)); 2639c440a9d9SMarc Zyngier its_free_pending_table(gic_data_rdist()->pend_page); 2640c440a9d9SMarc Zyngier gic_data_rdist()->pend_page = NULL; 2641c440a9d9SMarc Zyngier 2642c440a9d9SMarc Zyngier goto out; 2643c440a9d9SMarc Zyngier } 2644c440a9d9SMarc Zyngier 264511e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 26461ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 26473fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 26481ac19ca6SMarc Zyngier 26491ac19ca6SMarc Zyngier /* set PROPBASE */ 2650e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 26511ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 26522fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 26531ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 26541ac19ca6SMarc Zyngier 26550968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 26560968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 26571ac19ca6SMarc Zyngier 26581ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 2659241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 2660241a386cSMarc Zyngier /* 2661241a386cSMarc Zyngier * The HW reports non-shareable, we must 2662241a386cSMarc Zyngier * remove the cacheability attributes as 2663241a386cSMarc Zyngier * well. 2664241a386cSMarc Zyngier */ 2665241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 2666241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 2667241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 26680968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 2669241a386cSMarc Zyngier } 26701ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 26711ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 26721ac19ca6SMarc Zyngier } 26731ac19ca6SMarc Zyngier 26741ac19ca6SMarc Zyngier /* set PENDBASE */ 26751ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 26764ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 26772fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 26781ac19ca6SMarc Zyngier 26790968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 26800968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2681241a386cSMarc Zyngier 2682241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 2683241a386cSMarc Zyngier /* 2684241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 2685241a386cSMarc Zyngier * cacheability attributes as well. 2686241a386cSMarc Zyngier */ 2687241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 2688241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 2689241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 26900968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 2691241a386cSMarc Zyngier } 26921ac19ca6SMarc Zyngier 26931ac19ca6SMarc Zyngier /* Enable LPIs */ 26941ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 26951ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 26961ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 26971ac19ca6SMarc Zyngier 26985e516846SMarc Zyngier if (gic_rdists->has_vlpis && !gic_rdists->has_rvpeid) { 26996479450fSHeyi Guo void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 27006479450fSHeyi Guo 27016479450fSHeyi Guo /* 27026479450fSHeyi Guo * It's possible for CPU to receive VLPIs before it is 27036479450fSHeyi Guo * sheduled as a vPE, especially for the first CPU, and the 27046479450fSHeyi Guo * VLPI with INTID larger than 2^(IDbits+1) will be considered 27056479450fSHeyi Guo * as out of range and dropped by GIC. 27066479450fSHeyi Guo * So we initialize IDbits to known value to avoid VLPI drop. 27076479450fSHeyi Guo */ 27086479450fSHeyi Guo val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 27096479450fSHeyi Guo pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n", 27106479450fSHeyi Guo smp_processor_id(), val); 27116479450fSHeyi Guo gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 27126479450fSHeyi Guo 27136479450fSHeyi Guo /* 27146479450fSHeyi Guo * Also clear Valid bit of GICR_VPENDBASER, in case some 27156479450fSHeyi Guo * ancient programming gets left in and has possibility of 27166479450fSHeyi Guo * corrupting memory. 27176479450fSHeyi Guo */ 27186479450fSHeyi Guo val = its_clear_vpend_valid(vlpi_base); 27196479450fSHeyi Guo WARN_ON(val & GICR_VPENDBASER_Dirty); 27206479450fSHeyi Guo } 27216479450fSHeyi Guo 27225e516846SMarc Zyngier if (allocate_vpe_l1_table()) { 27235e516846SMarc Zyngier /* 27245e516846SMarc Zyngier * If the allocation has failed, we're in massive trouble. 27255e516846SMarc Zyngier * Disable direct injection, and pray that no VM was 27265e516846SMarc Zyngier * already running... 27275e516846SMarc Zyngier */ 27285e516846SMarc Zyngier gic_rdists->has_rvpeid = false; 27295e516846SMarc Zyngier gic_rdists->has_vlpis = false; 27305e516846SMarc Zyngier } 27315e516846SMarc Zyngier 27321ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 27331ac19ca6SMarc Zyngier dsb(sy); 2734c440a9d9SMarc Zyngier out: 273511e37d35SMarc Zyngier gic_data_rdist()->lpi_enabled = true; 2736c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 273711e37d35SMarc Zyngier smp_processor_id(), 2738c440a9d9SMarc Zyngier gic_data_rdist()->pend_page ? "allocated" : "reserved", 273911e37d35SMarc Zyngier &paddr); 27401ac19ca6SMarc Zyngier } 27411ac19ca6SMarc Zyngier 2742920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 27431ac19ca6SMarc Zyngier { 2744920181ceSDerek Basehore int cpu = smp_processor_id(); 27451ac19ca6SMarc Zyngier u64 target; 27461ac19ca6SMarc Zyngier 2747fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 2748fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 2749fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 2750fbf8f40eSGanapatrao Kulkarni 2751fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 2752fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 2753fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 2754920181ceSDerek Basehore return; 2755fbf8f40eSGanapatrao Kulkarni } 2756fbf8f40eSGanapatrao Kulkarni 27571ac19ca6SMarc Zyngier /* 27581ac19ca6SMarc Zyngier * We now have to bind each collection to its target 27591ac19ca6SMarc Zyngier * redistributor. 27601ac19ca6SMarc Zyngier */ 2761589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 27621ac19ca6SMarc Zyngier /* 27631ac19ca6SMarc Zyngier * This ITS wants the physical address of the 27641ac19ca6SMarc Zyngier * redistributor. 27651ac19ca6SMarc Zyngier */ 27661ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 27671ac19ca6SMarc Zyngier } else { 2768920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 2769589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 2770263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 27711ac19ca6SMarc Zyngier } 27721ac19ca6SMarc Zyngier 27731ac19ca6SMarc Zyngier /* Perform collection mapping */ 27741ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 27751ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 27761ac19ca6SMarc Zyngier 27771ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 27781ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 27791ac19ca6SMarc Zyngier } 27801ac19ca6SMarc Zyngier 2781920181ceSDerek Basehore static void its_cpu_init_collections(void) 2782920181ceSDerek Basehore { 2783920181ceSDerek Basehore struct its_node *its; 2784920181ceSDerek Basehore 2785a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 2786920181ceSDerek Basehore 2787920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 2788920181ceSDerek Basehore its_cpu_init_collection(its); 2789920181ceSDerek Basehore 2790a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 27911ac19ca6SMarc Zyngier } 279284a6a2e7SMarc Zyngier 279384a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 279484a6a2e7SMarc Zyngier { 279584a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 27963e39e8f5SMarc Zyngier unsigned long flags; 279784a6a2e7SMarc Zyngier 27983e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 279984a6a2e7SMarc Zyngier 280084a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 280184a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 280284a6a2e7SMarc Zyngier its_dev = tmp; 280384a6a2e7SMarc Zyngier break; 280484a6a2e7SMarc Zyngier } 280584a6a2e7SMarc Zyngier } 280684a6a2e7SMarc Zyngier 28073e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 280884a6a2e7SMarc Zyngier 280984a6a2e7SMarc Zyngier return its_dev; 281084a6a2e7SMarc Zyngier } 281184a6a2e7SMarc Zyngier 2812466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 2813466b7d16SShanker Donthineni { 2814466b7d16SShanker Donthineni int i; 2815466b7d16SShanker Donthineni 2816466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 2817466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 2818466b7d16SShanker Donthineni return &its->tables[i]; 2819466b7d16SShanker Donthineni } 2820466b7d16SShanker Donthineni 2821466b7d16SShanker Donthineni return NULL; 2822466b7d16SShanker Donthineni } 2823466b7d16SShanker Donthineni 2824539d3782SShanker Donthineni static bool its_alloc_table_entry(struct its_node *its, 2825539d3782SShanker Donthineni struct its_baser *baser, u32 id) 28263faf24eaSShanker Donthineni { 28273faf24eaSShanker Donthineni struct page *page; 28283faf24eaSShanker Donthineni u32 esz, idx; 28293faf24eaSShanker Donthineni __le64 *table; 28303faf24eaSShanker Donthineni 28313faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 28323faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 28333faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 283470cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 28353faf24eaSShanker Donthineni 28363faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 283770cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 28383faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 28393faf24eaSShanker Donthineni return false; 28403faf24eaSShanker Donthineni 28413faf24eaSShanker Donthineni table = baser->base; 28423faf24eaSShanker Donthineni 28433faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 28443faf24eaSShanker Donthineni if (!table[idx]) { 2845539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 2846539d3782SShanker Donthineni get_order(baser->psz)); 28473faf24eaSShanker Donthineni if (!page) 28483faf24eaSShanker Donthineni return false; 28493faf24eaSShanker Donthineni 28503faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 28513faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2852328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 28533faf24eaSShanker Donthineni 28543faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 28553faf24eaSShanker Donthineni 28563faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 28573faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2858328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 28593faf24eaSShanker Donthineni 28603faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 28613faf24eaSShanker Donthineni dsb(sy); 28623faf24eaSShanker Donthineni } 28633faf24eaSShanker Donthineni 28643faf24eaSShanker Donthineni return true; 28653faf24eaSShanker Donthineni } 28663faf24eaSShanker Donthineni 286770cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 286870cc81edSMarc Zyngier { 286970cc81edSMarc Zyngier struct its_baser *baser; 287070cc81edSMarc Zyngier 287170cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 287270cc81edSMarc Zyngier 287370cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 287470cc81edSMarc Zyngier if (!baser) 2875576a8342SMarc Zyngier return (ilog2(dev_id) < device_ids(its)); 287670cc81edSMarc Zyngier 2877539d3782SShanker Donthineni return its_alloc_table_entry(its, baser, dev_id); 287870cc81edSMarc Zyngier } 287970cc81edSMarc Zyngier 28807d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 28817d75bbb4SMarc Zyngier { 28827d75bbb4SMarc Zyngier struct its_node *its; 28837d75bbb4SMarc Zyngier 28847d75bbb4SMarc Zyngier /* 28857d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 28867d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 28877d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 28887d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 28897d75bbb4SMarc Zyngier * anyway, right?). 28907d75bbb4SMarc Zyngier */ 28917d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 28927d75bbb4SMarc Zyngier struct its_baser *baser; 28937d75bbb4SMarc Zyngier 28940dd57fedSMarc Zyngier if (!is_v4(its)) 28957d75bbb4SMarc Zyngier continue; 28967d75bbb4SMarc Zyngier 28977d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 28987d75bbb4SMarc Zyngier if (!baser) 28997d75bbb4SMarc Zyngier return false; 29007d75bbb4SMarc Zyngier 2901539d3782SShanker Donthineni if (!its_alloc_table_entry(its, baser, vpe_id)) 29027d75bbb4SMarc Zyngier return false; 29037d75bbb4SMarc Zyngier } 29047d75bbb4SMarc Zyngier 29057d75bbb4SMarc Zyngier return true; 29067d75bbb4SMarc Zyngier } 29077d75bbb4SMarc Zyngier 290884a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 290993f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 291084a6a2e7SMarc Zyngier { 291184a6a2e7SMarc Zyngier struct its_device *dev; 291293f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 29133e39e8f5SMarc Zyngier unsigned long flags; 2914591e5becSMarc Zyngier u16 *col_map = NULL; 291584a6a2e7SMarc Zyngier void *itt; 291684a6a2e7SMarc Zyngier int lpi_base; 291784a6a2e7SMarc Zyngier int nr_lpis; 2918c8481267SMarc Zyngier int nr_ites; 291984a6a2e7SMarc Zyngier int sz; 292084a6a2e7SMarc Zyngier 29213faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2922466b7d16SShanker Donthineni return NULL; 2923466b7d16SShanker Donthineni 2924147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 2925147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 2926147c8f37SMarc Zyngier 292784a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2928c8481267SMarc Zyngier /* 2929147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 2930147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 2931c8481267SMarc Zyngier */ 2932147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 2933ffedbf0cSMarc Zyngier sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); 293484a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 2935539d3782SShanker Donthineni itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); 293693f94ea0SMarc Zyngier if (alloc_lpis) { 293738dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 2938591e5becSMarc Zyngier if (lpi_map) 29396396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 294093f94ea0SMarc Zyngier GFP_KERNEL); 294193f94ea0SMarc Zyngier } else { 29426396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 294393f94ea0SMarc Zyngier nr_lpis = 0; 294493f94ea0SMarc Zyngier lpi_base = 0; 294593f94ea0SMarc Zyngier } 294684a6a2e7SMarc Zyngier 294793f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 294884a6a2e7SMarc Zyngier kfree(dev); 294984a6a2e7SMarc Zyngier kfree(itt); 295084a6a2e7SMarc Zyngier kfree(lpi_map); 2951591e5becSMarc Zyngier kfree(col_map); 295284a6a2e7SMarc Zyngier return NULL; 295384a6a2e7SMarc Zyngier } 295484a6a2e7SMarc Zyngier 2955328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 29565a9a8915SMarc Zyngier 295784a6a2e7SMarc Zyngier dev->its = its; 295884a6a2e7SMarc Zyngier dev->itt = itt; 2959c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2960591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2961591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2962591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2963591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 296411635fa2SMarc Zyngier raw_spin_lock_init(&dev->event_map.vlpi_lock); 296584a6a2e7SMarc Zyngier dev->device_id = dev_id; 296684a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 296784a6a2e7SMarc Zyngier 29683e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 296984a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 29703e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 297184a6a2e7SMarc Zyngier 297284a6a2e7SMarc Zyngier /* Map device to its ITT */ 297384a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 297484a6a2e7SMarc Zyngier 297584a6a2e7SMarc Zyngier return dev; 297684a6a2e7SMarc Zyngier } 297784a6a2e7SMarc Zyngier 297884a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 297984a6a2e7SMarc Zyngier { 29803e39e8f5SMarc Zyngier unsigned long flags; 29813e39e8f5SMarc Zyngier 29823e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 298384a6a2e7SMarc Zyngier list_del(&its_dev->entry); 29843e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 2985898aa5ceSMarc Zyngier kfree(its_dev->event_map.col_map); 298684a6a2e7SMarc Zyngier kfree(its_dev->itt); 298784a6a2e7SMarc Zyngier kfree(its_dev); 298884a6a2e7SMarc Zyngier } 2989b48ac83dSMarc Zyngier 29908208d170SMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) 2991b48ac83dSMarc Zyngier { 2992b48ac83dSMarc Zyngier int idx; 2993b48ac83dSMarc Zyngier 2994342be106SZenghui Yu /* Find a free LPI region in lpi_map and allocate them. */ 29958208d170SMarc Zyngier idx = bitmap_find_free_region(dev->event_map.lpi_map, 29968208d170SMarc Zyngier dev->event_map.nr_lpis, 29978208d170SMarc Zyngier get_count_order(nvecs)); 29988208d170SMarc Zyngier if (idx < 0) 2999b48ac83dSMarc Zyngier return -ENOSPC; 3000b48ac83dSMarc Zyngier 3001591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 3002b48ac83dSMarc Zyngier 3003b48ac83dSMarc Zyngier return 0; 3004b48ac83dSMarc Zyngier } 3005b48ac83dSMarc Zyngier 300654456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 3007b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 3008b48ac83dSMarc Zyngier { 3009b48ac83dSMarc Zyngier struct its_node *its; 3010b48ac83dSMarc Zyngier struct its_device *its_dev; 301154456db9SMarc Zyngier struct msi_domain_info *msi_info; 301254456db9SMarc Zyngier u32 dev_id; 30139791ec7dSMarc Zyngier int err = 0; 3014b48ac83dSMarc Zyngier 301554456db9SMarc Zyngier /* 3016a7c90f51SJulien Grall * We ignore "dev" entirely, and rely on the dev_id that has 301754456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 301854456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 301954456db9SMarc Zyngier * are built on top of the ITS. 302054456db9SMarc Zyngier */ 302154456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 302254456db9SMarc Zyngier 302354456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 302454456db9SMarc Zyngier its = msi_info->data; 302554456db9SMarc Zyngier 302620b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 302720b3d54eSMarc Zyngier vpe_proxy.dev && 302820b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 302920b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 303020b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 303120b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 303220b3d54eSMarc Zyngier dev_id); 303320b3d54eSMarc Zyngier return -EINVAL; 303420b3d54eSMarc Zyngier } 303520b3d54eSMarc Zyngier 30369791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 3037f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 3038e8137f4fSMarc Zyngier if (its_dev) { 3039e8137f4fSMarc Zyngier /* 3040e8137f4fSMarc Zyngier * We already have seen this ID, probably through 3041e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 3042e8137f4fSMarc Zyngier * create the device. 3043e8137f4fSMarc Zyngier */ 30449791ec7dSMarc Zyngier its_dev->shared = true; 3045f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 3046e8137f4fSMarc Zyngier goto out; 3047e8137f4fSMarc Zyngier } 3048b48ac83dSMarc Zyngier 304993f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 30509791ec7dSMarc Zyngier if (!its_dev) { 30519791ec7dSMarc Zyngier err = -ENOMEM; 30529791ec7dSMarc Zyngier goto out; 30539791ec7dSMarc Zyngier } 3054b48ac83dSMarc Zyngier 3055f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 3056e8137f4fSMarc Zyngier out: 30579791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 3058b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 30599791ec7dSMarc Zyngier return err; 3060b48ac83dSMarc Zyngier } 3061b48ac83dSMarc Zyngier 306254456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 306354456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 306454456db9SMarc Zyngier }; 306554456db9SMarc Zyngier 3066b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 3067b48ac83dSMarc Zyngier unsigned int virq, 3068b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 3069b48ac83dSMarc Zyngier { 3070f833f57fSMarc Zyngier struct irq_fwspec fwspec; 3071b48ac83dSMarc Zyngier 3072f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 3073f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 3074f833f57fSMarc Zyngier fwspec.param_count = 3; 3075f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 3076f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 3077f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 30783f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 30793f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 30803f010cf1STomasz Nowicki fwspec.param_count = 2; 30813f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 30823f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 3083f833f57fSMarc Zyngier } else { 3084f833f57fSMarc Zyngier return -EINVAL; 3085f833f57fSMarc Zyngier } 3086b48ac83dSMarc Zyngier 3087f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 3088b48ac83dSMarc Zyngier } 3089b48ac83dSMarc Zyngier 3090b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 3091b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 3092b48ac83dSMarc Zyngier { 3093b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 3094b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 309535ae7df2SJulien Grall struct its_node *its = its_dev->its; 3096b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 3097b48ac83dSMarc Zyngier int err; 3098b48ac83dSMarc Zyngier int i; 3099b48ac83dSMarc Zyngier 31008208d170SMarc Zyngier err = its_alloc_device_irq(its_dev, nr_irqs, &hwirq); 3101b48ac83dSMarc Zyngier if (err) 3102b48ac83dSMarc Zyngier return err; 3103b48ac83dSMarc Zyngier 310435ae7df2SJulien Grall err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); 310535ae7df2SJulien Grall if (err) 310635ae7df2SJulien Grall return err; 310735ae7df2SJulien Grall 31088208d170SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 31098208d170SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); 3110b48ac83dSMarc Zyngier if (err) 3111b48ac83dSMarc Zyngier return err; 3112b48ac83dSMarc Zyngier 3113b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 31148208d170SMarc Zyngier hwirq + i, &its_irq_chip, its_dev); 31150d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 3116f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 31178208d170SMarc Zyngier (int)(hwirq + i - its_dev->event_map.lpi_base), 31188208d170SMarc Zyngier (int)(hwirq + i), virq + i); 3119b48ac83dSMarc Zyngier } 3120b48ac83dSMarc Zyngier 3121b48ac83dSMarc Zyngier return 0; 3122b48ac83dSMarc Zyngier } 3123b48ac83dSMarc Zyngier 312472491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 3125702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3126aca268dfSMarc Zyngier { 3127aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3128aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 3129fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 31300d224d35SMarc Zyngier int cpu; 3131fbf8f40eSGanapatrao Kulkarni 3132fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 3133fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 3134fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 3135aca268dfSMarc Zyngier 3136591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 3137c1797b11SYang Yingliang cpu = cpumask_first_and(cpu_mask, cpu_online_mask); 3138c1797b11SYang Yingliang if (cpu >= nr_cpu_ids) { 3139c1797b11SYang Yingliang if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) 3140c1797b11SYang Yingliang return -EINVAL; 3141c1797b11SYang Yingliang 3142c1797b11SYang Yingliang cpu = cpumask_first(cpu_online_mask); 3143c1797b11SYang Yingliang } 3144c1797b11SYang Yingliang 31450d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 31460d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3147591e5becSMarc Zyngier 3148aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 31496a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 315072491643SThomas Gleixner return 0; 3151aca268dfSMarc Zyngier } 3152aca268dfSMarc Zyngier 3153aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 3154aca268dfSMarc Zyngier struct irq_data *d) 3155aca268dfSMarc Zyngier { 3156aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3157aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 3158aca268dfSMarc Zyngier 3159aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 3160aca268dfSMarc Zyngier its_send_discard(its_dev, event); 3161aca268dfSMarc Zyngier } 3162aca268dfSMarc Zyngier 3163b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 3164b48ac83dSMarc Zyngier unsigned int nr_irqs) 3165b48ac83dSMarc Zyngier { 3166b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 3167b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 31689791ec7dSMarc Zyngier struct its_node *its = its_dev->its; 3169b48ac83dSMarc Zyngier int i; 3170b48ac83dSMarc Zyngier 3171c9c96e30SMarc Zyngier bitmap_release_region(its_dev->event_map.lpi_map, 3172c9c96e30SMarc Zyngier its_get_event_id(irq_domain_get_irq_data(domain, virq)), 3173c9c96e30SMarc Zyngier get_count_order(nr_irqs)); 3174c9c96e30SMarc Zyngier 3175b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 3176b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 3177b48ac83dSMarc Zyngier virq + i); 3178b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 31792da39949SMarc Zyngier irq_domain_reset_irq_data(data); 3180b48ac83dSMarc Zyngier } 3181b48ac83dSMarc Zyngier 31829791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 31839791ec7dSMarc Zyngier 31849791ec7dSMarc Zyngier /* 31859791ec7dSMarc Zyngier * If all interrupts have been freed, start mopping the 31869791ec7dSMarc Zyngier * floor. This is conditionned on the device not being shared. 31879791ec7dSMarc Zyngier */ 31889791ec7dSMarc Zyngier if (!its_dev->shared && 31899791ec7dSMarc Zyngier bitmap_empty(its_dev->event_map.lpi_map, 3190591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 319138dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 3192cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 3193cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 3194b48ac83dSMarc Zyngier 3195b48ac83dSMarc Zyngier /* Unmap device/itt */ 3196b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 3197b48ac83dSMarc Zyngier its_free_device(its_dev); 3198b48ac83dSMarc Zyngier } 3199b48ac83dSMarc Zyngier 32009791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 32019791ec7dSMarc Zyngier 3202b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 3203b48ac83dSMarc Zyngier } 3204b48ac83dSMarc Zyngier 3205b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 3206b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 3207b48ac83dSMarc Zyngier .free = its_irq_domain_free, 3208aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 3209aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 3210b48ac83dSMarc Zyngier }; 32114c21f3c2SMarc Zyngier 321220b3d54eSMarc Zyngier /* 321320b3d54eSMarc Zyngier * This is insane. 321420b3d54eSMarc Zyngier * 321520b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 321620b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 321720b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 321820b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 321920b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 322020b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 322120b3d54eSMarc Zyngier * 322220b3d54eSMarc Zyngier * Broken by design(tm). 322320b3d54eSMarc Zyngier */ 322420b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 322520b3d54eSMarc Zyngier { 322620b3d54eSMarc Zyngier /* Already unmapped? */ 322720b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 322820b3d54eSMarc Zyngier return; 322920b3d54eSMarc Zyngier 323020b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 323120b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 323220b3d54eSMarc Zyngier 323320b3d54eSMarc Zyngier /* 323420b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 323520b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 323620b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 323720b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 323820b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 323920b3d54eSMarc Zyngier */ 324020b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 324120b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 324220b3d54eSMarc Zyngier 324320b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 324420b3d54eSMarc Zyngier } 324520b3d54eSMarc Zyngier 324620b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 324720b3d54eSMarc Zyngier { 324820b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 324920b3d54eSMarc Zyngier unsigned long flags; 325020b3d54eSMarc Zyngier 325120b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 325220b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 325320b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 325420b3d54eSMarc Zyngier } 325520b3d54eSMarc Zyngier } 325620b3d54eSMarc Zyngier 325720b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 325820b3d54eSMarc Zyngier { 325920b3d54eSMarc Zyngier /* Already mapped? */ 326020b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 326120b3d54eSMarc Zyngier return; 326220b3d54eSMarc Zyngier 326320b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 326420b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 326520b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 326620b3d54eSMarc Zyngier 326720b3d54eSMarc Zyngier /* Map the new VPE instead */ 326820b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 326920b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 327020b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 327120b3d54eSMarc Zyngier 327220b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 327320b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 327420b3d54eSMarc Zyngier } 327520b3d54eSMarc Zyngier 3276958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 3277958b90d1SMarc Zyngier { 3278958b90d1SMarc Zyngier unsigned long flags; 3279958b90d1SMarc Zyngier struct its_collection *target_col; 3280958b90d1SMarc Zyngier 3281958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3282958b90d1SMarc Zyngier void __iomem *rdbase; 3283958b90d1SMarc Zyngier 3284958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 3285958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 32862f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3287958b90d1SMarc Zyngier 3288958b90d1SMarc Zyngier return; 3289958b90d1SMarc Zyngier } 3290958b90d1SMarc Zyngier 3291958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 3292958b90d1SMarc Zyngier 3293958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 3294958b90d1SMarc Zyngier 3295958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 3296958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 3297958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 3298958b90d1SMarc Zyngier 3299958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 3300958b90d1SMarc Zyngier } 3301958b90d1SMarc Zyngier 33023171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 33033171a47aSMarc Zyngier const struct cpumask *mask_val, 33043171a47aSMarc Zyngier bool force) 33053171a47aSMarc Zyngier { 33063171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 33073171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 33083171a47aSMarc Zyngier 33093171a47aSMarc Zyngier /* 33103171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 331120b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 3312958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 3313958b90d1SMarc Zyngier * interrupt to its new location. 33143171a47aSMarc Zyngier */ 33153171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 3316958b90d1SMarc Zyngier int from = vpe->col_idx; 3317958b90d1SMarc Zyngier 33183171a47aSMarc Zyngier vpe->col_idx = cpu; 33193171a47aSMarc Zyngier its_send_vmovp(vpe); 3320958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 33213171a47aSMarc Zyngier } 33223171a47aSMarc Zyngier 332344c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 332444c4c25eSMarc Zyngier 33253171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 33263171a47aSMarc Zyngier } 33273171a47aSMarc Zyngier 3328e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 3329e643d803SMarc Zyngier { 333050c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3331e643d803SMarc Zyngier u64 val; 3332e643d803SMarc Zyngier 3333e643d803SMarc Zyngier /* Schedule the VPE */ 3334e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 3335e643d803SMarc Zyngier GENMASK_ULL(51, 12); 3336e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 3337e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 3338e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 3339e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 3340e643d803SMarc Zyngier 3341e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 3342e643d803SMarc Zyngier GENMASK_ULL(51, 16); 3343e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 3344e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 3345e643d803SMarc Zyngier /* 3346e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 3347e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 3348e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 3349e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 3350e643d803SMarc Zyngier * that the pending table is empty. A good implementation 3351e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 3352e643d803SMarc Zyngier * making this a tolerable issue. 3353e643d803SMarc Zyngier */ 3354e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 3355e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 3356e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 3357e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 3358e643d803SMarc Zyngier } 3359e643d803SMarc Zyngier 3360e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 3361e643d803SMarc Zyngier { 336250c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3363e643d803SMarc Zyngier u64 val; 3364e643d803SMarc Zyngier 33656479450fSHeyi Guo val = its_clear_vpend_valid(vlpi_base); 3366e643d803SMarc Zyngier 33676479450fSHeyi Guo if (unlikely(val & GICR_VPENDBASER_Dirty)) { 3368e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 3369e643d803SMarc Zyngier vpe->idai = false; 3370e643d803SMarc Zyngier vpe->pending_last = true; 3371e643d803SMarc Zyngier } else { 3372e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 3373e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 3374e643d803SMarc Zyngier } 3375e643d803SMarc Zyngier } 3376e643d803SMarc Zyngier 337740619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 337840619a2eSMarc Zyngier { 337940619a2eSMarc Zyngier struct its_node *its; 338040619a2eSMarc Zyngier 338140619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 33820dd57fedSMarc Zyngier if (!is_v4(its)) 338340619a2eSMarc Zyngier continue; 338440619a2eSMarc Zyngier 33852247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 33862247e1bfSMarc Zyngier continue; 33872247e1bfSMarc Zyngier 33883c1cceebSMarc Zyngier /* 33893c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 33903c1cceebSMarc Zyngier * we need is to reach the redistributors. 33913c1cceebSMarc Zyngier */ 339240619a2eSMarc Zyngier its_send_vinvall(its, vpe); 33933c1cceebSMarc Zyngier return; 339440619a2eSMarc Zyngier } 339540619a2eSMarc Zyngier } 339640619a2eSMarc Zyngier 3397e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 3398e643d803SMarc Zyngier { 3399e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3400e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 3401e643d803SMarc Zyngier 3402e643d803SMarc Zyngier switch (info->cmd_type) { 3403e643d803SMarc Zyngier case SCHEDULE_VPE: 3404e643d803SMarc Zyngier its_vpe_schedule(vpe); 3405e643d803SMarc Zyngier return 0; 3406e643d803SMarc Zyngier 3407e643d803SMarc Zyngier case DESCHEDULE_VPE: 3408e643d803SMarc Zyngier its_vpe_deschedule(vpe); 3409e643d803SMarc Zyngier return 0; 3410e643d803SMarc Zyngier 34115e2f7642SMarc Zyngier case INVALL_VPE: 341240619a2eSMarc Zyngier its_vpe_invall(vpe); 34135e2f7642SMarc Zyngier return 0; 34145e2f7642SMarc Zyngier 3415e643d803SMarc Zyngier default: 3416e643d803SMarc Zyngier return -EINVAL; 3417e643d803SMarc Zyngier } 3418e643d803SMarc Zyngier } 3419e643d803SMarc Zyngier 342020b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 342120b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 342220b3d54eSMarc Zyngier { 342320b3d54eSMarc Zyngier unsigned long flags; 342420b3d54eSMarc Zyngier 342520b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 342620b3d54eSMarc Zyngier 342720b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 342820b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 342920b3d54eSMarc Zyngier 343020b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 343120b3d54eSMarc Zyngier } 343220b3d54eSMarc Zyngier 3433f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 3434f6a91da7SMarc Zyngier { 3435f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 343620b3d54eSMarc Zyngier 343720b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 3438f6a91da7SMarc Zyngier void __iomem *rdbase; 3439f6a91da7SMarc Zyngier 3440425c09beSMarc Zyngier /* Target the redistributor this VPE is currently known on */ 3441f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3442425c09beSMarc Zyngier gic_write_lpir(d->parent_data->hwirq, rdbase + GICR_INVLPIR); 34432f4f064bSMarc Zyngier wait_for_syncr(rdbase); 344420b3d54eSMarc Zyngier } else { 344520b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 344620b3d54eSMarc Zyngier } 3447f6a91da7SMarc Zyngier } 3448f6a91da7SMarc Zyngier 3449f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 3450f6a91da7SMarc Zyngier { 3451f6a91da7SMarc Zyngier /* 3452f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 3453f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 3454f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 3455f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 3456f6a91da7SMarc Zyngier */ 3457f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 3458f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3459f6a91da7SMarc Zyngier } 3460f6a91da7SMarc Zyngier 3461f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 3462f6a91da7SMarc Zyngier { 3463f6a91da7SMarc Zyngier /* Same hack as above... */ 3464f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 3465f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3466f6a91da7SMarc Zyngier } 3467f6a91da7SMarc Zyngier 3468e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 3469e57a3e28SMarc Zyngier enum irqchip_irq_state which, 3470e57a3e28SMarc Zyngier bool state) 3471e57a3e28SMarc Zyngier { 3472e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3473e57a3e28SMarc Zyngier 3474e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 3475e57a3e28SMarc Zyngier return -EINVAL; 3476e57a3e28SMarc Zyngier 3477e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3478e57a3e28SMarc Zyngier void __iomem *rdbase; 3479e57a3e28SMarc Zyngier 3480e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3481e57a3e28SMarc Zyngier if (state) { 3482e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 3483e57a3e28SMarc Zyngier } else { 3484e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 34852f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3486e57a3e28SMarc Zyngier } 3487e57a3e28SMarc Zyngier } else { 3488e57a3e28SMarc Zyngier if (state) 3489e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 3490e57a3e28SMarc Zyngier else 3491e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 3492e57a3e28SMarc Zyngier } 3493e57a3e28SMarc Zyngier 3494e57a3e28SMarc Zyngier return 0; 3495e57a3e28SMarc Zyngier } 3496e57a3e28SMarc Zyngier 34978fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 34988fff27aeSMarc Zyngier .name = "GICv4-vpe", 3499f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 3500f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 3501f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 35023171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 3503e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 3504e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 35058fff27aeSMarc Zyngier }; 35068fff27aeSMarc Zyngier 35077d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 35087d75bbb4SMarc Zyngier { 350932bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 35107d75bbb4SMarc Zyngier } 35117d75bbb4SMarc Zyngier 35127d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 35137d75bbb4SMarc Zyngier { 35147d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 35157d75bbb4SMarc Zyngier } 35167d75bbb4SMarc Zyngier 35177d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 35187d75bbb4SMarc Zyngier { 35197d75bbb4SMarc Zyngier struct page *vpt_page; 35207d75bbb4SMarc Zyngier int vpe_id; 35217d75bbb4SMarc Zyngier 35227d75bbb4SMarc Zyngier /* Allocate vpe_id */ 35237d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 35247d75bbb4SMarc Zyngier if (vpe_id < 0) 35257d75bbb4SMarc Zyngier return vpe_id; 35267d75bbb4SMarc Zyngier 35277d75bbb4SMarc Zyngier /* Allocate VPT */ 35287d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 35297d75bbb4SMarc Zyngier if (!vpt_page) { 35307d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 35317d75bbb4SMarc Zyngier return -ENOMEM; 35327d75bbb4SMarc Zyngier } 35337d75bbb4SMarc Zyngier 35347d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 35357d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 353634f8eb92SNianyao Tang its_free_pending_table(vpt_page); 35377d75bbb4SMarc Zyngier return -ENOMEM; 35387d75bbb4SMarc Zyngier } 35397d75bbb4SMarc Zyngier 35407d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 35417d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 354264edfaa9SMarc Zyngier if (gic_rdists->has_rvpeid) 354364edfaa9SMarc Zyngier atomic_set(&vpe->vmapp_count, 0); 354464edfaa9SMarc Zyngier else 354520b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 35467d75bbb4SMarc Zyngier 35477d75bbb4SMarc Zyngier return 0; 35487d75bbb4SMarc Zyngier } 35497d75bbb4SMarc Zyngier 35507d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 35517d75bbb4SMarc Zyngier { 355220b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 35537d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 35547d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 35557d75bbb4SMarc Zyngier } 35567d75bbb4SMarc Zyngier 35577d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 35587d75bbb4SMarc Zyngier unsigned int virq, 35597d75bbb4SMarc Zyngier unsigned int nr_irqs) 35607d75bbb4SMarc Zyngier { 35617d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 35627d75bbb4SMarc Zyngier int i; 35637d75bbb4SMarc Zyngier 35647d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 35657d75bbb4SMarc Zyngier 35667d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 35677d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 35687d75bbb4SMarc Zyngier virq + i); 35697d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 35707d75bbb4SMarc Zyngier 35717d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 35727d75bbb4SMarc Zyngier 35737d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 35747d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 35757d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 35767d75bbb4SMarc Zyngier } 35777d75bbb4SMarc Zyngier 35787d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 357938dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 35807d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 35817d75bbb4SMarc Zyngier } 35827d75bbb4SMarc Zyngier } 35837d75bbb4SMarc Zyngier 35847d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 35857d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 35867d75bbb4SMarc Zyngier { 35877d75bbb4SMarc Zyngier struct its_vm *vm = args; 35887d75bbb4SMarc Zyngier unsigned long *bitmap; 35897d75bbb4SMarc Zyngier struct page *vprop_page; 35907d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 35917d75bbb4SMarc Zyngier 35927d75bbb4SMarc Zyngier BUG_ON(!vm); 35937d75bbb4SMarc Zyngier 359438dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 35957d75bbb4SMarc Zyngier if (!bitmap) 35967d75bbb4SMarc Zyngier return -ENOMEM; 35977d75bbb4SMarc Zyngier 35987d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 359938dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 36007d75bbb4SMarc Zyngier return -ENOMEM; 36017d75bbb4SMarc Zyngier } 36027d75bbb4SMarc Zyngier 36037d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 36047d75bbb4SMarc Zyngier if (!vprop_page) { 360538dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 36067d75bbb4SMarc Zyngier return -ENOMEM; 36077d75bbb4SMarc Zyngier } 36087d75bbb4SMarc Zyngier 36097d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 36107d75bbb4SMarc Zyngier vm->db_lpi_base = base; 36117d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 36127d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 36137d75bbb4SMarc Zyngier 36147d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 36157d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 36167d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 36177d75bbb4SMarc Zyngier if (err) 36187d75bbb4SMarc Zyngier break; 36197d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 36207d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 36217d75bbb4SMarc Zyngier if (err) 36227d75bbb4SMarc Zyngier break; 36237d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 36247d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 36257d75bbb4SMarc Zyngier set_bit(i, bitmap); 36267d75bbb4SMarc Zyngier } 36277d75bbb4SMarc Zyngier 36287d75bbb4SMarc Zyngier if (err) { 36297d75bbb4SMarc Zyngier if (i > 0) 36307d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 36317d75bbb4SMarc Zyngier 363238dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 36337d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 36347d75bbb4SMarc Zyngier } 36357d75bbb4SMarc Zyngier 36367d75bbb4SMarc Zyngier return err; 36377d75bbb4SMarc Zyngier } 36387d75bbb4SMarc Zyngier 363972491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 3640702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3641eb78192bSMarc Zyngier { 3642eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 364340619a2eSMarc Zyngier struct its_node *its; 3644eb78192bSMarc Zyngier 36452247e1bfSMarc Zyngier /* If we use the list map, we issue VMAPP on demand... */ 36462247e1bfSMarc Zyngier if (its_list_map) 36476ef930f2SMarc Zyngier return 0; 3648eb78192bSMarc Zyngier 3649eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 3650eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 365140619a2eSMarc Zyngier 365240619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 36530dd57fedSMarc Zyngier if (!is_v4(its)) 365440619a2eSMarc Zyngier continue; 365540619a2eSMarc Zyngier 365675fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 365740619a2eSMarc Zyngier its_send_vinvall(its, vpe); 365840619a2eSMarc Zyngier } 365940619a2eSMarc Zyngier 366044c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 366144c4c25eSMarc Zyngier 366272491643SThomas Gleixner return 0; 3663eb78192bSMarc Zyngier } 3664eb78192bSMarc Zyngier 3665eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 3666eb78192bSMarc Zyngier struct irq_data *d) 3667eb78192bSMarc Zyngier { 3668eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 366975fd951bSMarc Zyngier struct its_node *its; 3670eb78192bSMarc Zyngier 36712247e1bfSMarc Zyngier /* 36722247e1bfSMarc Zyngier * If we use the list map, we unmap the VPE once no VLPIs are 36732247e1bfSMarc Zyngier * associated with the VM. 36742247e1bfSMarc Zyngier */ 36752247e1bfSMarc Zyngier if (its_list_map) 36762247e1bfSMarc Zyngier return; 36772247e1bfSMarc Zyngier 367875fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 36790dd57fedSMarc Zyngier if (!is_v4(its)) 368075fd951bSMarc Zyngier continue; 368175fd951bSMarc Zyngier 368275fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 368375fd951bSMarc Zyngier } 3684eb78192bSMarc Zyngier } 3685eb78192bSMarc Zyngier 36868fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 36877d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 36887d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 3689eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 3690eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 36918fff27aeSMarc Zyngier }; 36928fff27aeSMarc Zyngier 36934559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 36944559fbb3SYun Wu { 36954559fbb3SYun Wu u32 count = 1000000; /* 1s */ 36964559fbb3SYun Wu u32 val; 36974559fbb3SYun Wu 36984559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 36997611da86SDavid Daney /* 37007611da86SDavid Daney * GIC architecture specification requires the ITS to be both 37017611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 37027611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 37037611da86SDavid Daney */ 37047611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 37054559fbb3SYun Wu return 0; 37064559fbb3SYun Wu 37074559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 3708d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 37094559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 37104559fbb3SYun Wu 37114559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 37124559fbb3SYun Wu while (1) { 37134559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 37144559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 37154559fbb3SYun Wu return 0; 37164559fbb3SYun Wu 37174559fbb3SYun Wu count--; 37184559fbb3SYun Wu if (!count) 37194559fbb3SYun Wu return -EBUSY; 37204559fbb3SYun Wu 37214559fbb3SYun Wu cpu_relax(); 37224559fbb3SYun Wu udelay(1); 37234559fbb3SYun Wu } 37244559fbb3SYun Wu } 37254559fbb3SYun Wu 37269d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 372794100970SRobert Richter { 372894100970SRobert Richter struct its_node *its = data; 372994100970SRobert Richter 3730576a8342SMarc Zyngier /* erratum 22375: only alloc 8MB table size (20 bits) */ 3731576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 3732576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); 373394100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 37349d111d49SArd Biesheuvel 37359d111d49SArd Biesheuvel return true; 373694100970SRobert Richter } 373794100970SRobert Richter 37389d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 3739fbf8f40eSGanapatrao Kulkarni { 3740fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 3741fbf8f40eSGanapatrao Kulkarni 3742fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 37439d111d49SArd Biesheuvel 37449d111d49SArd Biesheuvel return true; 3745fbf8f40eSGanapatrao Kulkarni } 3746fbf8f40eSGanapatrao Kulkarni 37479d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 374890922a2dSShanker Donthineni { 374990922a2dSShanker Donthineni struct its_node *its = data; 375090922a2dSShanker Donthineni 375190922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 3752ffedbf0cSMarc Zyngier its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; 3753ffedbf0cSMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); 37549d111d49SArd Biesheuvel 37559d111d49SArd Biesheuvel return true; 375690922a2dSShanker Donthineni } 375790922a2dSShanker Donthineni 3758558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 3759558b0165SArd Biesheuvel { 3760558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 3761558b0165SArd Biesheuvel 3762558b0165SArd Biesheuvel /* 3763558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 3764558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 3765558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 3766558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 3767558b0165SArd Biesheuvel * the window offset. 3768558b0165SArd Biesheuvel */ 3769558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 3770558b0165SArd Biesheuvel } 3771558b0165SArd Biesheuvel 3772558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 3773558b0165SArd Biesheuvel { 3774558b0165SArd Biesheuvel struct its_node *its = data; 3775558b0165SArd Biesheuvel u32 pre_its_window[2]; 3776558b0165SArd Biesheuvel u32 ids; 3777558b0165SArd Biesheuvel 3778558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 3779558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 3780558b0165SArd Biesheuvel pre_its_window, 3781558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 3782558b0165SArd Biesheuvel 3783558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 3784558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 3785558b0165SArd Biesheuvel 3786558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 3787576a8342SMarc Zyngier if (device_ids(its) > ids) { 3788576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 3789576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); 3790576a8342SMarc Zyngier } 3791558b0165SArd Biesheuvel 3792558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 3793558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 3794558b0165SArd Biesheuvel return true; 3795558b0165SArd Biesheuvel } 3796558b0165SArd Biesheuvel return false; 3797558b0165SArd Biesheuvel } 3798558b0165SArd Biesheuvel 37995c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 38005c9a882eSMarc Zyngier { 38015c9a882eSMarc Zyngier struct its_node *its = data; 38025c9a882eSMarc Zyngier 38035c9a882eSMarc Zyngier /* 38045c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 38055c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 38065c9a882eSMarc Zyngier */ 38075c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 38085c9a882eSMarc Zyngier return true; 3809cc2d3216SMarc Zyngier } 38104c21f3c2SMarc Zyngier 381167510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 381294100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 381394100970SRobert Richter { 381494100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 381594100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 381694100970SRobert Richter .mask = 0xffff0fff, 381794100970SRobert Richter .init = its_enable_quirk_cavium_22375, 381894100970SRobert Richter }, 381994100970SRobert Richter #endif 3820fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 3821fbf8f40eSGanapatrao Kulkarni { 3822fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 3823fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 3824fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 3825fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 3826fbf8f40eSGanapatrao Kulkarni }, 3827fbf8f40eSGanapatrao Kulkarni #endif 382890922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 382990922a2dSShanker Donthineni { 383090922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 383190922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 383290922a2dSShanker Donthineni .mask = 0xffffffff, 383390922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 383490922a2dSShanker Donthineni }, 383590922a2dSShanker Donthineni #endif 3836558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 3837558b0165SArd Biesheuvel { 3838558b0165SArd Biesheuvel /* 3839558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 3840558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 3841558b0165SArd Biesheuvel * special handling in software. 3842558b0165SArd Biesheuvel */ 3843558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 3844558b0165SArd Biesheuvel .iidr = 0x0001143b, 3845558b0165SArd Biesheuvel .mask = 0xffffffff, 3846558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 3847558b0165SArd Biesheuvel }, 3848558b0165SArd Biesheuvel #endif 38495c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 38505c9a882eSMarc Zyngier { 38515c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 38525c9a882eSMarc Zyngier .iidr = 0x00000004, 38535c9a882eSMarc Zyngier .mask = 0xffffffff, 38545c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 38555c9a882eSMarc Zyngier }, 38565c9a882eSMarc Zyngier #endif 385767510ccaSRobert Richter { 385867510ccaSRobert Richter } 385967510ccaSRobert Richter }; 386067510ccaSRobert Richter 386167510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 386267510ccaSRobert Richter { 386367510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 386467510ccaSRobert Richter 386567510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 386667510ccaSRobert Richter } 386767510ccaSRobert Richter 3868dba0bc7bSDerek Basehore static int its_save_disable(void) 3869dba0bc7bSDerek Basehore { 3870dba0bc7bSDerek Basehore struct its_node *its; 3871dba0bc7bSDerek Basehore int err = 0; 3872dba0bc7bSDerek Basehore 3873a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3874dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3875dba0bc7bSDerek Basehore void __iomem *base; 3876dba0bc7bSDerek Basehore 3877dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3878dba0bc7bSDerek Basehore continue; 3879dba0bc7bSDerek Basehore 3880dba0bc7bSDerek Basehore base = its->base; 3881dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 3882dba0bc7bSDerek Basehore err = its_force_quiescent(base); 3883dba0bc7bSDerek Basehore if (err) { 3884dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 3885dba0bc7bSDerek Basehore &its->phys_base, err); 3886dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3887dba0bc7bSDerek Basehore goto err; 3888dba0bc7bSDerek Basehore } 3889dba0bc7bSDerek Basehore 3890dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 3891dba0bc7bSDerek Basehore } 3892dba0bc7bSDerek Basehore 3893dba0bc7bSDerek Basehore err: 3894dba0bc7bSDerek Basehore if (err) { 3895dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 3896dba0bc7bSDerek Basehore void __iomem *base; 3897dba0bc7bSDerek Basehore 3898dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3899dba0bc7bSDerek Basehore continue; 3900dba0bc7bSDerek Basehore 3901dba0bc7bSDerek Basehore base = its->base; 3902dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3903dba0bc7bSDerek Basehore } 3904dba0bc7bSDerek Basehore } 3905a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3906dba0bc7bSDerek Basehore 3907dba0bc7bSDerek Basehore return err; 3908dba0bc7bSDerek Basehore } 3909dba0bc7bSDerek Basehore 3910dba0bc7bSDerek Basehore static void its_restore_enable(void) 3911dba0bc7bSDerek Basehore { 3912dba0bc7bSDerek Basehore struct its_node *its; 3913dba0bc7bSDerek Basehore int ret; 3914dba0bc7bSDerek Basehore 3915a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3916dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3917dba0bc7bSDerek Basehore void __iomem *base; 3918dba0bc7bSDerek Basehore int i; 3919dba0bc7bSDerek Basehore 3920dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3921dba0bc7bSDerek Basehore continue; 3922dba0bc7bSDerek Basehore 3923dba0bc7bSDerek Basehore base = its->base; 3924dba0bc7bSDerek Basehore 3925dba0bc7bSDerek Basehore /* 3926dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 3927dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 3928dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 3929dba0bc7bSDerek Basehore * Specification. 3930dba0bc7bSDerek Basehore */ 3931dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 3932dba0bc7bSDerek Basehore if (ret) { 3933dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 3934dba0bc7bSDerek Basehore &its->phys_base, ret); 3935dba0bc7bSDerek Basehore continue; 3936dba0bc7bSDerek Basehore } 3937dba0bc7bSDerek Basehore 3938dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 3939dba0bc7bSDerek Basehore 3940dba0bc7bSDerek Basehore /* 3941dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 3942dba0bc7bSDerek Basehore * cmd_write line up with it. 3943dba0bc7bSDerek Basehore */ 3944dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 3945dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 3946dba0bc7bSDerek Basehore 3947dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 3948dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3949dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 3950dba0bc7bSDerek Basehore 3951dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 3952dba0bc7bSDerek Basehore continue; 3953dba0bc7bSDerek Basehore 3954dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 3955dba0bc7bSDerek Basehore } 3956dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3957920181ceSDerek Basehore 3958920181ceSDerek Basehore /* 3959920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 3960920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 3961920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 3962920181ceSDerek Basehore */ 3963920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 3964920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 3965920181ceSDerek Basehore its_cpu_init_collection(its); 3966dba0bc7bSDerek Basehore } 3967a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3968dba0bc7bSDerek Basehore } 3969dba0bc7bSDerek Basehore 3970dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 3971dba0bc7bSDerek Basehore .suspend = its_save_disable, 3972dba0bc7bSDerek Basehore .resume = its_restore_enable, 3973dba0bc7bSDerek Basehore }; 3974dba0bc7bSDerek Basehore 3975db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 3976d14ae5e6STomasz Nowicki { 3977d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 3978d14ae5e6STomasz Nowicki struct msi_domain_info *info; 3979d14ae5e6STomasz Nowicki 3980d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 3981d14ae5e6STomasz Nowicki if (!info) 3982d14ae5e6STomasz Nowicki return -ENOMEM; 3983d14ae5e6STomasz Nowicki 3984db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 3985d14ae5e6STomasz Nowicki if (!inner_domain) { 3986d14ae5e6STomasz Nowicki kfree(info); 3987d14ae5e6STomasz Nowicki return -ENOMEM; 3988d14ae5e6STomasz Nowicki } 3989d14ae5e6STomasz Nowicki 3990db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 399196f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 3992558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 3993d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 3994d14ae5e6STomasz Nowicki info->data = its; 3995d14ae5e6STomasz Nowicki inner_domain->host_data = info; 3996d14ae5e6STomasz Nowicki 3997d14ae5e6STomasz Nowicki return 0; 3998d14ae5e6STomasz Nowicki } 3999d14ae5e6STomasz Nowicki 40008fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 40018fff27aeSMarc Zyngier { 400220b3d54eSMarc Zyngier struct its_node *its; 400320b3d54eSMarc Zyngier u32 devid; 400420b3d54eSMarc Zyngier int entries; 400520b3d54eSMarc Zyngier 400620b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 400720b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 400820b3d54eSMarc Zyngier return 0; 400920b3d54eSMarc Zyngier } 401020b3d54eSMarc Zyngier 401120b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 401220b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 401320b3d54eSMarc Zyngier 401420b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 40156396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 401620b3d54eSMarc Zyngier GFP_KERNEL); 401720b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 401820b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 401920b3d54eSMarc Zyngier return -ENOMEM; 402020b3d54eSMarc Zyngier } 402120b3d54eSMarc Zyngier 402220b3d54eSMarc Zyngier /* Use the last possible DevID */ 4023576a8342SMarc Zyngier devid = GENMASK(device_ids(its) - 1, 0); 402420b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 402520b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 402620b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 402720b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 402820b3d54eSMarc Zyngier return -ENOMEM; 402920b3d54eSMarc Zyngier } 403020b3d54eSMarc Zyngier 4031c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 403220b3d54eSMarc Zyngier 403320b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 403420b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 403520b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 403620b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 403720b3d54eSMarc Zyngier 40388fff27aeSMarc Zyngier return 0; 40398fff27aeSMarc Zyngier } 40408fff27aeSMarc Zyngier 40413dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 40423dfa576bSMarc Zyngier void __iomem *its_base) 40433dfa576bSMarc Zyngier { 40443dfa576bSMarc Zyngier int its_number; 40453dfa576bSMarc Zyngier u32 ctlr; 40463dfa576bSMarc Zyngier 40473dfa576bSMarc Zyngier /* 40483dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 40493dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 40503dfa576bSMarc Zyngier * locking. Should this change, we should address 40513dfa576bSMarc Zyngier * this. 40523dfa576bSMarc Zyngier */ 4053ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 4054ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 40553dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 40563dfa576bSMarc Zyngier &res->start); 40573dfa576bSMarc Zyngier return -EINVAL; 40583dfa576bSMarc Zyngier } 40593dfa576bSMarc Zyngier 40603dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 40613dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 40623dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 40633dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 40643dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 40653dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 40663dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 40673dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 40683dfa576bSMarc Zyngier } 40693dfa576bSMarc Zyngier 40703dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 40713dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 40723dfa576bSMarc Zyngier &res->start, its_number); 40733dfa576bSMarc Zyngier return -EINVAL; 40743dfa576bSMarc Zyngier } 40753dfa576bSMarc Zyngier 40763dfa576bSMarc Zyngier return its_number; 40773dfa576bSMarc Zyngier } 40783dfa576bSMarc Zyngier 4079db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 4080db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 40814c21f3c2SMarc Zyngier { 40824c21f3c2SMarc Zyngier struct its_node *its; 40834c21f3c2SMarc Zyngier void __iomem *its_base; 40843dfa576bSMarc Zyngier u32 val, ctlr; 40853dfa576bSMarc Zyngier u64 baser, tmp, typer; 4086539d3782SShanker Donthineni struct page *page; 40874c21f3c2SMarc Zyngier int err; 40884c21f3c2SMarc Zyngier 4089db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 40904c21f3c2SMarc Zyngier if (!its_base) { 4091db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 40924c21f3c2SMarc Zyngier return -ENOMEM; 40934c21f3c2SMarc Zyngier } 40944c21f3c2SMarc Zyngier 40954c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 40964c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 4097db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 40984c21f3c2SMarc Zyngier err = -ENODEV; 40994c21f3c2SMarc Zyngier goto out_unmap; 41004c21f3c2SMarc Zyngier } 41014c21f3c2SMarc Zyngier 41024559fbb3SYun Wu err = its_force_quiescent(its_base); 41034559fbb3SYun Wu if (err) { 4104db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 41054559fbb3SYun Wu goto out_unmap; 41064559fbb3SYun Wu } 41074559fbb3SYun Wu 4108db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 41094c21f3c2SMarc Zyngier 41104c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 41114c21f3c2SMarc Zyngier if (!its) { 41124c21f3c2SMarc Zyngier err = -ENOMEM; 41134c21f3c2SMarc Zyngier goto out_unmap; 41144c21f3c2SMarc Zyngier } 41154c21f3c2SMarc Zyngier 41164c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 41179791ec7dSMarc Zyngier mutex_init(&its->dev_alloc_lock); 41184c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 41194c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 41203dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 41210dd57fedSMarc Zyngier its->typer = typer; 41224c21f3c2SMarc Zyngier its->base = its_base; 4123db40f0a7STomasz Nowicki its->phys_base = res->start; 41240dd57fedSMarc Zyngier if (is_v4(its)) { 41253dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 41263dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 41273dfa576bSMarc Zyngier if (err < 0) 41283dfa576bSMarc Zyngier goto out_free_its; 41293dfa576bSMarc Zyngier 4130debf6d02SMarc Zyngier its->list_nr = err; 4131debf6d02SMarc Zyngier 41323dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 41333dfa576bSMarc Zyngier &res->start, err); 41343dfa576bSMarc Zyngier } else { 41353dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 41363dfa576bSMarc Zyngier } 41375e516846SMarc Zyngier 41385e516846SMarc Zyngier if (is_v4_1(its)) { 41395e516846SMarc Zyngier u32 svpet = FIELD_GET(GITS_TYPER_SVPET, typer); 41405e516846SMarc Zyngier its->mpidr = readl_relaxed(its_base + GITS_MPIDR); 41415e516846SMarc Zyngier 41425e516846SMarc Zyngier pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n", 41435e516846SMarc Zyngier &res->start, its->mpidr, svpet); 41445e516846SMarc Zyngier } 41453dfa576bSMarc Zyngier } 41463dfa576bSMarc Zyngier 4147db40f0a7STomasz Nowicki its->numa_node = numa_node; 41484c21f3c2SMarc Zyngier 4149539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 41505bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 4151539d3782SShanker Donthineni if (!page) { 41524c21f3c2SMarc Zyngier err = -ENOMEM; 41534c21f3c2SMarc Zyngier goto out_free_its; 41544c21f3c2SMarc Zyngier } 4155539d3782SShanker Donthineni its->cmd_base = (void *)page_address(page); 41564c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 4157558b0165SArd Biesheuvel its->fwnode_handle = handle; 4158558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 4159558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 41604c21f3c2SMarc Zyngier 416167510ccaSRobert Richter its_enable_quirks(its); 416267510ccaSRobert Richter 41630e0b0f69SShanker Donthineni err = its_alloc_tables(its); 41644c21f3c2SMarc Zyngier if (err) 41654c21f3c2SMarc Zyngier goto out_free_cmd; 41664c21f3c2SMarc Zyngier 41674c21f3c2SMarc Zyngier err = its_alloc_collections(its); 41684c21f3c2SMarc Zyngier if (err) 41694c21f3c2SMarc Zyngier goto out_free_tables; 41704c21f3c2SMarc Zyngier 41714c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 41722fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 41734c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 41744c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 41754c21f3c2SMarc Zyngier GITS_CBASER_VALID); 41764c21f3c2SMarc Zyngier 41770968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 41780968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 41794c21f3c2SMarc Zyngier 41804ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 4181241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 4182241a386cSMarc Zyngier /* 4183241a386cSMarc Zyngier * The HW reports non-shareable, we must 4184241a386cSMarc Zyngier * remove the cacheability attributes as 4185241a386cSMarc Zyngier * well. 4186241a386cSMarc Zyngier */ 4187241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 4188241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 4189241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 41900968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 4191241a386cSMarc Zyngier } 41924c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 41934c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 41944c21f3c2SMarc Zyngier } 41954c21f3c2SMarc Zyngier 41960968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 41973dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 4198d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 41990dd57fedSMarc Zyngier if (is_v4(its)) 4200d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 4201d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 4202241a386cSMarc Zyngier 4203dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 4204dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 4205dba0bc7bSDerek Basehore 4206db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 4207d14ae5e6STomasz Nowicki if (err) 420854456db9SMarc Zyngier goto out_free_tables; 42094c21f3c2SMarc Zyngier 4210a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 42114c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 4212a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 42134c21f3c2SMarc Zyngier 42144c21f3c2SMarc Zyngier return 0; 42154c21f3c2SMarc Zyngier 42164c21f3c2SMarc Zyngier out_free_tables: 42174c21f3c2SMarc Zyngier its_free_tables(its); 42184c21f3c2SMarc Zyngier out_free_cmd: 42195bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 42204c21f3c2SMarc Zyngier out_free_its: 42214c21f3c2SMarc Zyngier kfree(its); 42224c21f3c2SMarc Zyngier out_unmap: 42234c21f3c2SMarc Zyngier iounmap(its_base); 4224db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 42254c21f3c2SMarc Zyngier return err; 42264c21f3c2SMarc Zyngier } 42274c21f3c2SMarc Zyngier 42284c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 42294c21f3c2SMarc Zyngier { 4230589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 42314c21f3c2SMarc Zyngier } 42324c21f3c2SMarc Zyngier 42336eb486b6SShanker Donthineni static int redist_disable_lpis(void) 42344c21f3c2SMarc Zyngier { 42356eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 42366eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 42376eb486b6SShanker Donthineni u64 val; 42386eb486b6SShanker Donthineni 42394c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 42404c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 42414c21f3c2SMarc Zyngier return -ENXIO; 42424c21f3c2SMarc Zyngier } 42436eb486b6SShanker Donthineni 42446eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 42456eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 42466eb486b6SShanker Donthineni return 0; 42476eb486b6SShanker Donthineni 424811e37d35SMarc Zyngier /* 424911e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 425011e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 425111e37d35SMarc Zyngier * configured and all is well in the world. 4252c440a9d9SMarc Zyngier * 4253c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 425411e37d35SMarc Zyngier */ 4255c440a9d9SMarc Zyngier if (gic_data_rdist()->lpi_enabled || 4256c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 425711e37d35SMarc Zyngier return 0; 425811e37d35SMarc Zyngier 425911e37d35SMarc Zyngier /* 426011e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 426111e37d35SMarc Zyngier */ 426211e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 42636eb486b6SShanker Donthineni smp_processor_id()); 42646eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 42656eb486b6SShanker Donthineni 42666eb486b6SShanker Donthineni /* Disable LPIs */ 42676eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 42686eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 42696eb486b6SShanker Donthineni 42706eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 42716eb486b6SShanker Donthineni dsb(sy); 42726eb486b6SShanker Donthineni 42736eb486b6SShanker Donthineni /* 42746eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 42756eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 42766eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 42776eb486b6SShanker Donthineni */ 42786eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 42796eb486b6SShanker Donthineni if (!timeout) { 42806eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 42816eb486b6SShanker Donthineni smp_processor_id()); 42826eb486b6SShanker Donthineni return -ETIMEDOUT; 42836eb486b6SShanker Donthineni } 42846eb486b6SShanker Donthineni udelay(1); 42856eb486b6SShanker Donthineni timeout--; 42866eb486b6SShanker Donthineni } 42876eb486b6SShanker Donthineni 42886eb486b6SShanker Donthineni /* 42896eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 42906eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 42916eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 42926eb486b6SShanker Donthineni */ 42936eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 42946eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 42956eb486b6SShanker Donthineni return -EBUSY; 42966eb486b6SShanker Donthineni } 42976eb486b6SShanker Donthineni 42986eb486b6SShanker Donthineni return 0; 42996eb486b6SShanker Donthineni } 43006eb486b6SShanker Donthineni 43016eb486b6SShanker Donthineni int its_cpu_init(void) 43026eb486b6SShanker Donthineni { 43036eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 43046eb486b6SShanker Donthineni int ret; 43056eb486b6SShanker Donthineni 43066eb486b6SShanker Donthineni ret = redist_disable_lpis(); 43076eb486b6SShanker Donthineni if (ret) 43086eb486b6SShanker Donthineni return ret; 43096eb486b6SShanker Donthineni 43104c21f3c2SMarc Zyngier its_cpu_init_lpis(); 4311920181ceSDerek Basehore its_cpu_init_collections(); 43124c21f3c2SMarc Zyngier } 43134c21f3c2SMarc Zyngier 43144c21f3c2SMarc Zyngier return 0; 43154c21f3c2SMarc Zyngier } 43164c21f3c2SMarc Zyngier 4317935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 43184c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 43194c21f3c2SMarc Zyngier {}, 43204c21f3c2SMarc Zyngier }; 43214c21f3c2SMarc Zyngier 4322db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 43234c21f3c2SMarc Zyngier { 43244c21f3c2SMarc Zyngier struct device_node *np; 4325db40f0a7STomasz Nowicki struct resource res; 43264c21f3c2SMarc Zyngier 43274c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 43284c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 432995a25625SStephen Boyd if (!of_device_is_available(np)) 433095a25625SStephen Boyd continue; 4331d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 4332e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 4333e81f54c6SRob Herring np); 4334d14ae5e6STomasz Nowicki continue; 4335d14ae5e6STomasz Nowicki } 4336d14ae5e6STomasz Nowicki 4337db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 4338e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 4339db40f0a7STomasz Nowicki continue; 43404c21f3c2SMarc Zyngier } 43414c21f3c2SMarc Zyngier 4342db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 4343db40f0a7STomasz Nowicki } 4344db40f0a7STomasz Nowicki return 0; 4345db40f0a7STomasz Nowicki } 4346db40f0a7STomasz Nowicki 43473f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 43483f010cf1STomasz Nowicki 43493f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 43503f010cf1STomasz Nowicki 4351d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 4352dbd2b826SGanapatrao Kulkarni struct its_srat_map { 4353dbd2b826SGanapatrao Kulkarni /* numa node id */ 4354dbd2b826SGanapatrao Kulkarni u32 numa_node; 4355dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 4356dbd2b826SGanapatrao Kulkarni u32 its_id; 4357dbd2b826SGanapatrao Kulkarni }; 4358dbd2b826SGanapatrao Kulkarni 4359fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 4360dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 4361dbd2b826SGanapatrao Kulkarni 4362dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 4363dbd2b826SGanapatrao Kulkarni { 4364dbd2b826SGanapatrao Kulkarni int i; 4365dbd2b826SGanapatrao Kulkarni 4366dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 4367dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 4368dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 4369dbd2b826SGanapatrao Kulkarni } 4370dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 4371dbd2b826SGanapatrao Kulkarni } 4372dbd2b826SGanapatrao Kulkarni 437360574d1eSKeith Busch static int __init gic_acpi_match_srat_its(union acpi_subtable_headers *header, 4374fdf6e7a8SHanjun Guo const unsigned long end) 4375fdf6e7a8SHanjun Guo { 4376fdf6e7a8SHanjun Guo return 0; 4377fdf6e7a8SHanjun Guo } 4378fdf6e7a8SHanjun Guo 437960574d1eSKeith Busch static int __init gic_acpi_parse_srat_its(union acpi_subtable_headers *header, 4380dbd2b826SGanapatrao Kulkarni const unsigned long end) 4381dbd2b826SGanapatrao Kulkarni { 4382dbd2b826SGanapatrao Kulkarni int node; 4383dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 4384dbd2b826SGanapatrao Kulkarni 4385dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 4386dbd2b826SGanapatrao Kulkarni if (!its_affinity) 4387dbd2b826SGanapatrao Kulkarni return -EINVAL; 4388dbd2b826SGanapatrao Kulkarni 4389dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 4390dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 4391dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 4392dbd2b826SGanapatrao Kulkarni return -EINVAL; 4393dbd2b826SGanapatrao Kulkarni } 4394dbd2b826SGanapatrao Kulkarni 4395dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 4396dbd2b826SGanapatrao Kulkarni 4397dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 4398dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 4399dbd2b826SGanapatrao Kulkarni return 0; 4400dbd2b826SGanapatrao Kulkarni } 4401dbd2b826SGanapatrao Kulkarni 4402dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 4403dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 4404dbd2b826SGanapatrao Kulkarni its_in_srat++; 4405dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 4406dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 4407dbd2b826SGanapatrao Kulkarni 4408dbd2b826SGanapatrao Kulkarni return 0; 4409dbd2b826SGanapatrao Kulkarni } 4410dbd2b826SGanapatrao Kulkarni 4411dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 4412dbd2b826SGanapatrao Kulkarni { 4413fdf6e7a8SHanjun Guo int count; 4414fdf6e7a8SHanjun Guo 4415fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 4416fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 4417fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 4418fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 4419fdf6e7a8SHanjun Guo if (count <= 0) 4420fdf6e7a8SHanjun Guo return; 4421fdf6e7a8SHanjun Guo 44226da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 4423fdf6e7a8SHanjun Guo GFP_KERNEL); 4424fdf6e7a8SHanjun Guo if (!its_srat_maps) { 4425fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 4426fdf6e7a8SHanjun Guo return; 4427fdf6e7a8SHanjun Guo } 4428fdf6e7a8SHanjun Guo 4429dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 4430dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 4431dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 4432dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 4433dbd2b826SGanapatrao Kulkarni } 4434fdf6e7a8SHanjun Guo 4435fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 4436fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 4437fdf6e7a8SHanjun Guo { 4438fdf6e7a8SHanjun Guo kfree(its_srat_maps); 4439fdf6e7a8SHanjun Guo } 4440dbd2b826SGanapatrao Kulkarni #else 4441dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 4442dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 4443fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 4444dbd2b826SGanapatrao Kulkarni #endif 4445dbd2b826SGanapatrao Kulkarni 444660574d1eSKeith Busch static int __init gic_acpi_parse_madt_its(union acpi_subtable_headers *header, 44473f010cf1STomasz Nowicki const unsigned long end) 44483f010cf1STomasz Nowicki { 44493f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 44503f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 44513f010cf1STomasz Nowicki struct resource res; 44523f010cf1STomasz Nowicki int err; 44533f010cf1STomasz Nowicki 44543f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 44553f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 44563f010cf1STomasz Nowicki res.start = its_entry->base_address; 44573f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 44583f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 44593f010cf1STomasz Nowicki 44605778cc77SMarc Zyngier dom_handle = irq_domain_alloc_fwnode(&res.start); 44613f010cf1STomasz Nowicki if (!dom_handle) { 44623f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 44633f010cf1STomasz Nowicki &res.start); 44643f010cf1STomasz Nowicki return -ENOMEM; 44653f010cf1STomasz Nowicki } 44663f010cf1STomasz Nowicki 44678b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 44688b4282e6SShameer Kolothum dom_handle); 44693f010cf1STomasz Nowicki if (err) { 44703f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 44713f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 44723f010cf1STomasz Nowicki goto dom_err; 44733f010cf1STomasz Nowicki } 44743f010cf1STomasz Nowicki 4475dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 4476dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 44773f010cf1STomasz Nowicki if (!err) 44783f010cf1STomasz Nowicki return 0; 44793f010cf1STomasz Nowicki 44803f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 44813f010cf1STomasz Nowicki dom_err: 44823f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 44833f010cf1STomasz Nowicki return err; 44843f010cf1STomasz Nowicki } 44853f010cf1STomasz Nowicki 44863f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 44873f010cf1STomasz Nowicki { 4488dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 44893f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 44903f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 4491fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 44923f010cf1STomasz Nowicki } 44933f010cf1STomasz Nowicki #else 44943f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 44953f010cf1STomasz Nowicki #endif 44963f010cf1STomasz Nowicki 4497db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 4498db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 4499db40f0a7STomasz Nowicki { 4500db40f0a7STomasz Nowicki struct device_node *of_node; 45018fff27aeSMarc Zyngier struct its_node *its; 45028fff27aeSMarc Zyngier bool has_v4 = false; 45038fff27aeSMarc Zyngier int err; 4504db40f0a7STomasz Nowicki 45055e516846SMarc Zyngier gic_rdists = rdists; 45065e516846SMarc Zyngier 4507db40f0a7STomasz Nowicki its_parent = parent_domain; 4508db40f0a7STomasz Nowicki of_node = to_of_node(handle); 4509db40f0a7STomasz Nowicki if (of_node) 4510db40f0a7STomasz Nowicki its_of_probe(of_node); 4511db40f0a7STomasz Nowicki else 45123f010cf1STomasz Nowicki its_acpi_probe(); 4513db40f0a7STomasz Nowicki 45144c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 45154c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 45164c21f3c2SMarc Zyngier return -ENXIO; 45174c21f3c2SMarc Zyngier } 45184c21f3c2SMarc Zyngier 451911e37d35SMarc Zyngier err = allocate_lpi_tables(); 45208fff27aeSMarc Zyngier if (err) 45218fff27aeSMarc Zyngier return err; 45228fff27aeSMarc Zyngier 45238fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 45240dd57fedSMarc Zyngier has_v4 |= is_v4(its); 45258fff27aeSMarc Zyngier 45268fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 45273d63cb53SMarc Zyngier if (its_init_vpe_domain() || 45283d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 45298fff27aeSMarc Zyngier rdists->has_vlpis = false; 45308fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 45318fff27aeSMarc Zyngier } 45328fff27aeSMarc Zyngier } 45338fff27aeSMarc Zyngier 4534dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 4535dba0bc7bSDerek Basehore 45368fff27aeSMarc Zyngier return 0; 45374c21f3c2SMarc Zyngier } 4538