1cc2d3216SMarc Zyngier /* 2d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 183f010cf1STomasz Nowicki #include <linux/acpi.h> 198d3554b8SHanjun Guo #include <linux/acpi_iort.h> 20cc2d3216SMarc Zyngier #include <linux/bitmap.h> 21cc2d3216SMarc Zyngier #include <linux/cpu.h> 22c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 23cc2d3216SMarc Zyngier #include <linux/delay.h> 2444bb7e24SRobin Murphy #include <linux/dma-iommu.h> 253fb68faeSMarc Zyngier #include <linux/efi.h> 26cc2d3216SMarc Zyngier #include <linux/interrupt.h> 273f010cf1STomasz Nowicki #include <linux/irqdomain.h> 28880cb3cdSMarc Zyngier #include <linux/list.h> 29880cb3cdSMarc Zyngier #include <linux/list_sort.h> 30cc2d3216SMarc Zyngier #include <linux/log2.h> 31*5e2c9f9aSMarc Zyngier #include <linux/memblock.h> 32cc2d3216SMarc Zyngier #include <linux/mm.h> 33cc2d3216SMarc Zyngier #include <linux/msi.h> 34cc2d3216SMarc Zyngier #include <linux/of.h> 35cc2d3216SMarc Zyngier #include <linux/of_address.h> 36cc2d3216SMarc Zyngier #include <linux/of_irq.h> 37cc2d3216SMarc Zyngier #include <linux/of_pci.h> 38cc2d3216SMarc Zyngier #include <linux/of_platform.h> 39cc2d3216SMarc Zyngier #include <linux/percpu.h> 40cc2d3216SMarc Zyngier #include <linux/slab.h> 41dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 42cc2d3216SMarc Zyngier 4341a83e06SJoel Porquet #include <linux/irqchip.h> 44cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 45c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 46cc2d3216SMarc Zyngier 47cc2d3216SMarc Zyngier #include <asm/cputype.h> 48cc2d3216SMarc Zyngier #include <asm/exception.h> 49cc2d3216SMarc Zyngier 5067510ccaSRobert Richter #include "irq-gic-common.h" 5167510ccaSRobert Richter 5294100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 5394100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 54fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 55dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 56cc2d3216SMarc Zyngier 57c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 58c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 59c48ed51cSMarc Zyngier 60a13b0404SMarc Zyngier static u32 lpi_id_bits; 61a13b0404SMarc Zyngier 62a13b0404SMarc Zyngier /* 63a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 64a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 65a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 66a13b0404SMarc Zyngier */ 67a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 68a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 69a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 70a13b0404SMarc Zyngier 71a13b0404SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 72a13b0404SMarc Zyngier 73cc2d3216SMarc Zyngier /* 74cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 75cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 76cc2d3216SMarc Zyngier * CPU. 77cc2d3216SMarc Zyngier */ 78cc2d3216SMarc Zyngier struct its_collection { 79cc2d3216SMarc Zyngier u64 target_address; 80cc2d3216SMarc Zyngier u16 col_id; 81cc2d3216SMarc Zyngier }; 82cc2d3216SMarc Zyngier 83cc2d3216SMarc Zyngier /* 849347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 859347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 86466b7d16SShanker Donthineni */ 87466b7d16SShanker Donthineni struct its_baser { 88466b7d16SShanker Donthineni void *base; 89466b7d16SShanker Donthineni u64 val; 90466b7d16SShanker Donthineni u32 order; 919347359aSShanker Donthineni u32 psz; 92466b7d16SShanker Donthineni }; 93466b7d16SShanker Donthineni 94558b0165SArd Biesheuvel struct its_device; 95558b0165SArd Biesheuvel 96466b7d16SShanker Donthineni /* 97cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 98841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 99841514abSMarc Zyngier * list of devices writing to it. 100cc2d3216SMarc Zyngier */ 101cc2d3216SMarc Zyngier struct its_node { 102cc2d3216SMarc Zyngier raw_spinlock_t lock; 103cc2d3216SMarc Zyngier struct list_head entry; 104cc2d3216SMarc Zyngier void __iomem *base; 105db40f0a7STomasz Nowicki phys_addr_t phys_base; 106cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 107cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 108466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 109cc2d3216SMarc Zyngier struct its_collection *collections; 110558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 111558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 112dba0bc7bSDerek Basehore u64 cbaser_save; 113dba0bc7bSDerek Basehore u32 ctlr_save; 114cc2d3216SMarc Zyngier struct list_head its_device_list; 115cc2d3216SMarc Zyngier u64 flags; 116debf6d02SMarc Zyngier unsigned long list_nr; 117cc2d3216SMarc Zyngier u32 ite_size; 118466b7d16SShanker Donthineni u32 device_ids; 119fbf8f40eSGanapatrao Kulkarni int numa_node; 120558b0165SArd Biesheuvel unsigned int msi_domain_flags; 121558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1223dfa576bSMarc Zyngier bool is_v4; 1235c9a882eSMarc Zyngier int vlpi_redist_offset; 124cc2d3216SMarc Zyngier }; 125cc2d3216SMarc Zyngier 126cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 127cc2d3216SMarc Zyngier 12832bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 12932bd44dcSShanker Donthineni #define ITS_MAX_VPEID_BITS (16) 13032bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 13132bd44dcSShanker Donthineni 1322eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1332eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1342eca0d6cSShanker Donthineni 135591e5becSMarc Zyngier struct event_lpi_map { 136591e5becSMarc Zyngier unsigned long *lpi_map; 137591e5becSMarc Zyngier u16 *col_map; 138591e5becSMarc Zyngier irq_hw_number_t lpi_base; 139591e5becSMarc Zyngier int nr_lpis; 140d011e4e6SMarc Zyngier struct mutex vlpi_lock; 141d011e4e6SMarc Zyngier struct its_vm *vm; 142d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 143d011e4e6SMarc Zyngier int nr_vlpis; 144591e5becSMarc Zyngier }; 145591e5becSMarc Zyngier 146cc2d3216SMarc Zyngier /* 147d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 148d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 149d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 150d011e4e6SMarc Zyngier * indicates which one. 151cc2d3216SMarc Zyngier */ 152cc2d3216SMarc Zyngier struct its_device { 153cc2d3216SMarc Zyngier struct list_head entry; 154cc2d3216SMarc Zyngier struct its_node *its; 155591e5becSMarc Zyngier struct event_lpi_map event_map; 156cc2d3216SMarc Zyngier void *itt; 157cc2d3216SMarc Zyngier u32 nr_ites; 158cc2d3216SMarc Zyngier u32 device_id; 159cc2d3216SMarc Zyngier }; 160cc2d3216SMarc Zyngier 16120b3d54eSMarc Zyngier static struct { 16220b3d54eSMarc Zyngier raw_spinlock_t lock; 16320b3d54eSMarc Zyngier struct its_device *dev; 16420b3d54eSMarc Zyngier struct its_vpe **vpes; 16520b3d54eSMarc Zyngier int next_victim; 16620b3d54eSMarc Zyngier } vpe_proxy; 16720b3d54eSMarc Zyngier 1681ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 169a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1701ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 171db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1721ac19ca6SMarc Zyngier 1733dfa576bSMarc Zyngier static unsigned long its_list_map; 1743171a47aSMarc Zyngier static u16 vmovp_seq_num; 1753171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1763171a47aSMarc Zyngier 1777d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1783dfa576bSMarc Zyngier 1791ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 18011e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1811ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 182e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1831ac19ca6SMarc Zyngier 184591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 185591e5becSMarc Zyngier u32 event) 186591e5becSMarc Zyngier { 187591e5becSMarc Zyngier struct its_node *its = its_dev->its; 188591e5becSMarc Zyngier 189591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 190591e5becSMarc Zyngier } 191591e5becSMarc Zyngier 19283559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 19383559b47SMarc Zyngier { 19483559b47SMarc Zyngier if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(0, 15))) 19583559b47SMarc Zyngier return NULL; 19683559b47SMarc Zyngier 19783559b47SMarc Zyngier return col; 19883559b47SMarc Zyngier } 19983559b47SMarc Zyngier 200205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 201205e065dSMarc Zyngier { 202205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 203205e065dSMarc Zyngier return vpe; 204205e065dSMarc Zyngier 205205e065dSMarc Zyngier return NULL; 206205e065dSMarc Zyngier } 207205e065dSMarc Zyngier 208cc2d3216SMarc Zyngier /* 209cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 210cc2d3216SMarc Zyngier * block. 211cc2d3216SMarc Zyngier */ 212cc2d3216SMarc Zyngier struct its_cmd_desc { 213cc2d3216SMarc Zyngier union { 214cc2d3216SMarc Zyngier struct { 215cc2d3216SMarc Zyngier struct its_device *dev; 216cc2d3216SMarc Zyngier u32 event_id; 217cc2d3216SMarc Zyngier } its_inv_cmd; 218cc2d3216SMarc Zyngier 219cc2d3216SMarc Zyngier struct { 220cc2d3216SMarc Zyngier struct its_device *dev; 221cc2d3216SMarc Zyngier u32 event_id; 2228d85dcedSMarc Zyngier } its_clear_cmd; 2238d85dcedSMarc Zyngier 2248d85dcedSMarc Zyngier struct { 2258d85dcedSMarc Zyngier struct its_device *dev; 2268d85dcedSMarc Zyngier u32 event_id; 227cc2d3216SMarc Zyngier } its_int_cmd; 228cc2d3216SMarc Zyngier 229cc2d3216SMarc Zyngier struct { 230cc2d3216SMarc Zyngier struct its_device *dev; 231cc2d3216SMarc Zyngier int valid; 232cc2d3216SMarc Zyngier } its_mapd_cmd; 233cc2d3216SMarc Zyngier 234cc2d3216SMarc Zyngier struct { 235cc2d3216SMarc Zyngier struct its_collection *col; 236cc2d3216SMarc Zyngier int valid; 237cc2d3216SMarc Zyngier } its_mapc_cmd; 238cc2d3216SMarc Zyngier 239cc2d3216SMarc Zyngier struct { 240cc2d3216SMarc Zyngier struct its_device *dev; 241cc2d3216SMarc Zyngier u32 phys_id; 242cc2d3216SMarc Zyngier u32 event_id; 2436a25ad3aSMarc Zyngier } its_mapti_cmd; 244cc2d3216SMarc Zyngier 245cc2d3216SMarc Zyngier struct { 246cc2d3216SMarc Zyngier struct its_device *dev; 247cc2d3216SMarc Zyngier struct its_collection *col; 248591e5becSMarc Zyngier u32 event_id; 249cc2d3216SMarc Zyngier } its_movi_cmd; 250cc2d3216SMarc Zyngier 251cc2d3216SMarc Zyngier struct { 252cc2d3216SMarc Zyngier struct its_device *dev; 253cc2d3216SMarc Zyngier u32 event_id; 254cc2d3216SMarc Zyngier } its_discard_cmd; 255cc2d3216SMarc Zyngier 256cc2d3216SMarc Zyngier struct { 257cc2d3216SMarc Zyngier struct its_collection *col; 258cc2d3216SMarc Zyngier } its_invall_cmd; 259d011e4e6SMarc Zyngier 260d011e4e6SMarc Zyngier struct { 261d011e4e6SMarc Zyngier struct its_vpe *vpe; 262eb78192bSMarc Zyngier } its_vinvall_cmd; 263eb78192bSMarc Zyngier 264eb78192bSMarc Zyngier struct { 265eb78192bSMarc Zyngier struct its_vpe *vpe; 266eb78192bSMarc Zyngier struct its_collection *col; 267eb78192bSMarc Zyngier bool valid; 268eb78192bSMarc Zyngier } its_vmapp_cmd; 269eb78192bSMarc Zyngier 270eb78192bSMarc Zyngier struct { 271eb78192bSMarc Zyngier struct its_vpe *vpe; 272d011e4e6SMarc Zyngier struct its_device *dev; 273d011e4e6SMarc Zyngier u32 virt_id; 274d011e4e6SMarc Zyngier u32 event_id; 275d011e4e6SMarc Zyngier bool db_enabled; 276d011e4e6SMarc Zyngier } its_vmapti_cmd; 277d011e4e6SMarc Zyngier 278d011e4e6SMarc Zyngier struct { 279d011e4e6SMarc Zyngier struct its_vpe *vpe; 280d011e4e6SMarc Zyngier struct its_device *dev; 281d011e4e6SMarc Zyngier u32 event_id; 282d011e4e6SMarc Zyngier bool db_enabled; 283d011e4e6SMarc Zyngier } its_vmovi_cmd; 2843171a47aSMarc Zyngier 2853171a47aSMarc Zyngier struct { 2863171a47aSMarc Zyngier struct its_vpe *vpe; 2873171a47aSMarc Zyngier struct its_collection *col; 2883171a47aSMarc Zyngier u16 seq_num; 2893171a47aSMarc Zyngier u16 its_list; 2903171a47aSMarc Zyngier } its_vmovp_cmd; 291cc2d3216SMarc Zyngier }; 292cc2d3216SMarc Zyngier }; 293cc2d3216SMarc Zyngier 294cc2d3216SMarc Zyngier /* 295cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 296cc2d3216SMarc Zyngier */ 297cc2d3216SMarc Zyngier struct its_cmd_block { 298cc2d3216SMarc Zyngier u64 raw_cmd[4]; 299cc2d3216SMarc Zyngier }; 300cc2d3216SMarc Zyngier 301cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 302cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 303cc2d3216SMarc Zyngier 30467047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 30567047f90SMarc Zyngier struct its_cmd_block *, 306cc2d3216SMarc Zyngier struct its_cmd_desc *); 307cc2d3216SMarc Zyngier 30867047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 30967047f90SMarc Zyngier struct its_cmd_block *, 310d011e4e6SMarc Zyngier struct its_cmd_desc *); 311d011e4e6SMarc Zyngier 3124d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 3134d36f136SMarc Zyngier { 3144d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 3154d36f136SMarc Zyngier *raw_cmd &= ~mask; 3164d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 3174d36f136SMarc Zyngier } 3184d36f136SMarc Zyngier 319cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 320cc2d3216SMarc Zyngier { 3214d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 322cc2d3216SMarc Zyngier } 323cc2d3216SMarc Zyngier 324cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 325cc2d3216SMarc Zyngier { 3264d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 327cc2d3216SMarc Zyngier } 328cc2d3216SMarc Zyngier 329cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 330cc2d3216SMarc Zyngier { 3314d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 332cc2d3216SMarc Zyngier } 333cc2d3216SMarc Zyngier 334cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 335cc2d3216SMarc Zyngier { 3364d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 337cc2d3216SMarc Zyngier } 338cc2d3216SMarc Zyngier 339cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 340cc2d3216SMarc Zyngier { 3414d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 342cc2d3216SMarc Zyngier } 343cc2d3216SMarc Zyngier 344cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 345cc2d3216SMarc Zyngier { 34630ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 347cc2d3216SMarc Zyngier } 348cc2d3216SMarc Zyngier 349cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 350cc2d3216SMarc Zyngier { 3514d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 352cc2d3216SMarc Zyngier } 353cc2d3216SMarc Zyngier 354cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 355cc2d3216SMarc Zyngier { 35630ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 357cc2d3216SMarc Zyngier } 358cc2d3216SMarc Zyngier 359cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 360cc2d3216SMarc Zyngier { 3614d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 362cc2d3216SMarc Zyngier } 363cc2d3216SMarc Zyngier 364d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 365d011e4e6SMarc Zyngier { 366d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 367d011e4e6SMarc Zyngier } 368d011e4e6SMarc Zyngier 369d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 370d011e4e6SMarc Zyngier { 371d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 372d011e4e6SMarc Zyngier } 373d011e4e6SMarc Zyngier 374d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 375d011e4e6SMarc Zyngier { 376d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 377d011e4e6SMarc Zyngier } 378d011e4e6SMarc Zyngier 379d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 380d011e4e6SMarc Zyngier { 381d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 382d011e4e6SMarc Zyngier } 383d011e4e6SMarc Zyngier 3843171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 3853171a47aSMarc Zyngier { 3863171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 3873171a47aSMarc Zyngier } 3883171a47aSMarc Zyngier 3893171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 3903171a47aSMarc Zyngier { 3913171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 3923171a47aSMarc Zyngier } 3933171a47aSMarc Zyngier 394eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 395eb78192bSMarc Zyngier { 39630ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 397eb78192bSMarc Zyngier } 398eb78192bSMarc Zyngier 399eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 400eb78192bSMarc Zyngier { 401eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 402eb78192bSMarc Zyngier } 403eb78192bSMarc Zyngier 404cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 405cc2d3216SMarc Zyngier { 406cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 407cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 408cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 409cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 410cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 411cc2d3216SMarc Zyngier } 412cc2d3216SMarc Zyngier 41367047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 41467047f90SMarc Zyngier struct its_cmd_block *cmd, 415cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 416cc2d3216SMarc Zyngier { 417cc2d3216SMarc Zyngier unsigned long itt_addr; 418c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 419cc2d3216SMarc Zyngier 420cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 421cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 422cc2d3216SMarc Zyngier 423cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 424cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 425cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 426cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 427cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 428cc2d3216SMarc Zyngier 429cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 430cc2d3216SMarc Zyngier 431591e5becSMarc Zyngier return NULL; 432cc2d3216SMarc Zyngier } 433cc2d3216SMarc Zyngier 43467047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 43567047f90SMarc Zyngier struct its_cmd_block *cmd, 436cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 437cc2d3216SMarc Zyngier { 438cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 439cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 440cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 441cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 442cc2d3216SMarc Zyngier 443cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 444cc2d3216SMarc Zyngier 445cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 446cc2d3216SMarc Zyngier } 447cc2d3216SMarc Zyngier 44867047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 44967047f90SMarc Zyngier struct its_cmd_block *cmd, 450cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 451cc2d3216SMarc Zyngier { 452591e5becSMarc Zyngier struct its_collection *col; 453591e5becSMarc Zyngier 4546a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 4556a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 456591e5becSMarc Zyngier 4576a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 4586a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 4596a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 4606a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 461591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 462cc2d3216SMarc Zyngier 463cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 464cc2d3216SMarc Zyngier 46583559b47SMarc Zyngier return valid_col(col); 466cc2d3216SMarc Zyngier } 467cc2d3216SMarc Zyngier 46867047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 46967047f90SMarc Zyngier struct its_cmd_block *cmd, 470cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 471cc2d3216SMarc Zyngier { 472591e5becSMarc Zyngier struct its_collection *col; 473591e5becSMarc Zyngier 474591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 475591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 476591e5becSMarc Zyngier 477cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 478cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 479591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 480cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 481cc2d3216SMarc Zyngier 482cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 483cc2d3216SMarc Zyngier 48483559b47SMarc Zyngier return valid_col(col); 485cc2d3216SMarc Zyngier } 486cc2d3216SMarc Zyngier 48767047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 48867047f90SMarc Zyngier struct its_cmd_block *cmd, 489cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 490cc2d3216SMarc Zyngier { 491591e5becSMarc Zyngier struct its_collection *col; 492591e5becSMarc Zyngier 493591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 494591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 495591e5becSMarc Zyngier 496cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 497cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 498cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 499cc2d3216SMarc Zyngier 500cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 501cc2d3216SMarc Zyngier 50283559b47SMarc Zyngier return valid_col(col); 503cc2d3216SMarc Zyngier } 504cc2d3216SMarc Zyngier 50567047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 50667047f90SMarc Zyngier struct its_cmd_block *cmd, 507cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 508cc2d3216SMarc Zyngier { 509591e5becSMarc Zyngier struct its_collection *col; 510591e5becSMarc Zyngier 511591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 512591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 513591e5becSMarc Zyngier 514cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 515cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 516cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 517cc2d3216SMarc Zyngier 518cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 519cc2d3216SMarc Zyngier 52083559b47SMarc Zyngier return valid_col(col); 521cc2d3216SMarc Zyngier } 522cc2d3216SMarc Zyngier 52367047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 52467047f90SMarc Zyngier struct its_cmd_block *cmd, 5258d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5268d85dcedSMarc Zyngier { 5278d85dcedSMarc Zyngier struct its_collection *col; 5288d85dcedSMarc Zyngier 5298d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 5308d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 5318d85dcedSMarc Zyngier 5328d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 5338d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 5348d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 5358d85dcedSMarc Zyngier 5368d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5378d85dcedSMarc Zyngier 53883559b47SMarc Zyngier return valid_col(col); 5398d85dcedSMarc Zyngier } 5408d85dcedSMarc Zyngier 54167047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 54267047f90SMarc Zyngier struct its_cmd_block *cmd, 5438d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5448d85dcedSMarc Zyngier { 5458d85dcedSMarc Zyngier struct its_collection *col; 5468d85dcedSMarc Zyngier 5478d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 5488d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 5498d85dcedSMarc Zyngier 5508d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 5518d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 5528d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 5538d85dcedSMarc Zyngier 5548d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5558d85dcedSMarc Zyngier 55683559b47SMarc Zyngier return valid_col(col); 5578d85dcedSMarc Zyngier } 5588d85dcedSMarc Zyngier 55967047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 56067047f90SMarc Zyngier struct its_cmd_block *cmd, 561cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 562cc2d3216SMarc Zyngier { 563cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 564cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 565cc2d3216SMarc Zyngier 566cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 567cc2d3216SMarc Zyngier 568cc2d3216SMarc Zyngier return NULL; 569cc2d3216SMarc Zyngier } 570cc2d3216SMarc Zyngier 57167047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 57267047f90SMarc Zyngier struct its_cmd_block *cmd, 573eb78192bSMarc Zyngier struct its_cmd_desc *desc) 574eb78192bSMarc Zyngier { 575eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 576eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 577eb78192bSMarc Zyngier 578eb78192bSMarc Zyngier its_fixup_cmd(cmd); 579eb78192bSMarc Zyngier 580205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 581eb78192bSMarc Zyngier } 582eb78192bSMarc Zyngier 58367047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 58467047f90SMarc Zyngier struct its_cmd_block *cmd, 585eb78192bSMarc Zyngier struct its_cmd_desc *desc) 586eb78192bSMarc Zyngier { 587eb78192bSMarc Zyngier unsigned long vpt_addr; 5885c9a882eSMarc Zyngier u64 target; 589eb78192bSMarc Zyngier 590eb78192bSMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 5915c9a882eSMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 592eb78192bSMarc Zyngier 593eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 594eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 595eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 5965c9a882eSMarc Zyngier its_encode_target(cmd, target); 597eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 598eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 599eb78192bSMarc Zyngier 600eb78192bSMarc Zyngier its_fixup_cmd(cmd); 601eb78192bSMarc Zyngier 602205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 603eb78192bSMarc Zyngier } 604eb78192bSMarc Zyngier 60567047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 60667047f90SMarc Zyngier struct its_cmd_block *cmd, 607d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 608d011e4e6SMarc Zyngier { 609d011e4e6SMarc Zyngier u32 db; 610d011e4e6SMarc Zyngier 611d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 612d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 613d011e4e6SMarc Zyngier else 614d011e4e6SMarc Zyngier db = 1023; 615d011e4e6SMarc Zyngier 616d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 617d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 618d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 619d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 620d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 621d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 622d011e4e6SMarc Zyngier 623d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 624d011e4e6SMarc Zyngier 625205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 626d011e4e6SMarc Zyngier } 627d011e4e6SMarc Zyngier 62867047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 62967047f90SMarc Zyngier struct its_cmd_block *cmd, 630d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 631d011e4e6SMarc Zyngier { 632d011e4e6SMarc Zyngier u32 db; 633d011e4e6SMarc Zyngier 634d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 635d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 636d011e4e6SMarc Zyngier else 637d011e4e6SMarc Zyngier db = 1023; 638d011e4e6SMarc Zyngier 639d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 640d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 641d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 642d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 643d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 644d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 645d011e4e6SMarc Zyngier 646d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 647d011e4e6SMarc Zyngier 648205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 649d011e4e6SMarc Zyngier } 650d011e4e6SMarc Zyngier 65167047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 65267047f90SMarc Zyngier struct its_cmd_block *cmd, 6533171a47aSMarc Zyngier struct its_cmd_desc *desc) 6543171a47aSMarc Zyngier { 6555c9a882eSMarc Zyngier u64 target; 6565c9a882eSMarc Zyngier 6575c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 6583171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 6593171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 6603171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 6613171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 6625c9a882eSMarc Zyngier its_encode_target(cmd, target); 6633171a47aSMarc Zyngier 6643171a47aSMarc Zyngier its_fixup_cmd(cmd); 6653171a47aSMarc Zyngier 666205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 6673171a47aSMarc Zyngier } 6683171a47aSMarc Zyngier 669cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 670cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 671cc2d3216SMarc Zyngier { 672cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 673cc2d3216SMarc Zyngier } 674cc2d3216SMarc Zyngier 675cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 676cc2d3216SMarc Zyngier { 677cc2d3216SMarc Zyngier int widx; 678cc2d3216SMarc Zyngier int ridx; 679cc2d3216SMarc Zyngier 680cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 681cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 682cc2d3216SMarc Zyngier 683cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 684cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 685cc2d3216SMarc Zyngier return 1; 686cc2d3216SMarc Zyngier 687cc2d3216SMarc Zyngier return 0; 688cc2d3216SMarc Zyngier } 689cc2d3216SMarc Zyngier 690cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 691cc2d3216SMarc Zyngier { 692cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 693cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 694cc2d3216SMarc Zyngier 695cc2d3216SMarc Zyngier while (its_queue_full(its)) { 696cc2d3216SMarc Zyngier count--; 697cc2d3216SMarc Zyngier if (!count) { 698cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 699cc2d3216SMarc Zyngier return NULL; 700cc2d3216SMarc Zyngier } 701cc2d3216SMarc Zyngier cpu_relax(); 702cc2d3216SMarc Zyngier udelay(1); 703cc2d3216SMarc Zyngier } 704cc2d3216SMarc Zyngier 705cc2d3216SMarc Zyngier cmd = its->cmd_write++; 706cc2d3216SMarc Zyngier 707cc2d3216SMarc Zyngier /* Handle queue wrapping */ 708cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 709cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 710cc2d3216SMarc Zyngier 71134d677a9SMarc Zyngier /* Clear command */ 71234d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 71334d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 71434d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 71534d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 71634d677a9SMarc Zyngier 717cc2d3216SMarc Zyngier return cmd; 718cc2d3216SMarc Zyngier } 719cc2d3216SMarc Zyngier 720cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 721cc2d3216SMarc Zyngier { 722cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 723cc2d3216SMarc Zyngier 724cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 725cc2d3216SMarc Zyngier 726cc2d3216SMarc Zyngier return its->cmd_write; 727cc2d3216SMarc Zyngier } 728cc2d3216SMarc Zyngier 729cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 730cc2d3216SMarc Zyngier { 731cc2d3216SMarc Zyngier /* 732cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 733cc2d3216SMarc Zyngier * the ITS. 734cc2d3216SMarc Zyngier */ 735cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 736328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 737cc2d3216SMarc Zyngier else 738cc2d3216SMarc Zyngier dsb(ishst); 739cc2d3216SMarc Zyngier } 740cc2d3216SMarc Zyngier 741a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 742cc2d3216SMarc Zyngier struct its_cmd_block *from, 743cc2d3216SMarc Zyngier struct its_cmd_block *to) 744cc2d3216SMarc Zyngier { 745cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 746cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 747cc2d3216SMarc Zyngier 748cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 749cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 750cc2d3216SMarc Zyngier 751cc2d3216SMarc Zyngier while (1) { 752cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 7539bdd8b1cSMarc Zyngier 7549bdd8b1cSMarc Zyngier /* Direct case */ 7559bdd8b1cSMarc Zyngier if (from_idx < to_idx && rd_idx >= to_idx) 7569bdd8b1cSMarc Zyngier break; 7579bdd8b1cSMarc Zyngier 7589bdd8b1cSMarc Zyngier /* Wrapped case */ 7599bdd8b1cSMarc Zyngier if (from_idx >= to_idx && rd_idx >= to_idx && rd_idx < from_idx) 760cc2d3216SMarc Zyngier break; 761cc2d3216SMarc Zyngier 762cc2d3216SMarc Zyngier count--; 763cc2d3216SMarc Zyngier if (!count) { 764a19b462fSMarc Zyngier pr_err_ratelimited("ITS queue timeout (%llu %llu %llu)\n", 765a19b462fSMarc Zyngier from_idx, to_idx, rd_idx); 766a19b462fSMarc Zyngier return -1; 767cc2d3216SMarc Zyngier } 768cc2d3216SMarc Zyngier cpu_relax(); 769cc2d3216SMarc Zyngier udelay(1); 770cc2d3216SMarc Zyngier } 771a19b462fSMarc Zyngier 772a19b462fSMarc Zyngier return 0; 773cc2d3216SMarc Zyngier } 774cc2d3216SMarc Zyngier 775e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 776e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 777e4f9094bSMarc Zyngier void name(struct its_node *its, \ 778e4f9094bSMarc Zyngier buildtype builder, \ 779e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 780e4f9094bSMarc Zyngier { \ 781e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 782e4f9094bSMarc Zyngier synctype *sync_obj; \ 783e4f9094bSMarc Zyngier unsigned long flags; \ 784e4f9094bSMarc Zyngier \ 785e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 786e4f9094bSMarc Zyngier \ 787e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 788e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 789e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 790e4f9094bSMarc Zyngier return; \ 791e4f9094bSMarc Zyngier } \ 79267047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 793e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 794e4f9094bSMarc Zyngier \ 795e4f9094bSMarc Zyngier if (sync_obj) { \ 796e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 797e4f9094bSMarc Zyngier if (!sync_cmd) \ 798e4f9094bSMarc Zyngier goto post; \ 799e4f9094bSMarc Zyngier \ 80067047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 801e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 802e4f9094bSMarc Zyngier } \ 803e4f9094bSMarc Zyngier \ 804e4f9094bSMarc Zyngier post: \ 805e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 806e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 807e4f9094bSMarc Zyngier \ 808a19b462fSMarc Zyngier if (its_wait_for_range_completion(its, cmd, next_cmd)) \ 809a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 810e4f9094bSMarc Zyngier } 811e4f9094bSMarc Zyngier 81267047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 81367047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 814e4f9094bSMarc Zyngier struct its_collection *sync_col) 815cc2d3216SMarc Zyngier { 816cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 817cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 818e4f9094bSMarc Zyngier 819cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 820cc2d3216SMarc Zyngier } 821cc2d3216SMarc Zyngier 822e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 823e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 824cc2d3216SMarc Zyngier 82567047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 82667047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 827d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 828d011e4e6SMarc Zyngier { 829d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 830d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 831d011e4e6SMarc Zyngier 832d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 833d011e4e6SMarc Zyngier } 834d011e4e6SMarc Zyngier 835d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 836d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 837d011e4e6SMarc Zyngier 8388d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 8398d85dcedSMarc Zyngier { 8408d85dcedSMarc Zyngier struct its_cmd_desc desc; 8418d85dcedSMarc Zyngier 8428d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 8438d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 8448d85dcedSMarc Zyngier 8458d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 8468d85dcedSMarc Zyngier } 8478d85dcedSMarc Zyngier 8488d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 8498d85dcedSMarc Zyngier { 8508d85dcedSMarc Zyngier struct its_cmd_desc desc; 8518d85dcedSMarc Zyngier 8528d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 8538d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 8548d85dcedSMarc Zyngier 8558d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 856cc2d3216SMarc Zyngier } 857cc2d3216SMarc Zyngier 858cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 859cc2d3216SMarc Zyngier { 860cc2d3216SMarc Zyngier struct its_cmd_desc desc; 861cc2d3216SMarc Zyngier 862cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 863cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 864cc2d3216SMarc Zyngier 865cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 866cc2d3216SMarc Zyngier } 867cc2d3216SMarc Zyngier 868cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 869cc2d3216SMarc Zyngier { 870cc2d3216SMarc Zyngier struct its_cmd_desc desc; 871cc2d3216SMarc Zyngier 872cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 873cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 874cc2d3216SMarc Zyngier 875cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 876cc2d3216SMarc Zyngier } 877cc2d3216SMarc Zyngier 878cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 879cc2d3216SMarc Zyngier int valid) 880cc2d3216SMarc Zyngier { 881cc2d3216SMarc Zyngier struct its_cmd_desc desc; 882cc2d3216SMarc Zyngier 883cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 884cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 885cc2d3216SMarc Zyngier 886cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 887cc2d3216SMarc Zyngier } 888cc2d3216SMarc Zyngier 8896a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 890cc2d3216SMarc Zyngier { 891cc2d3216SMarc Zyngier struct its_cmd_desc desc; 892cc2d3216SMarc Zyngier 8936a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 8946a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 8956a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 896cc2d3216SMarc Zyngier 8976a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 898cc2d3216SMarc Zyngier } 899cc2d3216SMarc Zyngier 900cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 901cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 902cc2d3216SMarc Zyngier { 903cc2d3216SMarc Zyngier struct its_cmd_desc desc; 904cc2d3216SMarc Zyngier 905cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 906cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 907591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 908cc2d3216SMarc Zyngier 909cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 910cc2d3216SMarc Zyngier } 911cc2d3216SMarc Zyngier 912cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 913cc2d3216SMarc Zyngier { 914cc2d3216SMarc Zyngier struct its_cmd_desc desc; 915cc2d3216SMarc Zyngier 916cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 917cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 918cc2d3216SMarc Zyngier 919cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 920cc2d3216SMarc Zyngier } 921cc2d3216SMarc Zyngier 922cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 923cc2d3216SMarc Zyngier { 924cc2d3216SMarc Zyngier struct its_cmd_desc desc; 925cc2d3216SMarc Zyngier 926cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 927cc2d3216SMarc Zyngier 928cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 929cc2d3216SMarc Zyngier } 930c48ed51cSMarc Zyngier 931d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 932d011e4e6SMarc Zyngier { 933d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 934d011e4e6SMarc Zyngier struct its_cmd_desc desc; 935d011e4e6SMarc Zyngier 936d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 937d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 938d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 939d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 940d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 941d011e4e6SMarc Zyngier 942d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 943d011e4e6SMarc Zyngier } 944d011e4e6SMarc Zyngier 945d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 946d011e4e6SMarc Zyngier { 947d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 948d011e4e6SMarc Zyngier struct its_cmd_desc desc; 949d011e4e6SMarc Zyngier 950d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 951d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 952d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 953d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 954d011e4e6SMarc Zyngier 955d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 956d011e4e6SMarc Zyngier } 957d011e4e6SMarc Zyngier 95875fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 95975fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 960eb78192bSMarc Zyngier { 961eb78192bSMarc Zyngier struct its_cmd_desc desc; 962eb78192bSMarc Zyngier 963eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 964eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 965eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 96675fd951bSMarc Zyngier 967eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 968eb78192bSMarc Zyngier } 969eb78192bSMarc Zyngier 9703171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 9713171a47aSMarc Zyngier { 9723171a47aSMarc Zyngier struct its_cmd_desc desc; 9733171a47aSMarc Zyngier struct its_node *its; 9743171a47aSMarc Zyngier unsigned long flags; 9753171a47aSMarc Zyngier int col_id = vpe->col_idx; 9763171a47aSMarc Zyngier 9773171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 9783171a47aSMarc Zyngier desc.its_vmovp_cmd.its_list = (u16)its_list_map; 9793171a47aSMarc Zyngier 9803171a47aSMarc Zyngier if (!its_list_map) { 9813171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 9823171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = 0; 9833171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9843171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9853171a47aSMarc Zyngier return; 9863171a47aSMarc Zyngier } 9873171a47aSMarc Zyngier 9883171a47aSMarc Zyngier /* 9893171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 9903171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 9913171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 9923171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 9933171a47aSMarc Zyngier * 9943171a47aSMarc Zyngier * Wall <-- Head. 9953171a47aSMarc Zyngier */ 9963171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 9973171a47aSMarc Zyngier 9983171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 9993171a47aSMarc Zyngier 10003171a47aSMarc Zyngier /* Emit VMOVPs */ 10013171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 10023171a47aSMarc Zyngier if (!its->is_v4) 10033171a47aSMarc Zyngier continue; 10043171a47aSMarc Zyngier 10052247e1bfSMarc Zyngier if (!vpe->its_vm->vlpi_count[its->list_nr]) 10062247e1bfSMarc Zyngier continue; 10072247e1bfSMarc Zyngier 10083171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 10093171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 10103171a47aSMarc Zyngier } 10113171a47aSMarc Zyngier 10123171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 10133171a47aSMarc Zyngier } 10143171a47aSMarc Zyngier 101540619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1016eb78192bSMarc Zyngier { 1017eb78192bSMarc Zyngier struct its_cmd_desc desc; 1018eb78192bSMarc Zyngier 1019eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1020eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1021eb78192bSMarc Zyngier } 1022eb78192bSMarc Zyngier 1023c48ed51cSMarc Zyngier /* 1024c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1025c48ed51cSMarc Zyngier */ 1026c48ed51cSMarc Zyngier 1027c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 1028c48ed51cSMarc Zyngier { 1029c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1030591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 1031c48ed51cSMarc Zyngier } 1032c48ed51cSMarc Zyngier 1033015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1034c48ed51cSMarc Zyngier { 1035015ec038SMarc Zyngier irq_hw_number_t hwirq; 1036e1a2e201SMarc Zyngier void *va; 1037adcdb94eSMarc Zyngier u8 *cfg; 1038c48ed51cSMarc Zyngier 1039015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1040015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1041015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1042d4d7b4adSMarc Zyngier struct its_vlpi_map *map; 1043015ec038SMarc Zyngier 1044e1a2e201SMarc Zyngier va = page_address(its_dev->event_map.vm->vprop_page); 1045d4d7b4adSMarc Zyngier map = &its_dev->event_map.vlpi_maps[event]; 1046d4d7b4adSMarc Zyngier hwirq = map->vintid; 1047d4d7b4adSMarc Zyngier 1048d4d7b4adSMarc Zyngier /* Remember the updated property */ 1049d4d7b4adSMarc Zyngier map->properties &= ~clr; 1050d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1051015ec038SMarc Zyngier } else { 1052e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1053015ec038SMarc Zyngier hwirq = d->hwirq; 1054015ec038SMarc Zyngier } 1055adcdb94eSMarc Zyngier 1056e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1057adcdb94eSMarc Zyngier *cfg &= ~clr; 1058015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1059c48ed51cSMarc Zyngier 1060c48ed51cSMarc Zyngier /* 1061c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1062c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1063c48ed51cSMarc Zyngier * Humpf... 1064c48ed51cSMarc Zyngier */ 1065c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1066328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1067c48ed51cSMarc Zyngier else 1068c48ed51cSMarc Zyngier dsb(ishst); 1069015ec038SMarc Zyngier } 1070015ec038SMarc Zyngier 1071015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1072015ec038SMarc Zyngier { 1073015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1074015ec038SMarc Zyngier 1075015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1076adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 1077c48ed51cSMarc Zyngier } 1078c48ed51cSMarc Zyngier 1079015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1080015ec038SMarc Zyngier { 1081015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1082015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1083015ec038SMarc Zyngier 1084015ec038SMarc Zyngier if (its_dev->event_map.vlpi_maps[event].db_enabled == enable) 1085015ec038SMarc Zyngier return; 1086015ec038SMarc Zyngier 1087015ec038SMarc Zyngier its_dev->event_map.vlpi_maps[event].db_enabled = enable; 1088015ec038SMarc Zyngier 1089015ec038SMarc Zyngier /* 1090015ec038SMarc Zyngier * More fun with the architecture: 1091015ec038SMarc Zyngier * 1092015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1093015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1094015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1095015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1096015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1097015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1098015ec038SMarc Zyngier */ 1099015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1100c48ed51cSMarc Zyngier } 1101c48ed51cSMarc Zyngier 1102c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1103c48ed51cSMarc Zyngier { 1104015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1105015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1106015ec038SMarc Zyngier 1107adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1108c48ed51cSMarc Zyngier } 1109c48ed51cSMarc Zyngier 1110c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1111c48ed51cSMarc Zyngier { 1112015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1113015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1114015ec038SMarc Zyngier 1115adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1116c48ed51cSMarc Zyngier } 1117c48ed51cSMarc Zyngier 1118c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1119c48ed51cSMarc Zyngier bool force) 1120c48ed51cSMarc Zyngier { 1121fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1122fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1123c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1124c48ed51cSMarc Zyngier struct its_collection *target_col; 1125c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1126c48ed51cSMarc Zyngier 1127015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1128015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1129015ec038SMarc Zyngier return -EINVAL; 1130015ec038SMarc Zyngier 1131fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1132fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1133fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1134fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1135fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1136fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1137fbf8f40eSGanapatrao Kulkarni } 1138fbf8f40eSGanapatrao Kulkarni } 1139fbf8f40eSGanapatrao Kulkarni 1140fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1141fbf8f40eSGanapatrao Kulkarni 1142c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1143c48ed51cSMarc Zyngier return -EINVAL; 1144c48ed51cSMarc Zyngier 11458b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 11468b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1147c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1148c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1149591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 11500d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 11518b8d94a7SMaJun } 1152c48ed51cSMarc Zyngier 1153c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1154c48ed51cSMarc Zyngier } 1155c48ed51cSMarc Zyngier 1156558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1157558b0165SArd Biesheuvel { 1158558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1159558b0165SArd Biesheuvel 1160558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1161558b0165SArd Biesheuvel } 1162558b0165SArd Biesheuvel 1163b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1164b48ac83dSMarc Zyngier { 1165b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1166b48ac83dSMarc Zyngier struct its_node *its; 1167b48ac83dSMarc Zyngier u64 addr; 1168b48ac83dSMarc Zyngier 1169b48ac83dSMarc Zyngier its = its_dev->its; 1170558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1171b48ac83dSMarc Zyngier 1172b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1173b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1174b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 117544bb7e24SRobin Murphy 117644bb7e24SRobin Murphy iommu_dma_map_msi_msg(d->irq, msg); 1177b48ac83dSMarc Zyngier } 1178b48ac83dSMarc Zyngier 11798d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 11808d85dcedSMarc Zyngier enum irqchip_irq_state which, 11818d85dcedSMarc Zyngier bool state) 11828d85dcedSMarc Zyngier { 11838d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 11848d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 11858d85dcedSMarc Zyngier 11868d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 11878d85dcedSMarc Zyngier return -EINVAL; 11888d85dcedSMarc Zyngier 11898d85dcedSMarc Zyngier if (state) 11908d85dcedSMarc Zyngier its_send_int(its_dev, event); 11918d85dcedSMarc Zyngier else 11928d85dcedSMarc Zyngier its_send_clear(its_dev, event); 11938d85dcedSMarc Zyngier 11948d85dcedSMarc Zyngier return 0; 11958d85dcedSMarc Zyngier } 11968d85dcedSMarc Zyngier 11972247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 11982247e1bfSMarc Zyngier { 11992247e1bfSMarc Zyngier unsigned long flags; 12002247e1bfSMarc Zyngier 12012247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12022247e1bfSMarc Zyngier if (!its_list_map) 12032247e1bfSMarc Zyngier return; 12042247e1bfSMarc Zyngier 12052247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12062247e1bfSMarc Zyngier 12072247e1bfSMarc Zyngier /* 12082247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 12092247e1bfSMarc Zyngier * them mapped now. 12102247e1bfSMarc Zyngier */ 12112247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 12122247e1bfSMarc Zyngier 12132247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 12142247e1bfSMarc Zyngier int i; 12152247e1bfSMarc Zyngier 12162247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 12172247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 121844c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 12192247e1bfSMarc Zyngier 12202247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 12212247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 12222247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 12232247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 122444c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 12252247e1bfSMarc Zyngier } 12262247e1bfSMarc Zyngier } 12272247e1bfSMarc Zyngier 12282247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12292247e1bfSMarc Zyngier } 12302247e1bfSMarc Zyngier 12312247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 12322247e1bfSMarc Zyngier { 12332247e1bfSMarc Zyngier unsigned long flags; 12342247e1bfSMarc Zyngier 12352247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12362247e1bfSMarc Zyngier if (!its_list_map) 12372247e1bfSMarc Zyngier return; 12382247e1bfSMarc Zyngier 12392247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12402247e1bfSMarc Zyngier 12412247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 12422247e1bfSMarc Zyngier int i; 12432247e1bfSMarc Zyngier 12442247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 12452247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 12462247e1bfSMarc Zyngier } 12472247e1bfSMarc Zyngier 12482247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12492247e1bfSMarc Zyngier } 12502247e1bfSMarc Zyngier 1251d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1252d011e4e6SMarc Zyngier { 1253d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1254d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1255d011e4e6SMarc Zyngier int ret = 0; 1256d011e4e6SMarc Zyngier 1257d011e4e6SMarc Zyngier if (!info->map) 1258d011e4e6SMarc Zyngier return -EINVAL; 1259d011e4e6SMarc Zyngier 1260d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1261d011e4e6SMarc Zyngier 1262d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1263d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1264d011e4e6SMarc Zyngier 12656396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 1266d011e4e6SMarc Zyngier GFP_KERNEL); 1267d011e4e6SMarc Zyngier if (!maps) { 1268d011e4e6SMarc Zyngier ret = -ENOMEM; 1269d011e4e6SMarc Zyngier goto out; 1270d011e4e6SMarc Zyngier } 1271d011e4e6SMarc Zyngier 1272d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1273d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1274d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1275d011e4e6SMarc Zyngier ret = -EINVAL; 1276d011e4e6SMarc Zyngier goto out; 1277d011e4e6SMarc Zyngier } 1278d011e4e6SMarc Zyngier 1279d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1280d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1281d011e4e6SMarc Zyngier 1282d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1283d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1284d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1285d011e4e6SMarc Zyngier } else { 12862247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 12872247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 12882247e1bfSMarc Zyngier 1289d4d7b4adSMarc Zyngier /* 1290d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1291d4d7b4adSMarc Zyngier * start poking the virtual property table. 1292d4d7b4adSMarc Zyngier */ 1293d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1294d4d7b4adSMarc Zyngier 1295d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1296d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1297d4d7b4adSMarc Zyngier 1298d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1299d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1300d011e4e6SMarc Zyngier 1301d011e4e6SMarc Zyngier /* and install the virtual one */ 1302d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1303d011e4e6SMarc Zyngier 1304d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1305d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1306d011e4e6SMarc Zyngier } 1307d011e4e6SMarc Zyngier 1308d011e4e6SMarc Zyngier out: 1309d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1310d011e4e6SMarc Zyngier return ret; 1311d011e4e6SMarc Zyngier } 1312d011e4e6SMarc Zyngier 1313d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1314d011e4e6SMarc Zyngier { 1315d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1316d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1317d011e4e6SMarc Zyngier int ret = 0; 1318d011e4e6SMarc Zyngier 1319d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1320d011e4e6SMarc Zyngier 1321d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || 1322d011e4e6SMarc Zyngier !its_dev->event_map.vlpi_maps[event].vm) { 1323d011e4e6SMarc Zyngier ret = -EINVAL; 1324d011e4e6SMarc Zyngier goto out; 1325d011e4e6SMarc Zyngier } 1326d011e4e6SMarc Zyngier 1327d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1328d011e4e6SMarc Zyngier *info->map = its_dev->event_map.vlpi_maps[event]; 1329d011e4e6SMarc Zyngier 1330d011e4e6SMarc Zyngier out: 1331d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1332d011e4e6SMarc Zyngier return ret; 1333d011e4e6SMarc Zyngier } 1334d011e4e6SMarc Zyngier 1335d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1336d011e4e6SMarc Zyngier { 1337d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1338d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1339d011e4e6SMarc Zyngier int ret = 0; 1340d011e4e6SMarc Zyngier 1341d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1342d011e4e6SMarc Zyngier 1343d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1344d011e4e6SMarc Zyngier ret = -EINVAL; 1345d011e4e6SMarc Zyngier goto out; 1346d011e4e6SMarc Zyngier } 1347d011e4e6SMarc Zyngier 1348d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1349d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1350d011e4e6SMarc Zyngier 1351d011e4e6SMarc Zyngier /* and restore the physical one */ 1352d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1353d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1354d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1355d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1356d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1357d011e4e6SMarc Zyngier 13582247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 13592247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 13602247e1bfSMarc Zyngier 1361d011e4e6SMarc Zyngier /* 1362d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1363d011e4e6SMarc Zyngier * this was the last VLPI. 1364d011e4e6SMarc Zyngier */ 1365d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1366d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1367d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1368d011e4e6SMarc Zyngier } 1369d011e4e6SMarc Zyngier 1370d011e4e6SMarc Zyngier out: 1371d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1372d011e4e6SMarc Zyngier return ret; 1373d011e4e6SMarc Zyngier } 1374d011e4e6SMarc Zyngier 1375015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1376015ec038SMarc Zyngier { 1377015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1378015ec038SMarc Zyngier 1379015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1380015ec038SMarc Zyngier return -EINVAL; 1381015ec038SMarc Zyngier 1382015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1383015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1384015ec038SMarc Zyngier else 1385015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1386015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1387015ec038SMarc Zyngier 1388015ec038SMarc Zyngier return 0; 1389015ec038SMarc Zyngier } 1390015ec038SMarc Zyngier 1391c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1392c808eea8SMarc Zyngier { 1393c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1394c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1395c808eea8SMarc Zyngier 1396c808eea8SMarc Zyngier /* Need a v4 ITS */ 1397d011e4e6SMarc Zyngier if (!its_dev->its->is_v4) 1398c808eea8SMarc Zyngier return -EINVAL; 1399c808eea8SMarc Zyngier 1400d011e4e6SMarc Zyngier /* Unmap request? */ 1401d011e4e6SMarc Zyngier if (!info) 1402d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1403d011e4e6SMarc Zyngier 1404c808eea8SMarc Zyngier switch (info->cmd_type) { 1405c808eea8SMarc Zyngier case MAP_VLPI: 1406d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1407c808eea8SMarc Zyngier 1408c808eea8SMarc Zyngier case GET_VLPI: 1409d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1410c808eea8SMarc Zyngier 1411c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1412c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1413015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1414c808eea8SMarc Zyngier 1415c808eea8SMarc Zyngier default: 1416c808eea8SMarc Zyngier return -EINVAL; 1417c808eea8SMarc Zyngier } 1418c808eea8SMarc Zyngier } 1419c808eea8SMarc Zyngier 1420c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1421c48ed51cSMarc Zyngier .name = "ITS", 1422c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1423c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1424004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1425c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1426b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 14278d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1428c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1429b48ac83dSMarc Zyngier }; 1430b48ac83dSMarc Zyngier 1431880cb3cdSMarc Zyngier 1432bf9529f8SMarc Zyngier /* 1433bf9529f8SMarc Zyngier * How we allocate LPIs: 1434bf9529f8SMarc Zyngier * 1435880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1436880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1437880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1438880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1439bf9529f8SMarc Zyngier * 1440880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1441880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1442880cb3cdSMarc Zyngier * already free block. 1443880cb3cdSMarc Zyngier * 1444880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1445880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1446880cb3cdSMarc Zyngier */ 14474cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1448880cb3cdSMarc Zyngier 1449880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 1450880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 1451bf9529f8SMarc Zyngier 1452880cb3cdSMarc Zyngier struct lpi_range { 1453880cb3cdSMarc Zyngier struct list_head entry; 1454880cb3cdSMarc Zyngier u32 base_id; 1455880cb3cdSMarc Zyngier u32 span; 1456880cb3cdSMarc Zyngier }; 1457880cb3cdSMarc Zyngier 1458880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 1459bf9529f8SMarc Zyngier { 1460880cb3cdSMarc Zyngier struct lpi_range *range; 1461880cb3cdSMarc Zyngier 1462880cb3cdSMarc Zyngier range = kzalloc(sizeof(*range), GFP_KERNEL); 1463880cb3cdSMarc Zyngier if (range) { 1464880cb3cdSMarc Zyngier INIT_LIST_HEAD(&range->entry); 1465880cb3cdSMarc Zyngier range->base_id = base; 1466880cb3cdSMarc Zyngier range->span = span; 1467bf9529f8SMarc Zyngier } 1468bf9529f8SMarc Zyngier 1469880cb3cdSMarc Zyngier return range; 1470880cb3cdSMarc Zyngier } 1471880cb3cdSMarc Zyngier 1472880cb3cdSMarc Zyngier static int lpi_range_cmp(void *priv, struct list_head *a, struct list_head *b) 1473bf9529f8SMarc Zyngier { 1474880cb3cdSMarc Zyngier struct lpi_range *ra, *rb; 1475880cb3cdSMarc Zyngier 1476880cb3cdSMarc Zyngier ra = container_of(a, struct lpi_range, entry); 1477880cb3cdSMarc Zyngier rb = container_of(b, struct lpi_range, entry); 1478880cb3cdSMarc Zyngier 1479880cb3cdSMarc Zyngier return rb->base_id - ra->base_id; 1480880cb3cdSMarc Zyngier } 1481880cb3cdSMarc Zyngier 1482880cb3cdSMarc Zyngier static void merge_lpi_ranges(void) 1483880cb3cdSMarc Zyngier { 1484880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1485880cb3cdSMarc Zyngier 1486880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1487880cb3cdSMarc Zyngier if (!list_is_last(&range->entry, &lpi_range_list) && 1488880cb3cdSMarc Zyngier (tmp->base_id == (range->base_id + range->span))) { 1489880cb3cdSMarc Zyngier tmp->base_id = range->base_id; 1490880cb3cdSMarc Zyngier tmp->span += range->span; 1491880cb3cdSMarc Zyngier list_del(&range->entry); 1492880cb3cdSMarc Zyngier kfree(range); 1493880cb3cdSMarc Zyngier } 1494880cb3cdSMarc Zyngier } 1495880cb3cdSMarc Zyngier } 1496880cb3cdSMarc Zyngier 1497880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 1498880cb3cdSMarc Zyngier { 1499880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1500880cb3cdSMarc Zyngier int err = -ENOSPC; 1501880cb3cdSMarc Zyngier 1502880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1503880cb3cdSMarc Zyngier 1504880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1505880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 1506880cb3cdSMarc Zyngier *base = range->base_id; 1507880cb3cdSMarc Zyngier range->base_id += nr_lpis; 1508880cb3cdSMarc Zyngier range->span -= nr_lpis; 1509880cb3cdSMarc Zyngier 1510880cb3cdSMarc Zyngier if (range->span == 0) { 1511880cb3cdSMarc Zyngier list_del(&range->entry); 1512880cb3cdSMarc Zyngier kfree(range); 1513880cb3cdSMarc Zyngier } 1514880cb3cdSMarc Zyngier 1515880cb3cdSMarc Zyngier err = 0; 1516880cb3cdSMarc Zyngier break; 1517880cb3cdSMarc Zyngier } 1518880cb3cdSMarc Zyngier } 1519880cb3cdSMarc Zyngier 1520880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1521880cb3cdSMarc Zyngier 1522880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 1523880cb3cdSMarc Zyngier return err; 1524880cb3cdSMarc Zyngier } 1525880cb3cdSMarc Zyngier 1526880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 1527880cb3cdSMarc Zyngier { 1528880cb3cdSMarc Zyngier struct lpi_range *new; 1529880cb3cdSMarc Zyngier int err = 0; 1530880cb3cdSMarc Zyngier 1531880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1532880cb3cdSMarc Zyngier 1533880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 1534880cb3cdSMarc Zyngier if (!new) { 1535880cb3cdSMarc Zyngier err = -ENOMEM; 1536880cb3cdSMarc Zyngier goto out; 1537880cb3cdSMarc Zyngier } 1538880cb3cdSMarc Zyngier 1539880cb3cdSMarc Zyngier list_add(&new->entry, &lpi_range_list); 1540880cb3cdSMarc Zyngier list_sort(NULL, &lpi_range_list, lpi_range_cmp); 1541880cb3cdSMarc Zyngier merge_lpi_ranges(); 1542880cb3cdSMarc Zyngier out: 1543880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1544880cb3cdSMarc Zyngier return err; 1545bf9529f8SMarc Zyngier } 1546bf9529f8SMarc Zyngier 154704a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1548bf9529f8SMarc Zyngier { 1549880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 155012b2905aSMarc Zyngier u32 numlpis; 1551880cb3cdSMarc Zyngier int err; 1552bf9529f8SMarc Zyngier 155312b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 155412b2905aSMarc Zyngier 155512b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 155612b2905aSMarc Zyngier lpis = numlpis; 155712b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 155812b2905aSMarc Zyngier lpis); 155912b2905aSMarc Zyngier } 156012b2905aSMarc Zyngier 1561880cb3cdSMarc Zyngier /* 1562880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 1563880cb3cdSMarc Zyngier * full range of LPIs. 1564880cb3cdSMarc Zyngier */ 1565880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 1566880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 1567880cb3cdSMarc Zyngier return err; 1568bf9529f8SMarc Zyngier } 1569bf9529f8SMarc Zyngier 157038dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 1571bf9529f8SMarc Zyngier { 1572bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1573880cb3cdSMarc Zyngier int err = 0; 1574bf9529f8SMarc Zyngier 1575bf9529f8SMarc Zyngier do { 157638dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 1577880cb3cdSMarc Zyngier if (!err) 1578bf9529f8SMarc Zyngier break; 1579bf9529f8SMarc Zyngier 158038dd7c49SMarc Zyngier nr_irqs /= 2; 158138dd7c49SMarc Zyngier } while (nr_irqs > 0); 1582bf9529f8SMarc Zyngier 1583880cb3cdSMarc Zyngier if (err) 1584bf9529f8SMarc Zyngier goto out; 1585bf9529f8SMarc Zyngier 158638dd7c49SMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_irqs), sizeof (long), GFP_ATOMIC); 1587bf9529f8SMarc Zyngier if (!bitmap) 1588bf9529f8SMarc Zyngier goto out; 1589bf9529f8SMarc Zyngier 159038dd7c49SMarc Zyngier *nr_ids = nr_irqs; 1591bf9529f8SMarc Zyngier 1592bf9529f8SMarc Zyngier out: 1593c8415b94SMarc Zyngier if (!bitmap) 1594c8415b94SMarc Zyngier *base = *nr_ids = 0; 1595c8415b94SMarc Zyngier 1596bf9529f8SMarc Zyngier return bitmap; 1597bf9529f8SMarc Zyngier } 1598bf9529f8SMarc Zyngier 159938dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 1600bf9529f8SMarc Zyngier { 1601880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 1602cf2be8baSMarc Zyngier kfree(bitmap); 1603bf9529f8SMarc Zyngier } 16041ac19ca6SMarc Zyngier 1605053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 1606053be485SMarc Zyngier { 1607053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 1608053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 1609053be485SMarc Zyngier 1610053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 1611053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 1612053be485SMarc Zyngier } 1613053be485SMarc Zyngier 16140e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 16150e5ccf91SMarc Zyngier { 16160e5ccf91SMarc Zyngier struct page *prop_page; 16171ac19ca6SMarc Zyngier 16180e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 16190e5ccf91SMarc Zyngier if (!prop_page) 16200e5ccf91SMarc Zyngier return NULL; 16210e5ccf91SMarc Zyngier 1622053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 16230e5ccf91SMarc Zyngier 16240e5ccf91SMarc Zyngier return prop_page; 16250e5ccf91SMarc Zyngier } 16260e5ccf91SMarc Zyngier 16277d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 16287d75bbb4SMarc Zyngier { 16297d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 16307d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 16317d75bbb4SMarc Zyngier } 16321ac19ca6SMarc Zyngier 1633*5e2c9f9aSMarc Zyngier static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) 1634*5e2c9f9aSMarc Zyngier { 1635*5e2c9f9aSMarc Zyngier phys_addr_t start, end, addr_end; 1636*5e2c9f9aSMarc Zyngier u64 i; 1637*5e2c9f9aSMarc Zyngier 1638*5e2c9f9aSMarc Zyngier /* 1639*5e2c9f9aSMarc Zyngier * We don't bother checking for a kdump kernel as by 1640*5e2c9f9aSMarc Zyngier * construction, the LPI tables are out of this kernel's 1641*5e2c9f9aSMarc Zyngier * memory map. 1642*5e2c9f9aSMarc Zyngier */ 1643*5e2c9f9aSMarc Zyngier if (is_kdump_kernel()) 1644*5e2c9f9aSMarc Zyngier return true; 1645*5e2c9f9aSMarc Zyngier 1646*5e2c9f9aSMarc Zyngier addr_end = addr + size - 1; 1647*5e2c9f9aSMarc Zyngier 1648*5e2c9f9aSMarc Zyngier for_each_reserved_mem_region(i, &start, &end) { 1649*5e2c9f9aSMarc Zyngier if (addr >= start && addr_end <= end) 1650*5e2c9f9aSMarc Zyngier return true; 1651*5e2c9f9aSMarc Zyngier } 1652*5e2c9f9aSMarc Zyngier 1653*5e2c9f9aSMarc Zyngier /* Not found, not a good sign... */ 1654*5e2c9f9aSMarc Zyngier pr_warn("GICv3: Expected reserved range [%pa:%pa], not found\n", 1655*5e2c9f9aSMarc Zyngier &addr, &addr_end); 1656*5e2c9f9aSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 1657*5e2c9f9aSMarc Zyngier return false; 1658*5e2c9f9aSMarc Zyngier } 1659*5e2c9f9aSMarc Zyngier 16603fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 16613fb68faeSMarc Zyngier { 16623fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 16633fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 16643fb68faeSMarc Zyngier 16653fb68faeSMarc Zyngier return 0; 16663fb68faeSMarc Zyngier } 16673fb68faeSMarc Zyngier 166811e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 16691ac19ca6SMarc Zyngier { 1670c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 1671c440a9d9SMarc Zyngier u64 val; 1672c440a9d9SMarc Zyngier 1673c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 1674c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 1675c440a9d9SMarc Zyngier 1676c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 1677c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 1678c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 1679c440a9d9SMarc Zyngier MEMREMAP_WB); 1680c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 1681c440a9d9SMarc Zyngier } else { 1682e1a2e201SMarc Zyngier struct page *page; 16831ac19ca6SMarc Zyngier 1684c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 1685c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 16864cb205c0SJia He ITS_MAX_LPI_NRBITS); 1687e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 1688e1a2e201SMarc Zyngier if (!page) { 16891ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 16901ac19ca6SMarc Zyngier return -ENOMEM; 16911ac19ca6SMarc Zyngier } 16921ac19ca6SMarc Zyngier 1693e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 1694e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 16953fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 16963fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 1697c440a9d9SMarc Zyngier } 1698e1a2e201SMarc Zyngier 1699e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 1700e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 17011ac19ca6SMarc Zyngier 17026c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 17031ac19ca6SMarc Zyngier } 17041ac19ca6SMarc Zyngier 17051ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 17061ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 17071ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 17084f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 17091ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 17101ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 17111ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 17121ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 17131ac19ca6SMarc Zyngier }; 17141ac19ca6SMarc Zyngier 17152d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 17162d81d425SShanker Donthineni { 17172d81d425SShanker Donthineni u32 idx = baser - its->tables; 17182d81d425SShanker Donthineni 17190968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 17202d81d425SShanker Donthineni } 17212d81d425SShanker Donthineni 17222d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 17232d81d425SShanker Donthineni u64 val) 17242d81d425SShanker Donthineni { 17252d81d425SShanker Donthineni u32 idx = baser - its->tables; 17262d81d425SShanker Donthineni 17270968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 17282d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 17292d81d425SShanker Donthineni } 17302d81d425SShanker Donthineni 17319347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 17323faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 17333faf24eaSShanker Donthineni bool indirect) 17349347359aSShanker Donthineni { 17359347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 17369347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 17379347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 173830ae9610SShanker Donthineni u64 baser_phys, tmp; 17399347359aSShanker Donthineni u32 alloc_pages; 17409347359aSShanker Donthineni void *base; 17419347359aSShanker Donthineni 17429347359aSShanker Donthineni retry_alloc_baser: 17439347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 17449347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 17459347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 17469347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 17479347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 17489347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 17499347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 17509347359aSShanker Donthineni } 17519347359aSShanker Donthineni 17529347359aSShanker Donthineni base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 17539347359aSShanker Donthineni if (!base) 17549347359aSShanker Donthineni return -ENOMEM; 17559347359aSShanker Donthineni 175630ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 175730ae9610SShanker Donthineni 175830ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 175930ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 176030ae9610SShanker Donthineni 176130ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 176230ae9610SShanker Donthineni if (psz != SZ_64K) { 176330ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 176430ae9610SShanker Donthineni free_pages((unsigned long)base, order); 176530ae9610SShanker Donthineni return -ENXIO; 176630ae9610SShanker Donthineni } 176730ae9610SShanker Donthineni 176830ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 176930ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 177030ae9610SShanker Donthineni } 177130ae9610SShanker Donthineni 17729347359aSShanker Donthineni retry_baser: 177330ae9610SShanker Donthineni val = (baser_phys | 17749347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 17759347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 17769347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 17779347359aSShanker Donthineni cache | 17789347359aSShanker Donthineni shr | 17799347359aSShanker Donthineni GITS_BASER_VALID); 17809347359aSShanker Donthineni 17813faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 17823faf24eaSShanker Donthineni 17839347359aSShanker Donthineni switch (psz) { 17849347359aSShanker Donthineni case SZ_4K: 17859347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 17869347359aSShanker Donthineni break; 17879347359aSShanker Donthineni case SZ_16K: 17889347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 17899347359aSShanker Donthineni break; 17909347359aSShanker Donthineni case SZ_64K: 17919347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 17929347359aSShanker Donthineni break; 17939347359aSShanker Donthineni } 17949347359aSShanker Donthineni 17959347359aSShanker Donthineni its_write_baser(its, baser, val); 17969347359aSShanker Donthineni tmp = baser->val; 17979347359aSShanker Donthineni 17989347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 17999347359aSShanker Donthineni /* 18009347359aSShanker Donthineni * Shareability didn't stick. Just use 18019347359aSShanker Donthineni * whatever the read reported, which is likely 18029347359aSShanker Donthineni * to be the only thing this redistributor 18039347359aSShanker Donthineni * supports. If that's zero, make it 18049347359aSShanker Donthineni * non-cacheable as well. 18059347359aSShanker Donthineni */ 18069347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 18079347359aSShanker Donthineni if (!shr) { 18089347359aSShanker Donthineni cache = GITS_BASER_nC; 1809328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 18109347359aSShanker Donthineni } 18119347359aSShanker Donthineni goto retry_baser; 18129347359aSShanker Donthineni } 18139347359aSShanker Donthineni 18149347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 18159347359aSShanker Donthineni /* 18169347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 18179347359aSShanker Donthineni * size and retry. If we reach 4K, then 18189347359aSShanker Donthineni * something is horribly wrong... 18199347359aSShanker Donthineni */ 18209347359aSShanker Donthineni free_pages((unsigned long)base, order); 18219347359aSShanker Donthineni baser->base = NULL; 18229347359aSShanker Donthineni 18239347359aSShanker Donthineni switch (psz) { 18249347359aSShanker Donthineni case SZ_16K: 18259347359aSShanker Donthineni psz = SZ_4K; 18269347359aSShanker Donthineni goto retry_alloc_baser; 18279347359aSShanker Donthineni case SZ_64K: 18289347359aSShanker Donthineni psz = SZ_16K; 18299347359aSShanker Donthineni goto retry_alloc_baser; 18309347359aSShanker Donthineni } 18319347359aSShanker Donthineni } 18329347359aSShanker Donthineni 18339347359aSShanker Donthineni if (val != tmp) { 1834b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 18359347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1836b11283ebSVladimir Murzin val, tmp); 18379347359aSShanker Donthineni free_pages((unsigned long)base, order); 18389347359aSShanker Donthineni return -ENXIO; 18399347359aSShanker Donthineni } 18409347359aSShanker Donthineni 18419347359aSShanker Donthineni baser->order = order; 18429347359aSShanker Donthineni baser->base = base; 18439347359aSShanker Donthineni baser->psz = psz; 18443faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 18459347359aSShanker Donthineni 18463faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1847d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 18489347359aSShanker Donthineni its_base_type_string[type], 18499347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 18503faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 18519347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 18529347359aSShanker Donthineni 18539347359aSShanker Donthineni return 0; 18549347359aSShanker Donthineni } 18559347359aSShanker Donthineni 18564cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 18574cacac57SMarc Zyngier struct its_baser *baser, 185832bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 18594b75c459SShanker Donthineni { 18604cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 18614cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 18624cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 18632fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 18644b75c459SShanker Donthineni u32 new_order = *order; 18653faf24eaSShanker Donthineni bool indirect = false; 18663faf24eaSShanker Donthineni 18673faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 18683faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 18693faf24eaSShanker Donthineni /* 18703faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 18713faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 18723faf24eaSShanker Donthineni */ 18733faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 18743faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 18753faf24eaSShanker Donthineni 18763faf24eaSShanker Donthineni if (indirect) { 18773faf24eaSShanker Donthineni /* 18783faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 18793faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 18803faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 18813faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 18823faf24eaSShanker Donthineni * entry size. 18833faf24eaSShanker Donthineni */ 1884d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 18853faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 18863faf24eaSShanker Donthineni } 18873faf24eaSShanker Donthineni } 18884b75c459SShanker Donthineni 18894b75c459SShanker Donthineni /* 18904b75c459SShanker Donthineni * Allocate as many entries as required to fit the 18914b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 18924b75c459SShanker Donthineni * space being incredibly sparse, this results in a 18933faf24eaSShanker Donthineni * massive waste of memory if two-level device table 18943faf24eaSShanker Donthineni * feature is not supported by hardware. 18954b75c459SShanker Donthineni */ 18964b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 18974b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 18984b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1899d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 19004cacac57SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %u->%u\n", 19014cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 19024cacac57SMarc Zyngier its->device_ids, ids); 19034b75c459SShanker Donthineni } 19044b75c459SShanker Donthineni 19054b75c459SShanker Donthineni *order = new_order; 19063faf24eaSShanker Donthineni 19073faf24eaSShanker Donthineni return indirect; 19084b75c459SShanker Donthineni } 19094b75c459SShanker Donthineni 19101ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 19111ac19ca6SMarc Zyngier { 19121ac19ca6SMarc Zyngier int i; 19131ac19ca6SMarc Zyngier 19141ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 19151a485f4dSShanker Donthineni if (its->tables[i].base) { 19161a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 19171a485f4dSShanker Donthineni its->tables[i].order); 19181a485f4dSShanker Donthineni its->tables[i].base = NULL; 19191ac19ca6SMarc Zyngier } 19201ac19ca6SMarc Zyngier } 19211ac19ca6SMarc Zyngier } 19221ac19ca6SMarc Zyngier 19230e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 19241ac19ca6SMarc Zyngier { 19251ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 19262fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 19279347359aSShanker Donthineni u32 psz = SZ_64K; 19289347359aSShanker Donthineni int err, i; 192994100970SRobert Richter 1930fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 1931fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 19329347359aSShanker Donthineni cache = GITS_BASER_nCnB; 1933466b7d16SShanker Donthineni 19341ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 19352d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 19362d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 19371ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 19389347359aSShanker Donthineni u32 order = get_order(psz); 19393faf24eaSShanker Donthineni bool indirect = false; 19401ac19ca6SMarc Zyngier 19414cacac57SMarc Zyngier switch (type) { 19424cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 19431ac19ca6SMarc Zyngier continue; 19441ac19ca6SMarc Zyngier 19454cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 194632bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 194732bd44dcSShanker Donthineni psz, &order, 194832bd44dcSShanker Donthineni its->device_ids); 19494cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 19504cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 195132bd44dcSShanker Donthineni psz, &order, 195232bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 19534cacac57SMarc Zyngier break; 19544cacac57SMarc Zyngier } 1955f54b97edSMarc Zyngier 19563faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 19579347359aSShanker Donthineni if (err < 0) { 19589347359aSShanker Donthineni its_free_tables(its); 19599347359aSShanker Donthineni return err; 196030f21363SRobert Richter } 196130f21363SRobert Richter 19629347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 19639347359aSShanker Donthineni psz = baser->psz; 19649347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 19659347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 19661ac19ca6SMarc Zyngier } 19671ac19ca6SMarc Zyngier 19681ac19ca6SMarc Zyngier return 0; 19691ac19ca6SMarc Zyngier } 19701ac19ca6SMarc Zyngier 19711ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 19721ac19ca6SMarc Zyngier { 197383559b47SMarc Zyngier int i; 197483559b47SMarc Zyngier 19756396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 19761ac19ca6SMarc Zyngier GFP_KERNEL); 19771ac19ca6SMarc Zyngier if (!its->collections) 19781ac19ca6SMarc Zyngier return -ENOMEM; 19791ac19ca6SMarc Zyngier 198083559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 198183559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 198283559b47SMarc Zyngier 19831ac19ca6SMarc Zyngier return 0; 19841ac19ca6SMarc Zyngier } 19851ac19ca6SMarc Zyngier 19867c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 19877c297a2dSMarc Zyngier { 19887c297a2dSMarc Zyngier struct page *pend_page; 1989adaab500SMarc Zyngier 19907c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 1991adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 19927c297a2dSMarc Zyngier if (!pend_page) 19937c297a2dSMarc Zyngier return NULL; 19947c297a2dSMarc Zyngier 19957c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 19967c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 19977c297a2dSMarc Zyngier 19987c297a2dSMarc Zyngier return pend_page; 19997c297a2dSMarc Zyngier } 20007c297a2dSMarc Zyngier 20017d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 20027d75bbb4SMarc Zyngier { 2003adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 20047d75bbb4SMarc Zyngier } 20057d75bbb4SMarc Zyngier 2006c6e2ccb6SMarc Zyngier /* 2007*5e2c9f9aSMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. Any other 2008*5e2c9f9aSMarc Zyngier * case is wrong in the absence of firmware/EFI support. 2009c6e2ccb6SMarc Zyngier */ 2010c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 2011c440a9d9SMarc Zyngier { 2012*5e2c9f9aSMarc Zyngier phys_addr_t addr; 2013*5e2c9f9aSMarc Zyngier u64 val; 2014c6e2ccb6SMarc Zyngier 2015*5e2c9f9aSMarc Zyngier /* Check whether the property table is in a reserved region */ 2016*5e2c9f9aSMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 2017*5e2c9f9aSMarc Zyngier addr = val & GENMASK_ULL(51, 12); 2018*5e2c9f9aSMarc Zyngier 2019*5e2c9f9aSMarc Zyngier return gic_check_reserved_range(addr, LPI_PROPBASE_SZ); 2020c440a9d9SMarc Zyngier } 2021c440a9d9SMarc Zyngier 202211e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 202311e37d35SMarc Zyngier { 2024c440a9d9SMarc Zyngier u64 val; 202511e37d35SMarc Zyngier int err, cpu; 202611e37d35SMarc Zyngier 2027c440a9d9SMarc Zyngier /* 2028c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 2029c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 2030c440a9d9SMarc Zyngier */ 2031c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 2032c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 2033c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 2034c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 2035c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 2036c440a9d9SMarc Zyngier } 2037c440a9d9SMarc Zyngier 203811e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 203911e37d35SMarc Zyngier if (err) 204011e37d35SMarc Zyngier return err; 204111e37d35SMarc Zyngier 204211e37d35SMarc Zyngier /* 204311e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 204411e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 204511e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 204611e37d35SMarc Zyngier */ 204711e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 204811e37d35SMarc Zyngier struct page *pend_page; 204911e37d35SMarc Zyngier 205011e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 205111e37d35SMarc Zyngier if (!pend_page) { 205211e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 205311e37d35SMarc Zyngier return -ENOMEM; 205411e37d35SMarc Zyngier } 205511e37d35SMarc Zyngier 205611e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 205711e37d35SMarc Zyngier } 205811e37d35SMarc Zyngier 205911e37d35SMarc Zyngier return 0; 206011e37d35SMarc Zyngier } 206111e37d35SMarc Zyngier 20621ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 20631ac19ca6SMarc Zyngier { 20641ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 20651ac19ca6SMarc Zyngier struct page *pend_page; 206611e37d35SMarc Zyngier phys_addr_t paddr; 20671ac19ca6SMarc Zyngier u64 val, tmp; 20681ac19ca6SMarc Zyngier 206911e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 20701ac19ca6SMarc Zyngier return; 20711ac19ca6SMarc Zyngier 2072c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 2073c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 2074c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 2075f842ca8eSMarc Zyngier /* 2076f842ca8eSMarc Zyngier * Check that we get the same property table on all 2077f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 2078f842ca8eSMarc Zyngier */ 2079f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 2080f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 2081f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 2082f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 2083f842ca8eSMarc Zyngier 2084c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2085c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 2086c440a9d9SMarc Zyngier 2087*5e2c9f9aSMarc Zyngier WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ)); 2088c440a9d9SMarc Zyngier its_free_pending_table(gic_data_rdist()->pend_page); 2089c440a9d9SMarc Zyngier gic_data_rdist()->pend_page = NULL; 2090c440a9d9SMarc Zyngier 2091c440a9d9SMarc Zyngier goto out; 2092c440a9d9SMarc Zyngier } 2093c440a9d9SMarc Zyngier 209411e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 20951ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 20963fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 20971ac19ca6SMarc Zyngier 20981ac19ca6SMarc Zyngier /* set PROPBASE */ 2099e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 21001ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 21012fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 21021ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 21031ac19ca6SMarc Zyngier 21040968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 21050968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 21061ac19ca6SMarc Zyngier 21071ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 2108241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 2109241a386cSMarc Zyngier /* 2110241a386cSMarc Zyngier * The HW reports non-shareable, we must 2111241a386cSMarc Zyngier * remove the cacheability attributes as 2112241a386cSMarc Zyngier * well. 2113241a386cSMarc Zyngier */ 2114241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 2115241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 2116241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 21170968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 2118241a386cSMarc Zyngier } 21191ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 21201ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 21211ac19ca6SMarc Zyngier } 21221ac19ca6SMarc Zyngier 21231ac19ca6SMarc Zyngier /* set PENDBASE */ 21241ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 21254ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 21262fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 21271ac19ca6SMarc Zyngier 21280968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 21290968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2130241a386cSMarc Zyngier 2131241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 2132241a386cSMarc Zyngier /* 2133241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 2134241a386cSMarc Zyngier * cacheability attributes as well. 2135241a386cSMarc Zyngier */ 2136241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 2137241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 2138241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 21390968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 2140241a386cSMarc Zyngier } 21411ac19ca6SMarc Zyngier 21421ac19ca6SMarc Zyngier /* Enable LPIs */ 21431ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 21441ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 21451ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 21461ac19ca6SMarc Zyngier 21471ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 21481ac19ca6SMarc Zyngier dsb(sy); 2149c440a9d9SMarc Zyngier out: 215011e37d35SMarc Zyngier gic_data_rdist()->lpi_enabled = true; 2151c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 215211e37d35SMarc Zyngier smp_processor_id(), 2153c440a9d9SMarc Zyngier gic_data_rdist()->pend_page ? "allocated" : "reserved", 215411e37d35SMarc Zyngier &paddr); 21551ac19ca6SMarc Zyngier } 21561ac19ca6SMarc Zyngier 2157920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 21581ac19ca6SMarc Zyngier { 2159920181ceSDerek Basehore int cpu = smp_processor_id(); 21601ac19ca6SMarc Zyngier u64 target; 21611ac19ca6SMarc Zyngier 2162fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 2163fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 2164fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 2165fbf8f40eSGanapatrao Kulkarni 2166fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 2167fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 2168fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 2169920181ceSDerek Basehore return; 2170fbf8f40eSGanapatrao Kulkarni } 2171fbf8f40eSGanapatrao Kulkarni 21721ac19ca6SMarc Zyngier /* 21731ac19ca6SMarc Zyngier * We now have to bind each collection to its target 21741ac19ca6SMarc Zyngier * redistributor. 21751ac19ca6SMarc Zyngier */ 2176589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 21771ac19ca6SMarc Zyngier /* 21781ac19ca6SMarc Zyngier * This ITS wants the physical address of the 21791ac19ca6SMarc Zyngier * redistributor. 21801ac19ca6SMarc Zyngier */ 21811ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 21821ac19ca6SMarc Zyngier } else { 2183920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 2184589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 2185263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 21861ac19ca6SMarc Zyngier } 21871ac19ca6SMarc Zyngier 21881ac19ca6SMarc Zyngier /* Perform collection mapping */ 21891ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 21901ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 21911ac19ca6SMarc Zyngier 21921ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 21931ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 21941ac19ca6SMarc Zyngier } 21951ac19ca6SMarc Zyngier 2196920181ceSDerek Basehore static void its_cpu_init_collections(void) 2197920181ceSDerek Basehore { 2198920181ceSDerek Basehore struct its_node *its; 2199920181ceSDerek Basehore 2200a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 2201920181ceSDerek Basehore 2202920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 2203920181ceSDerek Basehore its_cpu_init_collection(its); 2204920181ceSDerek Basehore 2205a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 22061ac19ca6SMarc Zyngier } 220784a6a2e7SMarc Zyngier 220884a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 220984a6a2e7SMarc Zyngier { 221084a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 22113e39e8f5SMarc Zyngier unsigned long flags; 221284a6a2e7SMarc Zyngier 22133e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 221484a6a2e7SMarc Zyngier 221584a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 221684a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 221784a6a2e7SMarc Zyngier its_dev = tmp; 221884a6a2e7SMarc Zyngier break; 221984a6a2e7SMarc Zyngier } 222084a6a2e7SMarc Zyngier } 222184a6a2e7SMarc Zyngier 22223e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 222384a6a2e7SMarc Zyngier 222484a6a2e7SMarc Zyngier return its_dev; 222584a6a2e7SMarc Zyngier } 222684a6a2e7SMarc Zyngier 2227466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 2228466b7d16SShanker Donthineni { 2229466b7d16SShanker Donthineni int i; 2230466b7d16SShanker Donthineni 2231466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 2232466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 2233466b7d16SShanker Donthineni return &its->tables[i]; 2234466b7d16SShanker Donthineni } 2235466b7d16SShanker Donthineni 2236466b7d16SShanker Donthineni return NULL; 2237466b7d16SShanker Donthineni } 2238466b7d16SShanker Donthineni 223970cc81edSMarc Zyngier static bool its_alloc_table_entry(struct its_baser *baser, u32 id) 22403faf24eaSShanker Donthineni { 22413faf24eaSShanker Donthineni struct page *page; 22423faf24eaSShanker Donthineni u32 esz, idx; 22433faf24eaSShanker Donthineni __le64 *table; 22443faf24eaSShanker Donthineni 22453faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 22463faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 22473faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 224870cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 22493faf24eaSShanker Donthineni 22503faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 225170cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 22523faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 22533faf24eaSShanker Donthineni return false; 22543faf24eaSShanker Donthineni 22553faf24eaSShanker Donthineni table = baser->base; 22563faf24eaSShanker Donthineni 22573faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 22583faf24eaSShanker Donthineni if (!table[idx]) { 22593faf24eaSShanker Donthineni page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(baser->psz)); 22603faf24eaSShanker Donthineni if (!page) 22613faf24eaSShanker Donthineni return false; 22623faf24eaSShanker Donthineni 22633faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 22643faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2265328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 22663faf24eaSShanker Donthineni 22673faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 22683faf24eaSShanker Donthineni 22693faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 22703faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2271328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 22723faf24eaSShanker Donthineni 22733faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 22743faf24eaSShanker Donthineni dsb(sy); 22753faf24eaSShanker Donthineni } 22763faf24eaSShanker Donthineni 22773faf24eaSShanker Donthineni return true; 22783faf24eaSShanker Donthineni } 22793faf24eaSShanker Donthineni 228070cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 228170cc81edSMarc Zyngier { 228270cc81edSMarc Zyngier struct its_baser *baser; 228370cc81edSMarc Zyngier 228470cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 228570cc81edSMarc Zyngier 228670cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 228770cc81edSMarc Zyngier if (!baser) 228870cc81edSMarc Zyngier return (ilog2(dev_id) < its->device_ids); 228970cc81edSMarc Zyngier 229070cc81edSMarc Zyngier return its_alloc_table_entry(baser, dev_id); 229170cc81edSMarc Zyngier } 229270cc81edSMarc Zyngier 22937d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 22947d75bbb4SMarc Zyngier { 22957d75bbb4SMarc Zyngier struct its_node *its; 22967d75bbb4SMarc Zyngier 22977d75bbb4SMarc Zyngier /* 22987d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 22997d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 23007d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 23017d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 23027d75bbb4SMarc Zyngier * anyway, right?). 23037d75bbb4SMarc Zyngier */ 23047d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 23057d75bbb4SMarc Zyngier struct its_baser *baser; 23067d75bbb4SMarc Zyngier 23077d75bbb4SMarc Zyngier if (!its->is_v4) 23087d75bbb4SMarc Zyngier continue; 23097d75bbb4SMarc Zyngier 23107d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 23117d75bbb4SMarc Zyngier if (!baser) 23127d75bbb4SMarc Zyngier return false; 23137d75bbb4SMarc Zyngier 23147d75bbb4SMarc Zyngier if (!its_alloc_table_entry(baser, vpe_id)) 23157d75bbb4SMarc Zyngier return false; 23167d75bbb4SMarc Zyngier } 23177d75bbb4SMarc Zyngier 23187d75bbb4SMarc Zyngier return true; 23197d75bbb4SMarc Zyngier } 23207d75bbb4SMarc Zyngier 232184a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 232293f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 232384a6a2e7SMarc Zyngier { 232484a6a2e7SMarc Zyngier struct its_device *dev; 232593f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 23263e39e8f5SMarc Zyngier unsigned long flags; 2327591e5becSMarc Zyngier u16 *col_map = NULL; 232884a6a2e7SMarc Zyngier void *itt; 232984a6a2e7SMarc Zyngier int lpi_base; 233084a6a2e7SMarc Zyngier int nr_lpis; 2331c8481267SMarc Zyngier int nr_ites; 233284a6a2e7SMarc Zyngier int sz; 233384a6a2e7SMarc Zyngier 23343faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2335466b7d16SShanker Donthineni return NULL; 2336466b7d16SShanker Donthineni 2337147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 2338147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 2339147c8f37SMarc Zyngier 234084a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2341c8481267SMarc Zyngier /* 2342147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 2343147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 2344c8481267SMarc Zyngier */ 2345147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 2346c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 234784a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 23486c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 234993f94ea0SMarc Zyngier if (alloc_lpis) { 235038dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 2351591e5becSMarc Zyngier if (lpi_map) 23526396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 235393f94ea0SMarc Zyngier GFP_KERNEL); 235493f94ea0SMarc Zyngier } else { 23556396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 235693f94ea0SMarc Zyngier nr_lpis = 0; 235793f94ea0SMarc Zyngier lpi_base = 0; 235893f94ea0SMarc Zyngier } 235984a6a2e7SMarc Zyngier 236093f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 236184a6a2e7SMarc Zyngier kfree(dev); 236284a6a2e7SMarc Zyngier kfree(itt); 236384a6a2e7SMarc Zyngier kfree(lpi_map); 2364591e5becSMarc Zyngier kfree(col_map); 236584a6a2e7SMarc Zyngier return NULL; 236684a6a2e7SMarc Zyngier } 236784a6a2e7SMarc Zyngier 2368328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 23695a9a8915SMarc Zyngier 237084a6a2e7SMarc Zyngier dev->its = its; 237184a6a2e7SMarc Zyngier dev->itt = itt; 2372c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2373591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2374591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2375591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2376591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 2377d011e4e6SMarc Zyngier mutex_init(&dev->event_map.vlpi_lock); 237884a6a2e7SMarc Zyngier dev->device_id = dev_id; 237984a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 238084a6a2e7SMarc Zyngier 23813e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 238284a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 23833e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 238484a6a2e7SMarc Zyngier 238584a6a2e7SMarc Zyngier /* Map device to its ITT */ 238684a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 238784a6a2e7SMarc Zyngier 238884a6a2e7SMarc Zyngier return dev; 238984a6a2e7SMarc Zyngier } 239084a6a2e7SMarc Zyngier 239184a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 239284a6a2e7SMarc Zyngier { 23933e39e8f5SMarc Zyngier unsigned long flags; 23943e39e8f5SMarc Zyngier 23953e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 239684a6a2e7SMarc Zyngier list_del(&its_dev->entry); 23973e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 239884a6a2e7SMarc Zyngier kfree(its_dev->itt); 239984a6a2e7SMarc Zyngier kfree(its_dev); 240084a6a2e7SMarc Zyngier } 2401b48ac83dSMarc Zyngier 2402b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 2403b48ac83dSMarc Zyngier { 2404b48ac83dSMarc Zyngier int idx; 2405b48ac83dSMarc Zyngier 2406591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 2407591e5becSMarc Zyngier dev->event_map.nr_lpis); 2408591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 2409b48ac83dSMarc Zyngier return -ENOSPC; 2410b48ac83dSMarc Zyngier 2411591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 2412591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 2413b48ac83dSMarc Zyngier 2414b48ac83dSMarc Zyngier return 0; 2415b48ac83dSMarc Zyngier } 2416b48ac83dSMarc Zyngier 241754456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 2418b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 2419b48ac83dSMarc Zyngier { 2420b48ac83dSMarc Zyngier struct its_node *its; 2421b48ac83dSMarc Zyngier struct its_device *its_dev; 242254456db9SMarc Zyngier struct msi_domain_info *msi_info; 242354456db9SMarc Zyngier u32 dev_id; 2424b48ac83dSMarc Zyngier 242554456db9SMarc Zyngier /* 242654456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 242754456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 242854456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 242954456db9SMarc Zyngier * are built on top of the ITS. 243054456db9SMarc Zyngier */ 243154456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 243254456db9SMarc Zyngier 243354456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 243454456db9SMarc Zyngier its = msi_info->data; 243554456db9SMarc Zyngier 243620b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 243720b3d54eSMarc Zyngier vpe_proxy.dev && 243820b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 243920b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 244020b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 244120b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 244220b3d54eSMarc Zyngier dev_id); 244320b3d54eSMarc Zyngier return -EINVAL; 244420b3d54eSMarc Zyngier } 244520b3d54eSMarc Zyngier 2446f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 2447e8137f4fSMarc Zyngier if (its_dev) { 2448e8137f4fSMarc Zyngier /* 2449e8137f4fSMarc Zyngier * We already have seen this ID, probably through 2450e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 2451e8137f4fSMarc Zyngier * create the device. 2452e8137f4fSMarc Zyngier */ 2453f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 2454e8137f4fSMarc Zyngier goto out; 2455e8137f4fSMarc Zyngier } 2456b48ac83dSMarc Zyngier 245793f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 2458b48ac83dSMarc Zyngier if (!its_dev) 2459b48ac83dSMarc Zyngier return -ENOMEM; 2460b48ac83dSMarc Zyngier 2461f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 2462e8137f4fSMarc Zyngier out: 2463b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 2464b48ac83dSMarc Zyngier return 0; 2465b48ac83dSMarc Zyngier } 2466b48ac83dSMarc Zyngier 246754456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 246854456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 246954456db9SMarc Zyngier }; 247054456db9SMarc Zyngier 2471b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 2472b48ac83dSMarc Zyngier unsigned int virq, 2473b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 2474b48ac83dSMarc Zyngier { 2475f833f57fSMarc Zyngier struct irq_fwspec fwspec; 2476b48ac83dSMarc Zyngier 2477f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 2478f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 2479f833f57fSMarc Zyngier fwspec.param_count = 3; 2480f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 2481f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 2482f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 24833f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 24843f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 24853f010cf1STomasz Nowicki fwspec.param_count = 2; 24863f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 24873f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 2488f833f57fSMarc Zyngier } else { 2489f833f57fSMarc Zyngier return -EINVAL; 2490f833f57fSMarc Zyngier } 2491b48ac83dSMarc Zyngier 2492f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 2493b48ac83dSMarc Zyngier } 2494b48ac83dSMarc Zyngier 2495b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 2496b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 2497b48ac83dSMarc Zyngier { 2498b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 2499b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 2500b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 2501b48ac83dSMarc Zyngier int err; 2502b48ac83dSMarc Zyngier int i; 2503b48ac83dSMarc Zyngier 2504b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2505b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 2506b48ac83dSMarc Zyngier if (err) 2507b48ac83dSMarc Zyngier return err; 2508b48ac83dSMarc Zyngier 2509b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 2510b48ac83dSMarc Zyngier if (err) 2511b48ac83dSMarc Zyngier return err; 2512b48ac83dSMarc Zyngier 2513b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 2514b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 25150d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 2516f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 2517591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 2518591e5becSMarc Zyngier (int) hwirq, virq + i); 2519b48ac83dSMarc Zyngier } 2520b48ac83dSMarc Zyngier 2521b48ac83dSMarc Zyngier return 0; 2522b48ac83dSMarc Zyngier } 2523b48ac83dSMarc Zyngier 252472491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 2525702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2526aca268dfSMarc Zyngier { 2527aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2528aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2529fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 25300d224d35SMarc Zyngier int cpu; 2531fbf8f40eSGanapatrao Kulkarni 2532fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 2533fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 2534fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 2535aca268dfSMarc Zyngier 2536591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 2537c1797b11SYang Yingliang cpu = cpumask_first_and(cpu_mask, cpu_online_mask); 2538c1797b11SYang Yingliang if (cpu >= nr_cpu_ids) { 2539c1797b11SYang Yingliang if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) 2540c1797b11SYang Yingliang return -EINVAL; 2541c1797b11SYang Yingliang 2542c1797b11SYang Yingliang cpu = cpumask_first(cpu_online_mask); 2543c1797b11SYang Yingliang } 2544c1797b11SYang Yingliang 25450d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 25460d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 2547591e5becSMarc Zyngier 2548aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 25496a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 255072491643SThomas Gleixner return 0; 2551aca268dfSMarc Zyngier } 2552aca268dfSMarc Zyngier 2553aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 2554aca268dfSMarc Zyngier struct irq_data *d) 2555aca268dfSMarc Zyngier { 2556aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2557aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2558aca268dfSMarc Zyngier 2559aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 2560aca268dfSMarc Zyngier its_send_discard(its_dev, event); 2561aca268dfSMarc Zyngier } 2562aca268dfSMarc Zyngier 2563b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 2564b48ac83dSMarc Zyngier unsigned int nr_irqs) 2565b48ac83dSMarc Zyngier { 2566b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 2567b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2568b48ac83dSMarc Zyngier int i; 2569b48ac83dSMarc Zyngier 2570b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2571b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 2572b48ac83dSMarc Zyngier virq + i); 2573aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 2574b48ac83dSMarc Zyngier 2575b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 2576591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 2577b48ac83dSMarc Zyngier 2578b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 25792da39949SMarc Zyngier irq_domain_reset_irq_data(data); 2580b48ac83dSMarc Zyngier } 2581b48ac83dSMarc Zyngier 2582b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 2583591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 2584591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 258538dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 2586cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 2587cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 2588cf2be8baSMarc Zyngier kfree(its_dev->event_map.col_map); 2589b48ac83dSMarc Zyngier 2590b48ac83dSMarc Zyngier /* Unmap device/itt */ 2591b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 2592b48ac83dSMarc Zyngier its_free_device(its_dev); 2593b48ac83dSMarc Zyngier } 2594b48ac83dSMarc Zyngier 2595b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 2596b48ac83dSMarc Zyngier } 2597b48ac83dSMarc Zyngier 2598b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 2599b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 2600b48ac83dSMarc Zyngier .free = its_irq_domain_free, 2601aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 2602aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 2603b48ac83dSMarc Zyngier }; 26044c21f3c2SMarc Zyngier 260520b3d54eSMarc Zyngier /* 260620b3d54eSMarc Zyngier * This is insane. 260720b3d54eSMarc Zyngier * 260820b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 260920b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 261020b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 261120b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 261220b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 261320b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 261420b3d54eSMarc Zyngier * 261520b3d54eSMarc Zyngier * Broken by design(tm). 261620b3d54eSMarc Zyngier */ 261720b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 261820b3d54eSMarc Zyngier { 261920b3d54eSMarc Zyngier /* Already unmapped? */ 262020b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 262120b3d54eSMarc Zyngier return; 262220b3d54eSMarc Zyngier 262320b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 262420b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 262520b3d54eSMarc Zyngier 262620b3d54eSMarc Zyngier /* 262720b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 262820b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 262920b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 263020b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 263120b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 263220b3d54eSMarc Zyngier */ 263320b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 263420b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 263520b3d54eSMarc Zyngier 263620b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 263720b3d54eSMarc Zyngier } 263820b3d54eSMarc Zyngier 263920b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 264020b3d54eSMarc Zyngier { 264120b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 264220b3d54eSMarc Zyngier unsigned long flags; 264320b3d54eSMarc Zyngier 264420b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 264520b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 264620b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 264720b3d54eSMarc Zyngier } 264820b3d54eSMarc Zyngier } 264920b3d54eSMarc Zyngier 265020b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 265120b3d54eSMarc Zyngier { 265220b3d54eSMarc Zyngier /* Already mapped? */ 265320b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 265420b3d54eSMarc Zyngier return; 265520b3d54eSMarc Zyngier 265620b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 265720b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 265820b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 265920b3d54eSMarc Zyngier 266020b3d54eSMarc Zyngier /* Map the new VPE instead */ 266120b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 266220b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 266320b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 266420b3d54eSMarc Zyngier 266520b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 266620b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 266720b3d54eSMarc Zyngier } 266820b3d54eSMarc Zyngier 2669958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 2670958b90d1SMarc Zyngier { 2671958b90d1SMarc Zyngier unsigned long flags; 2672958b90d1SMarc Zyngier struct its_collection *target_col; 2673958b90d1SMarc Zyngier 2674958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2675958b90d1SMarc Zyngier void __iomem *rdbase; 2676958b90d1SMarc Zyngier 2677958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 2678958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2679958b90d1SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2680958b90d1SMarc Zyngier cpu_relax(); 2681958b90d1SMarc Zyngier 2682958b90d1SMarc Zyngier return; 2683958b90d1SMarc Zyngier } 2684958b90d1SMarc Zyngier 2685958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 2686958b90d1SMarc Zyngier 2687958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 2688958b90d1SMarc Zyngier 2689958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 2690958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 2691958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 2692958b90d1SMarc Zyngier 2693958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 2694958b90d1SMarc Zyngier } 2695958b90d1SMarc Zyngier 26963171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 26973171a47aSMarc Zyngier const struct cpumask *mask_val, 26983171a47aSMarc Zyngier bool force) 26993171a47aSMarc Zyngier { 27003171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 27013171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 27023171a47aSMarc Zyngier 27033171a47aSMarc Zyngier /* 27043171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 270520b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 2706958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 2707958b90d1SMarc Zyngier * interrupt to its new location. 27083171a47aSMarc Zyngier */ 27093171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 2710958b90d1SMarc Zyngier int from = vpe->col_idx; 2711958b90d1SMarc Zyngier 27123171a47aSMarc Zyngier vpe->col_idx = cpu; 27133171a47aSMarc Zyngier its_send_vmovp(vpe); 2714958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 27153171a47aSMarc Zyngier } 27163171a47aSMarc Zyngier 271744c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 271844c4c25eSMarc Zyngier 27193171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 27203171a47aSMarc Zyngier } 27213171a47aSMarc Zyngier 2722e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 2723e643d803SMarc Zyngier { 272450c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2725e643d803SMarc Zyngier u64 val; 2726e643d803SMarc Zyngier 2727e643d803SMarc Zyngier /* Schedule the VPE */ 2728e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 2729e643d803SMarc Zyngier GENMASK_ULL(51, 12); 2730e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 2731e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 2732e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 2733e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 2734e643d803SMarc Zyngier 2735e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 2736e643d803SMarc Zyngier GENMASK_ULL(51, 16); 2737e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 2738e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 2739e643d803SMarc Zyngier /* 2740e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 2741e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 2742e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 2743e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 2744e643d803SMarc Zyngier * that the pending table is empty. A good implementation 2745e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 2746e643d803SMarc Zyngier * making this a tolerable issue. 2747e643d803SMarc Zyngier */ 2748e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2749e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 2750e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 2751e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2752e643d803SMarc Zyngier } 2753e643d803SMarc Zyngier 2754e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 2755e643d803SMarc Zyngier { 275650c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2757e643d803SMarc Zyngier u32 count = 1000000; /* 1s! */ 2758e643d803SMarc Zyngier bool clean; 2759e643d803SMarc Zyngier u64 val; 2760e643d803SMarc Zyngier 2761e643d803SMarc Zyngier /* We're being scheduled out */ 2762e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2763e643d803SMarc Zyngier val &= ~GICR_VPENDBASER_Valid; 2764e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2765e643d803SMarc Zyngier 2766e643d803SMarc Zyngier do { 2767e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2768e643d803SMarc Zyngier clean = !(val & GICR_VPENDBASER_Dirty); 2769e643d803SMarc Zyngier if (!clean) { 2770e643d803SMarc Zyngier count--; 2771e643d803SMarc Zyngier cpu_relax(); 2772e643d803SMarc Zyngier udelay(1); 2773e643d803SMarc Zyngier } 2774e643d803SMarc Zyngier } while (!clean && count); 2775e643d803SMarc Zyngier 2776e643d803SMarc Zyngier if (unlikely(!clean && !count)) { 2777e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2778e643d803SMarc Zyngier vpe->idai = false; 2779e643d803SMarc Zyngier vpe->pending_last = true; 2780e643d803SMarc Zyngier } else { 2781e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 2782e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 2783e643d803SMarc Zyngier } 2784e643d803SMarc Zyngier } 2785e643d803SMarc Zyngier 278640619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 278740619a2eSMarc Zyngier { 278840619a2eSMarc Zyngier struct its_node *its; 278940619a2eSMarc Zyngier 279040619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 279140619a2eSMarc Zyngier if (!its->is_v4) 279240619a2eSMarc Zyngier continue; 279340619a2eSMarc Zyngier 27942247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 27952247e1bfSMarc Zyngier continue; 27962247e1bfSMarc Zyngier 27973c1cceebSMarc Zyngier /* 27983c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 27993c1cceebSMarc Zyngier * we need is to reach the redistributors. 28003c1cceebSMarc Zyngier */ 280140619a2eSMarc Zyngier its_send_vinvall(its, vpe); 28023c1cceebSMarc Zyngier return; 280340619a2eSMarc Zyngier } 280440619a2eSMarc Zyngier } 280540619a2eSMarc Zyngier 2806e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 2807e643d803SMarc Zyngier { 2808e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2809e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 2810e643d803SMarc Zyngier 2811e643d803SMarc Zyngier switch (info->cmd_type) { 2812e643d803SMarc Zyngier case SCHEDULE_VPE: 2813e643d803SMarc Zyngier its_vpe_schedule(vpe); 2814e643d803SMarc Zyngier return 0; 2815e643d803SMarc Zyngier 2816e643d803SMarc Zyngier case DESCHEDULE_VPE: 2817e643d803SMarc Zyngier its_vpe_deschedule(vpe); 2818e643d803SMarc Zyngier return 0; 2819e643d803SMarc Zyngier 28205e2f7642SMarc Zyngier case INVALL_VPE: 282140619a2eSMarc Zyngier its_vpe_invall(vpe); 28225e2f7642SMarc Zyngier return 0; 28235e2f7642SMarc Zyngier 2824e643d803SMarc Zyngier default: 2825e643d803SMarc Zyngier return -EINVAL; 2826e643d803SMarc Zyngier } 2827e643d803SMarc Zyngier } 2828e643d803SMarc Zyngier 282920b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 283020b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 283120b3d54eSMarc Zyngier { 283220b3d54eSMarc Zyngier unsigned long flags; 283320b3d54eSMarc Zyngier 283420b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 283520b3d54eSMarc Zyngier 283620b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 283720b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 283820b3d54eSMarc Zyngier 283920b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 284020b3d54eSMarc Zyngier } 284120b3d54eSMarc Zyngier 2842f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 2843f6a91da7SMarc Zyngier { 2844f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 284520b3d54eSMarc Zyngier 284620b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 2847f6a91da7SMarc Zyngier void __iomem *rdbase; 2848f6a91da7SMarc Zyngier 2849f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2850f6a91da7SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_INVLPIR); 2851f6a91da7SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2852f6a91da7SMarc Zyngier cpu_relax(); 285320b3d54eSMarc Zyngier } else { 285420b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 285520b3d54eSMarc Zyngier } 2856f6a91da7SMarc Zyngier } 2857f6a91da7SMarc Zyngier 2858f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 2859f6a91da7SMarc Zyngier { 2860f6a91da7SMarc Zyngier /* 2861f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 2862f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 2863f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 2864f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 2865f6a91da7SMarc Zyngier */ 2866f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 2867f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2868f6a91da7SMarc Zyngier } 2869f6a91da7SMarc Zyngier 2870f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 2871f6a91da7SMarc Zyngier { 2872f6a91da7SMarc Zyngier /* Same hack as above... */ 2873f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 2874f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2875f6a91da7SMarc Zyngier } 2876f6a91da7SMarc Zyngier 2877e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 2878e57a3e28SMarc Zyngier enum irqchip_irq_state which, 2879e57a3e28SMarc Zyngier bool state) 2880e57a3e28SMarc Zyngier { 2881e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2882e57a3e28SMarc Zyngier 2883e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 2884e57a3e28SMarc Zyngier return -EINVAL; 2885e57a3e28SMarc Zyngier 2886e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2887e57a3e28SMarc Zyngier void __iomem *rdbase; 2888e57a3e28SMarc Zyngier 2889e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2890e57a3e28SMarc Zyngier if (state) { 2891e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 2892e57a3e28SMarc Zyngier } else { 2893e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2894e57a3e28SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2895e57a3e28SMarc Zyngier cpu_relax(); 2896e57a3e28SMarc Zyngier } 2897e57a3e28SMarc Zyngier } else { 2898e57a3e28SMarc Zyngier if (state) 2899e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 2900e57a3e28SMarc Zyngier else 2901e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 2902e57a3e28SMarc Zyngier } 2903e57a3e28SMarc Zyngier 2904e57a3e28SMarc Zyngier return 0; 2905e57a3e28SMarc Zyngier } 2906e57a3e28SMarc Zyngier 29078fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 29088fff27aeSMarc Zyngier .name = "GICv4-vpe", 2909f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 2910f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 2911f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 29123171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 2913e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 2914e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 29158fff27aeSMarc Zyngier }; 29168fff27aeSMarc Zyngier 29177d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 29187d75bbb4SMarc Zyngier { 291932bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 29207d75bbb4SMarc Zyngier } 29217d75bbb4SMarc Zyngier 29227d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 29237d75bbb4SMarc Zyngier { 29247d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 29257d75bbb4SMarc Zyngier } 29267d75bbb4SMarc Zyngier 29277d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 29287d75bbb4SMarc Zyngier { 29297d75bbb4SMarc Zyngier struct page *vpt_page; 29307d75bbb4SMarc Zyngier int vpe_id; 29317d75bbb4SMarc Zyngier 29327d75bbb4SMarc Zyngier /* Allocate vpe_id */ 29337d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 29347d75bbb4SMarc Zyngier if (vpe_id < 0) 29357d75bbb4SMarc Zyngier return vpe_id; 29367d75bbb4SMarc Zyngier 29377d75bbb4SMarc Zyngier /* Allocate VPT */ 29387d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 29397d75bbb4SMarc Zyngier if (!vpt_page) { 29407d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 29417d75bbb4SMarc Zyngier return -ENOMEM; 29427d75bbb4SMarc Zyngier } 29437d75bbb4SMarc Zyngier 29447d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 29457d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 29467d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 29477d75bbb4SMarc Zyngier return -ENOMEM; 29487d75bbb4SMarc Zyngier } 29497d75bbb4SMarc Zyngier 29507d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 29517d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 295220b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 29537d75bbb4SMarc Zyngier 29547d75bbb4SMarc Zyngier return 0; 29557d75bbb4SMarc Zyngier } 29567d75bbb4SMarc Zyngier 29577d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 29587d75bbb4SMarc Zyngier { 295920b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 29607d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 29617d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 29627d75bbb4SMarc Zyngier } 29637d75bbb4SMarc Zyngier 29647d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 29657d75bbb4SMarc Zyngier unsigned int virq, 29667d75bbb4SMarc Zyngier unsigned int nr_irqs) 29677d75bbb4SMarc Zyngier { 29687d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 29697d75bbb4SMarc Zyngier int i; 29707d75bbb4SMarc Zyngier 29717d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 29727d75bbb4SMarc Zyngier 29737d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 29747d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 29757d75bbb4SMarc Zyngier virq + i); 29767d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 29777d75bbb4SMarc Zyngier 29787d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 29797d75bbb4SMarc Zyngier 29807d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 29817d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 29827d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 29837d75bbb4SMarc Zyngier } 29847d75bbb4SMarc Zyngier 29857d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 298638dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 29877d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 29887d75bbb4SMarc Zyngier } 29897d75bbb4SMarc Zyngier } 29907d75bbb4SMarc Zyngier 29917d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 29927d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 29937d75bbb4SMarc Zyngier { 29947d75bbb4SMarc Zyngier struct its_vm *vm = args; 29957d75bbb4SMarc Zyngier unsigned long *bitmap; 29967d75bbb4SMarc Zyngier struct page *vprop_page; 29977d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 29987d75bbb4SMarc Zyngier 29997d75bbb4SMarc Zyngier BUG_ON(!vm); 30007d75bbb4SMarc Zyngier 300138dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 30027d75bbb4SMarc Zyngier if (!bitmap) 30037d75bbb4SMarc Zyngier return -ENOMEM; 30047d75bbb4SMarc Zyngier 30057d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 300638dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 30077d75bbb4SMarc Zyngier return -ENOMEM; 30087d75bbb4SMarc Zyngier } 30097d75bbb4SMarc Zyngier 30107d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 30117d75bbb4SMarc Zyngier if (!vprop_page) { 301238dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 30137d75bbb4SMarc Zyngier return -ENOMEM; 30147d75bbb4SMarc Zyngier } 30157d75bbb4SMarc Zyngier 30167d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 30177d75bbb4SMarc Zyngier vm->db_lpi_base = base; 30187d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 30197d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 30207d75bbb4SMarc Zyngier 30217d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 30227d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 30237d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 30247d75bbb4SMarc Zyngier if (err) 30257d75bbb4SMarc Zyngier break; 30267d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 30277d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 30287d75bbb4SMarc Zyngier if (err) 30297d75bbb4SMarc Zyngier break; 30307d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 30317d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 30327d75bbb4SMarc Zyngier set_bit(i, bitmap); 30337d75bbb4SMarc Zyngier } 30347d75bbb4SMarc Zyngier 30357d75bbb4SMarc Zyngier if (err) { 30367d75bbb4SMarc Zyngier if (i > 0) 30377d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 30387d75bbb4SMarc Zyngier 303938dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 30407d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 30417d75bbb4SMarc Zyngier } 30427d75bbb4SMarc Zyngier 30437d75bbb4SMarc Zyngier return err; 30447d75bbb4SMarc Zyngier } 30457d75bbb4SMarc Zyngier 304672491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 3047702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3048eb78192bSMarc Zyngier { 3049eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 305040619a2eSMarc Zyngier struct its_node *its; 3051eb78192bSMarc Zyngier 30522247e1bfSMarc Zyngier /* If we use the list map, we issue VMAPP on demand... */ 30532247e1bfSMarc Zyngier if (its_list_map) 30546ef930f2SMarc Zyngier return 0; 3055eb78192bSMarc Zyngier 3056eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 3057eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 305840619a2eSMarc Zyngier 305940619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 306040619a2eSMarc Zyngier if (!its->is_v4) 306140619a2eSMarc Zyngier continue; 306240619a2eSMarc Zyngier 306375fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 306440619a2eSMarc Zyngier its_send_vinvall(its, vpe); 306540619a2eSMarc Zyngier } 306640619a2eSMarc Zyngier 306744c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 306844c4c25eSMarc Zyngier 306972491643SThomas Gleixner return 0; 3070eb78192bSMarc Zyngier } 3071eb78192bSMarc Zyngier 3072eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 3073eb78192bSMarc Zyngier struct irq_data *d) 3074eb78192bSMarc Zyngier { 3075eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 307675fd951bSMarc Zyngier struct its_node *its; 3077eb78192bSMarc Zyngier 30782247e1bfSMarc Zyngier /* 30792247e1bfSMarc Zyngier * If we use the list map, we unmap the VPE once no VLPIs are 30802247e1bfSMarc Zyngier * associated with the VM. 30812247e1bfSMarc Zyngier */ 30822247e1bfSMarc Zyngier if (its_list_map) 30832247e1bfSMarc Zyngier return; 30842247e1bfSMarc Zyngier 308575fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 308675fd951bSMarc Zyngier if (!its->is_v4) 308775fd951bSMarc Zyngier continue; 308875fd951bSMarc Zyngier 308975fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 309075fd951bSMarc Zyngier } 3091eb78192bSMarc Zyngier } 3092eb78192bSMarc Zyngier 30938fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 30947d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 30957d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 3096eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 3097eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 30988fff27aeSMarc Zyngier }; 30998fff27aeSMarc Zyngier 31004559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 31014559fbb3SYun Wu { 31024559fbb3SYun Wu u32 count = 1000000; /* 1s */ 31034559fbb3SYun Wu u32 val; 31044559fbb3SYun Wu 31054559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 31067611da86SDavid Daney /* 31077611da86SDavid Daney * GIC architecture specification requires the ITS to be both 31087611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 31097611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 31107611da86SDavid Daney */ 31117611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 31124559fbb3SYun Wu return 0; 31134559fbb3SYun Wu 31144559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 3115d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 31164559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 31174559fbb3SYun Wu 31184559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 31194559fbb3SYun Wu while (1) { 31204559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 31214559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 31224559fbb3SYun Wu return 0; 31234559fbb3SYun Wu 31244559fbb3SYun Wu count--; 31254559fbb3SYun Wu if (!count) 31264559fbb3SYun Wu return -EBUSY; 31274559fbb3SYun Wu 31284559fbb3SYun Wu cpu_relax(); 31294559fbb3SYun Wu udelay(1); 31304559fbb3SYun Wu } 31314559fbb3SYun Wu } 31324559fbb3SYun Wu 31339d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 313494100970SRobert Richter { 313594100970SRobert Richter struct its_node *its = data; 313694100970SRobert Richter 3137fa150019SArd Biesheuvel /* erratum 22375: only alloc 8MB table size */ 3138fa150019SArd Biesheuvel its->device_ids = 0x14; /* 20 bits, 8MB */ 313994100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 31409d111d49SArd Biesheuvel 31419d111d49SArd Biesheuvel return true; 314294100970SRobert Richter } 314394100970SRobert Richter 31449d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 3145fbf8f40eSGanapatrao Kulkarni { 3146fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 3147fbf8f40eSGanapatrao Kulkarni 3148fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 31499d111d49SArd Biesheuvel 31509d111d49SArd Biesheuvel return true; 3151fbf8f40eSGanapatrao Kulkarni } 3152fbf8f40eSGanapatrao Kulkarni 31539d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 315490922a2dSShanker Donthineni { 315590922a2dSShanker Donthineni struct its_node *its = data; 315690922a2dSShanker Donthineni 315790922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 315890922a2dSShanker Donthineni its->ite_size = 16; 31599d111d49SArd Biesheuvel 31609d111d49SArd Biesheuvel return true; 316190922a2dSShanker Donthineni } 316290922a2dSShanker Donthineni 3163558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 3164558b0165SArd Biesheuvel { 3165558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 3166558b0165SArd Biesheuvel 3167558b0165SArd Biesheuvel /* 3168558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 3169558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 3170558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 3171558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 3172558b0165SArd Biesheuvel * the window offset. 3173558b0165SArd Biesheuvel */ 3174558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 3175558b0165SArd Biesheuvel } 3176558b0165SArd Biesheuvel 3177558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 3178558b0165SArd Biesheuvel { 3179558b0165SArd Biesheuvel struct its_node *its = data; 3180558b0165SArd Biesheuvel u32 pre_its_window[2]; 3181558b0165SArd Biesheuvel u32 ids; 3182558b0165SArd Biesheuvel 3183558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 3184558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 3185558b0165SArd Biesheuvel pre_its_window, 3186558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 3187558b0165SArd Biesheuvel 3188558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 3189558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 3190558b0165SArd Biesheuvel 3191558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 3192558b0165SArd Biesheuvel if (its->device_ids > ids) 3193558b0165SArd Biesheuvel its->device_ids = ids; 3194558b0165SArd Biesheuvel 3195558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 3196558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 3197558b0165SArd Biesheuvel return true; 3198558b0165SArd Biesheuvel } 3199558b0165SArd Biesheuvel return false; 3200558b0165SArd Biesheuvel } 3201558b0165SArd Biesheuvel 32025c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 32035c9a882eSMarc Zyngier { 32045c9a882eSMarc Zyngier struct its_node *its = data; 32055c9a882eSMarc Zyngier 32065c9a882eSMarc Zyngier /* 32075c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 32085c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 32095c9a882eSMarc Zyngier */ 32105c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 32115c9a882eSMarc Zyngier return true; 3212cc2d3216SMarc Zyngier } 32134c21f3c2SMarc Zyngier 321467510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 321594100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 321694100970SRobert Richter { 321794100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 321894100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 321994100970SRobert Richter .mask = 0xffff0fff, 322094100970SRobert Richter .init = its_enable_quirk_cavium_22375, 322194100970SRobert Richter }, 322294100970SRobert Richter #endif 3223fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 3224fbf8f40eSGanapatrao Kulkarni { 3225fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 3226fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 3227fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 3228fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 3229fbf8f40eSGanapatrao Kulkarni }, 3230fbf8f40eSGanapatrao Kulkarni #endif 323190922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 323290922a2dSShanker Donthineni { 323390922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 323490922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 323590922a2dSShanker Donthineni .mask = 0xffffffff, 323690922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 323790922a2dSShanker Donthineni }, 323890922a2dSShanker Donthineni #endif 3239558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 3240558b0165SArd Biesheuvel { 3241558b0165SArd Biesheuvel /* 3242558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 3243558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 3244558b0165SArd Biesheuvel * special handling in software. 3245558b0165SArd Biesheuvel */ 3246558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 3247558b0165SArd Biesheuvel .iidr = 0x0001143b, 3248558b0165SArd Biesheuvel .mask = 0xffffffff, 3249558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 3250558b0165SArd Biesheuvel }, 3251558b0165SArd Biesheuvel #endif 32525c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 32535c9a882eSMarc Zyngier { 32545c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 32555c9a882eSMarc Zyngier .iidr = 0x00000004, 32565c9a882eSMarc Zyngier .mask = 0xffffffff, 32575c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 32585c9a882eSMarc Zyngier }, 32595c9a882eSMarc Zyngier #endif 326067510ccaSRobert Richter { 326167510ccaSRobert Richter } 326267510ccaSRobert Richter }; 326367510ccaSRobert Richter 326467510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 326567510ccaSRobert Richter { 326667510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 326767510ccaSRobert Richter 326867510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 326967510ccaSRobert Richter } 327067510ccaSRobert Richter 3271dba0bc7bSDerek Basehore static int its_save_disable(void) 3272dba0bc7bSDerek Basehore { 3273dba0bc7bSDerek Basehore struct its_node *its; 3274dba0bc7bSDerek Basehore int err = 0; 3275dba0bc7bSDerek Basehore 3276a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3277dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3278dba0bc7bSDerek Basehore void __iomem *base; 3279dba0bc7bSDerek Basehore 3280dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3281dba0bc7bSDerek Basehore continue; 3282dba0bc7bSDerek Basehore 3283dba0bc7bSDerek Basehore base = its->base; 3284dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 3285dba0bc7bSDerek Basehore err = its_force_quiescent(base); 3286dba0bc7bSDerek Basehore if (err) { 3287dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 3288dba0bc7bSDerek Basehore &its->phys_base, err); 3289dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3290dba0bc7bSDerek Basehore goto err; 3291dba0bc7bSDerek Basehore } 3292dba0bc7bSDerek Basehore 3293dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 3294dba0bc7bSDerek Basehore } 3295dba0bc7bSDerek Basehore 3296dba0bc7bSDerek Basehore err: 3297dba0bc7bSDerek Basehore if (err) { 3298dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 3299dba0bc7bSDerek Basehore void __iomem *base; 3300dba0bc7bSDerek Basehore 3301dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3302dba0bc7bSDerek Basehore continue; 3303dba0bc7bSDerek Basehore 3304dba0bc7bSDerek Basehore base = its->base; 3305dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3306dba0bc7bSDerek Basehore } 3307dba0bc7bSDerek Basehore } 3308a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3309dba0bc7bSDerek Basehore 3310dba0bc7bSDerek Basehore return err; 3311dba0bc7bSDerek Basehore } 3312dba0bc7bSDerek Basehore 3313dba0bc7bSDerek Basehore static void its_restore_enable(void) 3314dba0bc7bSDerek Basehore { 3315dba0bc7bSDerek Basehore struct its_node *its; 3316dba0bc7bSDerek Basehore int ret; 3317dba0bc7bSDerek Basehore 3318a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3319dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3320dba0bc7bSDerek Basehore void __iomem *base; 3321dba0bc7bSDerek Basehore int i; 3322dba0bc7bSDerek Basehore 3323dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3324dba0bc7bSDerek Basehore continue; 3325dba0bc7bSDerek Basehore 3326dba0bc7bSDerek Basehore base = its->base; 3327dba0bc7bSDerek Basehore 3328dba0bc7bSDerek Basehore /* 3329dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 3330dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 3331dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 3332dba0bc7bSDerek Basehore * Specification. 3333dba0bc7bSDerek Basehore */ 3334dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 3335dba0bc7bSDerek Basehore if (ret) { 3336dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 3337dba0bc7bSDerek Basehore &its->phys_base, ret); 3338dba0bc7bSDerek Basehore continue; 3339dba0bc7bSDerek Basehore } 3340dba0bc7bSDerek Basehore 3341dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 3342dba0bc7bSDerek Basehore 3343dba0bc7bSDerek Basehore /* 3344dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 3345dba0bc7bSDerek Basehore * cmd_write line up with it. 3346dba0bc7bSDerek Basehore */ 3347dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 3348dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 3349dba0bc7bSDerek Basehore 3350dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 3351dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3352dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 3353dba0bc7bSDerek Basehore 3354dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 3355dba0bc7bSDerek Basehore continue; 3356dba0bc7bSDerek Basehore 3357dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 3358dba0bc7bSDerek Basehore } 3359dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3360920181ceSDerek Basehore 3361920181ceSDerek Basehore /* 3362920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 3363920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 3364920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 3365920181ceSDerek Basehore */ 3366920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 3367920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 3368920181ceSDerek Basehore its_cpu_init_collection(its); 3369dba0bc7bSDerek Basehore } 3370a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3371dba0bc7bSDerek Basehore } 3372dba0bc7bSDerek Basehore 3373dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 3374dba0bc7bSDerek Basehore .suspend = its_save_disable, 3375dba0bc7bSDerek Basehore .resume = its_restore_enable, 3376dba0bc7bSDerek Basehore }; 3377dba0bc7bSDerek Basehore 3378db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 3379d14ae5e6STomasz Nowicki { 3380d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 3381d14ae5e6STomasz Nowicki struct msi_domain_info *info; 3382d14ae5e6STomasz Nowicki 3383d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 3384d14ae5e6STomasz Nowicki if (!info) 3385d14ae5e6STomasz Nowicki return -ENOMEM; 3386d14ae5e6STomasz Nowicki 3387db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 3388d14ae5e6STomasz Nowicki if (!inner_domain) { 3389d14ae5e6STomasz Nowicki kfree(info); 3390d14ae5e6STomasz Nowicki return -ENOMEM; 3391d14ae5e6STomasz Nowicki } 3392d14ae5e6STomasz Nowicki 3393db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 339496f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 3395558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 3396d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 3397d14ae5e6STomasz Nowicki info->data = its; 3398d14ae5e6STomasz Nowicki inner_domain->host_data = info; 3399d14ae5e6STomasz Nowicki 3400d14ae5e6STomasz Nowicki return 0; 3401d14ae5e6STomasz Nowicki } 3402d14ae5e6STomasz Nowicki 34038fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 34048fff27aeSMarc Zyngier { 340520b3d54eSMarc Zyngier struct its_node *its; 340620b3d54eSMarc Zyngier u32 devid; 340720b3d54eSMarc Zyngier int entries; 340820b3d54eSMarc Zyngier 340920b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 341020b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 341120b3d54eSMarc Zyngier return 0; 341220b3d54eSMarc Zyngier } 341320b3d54eSMarc Zyngier 341420b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 341520b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 341620b3d54eSMarc Zyngier 341720b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 34186396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 341920b3d54eSMarc Zyngier GFP_KERNEL); 342020b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 342120b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 342220b3d54eSMarc Zyngier return -ENOMEM; 342320b3d54eSMarc Zyngier } 342420b3d54eSMarc Zyngier 342520b3d54eSMarc Zyngier /* Use the last possible DevID */ 342620b3d54eSMarc Zyngier devid = GENMASK(its->device_ids - 1, 0); 342720b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 342820b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 342920b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 343020b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 343120b3d54eSMarc Zyngier return -ENOMEM; 343220b3d54eSMarc Zyngier } 343320b3d54eSMarc Zyngier 3434c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 343520b3d54eSMarc Zyngier 343620b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 343720b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 343820b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 343920b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 344020b3d54eSMarc Zyngier 34418fff27aeSMarc Zyngier return 0; 34428fff27aeSMarc Zyngier } 34438fff27aeSMarc Zyngier 34443dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 34453dfa576bSMarc Zyngier void __iomem *its_base) 34463dfa576bSMarc Zyngier { 34473dfa576bSMarc Zyngier int its_number; 34483dfa576bSMarc Zyngier u32 ctlr; 34493dfa576bSMarc Zyngier 34503dfa576bSMarc Zyngier /* 34513dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 34523dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 34533dfa576bSMarc Zyngier * locking. Should this change, we should address 34543dfa576bSMarc Zyngier * this. 34553dfa576bSMarc Zyngier */ 3456ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 3457ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 34583dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 34593dfa576bSMarc Zyngier &res->start); 34603dfa576bSMarc Zyngier return -EINVAL; 34613dfa576bSMarc Zyngier } 34623dfa576bSMarc Zyngier 34633dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 34643dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 34653dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 34663dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 34673dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 34683dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 34693dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 34703dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 34713dfa576bSMarc Zyngier } 34723dfa576bSMarc Zyngier 34733dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 34743dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 34753dfa576bSMarc Zyngier &res->start, its_number); 34763dfa576bSMarc Zyngier return -EINVAL; 34773dfa576bSMarc Zyngier } 34783dfa576bSMarc Zyngier 34793dfa576bSMarc Zyngier return its_number; 34803dfa576bSMarc Zyngier } 34813dfa576bSMarc Zyngier 3482db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 3483db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 34844c21f3c2SMarc Zyngier { 34854c21f3c2SMarc Zyngier struct its_node *its; 34864c21f3c2SMarc Zyngier void __iomem *its_base; 34873dfa576bSMarc Zyngier u32 val, ctlr; 34883dfa576bSMarc Zyngier u64 baser, tmp, typer; 34894c21f3c2SMarc Zyngier int err; 34904c21f3c2SMarc Zyngier 3491db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 34924c21f3c2SMarc Zyngier if (!its_base) { 3493db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 34944c21f3c2SMarc Zyngier return -ENOMEM; 34954c21f3c2SMarc Zyngier } 34964c21f3c2SMarc Zyngier 34974c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 34984c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 3499db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 35004c21f3c2SMarc Zyngier err = -ENODEV; 35014c21f3c2SMarc Zyngier goto out_unmap; 35024c21f3c2SMarc Zyngier } 35034c21f3c2SMarc Zyngier 35044559fbb3SYun Wu err = its_force_quiescent(its_base); 35054559fbb3SYun Wu if (err) { 3506db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 35074559fbb3SYun Wu goto out_unmap; 35084559fbb3SYun Wu } 35094559fbb3SYun Wu 3510db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 35114c21f3c2SMarc Zyngier 35124c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 35134c21f3c2SMarc Zyngier if (!its) { 35144c21f3c2SMarc Zyngier err = -ENOMEM; 35154c21f3c2SMarc Zyngier goto out_unmap; 35164c21f3c2SMarc Zyngier } 35174c21f3c2SMarc Zyngier 35184c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 35194c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 35204c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 35213dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 35224c21f3c2SMarc Zyngier its->base = its_base; 3523db40f0a7STomasz Nowicki its->phys_base = res->start; 35243dfa576bSMarc Zyngier its->ite_size = GITS_TYPER_ITT_ENTRY_SIZE(typer); 3525fa150019SArd Biesheuvel its->device_ids = GITS_TYPER_DEVBITS(typer); 35263dfa576bSMarc Zyngier its->is_v4 = !!(typer & GITS_TYPER_VLPIS); 35273dfa576bSMarc Zyngier if (its->is_v4) { 35283dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 35293dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 35303dfa576bSMarc Zyngier if (err < 0) 35313dfa576bSMarc Zyngier goto out_free_its; 35323dfa576bSMarc Zyngier 3533debf6d02SMarc Zyngier its->list_nr = err; 3534debf6d02SMarc Zyngier 35353dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 35363dfa576bSMarc Zyngier &res->start, err); 35373dfa576bSMarc Zyngier } else { 35383dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 35393dfa576bSMarc Zyngier } 35403dfa576bSMarc Zyngier } 35413dfa576bSMarc Zyngier 3542db40f0a7STomasz Nowicki its->numa_node = numa_node; 35434c21f3c2SMarc Zyngier 35445bc13c2cSRobert Richter its->cmd_base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 35455bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 35464c21f3c2SMarc Zyngier if (!its->cmd_base) { 35474c21f3c2SMarc Zyngier err = -ENOMEM; 35484c21f3c2SMarc Zyngier goto out_free_its; 35494c21f3c2SMarc Zyngier } 35504c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 3551558b0165SArd Biesheuvel its->fwnode_handle = handle; 3552558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 3553558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 35544c21f3c2SMarc Zyngier 355567510ccaSRobert Richter its_enable_quirks(its); 355667510ccaSRobert Richter 35570e0b0f69SShanker Donthineni err = its_alloc_tables(its); 35584c21f3c2SMarc Zyngier if (err) 35594c21f3c2SMarc Zyngier goto out_free_cmd; 35604c21f3c2SMarc Zyngier 35614c21f3c2SMarc Zyngier err = its_alloc_collections(its); 35624c21f3c2SMarc Zyngier if (err) 35634c21f3c2SMarc Zyngier goto out_free_tables; 35644c21f3c2SMarc Zyngier 35654c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 35662fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 35674c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 35684c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 35694c21f3c2SMarc Zyngier GITS_CBASER_VALID); 35704c21f3c2SMarc Zyngier 35710968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 35720968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 35734c21f3c2SMarc Zyngier 35744ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 3575241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 3576241a386cSMarc Zyngier /* 3577241a386cSMarc Zyngier * The HW reports non-shareable, we must 3578241a386cSMarc Zyngier * remove the cacheability attributes as 3579241a386cSMarc Zyngier * well. 3580241a386cSMarc Zyngier */ 3581241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 3582241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 3583241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 35840968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 3585241a386cSMarc Zyngier } 35864c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 35874c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 35884c21f3c2SMarc Zyngier } 35894c21f3c2SMarc Zyngier 35900968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 35913dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 3592d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 3593d51c4b4dSMarc Zyngier if (its->is_v4) 3594d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 3595d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 3596241a386cSMarc Zyngier 3597dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 3598dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 3599dba0bc7bSDerek Basehore 3600db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 3601d14ae5e6STomasz Nowicki if (err) 360254456db9SMarc Zyngier goto out_free_tables; 36034c21f3c2SMarc Zyngier 3604a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 36054c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 3606a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 36074c21f3c2SMarc Zyngier 36084c21f3c2SMarc Zyngier return 0; 36094c21f3c2SMarc Zyngier 36104c21f3c2SMarc Zyngier out_free_tables: 36114c21f3c2SMarc Zyngier its_free_tables(its); 36124c21f3c2SMarc Zyngier out_free_cmd: 36135bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 36144c21f3c2SMarc Zyngier out_free_its: 36154c21f3c2SMarc Zyngier kfree(its); 36164c21f3c2SMarc Zyngier out_unmap: 36174c21f3c2SMarc Zyngier iounmap(its_base); 3618db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 36194c21f3c2SMarc Zyngier return err; 36204c21f3c2SMarc Zyngier } 36214c21f3c2SMarc Zyngier 36224c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 36234c21f3c2SMarc Zyngier { 3624589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 36254c21f3c2SMarc Zyngier } 36264c21f3c2SMarc Zyngier 36276eb486b6SShanker Donthineni static int redist_disable_lpis(void) 36284c21f3c2SMarc Zyngier { 36296eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 36306eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 36316eb486b6SShanker Donthineni u64 val; 36326eb486b6SShanker Donthineni 36334c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 36344c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 36354c21f3c2SMarc Zyngier return -ENXIO; 36364c21f3c2SMarc Zyngier } 36376eb486b6SShanker Donthineni 36386eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 36396eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 36406eb486b6SShanker Donthineni return 0; 36416eb486b6SShanker Donthineni 364211e37d35SMarc Zyngier /* 364311e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 364411e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 364511e37d35SMarc Zyngier * configured and all is well in the world. 3646c440a9d9SMarc Zyngier * 3647c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 364811e37d35SMarc Zyngier */ 3649c440a9d9SMarc Zyngier if (gic_data_rdist()->lpi_enabled || 3650c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 365111e37d35SMarc Zyngier return 0; 365211e37d35SMarc Zyngier 365311e37d35SMarc Zyngier /* 365411e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 365511e37d35SMarc Zyngier */ 365611e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 36576eb486b6SShanker Donthineni smp_processor_id()); 36586eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 36596eb486b6SShanker Donthineni 36606eb486b6SShanker Donthineni /* Disable LPIs */ 36616eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 36626eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 36636eb486b6SShanker Donthineni 36646eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 36656eb486b6SShanker Donthineni dsb(sy); 36666eb486b6SShanker Donthineni 36676eb486b6SShanker Donthineni /* 36686eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 36696eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 36706eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 36716eb486b6SShanker Donthineni */ 36726eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 36736eb486b6SShanker Donthineni if (!timeout) { 36746eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 36756eb486b6SShanker Donthineni smp_processor_id()); 36766eb486b6SShanker Donthineni return -ETIMEDOUT; 36776eb486b6SShanker Donthineni } 36786eb486b6SShanker Donthineni udelay(1); 36796eb486b6SShanker Donthineni timeout--; 36806eb486b6SShanker Donthineni } 36816eb486b6SShanker Donthineni 36826eb486b6SShanker Donthineni /* 36836eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 36846eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 36856eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 36866eb486b6SShanker Donthineni */ 36876eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 36886eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 36896eb486b6SShanker Donthineni return -EBUSY; 36906eb486b6SShanker Donthineni } 36916eb486b6SShanker Donthineni 36926eb486b6SShanker Donthineni return 0; 36936eb486b6SShanker Donthineni } 36946eb486b6SShanker Donthineni 36956eb486b6SShanker Donthineni int its_cpu_init(void) 36966eb486b6SShanker Donthineni { 36976eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 36986eb486b6SShanker Donthineni int ret; 36996eb486b6SShanker Donthineni 37006eb486b6SShanker Donthineni ret = redist_disable_lpis(); 37016eb486b6SShanker Donthineni if (ret) 37026eb486b6SShanker Donthineni return ret; 37036eb486b6SShanker Donthineni 37044c21f3c2SMarc Zyngier its_cpu_init_lpis(); 3705920181ceSDerek Basehore its_cpu_init_collections(); 37064c21f3c2SMarc Zyngier } 37074c21f3c2SMarc Zyngier 37084c21f3c2SMarc Zyngier return 0; 37094c21f3c2SMarc Zyngier } 37104c21f3c2SMarc Zyngier 3711935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 37124c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 37134c21f3c2SMarc Zyngier {}, 37144c21f3c2SMarc Zyngier }; 37154c21f3c2SMarc Zyngier 3716db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 37174c21f3c2SMarc Zyngier { 37184c21f3c2SMarc Zyngier struct device_node *np; 3719db40f0a7STomasz Nowicki struct resource res; 37204c21f3c2SMarc Zyngier 37214c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 37224c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 372395a25625SStephen Boyd if (!of_device_is_available(np)) 372495a25625SStephen Boyd continue; 3725d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 3726e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 3727e81f54c6SRob Herring np); 3728d14ae5e6STomasz Nowicki continue; 3729d14ae5e6STomasz Nowicki } 3730d14ae5e6STomasz Nowicki 3731db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 3732e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 3733db40f0a7STomasz Nowicki continue; 37344c21f3c2SMarc Zyngier } 37354c21f3c2SMarc Zyngier 3736db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 3737db40f0a7STomasz Nowicki } 3738db40f0a7STomasz Nowicki return 0; 3739db40f0a7STomasz Nowicki } 3740db40f0a7STomasz Nowicki 37413f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 37423f010cf1STomasz Nowicki 37433f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 37443f010cf1STomasz Nowicki 3745d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 3746dbd2b826SGanapatrao Kulkarni struct its_srat_map { 3747dbd2b826SGanapatrao Kulkarni /* numa node id */ 3748dbd2b826SGanapatrao Kulkarni u32 numa_node; 3749dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 3750dbd2b826SGanapatrao Kulkarni u32 its_id; 3751dbd2b826SGanapatrao Kulkarni }; 3752dbd2b826SGanapatrao Kulkarni 3753fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 3754dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 3755dbd2b826SGanapatrao Kulkarni 3756dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 3757dbd2b826SGanapatrao Kulkarni { 3758dbd2b826SGanapatrao Kulkarni int i; 3759dbd2b826SGanapatrao Kulkarni 3760dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 3761dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 3762dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 3763dbd2b826SGanapatrao Kulkarni } 3764dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 3765dbd2b826SGanapatrao Kulkarni } 3766dbd2b826SGanapatrao Kulkarni 3767fdf6e7a8SHanjun Guo static int __init gic_acpi_match_srat_its(struct acpi_subtable_header *header, 3768fdf6e7a8SHanjun Guo const unsigned long end) 3769fdf6e7a8SHanjun Guo { 3770fdf6e7a8SHanjun Guo return 0; 3771fdf6e7a8SHanjun Guo } 3772fdf6e7a8SHanjun Guo 3773dbd2b826SGanapatrao Kulkarni static int __init gic_acpi_parse_srat_its(struct acpi_subtable_header *header, 3774dbd2b826SGanapatrao Kulkarni const unsigned long end) 3775dbd2b826SGanapatrao Kulkarni { 3776dbd2b826SGanapatrao Kulkarni int node; 3777dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 3778dbd2b826SGanapatrao Kulkarni 3779dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 3780dbd2b826SGanapatrao Kulkarni if (!its_affinity) 3781dbd2b826SGanapatrao Kulkarni return -EINVAL; 3782dbd2b826SGanapatrao Kulkarni 3783dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 3784dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 3785dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 3786dbd2b826SGanapatrao Kulkarni return -EINVAL; 3787dbd2b826SGanapatrao Kulkarni } 3788dbd2b826SGanapatrao Kulkarni 3789dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 3790dbd2b826SGanapatrao Kulkarni 3791dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 3792dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 3793dbd2b826SGanapatrao Kulkarni return 0; 3794dbd2b826SGanapatrao Kulkarni } 3795dbd2b826SGanapatrao Kulkarni 3796dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 3797dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 3798dbd2b826SGanapatrao Kulkarni its_in_srat++; 3799dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 3800dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 3801dbd2b826SGanapatrao Kulkarni 3802dbd2b826SGanapatrao Kulkarni return 0; 3803dbd2b826SGanapatrao Kulkarni } 3804dbd2b826SGanapatrao Kulkarni 3805dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 3806dbd2b826SGanapatrao Kulkarni { 3807fdf6e7a8SHanjun Guo int count; 3808fdf6e7a8SHanjun Guo 3809fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 3810fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 3811fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3812fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 3813fdf6e7a8SHanjun Guo if (count <= 0) 3814fdf6e7a8SHanjun Guo return; 3815fdf6e7a8SHanjun Guo 38166da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 3817fdf6e7a8SHanjun Guo GFP_KERNEL); 3818fdf6e7a8SHanjun Guo if (!its_srat_maps) { 3819fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 3820fdf6e7a8SHanjun Guo return; 3821fdf6e7a8SHanjun Guo } 3822fdf6e7a8SHanjun Guo 3823dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 3824dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 3825dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3826dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 3827dbd2b826SGanapatrao Kulkarni } 3828fdf6e7a8SHanjun Guo 3829fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 3830fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 3831fdf6e7a8SHanjun Guo { 3832fdf6e7a8SHanjun Guo kfree(its_srat_maps); 3833fdf6e7a8SHanjun Guo } 3834dbd2b826SGanapatrao Kulkarni #else 3835dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 3836dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 3837fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 3838dbd2b826SGanapatrao Kulkarni #endif 3839dbd2b826SGanapatrao Kulkarni 38403f010cf1STomasz Nowicki static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header, 38413f010cf1STomasz Nowicki const unsigned long end) 38423f010cf1STomasz Nowicki { 38433f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 38443f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 38453f010cf1STomasz Nowicki struct resource res; 38463f010cf1STomasz Nowicki int err; 38473f010cf1STomasz Nowicki 38483f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 38493f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 38503f010cf1STomasz Nowicki res.start = its_entry->base_address; 38513f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 38523f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 38533f010cf1STomasz Nowicki 38543f010cf1STomasz Nowicki dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address); 38553f010cf1STomasz Nowicki if (!dom_handle) { 38563f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 38573f010cf1STomasz Nowicki &res.start); 38583f010cf1STomasz Nowicki return -ENOMEM; 38593f010cf1STomasz Nowicki } 38603f010cf1STomasz Nowicki 38618b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 38628b4282e6SShameer Kolothum dom_handle); 38633f010cf1STomasz Nowicki if (err) { 38643f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 38653f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 38663f010cf1STomasz Nowicki goto dom_err; 38673f010cf1STomasz Nowicki } 38683f010cf1STomasz Nowicki 3869dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 3870dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 38713f010cf1STomasz Nowicki if (!err) 38723f010cf1STomasz Nowicki return 0; 38733f010cf1STomasz Nowicki 38743f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 38753f010cf1STomasz Nowicki dom_err: 38763f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 38773f010cf1STomasz Nowicki return err; 38783f010cf1STomasz Nowicki } 38793f010cf1STomasz Nowicki 38803f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 38813f010cf1STomasz Nowicki { 3882dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 38833f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 38843f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 3885fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 38863f010cf1STomasz Nowicki } 38873f010cf1STomasz Nowicki #else 38883f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 38893f010cf1STomasz Nowicki #endif 38903f010cf1STomasz Nowicki 3891db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 3892db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 3893db40f0a7STomasz Nowicki { 3894db40f0a7STomasz Nowicki struct device_node *of_node; 38958fff27aeSMarc Zyngier struct its_node *its; 38968fff27aeSMarc Zyngier bool has_v4 = false; 38978fff27aeSMarc Zyngier int err; 3898db40f0a7STomasz Nowicki 3899db40f0a7STomasz Nowicki its_parent = parent_domain; 3900db40f0a7STomasz Nowicki of_node = to_of_node(handle); 3901db40f0a7STomasz Nowicki if (of_node) 3902db40f0a7STomasz Nowicki its_of_probe(of_node); 3903db40f0a7STomasz Nowicki else 39043f010cf1STomasz Nowicki its_acpi_probe(); 3905db40f0a7STomasz Nowicki 39064c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 39074c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 39084c21f3c2SMarc Zyngier return -ENXIO; 39094c21f3c2SMarc Zyngier } 39104c21f3c2SMarc Zyngier 39114c21f3c2SMarc Zyngier gic_rdists = rdists; 391211e37d35SMarc Zyngier 391311e37d35SMarc Zyngier err = allocate_lpi_tables(); 39148fff27aeSMarc Zyngier if (err) 39158fff27aeSMarc Zyngier return err; 39168fff27aeSMarc Zyngier 39178fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 39188fff27aeSMarc Zyngier has_v4 |= its->is_v4; 39198fff27aeSMarc Zyngier 39208fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 39213d63cb53SMarc Zyngier if (its_init_vpe_domain() || 39223d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 39238fff27aeSMarc Zyngier rdists->has_vlpis = false; 39248fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 39258fff27aeSMarc Zyngier } 39268fff27aeSMarc Zyngier } 39278fff27aeSMarc Zyngier 3928dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 3929dba0bc7bSDerek Basehore 39308fff27aeSMarc Zyngier return 0; 39314c21f3c2SMarc Zyngier } 3932