1cc2d3216SMarc Zyngier /* 2d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 183f010cf1STomasz Nowicki #include <linux/acpi.h> 198d3554b8SHanjun Guo #include <linux/acpi_iort.h> 20cc2d3216SMarc Zyngier #include <linux/bitmap.h> 21cc2d3216SMarc Zyngier #include <linux/cpu.h> 22cc2d3216SMarc Zyngier #include <linux/delay.h> 2344bb7e24SRobin Murphy #include <linux/dma-iommu.h> 24cc2d3216SMarc Zyngier #include <linux/interrupt.h> 253f010cf1STomasz Nowicki #include <linux/irqdomain.h> 26cc2d3216SMarc Zyngier #include <linux/log2.h> 27cc2d3216SMarc Zyngier #include <linux/mm.h> 28cc2d3216SMarc Zyngier #include <linux/msi.h> 29cc2d3216SMarc Zyngier #include <linux/of.h> 30cc2d3216SMarc Zyngier #include <linux/of_address.h> 31cc2d3216SMarc Zyngier #include <linux/of_irq.h> 32cc2d3216SMarc Zyngier #include <linux/of_pci.h> 33cc2d3216SMarc Zyngier #include <linux/of_platform.h> 34cc2d3216SMarc Zyngier #include <linux/percpu.h> 35cc2d3216SMarc Zyngier #include <linux/slab.h> 36cc2d3216SMarc Zyngier 3741a83e06SJoel Porquet #include <linux/irqchip.h> 38cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 39c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 40cc2d3216SMarc Zyngier 41cc2d3216SMarc Zyngier #include <asm/cputype.h> 42cc2d3216SMarc Zyngier #include <asm/exception.h> 43cc2d3216SMarc Zyngier 4467510ccaSRobert Richter #include "irq-gic-common.h" 4567510ccaSRobert Richter 4694100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4794100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 48fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 49cc2d3216SMarc Zyngier 50c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 51c48ed51cSMarc Zyngier 52a13b0404SMarc Zyngier static u32 lpi_id_bits; 53a13b0404SMarc Zyngier 54a13b0404SMarc Zyngier /* 55a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 56a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 57a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 58a13b0404SMarc Zyngier */ 59a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 60a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 61a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 62a13b0404SMarc Zyngier 63a13b0404SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 64a13b0404SMarc Zyngier 65cc2d3216SMarc Zyngier /* 66cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 67cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 68cc2d3216SMarc Zyngier * CPU. 69cc2d3216SMarc Zyngier */ 70cc2d3216SMarc Zyngier struct its_collection { 71cc2d3216SMarc Zyngier u64 target_address; 72cc2d3216SMarc Zyngier u16 col_id; 73cc2d3216SMarc Zyngier }; 74cc2d3216SMarc Zyngier 75cc2d3216SMarc Zyngier /* 769347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 779347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 78466b7d16SShanker Donthineni */ 79466b7d16SShanker Donthineni struct its_baser { 80466b7d16SShanker Donthineni void *base; 81466b7d16SShanker Donthineni u64 val; 82466b7d16SShanker Donthineni u32 order; 839347359aSShanker Donthineni u32 psz; 84466b7d16SShanker Donthineni }; 85466b7d16SShanker Donthineni 86558b0165SArd Biesheuvel struct its_device; 87558b0165SArd Biesheuvel 88466b7d16SShanker Donthineni /* 89cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 90841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 91841514abSMarc Zyngier * list of devices writing to it. 92cc2d3216SMarc Zyngier */ 93cc2d3216SMarc Zyngier struct its_node { 94cc2d3216SMarc Zyngier raw_spinlock_t lock; 95cc2d3216SMarc Zyngier struct list_head entry; 96cc2d3216SMarc Zyngier void __iomem *base; 97db40f0a7STomasz Nowicki phys_addr_t phys_base; 98cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 99cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 100466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 101cc2d3216SMarc Zyngier struct its_collection *collections; 102558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 103558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 104cc2d3216SMarc Zyngier struct list_head its_device_list; 105cc2d3216SMarc Zyngier u64 flags; 106cc2d3216SMarc Zyngier u32 ite_size; 107466b7d16SShanker Donthineni u32 device_ids; 108fbf8f40eSGanapatrao Kulkarni int numa_node; 109558b0165SArd Biesheuvel unsigned int msi_domain_flags; 110558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1113dfa576bSMarc Zyngier bool is_v4; 1125c9a882eSMarc Zyngier int vlpi_redist_offset; 113cc2d3216SMarc Zyngier }; 114cc2d3216SMarc Zyngier 115cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 116cc2d3216SMarc Zyngier 1172eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1182eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1192eca0d6cSShanker Donthineni 120591e5becSMarc Zyngier struct event_lpi_map { 121591e5becSMarc Zyngier unsigned long *lpi_map; 122591e5becSMarc Zyngier u16 *col_map; 123591e5becSMarc Zyngier irq_hw_number_t lpi_base; 124591e5becSMarc Zyngier int nr_lpis; 125d011e4e6SMarc Zyngier struct mutex vlpi_lock; 126d011e4e6SMarc Zyngier struct its_vm *vm; 127d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 128d011e4e6SMarc Zyngier int nr_vlpis; 129591e5becSMarc Zyngier }; 130591e5becSMarc Zyngier 131cc2d3216SMarc Zyngier /* 132d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 133d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 134d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 135d011e4e6SMarc Zyngier * indicates which one. 136cc2d3216SMarc Zyngier */ 137cc2d3216SMarc Zyngier struct its_device { 138cc2d3216SMarc Zyngier struct list_head entry; 139cc2d3216SMarc Zyngier struct its_node *its; 140591e5becSMarc Zyngier struct event_lpi_map event_map; 141cc2d3216SMarc Zyngier void *itt; 142cc2d3216SMarc Zyngier u32 nr_ites; 143cc2d3216SMarc Zyngier u32 device_id; 144cc2d3216SMarc Zyngier }; 145cc2d3216SMarc Zyngier 14620b3d54eSMarc Zyngier static struct { 14720b3d54eSMarc Zyngier raw_spinlock_t lock; 14820b3d54eSMarc Zyngier struct its_device *dev; 14920b3d54eSMarc Zyngier struct its_vpe **vpes; 15020b3d54eSMarc Zyngier int next_victim; 15120b3d54eSMarc Zyngier } vpe_proxy; 15220b3d54eSMarc Zyngier 1531ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 1541ac19ca6SMarc Zyngier static DEFINE_SPINLOCK(its_lock); 1551ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 156db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1571ac19ca6SMarc Zyngier 1583dfa576bSMarc Zyngier /* 1593dfa576bSMarc Zyngier * We have a maximum number of 16 ITSs in the whole system if we're 1603dfa576bSMarc Zyngier * using the ITSList mechanism 1613dfa576bSMarc Zyngier */ 1623dfa576bSMarc Zyngier #define ITS_LIST_MAX 16 1633dfa576bSMarc Zyngier 1643dfa576bSMarc Zyngier static unsigned long its_list_map; 1653171a47aSMarc Zyngier static u16 vmovp_seq_num; 1663171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1673171a47aSMarc Zyngier 1687d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1693dfa576bSMarc Zyngier 1701ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 1711ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 172e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1731ac19ca6SMarc Zyngier 174591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 175591e5becSMarc Zyngier u32 event) 176591e5becSMarc Zyngier { 177591e5becSMarc Zyngier struct its_node *its = its_dev->its; 178591e5becSMarc Zyngier 179591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 180591e5becSMarc Zyngier } 181591e5becSMarc Zyngier 182cc2d3216SMarc Zyngier /* 183cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 184cc2d3216SMarc Zyngier * block. 185cc2d3216SMarc Zyngier */ 186cc2d3216SMarc Zyngier struct its_cmd_desc { 187cc2d3216SMarc Zyngier union { 188cc2d3216SMarc Zyngier struct { 189cc2d3216SMarc Zyngier struct its_device *dev; 190cc2d3216SMarc Zyngier u32 event_id; 191cc2d3216SMarc Zyngier } its_inv_cmd; 192cc2d3216SMarc Zyngier 193cc2d3216SMarc Zyngier struct { 194cc2d3216SMarc Zyngier struct its_device *dev; 195cc2d3216SMarc Zyngier u32 event_id; 1968d85dcedSMarc Zyngier } its_clear_cmd; 1978d85dcedSMarc Zyngier 1988d85dcedSMarc Zyngier struct { 1998d85dcedSMarc Zyngier struct its_device *dev; 2008d85dcedSMarc Zyngier u32 event_id; 201cc2d3216SMarc Zyngier } its_int_cmd; 202cc2d3216SMarc Zyngier 203cc2d3216SMarc Zyngier struct { 204cc2d3216SMarc Zyngier struct its_device *dev; 205cc2d3216SMarc Zyngier int valid; 206cc2d3216SMarc Zyngier } its_mapd_cmd; 207cc2d3216SMarc Zyngier 208cc2d3216SMarc Zyngier struct { 209cc2d3216SMarc Zyngier struct its_collection *col; 210cc2d3216SMarc Zyngier int valid; 211cc2d3216SMarc Zyngier } its_mapc_cmd; 212cc2d3216SMarc Zyngier 213cc2d3216SMarc Zyngier struct { 214cc2d3216SMarc Zyngier struct its_device *dev; 215cc2d3216SMarc Zyngier u32 phys_id; 216cc2d3216SMarc Zyngier u32 event_id; 2176a25ad3aSMarc Zyngier } its_mapti_cmd; 218cc2d3216SMarc Zyngier 219cc2d3216SMarc Zyngier struct { 220cc2d3216SMarc Zyngier struct its_device *dev; 221cc2d3216SMarc Zyngier struct its_collection *col; 222591e5becSMarc Zyngier u32 event_id; 223cc2d3216SMarc Zyngier } its_movi_cmd; 224cc2d3216SMarc Zyngier 225cc2d3216SMarc Zyngier struct { 226cc2d3216SMarc Zyngier struct its_device *dev; 227cc2d3216SMarc Zyngier u32 event_id; 228cc2d3216SMarc Zyngier } its_discard_cmd; 229cc2d3216SMarc Zyngier 230cc2d3216SMarc Zyngier struct { 231cc2d3216SMarc Zyngier struct its_collection *col; 232cc2d3216SMarc Zyngier } its_invall_cmd; 233d011e4e6SMarc Zyngier 234d011e4e6SMarc Zyngier struct { 235d011e4e6SMarc Zyngier struct its_vpe *vpe; 236eb78192bSMarc Zyngier } its_vinvall_cmd; 237eb78192bSMarc Zyngier 238eb78192bSMarc Zyngier struct { 239eb78192bSMarc Zyngier struct its_vpe *vpe; 240eb78192bSMarc Zyngier struct its_collection *col; 241eb78192bSMarc Zyngier bool valid; 242eb78192bSMarc Zyngier } its_vmapp_cmd; 243eb78192bSMarc Zyngier 244eb78192bSMarc Zyngier struct { 245eb78192bSMarc Zyngier struct its_vpe *vpe; 246d011e4e6SMarc Zyngier struct its_device *dev; 247d011e4e6SMarc Zyngier u32 virt_id; 248d011e4e6SMarc Zyngier u32 event_id; 249d011e4e6SMarc Zyngier bool db_enabled; 250d011e4e6SMarc Zyngier } its_vmapti_cmd; 251d011e4e6SMarc Zyngier 252d011e4e6SMarc Zyngier struct { 253d011e4e6SMarc Zyngier struct its_vpe *vpe; 254d011e4e6SMarc Zyngier struct its_device *dev; 255d011e4e6SMarc Zyngier u32 event_id; 256d011e4e6SMarc Zyngier bool db_enabled; 257d011e4e6SMarc Zyngier } its_vmovi_cmd; 2583171a47aSMarc Zyngier 2593171a47aSMarc Zyngier struct { 2603171a47aSMarc Zyngier struct its_vpe *vpe; 2613171a47aSMarc Zyngier struct its_collection *col; 2623171a47aSMarc Zyngier u16 seq_num; 2633171a47aSMarc Zyngier u16 its_list; 2643171a47aSMarc Zyngier } its_vmovp_cmd; 265cc2d3216SMarc Zyngier }; 266cc2d3216SMarc Zyngier }; 267cc2d3216SMarc Zyngier 268cc2d3216SMarc Zyngier /* 269cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 270cc2d3216SMarc Zyngier */ 271cc2d3216SMarc Zyngier struct its_cmd_block { 272cc2d3216SMarc Zyngier u64 raw_cmd[4]; 273cc2d3216SMarc Zyngier }; 274cc2d3216SMarc Zyngier 275cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 276cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 277cc2d3216SMarc Zyngier 27867047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 27967047f90SMarc Zyngier struct its_cmd_block *, 280cc2d3216SMarc Zyngier struct its_cmd_desc *); 281cc2d3216SMarc Zyngier 28267047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 28367047f90SMarc Zyngier struct its_cmd_block *, 284d011e4e6SMarc Zyngier struct its_cmd_desc *); 285d011e4e6SMarc Zyngier 2864d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 2874d36f136SMarc Zyngier { 2884d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 2894d36f136SMarc Zyngier *raw_cmd &= ~mask; 2904d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 2914d36f136SMarc Zyngier } 2924d36f136SMarc Zyngier 293cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 294cc2d3216SMarc Zyngier { 2954d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 296cc2d3216SMarc Zyngier } 297cc2d3216SMarc Zyngier 298cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 299cc2d3216SMarc Zyngier { 3004d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 301cc2d3216SMarc Zyngier } 302cc2d3216SMarc Zyngier 303cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 304cc2d3216SMarc Zyngier { 3054d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 306cc2d3216SMarc Zyngier } 307cc2d3216SMarc Zyngier 308cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 309cc2d3216SMarc Zyngier { 3104d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 311cc2d3216SMarc Zyngier } 312cc2d3216SMarc Zyngier 313cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 314cc2d3216SMarc Zyngier { 3154d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 316cc2d3216SMarc Zyngier } 317cc2d3216SMarc Zyngier 318cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 319cc2d3216SMarc Zyngier { 3204d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 50, 8); 321cc2d3216SMarc Zyngier } 322cc2d3216SMarc Zyngier 323cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 324cc2d3216SMarc Zyngier { 3254d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 326cc2d3216SMarc Zyngier } 327cc2d3216SMarc Zyngier 328cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 329cc2d3216SMarc Zyngier { 3304d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 50, 16); 331cc2d3216SMarc Zyngier } 332cc2d3216SMarc Zyngier 333cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 334cc2d3216SMarc Zyngier { 3354d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 336cc2d3216SMarc Zyngier } 337cc2d3216SMarc Zyngier 338d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 339d011e4e6SMarc Zyngier { 340d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 341d011e4e6SMarc Zyngier } 342d011e4e6SMarc Zyngier 343d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 344d011e4e6SMarc Zyngier { 345d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 346d011e4e6SMarc Zyngier } 347d011e4e6SMarc Zyngier 348d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 349d011e4e6SMarc Zyngier { 350d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 351d011e4e6SMarc Zyngier } 352d011e4e6SMarc Zyngier 353d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 354d011e4e6SMarc Zyngier { 355d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 356d011e4e6SMarc Zyngier } 357d011e4e6SMarc Zyngier 3583171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 3593171a47aSMarc Zyngier { 3603171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 3613171a47aSMarc Zyngier } 3623171a47aSMarc Zyngier 3633171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 3643171a47aSMarc Zyngier { 3653171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 3663171a47aSMarc Zyngier } 3673171a47aSMarc Zyngier 368eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 369eb78192bSMarc Zyngier { 370eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 50, 16); 371eb78192bSMarc Zyngier } 372eb78192bSMarc Zyngier 373eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 374eb78192bSMarc Zyngier { 375eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 376eb78192bSMarc Zyngier } 377eb78192bSMarc Zyngier 378cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 379cc2d3216SMarc Zyngier { 380cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 381cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 382cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 383cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 384cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 385cc2d3216SMarc Zyngier } 386cc2d3216SMarc Zyngier 38767047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 38867047f90SMarc Zyngier struct its_cmd_block *cmd, 389cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 390cc2d3216SMarc Zyngier { 391cc2d3216SMarc Zyngier unsigned long itt_addr; 392c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 393cc2d3216SMarc Zyngier 394cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 395cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 396cc2d3216SMarc Zyngier 397cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 398cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 399cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 400cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 401cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 402cc2d3216SMarc Zyngier 403cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 404cc2d3216SMarc Zyngier 405591e5becSMarc Zyngier return NULL; 406cc2d3216SMarc Zyngier } 407cc2d3216SMarc Zyngier 40867047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 40967047f90SMarc Zyngier struct its_cmd_block *cmd, 410cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 411cc2d3216SMarc Zyngier { 412cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 413cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 414cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 415cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 416cc2d3216SMarc Zyngier 417cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 418cc2d3216SMarc Zyngier 419cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 420cc2d3216SMarc Zyngier } 421cc2d3216SMarc Zyngier 42267047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 42367047f90SMarc Zyngier struct its_cmd_block *cmd, 424cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 425cc2d3216SMarc Zyngier { 426591e5becSMarc Zyngier struct its_collection *col; 427591e5becSMarc Zyngier 4286a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 4296a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 430591e5becSMarc Zyngier 4316a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 4326a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 4336a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 4346a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 435591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 436cc2d3216SMarc Zyngier 437cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 438cc2d3216SMarc Zyngier 439591e5becSMarc Zyngier return col; 440cc2d3216SMarc Zyngier } 441cc2d3216SMarc Zyngier 44267047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 44367047f90SMarc Zyngier struct its_cmd_block *cmd, 444cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 445cc2d3216SMarc Zyngier { 446591e5becSMarc Zyngier struct its_collection *col; 447591e5becSMarc Zyngier 448591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 449591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 450591e5becSMarc Zyngier 451cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 452cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 453591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 454cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 455cc2d3216SMarc Zyngier 456cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 457cc2d3216SMarc Zyngier 458591e5becSMarc Zyngier return col; 459cc2d3216SMarc Zyngier } 460cc2d3216SMarc Zyngier 46167047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 46267047f90SMarc Zyngier struct its_cmd_block *cmd, 463cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 464cc2d3216SMarc Zyngier { 465591e5becSMarc Zyngier struct its_collection *col; 466591e5becSMarc Zyngier 467591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 468591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 469591e5becSMarc Zyngier 470cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 471cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 472cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 473cc2d3216SMarc Zyngier 474cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 475cc2d3216SMarc Zyngier 476591e5becSMarc Zyngier return col; 477cc2d3216SMarc Zyngier } 478cc2d3216SMarc Zyngier 47967047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 48067047f90SMarc Zyngier struct its_cmd_block *cmd, 481cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 482cc2d3216SMarc Zyngier { 483591e5becSMarc Zyngier struct its_collection *col; 484591e5becSMarc Zyngier 485591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 486591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 487591e5becSMarc Zyngier 488cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 489cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 490cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 491cc2d3216SMarc Zyngier 492cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 493cc2d3216SMarc Zyngier 494591e5becSMarc Zyngier return col; 495cc2d3216SMarc Zyngier } 496cc2d3216SMarc Zyngier 49767047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 49867047f90SMarc Zyngier struct its_cmd_block *cmd, 4998d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5008d85dcedSMarc Zyngier { 5018d85dcedSMarc Zyngier struct its_collection *col; 5028d85dcedSMarc Zyngier 5038d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 5048d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 5058d85dcedSMarc Zyngier 5068d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 5078d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 5088d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 5098d85dcedSMarc Zyngier 5108d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5118d85dcedSMarc Zyngier 5128d85dcedSMarc Zyngier return col; 5138d85dcedSMarc Zyngier } 5148d85dcedSMarc Zyngier 51567047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 51667047f90SMarc Zyngier struct its_cmd_block *cmd, 5178d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5188d85dcedSMarc Zyngier { 5198d85dcedSMarc Zyngier struct its_collection *col; 5208d85dcedSMarc Zyngier 5218d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 5228d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 5238d85dcedSMarc Zyngier 5248d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 5258d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 5268d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 5278d85dcedSMarc Zyngier 5288d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5298d85dcedSMarc Zyngier 5308d85dcedSMarc Zyngier return col; 5318d85dcedSMarc Zyngier } 5328d85dcedSMarc Zyngier 53367047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 53467047f90SMarc Zyngier struct its_cmd_block *cmd, 535cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 536cc2d3216SMarc Zyngier { 537cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 538cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 539cc2d3216SMarc Zyngier 540cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 541cc2d3216SMarc Zyngier 542cc2d3216SMarc Zyngier return NULL; 543cc2d3216SMarc Zyngier } 544cc2d3216SMarc Zyngier 54567047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 54667047f90SMarc Zyngier struct its_cmd_block *cmd, 547eb78192bSMarc Zyngier struct its_cmd_desc *desc) 548eb78192bSMarc Zyngier { 549eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 550eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 551eb78192bSMarc Zyngier 552eb78192bSMarc Zyngier its_fixup_cmd(cmd); 553eb78192bSMarc Zyngier 554eb78192bSMarc Zyngier return desc->its_vinvall_cmd.vpe; 555eb78192bSMarc Zyngier } 556eb78192bSMarc Zyngier 55767047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 55867047f90SMarc Zyngier struct its_cmd_block *cmd, 559eb78192bSMarc Zyngier struct its_cmd_desc *desc) 560eb78192bSMarc Zyngier { 561eb78192bSMarc Zyngier unsigned long vpt_addr; 5625c9a882eSMarc Zyngier u64 target; 563eb78192bSMarc Zyngier 564eb78192bSMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 5655c9a882eSMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 566eb78192bSMarc Zyngier 567eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 568eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 569eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 5705c9a882eSMarc Zyngier its_encode_target(cmd, target); 571eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 572eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 573eb78192bSMarc Zyngier 574eb78192bSMarc Zyngier its_fixup_cmd(cmd); 575eb78192bSMarc Zyngier 576eb78192bSMarc Zyngier return desc->its_vmapp_cmd.vpe; 577eb78192bSMarc Zyngier } 578eb78192bSMarc Zyngier 57967047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 58067047f90SMarc Zyngier struct its_cmd_block *cmd, 581d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 582d011e4e6SMarc Zyngier { 583d011e4e6SMarc Zyngier u32 db; 584d011e4e6SMarc Zyngier 585d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 586d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 587d011e4e6SMarc Zyngier else 588d011e4e6SMarc Zyngier db = 1023; 589d011e4e6SMarc Zyngier 590d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 591d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 592d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 593d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 594d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 595d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 596d011e4e6SMarc Zyngier 597d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 598d011e4e6SMarc Zyngier 599d011e4e6SMarc Zyngier return desc->its_vmapti_cmd.vpe; 600d011e4e6SMarc Zyngier } 601d011e4e6SMarc Zyngier 60267047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 60367047f90SMarc Zyngier struct its_cmd_block *cmd, 604d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 605d011e4e6SMarc Zyngier { 606d011e4e6SMarc Zyngier u32 db; 607d011e4e6SMarc Zyngier 608d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 609d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 610d011e4e6SMarc Zyngier else 611d011e4e6SMarc Zyngier db = 1023; 612d011e4e6SMarc Zyngier 613d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 614d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 615d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 616d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 617d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 618d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 619d011e4e6SMarc Zyngier 620d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 621d011e4e6SMarc Zyngier 622d011e4e6SMarc Zyngier return desc->its_vmovi_cmd.vpe; 623d011e4e6SMarc Zyngier } 624d011e4e6SMarc Zyngier 62567047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 62667047f90SMarc Zyngier struct its_cmd_block *cmd, 6273171a47aSMarc Zyngier struct its_cmd_desc *desc) 6283171a47aSMarc Zyngier { 6295c9a882eSMarc Zyngier u64 target; 6305c9a882eSMarc Zyngier 6315c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 6323171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 6333171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 6343171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 6353171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 6365c9a882eSMarc Zyngier its_encode_target(cmd, target); 6373171a47aSMarc Zyngier 6383171a47aSMarc Zyngier its_fixup_cmd(cmd); 6393171a47aSMarc Zyngier 6403171a47aSMarc Zyngier return desc->its_vmovp_cmd.vpe; 6413171a47aSMarc Zyngier } 6423171a47aSMarc Zyngier 643cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 644cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 645cc2d3216SMarc Zyngier { 646cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 647cc2d3216SMarc Zyngier } 648cc2d3216SMarc Zyngier 649cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 650cc2d3216SMarc Zyngier { 651cc2d3216SMarc Zyngier int widx; 652cc2d3216SMarc Zyngier int ridx; 653cc2d3216SMarc Zyngier 654cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 655cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 656cc2d3216SMarc Zyngier 657cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 658cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 659cc2d3216SMarc Zyngier return 1; 660cc2d3216SMarc Zyngier 661cc2d3216SMarc Zyngier return 0; 662cc2d3216SMarc Zyngier } 663cc2d3216SMarc Zyngier 664cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 665cc2d3216SMarc Zyngier { 666cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 667cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 668cc2d3216SMarc Zyngier 669cc2d3216SMarc Zyngier while (its_queue_full(its)) { 670cc2d3216SMarc Zyngier count--; 671cc2d3216SMarc Zyngier if (!count) { 672cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 673cc2d3216SMarc Zyngier return NULL; 674cc2d3216SMarc Zyngier } 675cc2d3216SMarc Zyngier cpu_relax(); 676cc2d3216SMarc Zyngier udelay(1); 677cc2d3216SMarc Zyngier } 678cc2d3216SMarc Zyngier 679cc2d3216SMarc Zyngier cmd = its->cmd_write++; 680cc2d3216SMarc Zyngier 681cc2d3216SMarc Zyngier /* Handle queue wrapping */ 682cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 683cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 684cc2d3216SMarc Zyngier 68534d677a9SMarc Zyngier /* Clear command */ 68634d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 68734d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 68834d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 68934d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 69034d677a9SMarc Zyngier 691cc2d3216SMarc Zyngier return cmd; 692cc2d3216SMarc Zyngier } 693cc2d3216SMarc Zyngier 694cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 695cc2d3216SMarc Zyngier { 696cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 697cc2d3216SMarc Zyngier 698cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 699cc2d3216SMarc Zyngier 700cc2d3216SMarc Zyngier return its->cmd_write; 701cc2d3216SMarc Zyngier } 702cc2d3216SMarc Zyngier 703cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 704cc2d3216SMarc Zyngier { 705cc2d3216SMarc Zyngier /* 706cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 707cc2d3216SMarc Zyngier * the ITS. 708cc2d3216SMarc Zyngier */ 709cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 710328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 711cc2d3216SMarc Zyngier else 712cc2d3216SMarc Zyngier dsb(ishst); 713cc2d3216SMarc Zyngier } 714cc2d3216SMarc Zyngier 715a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 716cc2d3216SMarc Zyngier struct its_cmd_block *from, 717cc2d3216SMarc Zyngier struct its_cmd_block *to) 718cc2d3216SMarc Zyngier { 719cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 720cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 721cc2d3216SMarc Zyngier 722cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 723cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 724cc2d3216SMarc Zyngier 725cc2d3216SMarc Zyngier while (1) { 726cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 7279bdd8b1cSMarc Zyngier 7289bdd8b1cSMarc Zyngier /* Direct case */ 7299bdd8b1cSMarc Zyngier if (from_idx < to_idx && rd_idx >= to_idx) 7309bdd8b1cSMarc Zyngier break; 7319bdd8b1cSMarc Zyngier 7329bdd8b1cSMarc Zyngier /* Wrapped case */ 7339bdd8b1cSMarc Zyngier if (from_idx >= to_idx && rd_idx >= to_idx && rd_idx < from_idx) 734cc2d3216SMarc Zyngier break; 735cc2d3216SMarc Zyngier 736cc2d3216SMarc Zyngier count--; 737cc2d3216SMarc Zyngier if (!count) { 738a19b462fSMarc Zyngier pr_err_ratelimited("ITS queue timeout (%llu %llu %llu)\n", 739a19b462fSMarc Zyngier from_idx, to_idx, rd_idx); 740a19b462fSMarc Zyngier return -1; 741cc2d3216SMarc Zyngier } 742cc2d3216SMarc Zyngier cpu_relax(); 743cc2d3216SMarc Zyngier udelay(1); 744cc2d3216SMarc Zyngier } 745a19b462fSMarc Zyngier 746a19b462fSMarc Zyngier return 0; 747cc2d3216SMarc Zyngier } 748cc2d3216SMarc Zyngier 749e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 750e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 751e4f9094bSMarc Zyngier void name(struct its_node *its, \ 752e4f9094bSMarc Zyngier buildtype builder, \ 753e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 754e4f9094bSMarc Zyngier { \ 755e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 756e4f9094bSMarc Zyngier synctype *sync_obj; \ 757e4f9094bSMarc Zyngier unsigned long flags; \ 758e4f9094bSMarc Zyngier \ 759e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 760e4f9094bSMarc Zyngier \ 761e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 762e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 763e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 764e4f9094bSMarc Zyngier return; \ 765e4f9094bSMarc Zyngier } \ 76667047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 767e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 768e4f9094bSMarc Zyngier \ 769e4f9094bSMarc Zyngier if (sync_obj) { \ 770e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 771e4f9094bSMarc Zyngier if (!sync_cmd) \ 772e4f9094bSMarc Zyngier goto post; \ 773e4f9094bSMarc Zyngier \ 77467047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 775e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 776e4f9094bSMarc Zyngier } \ 777e4f9094bSMarc Zyngier \ 778e4f9094bSMarc Zyngier post: \ 779e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 780e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 781e4f9094bSMarc Zyngier \ 782a19b462fSMarc Zyngier if (its_wait_for_range_completion(its, cmd, next_cmd)) \ 783a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 784e4f9094bSMarc Zyngier } 785e4f9094bSMarc Zyngier 78667047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 78767047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 788e4f9094bSMarc Zyngier struct its_collection *sync_col) 789cc2d3216SMarc Zyngier { 790cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 791cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 792e4f9094bSMarc Zyngier 793cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 794cc2d3216SMarc Zyngier } 795cc2d3216SMarc Zyngier 796e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 797e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 798cc2d3216SMarc Zyngier 79967047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 80067047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 801d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 802d011e4e6SMarc Zyngier { 803d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 804d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 805d011e4e6SMarc Zyngier 806d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 807d011e4e6SMarc Zyngier } 808d011e4e6SMarc Zyngier 809d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 810d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 811d011e4e6SMarc Zyngier 8128d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 8138d85dcedSMarc Zyngier { 8148d85dcedSMarc Zyngier struct its_cmd_desc desc; 8158d85dcedSMarc Zyngier 8168d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 8178d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 8188d85dcedSMarc Zyngier 8198d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 8208d85dcedSMarc Zyngier } 8218d85dcedSMarc Zyngier 8228d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 8238d85dcedSMarc Zyngier { 8248d85dcedSMarc Zyngier struct its_cmd_desc desc; 8258d85dcedSMarc Zyngier 8268d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 8278d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 8288d85dcedSMarc Zyngier 8298d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 830cc2d3216SMarc Zyngier } 831cc2d3216SMarc Zyngier 832cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 833cc2d3216SMarc Zyngier { 834cc2d3216SMarc Zyngier struct its_cmd_desc desc; 835cc2d3216SMarc Zyngier 836cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 837cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 838cc2d3216SMarc Zyngier 839cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 840cc2d3216SMarc Zyngier } 841cc2d3216SMarc Zyngier 842cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 843cc2d3216SMarc Zyngier { 844cc2d3216SMarc Zyngier struct its_cmd_desc desc; 845cc2d3216SMarc Zyngier 846cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 847cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 848cc2d3216SMarc Zyngier 849cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 850cc2d3216SMarc Zyngier } 851cc2d3216SMarc Zyngier 852cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 853cc2d3216SMarc Zyngier int valid) 854cc2d3216SMarc Zyngier { 855cc2d3216SMarc Zyngier struct its_cmd_desc desc; 856cc2d3216SMarc Zyngier 857cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 858cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 859cc2d3216SMarc Zyngier 860cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 861cc2d3216SMarc Zyngier } 862cc2d3216SMarc Zyngier 8636a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 864cc2d3216SMarc Zyngier { 865cc2d3216SMarc Zyngier struct its_cmd_desc desc; 866cc2d3216SMarc Zyngier 8676a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 8686a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 8696a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 870cc2d3216SMarc Zyngier 8716a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 872cc2d3216SMarc Zyngier } 873cc2d3216SMarc Zyngier 874cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 875cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 876cc2d3216SMarc Zyngier { 877cc2d3216SMarc Zyngier struct its_cmd_desc desc; 878cc2d3216SMarc Zyngier 879cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 880cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 881591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 882cc2d3216SMarc Zyngier 883cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 884cc2d3216SMarc Zyngier } 885cc2d3216SMarc Zyngier 886cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 887cc2d3216SMarc Zyngier { 888cc2d3216SMarc Zyngier struct its_cmd_desc desc; 889cc2d3216SMarc Zyngier 890cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 891cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 892cc2d3216SMarc Zyngier 893cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 894cc2d3216SMarc Zyngier } 895cc2d3216SMarc Zyngier 896cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 897cc2d3216SMarc Zyngier { 898cc2d3216SMarc Zyngier struct its_cmd_desc desc; 899cc2d3216SMarc Zyngier 900cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 901cc2d3216SMarc Zyngier 902cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 903cc2d3216SMarc Zyngier } 904c48ed51cSMarc Zyngier 905d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 906d011e4e6SMarc Zyngier { 907d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 908d011e4e6SMarc Zyngier struct its_cmd_desc desc; 909d011e4e6SMarc Zyngier 910d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 911d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 912d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 913d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 914d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 915d011e4e6SMarc Zyngier 916d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 917d011e4e6SMarc Zyngier } 918d011e4e6SMarc Zyngier 919d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 920d011e4e6SMarc Zyngier { 921d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 922d011e4e6SMarc Zyngier struct its_cmd_desc desc; 923d011e4e6SMarc Zyngier 924d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 925d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 926d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 927d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 928d011e4e6SMarc Zyngier 929d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 930d011e4e6SMarc Zyngier } 931d011e4e6SMarc Zyngier 932eb78192bSMarc Zyngier static void its_send_vmapp(struct its_vpe *vpe, bool valid) 933eb78192bSMarc Zyngier { 934eb78192bSMarc Zyngier struct its_cmd_desc desc; 935eb78192bSMarc Zyngier struct its_node *its; 936eb78192bSMarc Zyngier 937eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 938eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 939eb78192bSMarc Zyngier 940eb78192bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 941eb78192bSMarc Zyngier if (!its->is_v4) 942eb78192bSMarc Zyngier continue; 943eb78192bSMarc Zyngier 944eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 945eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 946eb78192bSMarc Zyngier } 947eb78192bSMarc Zyngier } 948eb78192bSMarc Zyngier 9493171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 9503171a47aSMarc Zyngier { 9513171a47aSMarc Zyngier struct its_cmd_desc desc; 9523171a47aSMarc Zyngier struct its_node *its; 9533171a47aSMarc Zyngier unsigned long flags; 9543171a47aSMarc Zyngier int col_id = vpe->col_idx; 9553171a47aSMarc Zyngier 9563171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 9573171a47aSMarc Zyngier desc.its_vmovp_cmd.its_list = (u16)its_list_map; 9583171a47aSMarc Zyngier 9593171a47aSMarc Zyngier if (!its_list_map) { 9603171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 9613171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = 0; 9623171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9633171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9643171a47aSMarc Zyngier return; 9653171a47aSMarc Zyngier } 9663171a47aSMarc Zyngier 9673171a47aSMarc Zyngier /* 9683171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 9693171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 9703171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 9713171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 9723171a47aSMarc Zyngier * 9733171a47aSMarc Zyngier * Wall <-- Head. 9743171a47aSMarc Zyngier */ 9753171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 9763171a47aSMarc Zyngier 9773171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 9783171a47aSMarc Zyngier 9793171a47aSMarc Zyngier /* Emit VMOVPs */ 9803171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 9813171a47aSMarc Zyngier if (!its->is_v4) 9823171a47aSMarc Zyngier continue; 9833171a47aSMarc Zyngier 9843171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9853171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9863171a47aSMarc Zyngier } 9873171a47aSMarc Zyngier 9883171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 9893171a47aSMarc Zyngier } 9903171a47aSMarc Zyngier 991eb78192bSMarc Zyngier static void its_send_vinvall(struct its_vpe *vpe) 992eb78192bSMarc Zyngier { 993eb78192bSMarc Zyngier struct its_cmd_desc desc; 994eb78192bSMarc Zyngier struct its_node *its; 995eb78192bSMarc Zyngier 996eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 997eb78192bSMarc Zyngier 998eb78192bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 999eb78192bSMarc Zyngier if (!its->is_v4) 1000eb78192bSMarc Zyngier continue; 1001eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1002eb78192bSMarc Zyngier } 1003eb78192bSMarc Zyngier } 1004eb78192bSMarc Zyngier 1005c48ed51cSMarc Zyngier /* 1006c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1007c48ed51cSMarc Zyngier */ 1008c48ed51cSMarc Zyngier 1009c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 1010c48ed51cSMarc Zyngier { 1011c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1012591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 1013c48ed51cSMarc Zyngier } 1014c48ed51cSMarc Zyngier 1015015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1016c48ed51cSMarc Zyngier { 1017015ec038SMarc Zyngier irq_hw_number_t hwirq; 1018adcdb94eSMarc Zyngier struct page *prop_page; 1019adcdb94eSMarc Zyngier u8 *cfg; 1020c48ed51cSMarc Zyngier 1021015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1022015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1023015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1024015ec038SMarc Zyngier 1025015ec038SMarc Zyngier prop_page = its_dev->event_map.vm->vprop_page; 1026015ec038SMarc Zyngier hwirq = its_dev->event_map.vlpi_maps[event].vintid; 1027015ec038SMarc Zyngier } else { 1028adcdb94eSMarc Zyngier prop_page = gic_rdists->prop_page; 1029015ec038SMarc Zyngier hwirq = d->hwirq; 1030015ec038SMarc Zyngier } 1031adcdb94eSMarc Zyngier 1032adcdb94eSMarc Zyngier cfg = page_address(prop_page) + hwirq - 8192; 1033adcdb94eSMarc Zyngier *cfg &= ~clr; 1034015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1035c48ed51cSMarc Zyngier 1036c48ed51cSMarc Zyngier /* 1037c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1038c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1039c48ed51cSMarc Zyngier * Humpf... 1040c48ed51cSMarc Zyngier */ 1041c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1042328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1043c48ed51cSMarc Zyngier else 1044c48ed51cSMarc Zyngier dsb(ishst); 1045015ec038SMarc Zyngier } 1046015ec038SMarc Zyngier 1047015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1048015ec038SMarc Zyngier { 1049015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1050015ec038SMarc Zyngier 1051015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1052adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 1053c48ed51cSMarc Zyngier } 1054c48ed51cSMarc Zyngier 1055015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1056015ec038SMarc Zyngier { 1057015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1058015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1059015ec038SMarc Zyngier 1060015ec038SMarc Zyngier if (its_dev->event_map.vlpi_maps[event].db_enabled == enable) 1061015ec038SMarc Zyngier return; 1062015ec038SMarc Zyngier 1063015ec038SMarc Zyngier its_dev->event_map.vlpi_maps[event].db_enabled = enable; 1064015ec038SMarc Zyngier 1065015ec038SMarc Zyngier /* 1066015ec038SMarc Zyngier * More fun with the architecture: 1067015ec038SMarc Zyngier * 1068015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1069015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1070015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1071015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1072015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1073015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1074015ec038SMarc Zyngier */ 1075015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1076c48ed51cSMarc Zyngier } 1077c48ed51cSMarc Zyngier 1078c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1079c48ed51cSMarc Zyngier { 1080015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1081015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1082015ec038SMarc Zyngier 1083adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1084c48ed51cSMarc Zyngier } 1085c48ed51cSMarc Zyngier 1086c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1087c48ed51cSMarc Zyngier { 1088015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1089015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1090015ec038SMarc Zyngier 1091adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1092c48ed51cSMarc Zyngier } 1093c48ed51cSMarc Zyngier 1094c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1095c48ed51cSMarc Zyngier bool force) 1096c48ed51cSMarc Zyngier { 1097fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1098fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1099c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1100c48ed51cSMarc Zyngier struct its_collection *target_col; 1101c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1102c48ed51cSMarc Zyngier 1103015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1104015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1105015ec038SMarc Zyngier return -EINVAL; 1106015ec038SMarc Zyngier 1107fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1108fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1109fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1110fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1111fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1112fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1113fbf8f40eSGanapatrao Kulkarni } 1114fbf8f40eSGanapatrao Kulkarni } 1115fbf8f40eSGanapatrao Kulkarni 1116fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1117fbf8f40eSGanapatrao Kulkarni 1118c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1119c48ed51cSMarc Zyngier return -EINVAL; 1120c48ed51cSMarc Zyngier 11218b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 11228b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1123c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1124c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1125591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 11260d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 11278b8d94a7SMaJun } 1128c48ed51cSMarc Zyngier 1129c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1130c48ed51cSMarc Zyngier } 1131c48ed51cSMarc Zyngier 1132558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1133558b0165SArd Biesheuvel { 1134558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1135558b0165SArd Biesheuvel 1136558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1137558b0165SArd Biesheuvel } 1138558b0165SArd Biesheuvel 1139b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1140b48ac83dSMarc Zyngier { 1141b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1142b48ac83dSMarc Zyngier struct its_node *its; 1143b48ac83dSMarc Zyngier u64 addr; 1144b48ac83dSMarc Zyngier 1145b48ac83dSMarc Zyngier its = its_dev->its; 1146558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1147b48ac83dSMarc Zyngier 1148b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1149b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1150b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 115144bb7e24SRobin Murphy 115244bb7e24SRobin Murphy iommu_dma_map_msi_msg(d->irq, msg); 1153b48ac83dSMarc Zyngier } 1154b48ac83dSMarc Zyngier 11558d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 11568d85dcedSMarc Zyngier enum irqchip_irq_state which, 11578d85dcedSMarc Zyngier bool state) 11588d85dcedSMarc Zyngier { 11598d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 11608d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 11618d85dcedSMarc Zyngier 11628d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 11638d85dcedSMarc Zyngier return -EINVAL; 11648d85dcedSMarc Zyngier 11658d85dcedSMarc Zyngier if (state) 11668d85dcedSMarc Zyngier its_send_int(its_dev, event); 11678d85dcedSMarc Zyngier else 11688d85dcedSMarc Zyngier its_send_clear(its_dev, event); 11698d85dcedSMarc Zyngier 11708d85dcedSMarc Zyngier return 0; 11718d85dcedSMarc Zyngier } 11728d85dcedSMarc Zyngier 1173d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1174d011e4e6SMarc Zyngier { 1175d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1176d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1177d011e4e6SMarc Zyngier int ret = 0; 1178d011e4e6SMarc Zyngier 1179d011e4e6SMarc Zyngier if (!info->map) 1180d011e4e6SMarc Zyngier return -EINVAL; 1181d011e4e6SMarc Zyngier 1182d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1183d011e4e6SMarc Zyngier 1184d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1185d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1186d011e4e6SMarc Zyngier 1187d011e4e6SMarc Zyngier maps = kzalloc(sizeof(*maps) * its_dev->event_map.nr_lpis, 1188d011e4e6SMarc Zyngier GFP_KERNEL); 1189d011e4e6SMarc Zyngier if (!maps) { 1190d011e4e6SMarc Zyngier ret = -ENOMEM; 1191d011e4e6SMarc Zyngier goto out; 1192d011e4e6SMarc Zyngier } 1193d011e4e6SMarc Zyngier 1194d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1195d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1196d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1197d011e4e6SMarc Zyngier ret = -EINVAL; 1198d011e4e6SMarc Zyngier goto out; 1199d011e4e6SMarc Zyngier } 1200d011e4e6SMarc Zyngier 1201d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1202d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1203d011e4e6SMarc Zyngier 1204d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1205d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1206d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1207d011e4e6SMarc Zyngier } else { 1208d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1209d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1210d011e4e6SMarc Zyngier 1211d011e4e6SMarc Zyngier /* and install the virtual one */ 1212d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1213d011e4e6SMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1214d011e4e6SMarc Zyngier 1215d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1216d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1217d011e4e6SMarc Zyngier } 1218d011e4e6SMarc Zyngier 1219d011e4e6SMarc Zyngier out: 1220d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1221d011e4e6SMarc Zyngier return ret; 1222d011e4e6SMarc Zyngier } 1223d011e4e6SMarc Zyngier 1224d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1225d011e4e6SMarc Zyngier { 1226d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1227d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1228d011e4e6SMarc Zyngier int ret = 0; 1229d011e4e6SMarc Zyngier 1230d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1231d011e4e6SMarc Zyngier 1232d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || 1233d011e4e6SMarc Zyngier !its_dev->event_map.vlpi_maps[event].vm) { 1234d011e4e6SMarc Zyngier ret = -EINVAL; 1235d011e4e6SMarc Zyngier goto out; 1236d011e4e6SMarc Zyngier } 1237d011e4e6SMarc Zyngier 1238d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1239d011e4e6SMarc Zyngier *info->map = its_dev->event_map.vlpi_maps[event]; 1240d011e4e6SMarc Zyngier 1241d011e4e6SMarc Zyngier out: 1242d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1243d011e4e6SMarc Zyngier return ret; 1244d011e4e6SMarc Zyngier } 1245d011e4e6SMarc Zyngier 1246d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1247d011e4e6SMarc Zyngier { 1248d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1249d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1250d011e4e6SMarc Zyngier int ret = 0; 1251d011e4e6SMarc Zyngier 1252d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1253d011e4e6SMarc Zyngier 1254d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1255d011e4e6SMarc Zyngier ret = -EINVAL; 1256d011e4e6SMarc Zyngier goto out; 1257d011e4e6SMarc Zyngier } 1258d011e4e6SMarc Zyngier 1259d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1260d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1261d011e4e6SMarc Zyngier 1262d011e4e6SMarc Zyngier /* and restore the physical one */ 1263d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1264d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1265d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1266d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1267d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1268d011e4e6SMarc Zyngier 1269d011e4e6SMarc Zyngier /* 1270d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1271d011e4e6SMarc Zyngier * this was the last VLPI. 1272d011e4e6SMarc Zyngier */ 1273d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1274d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1275d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1276d011e4e6SMarc Zyngier } 1277d011e4e6SMarc Zyngier 1278d011e4e6SMarc Zyngier out: 1279d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1280d011e4e6SMarc Zyngier return ret; 1281d011e4e6SMarc Zyngier } 1282d011e4e6SMarc Zyngier 1283015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1284015ec038SMarc Zyngier { 1285015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1286015ec038SMarc Zyngier 1287015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1288015ec038SMarc Zyngier return -EINVAL; 1289015ec038SMarc Zyngier 1290015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1291015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1292015ec038SMarc Zyngier else 1293015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1294015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1295015ec038SMarc Zyngier 1296015ec038SMarc Zyngier return 0; 1297015ec038SMarc Zyngier } 1298015ec038SMarc Zyngier 1299c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1300c808eea8SMarc Zyngier { 1301c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1302c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1303c808eea8SMarc Zyngier 1304c808eea8SMarc Zyngier /* Need a v4 ITS */ 1305d011e4e6SMarc Zyngier if (!its_dev->its->is_v4) 1306c808eea8SMarc Zyngier return -EINVAL; 1307c808eea8SMarc Zyngier 1308d011e4e6SMarc Zyngier /* Unmap request? */ 1309d011e4e6SMarc Zyngier if (!info) 1310d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1311d011e4e6SMarc Zyngier 1312c808eea8SMarc Zyngier switch (info->cmd_type) { 1313c808eea8SMarc Zyngier case MAP_VLPI: 1314d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1315c808eea8SMarc Zyngier 1316c808eea8SMarc Zyngier case GET_VLPI: 1317d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1318c808eea8SMarc Zyngier 1319c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1320c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1321015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1322c808eea8SMarc Zyngier 1323c808eea8SMarc Zyngier default: 1324c808eea8SMarc Zyngier return -EINVAL; 1325c808eea8SMarc Zyngier } 1326c808eea8SMarc Zyngier } 1327c808eea8SMarc Zyngier 1328c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1329c48ed51cSMarc Zyngier .name = "ITS", 1330c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1331c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1332004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1333c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1334b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 13358d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1336c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1337b48ac83dSMarc Zyngier }; 1338b48ac83dSMarc Zyngier 1339bf9529f8SMarc Zyngier /* 1340bf9529f8SMarc Zyngier * How we allocate LPIs: 1341bf9529f8SMarc Zyngier * 1342bf9529f8SMarc Zyngier * The GIC has id_bits bits for interrupt identifiers. From there, we 1343bf9529f8SMarc Zyngier * must subtract 8192 which are reserved for SGIs/PPIs/SPIs. Then, as 1344bf9529f8SMarc Zyngier * we allocate LPIs by chunks of 32, we can shift the whole thing by 5 1345bf9529f8SMarc Zyngier * bits to the right. 1346bf9529f8SMarc Zyngier * 1347bf9529f8SMarc Zyngier * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations. 1348bf9529f8SMarc Zyngier */ 1349bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK_SHIFT 5 1350bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK (1 << IRQS_PER_CHUNK_SHIFT) 13516c31e123SShanker Donthineni #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1352bf9529f8SMarc Zyngier 1353bf9529f8SMarc Zyngier static unsigned long *lpi_bitmap; 1354bf9529f8SMarc Zyngier static u32 lpi_chunks; 1355bf9529f8SMarc Zyngier static DEFINE_SPINLOCK(lpi_lock); 1356bf9529f8SMarc Zyngier 1357bf9529f8SMarc Zyngier static int its_lpi_to_chunk(int lpi) 1358bf9529f8SMarc Zyngier { 1359bf9529f8SMarc Zyngier return (lpi - 8192) >> IRQS_PER_CHUNK_SHIFT; 1360bf9529f8SMarc Zyngier } 1361bf9529f8SMarc Zyngier 1362bf9529f8SMarc Zyngier static int its_chunk_to_lpi(int chunk) 1363bf9529f8SMarc Zyngier { 1364bf9529f8SMarc Zyngier return (chunk << IRQS_PER_CHUNK_SHIFT) + 8192; 1365bf9529f8SMarc Zyngier } 1366bf9529f8SMarc Zyngier 136704a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1368bf9529f8SMarc Zyngier { 1369bf9529f8SMarc Zyngier lpi_chunks = its_lpi_to_chunk(1UL << id_bits); 1370bf9529f8SMarc Zyngier 1371bf9529f8SMarc Zyngier lpi_bitmap = kzalloc(BITS_TO_LONGS(lpi_chunks) * sizeof(long), 1372bf9529f8SMarc Zyngier GFP_KERNEL); 1373bf9529f8SMarc Zyngier if (!lpi_bitmap) { 1374bf9529f8SMarc Zyngier lpi_chunks = 0; 1375bf9529f8SMarc Zyngier return -ENOMEM; 1376bf9529f8SMarc Zyngier } 1377bf9529f8SMarc Zyngier 1378bf9529f8SMarc Zyngier pr_info("ITS: Allocated %d chunks for LPIs\n", (int)lpi_chunks); 1379bf9529f8SMarc Zyngier return 0; 1380bf9529f8SMarc Zyngier } 1381bf9529f8SMarc Zyngier 1382bf9529f8SMarc Zyngier static unsigned long *its_lpi_alloc_chunks(int nr_irqs, int *base, int *nr_ids) 1383bf9529f8SMarc Zyngier { 1384bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1385bf9529f8SMarc Zyngier int chunk_id; 1386bf9529f8SMarc Zyngier int nr_chunks; 1387bf9529f8SMarc Zyngier int i; 1388bf9529f8SMarc Zyngier 1389bf9529f8SMarc Zyngier nr_chunks = DIV_ROUND_UP(nr_irqs, IRQS_PER_CHUNK); 1390bf9529f8SMarc Zyngier 1391bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 1392bf9529f8SMarc Zyngier 1393bf9529f8SMarc Zyngier do { 1394bf9529f8SMarc Zyngier chunk_id = bitmap_find_next_zero_area(lpi_bitmap, lpi_chunks, 1395bf9529f8SMarc Zyngier 0, nr_chunks, 0); 1396bf9529f8SMarc Zyngier if (chunk_id < lpi_chunks) 1397bf9529f8SMarc Zyngier break; 1398bf9529f8SMarc Zyngier 1399bf9529f8SMarc Zyngier nr_chunks--; 1400bf9529f8SMarc Zyngier } while (nr_chunks > 0); 1401bf9529f8SMarc Zyngier 1402bf9529f8SMarc Zyngier if (!nr_chunks) 1403bf9529f8SMarc Zyngier goto out; 1404bf9529f8SMarc Zyngier 1405bf9529f8SMarc Zyngier bitmap = kzalloc(BITS_TO_LONGS(nr_chunks * IRQS_PER_CHUNK) * sizeof (long), 1406bf9529f8SMarc Zyngier GFP_ATOMIC); 1407bf9529f8SMarc Zyngier if (!bitmap) 1408bf9529f8SMarc Zyngier goto out; 1409bf9529f8SMarc Zyngier 1410bf9529f8SMarc Zyngier for (i = 0; i < nr_chunks; i++) 1411bf9529f8SMarc Zyngier set_bit(chunk_id + i, lpi_bitmap); 1412bf9529f8SMarc Zyngier 1413bf9529f8SMarc Zyngier *base = its_chunk_to_lpi(chunk_id); 1414bf9529f8SMarc Zyngier *nr_ids = nr_chunks * IRQS_PER_CHUNK; 1415bf9529f8SMarc Zyngier 1416bf9529f8SMarc Zyngier out: 1417bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 1418bf9529f8SMarc Zyngier 1419c8415b94SMarc Zyngier if (!bitmap) 1420c8415b94SMarc Zyngier *base = *nr_ids = 0; 1421c8415b94SMarc Zyngier 1422bf9529f8SMarc Zyngier return bitmap; 1423bf9529f8SMarc Zyngier } 1424bf9529f8SMarc Zyngier 1425cf2be8baSMarc Zyngier static void its_lpi_free_chunks(unsigned long *bitmap, int base, int nr_ids) 1426bf9529f8SMarc Zyngier { 1427bf9529f8SMarc Zyngier int lpi; 1428bf9529f8SMarc Zyngier 1429bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 1430bf9529f8SMarc Zyngier 1431bf9529f8SMarc Zyngier for (lpi = base; lpi < (base + nr_ids); lpi += IRQS_PER_CHUNK) { 1432bf9529f8SMarc Zyngier int chunk = its_lpi_to_chunk(lpi); 1433cf2be8baSMarc Zyngier 1434bf9529f8SMarc Zyngier BUG_ON(chunk > lpi_chunks); 1435bf9529f8SMarc Zyngier if (test_bit(chunk, lpi_bitmap)) { 1436bf9529f8SMarc Zyngier clear_bit(chunk, lpi_bitmap); 1437bf9529f8SMarc Zyngier } else { 1438bf9529f8SMarc Zyngier pr_err("Bad LPI chunk %d\n", chunk); 1439bf9529f8SMarc Zyngier } 1440bf9529f8SMarc Zyngier } 1441bf9529f8SMarc Zyngier 1442bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 1443bf9529f8SMarc Zyngier 1444cf2be8baSMarc Zyngier kfree(bitmap); 1445bf9529f8SMarc Zyngier } 14461ac19ca6SMarc Zyngier 14470e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 14480e5ccf91SMarc Zyngier { 14490e5ccf91SMarc Zyngier struct page *prop_page; 14501ac19ca6SMarc Zyngier 14510e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 14520e5ccf91SMarc Zyngier if (!prop_page) 14530e5ccf91SMarc Zyngier return NULL; 14540e5ccf91SMarc Zyngier 14550e5ccf91SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 14560e5ccf91SMarc Zyngier memset(page_address(prop_page), 14570e5ccf91SMarc Zyngier LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, 14580e5ccf91SMarc Zyngier LPI_PROPBASE_SZ); 14590e5ccf91SMarc Zyngier 14600e5ccf91SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 14610e5ccf91SMarc Zyngier gic_flush_dcache_to_poc(page_address(prop_page), LPI_PROPBASE_SZ); 14620e5ccf91SMarc Zyngier 14630e5ccf91SMarc Zyngier return prop_page; 14640e5ccf91SMarc Zyngier } 14650e5ccf91SMarc Zyngier 14667d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 14677d75bbb4SMarc Zyngier { 14687d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 14697d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 14707d75bbb4SMarc Zyngier } 14711ac19ca6SMarc Zyngier 14721ac19ca6SMarc Zyngier static int __init its_alloc_lpi_tables(void) 14731ac19ca6SMarc Zyngier { 14741ac19ca6SMarc Zyngier phys_addr_t paddr; 14751ac19ca6SMarc Zyngier 14766c31e123SShanker Donthineni lpi_id_bits = min_t(u32, gic_rdists->id_bits, ITS_MAX_LPI_NRBITS); 14770e5ccf91SMarc Zyngier gic_rdists->prop_page = its_allocate_prop_table(GFP_NOWAIT); 14781ac19ca6SMarc Zyngier if (!gic_rdists->prop_page) { 14791ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 14801ac19ca6SMarc Zyngier return -ENOMEM; 14811ac19ca6SMarc Zyngier } 14821ac19ca6SMarc Zyngier 14831ac19ca6SMarc Zyngier paddr = page_to_phys(gic_rdists->prop_page); 14841ac19ca6SMarc Zyngier pr_info("GIC: using LPI property table @%pa\n", &paddr); 14851ac19ca6SMarc Zyngier 14866c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 14871ac19ca6SMarc Zyngier } 14881ac19ca6SMarc Zyngier 14891ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 14901ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 14911ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 14924f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 14931ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 14941ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 14951ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 14961ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 14971ac19ca6SMarc Zyngier }; 14981ac19ca6SMarc Zyngier 14992d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 15002d81d425SShanker Donthineni { 15012d81d425SShanker Donthineni u32 idx = baser - its->tables; 15022d81d425SShanker Donthineni 15030968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 15042d81d425SShanker Donthineni } 15052d81d425SShanker Donthineni 15062d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 15072d81d425SShanker Donthineni u64 val) 15082d81d425SShanker Donthineni { 15092d81d425SShanker Donthineni u32 idx = baser - its->tables; 15102d81d425SShanker Donthineni 15110968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 15122d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 15132d81d425SShanker Donthineni } 15142d81d425SShanker Donthineni 15159347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 15163faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 15173faf24eaSShanker Donthineni bool indirect) 15189347359aSShanker Donthineni { 15199347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 15209347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 15219347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 15229347359aSShanker Donthineni u32 alloc_pages; 15239347359aSShanker Donthineni void *base; 15249347359aSShanker Donthineni u64 tmp; 15259347359aSShanker Donthineni 15269347359aSShanker Donthineni retry_alloc_baser: 15279347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 15289347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 15299347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 15309347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 15319347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 15329347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 15339347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 15349347359aSShanker Donthineni } 15359347359aSShanker Donthineni 15369347359aSShanker Donthineni base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 15379347359aSShanker Donthineni if (!base) 15389347359aSShanker Donthineni return -ENOMEM; 15399347359aSShanker Donthineni 15409347359aSShanker Donthineni retry_baser: 15419347359aSShanker Donthineni val = (virt_to_phys(base) | 15429347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 15439347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 15449347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 15459347359aSShanker Donthineni cache | 15469347359aSShanker Donthineni shr | 15479347359aSShanker Donthineni GITS_BASER_VALID); 15489347359aSShanker Donthineni 15493faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 15503faf24eaSShanker Donthineni 15519347359aSShanker Donthineni switch (psz) { 15529347359aSShanker Donthineni case SZ_4K: 15539347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 15549347359aSShanker Donthineni break; 15559347359aSShanker Donthineni case SZ_16K: 15569347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 15579347359aSShanker Donthineni break; 15589347359aSShanker Donthineni case SZ_64K: 15599347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 15609347359aSShanker Donthineni break; 15619347359aSShanker Donthineni } 15629347359aSShanker Donthineni 15639347359aSShanker Donthineni its_write_baser(its, baser, val); 15649347359aSShanker Donthineni tmp = baser->val; 15659347359aSShanker Donthineni 15669347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 15679347359aSShanker Donthineni /* 15689347359aSShanker Donthineni * Shareability didn't stick. Just use 15699347359aSShanker Donthineni * whatever the read reported, which is likely 15709347359aSShanker Donthineni * to be the only thing this redistributor 15719347359aSShanker Donthineni * supports. If that's zero, make it 15729347359aSShanker Donthineni * non-cacheable as well. 15739347359aSShanker Donthineni */ 15749347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 15759347359aSShanker Donthineni if (!shr) { 15769347359aSShanker Donthineni cache = GITS_BASER_nC; 1577328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 15789347359aSShanker Donthineni } 15799347359aSShanker Donthineni goto retry_baser; 15809347359aSShanker Donthineni } 15819347359aSShanker Donthineni 15829347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 15839347359aSShanker Donthineni /* 15849347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 15859347359aSShanker Donthineni * size and retry. If we reach 4K, then 15869347359aSShanker Donthineni * something is horribly wrong... 15879347359aSShanker Donthineni */ 15889347359aSShanker Donthineni free_pages((unsigned long)base, order); 15899347359aSShanker Donthineni baser->base = NULL; 15909347359aSShanker Donthineni 15919347359aSShanker Donthineni switch (psz) { 15929347359aSShanker Donthineni case SZ_16K: 15939347359aSShanker Donthineni psz = SZ_4K; 15949347359aSShanker Donthineni goto retry_alloc_baser; 15959347359aSShanker Donthineni case SZ_64K: 15969347359aSShanker Donthineni psz = SZ_16K; 15979347359aSShanker Donthineni goto retry_alloc_baser; 15989347359aSShanker Donthineni } 15999347359aSShanker Donthineni } 16009347359aSShanker Donthineni 16019347359aSShanker Donthineni if (val != tmp) { 1602b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 16039347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1604b11283ebSVladimir Murzin val, tmp); 16059347359aSShanker Donthineni free_pages((unsigned long)base, order); 16069347359aSShanker Donthineni return -ENXIO; 16079347359aSShanker Donthineni } 16089347359aSShanker Donthineni 16099347359aSShanker Donthineni baser->order = order; 16109347359aSShanker Donthineni baser->base = base; 16119347359aSShanker Donthineni baser->psz = psz; 16123faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 16139347359aSShanker Donthineni 16143faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1615d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 16169347359aSShanker Donthineni its_base_type_string[type], 16179347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 16183faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 16199347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 16209347359aSShanker Donthineni 16219347359aSShanker Donthineni return 0; 16229347359aSShanker Donthineni } 16239347359aSShanker Donthineni 16244cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 16254cacac57SMarc Zyngier struct its_baser *baser, 16263faf24eaSShanker Donthineni u32 psz, u32 *order) 16274b75c459SShanker Donthineni { 16284cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 16294cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 16304cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 16312fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 16324b75c459SShanker Donthineni u32 ids = its->device_ids; 16334b75c459SShanker Donthineni u32 new_order = *order; 16343faf24eaSShanker Donthineni bool indirect = false; 16353faf24eaSShanker Donthineni 16363faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 16373faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 16383faf24eaSShanker Donthineni /* 16393faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 16403faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 16413faf24eaSShanker Donthineni */ 16423faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 16433faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 16443faf24eaSShanker Donthineni 16453faf24eaSShanker Donthineni if (indirect) { 16463faf24eaSShanker Donthineni /* 16473faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 16483faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 16493faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 16503faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 16513faf24eaSShanker Donthineni * entry size. 16523faf24eaSShanker Donthineni */ 1653d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 16543faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 16553faf24eaSShanker Donthineni } 16563faf24eaSShanker Donthineni } 16574b75c459SShanker Donthineni 16584b75c459SShanker Donthineni /* 16594b75c459SShanker Donthineni * Allocate as many entries as required to fit the 16604b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 16614b75c459SShanker Donthineni * space being incredibly sparse, this results in a 16623faf24eaSShanker Donthineni * massive waste of memory if two-level device table 16633faf24eaSShanker Donthineni * feature is not supported by hardware. 16644b75c459SShanker Donthineni */ 16654b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 16664b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 16674b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1668d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 16694cacac57SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %u->%u\n", 16704cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 16714cacac57SMarc Zyngier its->device_ids, ids); 16724b75c459SShanker Donthineni } 16734b75c459SShanker Donthineni 16744b75c459SShanker Donthineni *order = new_order; 16753faf24eaSShanker Donthineni 16763faf24eaSShanker Donthineni return indirect; 16774b75c459SShanker Donthineni } 16784b75c459SShanker Donthineni 16791ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 16801ac19ca6SMarc Zyngier { 16811ac19ca6SMarc Zyngier int i; 16821ac19ca6SMarc Zyngier 16831ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 16841a485f4dSShanker Donthineni if (its->tables[i].base) { 16851a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 16861a485f4dSShanker Donthineni its->tables[i].order); 16871a485f4dSShanker Donthineni its->tables[i].base = NULL; 16881ac19ca6SMarc Zyngier } 16891ac19ca6SMarc Zyngier } 16901ac19ca6SMarc Zyngier } 16911ac19ca6SMarc Zyngier 16920e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 16931ac19ca6SMarc Zyngier { 16941ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 16952fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 16969347359aSShanker Donthineni u32 psz = SZ_64K; 16979347359aSShanker Donthineni int err, i; 169894100970SRobert Richter 1699fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 1700fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 17019347359aSShanker Donthineni cache = GITS_BASER_nCnB; 1702466b7d16SShanker Donthineni 17031ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 17042d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 17052d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 17061ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 17079347359aSShanker Donthineni u32 order = get_order(psz); 17083faf24eaSShanker Donthineni bool indirect = false; 17091ac19ca6SMarc Zyngier 17104cacac57SMarc Zyngier switch (type) { 17114cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 17121ac19ca6SMarc Zyngier continue; 17131ac19ca6SMarc Zyngier 17144cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 17154cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 17164cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 17174cacac57SMarc Zyngier psz, &order); 17184cacac57SMarc Zyngier break; 17194cacac57SMarc Zyngier } 1720f54b97edSMarc Zyngier 17213faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 17229347359aSShanker Donthineni if (err < 0) { 17239347359aSShanker Donthineni its_free_tables(its); 17249347359aSShanker Donthineni return err; 172530f21363SRobert Richter } 172630f21363SRobert Richter 17279347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 17289347359aSShanker Donthineni psz = baser->psz; 17299347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 17309347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 17311ac19ca6SMarc Zyngier } 17321ac19ca6SMarc Zyngier 17331ac19ca6SMarc Zyngier return 0; 17341ac19ca6SMarc Zyngier } 17351ac19ca6SMarc Zyngier 17361ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 17371ac19ca6SMarc Zyngier { 17381ac19ca6SMarc Zyngier its->collections = kzalloc(nr_cpu_ids * sizeof(*its->collections), 17391ac19ca6SMarc Zyngier GFP_KERNEL); 17401ac19ca6SMarc Zyngier if (!its->collections) 17411ac19ca6SMarc Zyngier return -ENOMEM; 17421ac19ca6SMarc Zyngier 17431ac19ca6SMarc Zyngier return 0; 17441ac19ca6SMarc Zyngier } 17451ac19ca6SMarc Zyngier 17467c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 17477c297a2dSMarc Zyngier { 17487c297a2dSMarc Zyngier struct page *pend_page; 17497c297a2dSMarc Zyngier /* 17507c297a2dSMarc Zyngier * The pending pages have to be at least 64kB aligned, 17517c297a2dSMarc Zyngier * hence the 'max(LPI_PENDBASE_SZ, SZ_64K)' below. 17527c297a2dSMarc Zyngier */ 17537c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 17547c297a2dSMarc Zyngier get_order(max_t(u32, LPI_PENDBASE_SZ, SZ_64K))); 17557c297a2dSMarc Zyngier if (!pend_page) 17567c297a2dSMarc Zyngier return NULL; 17577c297a2dSMarc Zyngier 17587c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 17597c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 17607c297a2dSMarc Zyngier 17617c297a2dSMarc Zyngier return pend_page; 17627c297a2dSMarc Zyngier } 17637c297a2dSMarc Zyngier 17647d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 17657d75bbb4SMarc Zyngier { 17667d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(pt), 17677d75bbb4SMarc Zyngier get_order(max_t(u32, LPI_PENDBASE_SZ, SZ_64K))); 17687d75bbb4SMarc Zyngier } 17697d75bbb4SMarc Zyngier 17701ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 17711ac19ca6SMarc Zyngier { 17721ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 17731ac19ca6SMarc Zyngier struct page *pend_page; 17741ac19ca6SMarc Zyngier u64 val, tmp; 17751ac19ca6SMarc Zyngier 17761ac19ca6SMarc Zyngier /* If we didn't allocate the pending table yet, do it now */ 17771ac19ca6SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 17781ac19ca6SMarc Zyngier if (!pend_page) { 17791ac19ca6SMarc Zyngier phys_addr_t paddr; 17807c297a2dSMarc Zyngier 17817c297a2dSMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 17821ac19ca6SMarc Zyngier if (!pend_page) { 17831ac19ca6SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", 17841ac19ca6SMarc Zyngier smp_processor_id()); 17851ac19ca6SMarc Zyngier return; 17861ac19ca6SMarc Zyngier } 17871ac19ca6SMarc Zyngier 17881ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 17891ac19ca6SMarc Zyngier pr_info("CPU%d: using LPI pending table @%pa\n", 17901ac19ca6SMarc Zyngier smp_processor_id(), &paddr); 17911ac19ca6SMarc Zyngier gic_data_rdist()->pend_page = pend_page; 17921ac19ca6SMarc Zyngier } 17931ac19ca6SMarc Zyngier 17941ac19ca6SMarc Zyngier /* Disable LPIs */ 17951ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 17961ac19ca6SMarc Zyngier val &= ~GICR_CTLR_ENABLE_LPIS; 17971ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 17981ac19ca6SMarc Zyngier 17991ac19ca6SMarc Zyngier /* 18001ac19ca6SMarc Zyngier * Make sure any change to the table is observable by the GIC. 18011ac19ca6SMarc Zyngier */ 18021ac19ca6SMarc Zyngier dsb(sy); 18031ac19ca6SMarc Zyngier 18041ac19ca6SMarc Zyngier /* set PROPBASE */ 18051ac19ca6SMarc Zyngier val = (page_to_phys(gic_rdists->prop_page) | 18061ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 18072fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 18081ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 18091ac19ca6SMarc Zyngier 18100968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 18110968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 18121ac19ca6SMarc Zyngier 18131ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 1814241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 1815241a386cSMarc Zyngier /* 1816241a386cSMarc Zyngier * The HW reports non-shareable, we must 1817241a386cSMarc Zyngier * remove the cacheability attributes as 1818241a386cSMarc Zyngier * well. 1819241a386cSMarc Zyngier */ 1820241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 1821241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 1822241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 18230968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 1824241a386cSMarc Zyngier } 18251ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 18261ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 18271ac19ca6SMarc Zyngier } 18281ac19ca6SMarc Zyngier 18291ac19ca6SMarc Zyngier /* set PENDBASE */ 18301ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 18314ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 18322fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 18331ac19ca6SMarc Zyngier 18340968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 18350968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 1836241a386cSMarc Zyngier 1837241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 1838241a386cSMarc Zyngier /* 1839241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 1840241a386cSMarc Zyngier * cacheability attributes as well. 1841241a386cSMarc Zyngier */ 1842241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 1843241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 1844241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 18450968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 1846241a386cSMarc Zyngier } 18471ac19ca6SMarc Zyngier 18481ac19ca6SMarc Zyngier /* Enable LPIs */ 18491ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 18501ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 18511ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 18521ac19ca6SMarc Zyngier 18531ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 18541ac19ca6SMarc Zyngier dsb(sy); 18551ac19ca6SMarc Zyngier } 18561ac19ca6SMarc Zyngier 18571ac19ca6SMarc Zyngier static void its_cpu_init_collection(void) 18581ac19ca6SMarc Zyngier { 18591ac19ca6SMarc Zyngier struct its_node *its; 18601ac19ca6SMarc Zyngier int cpu; 18611ac19ca6SMarc Zyngier 18621ac19ca6SMarc Zyngier spin_lock(&its_lock); 18631ac19ca6SMarc Zyngier cpu = smp_processor_id(); 18641ac19ca6SMarc Zyngier 18651ac19ca6SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 18661ac19ca6SMarc Zyngier u64 target; 18671ac19ca6SMarc Zyngier 1868fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 1869fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1870fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 1871fbf8f40eSGanapatrao Kulkarni 1872fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 1873fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 1874fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 1875fbf8f40eSGanapatrao Kulkarni continue; 1876fbf8f40eSGanapatrao Kulkarni } 1877fbf8f40eSGanapatrao Kulkarni 18781ac19ca6SMarc Zyngier /* 18791ac19ca6SMarc Zyngier * We now have to bind each collection to its target 18801ac19ca6SMarc Zyngier * redistributor. 18811ac19ca6SMarc Zyngier */ 1882589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 18831ac19ca6SMarc Zyngier /* 18841ac19ca6SMarc Zyngier * This ITS wants the physical address of the 18851ac19ca6SMarc Zyngier * redistributor. 18861ac19ca6SMarc Zyngier */ 18871ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 18881ac19ca6SMarc Zyngier } else { 18891ac19ca6SMarc Zyngier /* 18901ac19ca6SMarc Zyngier * This ITS wants a linear CPU number. 18911ac19ca6SMarc Zyngier */ 1892589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 1893263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 18941ac19ca6SMarc Zyngier } 18951ac19ca6SMarc Zyngier 18961ac19ca6SMarc Zyngier /* Perform collection mapping */ 18971ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 18981ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 18991ac19ca6SMarc Zyngier 19001ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 19011ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 19021ac19ca6SMarc Zyngier } 19031ac19ca6SMarc Zyngier 19041ac19ca6SMarc Zyngier spin_unlock(&its_lock); 19051ac19ca6SMarc Zyngier } 190684a6a2e7SMarc Zyngier 190784a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 190884a6a2e7SMarc Zyngier { 190984a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 19103e39e8f5SMarc Zyngier unsigned long flags; 191184a6a2e7SMarc Zyngier 19123e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 191384a6a2e7SMarc Zyngier 191484a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 191584a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 191684a6a2e7SMarc Zyngier its_dev = tmp; 191784a6a2e7SMarc Zyngier break; 191884a6a2e7SMarc Zyngier } 191984a6a2e7SMarc Zyngier } 192084a6a2e7SMarc Zyngier 19213e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 192284a6a2e7SMarc Zyngier 192384a6a2e7SMarc Zyngier return its_dev; 192484a6a2e7SMarc Zyngier } 192584a6a2e7SMarc Zyngier 1926466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 1927466b7d16SShanker Donthineni { 1928466b7d16SShanker Donthineni int i; 1929466b7d16SShanker Donthineni 1930466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 1931466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 1932466b7d16SShanker Donthineni return &its->tables[i]; 1933466b7d16SShanker Donthineni } 1934466b7d16SShanker Donthineni 1935466b7d16SShanker Donthineni return NULL; 1936466b7d16SShanker Donthineni } 1937466b7d16SShanker Donthineni 193870cc81edSMarc Zyngier static bool its_alloc_table_entry(struct its_baser *baser, u32 id) 19393faf24eaSShanker Donthineni { 19403faf24eaSShanker Donthineni struct page *page; 19413faf24eaSShanker Donthineni u32 esz, idx; 19423faf24eaSShanker Donthineni __le64 *table; 19433faf24eaSShanker Donthineni 19443faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 19453faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 19463faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 194770cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 19483faf24eaSShanker Donthineni 19493faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 195070cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 19513faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 19523faf24eaSShanker Donthineni return false; 19533faf24eaSShanker Donthineni 19543faf24eaSShanker Donthineni table = baser->base; 19553faf24eaSShanker Donthineni 19563faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 19573faf24eaSShanker Donthineni if (!table[idx]) { 19583faf24eaSShanker Donthineni page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(baser->psz)); 19593faf24eaSShanker Donthineni if (!page) 19603faf24eaSShanker Donthineni return false; 19613faf24eaSShanker Donthineni 19623faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 19633faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 1964328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 19653faf24eaSShanker Donthineni 19663faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 19673faf24eaSShanker Donthineni 19683faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 19693faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 1970328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 19713faf24eaSShanker Donthineni 19723faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 19733faf24eaSShanker Donthineni dsb(sy); 19743faf24eaSShanker Donthineni } 19753faf24eaSShanker Donthineni 19763faf24eaSShanker Donthineni return true; 19773faf24eaSShanker Donthineni } 19783faf24eaSShanker Donthineni 197970cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 198070cc81edSMarc Zyngier { 198170cc81edSMarc Zyngier struct its_baser *baser; 198270cc81edSMarc Zyngier 198370cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 198470cc81edSMarc Zyngier 198570cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 198670cc81edSMarc Zyngier if (!baser) 198770cc81edSMarc Zyngier return (ilog2(dev_id) < its->device_ids); 198870cc81edSMarc Zyngier 198970cc81edSMarc Zyngier return its_alloc_table_entry(baser, dev_id); 199070cc81edSMarc Zyngier } 199170cc81edSMarc Zyngier 19927d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 19937d75bbb4SMarc Zyngier { 19947d75bbb4SMarc Zyngier struct its_node *its; 19957d75bbb4SMarc Zyngier 19967d75bbb4SMarc Zyngier /* 19977d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 19987d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 19997d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 20007d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 20017d75bbb4SMarc Zyngier * anyway, right?). 20027d75bbb4SMarc Zyngier */ 20037d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 20047d75bbb4SMarc Zyngier struct its_baser *baser; 20057d75bbb4SMarc Zyngier 20067d75bbb4SMarc Zyngier if (!its->is_v4) 20077d75bbb4SMarc Zyngier continue; 20087d75bbb4SMarc Zyngier 20097d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 20107d75bbb4SMarc Zyngier if (!baser) 20117d75bbb4SMarc Zyngier return false; 20127d75bbb4SMarc Zyngier 20137d75bbb4SMarc Zyngier if (!its_alloc_table_entry(baser, vpe_id)) 20147d75bbb4SMarc Zyngier return false; 20157d75bbb4SMarc Zyngier } 20167d75bbb4SMarc Zyngier 20177d75bbb4SMarc Zyngier return true; 20187d75bbb4SMarc Zyngier } 20197d75bbb4SMarc Zyngier 202084a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 202193f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 202284a6a2e7SMarc Zyngier { 202384a6a2e7SMarc Zyngier struct its_device *dev; 202493f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 20253e39e8f5SMarc Zyngier unsigned long flags; 2026591e5becSMarc Zyngier u16 *col_map = NULL; 202784a6a2e7SMarc Zyngier void *itt; 202884a6a2e7SMarc Zyngier int lpi_base; 202984a6a2e7SMarc Zyngier int nr_lpis; 2030c8481267SMarc Zyngier int nr_ites; 203184a6a2e7SMarc Zyngier int sz; 203284a6a2e7SMarc Zyngier 20333faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2034466b7d16SShanker Donthineni return NULL; 2035466b7d16SShanker Donthineni 203684a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2037c8481267SMarc Zyngier /* 2038c8481267SMarc Zyngier * At least one bit of EventID is being used, hence a minimum 2039c8481267SMarc Zyngier * of two entries. No, the architecture doesn't let you 2040c8481267SMarc Zyngier * express an ITT with a single entry. 2041c8481267SMarc Zyngier */ 204296555c47SWill Deacon nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 2043c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 204484a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 20456c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 204693f94ea0SMarc Zyngier if (alloc_lpis) { 204784a6a2e7SMarc Zyngier lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 2048591e5becSMarc Zyngier if (lpi_map) 204993f94ea0SMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_lpis, 205093f94ea0SMarc Zyngier GFP_KERNEL); 205193f94ea0SMarc Zyngier } else { 205293f94ea0SMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_ites, GFP_KERNEL); 205393f94ea0SMarc Zyngier nr_lpis = 0; 205493f94ea0SMarc Zyngier lpi_base = 0; 205593f94ea0SMarc Zyngier } 205684a6a2e7SMarc Zyngier 205793f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 205884a6a2e7SMarc Zyngier kfree(dev); 205984a6a2e7SMarc Zyngier kfree(itt); 206084a6a2e7SMarc Zyngier kfree(lpi_map); 2061591e5becSMarc Zyngier kfree(col_map); 206284a6a2e7SMarc Zyngier return NULL; 206384a6a2e7SMarc Zyngier } 206484a6a2e7SMarc Zyngier 2065328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 20665a9a8915SMarc Zyngier 206784a6a2e7SMarc Zyngier dev->its = its; 206884a6a2e7SMarc Zyngier dev->itt = itt; 2069c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2070591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2071591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2072591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2073591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 2074d011e4e6SMarc Zyngier mutex_init(&dev->event_map.vlpi_lock); 207584a6a2e7SMarc Zyngier dev->device_id = dev_id; 207684a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 207784a6a2e7SMarc Zyngier 20783e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 207984a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 20803e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 208184a6a2e7SMarc Zyngier 208284a6a2e7SMarc Zyngier /* Map device to its ITT */ 208384a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 208484a6a2e7SMarc Zyngier 208584a6a2e7SMarc Zyngier return dev; 208684a6a2e7SMarc Zyngier } 208784a6a2e7SMarc Zyngier 208884a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 208984a6a2e7SMarc Zyngier { 20903e39e8f5SMarc Zyngier unsigned long flags; 20913e39e8f5SMarc Zyngier 20923e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 209384a6a2e7SMarc Zyngier list_del(&its_dev->entry); 20943e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 209584a6a2e7SMarc Zyngier kfree(its_dev->itt); 209684a6a2e7SMarc Zyngier kfree(its_dev); 209784a6a2e7SMarc Zyngier } 2098b48ac83dSMarc Zyngier 2099b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 2100b48ac83dSMarc Zyngier { 2101b48ac83dSMarc Zyngier int idx; 2102b48ac83dSMarc Zyngier 2103591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 2104591e5becSMarc Zyngier dev->event_map.nr_lpis); 2105591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 2106b48ac83dSMarc Zyngier return -ENOSPC; 2107b48ac83dSMarc Zyngier 2108591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 2109591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 2110b48ac83dSMarc Zyngier 2111b48ac83dSMarc Zyngier return 0; 2112b48ac83dSMarc Zyngier } 2113b48ac83dSMarc Zyngier 211454456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 2115b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 2116b48ac83dSMarc Zyngier { 2117b48ac83dSMarc Zyngier struct its_node *its; 2118b48ac83dSMarc Zyngier struct its_device *its_dev; 211954456db9SMarc Zyngier struct msi_domain_info *msi_info; 212054456db9SMarc Zyngier u32 dev_id; 2121b48ac83dSMarc Zyngier 212254456db9SMarc Zyngier /* 212354456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 212454456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 212554456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 212654456db9SMarc Zyngier * are built on top of the ITS. 212754456db9SMarc Zyngier */ 212854456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 212954456db9SMarc Zyngier 213054456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 213154456db9SMarc Zyngier its = msi_info->data; 213254456db9SMarc Zyngier 213320b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 213420b3d54eSMarc Zyngier vpe_proxy.dev && 213520b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 213620b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 213720b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 213820b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 213920b3d54eSMarc Zyngier dev_id); 214020b3d54eSMarc Zyngier return -EINVAL; 214120b3d54eSMarc Zyngier } 214220b3d54eSMarc Zyngier 2143f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 2144e8137f4fSMarc Zyngier if (its_dev) { 2145e8137f4fSMarc Zyngier /* 2146e8137f4fSMarc Zyngier * We already have seen this ID, probably through 2147e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 2148e8137f4fSMarc Zyngier * create the device. 2149e8137f4fSMarc Zyngier */ 2150f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 2151e8137f4fSMarc Zyngier goto out; 2152e8137f4fSMarc Zyngier } 2153b48ac83dSMarc Zyngier 215493f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 2155b48ac83dSMarc Zyngier if (!its_dev) 2156b48ac83dSMarc Zyngier return -ENOMEM; 2157b48ac83dSMarc Zyngier 2158f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 2159e8137f4fSMarc Zyngier out: 2160b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 2161b48ac83dSMarc Zyngier return 0; 2162b48ac83dSMarc Zyngier } 2163b48ac83dSMarc Zyngier 216454456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 216554456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 216654456db9SMarc Zyngier }; 216754456db9SMarc Zyngier 2168b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 2169b48ac83dSMarc Zyngier unsigned int virq, 2170b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 2171b48ac83dSMarc Zyngier { 2172f833f57fSMarc Zyngier struct irq_fwspec fwspec; 2173b48ac83dSMarc Zyngier 2174f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 2175f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 2176f833f57fSMarc Zyngier fwspec.param_count = 3; 2177f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 2178f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 2179f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 21803f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 21813f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 21823f010cf1STomasz Nowicki fwspec.param_count = 2; 21833f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 21843f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 2185f833f57fSMarc Zyngier } else { 2186f833f57fSMarc Zyngier return -EINVAL; 2187f833f57fSMarc Zyngier } 2188b48ac83dSMarc Zyngier 2189f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 2190b48ac83dSMarc Zyngier } 2191b48ac83dSMarc Zyngier 2192b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 2193b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 2194b48ac83dSMarc Zyngier { 2195b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 2196b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 2197b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 2198b48ac83dSMarc Zyngier int err; 2199b48ac83dSMarc Zyngier int i; 2200b48ac83dSMarc Zyngier 2201b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2202b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 2203b48ac83dSMarc Zyngier if (err) 2204b48ac83dSMarc Zyngier return err; 2205b48ac83dSMarc Zyngier 2206b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 2207b48ac83dSMarc Zyngier if (err) 2208b48ac83dSMarc Zyngier return err; 2209b48ac83dSMarc Zyngier 2210b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 2211b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 22120d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 2213f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 2214591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 2215591e5becSMarc Zyngier (int) hwirq, virq + i); 2216b48ac83dSMarc Zyngier } 2217b48ac83dSMarc Zyngier 2218b48ac83dSMarc Zyngier return 0; 2219b48ac83dSMarc Zyngier } 2220b48ac83dSMarc Zyngier 222172491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 222272491643SThomas Gleixner struct irq_data *d, bool early) 2223aca268dfSMarc Zyngier { 2224aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2225aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2226fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 22270d224d35SMarc Zyngier int cpu; 2228fbf8f40eSGanapatrao Kulkarni 2229fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 2230fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 2231fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 2232aca268dfSMarc Zyngier 2233591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 22340d224d35SMarc Zyngier cpu = cpumask_first(cpu_mask); 22350d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 22360d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 2237591e5becSMarc Zyngier 2238aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 22396a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 224072491643SThomas Gleixner return 0; 2241aca268dfSMarc Zyngier } 2242aca268dfSMarc Zyngier 2243aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 2244aca268dfSMarc Zyngier struct irq_data *d) 2245aca268dfSMarc Zyngier { 2246aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2247aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2248aca268dfSMarc Zyngier 2249aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 2250aca268dfSMarc Zyngier its_send_discard(its_dev, event); 2251aca268dfSMarc Zyngier } 2252aca268dfSMarc Zyngier 2253b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 2254b48ac83dSMarc Zyngier unsigned int nr_irqs) 2255b48ac83dSMarc Zyngier { 2256b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 2257b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2258b48ac83dSMarc Zyngier int i; 2259b48ac83dSMarc Zyngier 2260b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2261b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 2262b48ac83dSMarc Zyngier virq + i); 2263aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 2264b48ac83dSMarc Zyngier 2265b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 2266591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 2267b48ac83dSMarc Zyngier 2268b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 22692da39949SMarc Zyngier irq_domain_reset_irq_data(data); 2270b48ac83dSMarc Zyngier } 2271b48ac83dSMarc Zyngier 2272b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 2273591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 2274591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 2275cf2be8baSMarc Zyngier its_lpi_free_chunks(its_dev->event_map.lpi_map, 2276cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 2277cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 2278cf2be8baSMarc Zyngier kfree(its_dev->event_map.col_map); 2279b48ac83dSMarc Zyngier 2280b48ac83dSMarc Zyngier /* Unmap device/itt */ 2281b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 2282b48ac83dSMarc Zyngier its_free_device(its_dev); 2283b48ac83dSMarc Zyngier } 2284b48ac83dSMarc Zyngier 2285b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 2286b48ac83dSMarc Zyngier } 2287b48ac83dSMarc Zyngier 2288b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 2289b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 2290b48ac83dSMarc Zyngier .free = its_irq_domain_free, 2291aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 2292aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 2293b48ac83dSMarc Zyngier }; 22944c21f3c2SMarc Zyngier 229520b3d54eSMarc Zyngier /* 229620b3d54eSMarc Zyngier * This is insane. 229720b3d54eSMarc Zyngier * 229820b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 229920b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 230020b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 230120b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 230220b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 230320b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 230420b3d54eSMarc Zyngier * 230520b3d54eSMarc Zyngier * Broken by design(tm). 230620b3d54eSMarc Zyngier */ 230720b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 230820b3d54eSMarc Zyngier { 230920b3d54eSMarc Zyngier /* Already unmapped? */ 231020b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 231120b3d54eSMarc Zyngier return; 231220b3d54eSMarc Zyngier 231320b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 231420b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 231520b3d54eSMarc Zyngier 231620b3d54eSMarc Zyngier /* 231720b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 231820b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 231920b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 232020b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 232120b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 232220b3d54eSMarc Zyngier */ 232320b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 232420b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 232520b3d54eSMarc Zyngier 232620b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 232720b3d54eSMarc Zyngier } 232820b3d54eSMarc Zyngier 232920b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 233020b3d54eSMarc Zyngier { 233120b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 233220b3d54eSMarc Zyngier unsigned long flags; 233320b3d54eSMarc Zyngier 233420b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 233520b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 233620b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 233720b3d54eSMarc Zyngier } 233820b3d54eSMarc Zyngier } 233920b3d54eSMarc Zyngier 234020b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 234120b3d54eSMarc Zyngier { 234220b3d54eSMarc Zyngier /* Already mapped? */ 234320b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 234420b3d54eSMarc Zyngier return; 234520b3d54eSMarc Zyngier 234620b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 234720b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 234820b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 234920b3d54eSMarc Zyngier 235020b3d54eSMarc Zyngier /* Map the new VPE instead */ 235120b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 235220b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 235320b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 235420b3d54eSMarc Zyngier 235520b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 235620b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 235720b3d54eSMarc Zyngier } 235820b3d54eSMarc Zyngier 2359958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 2360958b90d1SMarc Zyngier { 2361958b90d1SMarc Zyngier unsigned long flags; 2362958b90d1SMarc Zyngier struct its_collection *target_col; 2363958b90d1SMarc Zyngier 2364958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2365958b90d1SMarc Zyngier void __iomem *rdbase; 2366958b90d1SMarc Zyngier 2367958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 2368958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2369958b90d1SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2370958b90d1SMarc Zyngier cpu_relax(); 2371958b90d1SMarc Zyngier 2372958b90d1SMarc Zyngier return; 2373958b90d1SMarc Zyngier } 2374958b90d1SMarc Zyngier 2375958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 2376958b90d1SMarc Zyngier 2377958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 2378958b90d1SMarc Zyngier 2379958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 2380958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 2381958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 2382958b90d1SMarc Zyngier 2383958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 2384958b90d1SMarc Zyngier } 2385958b90d1SMarc Zyngier 23863171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 23873171a47aSMarc Zyngier const struct cpumask *mask_val, 23883171a47aSMarc Zyngier bool force) 23893171a47aSMarc Zyngier { 23903171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 23913171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 23923171a47aSMarc Zyngier 23933171a47aSMarc Zyngier /* 23943171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 239520b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 2396958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 2397958b90d1SMarc Zyngier * interrupt to its new location. 23983171a47aSMarc Zyngier */ 23993171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 2400958b90d1SMarc Zyngier int from = vpe->col_idx; 2401958b90d1SMarc Zyngier 24023171a47aSMarc Zyngier vpe->col_idx = cpu; 24033171a47aSMarc Zyngier its_send_vmovp(vpe); 2404958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 24053171a47aSMarc Zyngier } 24063171a47aSMarc Zyngier 24073171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 24083171a47aSMarc Zyngier } 24093171a47aSMarc Zyngier 2410e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 2411e643d803SMarc Zyngier { 2412e643d803SMarc Zyngier void * __iomem vlpi_base = gic_data_rdist_vlpi_base(); 2413e643d803SMarc Zyngier u64 val; 2414e643d803SMarc Zyngier 2415e643d803SMarc Zyngier /* Schedule the VPE */ 2416e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 2417e643d803SMarc Zyngier GENMASK_ULL(51, 12); 2418e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 2419e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 2420e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 2421e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 2422e643d803SMarc Zyngier 2423e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 2424e643d803SMarc Zyngier GENMASK_ULL(51, 16); 2425e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 2426e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 2427e643d803SMarc Zyngier /* 2428e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 2429e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 2430e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 2431e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 2432e643d803SMarc Zyngier * that the pending table is empty. A good implementation 2433e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 2434e643d803SMarc Zyngier * making this a tolerable issue. 2435e643d803SMarc Zyngier */ 2436e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2437e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 2438e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 2439e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2440e643d803SMarc Zyngier } 2441e643d803SMarc Zyngier 2442e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 2443e643d803SMarc Zyngier { 2444e643d803SMarc Zyngier void * __iomem vlpi_base = gic_data_rdist_vlpi_base(); 2445e643d803SMarc Zyngier u32 count = 1000000; /* 1s! */ 2446e643d803SMarc Zyngier bool clean; 2447e643d803SMarc Zyngier u64 val; 2448e643d803SMarc Zyngier 2449e643d803SMarc Zyngier /* We're being scheduled out */ 2450e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2451e643d803SMarc Zyngier val &= ~GICR_VPENDBASER_Valid; 2452e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2453e643d803SMarc Zyngier 2454e643d803SMarc Zyngier do { 2455e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2456e643d803SMarc Zyngier clean = !(val & GICR_VPENDBASER_Dirty); 2457e643d803SMarc Zyngier if (!clean) { 2458e643d803SMarc Zyngier count--; 2459e643d803SMarc Zyngier cpu_relax(); 2460e643d803SMarc Zyngier udelay(1); 2461e643d803SMarc Zyngier } 2462e643d803SMarc Zyngier } while (!clean && count); 2463e643d803SMarc Zyngier 2464e643d803SMarc Zyngier if (unlikely(!clean && !count)) { 2465e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2466e643d803SMarc Zyngier vpe->idai = false; 2467e643d803SMarc Zyngier vpe->pending_last = true; 2468e643d803SMarc Zyngier } else { 2469e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 2470e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 2471e643d803SMarc Zyngier } 2472e643d803SMarc Zyngier } 2473e643d803SMarc Zyngier 2474e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 2475e643d803SMarc Zyngier { 2476e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2477e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 2478e643d803SMarc Zyngier 2479e643d803SMarc Zyngier switch (info->cmd_type) { 2480e643d803SMarc Zyngier case SCHEDULE_VPE: 2481e643d803SMarc Zyngier its_vpe_schedule(vpe); 2482e643d803SMarc Zyngier return 0; 2483e643d803SMarc Zyngier 2484e643d803SMarc Zyngier case DESCHEDULE_VPE: 2485e643d803SMarc Zyngier its_vpe_deschedule(vpe); 2486e643d803SMarc Zyngier return 0; 2487e643d803SMarc Zyngier 24885e2f7642SMarc Zyngier case INVALL_VPE: 24895e2f7642SMarc Zyngier its_send_vinvall(vpe); 24905e2f7642SMarc Zyngier return 0; 24915e2f7642SMarc Zyngier 2492e643d803SMarc Zyngier default: 2493e643d803SMarc Zyngier return -EINVAL; 2494e643d803SMarc Zyngier } 2495e643d803SMarc Zyngier } 2496e643d803SMarc Zyngier 249720b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 249820b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 249920b3d54eSMarc Zyngier { 250020b3d54eSMarc Zyngier unsigned long flags; 250120b3d54eSMarc Zyngier 250220b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 250320b3d54eSMarc Zyngier 250420b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 250520b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 250620b3d54eSMarc Zyngier 250720b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 250820b3d54eSMarc Zyngier } 250920b3d54eSMarc Zyngier 2510f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 2511f6a91da7SMarc Zyngier { 2512f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 251320b3d54eSMarc Zyngier 251420b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 2515f6a91da7SMarc Zyngier void __iomem *rdbase; 2516f6a91da7SMarc Zyngier 2517f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2518f6a91da7SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_INVLPIR); 2519f6a91da7SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2520f6a91da7SMarc Zyngier cpu_relax(); 252120b3d54eSMarc Zyngier } else { 252220b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 252320b3d54eSMarc Zyngier } 2524f6a91da7SMarc Zyngier } 2525f6a91da7SMarc Zyngier 2526f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 2527f6a91da7SMarc Zyngier { 2528f6a91da7SMarc Zyngier /* 2529f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 2530f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 2531f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 2532f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 2533f6a91da7SMarc Zyngier */ 2534f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 2535f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2536f6a91da7SMarc Zyngier } 2537f6a91da7SMarc Zyngier 2538f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 2539f6a91da7SMarc Zyngier { 2540f6a91da7SMarc Zyngier /* Same hack as above... */ 2541f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 2542f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2543f6a91da7SMarc Zyngier } 2544f6a91da7SMarc Zyngier 2545e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 2546e57a3e28SMarc Zyngier enum irqchip_irq_state which, 2547e57a3e28SMarc Zyngier bool state) 2548e57a3e28SMarc Zyngier { 2549e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2550e57a3e28SMarc Zyngier 2551e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 2552e57a3e28SMarc Zyngier return -EINVAL; 2553e57a3e28SMarc Zyngier 2554e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2555e57a3e28SMarc Zyngier void __iomem *rdbase; 2556e57a3e28SMarc Zyngier 2557e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2558e57a3e28SMarc Zyngier if (state) { 2559e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 2560e57a3e28SMarc Zyngier } else { 2561e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2562e57a3e28SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2563e57a3e28SMarc Zyngier cpu_relax(); 2564e57a3e28SMarc Zyngier } 2565e57a3e28SMarc Zyngier } else { 2566e57a3e28SMarc Zyngier if (state) 2567e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 2568e57a3e28SMarc Zyngier else 2569e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 2570e57a3e28SMarc Zyngier } 2571e57a3e28SMarc Zyngier 2572e57a3e28SMarc Zyngier return 0; 2573e57a3e28SMarc Zyngier } 2574e57a3e28SMarc Zyngier 25758fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 25768fff27aeSMarc Zyngier .name = "GICv4-vpe", 2577f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 2578f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 2579f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 25803171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 2581e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 2582e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 25838fff27aeSMarc Zyngier }; 25848fff27aeSMarc Zyngier 25857d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 25867d75bbb4SMarc Zyngier { 25877d75bbb4SMarc Zyngier return ida_simple_get(&its_vpeid_ida, 0, 1 << 16, GFP_KERNEL); 25887d75bbb4SMarc Zyngier } 25897d75bbb4SMarc Zyngier 25907d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 25917d75bbb4SMarc Zyngier { 25927d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 25937d75bbb4SMarc Zyngier } 25947d75bbb4SMarc Zyngier 25957d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 25967d75bbb4SMarc Zyngier { 25977d75bbb4SMarc Zyngier struct page *vpt_page; 25987d75bbb4SMarc Zyngier int vpe_id; 25997d75bbb4SMarc Zyngier 26007d75bbb4SMarc Zyngier /* Allocate vpe_id */ 26017d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 26027d75bbb4SMarc Zyngier if (vpe_id < 0) 26037d75bbb4SMarc Zyngier return vpe_id; 26047d75bbb4SMarc Zyngier 26057d75bbb4SMarc Zyngier /* Allocate VPT */ 26067d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 26077d75bbb4SMarc Zyngier if (!vpt_page) { 26087d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 26097d75bbb4SMarc Zyngier return -ENOMEM; 26107d75bbb4SMarc Zyngier } 26117d75bbb4SMarc Zyngier 26127d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 26137d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 26147d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 26157d75bbb4SMarc Zyngier return -ENOMEM; 26167d75bbb4SMarc Zyngier } 26177d75bbb4SMarc Zyngier 26187d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 26197d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 262020b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 26217d75bbb4SMarc Zyngier 26227d75bbb4SMarc Zyngier return 0; 26237d75bbb4SMarc Zyngier } 26247d75bbb4SMarc Zyngier 26257d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 26267d75bbb4SMarc Zyngier { 262720b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 26287d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 26297d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 26307d75bbb4SMarc Zyngier } 26317d75bbb4SMarc Zyngier 26327d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 26337d75bbb4SMarc Zyngier unsigned int virq, 26347d75bbb4SMarc Zyngier unsigned int nr_irqs) 26357d75bbb4SMarc Zyngier { 26367d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 26377d75bbb4SMarc Zyngier int i; 26387d75bbb4SMarc Zyngier 26397d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 26407d75bbb4SMarc Zyngier 26417d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 26427d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 26437d75bbb4SMarc Zyngier virq + i); 26447d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 26457d75bbb4SMarc Zyngier 26467d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 26477d75bbb4SMarc Zyngier 26487d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 26497d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 26507d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 26517d75bbb4SMarc Zyngier } 26527d75bbb4SMarc Zyngier 26537d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 26547d75bbb4SMarc Zyngier its_lpi_free_chunks(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 26557d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 26567d75bbb4SMarc Zyngier } 26577d75bbb4SMarc Zyngier } 26587d75bbb4SMarc Zyngier 26597d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 26607d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 26617d75bbb4SMarc Zyngier { 26627d75bbb4SMarc Zyngier struct its_vm *vm = args; 26637d75bbb4SMarc Zyngier unsigned long *bitmap; 26647d75bbb4SMarc Zyngier struct page *vprop_page; 26657d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 26667d75bbb4SMarc Zyngier 26677d75bbb4SMarc Zyngier BUG_ON(!vm); 26687d75bbb4SMarc Zyngier 26697d75bbb4SMarc Zyngier bitmap = its_lpi_alloc_chunks(nr_irqs, &base, &nr_ids); 26707d75bbb4SMarc Zyngier if (!bitmap) 26717d75bbb4SMarc Zyngier return -ENOMEM; 26727d75bbb4SMarc Zyngier 26737d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 26747d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 26757d75bbb4SMarc Zyngier return -ENOMEM; 26767d75bbb4SMarc Zyngier } 26777d75bbb4SMarc Zyngier 26787d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 26797d75bbb4SMarc Zyngier if (!vprop_page) { 26807d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 26817d75bbb4SMarc Zyngier return -ENOMEM; 26827d75bbb4SMarc Zyngier } 26837d75bbb4SMarc Zyngier 26847d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 26857d75bbb4SMarc Zyngier vm->db_lpi_base = base; 26867d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 26877d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 26887d75bbb4SMarc Zyngier 26897d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 26907d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 26917d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 26927d75bbb4SMarc Zyngier if (err) 26937d75bbb4SMarc Zyngier break; 26947d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 26957d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 26967d75bbb4SMarc Zyngier if (err) 26977d75bbb4SMarc Zyngier break; 26987d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 26997d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 27007d75bbb4SMarc Zyngier set_bit(i, bitmap); 27017d75bbb4SMarc Zyngier } 27027d75bbb4SMarc Zyngier 27037d75bbb4SMarc Zyngier if (err) { 27047d75bbb4SMarc Zyngier if (i > 0) 27057d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 27067d75bbb4SMarc Zyngier 27077d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 27087d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 27097d75bbb4SMarc Zyngier } 27107d75bbb4SMarc Zyngier 27117d75bbb4SMarc Zyngier return err; 27127d75bbb4SMarc Zyngier } 27137d75bbb4SMarc Zyngier 271472491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 271572491643SThomas Gleixner struct irq_data *d, bool early) 2716eb78192bSMarc Zyngier { 2717eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2718eb78192bSMarc Zyngier 2719eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 2720eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 2721eb78192bSMarc Zyngier its_send_vmapp(vpe, true); 2722eb78192bSMarc Zyngier its_send_vinvall(vpe); 272372491643SThomas Gleixner return 0; 2724eb78192bSMarc Zyngier } 2725eb78192bSMarc Zyngier 2726eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 2727eb78192bSMarc Zyngier struct irq_data *d) 2728eb78192bSMarc Zyngier { 2729eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2730eb78192bSMarc Zyngier 2731eb78192bSMarc Zyngier its_send_vmapp(vpe, false); 2732eb78192bSMarc Zyngier } 2733eb78192bSMarc Zyngier 27348fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 27357d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 27367d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 2737eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 2738eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 27398fff27aeSMarc Zyngier }; 27408fff27aeSMarc Zyngier 27414559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 27424559fbb3SYun Wu { 27434559fbb3SYun Wu u32 count = 1000000; /* 1s */ 27444559fbb3SYun Wu u32 val; 27454559fbb3SYun Wu 27464559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 27477611da86SDavid Daney /* 27487611da86SDavid Daney * GIC architecture specification requires the ITS to be both 27497611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 27507611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 27517611da86SDavid Daney */ 27527611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 27534559fbb3SYun Wu return 0; 27544559fbb3SYun Wu 27554559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 2756d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 27574559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 27584559fbb3SYun Wu 27594559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 27604559fbb3SYun Wu while (1) { 27614559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 27624559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 27634559fbb3SYun Wu return 0; 27644559fbb3SYun Wu 27654559fbb3SYun Wu count--; 27664559fbb3SYun Wu if (!count) 27674559fbb3SYun Wu return -EBUSY; 27684559fbb3SYun Wu 27694559fbb3SYun Wu cpu_relax(); 27704559fbb3SYun Wu udelay(1); 27714559fbb3SYun Wu } 27724559fbb3SYun Wu } 27734559fbb3SYun Wu 27749d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 277594100970SRobert Richter { 277694100970SRobert Richter struct its_node *its = data; 277794100970SRobert Richter 2778fa150019SArd Biesheuvel /* erratum 22375: only alloc 8MB table size */ 2779fa150019SArd Biesheuvel its->device_ids = 0x14; /* 20 bits, 8MB */ 278094100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 27819d111d49SArd Biesheuvel 27829d111d49SArd Biesheuvel return true; 278394100970SRobert Richter } 278494100970SRobert Richter 27859d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 2786fbf8f40eSGanapatrao Kulkarni { 2787fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 2788fbf8f40eSGanapatrao Kulkarni 2789fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 27909d111d49SArd Biesheuvel 27919d111d49SArd Biesheuvel return true; 2792fbf8f40eSGanapatrao Kulkarni } 2793fbf8f40eSGanapatrao Kulkarni 27949d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 279590922a2dSShanker Donthineni { 279690922a2dSShanker Donthineni struct its_node *its = data; 279790922a2dSShanker Donthineni 279890922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 279990922a2dSShanker Donthineni its->ite_size = 16; 28009d111d49SArd Biesheuvel 28019d111d49SArd Biesheuvel return true; 280290922a2dSShanker Donthineni } 280390922a2dSShanker Donthineni 2804558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 2805558b0165SArd Biesheuvel { 2806558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 2807558b0165SArd Biesheuvel 2808558b0165SArd Biesheuvel /* 2809558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 2810558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 2811558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 2812558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 2813558b0165SArd Biesheuvel * the window offset. 2814558b0165SArd Biesheuvel */ 2815558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 2816558b0165SArd Biesheuvel } 2817558b0165SArd Biesheuvel 2818558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 2819558b0165SArd Biesheuvel { 2820558b0165SArd Biesheuvel struct its_node *its = data; 2821558b0165SArd Biesheuvel u32 pre_its_window[2]; 2822558b0165SArd Biesheuvel u32 ids; 2823558b0165SArd Biesheuvel 2824558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 2825558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 2826558b0165SArd Biesheuvel pre_its_window, 2827558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 2828558b0165SArd Biesheuvel 2829558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 2830558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 2831558b0165SArd Biesheuvel 2832558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 2833558b0165SArd Biesheuvel if (its->device_ids > ids) 2834558b0165SArd Biesheuvel its->device_ids = ids; 2835558b0165SArd Biesheuvel 2836558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 2837558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 2838558b0165SArd Biesheuvel return true; 2839558b0165SArd Biesheuvel } 2840558b0165SArd Biesheuvel return false; 2841558b0165SArd Biesheuvel } 2842558b0165SArd Biesheuvel 28435c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 28445c9a882eSMarc Zyngier { 28455c9a882eSMarc Zyngier struct its_node *its = data; 28465c9a882eSMarc Zyngier 28475c9a882eSMarc Zyngier /* 28485c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 28495c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 28505c9a882eSMarc Zyngier */ 28515c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 28525c9a882eSMarc Zyngier return true; 28535c9a882eSMarc Zyngier } 28545c9a882eSMarc Zyngier 285567510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 285694100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 285794100970SRobert Richter { 285894100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 285994100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 286094100970SRobert Richter .mask = 0xffff0fff, 286194100970SRobert Richter .init = its_enable_quirk_cavium_22375, 286294100970SRobert Richter }, 286394100970SRobert Richter #endif 2864fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 2865fbf8f40eSGanapatrao Kulkarni { 2866fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 2867fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 2868fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 2869fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 2870fbf8f40eSGanapatrao Kulkarni }, 2871fbf8f40eSGanapatrao Kulkarni #endif 287290922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 287390922a2dSShanker Donthineni { 287490922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 287590922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 287690922a2dSShanker Donthineni .mask = 0xffffffff, 287790922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 287890922a2dSShanker Donthineni }, 287990922a2dSShanker Donthineni #endif 2880558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 2881558b0165SArd Biesheuvel { 2882558b0165SArd Biesheuvel /* 2883558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 2884558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 2885558b0165SArd Biesheuvel * special handling in software. 2886558b0165SArd Biesheuvel */ 2887558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 2888558b0165SArd Biesheuvel .iidr = 0x0001143b, 2889558b0165SArd Biesheuvel .mask = 0xffffffff, 2890558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 2891558b0165SArd Biesheuvel }, 2892558b0165SArd Biesheuvel #endif 28935c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 28945c9a882eSMarc Zyngier { 28955c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 28965c9a882eSMarc Zyngier .iidr = 0x00000004, 28975c9a882eSMarc Zyngier .mask = 0xffffffff, 28985c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 28995c9a882eSMarc Zyngier }, 29005c9a882eSMarc Zyngier #endif 290167510ccaSRobert Richter { 290267510ccaSRobert Richter } 290367510ccaSRobert Richter }; 290467510ccaSRobert Richter 290567510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 290667510ccaSRobert Richter { 290767510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 290867510ccaSRobert Richter 290967510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 291067510ccaSRobert Richter } 291167510ccaSRobert Richter 2912db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 2913d14ae5e6STomasz Nowicki { 2914d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 2915d14ae5e6STomasz Nowicki struct msi_domain_info *info; 2916d14ae5e6STomasz Nowicki 2917d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 2918d14ae5e6STomasz Nowicki if (!info) 2919d14ae5e6STomasz Nowicki return -ENOMEM; 2920d14ae5e6STomasz Nowicki 2921db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 2922d14ae5e6STomasz Nowicki if (!inner_domain) { 2923d14ae5e6STomasz Nowicki kfree(info); 2924d14ae5e6STomasz Nowicki return -ENOMEM; 2925d14ae5e6STomasz Nowicki } 2926d14ae5e6STomasz Nowicki 2927db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 292896f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 2929558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 2930d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 2931d14ae5e6STomasz Nowicki info->data = its; 2932d14ae5e6STomasz Nowicki inner_domain->host_data = info; 2933d14ae5e6STomasz Nowicki 2934d14ae5e6STomasz Nowicki return 0; 2935d14ae5e6STomasz Nowicki } 2936d14ae5e6STomasz Nowicki 29378fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 29388fff27aeSMarc Zyngier { 293920b3d54eSMarc Zyngier struct its_node *its; 294020b3d54eSMarc Zyngier u32 devid; 294120b3d54eSMarc Zyngier int entries; 294220b3d54eSMarc Zyngier 294320b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 294420b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 294520b3d54eSMarc Zyngier return 0; 294620b3d54eSMarc Zyngier } 294720b3d54eSMarc Zyngier 294820b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 294920b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 295020b3d54eSMarc Zyngier 295120b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 295220b3d54eSMarc Zyngier vpe_proxy.vpes = kzalloc(sizeof(*vpe_proxy.vpes) * entries, 295320b3d54eSMarc Zyngier GFP_KERNEL); 295420b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 295520b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 295620b3d54eSMarc Zyngier return -ENOMEM; 295720b3d54eSMarc Zyngier } 295820b3d54eSMarc Zyngier 295920b3d54eSMarc Zyngier /* Use the last possible DevID */ 296020b3d54eSMarc Zyngier devid = GENMASK(its->device_ids - 1, 0); 296120b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 296220b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 296320b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 296420b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 296520b3d54eSMarc Zyngier return -ENOMEM; 296620b3d54eSMarc Zyngier } 296720b3d54eSMarc Zyngier 296820b3d54eSMarc Zyngier BUG_ON(entries != vpe_proxy.dev->nr_ites); 296920b3d54eSMarc Zyngier 297020b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 297120b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 297220b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 297320b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 297420b3d54eSMarc Zyngier 29758fff27aeSMarc Zyngier return 0; 29768fff27aeSMarc Zyngier } 29778fff27aeSMarc Zyngier 29783dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 29793dfa576bSMarc Zyngier void __iomem *its_base) 29803dfa576bSMarc Zyngier { 29813dfa576bSMarc Zyngier int its_number; 29823dfa576bSMarc Zyngier u32 ctlr; 29833dfa576bSMarc Zyngier 29843dfa576bSMarc Zyngier /* 29853dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 29863dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 29873dfa576bSMarc Zyngier * locking. Should this change, we should address 29883dfa576bSMarc Zyngier * this. 29893dfa576bSMarc Zyngier */ 29903dfa576bSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, ITS_LIST_MAX); 29913dfa576bSMarc Zyngier if (its_number >= ITS_LIST_MAX) { 29923dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 29933dfa576bSMarc Zyngier &res->start); 29943dfa576bSMarc Zyngier return -EINVAL; 29953dfa576bSMarc Zyngier } 29963dfa576bSMarc Zyngier 29973dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 29983dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 29993dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 30003dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 30013dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 30023dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 30033dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 30043dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 30053dfa576bSMarc Zyngier } 30063dfa576bSMarc Zyngier 30073dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 30083dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 30093dfa576bSMarc Zyngier &res->start, its_number); 30103dfa576bSMarc Zyngier return -EINVAL; 30113dfa576bSMarc Zyngier } 30123dfa576bSMarc Zyngier 30133dfa576bSMarc Zyngier return its_number; 30143dfa576bSMarc Zyngier } 30153dfa576bSMarc Zyngier 3016db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 3017db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 30184c21f3c2SMarc Zyngier { 30194c21f3c2SMarc Zyngier struct its_node *its; 30204c21f3c2SMarc Zyngier void __iomem *its_base; 30213dfa576bSMarc Zyngier u32 val, ctlr; 30223dfa576bSMarc Zyngier u64 baser, tmp, typer; 30234c21f3c2SMarc Zyngier int err; 30244c21f3c2SMarc Zyngier 3025db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 30264c21f3c2SMarc Zyngier if (!its_base) { 3027db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 30284c21f3c2SMarc Zyngier return -ENOMEM; 30294c21f3c2SMarc Zyngier } 30304c21f3c2SMarc Zyngier 30314c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 30324c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 3033db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 30344c21f3c2SMarc Zyngier err = -ENODEV; 30354c21f3c2SMarc Zyngier goto out_unmap; 30364c21f3c2SMarc Zyngier } 30374c21f3c2SMarc Zyngier 30384559fbb3SYun Wu err = its_force_quiescent(its_base); 30394559fbb3SYun Wu if (err) { 3040db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 30414559fbb3SYun Wu goto out_unmap; 30424559fbb3SYun Wu } 30434559fbb3SYun Wu 3044db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 30454c21f3c2SMarc Zyngier 30464c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 30474c21f3c2SMarc Zyngier if (!its) { 30484c21f3c2SMarc Zyngier err = -ENOMEM; 30494c21f3c2SMarc Zyngier goto out_unmap; 30504c21f3c2SMarc Zyngier } 30514c21f3c2SMarc Zyngier 30524c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 30534c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 30544c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 30553dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 30564c21f3c2SMarc Zyngier its->base = its_base; 3057db40f0a7STomasz Nowicki its->phys_base = res->start; 30583dfa576bSMarc Zyngier its->ite_size = GITS_TYPER_ITT_ENTRY_SIZE(typer); 3059fa150019SArd Biesheuvel its->device_ids = GITS_TYPER_DEVBITS(typer); 30603dfa576bSMarc Zyngier its->is_v4 = !!(typer & GITS_TYPER_VLPIS); 30613dfa576bSMarc Zyngier if (its->is_v4) { 30623dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 30633dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 30643dfa576bSMarc Zyngier if (err < 0) 30653dfa576bSMarc Zyngier goto out_free_its; 30663dfa576bSMarc Zyngier 30673dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 30683dfa576bSMarc Zyngier &res->start, err); 30693dfa576bSMarc Zyngier } else { 30703dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 30713dfa576bSMarc Zyngier } 30723dfa576bSMarc Zyngier } 30733dfa576bSMarc Zyngier 3074db40f0a7STomasz Nowicki its->numa_node = numa_node; 30754c21f3c2SMarc Zyngier 30765bc13c2cSRobert Richter its->cmd_base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 30775bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 30784c21f3c2SMarc Zyngier if (!its->cmd_base) { 30794c21f3c2SMarc Zyngier err = -ENOMEM; 30804c21f3c2SMarc Zyngier goto out_free_its; 30814c21f3c2SMarc Zyngier } 30824c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 3083558b0165SArd Biesheuvel its->fwnode_handle = handle; 3084558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 3085558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 30864c21f3c2SMarc Zyngier 308767510ccaSRobert Richter its_enable_quirks(its); 308867510ccaSRobert Richter 30890e0b0f69SShanker Donthineni err = its_alloc_tables(its); 30904c21f3c2SMarc Zyngier if (err) 30914c21f3c2SMarc Zyngier goto out_free_cmd; 30924c21f3c2SMarc Zyngier 30934c21f3c2SMarc Zyngier err = its_alloc_collections(its); 30944c21f3c2SMarc Zyngier if (err) 30954c21f3c2SMarc Zyngier goto out_free_tables; 30964c21f3c2SMarc Zyngier 30974c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 30982fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 30994c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 31004c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 31014c21f3c2SMarc Zyngier GITS_CBASER_VALID); 31024c21f3c2SMarc Zyngier 31030968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 31040968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 31054c21f3c2SMarc Zyngier 31064ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 3107241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 3108241a386cSMarc Zyngier /* 3109241a386cSMarc Zyngier * The HW reports non-shareable, we must 3110241a386cSMarc Zyngier * remove the cacheability attributes as 3111241a386cSMarc Zyngier * well. 3112241a386cSMarc Zyngier */ 3113241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 3114241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 3115241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 31160968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 3117241a386cSMarc Zyngier } 31184c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 31194c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 31204c21f3c2SMarc Zyngier } 31214c21f3c2SMarc Zyngier 31220968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 31233dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 3124d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 3125d51c4b4dSMarc Zyngier if (its->is_v4) 3126d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 3127d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 3128241a386cSMarc Zyngier 3129db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 3130d14ae5e6STomasz Nowicki if (err) 313154456db9SMarc Zyngier goto out_free_tables; 31324c21f3c2SMarc Zyngier 31334c21f3c2SMarc Zyngier spin_lock(&its_lock); 31344c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 31354c21f3c2SMarc Zyngier spin_unlock(&its_lock); 31364c21f3c2SMarc Zyngier 31374c21f3c2SMarc Zyngier return 0; 31384c21f3c2SMarc Zyngier 31394c21f3c2SMarc Zyngier out_free_tables: 31404c21f3c2SMarc Zyngier its_free_tables(its); 31414c21f3c2SMarc Zyngier out_free_cmd: 31425bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 31434c21f3c2SMarc Zyngier out_free_its: 31444c21f3c2SMarc Zyngier kfree(its); 31454c21f3c2SMarc Zyngier out_unmap: 31464c21f3c2SMarc Zyngier iounmap(its_base); 3147db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 31484c21f3c2SMarc Zyngier return err; 31494c21f3c2SMarc Zyngier } 31504c21f3c2SMarc Zyngier 31514c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 31524c21f3c2SMarc Zyngier { 3153589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 31544c21f3c2SMarc Zyngier } 31554c21f3c2SMarc Zyngier 31564c21f3c2SMarc Zyngier int its_cpu_init(void) 31574c21f3c2SMarc Zyngier { 315816acae72SVladimir Murzin if (!list_empty(&its_nodes)) { 31594c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 31604c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 31614c21f3c2SMarc Zyngier return -ENXIO; 31624c21f3c2SMarc Zyngier } 31634c21f3c2SMarc Zyngier its_cpu_init_lpis(); 31644c21f3c2SMarc Zyngier its_cpu_init_collection(); 31654c21f3c2SMarc Zyngier } 31664c21f3c2SMarc Zyngier 31674c21f3c2SMarc Zyngier return 0; 31684c21f3c2SMarc Zyngier } 31694c21f3c2SMarc Zyngier 3170935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 31714c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 31724c21f3c2SMarc Zyngier {}, 31734c21f3c2SMarc Zyngier }; 31744c21f3c2SMarc Zyngier 3175db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 31764c21f3c2SMarc Zyngier { 31774c21f3c2SMarc Zyngier struct device_node *np; 3178db40f0a7STomasz Nowicki struct resource res; 31794c21f3c2SMarc Zyngier 31804c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 31814c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 3182d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 3183e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 3184e81f54c6SRob Herring np); 3185d14ae5e6STomasz Nowicki continue; 3186d14ae5e6STomasz Nowicki } 3187d14ae5e6STomasz Nowicki 3188db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 3189e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 3190db40f0a7STomasz Nowicki continue; 31914c21f3c2SMarc Zyngier } 31924c21f3c2SMarc Zyngier 3193db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 3194db40f0a7STomasz Nowicki } 3195db40f0a7STomasz Nowicki return 0; 3196db40f0a7STomasz Nowicki } 3197db40f0a7STomasz Nowicki 31983f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 31993f010cf1STomasz Nowicki 32003f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 32013f010cf1STomasz Nowicki 3202d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 3203dbd2b826SGanapatrao Kulkarni struct its_srat_map { 3204dbd2b826SGanapatrao Kulkarni /* numa node id */ 3205dbd2b826SGanapatrao Kulkarni u32 numa_node; 3206dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 3207dbd2b826SGanapatrao Kulkarni u32 its_id; 3208dbd2b826SGanapatrao Kulkarni }; 3209dbd2b826SGanapatrao Kulkarni 3210fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 3211dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 3212dbd2b826SGanapatrao Kulkarni 3213dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 3214dbd2b826SGanapatrao Kulkarni { 3215dbd2b826SGanapatrao Kulkarni int i; 3216dbd2b826SGanapatrao Kulkarni 3217dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 3218dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 3219dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 3220dbd2b826SGanapatrao Kulkarni } 3221dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 3222dbd2b826SGanapatrao Kulkarni } 3223dbd2b826SGanapatrao Kulkarni 3224fdf6e7a8SHanjun Guo static int __init gic_acpi_match_srat_its(struct acpi_subtable_header *header, 3225fdf6e7a8SHanjun Guo const unsigned long end) 3226fdf6e7a8SHanjun Guo { 3227fdf6e7a8SHanjun Guo return 0; 3228fdf6e7a8SHanjun Guo } 3229fdf6e7a8SHanjun Guo 3230dbd2b826SGanapatrao Kulkarni static int __init gic_acpi_parse_srat_its(struct acpi_subtable_header *header, 3231dbd2b826SGanapatrao Kulkarni const unsigned long end) 3232dbd2b826SGanapatrao Kulkarni { 3233dbd2b826SGanapatrao Kulkarni int node; 3234dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 3235dbd2b826SGanapatrao Kulkarni 3236dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 3237dbd2b826SGanapatrao Kulkarni if (!its_affinity) 3238dbd2b826SGanapatrao Kulkarni return -EINVAL; 3239dbd2b826SGanapatrao Kulkarni 3240dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 3241dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 3242dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 3243dbd2b826SGanapatrao Kulkarni return -EINVAL; 3244dbd2b826SGanapatrao Kulkarni } 3245dbd2b826SGanapatrao Kulkarni 3246dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 3247dbd2b826SGanapatrao Kulkarni 3248dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 3249dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 3250dbd2b826SGanapatrao Kulkarni return 0; 3251dbd2b826SGanapatrao Kulkarni } 3252dbd2b826SGanapatrao Kulkarni 3253dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 3254dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 3255dbd2b826SGanapatrao Kulkarni its_in_srat++; 3256dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 3257dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 3258dbd2b826SGanapatrao Kulkarni 3259dbd2b826SGanapatrao Kulkarni return 0; 3260dbd2b826SGanapatrao Kulkarni } 3261dbd2b826SGanapatrao Kulkarni 3262dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 3263dbd2b826SGanapatrao Kulkarni { 3264fdf6e7a8SHanjun Guo int count; 3265fdf6e7a8SHanjun Guo 3266fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 3267fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 3268fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3269fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 3270fdf6e7a8SHanjun Guo if (count <= 0) 3271fdf6e7a8SHanjun Guo return; 3272fdf6e7a8SHanjun Guo 3273fdf6e7a8SHanjun Guo its_srat_maps = kmalloc(count * sizeof(struct its_srat_map), 3274fdf6e7a8SHanjun Guo GFP_KERNEL); 3275fdf6e7a8SHanjun Guo if (!its_srat_maps) { 3276fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 3277fdf6e7a8SHanjun Guo return; 3278fdf6e7a8SHanjun Guo } 3279fdf6e7a8SHanjun Guo 3280dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 3281dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 3282dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3283dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 3284dbd2b826SGanapatrao Kulkarni } 3285fdf6e7a8SHanjun Guo 3286fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 3287fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 3288fdf6e7a8SHanjun Guo { 3289fdf6e7a8SHanjun Guo kfree(its_srat_maps); 3290fdf6e7a8SHanjun Guo } 3291dbd2b826SGanapatrao Kulkarni #else 3292dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 3293dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 3294fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 3295dbd2b826SGanapatrao Kulkarni #endif 3296dbd2b826SGanapatrao Kulkarni 32973f010cf1STomasz Nowicki static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header, 32983f010cf1STomasz Nowicki const unsigned long end) 32993f010cf1STomasz Nowicki { 33003f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 33013f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 33023f010cf1STomasz Nowicki struct resource res; 33033f010cf1STomasz Nowicki int err; 33043f010cf1STomasz Nowicki 33053f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 33063f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 33073f010cf1STomasz Nowicki res.start = its_entry->base_address; 33083f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 33093f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 33103f010cf1STomasz Nowicki 33113f010cf1STomasz Nowicki dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address); 33123f010cf1STomasz Nowicki if (!dom_handle) { 33133f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 33143f010cf1STomasz Nowicki &res.start); 33153f010cf1STomasz Nowicki return -ENOMEM; 33163f010cf1STomasz Nowicki } 33173f010cf1STomasz Nowicki 33183f010cf1STomasz Nowicki err = iort_register_domain_token(its_entry->translation_id, dom_handle); 33193f010cf1STomasz Nowicki if (err) { 33203f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 33213f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 33223f010cf1STomasz Nowicki goto dom_err; 33233f010cf1STomasz Nowicki } 33243f010cf1STomasz Nowicki 3325dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 3326dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 33273f010cf1STomasz Nowicki if (!err) 33283f010cf1STomasz Nowicki return 0; 33293f010cf1STomasz Nowicki 33303f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 33313f010cf1STomasz Nowicki dom_err: 33323f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 33333f010cf1STomasz Nowicki return err; 33343f010cf1STomasz Nowicki } 33353f010cf1STomasz Nowicki 33363f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 33373f010cf1STomasz Nowicki { 3338dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 33393f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 33403f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 3341fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 33423f010cf1STomasz Nowicki } 33433f010cf1STomasz Nowicki #else 33443f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 33453f010cf1STomasz Nowicki #endif 33463f010cf1STomasz Nowicki 3347db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 3348db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 3349db40f0a7STomasz Nowicki { 3350db40f0a7STomasz Nowicki struct device_node *of_node; 33518fff27aeSMarc Zyngier struct its_node *its; 33528fff27aeSMarc Zyngier bool has_v4 = false; 33538fff27aeSMarc Zyngier int err; 3354db40f0a7STomasz Nowicki 3355db40f0a7STomasz Nowicki its_parent = parent_domain; 3356db40f0a7STomasz Nowicki of_node = to_of_node(handle); 3357db40f0a7STomasz Nowicki if (of_node) 3358db40f0a7STomasz Nowicki its_of_probe(of_node); 3359db40f0a7STomasz Nowicki else 33603f010cf1STomasz Nowicki its_acpi_probe(); 3361db40f0a7STomasz Nowicki 33624c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 33634c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 33644c21f3c2SMarc Zyngier return -ENXIO; 33654c21f3c2SMarc Zyngier } 33664c21f3c2SMarc Zyngier 33674c21f3c2SMarc Zyngier gic_rdists = rdists; 33688fff27aeSMarc Zyngier err = its_alloc_lpi_tables(); 33698fff27aeSMarc Zyngier if (err) 33708fff27aeSMarc Zyngier return err; 33718fff27aeSMarc Zyngier 33728fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 33738fff27aeSMarc Zyngier has_v4 |= its->is_v4; 33748fff27aeSMarc Zyngier 33758fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 33763d63cb53SMarc Zyngier if (its_init_vpe_domain() || 33773d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 33788fff27aeSMarc Zyngier rdists->has_vlpis = false; 33798fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 33808fff27aeSMarc Zyngier } 33818fff27aeSMarc Zyngier } 33828fff27aeSMarc Zyngier 33838fff27aeSMarc Zyngier return 0; 33844c21f3c2SMarc Zyngier } 3385