1cc2d3216SMarc Zyngier /* 2cc2d3216SMarc Zyngier * Copyright (C) 2013, 2014 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 18cc2d3216SMarc Zyngier #include <linux/bitmap.h> 19cc2d3216SMarc Zyngier #include <linux/cpu.h> 20cc2d3216SMarc Zyngier #include <linux/delay.h> 21cc2d3216SMarc Zyngier #include <linux/interrupt.h> 22cc2d3216SMarc Zyngier #include <linux/log2.h> 23cc2d3216SMarc Zyngier #include <linux/mm.h> 24cc2d3216SMarc Zyngier #include <linux/msi.h> 25cc2d3216SMarc Zyngier #include <linux/of.h> 26cc2d3216SMarc Zyngier #include <linux/of_address.h> 27cc2d3216SMarc Zyngier #include <linux/of_irq.h> 28cc2d3216SMarc Zyngier #include <linux/of_pci.h> 29cc2d3216SMarc Zyngier #include <linux/of_platform.h> 30cc2d3216SMarc Zyngier #include <linux/percpu.h> 31cc2d3216SMarc Zyngier #include <linux/slab.h> 32cc2d3216SMarc Zyngier 33cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 34cc2d3216SMarc Zyngier 35cc2d3216SMarc Zyngier #include <asm/cacheflush.h> 36cc2d3216SMarc Zyngier #include <asm/cputype.h> 37cc2d3216SMarc Zyngier #include <asm/exception.h> 38cc2d3216SMarc Zyngier 39cc2d3216SMarc Zyngier #include "irqchip.h" 40cc2d3216SMarc Zyngier 41cc2d3216SMarc Zyngier #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1 << 0) 42cc2d3216SMarc Zyngier 43c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 44c48ed51cSMarc Zyngier 45cc2d3216SMarc Zyngier /* 46cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 47cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 48cc2d3216SMarc Zyngier * CPU. 49cc2d3216SMarc Zyngier */ 50cc2d3216SMarc Zyngier struct its_collection { 51cc2d3216SMarc Zyngier u64 target_address; 52cc2d3216SMarc Zyngier u16 col_id; 53cc2d3216SMarc Zyngier }; 54cc2d3216SMarc Zyngier 55cc2d3216SMarc Zyngier /* 56cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 57cc2d3216SMarc Zyngier * msi_controller, the command queue, the collections, and the list of 58cc2d3216SMarc Zyngier * devices writing to it. 59cc2d3216SMarc Zyngier */ 60cc2d3216SMarc Zyngier struct its_node { 61cc2d3216SMarc Zyngier raw_spinlock_t lock; 62cc2d3216SMarc Zyngier struct list_head entry; 63cc2d3216SMarc Zyngier struct msi_controller msi_chip; 64cc2d3216SMarc Zyngier struct irq_domain *domain; 65cc2d3216SMarc Zyngier void __iomem *base; 66cc2d3216SMarc Zyngier unsigned long phys_base; 67cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 68cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 69cc2d3216SMarc Zyngier void *tables[GITS_BASER_NR_REGS]; 70cc2d3216SMarc Zyngier struct its_collection *collections; 71cc2d3216SMarc Zyngier struct list_head its_device_list; 72cc2d3216SMarc Zyngier u64 flags; 73cc2d3216SMarc Zyngier u32 ite_size; 74cc2d3216SMarc Zyngier }; 75cc2d3216SMarc Zyngier 76cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 77cc2d3216SMarc Zyngier 78591e5becSMarc Zyngier struct event_lpi_map { 79591e5becSMarc Zyngier unsigned long *lpi_map; 80591e5becSMarc Zyngier u16 *col_map; 81591e5becSMarc Zyngier irq_hw_number_t lpi_base; 82591e5becSMarc Zyngier int nr_lpis; 83591e5becSMarc Zyngier }; 84591e5becSMarc Zyngier 85cc2d3216SMarc Zyngier /* 86cc2d3216SMarc Zyngier * The ITS view of a device - belongs to an ITS, a collection, owns an 87cc2d3216SMarc Zyngier * interrupt translation table, and a list of interrupts. 88cc2d3216SMarc Zyngier */ 89cc2d3216SMarc Zyngier struct its_device { 90cc2d3216SMarc Zyngier struct list_head entry; 91cc2d3216SMarc Zyngier struct its_node *its; 92591e5becSMarc Zyngier struct event_lpi_map event_map; 93cc2d3216SMarc Zyngier void *itt; 94cc2d3216SMarc Zyngier u32 nr_ites; 95cc2d3216SMarc Zyngier u32 device_id; 96cc2d3216SMarc Zyngier }; 97cc2d3216SMarc Zyngier 981ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 991ac19ca6SMarc Zyngier static DEFINE_SPINLOCK(its_lock); 1001ac19ca6SMarc Zyngier static struct device_node *gic_root_node; 1011ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 1021ac19ca6SMarc Zyngier 1031ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 1041ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 1051ac19ca6SMarc Zyngier 106591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 107591e5becSMarc Zyngier u32 event) 108591e5becSMarc Zyngier { 109591e5becSMarc Zyngier struct its_node *its = its_dev->its; 110591e5becSMarc Zyngier 111591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 112591e5becSMarc Zyngier } 113591e5becSMarc Zyngier 114cc2d3216SMarc Zyngier /* 115cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 116cc2d3216SMarc Zyngier * block. 117cc2d3216SMarc Zyngier */ 118cc2d3216SMarc Zyngier struct its_cmd_desc { 119cc2d3216SMarc Zyngier union { 120cc2d3216SMarc Zyngier struct { 121cc2d3216SMarc Zyngier struct its_device *dev; 122cc2d3216SMarc Zyngier u32 event_id; 123cc2d3216SMarc Zyngier } its_inv_cmd; 124cc2d3216SMarc Zyngier 125cc2d3216SMarc Zyngier struct { 126cc2d3216SMarc Zyngier struct its_device *dev; 127cc2d3216SMarc Zyngier u32 event_id; 128cc2d3216SMarc Zyngier } its_int_cmd; 129cc2d3216SMarc Zyngier 130cc2d3216SMarc Zyngier struct { 131cc2d3216SMarc Zyngier struct its_device *dev; 132cc2d3216SMarc Zyngier int valid; 133cc2d3216SMarc Zyngier } its_mapd_cmd; 134cc2d3216SMarc Zyngier 135cc2d3216SMarc Zyngier struct { 136cc2d3216SMarc Zyngier struct its_collection *col; 137cc2d3216SMarc Zyngier int valid; 138cc2d3216SMarc Zyngier } its_mapc_cmd; 139cc2d3216SMarc Zyngier 140cc2d3216SMarc Zyngier struct { 141cc2d3216SMarc Zyngier struct its_device *dev; 142cc2d3216SMarc Zyngier u32 phys_id; 143cc2d3216SMarc Zyngier u32 event_id; 144cc2d3216SMarc Zyngier } its_mapvi_cmd; 145cc2d3216SMarc Zyngier 146cc2d3216SMarc Zyngier struct { 147cc2d3216SMarc Zyngier struct its_device *dev; 148cc2d3216SMarc Zyngier struct its_collection *col; 149591e5becSMarc Zyngier u32 event_id; 150cc2d3216SMarc Zyngier } its_movi_cmd; 151cc2d3216SMarc Zyngier 152cc2d3216SMarc Zyngier struct { 153cc2d3216SMarc Zyngier struct its_device *dev; 154cc2d3216SMarc Zyngier u32 event_id; 155cc2d3216SMarc Zyngier } its_discard_cmd; 156cc2d3216SMarc Zyngier 157cc2d3216SMarc Zyngier struct { 158cc2d3216SMarc Zyngier struct its_collection *col; 159cc2d3216SMarc Zyngier } its_invall_cmd; 160cc2d3216SMarc Zyngier }; 161cc2d3216SMarc Zyngier }; 162cc2d3216SMarc Zyngier 163cc2d3216SMarc Zyngier /* 164cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 165cc2d3216SMarc Zyngier */ 166cc2d3216SMarc Zyngier struct its_cmd_block { 167cc2d3216SMarc Zyngier u64 raw_cmd[4]; 168cc2d3216SMarc Zyngier }; 169cc2d3216SMarc Zyngier 170cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 171cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 172cc2d3216SMarc Zyngier 173cc2d3216SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_cmd_block *, 174cc2d3216SMarc Zyngier struct its_cmd_desc *); 175cc2d3216SMarc Zyngier 176cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 177cc2d3216SMarc Zyngier { 178cc2d3216SMarc Zyngier cmd->raw_cmd[0] &= ~0xffUL; 179cc2d3216SMarc Zyngier cmd->raw_cmd[0] |= cmd_nr; 180cc2d3216SMarc Zyngier } 181cc2d3216SMarc Zyngier 182cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 183cc2d3216SMarc Zyngier { 1847e195ba0SAndre Przywara cmd->raw_cmd[0] &= BIT_ULL(32) - 1; 185cc2d3216SMarc Zyngier cmd->raw_cmd[0] |= ((u64)devid) << 32; 186cc2d3216SMarc Zyngier } 187cc2d3216SMarc Zyngier 188cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 189cc2d3216SMarc Zyngier { 190cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= ~0xffffffffUL; 191cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= id; 192cc2d3216SMarc Zyngier } 193cc2d3216SMarc Zyngier 194cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 195cc2d3216SMarc Zyngier { 196cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= 0xffffffffUL; 197cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= ((u64)phys_id) << 32; 198cc2d3216SMarc Zyngier } 199cc2d3216SMarc Zyngier 200cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 201cc2d3216SMarc Zyngier { 202cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= ~0x1fUL; 203cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= size & 0x1f; 204cc2d3216SMarc Zyngier } 205cc2d3216SMarc Zyngier 206cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 207cc2d3216SMarc Zyngier { 208cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~0xffffffffffffUL; 209cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= itt_addr & 0xffffffffff00UL; 210cc2d3216SMarc Zyngier } 211cc2d3216SMarc Zyngier 212cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 213cc2d3216SMarc Zyngier { 214cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~(1UL << 63); 215cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= ((u64)!!valid) << 63; 216cc2d3216SMarc Zyngier } 217cc2d3216SMarc Zyngier 218cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 219cc2d3216SMarc Zyngier { 220cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~(0xffffffffUL << 16); 221cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= (target_addr & (0xffffffffUL << 16)); 222cc2d3216SMarc Zyngier } 223cc2d3216SMarc Zyngier 224cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 225cc2d3216SMarc Zyngier { 226cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~0xffffUL; 227cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= col; 228cc2d3216SMarc Zyngier } 229cc2d3216SMarc Zyngier 230cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 231cc2d3216SMarc Zyngier { 232cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 233cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 234cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 235cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 236cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 237cc2d3216SMarc Zyngier } 238cc2d3216SMarc Zyngier 239cc2d3216SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_cmd_block *cmd, 240cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 241cc2d3216SMarc Zyngier { 242cc2d3216SMarc Zyngier unsigned long itt_addr; 243c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 244cc2d3216SMarc Zyngier 245cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 246cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 247cc2d3216SMarc Zyngier 248cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 249cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 250cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 251cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 252cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 253cc2d3216SMarc Zyngier 254cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 255cc2d3216SMarc Zyngier 256591e5becSMarc Zyngier return NULL; 257cc2d3216SMarc Zyngier } 258cc2d3216SMarc Zyngier 259cc2d3216SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_cmd_block *cmd, 260cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 261cc2d3216SMarc Zyngier { 262cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 263cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 264cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 265cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 266cc2d3216SMarc Zyngier 267cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 268cc2d3216SMarc Zyngier 269cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 270cc2d3216SMarc Zyngier } 271cc2d3216SMarc Zyngier 272cc2d3216SMarc Zyngier static struct its_collection *its_build_mapvi_cmd(struct its_cmd_block *cmd, 273cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 274cc2d3216SMarc Zyngier { 275591e5becSMarc Zyngier struct its_collection *col; 276591e5becSMarc Zyngier 277591e5becSMarc Zyngier col = dev_event_to_col(desc->its_mapvi_cmd.dev, 278591e5becSMarc Zyngier desc->its_mapvi_cmd.event_id); 279591e5becSMarc Zyngier 280cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPVI); 281cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapvi_cmd.dev->device_id); 282cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_mapvi_cmd.event_id); 283cc2d3216SMarc Zyngier its_encode_phys_id(cmd, desc->its_mapvi_cmd.phys_id); 284591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 285cc2d3216SMarc Zyngier 286cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 287cc2d3216SMarc Zyngier 288591e5becSMarc Zyngier return col; 289cc2d3216SMarc Zyngier } 290cc2d3216SMarc Zyngier 291cc2d3216SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_cmd_block *cmd, 292cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 293cc2d3216SMarc Zyngier { 294591e5becSMarc Zyngier struct its_collection *col; 295591e5becSMarc Zyngier 296591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 297591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 298591e5becSMarc Zyngier 299cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 300cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 301591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 302cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 303cc2d3216SMarc Zyngier 304cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 305cc2d3216SMarc Zyngier 306591e5becSMarc Zyngier return col; 307cc2d3216SMarc Zyngier } 308cc2d3216SMarc Zyngier 309cc2d3216SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_cmd_block *cmd, 310cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 311cc2d3216SMarc Zyngier { 312591e5becSMarc Zyngier struct its_collection *col; 313591e5becSMarc Zyngier 314591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 315591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 316591e5becSMarc Zyngier 317cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 318cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 319cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 320cc2d3216SMarc Zyngier 321cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 322cc2d3216SMarc Zyngier 323591e5becSMarc Zyngier return col; 324cc2d3216SMarc Zyngier } 325cc2d3216SMarc Zyngier 326cc2d3216SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_cmd_block *cmd, 327cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 328cc2d3216SMarc Zyngier { 329591e5becSMarc Zyngier struct its_collection *col; 330591e5becSMarc Zyngier 331591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 332591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 333591e5becSMarc Zyngier 334cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 335cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 336cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 337cc2d3216SMarc Zyngier 338cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 339cc2d3216SMarc Zyngier 340591e5becSMarc Zyngier return col; 341cc2d3216SMarc Zyngier } 342cc2d3216SMarc Zyngier 343cc2d3216SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd, 344cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 345cc2d3216SMarc Zyngier { 346cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 347cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 348cc2d3216SMarc Zyngier 349cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 350cc2d3216SMarc Zyngier 351cc2d3216SMarc Zyngier return NULL; 352cc2d3216SMarc Zyngier } 353cc2d3216SMarc Zyngier 354cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 355cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 356cc2d3216SMarc Zyngier { 357cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 358cc2d3216SMarc Zyngier } 359cc2d3216SMarc Zyngier 360cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 361cc2d3216SMarc Zyngier { 362cc2d3216SMarc Zyngier int widx; 363cc2d3216SMarc Zyngier int ridx; 364cc2d3216SMarc Zyngier 365cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 366cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 367cc2d3216SMarc Zyngier 368cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 369cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 370cc2d3216SMarc Zyngier return 1; 371cc2d3216SMarc Zyngier 372cc2d3216SMarc Zyngier return 0; 373cc2d3216SMarc Zyngier } 374cc2d3216SMarc Zyngier 375cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 376cc2d3216SMarc Zyngier { 377cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 378cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 379cc2d3216SMarc Zyngier 380cc2d3216SMarc Zyngier while (its_queue_full(its)) { 381cc2d3216SMarc Zyngier count--; 382cc2d3216SMarc Zyngier if (!count) { 383cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 384cc2d3216SMarc Zyngier return NULL; 385cc2d3216SMarc Zyngier } 386cc2d3216SMarc Zyngier cpu_relax(); 387cc2d3216SMarc Zyngier udelay(1); 388cc2d3216SMarc Zyngier } 389cc2d3216SMarc Zyngier 390cc2d3216SMarc Zyngier cmd = its->cmd_write++; 391cc2d3216SMarc Zyngier 392cc2d3216SMarc Zyngier /* Handle queue wrapping */ 393cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 394cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 395cc2d3216SMarc Zyngier 396cc2d3216SMarc Zyngier return cmd; 397cc2d3216SMarc Zyngier } 398cc2d3216SMarc Zyngier 399cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 400cc2d3216SMarc Zyngier { 401cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 402cc2d3216SMarc Zyngier 403cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 404cc2d3216SMarc Zyngier 405cc2d3216SMarc Zyngier return its->cmd_write; 406cc2d3216SMarc Zyngier } 407cc2d3216SMarc Zyngier 408cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 409cc2d3216SMarc Zyngier { 410cc2d3216SMarc Zyngier /* 411cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 412cc2d3216SMarc Zyngier * the ITS. 413cc2d3216SMarc Zyngier */ 414cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 415cc2d3216SMarc Zyngier __flush_dcache_area(cmd, sizeof(*cmd)); 416cc2d3216SMarc Zyngier else 417cc2d3216SMarc Zyngier dsb(ishst); 418cc2d3216SMarc Zyngier } 419cc2d3216SMarc Zyngier 420cc2d3216SMarc Zyngier static void its_wait_for_range_completion(struct its_node *its, 421cc2d3216SMarc Zyngier struct its_cmd_block *from, 422cc2d3216SMarc Zyngier struct its_cmd_block *to) 423cc2d3216SMarc Zyngier { 424cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 425cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 426cc2d3216SMarc Zyngier 427cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 428cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 429cc2d3216SMarc Zyngier 430cc2d3216SMarc Zyngier while (1) { 431cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 432cc2d3216SMarc Zyngier if (rd_idx >= to_idx || rd_idx < from_idx) 433cc2d3216SMarc Zyngier break; 434cc2d3216SMarc Zyngier 435cc2d3216SMarc Zyngier count--; 436cc2d3216SMarc Zyngier if (!count) { 437cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue timeout\n"); 438cc2d3216SMarc Zyngier return; 439cc2d3216SMarc Zyngier } 440cc2d3216SMarc Zyngier cpu_relax(); 441cc2d3216SMarc Zyngier udelay(1); 442cc2d3216SMarc Zyngier } 443cc2d3216SMarc Zyngier } 444cc2d3216SMarc Zyngier 445cc2d3216SMarc Zyngier static void its_send_single_command(struct its_node *its, 446cc2d3216SMarc Zyngier its_cmd_builder_t builder, 447cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 448cc2d3216SMarc Zyngier { 449cc2d3216SMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; 450cc2d3216SMarc Zyngier struct its_collection *sync_col; 4513e39e8f5SMarc Zyngier unsigned long flags; 452cc2d3216SMarc Zyngier 4533e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 454cc2d3216SMarc Zyngier 455cc2d3216SMarc Zyngier cmd = its_allocate_entry(its); 456cc2d3216SMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ 457cc2d3216SMarc Zyngier pr_err_ratelimited("ITS can't allocate, dropping command\n"); 4583e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 459cc2d3216SMarc Zyngier return; 460cc2d3216SMarc Zyngier } 461cc2d3216SMarc Zyngier sync_col = builder(cmd, desc); 462cc2d3216SMarc Zyngier its_flush_cmd(its, cmd); 463cc2d3216SMarc Zyngier 464cc2d3216SMarc Zyngier if (sync_col) { 465cc2d3216SMarc Zyngier sync_cmd = its_allocate_entry(its); 466cc2d3216SMarc Zyngier if (!sync_cmd) { 467cc2d3216SMarc Zyngier pr_err_ratelimited("ITS can't SYNC, skipping\n"); 468cc2d3216SMarc Zyngier goto post; 469cc2d3216SMarc Zyngier } 470cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 471cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 472cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 473cc2d3216SMarc Zyngier its_flush_cmd(its, sync_cmd); 474cc2d3216SMarc Zyngier } 475cc2d3216SMarc Zyngier 476cc2d3216SMarc Zyngier post: 477cc2d3216SMarc Zyngier next_cmd = its_post_commands(its); 4783e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 479cc2d3216SMarc Zyngier 480cc2d3216SMarc Zyngier its_wait_for_range_completion(its, cmd, next_cmd); 481cc2d3216SMarc Zyngier } 482cc2d3216SMarc Zyngier 483cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 484cc2d3216SMarc Zyngier { 485cc2d3216SMarc Zyngier struct its_cmd_desc desc; 486cc2d3216SMarc Zyngier 487cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 488cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 489cc2d3216SMarc Zyngier 490cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 491cc2d3216SMarc Zyngier } 492cc2d3216SMarc Zyngier 493cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 494cc2d3216SMarc Zyngier { 495cc2d3216SMarc Zyngier struct its_cmd_desc desc; 496cc2d3216SMarc Zyngier 497cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 498cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 499cc2d3216SMarc Zyngier 500cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 501cc2d3216SMarc Zyngier } 502cc2d3216SMarc Zyngier 503cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 504cc2d3216SMarc Zyngier int valid) 505cc2d3216SMarc Zyngier { 506cc2d3216SMarc Zyngier struct its_cmd_desc desc; 507cc2d3216SMarc Zyngier 508cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 509cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 510cc2d3216SMarc Zyngier 511cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 512cc2d3216SMarc Zyngier } 513cc2d3216SMarc Zyngier 514cc2d3216SMarc Zyngier static void its_send_mapvi(struct its_device *dev, u32 irq_id, u32 id) 515cc2d3216SMarc Zyngier { 516cc2d3216SMarc Zyngier struct its_cmd_desc desc; 517cc2d3216SMarc Zyngier 518cc2d3216SMarc Zyngier desc.its_mapvi_cmd.dev = dev; 519cc2d3216SMarc Zyngier desc.its_mapvi_cmd.phys_id = irq_id; 520cc2d3216SMarc Zyngier desc.its_mapvi_cmd.event_id = id; 521cc2d3216SMarc Zyngier 522cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapvi_cmd, &desc); 523cc2d3216SMarc Zyngier } 524cc2d3216SMarc Zyngier 525cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 526cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 527cc2d3216SMarc Zyngier { 528cc2d3216SMarc Zyngier struct its_cmd_desc desc; 529cc2d3216SMarc Zyngier 530cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 531cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 532591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 533cc2d3216SMarc Zyngier 534cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 535cc2d3216SMarc Zyngier } 536cc2d3216SMarc Zyngier 537cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 538cc2d3216SMarc Zyngier { 539cc2d3216SMarc Zyngier struct its_cmd_desc desc; 540cc2d3216SMarc Zyngier 541cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 542cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 543cc2d3216SMarc Zyngier 544cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 545cc2d3216SMarc Zyngier } 546cc2d3216SMarc Zyngier 547cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 548cc2d3216SMarc Zyngier { 549cc2d3216SMarc Zyngier struct its_cmd_desc desc; 550cc2d3216SMarc Zyngier 551cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 552cc2d3216SMarc Zyngier 553cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 554cc2d3216SMarc Zyngier } 555c48ed51cSMarc Zyngier 556c48ed51cSMarc Zyngier /* 557c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 558c48ed51cSMarc Zyngier */ 559c48ed51cSMarc Zyngier 560c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 561c48ed51cSMarc Zyngier { 562c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 563591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 564c48ed51cSMarc Zyngier } 565c48ed51cSMarc Zyngier 566c48ed51cSMarc Zyngier static void lpi_set_config(struct irq_data *d, bool enable) 567c48ed51cSMarc Zyngier { 568c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 569c48ed51cSMarc Zyngier irq_hw_number_t hwirq = d->hwirq; 570c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 571c48ed51cSMarc Zyngier u8 *cfg = page_address(gic_rdists->prop_page) + hwirq - 8192; 572c48ed51cSMarc Zyngier 573c48ed51cSMarc Zyngier if (enable) 574c48ed51cSMarc Zyngier *cfg |= LPI_PROP_ENABLED; 575c48ed51cSMarc Zyngier else 576c48ed51cSMarc Zyngier *cfg &= ~LPI_PROP_ENABLED; 577c48ed51cSMarc Zyngier 578c48ed51cSMarc Zyngier /* 579c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 580c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 581c48ed51cSMarc Zyngier * Humpf... 582c48ed51cSMarc Zyngier */ 583c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 584c48ed51cSMarc Zyngier __flush_dcache_area(cfg, sizeof(*cfg)); 585c48ed51cSMarc Zyngier else 586c48ed51cSMarc Zyngier dsb(ishst); 587c48ed51cSMarc Zyngier its_send_inv(its_dev, id); 588c48ed51cSMarc Zyngier } 589c48ed51cSMarc Zyngier 590c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 591c48ed51cSMarc Zyngier { 592c48ed51cSMarc Zyngier lpi_set_config(d, false); 593c48ed51cSMarc Zyngier } 594c48ed51cSMarc Zyngier 595c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 596c48ed51cSMarc Zyngier { 597c48ed51cSMarc Zyngier lpi_set_config(d, true); 598c48ed51cSMarc Zyngier } 599c48ed51cSMarc Zyngier 600c48ed51cSMarc Zyngier static void its_eoi_irq(struct irq_data *d) 601c48ed51cSMarc Zyngier { 602c48ed51cSMarc Zyngier gic_write_eoir(d->hwirq); 603c48ed51cSMarc Zyngier } 604c48ed51cSMarc Zyngier 605c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 606c48ed51cSMarc Zyngier bool force) 607c48ed51cSMarc Zyngier { 608c48ed51cSMarc Zyngier unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask); 609c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 610c48ed51cSMarc Zyngier struct its_collection *target_col; 611c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 612c48ed51cSMarc Zyngier 613c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 614c48ed51cSMarc Zyngier return -EINVAL; 615c48ed51cSMarc Zyngier 616c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 617c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 618591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 619c48ed51cSMarc Zyngier 620c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 621c48ed51cSMarc Zyngier } 622c48ed51cSMarc Zyngier 623b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 624b48ac83dSMarc Zyngier { 625b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 626b48ac83dSMarc Zyngier struct its_node *its; 627b48ac83dSMarc Zyngier u64 addr; 628b48ac83dSMarc Zyngier 629b48ac83dSMarc Zyngier its = its_dev->its; 630b48ac83dSMarc Zyngier addr = its->phys_base + GITS_TRANSLATER; 631b48ac83dSMarc Zyngier 632b48ac83dSMarc Zyngier msg->address_lo = addr & ((1UL << 32) - 1); 633b48ac83dSMarc Zyngier msg->address_hi = addr >> 32; 634b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 635b48ac83dSMarc Zyngier } 636b48ac83dSMarc Zyngier 637c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 638c48ed51cSMarc Zyngier .name = "ITS", 639c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 640c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 641c48ed51cSMarc Zyngier .irq_eoi = its_eoi_irq, 642c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 643b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 644b48ac83dSMarc Zyngier }; 645b48ac83dSMarc Zyngier 646b48ac83dSMarc Zyngier static void its_mask_msi_irq(struct irq_data *d) 647b48ac83dSMarc Zyngier { 648b48ac83dSMarc Zyngier pci_msi_mask_irq(d); 649b48ac83dSMarc Zyngier irq_chip_mask_parent(d); 650b48ac83dSMarc Zyngier } 651b48ac83dSMarc Zyngier 652b48ac83dSMarc Zyngier static void its_unmask_msi_irq(struct irq_data *d) 653b48ac83dSMarc Zyngier { 654b48ac83dSMarc Zyngier pci_msi_unmask_irq(d); 655b48ac83dSMarc Zyngier irq_chip_unmask_parent(d); 656b48ac83dSMarc Zyngier } 657b48ac83dSMarc Zyngier 658b48ac83dSMarc Zyngier static struct irq_chip its_msi_irq_chip = { 659b48ac83dSMarc Zyngier .name = "ITS-MSI", 660b48ac83dSMarc Zyngier .irq_unmask = its_unmask_msi_irq, 661b48ac83dSMarc Zyngier .irq_mask = its_mask_msi_irq, 662b48ac83dSMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 663b48ac83dSMarc Zyngier .irq_write_msi_msg = pci_msi_domain_write_msg, 664c48ed51cSMarc Zyngier }; 665bf9529f8SMarc Zyngier 666bf9529f8SMarc Zyngier /* 667bf9529f8SMarc Zyngier * How we allocate LPIs: 668bf9529f8SMarc Zyngier * 669bf9529f8SMarc Zyngier * The GIC has id_bits bits for interrupt identifiers. From there, we 670bf9529f8SMarc Zyngier * must subtract 8192 which are reserved for SGIs/PPIs/SPIs. Then, as 671bf9529f8SMarc Zyngier * we allocate LPIs by chunks of 32, we can shift the whole thing by 5 672bf9529f8SMarc Zyngier * bits to the right. 673bf9529f8SMarc Zyngier * 674bf9529f8SMarc Zyngier * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations. 675bf9529f8SMarc Zyngier */ 676bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK_SHIFT 5 677bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK (1 << IRQS_PER_CHUNK_SHIFT) 678bf9529f8SMarc Zyngier 679bf9529f8SMarc Zyngier static unsigned long *lpi_bitmap; 680bf9529f8SMarc Zyngier static u32 lpi_chunks; 681bf9529f8SMarc Zyngier static DEFINE_SPINLOCK(lpi_lock); 682bf9529f8SMarc Zyngier 683bf9529f8SMarc Zyngier static int its_lpi_to_chunk(int lpi) 684bf9529f8SMarc Zyngier { 685bf9529f8SMarc Zyngier return (lpi - 8192) >> IRQS_PER_CHUNK_SHIFT; 686bf9529f8SMarc Zyngier } 687bf9529f8SMarc Zyngier 688bf9529f8SMarc Zyngier static int its_chunk_to_lpi(int chunk) 689bf9529f8SMarc Zyngier { 690bf9529f8SMarc Zyngier return (chunk << IRQS_PER_CHUNK_SHIFT) + 8192; 691bf9529f8SMarc Zyngier } 692bf9529f8SMarc Zyngier 693bf9529f8SMarc Zyngier static int its_lpi_init(u32 id_bits) 694bf9529f8SMarc Zyngier { 695bf9529f8SMarc Zyngier lpi_chunks = its_lpi_to_chunk(1UL << id_bits); 696bf9529f8SMarc Zyngier 697bf9529f8SMarc Zyngier lpi_bitmap = kzalloc(BITS_TO_LONGS(lpi_chunks) * sizeof(long), 698bf9529f8SMarc Zyngier GFP_KERNEL); 699bf9529f8SMarc Zyngier if (!lpi_bitmap) { 700bf9529f8SMarc Zyngier lpi_chunks = 0; 701bf9529f8SMarc Zyngier return -ENOMEM; 702bf9529f8SMarc Zyngier } 703bf9529f8SMarc Zyngier 704bf9529f8SMarc Zyngier pr_info("ITS: Allocated %d chunks for LPIs\n", (int)lpi_chunks); 705bf9529f8SMarc Zyngier return 0; 706bf9529f8SMarc Zyngier } 707bf9529f8SMarc Zyngier 708bf9529f8SMarc Zyngier static unsigned long *its_lpi_alloc_chunks(int nr_irqs, int *base, int *nr_ids) 709bf9529f8SMarc Zyngier { 710bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 711bf9529f8SMarc Zyngier int chunk_id; 712bf9529f8SMarc Zyngier int nr_chunks; 713bf9529f8SMarc Zyngier int i; 714bf9529f8SMarc Zyngier 715bf9529f8SMarc Zyngier nr_chunks = DIV_ROUND_UP(nr_irqs, IRQS_PER_CHUNK); 716bf9529f8SMarc Zyngier 717bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 718bf9529f8SMarc Zyngier 719bf9529f8SMarc Zyngier do { 720bf9529f8SMarc Zyngier chunk_id = bitmap_find_next_zero_area(lpi_bitmap, lpi_chunks, 721bf9529f8SMarc Zyngier 0, nr_chunks, 0); 722bf9529f8SMarc Zyngier if (chunk_id < lpi_chunks) 723bf9529f8SMarc Zyngier break; 724bf9529f8SMarc Zyngier 725bf9529f8SMarc Zyngier nr_chunks--; 726bf9529f8SMarc Zyngier } while (nr_chunks > 0); 727bf9529f8SMarc Zyngier 728bf9529f8SMarc Zyngier if (!nr_chunks) 729bf9529f8SMarc Zyngier goto out; 730bf9529f8SMarc Zyngier 731bf9529f8SMarc Zyngier bitmap = kzalloc(BITS_TO_LONGS(nr_chunks * IRQS_PER_CHUNK) * sizeof (long), 732bf9529f8SMarc Zyngier GFP_ATOMIC); 733bf9529f8SMarc Zyngier if (!bitmap) 734bf9529f8SMarc Zyngier goto out; 735bf9529f8SMarc Zyngier 736bf9529f8SMarc Zyngier for (i = 0; i < nr_chunks; i++) 737bf9529f8SMarc Zyngier set_bit(chunk_id + i, lpi_bitmap); 738bf9529f8SMarc Zyngier 739bf9529f8SMarc Zyngier *base = its_chunk_to_lpi(chunk_id); 740bf9529f8SMarc Zyngier *nr_ids = nr_chunks * IRQS_PER_CHUNK; 741bf9529f8SMarc Zyngier 742bf9529f8SMarc Zyngier out: 743bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 744bf9529f8SMarc Zyngier 745bf9529f8SMarc Zyngier return bitmap; 746bf9529f8SMarc Zyngier } 747bf9529f8SMarc Zyngier 748591e5becSMarc Zyngier static void its_lpi_free(struct event_lpi_map *map) 749bf9529f8SMarc Zyngier { 750591e5becSMarc Zyngier int base = map->lpi_base; 751591e5becSMarc Zyngier int nr_ids = map->nr_lpis; 752bf9529f8SMarc Zyngier int lpi; 753bf9529f8SMarc Zyngier 754bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 755bf9529f8SMarc Zyngier 756bf9529f8SMarc Zyngier for (lpi = base; lpi < (base + nr_ids); lpi += IRQS_PER_CHUNK) { 757bf9529f8SMarc Zyngier int chunk = its_lpi_to_chunk(lpi); 758bf9529f8SMarc Zyngier BUG_ON(chunk > lpi_chunks); 759bf9529f8SMarc Zyngier if (test_bit(chunk, lpi_bitmap)) { 760bf9529f8SMarc Zyngier clear_bit(chunk, lpi_bitmap); 761bf9529f8SMarc Zyngier } else { 762bf9529f8SMarc Zyngier pr_err("Bad LPI chunk %d\n", chunk); 763bf9529f8SMarc Zyngier } 764bf9529f8SMarc Zyngier } 765bf9529f8SMarc Zyngier 766bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 767bf9529f8SMarc Zyngier 768591e5becSMarc Zyngier kfree(map->lpi_map); 769591e5becSMarc Zyngier kfree(map->col_map); 770bf9529f8SMarc Zyngier } 7711ac19ca6SMarc Zyngier 7721ac19ca6SMarc Zyngier /* 7731ac19ca6SMarc Zyngier * We allocate 64kB for PROPBASE. That gives us at most 64K LPIs to 7741ac19ca6SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 7751ac19ca6SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 7761ac19ca6SMarc Zyngier */ 7771ac19ca6SMarc Zyngier #define LPI_PROPBASE_SZ SZ_64K 7781ac19ca6SMarc Zyngier #define LPI_PENDBASE_SZ (LPI_PROPBASE_SZ / 8 + SZ_1K) 7791ac19ca6SMarc Zyngier 7801ac19ca6SMarc Zyngier /* 7811ac19ca6SMarc Zyngier * This is how many bits of ID we need, including the useless ones. 7821ac19ca6SMarc Zyngier */ 7831ac19ca6SMarc Zyngier #define LPI_NRBITS ilog2(LPI_PROPBASE_SZ + SZ_8K) 7841ac19ca6SMarc Zyngier 7851ac19ca6SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 7861ac19ca6SMarc Zyngier 7871ac19ca6SMarc Zyngier static int __init its_alloc_lpi_tables(void) 7881ac19ca6SMarc Zyngier { 7891ac19ca6SMarc Zyngier phys_addr_t paddr; 7901ac19ca6SMarc Zyngier 7911ac19ca6SMarc Zyngier gic_rdists->prop_page = alloc_pages(GFP_NOWAIT, 7921ac19ca6SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 7931ac19ca6SMarc Zyngier if (!gic_rdists->prop_page) { 7941ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 7951ac19ca6SMarc Zyngier return -ENOMEM; 7961ac19ca6SMarc Zyngier } 7971ac19ca6SMarc Zyngier 7981ac19ca6SMarc Zyngier paddr = page_to_phys(gic_rdists->prop_page); 7991ac19ca6SMarc Zyngier pr_info("GIC: using LPI property table @%pa\n", &paddr); 8001ac19ca6SMarc Zyngier 8011ac19ca6SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 8021ac19ca6SMarc Zyngier memset(page_address(gic_rdists->prop_page), 8031ac19ca6SMarc Zyngier LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, 8041ac19ca6SMarc Zyngier LPI_PROPBASE_SZ); 8051ac19ca6SMarc Zyngier 8061ac19ca6SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 8071ac19ca6SMarc Zyngier __flush_dcache_area(page_address(gic_rdists->prop_page), LPI_PROPBASE_SZ); 8081ac19ca6SMarc Zyngier 8091ac19ca6SMarc Zyngier return 0; 8101ac19ca6SMarc Zyngier } 8111ac19ca6SMarc Zyngier 8121ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 8131ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 8141ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 8151ac19ca6SMarc Zyngier [GITS_BASER_TYPE_CPU] = "Physical CPUs", 8161ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 8171ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 8181ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 8191ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 8201ac19ca6SMarc Zyngier }; 8211ac19ca6SMarc Zyngier 8221ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 8231ac19ca6SMarc Zyngier { 8241ac19ca6SMarc Zyngier int i; 8251ac19ca6SMarc Zyngier 8261ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 8271ac19ca6SMarc Zyngier if (its->tables[i]) { 8281ac19ca6SMarc Zyngier free_page((unsigned long)its->tables[i]); 8291ac19ca6SMarc Zyngier its->tables[i] = NULL; 8301ac19ca6SMarc Zyngier } 8311ac19ca6SMarc Zyngier } 8321ac19ca6SMarc Zyngier } 8331ac19ca6SMarc Zyngier 8341ac19ca6SMarc Zyngier static int its_alloc_tables(struct its_node *its) 8351ac19ca6SMarc Zyngier { 8361ac19ca6SMarc Zyngier int err; 8371ac19ca6SMarc Zyngier int i; 838790b57aeSYun Wu int psz = SZ_64K; 8391ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 840241a386cSMarc Zyngier u64 cache = GITS_BASER_WaWb; 8411ac19ca6SMarc Zyngier 8421ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 8431ac19ca6SMarc Zyngier u64 val = readq_relaxed(its->base + GITS_BASER + i * 8); 8441ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 8451ac19ca6SMarc Zyngier u64 entry_size = GITS_BASER_ENTRY_SIZE(val); 846790b57aeSYun Wu int order = get_order(psz); 847f54b97edSMarc Zyngier int alloc_size; 8481ac19ca6SMarc Zyngier u64 tmp; 8491ac19ca6SMarc Zyngier void *base; 8501ac19ca6SMarc Zyngier 8511ac19ca6SMarc Zyngier if (type == GITS_BASER_TYPE_NONE) 8521ac19ca6SMarc Zyngier continue; 8531ac19ca6SMarc Zyngier 854f54b97edSMarc Zyngier /* 855f54b97edSMarc Zyngier * Allocate as many entries as required to fit the 856f54b97edSMarc Zyngier * range of device IDs that the ITS can grok... The ID 857f54b97edSMarc Zyngier * space being incredibly sparse, this results in a 858f54b97edSMarc Zyngier * massive waste of memory. 859f54b97edSMarc Zyngier * 860f54b97edSMarc Zyngier * For other tables, only allocate a single page. 861f54b97edSMarc Zyngier */ 862f54b97edSMarc Zyngier if (type == GITS_BASER_TYPE_DEVICE) { 863f54b97edSMarc Zyngier u64 typer = readq_relaxed(its->base + GITS_TYPER); 864f54b97edSMarc Zyngier u32 ids = GITS_TYPER_DEVBITS(typer); 865f54b97edSMarc Zyngier 8663ad2a5f5SMinghuan Lian /* 8673ad2a5f5SMinghuan Lian * 'order' was initialized earlier to the default page 8683ad2a5f5SMinghuan Lian * granule of the the ITS. We can't have an allocation 8693ad2a5f5SMinghuan Lian * smaller than that. If the requested allocation 8703ad2a5f5SMinghuan Lian * is smaller, round up to the default page granule. 8713ad2a5f5SMinghuan Lian */ 8723ad2a5f5SMinghuan Lian order = max(get_order((1UL << ids) * entry_size), 8733ad2a5f5SMinghuan Lian order); 8741d27704aSYun Wu if (order >= MAX_ORDER) { 8751d27704aSYun Wu order = MAX_ORDER - 1; 8761d27704aSYun Wu pr_warn("%s: Device Table too large, reduce its page order to %u\n", 8771d27704aSYun Wu its->msi_chip.of_node->full_name, order); 8781d27704aSYun Wu } 879f54b97edSMarc Zyngier } 880f54b97edSMarc Zyngier 881f54b97edSMarc Zyngier alloc_size = (1 << order) * PAGE_SIZE; 882f54b97edSMarc Zyngier base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 8831ac19ca6SMarc Zyngier if (!base) { 8841ac19ca6SMarc Zyngier err = -ENOMEM; 8851ac19ca6SMarc Zyngier goto out_free; 8861ac19ca6SMarc Zyngier } 8871ac19ca6SMarc Zyngier 8881ac19ca6SMarc Zyngier its->tables[i] = base; 8891ac19ca6SMarc Zyngier 8901ac19ca6SMarc Zyngier retry_baser: 8911ac19ca6SMarc Zyngier val = (virt_to_phys(base) | 8921ac19ca6SMarc Zyngier (type << GITS_BASER_TYPE_SHIFT) | 8931ac19ca6SMarc Zyngier ((entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 894241a386cSMarc Zyngier cache | 8951ac19ca6SMarc Zyngier shr | 8961ac19ca6SMarc Zyngier GITS_BASER_VALID); 8971ac19ca6SMarc Zyngier 8981ac19ca6SMarc Zyngier switch (psz) { 8991ac19ca6SMarc Zyngier case SZ_4K: 9001ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_4K; 9011ac19ca6SMarc Zyngier break; 9021ac19ca6SMarc Zyngier case SZ_16K: 9031ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_16K; 9041ac19ca6SMarc Zyngier break; 9051ac19ca6SMarc Zyngier case SZ_64K: 9061ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_64K; 9071ac19ca6SMarc Zyngier break; 9081ac19ca6SMarc Zyngier } 9091ac19ca6SMarc Zyngier 910f54b97edSMarc Zyngier val |= (alloc_size / psz) - 1; 9111ac19ca6SMarc Zyngier 9121ac19ca6SMarc Zyngier writeq_relaxed(val, its->base + GITS_BASER + i * 8); 9131ac19ca6SMarc Zyngier tmp = readq_relaxed(its->base + GITS_BASER + i * 8); 9141ac19ca6SMarc Zyngier 9151ac19ca6SMarc Zyngier if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 9161ac19ca6SMarc Zyngier /* 9171ac19ca6SMarc Zyngier * Shareability didn't stick. Just use 9181ac19ca6SMarc Zyngier * whatever the read reported, which is likely 9191ac19ca6SMarc Zyngier * to be the only thing this redistributor 920241a386cSMarc Zyngier * supports. If that's zero, make it 921241a386cSMarc Zyngier * non-cacheable as well. 9221ac19ca6SMarc Zyngier */ 9231ac19ca6SMarc Zyngier shr = tmp & GITS_BASER_SHAREABILITY_MASK; 924241a386cSMarc Zyngier if (!shr) 925241a386cSMarc Zyngier cache = GITS_BASER_nC; 9261ac19ca6SMarc Zyngier goto retry_baser; 9271ac19ca6SMarc Zyngier } 9281ac19ca6SMarc Zyngier 9291ac19ca6SMarc Zyngier if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 9301ac19ca6SMarc Zyngier /* 9311ac19ca6SMarc Zyngier * Page size didn't stick. Let's try a smaller 9321ac19ca6SMarc Zyngier * size and retry. If we reach 4K, then 9331ac19ca6SMarc Zyngier * something is horribly wrong... 9341ac19ca6SMarc Zyngier */ 9351ac19ca6SMarc Zyngier switch (psz) { 9361ac19ca6SMarc Zyngier case SZ_16K: 9371ac19ca6SMarc Zyngier psz = SZ_4K; 9381ac19ca6SMarc Zyngier goto retry_baser; 9391ac19ca6SMarc Zyngier case SZ_64K: 9401ac19ca6SMarc Zyngier psz = SZ_16K; 9411ac19ca6SMarc Zyngier goto retry_baser; 9421ac19ca6SMarc Zyngier } 9431ac19ca6SMarc Zyngier } 9441ac19ca6SMarc Zyngier 9451ac19ca6SMarc Zyngier if (val != tmp) { 9461ac19ca6SMarc Zyngier pr_err("ITS: %s: GITS_BASER%d doesn't stick: %lx %lx\n", 9471ac19ca6SMarc Zyngier its->msi_chip.of_node->full_name, i, 9481ac19ca6SMarc Zyngier (unsigned long) val, (unsigned long) tmp); 9491ac19ca6SMarc Zyngier err = -ENXIO; 9501ac19ca6SMarc Zyngier goto out_free; 9511ac19ca6SMarc Zyngier } 9521ac19ca6SMarc Zyngier 9531ac19ca6SMarc Zyngier pr_info("ITS: allocated %d %s @%lx (psz %dK, shr %d)\n", 954f54b97edSMarc Zyngier (int)(alloc_size / entry_size), 9551ac19ca6SMarc Zyngier its_base_type_string[type], 9561ac19ca6SMarc Zyngier (unsigned long)virt_to_phys(base), 9571ac19ca6SMarc Zyngier psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 9581ac19ca6SMarc Zyngier } 9591ac19ca6SMarc Zyngier 9601ac19ca6SMarc Zyngier return 0; 9611ac19ca6SMarc Zyngier 9621ac19ca6SMarc Zyngier out_free: 9631ac19ca6SMarc Zyngier its_free_tables(its); 9641ac19ca6SMarc Zyngier 9651ac19ca6SMarc Zyngier return err; 9661ac19ca6SMarc Zyngier } 9671ac19ca6SMarc Zyngier 9681ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 9691ac19ca6SMarc Zyngier { 9701ac19ca6SMarc Zyngier its->collections = kzalloc(nr_cpu_ids * sizeof(*its->collections), 9711ac19ca6SMarc Zyngier GFP_KERNEL); 9721ac19ca6SMarc Zyngier if (!its->collections) 9731ac19ca6SMarc Zyngier return -ENOMEM; 9741ac19ca6SMarc Zyngier 9751ac19ca6SMarc Zyngier return 0; 9761ac19ca6SMarc Zyngier } 9771ac19ca6SMarc Zyngier 9781ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 9791ac19ca6SMarc Zyngier { 9801ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 9811ac19ca6SMarc Zyngier struct page *pend_page; 9821ac19ca6SMarc Zyngier u64 val, tmp; 9831ac19ca6SMarc Zyngier 9841ac19ca6SMarc Zyngier /* If we didn't allocate the pending table yet, do it now */ 9851ac19ca6SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 9861ac19ca6SMarc Zyngier if (!pend_page) { 9871ac19ca6SMarc Zyngier phys_addr_t paddr; 9881ac19ca6SMarc Zyngier /* 9891ac19ca6SMarc Zyngier * The pending pages have to be at least 64kB aligned, 9901ac19ca6SMarc Zyngier * hence the 'max(LPI_PENDBASE_SZ, SZ_64K)' below. 9911ac19ca6SMarc Zyngier */ 9921ac19ca6SMarc Zyngier pend_page = alloc_pages(GFP_NOWAIT | __GFP_ZERO, 9931ac19ca6SMarc Zyngier get_order(max(LPI_PENDBASE_SZ, SZ_64K))); 9941ac19ca6SMarc Zyngier if (!pend_page) { 9951ac19ca6SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", 9961ac19ca6SMarc Zyngier smp_processor_id()); 9971ac19ca6SMarc Zyngier return; 9981ac19ca6SMarc Zyngier } 9991ac19ca6SMarc Zyngier 10001ac19ca6SMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 10011ac19ca6SMarc Zyngier __flush_dcache_area(page_address(pend_page), LPI_PENDBASE_SZ); 10021ac19ca6SMarc Zyngier 10031ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 10041ac19ca6SMarc Zyngier pr_info("CPU%d: using LPI pending table @%pa\n", 10051ac19ca6SMarc Zyngier smp_processor_id(), &paddr); 10061ac19ca6SMarc Zyngier gic_data_rdist()->pend_page = pend_page; 10071ac19ca6SMarc Zyngier } 10081ac19ca6SMarc Zyngier 10091ac19ca6SMarc Zyngier /* Disable LPIs */ 10101ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 10111ac19ca6SMarc Zyngier val &= ~GICR_CTLR_ENABLE_LPIS; 10121ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 10131ac19ca6SMarc Zyngier 10141ac19ca6SMarc Zyngier /* 10151ac19ca6SMarc Zyngier * Make sure any change to the table is observable by the GIC. 10161ac19ca6SMarc Zyngier */ 10171ac19ca6SMarc Zyngier dsb(sy); 10181ac19ca6SMarc Zyngier 10191ac19ca6SMarc Zyngier /* set PROPBASE */ 10201ac19ca6SMarc Zyngier val = (page_to_phys(gic_rdists->prop_page) | 10211ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 10221ac19ca6SMarc Zyngier GICR_PROPBASER_WaWb | 10231ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 10241ac19ca6SMarc Zyngier 10251ac19ca6SMarc Zyngier writeq_relaxed(val, rbase + GICR_PROPBASER); 10261ac19ca6SMarc Zyngier tmp = readq_relaxed(rbase + GICR_PROPBASER); 10271ac19ca6SMarc Zyngier 10281ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 1029241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 1030241a386cSMarc Zyngier /* 1031241a386cSMarc Zyngier * The HW reports non-shareable, we must 1032241a386cSMarc Zyngier * remove the cacheability attributes as 1033241a386cSMarc Zyngier * well. 1034241a386cSMarc Zyngier */ 1035241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 1036241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 1037241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 1038241a386cSMarc Zyngier writeq_relaxed(val, rbase + GICR_PROPBASER); 1039241a386cSMarc Zyngier } 10401ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 10411ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 10421ac19ca6SMarc Zyngier } 10431ac19ca6SMarc Zyngier 10441ac19ca6SMarc Zyngier /* set PENDBASE */ 10451ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 10464ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 10474ad3e363SMarc Zyngier GICR_PENDBASER_WaWb); 10481ac19ca6SMarc Zyngier 10491ac19ca6SMarc Zyngier writeq_relaxed(val, rbase + GICR_PENDBASER); 1050241a386cSMarc Zyngier tmp = readq_relaxed(rbase + GICR_PENDBASER); 1051241a386cSMarc Zyngier 1052241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 1053241a386cSMarc Zyngier /* 1054241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 1055241a386cSMarc Zyngier * cacheability attributes as well. 1056241a386cSMarc Zyngier */ 1057241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 1058241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 1059241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 1060241a386cSMarc Zyngier writeq_relaxed(val, rbase + GICR_PENDBASER); 1061241a386cSMarc Zyngier } 10621ac19ca6SMarc Zyngier 10631ac19ca6SMarc Zyngier /* Enable LPIs */ 10641ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 10651ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 10661ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 10671ac19ca6SMarc Zyngier 10681ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 10691ac19ca6SMarc Zyngier dsb(sy); 10701ac19ca6SMarc Zyngier } 10711ac19ca6SMarc Zyngier 10721ac19ca6SMarc Zyngier static void its_cpu_init_collection(void) 10731ac19ca6SMarc Zyngier { 10741ac19ca6SMarc Zyngier struct its_node *its; 10751ac19ca6SMarc Zyngier int cpu; 10761ac19ca6SMarc Zyngier 10771ac19ca6SMarc Zyngier spin_lock(&its_lock); 10781ac19ca6SMarc Zyngier cpu = smp_processor_id(); 10791ac19ca6SMarc Zyngier 10801ac19ca6SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 10811ac19ca6SMarc Zyngier u64 target; 10821ac19ca6SMarc Zyngier 10831ac19ca6SMarc Zyngier /* 10841ac19ca6SMarc Zyngier * We now have to bind each collection to its target 10851ac19ca6SMarc Zyngier * redistributor. 10861ac19ca6SMarc Zyngier */ 10871ac19ca6SMarc Zyngier if (readq_relaxed(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 10881ac19ca6SMarc Zyngier /* 10891ac19ca6SMarc Zyngier * This ITS wants the physical address of the 10901ac19ca6SMarc Zyngier * redistributor. 10911ac19ca6SMarc Zyngier */ 10921ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 10931ac19ca6SMarc Zyngier } else { 10941ac19ca6SMarc Zyngier /* 10951ac19ca6SMarc Zyngier * This ITS wants a linear CPU number. 10961ac19ca6SMarc Zyngier */ 10971ac19ca6SMarc Zyngier target = readq_relaxed(gic_data_rdist_rd_base() + GICR_TYPER); 1098263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 10991ac19ca6SMarc Zyngier } 11001ac19ca6SMarc Zyngier 11011ac19ca6SMarc Zyngier /* Perform collection mapping */ 11021ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 11031ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 11041ac19ca6SMarc Zyngier 11051ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 11061ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 11071ac19ca6SMarc Zyngier } 11081ac19ca6SMarc Zyngier 11091ac19ca6SMarc Zyngier spin_unlock(&its_lock); 11101ac19ca6SMarc Zyngier } 111184a6a2e7SMarc Zyngier 111284a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 111384a6a2e7SMarc Zyngier { 111484a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 11153e39e8f5SMarc Zyngier unsigned long flags; 111684a6a2e7SMarc Zyngier 11173e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 111884a6a2e7SMarc Zyngier 111984a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 112084a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 112184a6a2e7SMarc Zyngier its_dev = tmp; 112284a6a2e7SMarc Zyngier break; 112384a6a2e7SMarc Zyngier } 112484a6a2e7SMarc Zyngier } 112584a6a2e7SMarc Zyngier 11263e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 112784a6a2e7SMarc Zyngier 112884a6a2e7SMarc Zyngier return its_dev; 112984a6a2e7SMarc Zyngier } 113084a6a2e7SMarc Zyngier 113184a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 113284a6a2e7SMarc Zyngier int nvecs) 113384a6a2e7SMarc Zyngier { 113484a6a2e7SMarc Zyngier struct its_device *dev; 113584a6a2e7SMarc Zyngier unsigned long *lpi_map; 11363e39e8f5SMarc Zyngier unsigned long flags; 1137591e5becSMarc Zyngier u16 *col_map = NULL; 113884a6a2e7SMarc Zyngier void *itt; 113984a6a2e7SMarc Zyngier int lpi_base; 114084a6a2e7SMarc Zyngier int nr_lpis; 1141c8481267SMarc Zyngier int nr_ites; 114284a6a2e7SMarc Zyngier int sz; 114384a6a2e7SMarc Zyngier 114484a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1145c8481267SMarc Zyngier /* 1146c8481267SMarc Zyngier * At least one bit of EventID is being used, hence a minimum 1147c8481267SMarc Zyngier * of two entries. No, the architecture doesn't let you 1148c8481267SMarc Zyngier * express an ITT with a single entry. 1149c8481267SMarc Zyngier */ 115096555c47SWill Deacon nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 1151c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 115284a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 11536c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 115484a6a2e7SMarc Zyngier lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 1155591e5becSMarc Zyngier if (lpi_map) 1156591e5becSMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_lpis, GFP_KERNEL); 115784a6a2e7SMarc Zyngier 1158591e5becSMarc Zyngier if (!dev || !itt || !lpi_map || !col_map) { 115984a6a2e7SMarc Zyngier kfree(dev); 116084a6a2e7SMarc Zyngier kfree(itt); 116184a6a2e7SMarc Zyngier kfree(lpi_map); 1162591e5becSMarc Zyngier kfree(col_map); 116384a6a2e7SMarc Zyngier return NULL; 116484a6a2e7SMarc Zyngier } 116584a6a2e7SMarc Zyngier 116684a6a2e7SMarc Zyngier dev->its = its; 116784a6a2e7SMarc Zyngier dev->itt = itt; 1168c8481267SMarc Zyngier dev->nr_ites = nr_ites; 1169591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 1170591e5becSMarc Zyngier dev->event_map.col_map = col_map; 1171591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 1172591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 117384a6a2e7SMarc Zyngier dev->device_id = dev_id; 117484a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 117584a6a2e7SMarc Zyngier 11763e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 117784a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 11783e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 117984a6a2e7SMarc Zyngier 118084a6a2e7SMarc Zyngier /* Map device to its ITT */ 118184a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 118284a6a2e7SMarc Zyngier 118384a6a2e7SMarc Zyngier return dev; 118484a6a2e7SMarc Zyngier } 118584a6a2e7SMarc Zyngier 118684a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 118784a6a2e7SMarc Zyngier { 11883e39e8f5SMarc Zyngier unsigned long flags; 11893e39e8f5SMarc Zyngier 11903e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 119184a6a2e7SMarc Zyngier list_del(&its_dev->entry); 11923e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 119384a6a2e7SMarc Zyngier kfree(its_dev->itt); 119484a6a2e7SMarc Zyngier kfree(its_dev); 119584a6a2e7SMarc Zyngier } 1196b48ac83dSMarc Zyngier 1197b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 1198b48ac83dSMarc Zyngier { 1199b48ac83dSMarc Zyngier int idx; 1200b48ac83dSMarc Zyngier 1201591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 1202591e5becSMarc Zyngier dev->event_map.nr_lpis); 1203591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 1204b48ac83dSMarc Zyngier return -ENOSPC; 1205b48ac83dSMarc Zyngier 1206591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 1207591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 1208b48ac83dSMarc Zyngier 1209b48ac83dSMarc Zyngier return 0; 1210b48ac83dSMarc Zyngier } 1211b48ac83dSMarc Zyngier 1212e8137f4fSMarc Zyngier struct its_pci_alias { 1213e8137f4fSMarc Zyngier struct pci_dev *pdev; 1214e8137f4fSMarc Zyngier u32 dev_id; 1215e8137f4fSMarc Zyngier u32 count; 1216e8137f4fSMarc Zyngier }; 1217e8137f4fSMarc Zyngier 1218e8137f4fSMarc Zyngier static int its_pci_msi_vec_count(struct pci_dev *pdev) 1219e8137f4fSMarc Zyngier { 1220e8137f4fSMarc Zyngier int msi, msix; 1221e8137f4fSMarc Zyngier 1222e8137f4fSMarc Zyngier msi = max(pci_msi_vec_count(pdev), 0); 1223e8137f4fSMarc Zyngier msix = max(pci_msix_vec_count(pdev), 0); 1224e8137f4fSMarc Zyngier 1225e8137f4fSMarc Zyngier return max(msi, msix); 1226e8137f4fSMarc Zyngier } 1227e8137f4fSMarc Zyngier 1228e8137f4fSMarc Zyngier static int its_get_pci_alias(struct pci_dev *pdev, u16 alias, void *data) 1229e8137f4fSMarc Zyngier { 1230e8137f4fSMarc Zyngier struct its_pci_alias *dev_alias = data; 1231e8137f4fSMarc Zyngier 1232e8137f4fSMarc Zyngier dev_alias->dev_id = alias; 1233e8137f4fSMarc Zyngier if (pdev != dev_alias->pdev) 1234e8137f4fSMarc Zyngier dev_alias->count += its_pci_msi_vec_count(dev_alias->pdev); 1235e8137f4fSMarc Zyngier 1236e8137f4fSMarc Zyngier return 0; 1237e8137f4fSMarc Zyngier } 1238e8137f4fSMarc Zyngier 1239b48ac83dSMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 1240b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 1241b48ac83dSMarc Zyngier { 1242b48ac83dSMarc Zyngier struct pci_dev *pdev; 1243b48ac83dSMarc Zyngier struct its_node *its; 1244b48ac83dSMarc Zyngier struct its_device *its_dev; 1245e8137f4fSMarc Zyngier struct its_pci_alias dev_alias; 1246b48ac83dSMarc Zyngier 1247b48ac83dSMarc Zyngier if (!dev_is_pci(dev)) 1248b48ac83dSMarc Zyngier return -EINVAL; 1249b48ac83dSMarc Zyngier 1250b48ac83dSMarc Zyngier pdev = to_pci_dev(dev); 1251e8137f4fSMarc Zyngier dev_alias.pdev = pdev; 1252e8137f4fSMarc Zyngier dev_alias.count = nvec; 1253e8137f4fSMarc Zyngier 1254e8137f4fSMarc Zyngier pci_for_each_dma_alias(pdev, its_get_pci_alias, &dev_alias); 1255b48ac83dSMarc Zyngier its = domain->parent->host_data; 1256b48ac83dSMarc Zyngier 1257e8137f4fSMarc Zyngier its_dev = its_find_device(its, dev_alias.dev_id); 1258e8137f4fSMarc Zyngier if (its_dev) { 1259e8137f4fSMarc Zyngier /* 1260e8137f4fSMarc Zyngier * We already have seen this ID, probably through 1261e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 1262e8137f4fSMarc Zyngier * create the device. 1263e8137f4fSMarc Zyngier */ 1264e8137f4fSMarc Zyngier dev_dbg(dev, "Reusing ITT for devID %x\n", dev_alias.dev_id); 1265e8137f4fSMarc Zyngier goto out; 1266e8137f4fSMarc Zyngier } 1267b48ac83dSMarc Zyngier 1268e8137f4fSMarc Zyngier its_dev = its_create_device(its, dev_alias.dev_id, dev_alias.count); 1269b48ac83dSMarc Zyngier if (!its_dev) 1270b48ac83dSMarc Zyngier return -ENOMEM; 1271b48ac83dSMarc Zyngier 1272e8137f4fSMarc Zyngier dev_dbg(&pdev->dev, "ITT %d entries, %d bits\n", 1273e8137f4fSMarc Zyngier dev_alias.count, ilog2(dev_alias.count)); 1274e8137f4fSMarc Zyngier out: 1275b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 1276b48ac83dSMarc Zyngier info->scratchpad[1].ptr = dev; 1277b48ac83dSMarc Zyngier return 0; 1278b48ac83dSMarc Zyngier } 1279b48ac83dSMarc Zyngier 1280b48ac83dSMarc Zyngier static struct msi_domain_ops its_pci_msi_ops = { 1281b48ac83dSMarc Zyngier .msi_prepare = its_msi_prepare, 1282b48ac83dSMarc Zyngier }; 1283b48ac83dSMarc Zyngier 1284b48ac83dSMarc Zyngier static struct msi_domain_info its_pci_msi_domain_info = { 1285b48ac83dSMarc Zyngier .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | 1286b48ac83dSMarc Zyngier MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), 1287b48ac83dSMarc Zyngier .ops = &its_pci_msi_ops, 1288b48ac83dSMarc Zyngier .chip = &its_msi_irq_chip, 1289b48ac83dSMarc Zyngier }; 1290b48ac83dSMarc Zyngier 1291b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 1292b48ac83dSMarc Zyngier unsigned int virq, 1293b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 1294b48ac83dSMarc Zyngier { 1295b48ac83dSMarc Zyngier struct of_phandle_args args; 1296b48ac83dSMarc Zyngier 1297b48ac83dSMarc Zyngier args.np = domain->parent->of_node; 1298b48ac83dSMarc Zyngier args.args_count = 3; 1299b48ac83dSMarc Zyngier args.args[0] = GIC_IRQ_TYPE_LPI; 1300b48ac83dSMarc Zyngier args.args[1] = hwirq; 1301b48ac83dSMarc Zyngier args.args[2] = IRQ_TYPE_EDGE_RISING; 1302b48ac83dSMarc Zyngier 1303b48ac83dSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &args); 1304b48ac83dSMarc Zyngier } 1305b48ac83dSMarc Zyngier 1306b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 1307b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 1308b48ac83dSMarc Zyngier { 1309b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 1310b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 1311b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 1312b48ac83dSMarc Zyngier int err; 1313b48ac83dSMarc Zyngier int i; 1314b48ac83dSMarc Zyngier 1315b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1316b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 1317b48ac83dSMarc Zyngier if (err) 1318b48ac83dSMarc Zyngier return err; 1319b48ac83dSMarc Zyngier 1320b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 1321b48ac83dSMarc Zyngier if (err) 1322b48ac83dSMarc Zyngier return err; 1323b48ac83dSMarc Zyngier 1324b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 1325b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 1326b48ac83dSMarc Zyngier dev_dbg(info->scratchpad[1].ptr, "ID:%d pID:%d vID:%d\n", 1327591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 1328591e5becSMarc Zyngier (int)hwirq, virq + i); 1329b48ac83dSMarc Zyngier } 1330b48ac83dSMarc Zyngier 1331b48ac83dSMarc Zyngier return 0; 1332b48ac83dSMarc Zyngier } 1333b48ac83dSMarc Zyngier 1334aca268dfSMarc Zyngier static void its_irq_domain_activate(struct irq_domain *domain, 1335aca268dfSMarc Zyngier struct irq_data *d) 1336aca268dfSMarc Zyngier { 1337aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1338aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 1339aca268dfSMarc Zyngier 1340591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 1341591e5becSMarc Zyngier its_dev->event_map.col_map[event] = cpumask_first(cpu_online_mask); 1342591e5becSMarc Zyngier 1343aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 1344aca268dfSMarc Zyngier its_send_mapvi(its_dev, d->hwirq, event); 1345aca268dfSMarc Zyngier } 1346aca268dfSMarc Zyngier 1347aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 1348aca268dfSMarc Zyngier struct irq_data *d) 1349aca268dfSMarc Zyngier { 1350aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1351aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 1352aca268dfSMarc Zyngier 1353aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 1354aca268dfSMarc Zyngier its_send_discard(its_dev, event); 1355aca268dfSMarc Zyngier } 1356aca268dfSMarc Zyngier 1357b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 1358b48ac83dSMarc Zyngier unsigned int nr_irqs) 1359b48ac83dSMarc Zyngier { 1360b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 1361b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1362b48ac83dSMarc Zyngier int i; 1363b48ac83dSMarc Zyngier 1364b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1365b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 1366b48ac83dSMarc Zyngier virq + i); 1367aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 1368b48ac83dSMarc Zyngier 1369b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 1370591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 1371b48ac83dSMarc Zyngier 1372b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 13732da39949SMarc Zyngier irq_domain_reset_irq_data(data); 1374b48ac83dSMarc Zyngier } 1375b48ac83dSMarc Zyngier 1376b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 1377591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 1378591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 1379591e5becSMarc Zyngier its_lpi_free(&its_dev->event_map); 1380b48ac83dSMarc Zyngier 1381b48ac83dSMarc Zyngier /* Unmap device/itt */ 1382b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 1383b48ac83dSMarc Zyngier its_free_device(its_dev); 1384b48ac83dSMarc Zyngier } 1385b48ac83dSMarc Zyngier 1386b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 1387b48ac83dSMarc Zyngier } 1388b48ac83dSMarc Zyngier 1389b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 1390b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 1391b48ac83dSMarc Zyngier .free = its_irq_domain_free, 1392aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 1393aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 1394b48ac83dSMarc Zyngier }; 13954c21f3c2SMarc Zyngier 13964559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 13974559fbb3SYun Wu { 13984559fbb3SYun Wu u32 count = 1000000; /* 1s */ 13994559fbb3SYun Wu u32 val; 14004559fbb3SYun Wu 14014559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 14024559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 14034559fbb3SYun Wu return 0; 14044559fbb3SYun Wu 14054559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 14064559fbb3SYun Wu val &= ~GITS_CTLR_ENABLE; 14074559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 14084559fbb3SYun Wu 14094559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 14104559fbb3SYun Wu while (1) { 14114559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 14124559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 14134559fbb3SYun Wu return 0; 14144559fbb3SYun Wu 14154559fbb3SYun Wu count--; 14164559fbb3SYun Wu if (!count) 14174559fbb3SYun Wu return -EBUSY; 14184559fbb3SYun Wu 14194559fbb3SYun Wu cpu_relax(); 14204559fbb3SYun Wu udelay(1); 14214559fbb3SYun Wu } 14224559fbb3SYun Wu } 14234559fbb3SYun Wu 14244c21f3c2SMarc Zyngier static int its_probe(struct device_node *node, struct irq_domain *parent) 14254c21f3c2SMarc Zyngier { 14264c21f3c2SMarc Zyngier struct resource res; 14274c21f3c2SMarc Zyngier struct its_node *its; 14284c21f3c2SMarc Zyngier void __iomem *its_base; 14294c21f3c2SMarc Zyngier u32 val; 14304c21f3c2SMarc Zyngier u64 baser, tmp; 14314c21f3c2SMarc Zyngier int err; 14324c21f3c2SMarc Zyngier 14334c21f3c2SMarc Zyngier err = of_address_to_resource(node, 0, &res); 14344c21f3c2SMarc Zyngier if (err) { 14354c21f3c2SMarc Zyngier pr_warn("%s: no regs?\n", node->full_name); 14364c21f3c2SMarc Zyngier return -ENXIO; 14374c21f3c2SMarc Zyngier } 14384c21f3c2SMarc Zyngier 14394c21f3c2SMarc Zyngier its_base = ioremap(res.start, resource_size(&res)); 14404c21f3c2SMarc Zyngier if (!its_base) { 14414c21f3c2SMarc Zyngier pr_warn("%s: unable to map registers\n", node->full_name); 14424c21f3c2SMarc Zyngier return -ENOMEM; 14434c21f3c2SMarc Zyngier } 14444c21f3c2SMarc Zyngier 14454c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 14464c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 14474c21f3c2SMarc Zyngier pr_warn("%s: no ITS detected, giving up\n", node->full_name); 14484c21f3c2SMarc Zyngier err = -ENODEV; 14494c21f3c2SMarc Zyngier goto out_unmap; 14504c21f3c2SMarc Zyngier } 14514c21f3c2SMarc Zyngier 14524559fbb3SYun Wu err = its_force_quiescent(its_base); 14534559fbb3SYun Wu if (err) { 14544559fbb3SYun Wu pr_warn("%s: failed to quiesce, giving up\n", 14554559fbb3SYun Wu node->full_name); 14564559fbb3SYun Wu goto out_unmap; 14574559fbb3SYun Wu } 14584559fbb3SYun Wu 14594c21f3c2SMarc Zyngier pr_info("ITS: %s\n", node->full_name); 14604c21f3c2SMarc Zyngier 14614c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 14624c21f3c2SMarc Zyngier if (!its) { 14634c21f3c2SMarc Zyngier err = -ENOMEM; 14644c21f3c2SMarc Zyngier goto out_unmap; 14654c21f3c2SMarc Zyngier } 14664c21f3c2SMarc Zyngier 14674c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 14684c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 14694c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 14704c21f3c2SMarc Zyngier its->base = its_base; 14714c21f3c2SMarc Zyngier its->phys_base = res.start; 14724c21f3c2SMarc Zyngier its->msi_chip.of_node = node; 14734c21f3c2SMarc Zyngier its->ite_size = ((readl_relaxed(its_base + GITS_TYPER) >> 4) & 0xf) + 1; 14744c21f3c2SMarc Zyngier 14754c21f3c2SMarc Zyngier its->cmd_base = kzalloc(ITS_CMD_QUEUE_SZ, GFP_KERNEL); 14764c21f3c2SMarc Zyngier if (!its->cmd_base) { 14774c21f3c2SMarc Zyngier err = -ENOMEM; 14784c21f3c2SMarc Zyngier goto out_free_its; 14794c21f3c2SMarc Zyngier } 14804c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 14814c21f3c2SMarc Zyngier 14824c21f3c2SMarc Zyngier err = its_alloc_tables(its); 14834c21f3c2SMarc Zyngier if (err) 14844c21f3c2SMarc Zyngier goto out_free_cmd; 14854c21f3c2SMarc Zyngier 14864c21f3c2SMarc Zyngier err = its_alloc_collections(its); 14874c21f3c2SMarc Zyngier if (err) 14884c21f3c2SMarc Zyngier goto out_free_tables; 14894c21f3c2SMarc Zyngier 14904c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 14914c21f3c2SMarc Zyngier GITS_CBASER_WaWb | 14924c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 14934c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 14944c21f3c2SMarc Zyngier GITS_CBASER_VALID); 14954c21f3c2SMarc Zyngier 14964c21f3c2SMarc Zyngier writeq_relaxed(baser, its->base + GITS_CBASER); 14974c21f3c2SMarc Zyngier tmp = readq_relaxed(its->base + GITS_CBASER); 14984c21f3c2SMarc Zyngier 14994ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 1500241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 1501241a386cSMarc Zyngier /* 1502241a386cSMarc Zyngier * The HW reports non-shareable, we must 1503241a386cSMarc Zyngier * remove the cacheability attributes as 1504241a386cSMarc Zyngier * well. 1505241a386cSMarc Zyngier */ 1506241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 1507241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 1508241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 1509241a386cSMarc Zyngier writeq_relaxed(baser, its->base + GITS_CBASER); 1510241a386cSMarc Zyngier } 15114c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 15124c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 15134c21f3c2SMarc Zyngier } 15144c21f3c2SMarc Zyngier 1515241a386cSMarc Zyngier writeq_relaxed(0, its->base + GITS_CWRITER); 1516241a386cSMarc Zyngier writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR); 1517241a386cSMarc Zyngier 15184c21f3c2SMarc Zyngier if (of_property_read_bool(its->msi_chip.of_node, "msi-controller")) { 15194c21f3c2SMarc Zyngier its->domain = irq_domain_add_tree(NULL, &its_domain_ops, its); 15204c21f3c2SMarc Zyngier if (!its->domain) { 15214c21f3c2SMarc Zyngier err = -ENOMEM; 15224c21f3c2SMarc Zyngier goto out_free_tables; 15234c21f3c2SMarc Zyngier } 15244c21f3c2SMarc Zyngier 15254c21f3c2SMarc Zyngier its->domain->parent = parent; 15264c21f3c2SMarc Zyngier 15274c21f3c2SMarc Zyngier its->msi_chip.domain = pci_msi_create_irq_domain(node, 15284c21f3c2SMarc Zyngier &its_pci_msi_domain_info, 15294c21f3c2SMarc Zyngier its->domain); 15304c21f3c2SMarc Zyngier if (!its->msi_chip.domain) { 15314c21f3c2SMarc Zyngier err = -ENOMEM; 15324c21f3c2SMarc Zyngier goto out_free_domains; 15334c21f3c2SMarc Zyngier } 15344c21f3c2SMarc Zyngier 15354c21f3c2SMarc Zyngier err = of_pci_msi_chip_add(&its->msi_chip); 15364c21f3c2SMarc Zyngier if (err) 15374c21f3c2SMarc Zyngier goto out_free_domains; 15384c21f3c2SMarc Zyngier } 15394c21f3c2SMarc Zyngier 15404c21f3c2SMarc Zyngier spin_lock(&its_lock); 15414c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 15424c21f3c2SMarc Zyngier spin_unlock(&its_lock); 15434c21f3c2SMarc Zyngier 15444c21f3c2SMarc Zyngier return 0; 15454c21f3c2SMarc Zyngier 15464c21f3c2SMarc Zyngier out_free_domains: 15474c21f3c2SMarc Zyngier if (its->msi_chip.domain) 15484c21f3c2SMarc Zyngier irq_domain_remove(its->msi_chip.domain); 15494c21f3c2SMarc Zyngier if (its->domain) 15504c21f3c2SMarc Zyngier irq_domain_remove(its->domain); 15514c21f3c2SMarc Zyngier out_free_tables: 15524c21f3c2SMarc Zyngier its_free_tables(its); 15534c21f3c2SMarc Zyngier out_free_cmd: 15544c21f3c2SMarc Zyngier kfree(its->cmd_base); 15554c21f3c2SMarc Zyngier out_free_its: 15564c21f3c2SMarc Zyngier kfree(its); 15574c21f3c2SMarc Zyngier out_unmap: 15584c21f3c2SMarc Zyngier iounmap(its_base); 15594c21f3c2SMarc Zyngier pr_err("ITS: failed probing %s (%d)\n", node->full_name, err); 15604c21f3c2SMarc Zyngier return err; 15614c21f3c2SMarc Zyngier } 15624c21f3c2SMarc Zyngier 15634c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 15644c21f3c2SMarc Zyngier { 15654c21f3c2SMarc Zyngier return !!(readl_relaxed(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 15664c21f3c2SMarc Zyngier } 15674c21f3c2SMarc Zyngier 15684c21f3c2SMarc Zyngier int its_cpu_init(void) 15694c21f3c2SMarc Zyngier { 157016acae72SVladimir Murzin if (!list_empty(&its_nodes)) { 15714c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 15724c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 15734c21f3c2SMarc Zyngier return -ENXIO; 15744c21f3c2SMarc Zyngier } 15754c21f3c2SMarc Zyngier its_cpu_init_lpis(); 15764c21f3c2SMarc Zyngier its_cpu_init_collection(); 15774c21f3c2SMarc Zyngier } 15784c21f3c2SMarc Zyngier 15794c21f3c2SMarc Zyngier return 0; 15804c21f3c2SMarc Zyngier } 15814c21f3c2SMarc Zyngier 15824c21f3c2SMarc Zyngier static struct of_device_id its_device_id[] = { 15834c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 15844c21f3c2SMarc Zyngier {}, 15854c21f3c2SMarc Zyngier }; 15864c21f3c2SMarc Zyngier 15874c21f3c2SMarc Zyngier int its_init(struct device_node *node, struct rdists *rdists, 15884c21f3c2SMarc Zyngier struct irq_domain *parent_domain) 15894c21f3c2SMarc Zyngier { 15904c21f3c2SMarc Zyngier struct device_node *np; 15914c21f3c2SMarc Zyngier 15924c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 15934c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 15944c21f3c2SMarc Zyngier its_probe(np, parent_domain); 15954c21f3c2SMarc Zyngier } 15964c21f3c2SMarc Zyngier 15974c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 15984c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 15994c21f3c2SMarc Zyngier return -ENXIO; 16004c21f3c2SMarc Zyngier } 16014c21f3c2SMarc Zyngier 16024c21f3c2SMarc Zyngier gic_rdists = rdists; 16034c21f3c2SMarc Zyngier gic_root_node = node; 16044c21f3c2SMarc Zyngier 16054c21f3c2SMarc Zyngier its_alloc_lpi_tables(); 16064c21f3c2SMarc Zyngier its_lpi_init(rdists->id_bits); 16074c21f3c2SMarc Zyngier 16084c21f3c2SMarc Zyngier return 0; 16094c21f3c2SMarc Zyngier } 1610