1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2cc2d3216SMarc Zyngier /* 3d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 4cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 5cc2d3216SMarc Zyngier */ 6cc2d3216SMarc Zyngier 73f010cf1STomasz Nowicki #include <linux/acpi.h> 88d3554b8SHanjun Guo #include <linux/acpi_iort.h> 9ffedbf0cSMarc Zyngier #include <linux/bitfield.h> 10cc2d3216SMarc Zyngier #include <linux/bitmap.h> 11cc2d3216SMarc Zyngier #include <linux/cpu.h> 12c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 13cc2d3216SMarc Zyngier #include <linux/delay.h> 1444bb7e24SRobin Murphy #include <linux/dma-iommu.h> 153fb68faeSMarc Zyngier #include <linux/efi.h> 16cc2d3216SMarc Zyngier #include <linux/interrupt.h> 173f010cf1STomasz Nowicki #include <linux/irqdomain.h> 18880cb3cdSMarc Zyngier #include <linux/list.h> 19cc2d3216SMarc Zyngier #include <linux/log2.h> 205e2c9f9aSMarc Zyngier #include <linux/memblock.h> 21cc2d3216SMarc Zyngier #include <linux/mm.h> 22cc2d3216SMarc Zyngier #include <linux/msi.h> 23cc2d3216SMarc Zyngier #include <linux/of.h> 24cc2d3216SMarc Zyngier #include <linux/of_address.h> 25cc2d3216SMarc Zyngier #include <linux/of_irq.h> 26cc2d3216SMarc Zyngier #include <linux/of_pci.h> 27cc2d3216SMarc Zyngier #include <linux/of_platform.h> 28cc2d3216SMarc Zyngier #include <linux/percpu.h> 29cc2d3216SMarc Zyngier #include <linux/slab.h> 30dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 31cc2d3216SMarc Zyngier 3241a83e06SJoel Porquet #include <linux/irqchip.h> 33cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 34c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 35cc2d3216SMarc Zyngier 36cc2d3216SMarc Zyngier #include <asm/cputype.h> 37cc2d3216SMarc Zyngier #include <asm/exception.h> 38cc2d3216SMarc Zyngier 3967510ccaSRobert Richter #include "irq-gic-common.h" 4067510ccaSRobert Richter 4194100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4294100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 43fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 44dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 45cc2d3216SMarc Zyngier 46c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 47c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 48c48ed51cSMarc Zyngier 49a13b0404SMarc Zyngier static u32 lpi_id_bits; 50a13b0404SMarc Zyngier 51a13b0404SMarc Zyngier /* 52a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 53a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 54a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 55a13b0404SMarc Zyngier */ 56a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 57a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 58a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 59a13b0404SMarc Zyngier 602130b789SJulien Thierry #define LPI_PROP_DEFAULT_PRIO GICD_INT_DEF_PRI 61a13b0404SMarc Zyngier 62cc2d3216SMarc Zyngier /* 63cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 64cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 65cc2d3216SMarc Zyngier * CPU. 66cc2d3216SMarc Zyngier */ 67cc2d3216SMarc Zyngier struct its_collection { 68cc2d3216SMarc Zyngier u64 target_address; 69cc2d3216SMarc Zyngier u16 col_id; 70cc2d3216SMarc Zyngier }; 71cc2d3216SMarc Zyngier 72cc2d3216SMarc Zyngier /* 739347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 749347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 75466b7d16SShanker Donthineni */ 76466b7d16SShanker Donthineni struct its_baser { 77466b7d16SShanker Donthineni void *base; 78466b7d16SShanker Donthineni u64 val; 79466b7d16SShanker Donthineni u32 order; 809347359aSShanker Donthineni u32 psz; 81466b7d16SShanker Donthineni }; 82466b7d16SShanker Donthineni 83558b0165SArd Biesheuvel struct its_device; 84558b0165SArd Biesheuvel 85466b7d16SShanker Donthineni /* 86cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 87841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 88841514abSMarc Zyngier * list of devices writing to it. 899791ec7dSMarc Zyngier * 909791ec7dSMarc Zyngier * dev_alloc_lock has to be taken for device allocations, while the 919791ec7dSMarc Zyngier * spinlock must be taken to parse data structures such as the device 929791ec7dSMarc Zyngier * list. 93cc2d3216SMarc Zyngier */ 94cc2d3216SMarc Zyngier struct its_node { 95cc2d3216SMarc Zyngier raw_spinlock_t lock; 969791ec7dSMarc Zyngier struct mutex dev_alloc_lock; 97cc2d3216SMarc Zyngier struct list_head entry; 98cc2d3216SMarc Zyngier void __iomem *base; 99db40f0a7STomasz Nowicki phys_addr_t phys_base; 100cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 101cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 102466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 103cc2d3216SMarc Zyngier struct its_collection *collections; 104558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 105558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 1060dd57fedSMarc Zyngier u64 typer; 107dba0bc7bSDerek Basehore u64 cbaser_save; 108dba0bc7bSDerek Basehore u32 ctlr_save; 109cc2d3216SMarc Zyngier struct list_head its_device_list; 110cc2d3216SMarc Zyngier u64 flags; 111debf6d02SMarc Zyngier unsigned long list_nr; 112fbf8f40eSGanapatrao Kulkarni int numa_node; 113558b0165SArd Biesheuvel unsigned int msi_domain_flags; 114558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1155c9a882eSMarc Zyngier int vlpi_redist_offset; 116cc2d3216SMarc Zyngier }; 117cc2d3216SMarc Zyngier 1180dd57fedSMarc Zyngier #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) 119576a8342SMarc Zyngier #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) 1200dd57fedSMarc Zyngier 121cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 122cc2d3216SMarc Zyngier 12332bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 12432bd44dcSShanker Donthineni #define ITS_MAX_VPEID_BITS (16) 12532bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 12632bd44dcSShanker Donthineni 1272eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1282eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1292eca0d6cSShanker Donthineni 130591e5becSMarc Zyngier struct event_lpi_map { 131591e5becSMarc Zyngier unsigned long *lpi_map; 132591e5becSMarc Zyngier u16 *col_map; 133591e5becSMarc Zyngier irq_hw_number_t lpi_base; 134591e5becSMarc Zyngier int nr_lpis; 135d011e4e6SMarc Zyngier struct mutex vlpi_lock; 136d011e4e6SMarc Zyngier struct its_vm *vm; 137d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 138d011e4e6SMarc Zyngier int nr_vlpis; 139591e5becSMarc Zyngier }; 140591e5becSMarc Zyngier 141cc2d3216SMarc Zyngier /* 142d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 143d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 144d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 145d011e4e6SMarc Zyngier * indicates which one. 146cc2d3216SMarc Zyngier */ 147cc2d3216SMarc Zyngier struct its_device { 148cc2d3216SMarc Zyngier struct list_head entry; 149cc2d3216SMarc Zyngier struct its_node *its; 150591e5becSMarc Zyngier struct event_lpi_map event_map; 151cc2d3216SMarc Zyngier void *itt; 152cc2d3216SMarc Zyngier u32 nr_ites; 153cc2d3216SMarc Zyngier u32 device_id; 1549791ec7dSMarc Zyngier bool shared; 155cc2d3216SMarc Zyngier }; 156cc2d3216SMarc Zyngier 15720b3d54eSMarc Zyngier static struct { 15820b3d54eSMarc Zyngier raw_spinlock_t lock; 15920b3d54eSMarc Zyngier struct its_device *dev; 16020b3d54eSMarc Zyngier struct its_vpe **vpes; 16120b3d54eSMarc Zyngier int next_victim; 16220b3d54eSMarc Zyngier } vpe_proxy; 16320b3d54eSMarc Zyngier 1641ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 165a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1661ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 167db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1681ac19ca6SMarc Zyngier 1693dfa576bSMarc Zyngier static unsigned long its_list_map; 1703171a47aSMarc Zyngier static u16 vmovp_seq_num; 1713171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1723171a47aSMarc Zyngier 1737d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1743dfa576bSMarc Zyngier 1751ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 17611e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1771ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 178e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1791ac19ca6SMarc Zyngier 18084243125SZenghui Yu static u16 get_its_list(struct its_vm *vm) 18184243125SZenghui Yu { 18284243125SZenghui Yu struct its_node *its; 18384243125SZenghui Yu unsigned long its_list = 0; 18484243125SZenghui Yu 18584243125SZenghui Yu list_for_each_entry(its, &its_nodes, entry) { 1860dd57fedSMarc Zyngier if (!is_v4(its)) 18784243125SZenghui Yu continue; 18884243125SZenghui Yu 18984243125SZenghui Yu if (vm->vlpi_count[its->list_nr]) 19084243125SZenghui Yu __set_bit(its->list_nr, &its_list); 19184243125SZenghui Yu } 19284243125SZenghui Yu 19384243125SZenghui Yu return (u16)its_list; 19484243125SZenghui Yu } 19584243125SZenghui Yu 196425c09beSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 197425c09beSMarc Zyngier { 198425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 199425c09beSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 200425c09beSMarc Zyngier } 201425c09beSMarc Zyngier 202591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 203591e5becSMarc Zyngier u32 event) 204591e5becSMarc Zyngier { 205591e5becSMarc Zyngier struct its_node *its = its_dev->its; 206591e5becSMarc Zyngier 207591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 208591e5becSMarc Zyngier } 209591e5becSMarc Zyngier 210425c09beSMarc Zyngier static struct its_collection *irq_to_col(struct irq_data *d) 211425c09beSMarc Zyngier { 212425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 213425c09beSMarc Zyngier 214425c09beSMarc Zyngier return dev_event_to_col(its_dev, its_get_event_id(d)); 215425c09beSMarc Zyngier } 216425c09beSMarc Zyngier 21783559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 21883559b47SMarc Zyngier { 21920faba84SJoe Perches if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(15, 0))) 22083559b47SMarc Zyngier return NULL; 22183559b47SMarc Zyngier 22283559b47SMarc Zyngier return col; 22383559b47SMarc Zyngier } 22483559b47SMarc Zyngier 225205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 226205e065dSMarc Zyngier { 227205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 228205e065dSMarc Zyngier return vpe; 229205e065dSMarc Zyngier 230205e065dSMarc Zyngier return NULL; 231205e065dSMarc Zyngier } 232205e065dSMarc Zyngier 233cc2d3216SMarc Zyngier /* 234cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 235cc2d3216SMarc Zyngier * block. 236cc2d3216SMarc Zyngier */ 237cc2d3216SMarc Zyngier struct its_cmd_desc { 238cc2d3216SMarc Zyngier union { 239cc2d3216SMarc Zyngier struct { 240cc2d3216SMarc Zyngier struct its_device *dev; 241cc2d3216SMarc Zyngier u32 event_id; 242cc2d3216SMarc Zyngier } its_inv_cmd; 243cc2d3216SMarc Zyngier 244cc2d3216SMarc Zyngier struct { 245cc2d3216SMarc Zyngier struct its_device *dev; 246cc2d3216SMarc Zyngier u32 event_id; 2478d85dcedSMarc Zyngier } its_clear_cmd; 2488d85dcedSMarc Zyngier 2498d85dcedSMarc Zyngier struct { 2508d85dcedSMarc Zyngier struct its_device *dev; 2518d85dcedSMarc Zyngier u32 event_id; 252cc2d3216SMarc Zyngier } its_int_cmd; 253cc2d3216SMarc Zyngier 254cc2d3216SMarc Zyngier struct { 255cc2d3216SMarc Zyngier struct its_device *dev; 256cc2d3216SMarc Zyngier int valid; 257cc2d3216SMarc Zyngier } its_mapd_cmd; 258cc2d3216SMarc Zyngier 259cc2d3216SMarc Zyngier struct { 260cc2d3216SMarc Zyngier struct its_collection *col; 261cc2d3216SMarc Zyngier int valid; 262cc2d3216SMarc Zyngier } its_mapc_cmd; 263cc2d3216SMarc Zyngier 264cc2d3216SMarc Zyngier struct { 265cc2d3216SMarc Zyngier struct its_device *dev; 266cc2d3216SMarc Zyngier u32 phys_id; 267cc2d3216SMarc Zyngier u32 event_id; 2686a25ad3aSMarc Zyngier } its_mapti_cmd; 269cc2d3216SMarc Zyngier 270cc2d3216SMarc Zyngier struct { 271cc2d3216SMarc Zyngier struct its_device *dev; 272cc2d3216SMarc Zyngier struct its_collection *col; 273591e5becSMarc Zyngier u32 event_id; 274cc2d3216SMarc Zyngier } its_movi_cmd; 275cc2d3216SMarc Zyngier 276cc2d3216SMarc Zyngier struct { 277cc2d3216SMarc Zyngier struct its_device *dev; 278cc2d3216SMarc Zyngier u32 event_id; 279cc2d3216SMarc Zyngier } its_discard_cmd; 280cc2d3216SMarc Zyngier 281cc2d3216SMarc Zyngier struct { 282cc2d3216SMarc Zyngier struct its_collection *col; 283cc2d3216SMarc Zyngier } its_invall_cmd; 284d011e4e6SMarc Zyngier 285d011e4e6SMarc Zyngier struct { 286d011e4e6SMarc Zyngier struct its_vpe *vpe; 287eb78192bSMarc Zyngier } its_vinvall_cmd; 288eb78192bSMarc Zyngier 289eb78192bSMarc Zyngier struct { 290eb78192bSMarc Zyngier struct its_vpe *vpe; 291eb78192bSMarc Zyngier struct its_collection *col; 292eb78192bSMarc Zyngier bool valid; 293eb78192bSMarc Zyngier } its_vmapp_cmd; 294eb78192bSMarc Zyngier 295eb78192bSMarc Zyngier struct { 296eb78192bSMarc Zyngier struct its_vpe *vpe; 297d011e4e6SMarc Zyngier struct its_device *dev; 298d011e4e6SMarc Zyngier u32 virt_id; 299d011e4e6SMarc Zyngier u32 event_id; 300d011e4e6SMarc Zyngier bool db_enabled; 301d011e4e6SMarc Zyngier } its_vmapti_cmd; 302d011e4e6SMarc Zyngier 303d011e4e6SMarc Zyngier struct { 304d011e4e6SMarc Zyngier struct its_vpe *vpe; 305d011e4e6SMarc Zyngier struct its_device *dev; 306d011e4e6SMarc Zyngier u32 event_id; 307d011e4e6SMarc Zyngier bool db_enabled; 308d011e4e6SMarc Zyngier } its_vmovi_cmd; 3093171a47aSMarc Zyngier 3103171a47aSMarc Zyngier struct { 3113171a47aSMarc Zyngier struct its_vpe *vpe; 3123171a47aSMarc Zyngier struct its_collection *col; 3133171a47aSMarc Zyngier u16 seq_num; 3143171a47aSMarc Zyngier u16 its_list; 3153171a47aSMarc Zyngier } its_vmovp_cmd; 316cc2d3216SMarc Zyngier }; 317cc2d3216SMarc Zyngier }; 318cc2d3216SMarc Zyngier 319cc2d3216SMarc Zyngier /* 320cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 321cc2d3216SMarc Zyngier */ 322cc2d3216SMarc Zyngier struct its_cmd_block { 3232bbdfcc5SBen Dooks (Codethink) union { 324cc2d3216SMarc Zyngier u64 raw_cmd[4]; 3252bbdfcc5SBen Dooks (Codethink) __le64 raw_cmd_le[4]; 3262bbdfcc5SBen Dooks (Codethink) }; 327cc2d3216SMarc Zyngier }; 328cc2d3216SMarc Zyngier 329cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 330cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 331cc2d3216SMarc Zyngier 33267047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 33367047f90SMarc Zyngier struct its_cmd_block *, 334cc2d3216SMarc Zyngier struct its_cmd_desc *); 335cc2d3216SMarc Zyngier 33667047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 33767047f90SMarc Zyngier struct its_cmd_block *, 338d011e4e6SMarc Zyngier struct its_cmd_desc *); 339d011e4e6SMarc Zyngier 3404d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 3414d36f136SMarc Zyngier { 3424d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 3434d36f136SMarc Zyngier *raw_cmd &= ~mask; 3444d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 3454d36f136SMarc Zyngier } 3464d36f136SMarc Zyngier 347cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 348cc2d3216SMarc Zyngier { 3494d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 350cc2d3216SMarc Zyngier } 351cc2d3216SMarc Zyngier 352cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 353cc2d3216SMarc Zyngier { 3544d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 355cc2d3216SMarc Zyngier } 356cc2d3216SMarc Zyngier 357cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 358cc2d3216SMarc Zyngier { 3594d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 360cc2d3216SMarc Zyngier } 361cc2d3216SMarc Zyngier 362cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 363cc2d3216SMarc Zyngier { 3644d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 365cc2d3216SMarc Zyngier } 366cc2d3216SMarc Zyngier 367cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 368cc2d3216SMarc Zyngier { 3694d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 370cc2d3216SMarc Zyngier } 371cc2d3216SMarc Zyngier 372cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 373cc2d3216SMarc Zyngier { 37430ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 375cc2d3216SMarc Zyngier } 376cc2d3216SMarc Zyngier 377cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 378cc2d3216SMarc Zyngier { 3794d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 380cc2d3216SMarc Zyngier } 381cc2d3216SMarc Zyngier 382cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 383cc2d3216SMarc Zyngier { 38430ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 385cc2d3216SMarc Zyngier } 386cc2d3216SMarc Zyngier 387cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 388cc2d3216SMarc Zyngier { 3894d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 390cc2d3216SMarc Zyngier } 391cc2d3216SMarc Zyngier 392d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 393d011e4e6SMarc Zyngier { 394d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 395d011e4e6SMarc Zyngier } 396d011e4e6SMarc Zyngier 397d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 398d011e4e6SMarc Zyngier { 399d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 400d011e4e6SMarc Zyngier } 401d011e4e6SMarc Zyngier 402d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 403d011e4e6SMarc Zyngier { 404d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 405d011e4e6SMarc Zyngier } 406d011e4e6SMarc Zyngier 407d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 408d011e4e6SMarc Zyngier { 409d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 410d011e4e6SMarc Zyngier } 411d011e4e6SMarc Zyngier 4123171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 4133171a47aSMarc Zyngier { 4143171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 4153171a47aSMarc Zyngier } 4163171a47aSMarc Zyngier 4173171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 4183171a47aSMarc Zyngier { 4193171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 4203171a47aSMarc Zyngier } 4213171a47aSMarc Zyngier 422eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 423eb78192bSMarc Zyngier { 42430ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 425eb78192bSMarc Zyngier } 426eb78192bSMarc Zyngier 427eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 428eb78192bSMarc Zyngier { 429eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 430eb78192bSMarc Zyngier } 431eb78192bSMarc Zyngier 432cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 433cc2d3216SMarc Zyngier { 434cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 4352bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[0] = cpu_to_le64(cmd->raw_cmd[0]); 4362bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[1] = cpu_to_le64(cmd->raw_cmd[1]); 4372bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[2] = cpu_to_le64(cmd->raw_cmd[2]); 4382bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[3] = cpu_to_le64(cmd->raw_cmd[3]); 439cc2d3216SMarc Zyngier } 440cc2d3216SMarc Zyngier 44167047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 44267047f90SMarc Zyngier struct its_cmd_block *cmd, 443cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 444cc2d3216SMarc Zyngier { 445cc2d3216SMarc Zyngier unsigned long itt_addr; 446c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 447cc2d3216SMarc Zyngier 448cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 449cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 450cc2d3216SMarc Zyngier 451cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 452cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 453cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 454cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 455cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 456cc2d3216SMarc Zyngier 457cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 458cc2d3216SMarc Zyngier 459591e5becSMarc Zyngier return NULL; 460cc2d3216SMarc Zyngier } 461cc2d3216SMarc Zyngier 46267047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 46367047f90SMarc Zyngier struct its_cmd_block *cmd, 464cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 465cc2d3216SMarc Zyngier { 466cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 467cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 468cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 469cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 470cc2d3216SMarc Zyngier 471cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 472cc2d3216SMarc Zyngier 473cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 474cc2d3216SMarc Zyngier } 475cc2d3216SMarc Zyngier 47667047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 47767047f90SMarc Zyngier struct its_cmd_block *cmd, 478cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 479cc2d3216SMarc Zyngier { 480591e5becSMarc Zyngier struct its_collection *col; 481591e5becSMarc Zyngier 4826a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 4836a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 484591e5becSMarc Zyngier 4856a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 4866a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 4876a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 4886a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 489591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 490cc2d3216SMarc Zyngier 491cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 492cc2d3216SMarc Zyngier 49383559b47SMarc Zyngier return valid_col(col); 494cc2d3216SMarc Zyngier } 495cc2d3216SMarc Zyngier 49667047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 49767047f90SMarc Zyngier struct its_cmd_block *cmd, 498cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 499cc2d3216SMarc Zyngier { 500591e5becSMarc Zyngier struct its_collection *col; 501591e5becSMarc Zyngier 502591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 503591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 504591e5becSMarc Zyngier 505cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 506cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 507591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 508cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 509cc2d3216SMarc Zyngier 510cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 511cc2d3216SMarc Zyngier 51283559b47SMarc Zyngier return valid_col(col); 513cc2d3216SMarc Zyngier } 514cc2d3216SMarc Zyngier 51567047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 51667047f90SMarc Zyngier struct its_cmd_block *cmd, 517cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 518cc2d3216SMarc Zyngier { 519591e5becSMarc Zyngier struct its_collection *col; 520591e5becSMarc Zyngier 521591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 522591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 523591e5becSMarc Zyngier 524cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 525cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 526cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 527cc2d3216SMarc Zyngier 528cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 529cc2d3216SMarc Zyngier 53083559b47SMarc Zyngier return valid_col(col); 531cc2d3216SMarc Zyngier } 532cc2d3216SMarc Zyngier 53367047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 53467047f90SMarc Zyngier struct its_cmd_block *cmd, 535cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 536cc2d3216SMarc Zyngier { 537591e5becSMarc Zyngier struct its_collection *col; 538591e5becSMarc Zyngier 539591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 540591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 541591e5becSMarc Zyngier 542cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 543cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 544cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 545cc2d3216SMarc Zyngier 546cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 547cc2d3216SMarc Zyngier 54883559b47SMarc Zyngier return valid_col(col); 549cc2d3216SMarc Zyngier } 550cc2d3216SMarc Zyngier 55167047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 55267047f90SMarc Zyngier struct its_cmd_block *cmd, 5538d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5548d85dcedSMarc Zyngier { 5558d85dcedSMarc Zyngier struct its_collection *col; 5568d85dcedSMarc Zyngier 5578d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 5588d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 5598d85dcedSMarc Zyngier 5608d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 5618d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 5628d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 5638d85dcedSMarc Zyngier 5648d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5658d85dcedSMarc Zyngier 56683559b47SMarc Zyngier return valid_col(col); 5678d85dcedSMarc Zyngier } 5688d85dcedSMarc Zyngier 56967047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 57067047f90SMarc Zyngier struct its_cmd_block *cmd, 5718d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5728d85dcedSMarc Zyngier { 5738d85dcedSMarc Zyngier struct its_collection *col; 5748d85dcedSMarc Zyngier 5758d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 5768d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 5778d85dcedSMarc Zyngier 5788d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 5798d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 5808d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 5818d85dcedSMarc Zyngier 5828d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5838d85dcedSMarc Zyngier 58483559b47SMarc Zyngier return valid_col(col); 5858d85dcedSMarc Zyngier } 5868d85dcedSMarc Zyngier 58767047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 58867047f90SMarc Zyngier struct its_cmd_block *cmd, 589cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 590cc2d3216SMarc Zyngier { 591cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 592cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 593cc2d3216SMarc Zyngier 594cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 595cc2d3216SMarc Zyngier 596cc2d3216SMarc Zyngier return NULL; 597cc2d3216SMarc Zyngier } 598cc2d3216SMarc Zyngier 59967047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 60067047f90SMarc Zyngier struct its_cmd_block *cmd, 601eb78192bSMarc Zyngier struct its_cmd_desc *desc) 602eb78192bSMarc Zyngier { 603eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 604eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 605eb78192bSMarc Zyngier 606eb78192bSMarc Zyngier its_fixup_cmd(cmd); 607eb78192bSMarc Zyngier 608205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 609eb78192bSMarc Zyngier } 610eb78192bSMarc Zyngier 61167047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 61267047f90SMarc Zyngier struct its_cmd_block *cmd, 613eb78192bSMarc Zyngier struct its_cmd_desc *desc) 614eb78192bSMarc Zyngier { 615eb78192bSMarc Zyngier unsigned long vpt_addr; 6165c9a882eSMarc Zyngier u64 target; 617eb78192bSMarc Zyngier 618eb78192bSMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 6195c9a882eSMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 620eb78192bSMarc Zyngier 621eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 622eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 623eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 6245c9a882eSMarc Zyngier its_encode_target(cmd, target); 625eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 626eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 627eb78192bSMarc Zyngier 628eb78192bSMarc Zyngier its_fixup_cmd(cmd); 629eb78192bSMarc Zyngier 630205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 631eb78192bSMarc Zyngier } 632eb78192bSMarc Zyngier 63367047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 63467047f90SMarc Zyngier struct its_cmd_block *cmd, 635d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 636d011e4e6SMarc Zyngier { 637d011e4e6SMarc Zyngier u32 db; 638d011e4e6SMarc Zyngier 639d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 640d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 641d011e4e6SMarc Zyngier else 642d011e4e6SMarc Zyngier db = 1023; 643d011e4e6SMarc Zyngier 644d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 645d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 646d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 647d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 648d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 649d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 650d011e4e6SMarc Zyngier 651d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 652d011e4e6SMarc Zyngier 653205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 654d011e4e6SMarc Zyngier } 655d011e4e6SMarc Zyngier 65667047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 65767047f90SMarc Zyngier struct its_cmd_block *cmd, 658d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 659d011e4e6SMarc Zyngier { 660d011e4e6SMarc Zyngier u32 db; 661d011e4e6SMarc Zyngier 662d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 663d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 664d011e4e6SMarc Zyngier else 665d011e4e6SMarc Zyngier db = 1023; 666d011e4e6SMarc Zyngier 667d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 668d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 669d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 670d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 671d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 672d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 673d011e4e6SMarc Zyngier 674d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 675d011e4e6SMarc Zyngier 676205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 677d011e4e6SMarc Zyngier } 678d011e4e6SMarc Zyngier 67967047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 68067047f90SMarc Zyngier struct its_cmd_block *cmd, 6813171a47aSMarc Zyngier struct its_cmd_desc *desc) 6823171a47aSMarc Zyngier { 6835c9a882eSMarc Zyngier u64 target; 6845c9a882eSMarc Zyngier 6855c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 6863171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 6873171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 6883171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 6893171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 6905c9a882eSMarc Zyngier its_encode_target(cmd, target); 6913171a47aSMarc Zyngier 6923171a47aSMarc Zyngier its_fixup_cmd(cmd); 6933171a47aSMarc Zyngier 694205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 6953171a47aSMarc Zyngier } 6963171a47aSMarc Zyngier 697cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 698cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 699cc2d3216SMarc Zyngier { 700cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 701cc2d3216SMarc Zyngier } 702cc2d3216SMarc Zyngier 703cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 704cc2d3216SMarc Zyngier { 705cc2d3216SMarc Zyngier int widx; 706cc2d3216SMarc Zyngier int ridx; 707cc2d3216SMarc Zyngier 708cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 709cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 710cc2d3216SMarc Zyngier 711cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 712cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 713cc2d3216SMarc Zyngier return 1; 714cc2d3216SMarc Zyngier 715cc2d3216SMarc Zyngier return 0; 716cc2d3216SMarc Zyngier } 717cc2d3216SMarc Zyngier 718cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 719cc2d3216SMarc Zyngier { 720cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 721cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 722cc2d3216SMarc Zyngier 723cc2d3216SMarc Zyngier while (its_queue_full(its)) { 724cc2d3216SMarc Zyngier count--; 725cc2d3216SMarc Zyngier if (!count) { 726cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 727cc2d3216SMarc Zyngier return NULL; 728cc2d3216SMarc Zyngier } 729cc2d3216SMarc Zyngier cpu_relax(); 730cc2d3216SMarc Zyngier udelay(1); 731cc2d3216SMarc Zyngier } 732cc2d3216SMarc Zyngier 733cc2d3216SMarc Zyngier cmd = its->cmd_write++; 734cc2d3216SMarc Zyngier 735cc2d3216SMarc Zyngier /* Handle queue wrapping */ 736cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 737cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 738cc2d3216SMarc Zyngier 73934d677a9SMarc Zyngier /* Clear command */ 74034d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 74134d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 74234d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 74334d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 74434d677a9SMarc Zyngier 745cc2d3216SMarc Zyngier return cmd; 746cc2d3216SMarc Zyngier } 747cc2d3216SMarc Zyngier 748cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 749cc2d3216SMarc Zyngier { 750cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 751cc2d3216SMarc Zyngier 752cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 753cc2d3216SMarc Zyngier 754cc2d3216SMarc Zyngier return its->cmd_write; 755cc2d3216SMarc Zyngier } 756cc2d3216SMarc Zyngier 757cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 758cc2d3216SMarc Zyngier { 759cc2d3216SMarc Zyngier /* 760cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 761cc2d3216SMarc Zyngier * the ITS. 762cc2d3216SMarc Zyngier */ 763cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 764328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 765cc2d3216SMarc Zyngier else 766cc2d3216SMarc Zyngier dsb(ishst); 767cc2d3216SMarc Zyngier } 768cc2d3216SMarc Zyngier 769a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 770a050fa54SHeyi Guo u64 prev_idx, 771cc2d3216SMarc Zyngier struct its_cmd_block *to) 772cc2d3216SMarc Zyngier { 773a050fa54SHeyi Guo u64 rd_idx, to_idx, linear_idx; 774cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 775cc2d3216SMarc Zyngier 776a050fa54SHeyi Guo /* Linearize to_idx if the command set has wrapped around */ 777cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 778a050fa54SHeyi Guo if (to_idx < prev_idx) 779a050fa54SHeyi Guo to_idx += ITS_CMD_QUEUE_SZ; 780a050fa54SHeyi Guo 781a050fa54SHeyi Guo linear_idx = prev_idx; 782cc2d3216SMarc Zyngier 783cc2d3216SMarc Zyngier while (1) { 784a050fa54SHeyi Guo s64 delta; 785a050fa54SHeyi Guo 786cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 7879bdd8b1cSMarc Zyngier 788a050fa54SHeyi Guo /* 789a050fa54SHeyi Guo * Compute the read pointer progress, taking the 790a050fa54SHeyi Guo * potential wrap-around into account. 791a050fa54SHeyi Guo */ 792a050fa54SHeyi Guo delta = rd_idx - prev_idx; 793a050fa54SHeyi Guo if (rd_idx < prev_idx) 794a050fa54SHeyi Guo delta += ITS_CMD_QUEUE_SZ; 7959bdd8b1cSMarc Zyngier 796a050fa54SHeyi Guo linear_idx += delta; 797a050fa54SHeyi Guo if (linear_idx >= to_idx) 798cc2d3216SMarc Zyngier break; 799cc2d3216SMarc Zyngier 800cc2d3216SMarc Zyngier count--; 801cc2d3216SMarc Zyngier if (!count) { 802a050fa54SHeyi Guo pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", 803a050fa54SHeyi Guo to_idx, linear_idx); 804a19b462fSMarc Zyngier return -1; 805cc2d3216SMarc Zyngier } 806a050fa54SHeyi Guo prev_idx = rd_idx; 807cc2d3216SMarc Zyngier cpu_relax(); 808cc2d3216SMarc Zyngier udelay(1); 809cc2d3216SMarc Zyngier } 810a19b462fSMarc Zyngier 811a19b462fSMarc Zyngier return 0; 812cc2d3216SMarc Zyngier } 813cc2d3216SMarc Zyngier 814e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 815e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 816e4f9094bSMarc Zyngier void name(struct its_node *its, \ 817e4f9094bSMarc Zyngier buildtype builder, \ 818e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 819e4f9094bSMarc Zyngier { \ 820e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 821e4f9094bSMarc Zyngier synctype *sync_obj; \ 822e4f9094bSMarc Zyngier unsigned long flags; \ 823a050fa54SHeyi Guo u64 rd_idx; \ 824e4f9094bSMarc Zyngier \ 825e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 826e4f9094bSMarc Zyngier \ 827e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 828e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 829e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 830e4f9094bSMarc Zyngier return; \ 831e4f9094bSMarc Zyngier } \ 83267047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 833e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 834e4f9094bSMarc Zyngier \ 835e4f9094bSMarc Zyngier if (sync_obj) { \ 836e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 837e4f9094bSMarc Zyngier if (!sync_cmd) \ 838e4f9094bSMarc Zyngier goto post; \ 839e4f9094bSMarc Zyngier \ 84067047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 841e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 842e4f9094bSMarc Zyngier } \ 843e4f9094bSMarc Zyngier \ 844e4f9094bSMarc Zyngier post: \ 845a050fa54SHeyi Guo rd_idx = readl_relaxed(its->base + GITS_CREADR); \ 846e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 847e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 848e4f9094bSMarc Zyngier \ 849a050fa54SHeyi Guo if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \ 850a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 851e4f9094bSMarc Zyngier } 852e4f9094bSMarc Zyngier 85367047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 85467047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 855e4f9094bSMarc Zyngier struct its_collection *sync_col) 856cc2d3216SMarc Zyngier { 857cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 858cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 859e4f9094bSMarc Zyngier 860cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 861cc2d3216SMarc Zyngier } 862cc2d3216SMarc Zyngier 863e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 864e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 865cc2d3216SMarc Zyngier 86667047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 86767047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 868d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 869d011e4e6SMarc Zyngier { 870d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 871d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 872d011e4e6SMarc Zyngier 873d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 874d011e4e6SMarc Zyngier } 875d011e4e6SMarc Zyngier 876d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 877d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 878d011e4e6SMarc Zyngier 8798d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 8808d85dcedSMarc Zyngier { 8818d85dcedSMarc Zyngier struct its_cmd_desc desc; 8828d85dcedSMarc Zyngier 8838d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 8848d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 8858d85dcedSMarc Zyngier 8868d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 8878d85dcedSMarc Zyngier } 8888d85dcedSMarc Zyngier 8898d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 8908d85dcedSMarc Zyngier { 8918d85dcedSMarc Zyngier struct its_cmd_desc desc; 8928d85dcedSMarc Zyngier 8938d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 8948d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 8958d85dcedSMarc Zyngier 8968d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 897cc2d3216SMarc Zyngier } 898cc2d3216SMarc Zyngier 899cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 900cc2d3216SMarc Zyngier { 901cc2d3216SMarc Zyngier struct its_cmd_desc desc; 902cc2d3216SMarc Zyngier 903cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 904cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 905cc2d3216SMarc Zyngier 906cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 907cc2d3216SMarc Zyngier } 908cc2d3216SMarc Zyngier 909cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 910cc2d3216SMarc Zyngier { 911cc2d3216SMarc Zyngier struct its_cmd_desc desc; 912cc2d3216SMarc Zyngier 913cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 914cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 915cc2d3216SMarc Zyngier 916cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 917cc2d3216SMarc Zyngier } 918cc2d3216SMarc Zyngier 919cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 920cc2d3216SMarc Zyngier int valid) 921cc2d3216SMarc Zyngier { 922cc2d3216SMarc Zyngier struct its_cmd_desc desc; 923cc2d3216SMarc Zyngier 924cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 925cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 926cc2d3216SMarc Zyngier 927cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 928cc2d3216SMarc Zyngier } 929cc2d3216SMarc Zyngier 9306a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 931cc2d3216SMarc Zyngier { 932cc2d3216SMarc Zyngier struct its_cmd_desc desc; 933cc2d3216SMarc Zyngier 9346a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 9356a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 9366a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 937cc2d3216SMarc Zyngier 9386a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 939cc2d3216SMarc Zyngier } 940cc2d3216SMarc Zyngier 941cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 942cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 943cc2d3216SMarc Zyngier { 944cc2d3216SMarc Zyngier struct its_cmd_desc desc; 945cc2d3216SMarc Zyngier 946cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 947cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 948591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 949cc2d3216SMarc Zyngier 950cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 951cc2d3216SMarc Zyngier } 952cc2d3216SMarc Zyngier 953cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 954cc2d3216SMarc Zyngier { 955cc2d3216SMarc Zyngier struct its_cmd_desc desc; 956cc2d3216SMarc Zyngier 957cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 958cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 959cc2d3216SMarc Zyngier 960cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 961cc2d3216SMarc Zyngier } 962cc2d3216SMarc Zyngier 963cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 964cc2d3216SMarc Zyngier { 965cc2d3216SMarc Zyngier struct its_cmd_desc desc; 966cc2d3216SMarc Zyngier 967cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 968cc2d3216SMarc Zyngier 969cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 970cc2d3216SMarc Zyngier } 971c48ed51cSMarc Zyngier 972d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 973d011e4e6SMarc Zyngier { 974d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 975d011e4e6SMarc Zyngier struct its_cmd_desc desc; 976d011e4e6SMarc Zyngier 977d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 978d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 979d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 980d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 981d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 982d011e4e6SMarc Zyngier 983d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 984d011e4e6SMarc Zyngier } 985d011e4e6SMarc Zyngier 986d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 987d011e4e6SMarc Zyngier { 988d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 989d011e4e6SMarc Zyngier struct its_cmd_desc desc; 990d011e4e6SMarc Zyngier 991d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 992d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 993d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 994d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 995d011e4e6SMarc Zyngier 996d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 997d011e4e6SMarc Zyngier } 998d011e4e6SMarc Zyngier 99975fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 100075fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 1001eb78192bSMarc Zyngier { 1002eb78192bSMarc Zyngier struct its_cmd_desc desc; 1003eb78192bSMarc Zyngier 1004eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 1005eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 1006eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 100775fd951bSMarc Zyngier 1008eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 1009eb78192bSMarc Zyngier } 1010eb78192bSMarc Zyngier 10113171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 10123171a47aSMarc Zyngier { 101384243125SZenghui Yu struct its_cmd_desc desc = {}; 10143171a47aSMarc Zyngier struct its_node *its; 10153171a47aSMarc Zyngier unsigned long flags; 10163171a47aSMarc Zyngier int col_id = vpe->col_idx; 10173171a47aSMarc Zyngier 10183171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 10193171a47aSMarc Zyngier 10203171a47aSMarc Zyngier if (!its_list_map) { 10213171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 10223171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 10233171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 10243171a47aSMarc Zyngier return; 10253171a47aSMarc Zyngier } 10263171a47aSMarc Zyngier 10273171a47aSMarc Zyngier /* 10283171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 10293171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 10303171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 10313171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 10323171a47aSMarc Zyngier * 10333171a47aSMarc Zyngier * Wall <-- Head. 10343171a47aSMarc Zyngier */ 10353171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 10363171a47aSMarc Zyngier 10373171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 103884243125SZenghui Yu desc.its_vmovp_cmd.its_list = get_its_list(vpe->its_vm); 10393171a47aSMarc Zyngier 10403171a47aSMarc Zyngier /* Emit VMOVPs */ 10413171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 10420dd57fedSMarc Zyngier if (!is_v4(its)) 10433171a47aSMarc Zyngier continue; 10443171a47aSMarc Zyngier 10452247e1bfSMarc Zyngier if (!vpe->its_vm->vlpi_count[its->list_nr]) 10462247e1bfSMarc Zyngier continue; 10472247e1bfSMarc Zyngier 10483171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 10493171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 10503171a47aSMarc Zyngier } 10513171a47aSMarc Zyngier 10523171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 10533171a47aSMarc Zyngier } 10543171a47aSMarc Zyngier 105540619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1056eb78192bSMarc Zyngier { 1057eb78192bSMarc Zyngier struct its_cmd_desc desc; 1058eb78192bSMarc Zyngier 1059eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1060eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1061eb78192bSMarc Zyngier } 1062eb78192bSMarc Zyngier 1063c48ed51cSMarc Zyngier /* 1064c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1065c48ed51cSMarc Zyngier */ 1066c48ed51cSMarc Zyngier 1067015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1068c48ed51cSMarc Zyngier { 1069015ec038SMarc Zyngier irq_hw_number_t hwirq; 1070e1a2e201SMarc Zyngier void *va; 1071adcdb94eSMarc Zyngier u8 *cfg; 1072c48ed51cSMarc Zyngier 1073015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1074015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1075015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1076d4d7b4adSMarc Zyngier struct its_vlpi_map *map; 1077015ec038SMarc Zyngier 1078e1a2e201SMarc Zyngier va = page_address(its_dev->event_map.vm->vprop_page); 1079d4d7b4adSMarc Zyngier map = &its_dev->event_map.vlpi_maps[event]; 1080d4d7b4adSMarc Zyngier hwirq = map->vintid; 1081d4d7b4adSMarc Zyngier 1082d4d7b4adSMarc Zyngier /* Remember the updated property */ 1083d4d7b4adSMarc Zyngier map->properties &= ~clr; 1084d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1085015ec038SMarc Zyngier } else { 1086e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1087015ec038SMarc Zyngier hwirq = d->hwirq; 1088015ec038SMarc Zyngier } 1089adcdb94eSMarc Zyngier 1090e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1091adcdb94eSMarc Zyngier *cfg &= ~clr; 1092015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1093c48ed51cSMarc Zyngier 1094c48ed51cSMarc Zyngier /* 1095c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1096c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1097c48ed51cSMarc Zyngier * Humpf... 1098c48ed51cSMarc Zyngier */ 1099c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1100328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1101c48ed51cSMarc Zyngier else 1102c48ed51cSMarc Zyngier dsb(ishst); 1103015ec038SMarc Zyngier } 1104015ec038SMarc Zyngier 11052f4f064bSMarc Zyngier static void wait_for_syncr(void __iomem *rdbase) 11062f4f064bSMarc Zyngier { 11072f4f064bSMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 11082f4f064bSMarc Zyngier cpu_relax(); 11092f4f064bSMarc Zyngier } 11102f4f064bSMarc Zyngier 1111425c09beSMarc Zyngier static void direct_lpi_inv(struct irq_data *d) 1112425c09beSMarc Zyngier { 1113425c09beSMarc Zyngier struct its_collection *col; 1114425c09beSMarc Zyngier void __iomem *rdbase; 1115425c09beSMarc Zyngier 1116425c09beSMarc Zyngier /* Target the redistributor this LPI is currently routed to */ 1117425c09beSMarc Zyngier col = irq_to_col(d); 1118425c09beSMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, col->col_id)->rd_base; 1119425c09beSMarc Zyngier gic_write_lpir(d->hwirq, rdbase + GICR_INVLPIR); 1120425c09beSMarc Zyngier 1121425c09beSMarc Zyngier wait_for_syncr(rdbase); 1122425c09beSMarc Zyngier } 1123425c09beSMarc Zyngier 1124015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1125015ec038SMarc Zyngier { 1126015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1127015ec038SMarc Zyngier 1128015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1129425c09beSMarc Zyngier if (gic_rdists->has_direct_lpi && !irqd_is_forwarded_to_vcpu(d)) 1130425c09beSMarc Zyngier direct_lpi_inv(d); 1131425c09beSMarc Zyngier else 1132adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 1133c48ed51cSMarc Zyngier } 1134c48ed51cSMarc Zyngier 1135015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1136015ec038SMarc Zyngier { 1137015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1138015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1139015ec038SMarc Zyngier 1140015ec038SMarc Zyngier if (its_dev->event_map.vlpi_maps[event].db_enabled == enable) 1141015ec038SMarc Zyngier return; 1142015ec038SMarc Zyngier 1143015ec038SMarc Zyngier its_dev->event_map.vlpi_maps[event].db_enabled = enable; 1144015ec038SMarc Zyngier 1145015ec038SMarc Zyngier /* 1146015ec038SMarc Zyngier * More fun with the architecture: 1147015ec038SMarc Zyngier * 1148015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1149015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1150015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1151015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1152015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1153015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1154015ec038SMarc Zyngier */ 1155015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1156c48ed51cSMarc Zyngier } 1157c48ed51cSMarc Zyngier 1158c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1159c48ed51cSMarc Zyngier { 1160015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1161015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1162015ec038SMarc Zyngier 1163adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1164c48ed51cSMarc Zyngier } 1165c48ed51cSMarc Zyngier 1166c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1167c48ed51cSMarc Zyngier { 1168015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1169015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1170015ec038SMarc Zyngier 1171adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1172c48ed51cSMarc Zyngier } 1173c48ed51cSMarc Zyngier 1174c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1175c48ed51cSMarc Zyngier bool force) 1176c48ed51cSMarc Zyngier { 1177fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1178fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1179c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1180c48ed51cSMarc Zyngier struct its_collection *target_col; 1181c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1182c48ed51cSMarc Zyngier 1183015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1184015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1185015ec038SMarc Zyngier return -EINVAL; 1186015ec038SMarc Zyngier 1187fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1188fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1189fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1190fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1191fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1192fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1193fbf8f40eSGanapatrao Kulkarni } 1194fbf8f40eSGanapatrao Kulkarni } 1195fbf8f40eSGanapatrao Kulkarni 1196fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1197fbf8f40eSGanapatrao Kulkarni 1198c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1199c48ed51cSMarc Zyngier return -EINVAL; 1200c48ed51cSMarc Zyngier 12018b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 12028b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1203c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1204c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1205591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 12060d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 12078b8d94a7SMaJun } 1208c48ed51cSMarc Zyngier 1209c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1210c48ed51cSMarc Zyngier } 1211c48ed51cSMarc Zyngier 1212558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1213558b0165SArd Biesheuvel { 1214558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1215558b0165SArd Biesheuvel 1216558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1217558b0165SArd Biesheuvel } 1218558b0165SArd Biesheuvel 1219b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1220b48ac83dSMarc Zyngier { 1221b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1222b48ac83dSMarc Zyngier struct its_node *its; 1223b48ac83dSMarc Zyngier u64 addr; 1224b48ac83dSMarc Zyngier 1225b48ac83dSMarc Zyngier its = its_dev->its; 1226558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1227b48ac83dSMarc Zyngier 1228b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1229b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1230b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 123144bb7e24SRobin Murphy 123235ae7df2SJulien Grall iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); 1233b48ac83dSMarc Zyngier } 1234b48ac83dSMarc Zyngier 12358d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 12368d85dcedSMarc Zyngier enum irqchip_irq_state which, 12378d85dcedSMarc Zyngier bool state) 12388d85dcedSMarc Zyngier { 12398d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 12408d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 12418d85dcedSMarc Zyngier 12428d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 12438d85dcedSMarc Zyngier return -EINVAL; 12448d85dcedSMarc Zyngier 12458d85dcedSMarc Zyngier if (state) 12468d85dcedSMarc Zyngier its_send_int(its_dev, event); 12478d85dcedSMarc Zyngier else 12488d85dcedSMarc Zyngier its_send_clear(its_dev, event); 12498d85dcedSMarc Zyngier 12508d85dcedSMarc Zyngier return 0; 12518d85dcedSMarc Zyngier } 12528d85dcedSMarc Zyngier 12532247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 12542247e1bfSMarc Zyngier { 12552247e1bfSMarc Zyngier unsigned long flags; 12562247e1bfSMarc Zyngier 12572247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12582247e1bfSMarc Zyngier if (!its_list_map) 12592247e1bfSMarc Zyngier return; 12602247e1bfSMarc Zyngier 12612247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12622247e1bfSMarc Zyngier 12632247e1bfSMarc Zyngier /* 12642247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 12652247e1bfSMarc Zyngier * them mapped now. 12662247e1bfSMarc Zyngier */ 12672247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 12682247e1bfSMarc Zyngier 12692247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 12702247e1bfSMarc Zyngier int i; 12712247e1bfSMarc Zyngier 12722247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 12732247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 127444c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 12752247e1bfSMarc Zyngier 12762247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 12772247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 12782247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 12792247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 128044c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 12812247e1bfSMarc Zyngier } 12822247e1bfSMarc Zyngier } 12832247e1bfSMarc Zyngier 12842247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12852247e1bfSMarc Zyngier } 12862247e1bfSMarc Zyngier 12872247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 12882247e1bfSMarc Zyngier { 12892247e1bfSMarc Zyngier unsigned long flags; 12902247e1bfSMarc Zyngier 12912247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12922247e1bfSMarc Zyngier if (!its_list_map) 12932247e1bfSMarc Zyngier return; 12942247e1bfSMarc Zyngier 12952247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12962247e1bfSMarc Zyngier 12972247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 12982247e1bfSMarc Zyngier int i; 12992247e1bfSMarc Zyngier 13002247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 13012247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 13022247e1bfSMarc Zyngier } 13032247e1bfSMarc Zyngier 13042247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 13052247e1bfSMarc Zyngier } 13062247e1bfSMarc Zyngier 1307d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1308d011e4e6SMarc Zyngier { 1309d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1310d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1311d011e4e6SMarc Zyngier int ret = 0; 1312d011e4e6SMarc Zyngier 1313d011e4e6SMarc Zyngier if (!info->map) 1314d011e4e6SMarc Zyngier return -EINVAL; 1315d011e4e6SMarc Zyngier 1316d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1317d011e4e6SMarc Zyngier 1318d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1319d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1320d011e4e6SMarc Zyngier 13216396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 1322d011e4e6SMarc Zyngier GFP_KERNEL); 1323d011e4e6SMarc Zyngier if (!maps) { 1324d011e4e6SMarc Zyngier ret = -ENOMEM; 1325d011e4e6SMarc Zyngier goto out; 1326d011e4e6SMarc Zyngier } 1327d011e4e6SMarc Zyngier 1328d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1329d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1330d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1331d011e4e6SMarc Zyngier ret = -EINVAL; 1332d011e4e6SMarc Zyngier goto out; 1333d011e4e6SMarc Zyngier } 1334d011e4e6SMarc Zyngier 1335d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1336d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1337d011e4e6SMarc Zyngier 1338d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1339d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1340d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1341d011e4e6SMarc Zyngier } else { 13422247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 13432247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 13442247e1bfSMarc Zyngier 1345d4d7b4adSMarc Zyngier /* 1346d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1347d4d7b4adSMarc Zyngier * start poking the virtual property table. 1348d4d7b4adSMarc Zyngier */ 1349d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1350d4d7b4adSMarc Zyngier 1351d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1352d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1353d4d7b4adSMarc Zyngier 1354d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1355d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1356d011e4e6SMarc Zyngier 1357d011e4e6SMarc Zyngier /* and install the virtual one */ 1358d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1359d011e4e6SMarc Zyngier 1360d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1361d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1362d011e4e6SMarc Zyngier } 1363d011e4e6SMarc Zyngier 1364d011e4e6SMarc Zyngier out: 1365d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1366d011e4e6SMarc Zyngier return ret; 1367d011e4e6SMarc Zyngier } 1368d011e4e6SMarc Zyngier 1369d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1370d011e4e6SMarc Zyngier { 1371d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1372d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1373d011e4e6SMarc Zyngier int ret = 0; 1374d011e4e6SMarc Zyngier 1375d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1376d011e4e6SMarc Zyngier 1377d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || 1378d011e4e6SMarc Zyngier !its_dev->event_map.vlpi_maps[event].vm) { 1379d011e4e6SMarc Zyngier ret = -EINVAL; 1380d011e4e6SMarc Zyngier goto out; 1381d011e4e6SMarc Zyngier } 1382d011e4e6SMarc Zyngier 1383d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1384d011e4e6SMarc Zyngier *info->map = its_dev->event_map.vlpi_maps[event]; 1385d011e4e6SMarc Zyngier 1386d011e4e6SMarc Zyngier out: 1387d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1388d011e4e6SMarc Zyngier return ret; 1389d011e4e6SMarc Zyngier } 1390d011e4e6SMarc Zyngier 1391d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1392d011e4e6SMarc Zyngier { 1393d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1394d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1395d011e4e6SMarc Zyngier int ret = 0; 1396d011e4e6SMarc Zyngier 1397d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1398d011e4e6SMarc Zyngier 1399d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1400d011e4e6SMarc Zyngier ret = -EINVAL; 1401d011e4e6SMarc Zyngier goto out; 1402d011e4e6SMarc Zyngier } 1403d011e4e6SMarc Zyngier 1404d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1405d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1406d011e4e6SMarc Zyngier 1407d011e4e6SMarc Zyngier /* and restore the physical one */ 1408d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1409d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1410d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1411d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1412d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1413d011e4e6SMarc Zyngier 14142247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 14152247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 14162247e1bfSMarc Zyngier 1417d011e4e6SMarc Zyngier /* 1418d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1419d011e4e6SMarc Zyngier * this was the last VLPI. 1420d011e4e6SMarc Zyngier */ 1421d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1422d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1423d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1424d011e4e6SMarc Zyngier } 1425d011e4e6SMarc Zyngier 1426d011e4e6SMarc Zyngier out: 1427d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1428d011e4e6SMarc Zyngier return ret; 1429d011e4e6SMarc Zyngier } 1430d011e4e6SMarc Zyngier 1431015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1432015ec038SMarc Zyngier { 1433015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1434015ec038SMarc Zyngier 1435015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1436015ec038SMarc Zyngier return -EINVAL; 1437015ec038SMarc Zyngier 1438015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1439015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1440015ec038SMarc Zyngier else 1441015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1442015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1443015ec038SMarc Zyngier 1444015ec038SMarc Zyngier return 0; 1445015ec038SMarc Zyngier } 1446015ec038SMarc Zyngier 1447c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1448c808eea8SMarc Zyngier { 1449c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1450c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1451c808eea8SMarc Zyngier 1452c808eea8SMarc Zyngier /* Need a v4 ITS */ 14530dd57fedSMarc Zyngier if (!is_v4(its_dev->its)) 1454c808eea8SMarc Zyngier return -EINVAL; 1455c808eea8SMarc Zyngier 1456d011e4e6SMarc Zyngier /* Unmap request? */ 1457d011e4e6SMarc Zyngier if (!info) 1458d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1459d011e4e6SMarc Zyngier 1460c808eea8SMarc Zyngier switch (info->cmd_type) { 1461c808eea8SMarc Zyngier case MAP_VLPI: 1462d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1463c808eea8SMarc Zyngier 1464c808eea8SMarc Zyngier case GET_VLPI: 1465d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1466c808eea8SMarc Zyngier 1467c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1468c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1469015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1470c808eea8SMarc Zyngier 1471c808eea8SMarc Zyngier default: 1472c808eea8SMarc Zyngier return -EINVAL; 1473c808eea8SMarc Zyngier } 1474c808eea8SMarc Zyngier } 1475c808eea8SMarc Zyngier 1476c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1477c48ed51cSMarc Zyngier .name = "ITS", 1478c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1479c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1480004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1481c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1482b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 14838d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1484c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1485b48ac83dSMarc Zyngier }; 1486b48ac83dSMarc Zyngier 1487880cb3cdSMarc Zyngier 1488bf9529f8SMarc Zyngier /* 1489bf9529f8SMarc Zyngier * How we allocate LPIs: 1490bf9529f8SMarc Zyngier * 1491880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1492880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1493880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1494880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1495bf9529f8SMarc Zyngier * 1496880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1497880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1498880cb3cdSMarc Zyngier * already free block. 1499880cb3cdSMarc Zyngier * 1500880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1501880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1502880cb3cdSMarc Zyngier */ 15034cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1504880cb3cdSMarc Zyngier 1505880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 1506880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 1507bf9529f8SMarc Zyngier 1508880cb3cdSMarc Zyngier struct lpi_range { 1509880cb3cdSMarc Zyngier struct list_head entry; 1510880cb3cdSMarc Zyngier u32 base_id; 1511880cb3cdSMarc Zyngier u32 span; 1512880cb3cdSMarc Zyngier }; 1513880cb3cdSMarc Zyngier 1514880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 1515bf9529f8SMarc Zyngier { 1516880cb3cdSMarc Zyngier struct lpi_range *range; 1517880cb3cdSMarc Zyngier 15181c73fac5SRasmus Villemoes range = kmalloc(sizeof(*range), GFP_KERNEL); 1519880cb3cdSMarc Zyngier if (range) { 1520880cb3cdSMarc Zyngier range->base_id = base; 1521880cb3cdSMarc Zyngier range->span = span; 1522bf9529f8SMarc Zyngier } 1523bf9529f8SMarc Zyngier 1524880cb3cdSMarc Zyngier return range; 1525880cb3cdSMarc Zyngier } 1526880cb3cdSMarc Zyngier 1527880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 1528880cb3cdSMarc Zyngier { 1529880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1530880cb3cdSMarc Zyngier int err = -ENOSPC; 1531880cb3cdSMarc Zyngier 1532880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1533880cb3cdSMarc Zyngier 1534880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1535880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 1536880cb3cdSMarc Zyngier *base = range->base_id; 1537880cb3cdSMarc Zyngier range->base_id += nr_lpis; 1538880cb3cdSMarc Zyngier range->span -= nr_lpis; 1539880cb3cdSMarc Zyngier 1540880cb3cdSMarc Zyngier if (range->span == 0) { 1541880cb3cdSMarc Zyngier list_del(&range->entry); 1542880cb3cdSMarc Zyngier kfree(range); 1543880cb3cdSMarc Zyngier } 1544880cb3cdSMarc Zyngier 1545880cb3cdSMarc Zyngier err = 0; 1546880cb3cdSMarc Zyngier break; 1547880cb3cdSMarc Zyngier } 1548880cb3cdSMarc Zyngier } 1549880cb3cdSMarc Zyngier 1550880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1551880cb3cdSMarc Zyngier 1552880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 1553880cb3cdSMarc Zyngier return err; 1554880cb3cdSMarc Zyngier } 1555880cb3cdSMarc Zyngier 155612eade12SRasmus Villemoes static void merge_lpi_ranges(struct lpi_range *a, struct lpi_range *b) 155712eade12SRasmus Villemoes { 155812eade12SRasmus Villemoes if (&a->entry == &lpi_range_list || &b->entry == &lpi_range_list) 155912eade12SRasmus Villemoes return; 156012eade12SRasmus Villemoes if (a->base_id + a->span != b->base_id) 156112eade12SRasmus Villemoes return; 156212eade12SRasmus Villemoes b->base_id = a->base_id; 156312eade12SRasmus Villemoes b->span += a->span; 156412eade12SRasmus Villemoes list_del(&a->entry); 156512eade12SRasmus Villemoes kfree(a); 156612eade12SRasmus Villemoes } 156712eade12SRasmus Villemoes 1568880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 1569880cb3cdSMarc Zyngier { 157012eade12SRasmus Villemoes struct lpi_range *new, *old; 1571880cb3cdSMarc Zyngier 1572880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 1573b31a3838SRasmus Villemoes if (!new) 1574b31a3838SRasmus Villemoes return -ENOMEM; 1575880cb3cdSMarc Zyngier 1576880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1577880cb3cdSMarc Zyngier 157812eade12SRasmus Villemoes list_for_each_entry_reverse(old, &lpi_range_list, entry) { 157912eade12SRasmus Villemoes if (old->base_id < base) 158012eade12SRasmus Villemoes break; 1581880cb3cdSMarc Zyngier } 158212eade12SRasmus Villemoes /* 158312eade12SRasmus Villemoes * old is the last element with ->base_id smaller than base, 158412eade12SRasmus Villemoes * so new goes right after it. If there are no elements with 158512eade12SRasmus Villemoes * ->base_id smaller than base, &old->entry ends up pointing 158612eade12SRasmus Villemoes * at the head of the list, and inserting new it the start of 158712eade12SRasmus Villemoes * the list is the right thing to do in that case as well. 158812eade12SRasmus Villemoes */ 158912eade12SRasmus Villemoes list_add(&new->entry, &old->entry); 159012eade12SRasmus Villemoes /* 159112eade12SRasmus Villemoes * Now check if we can merge with the preceding and/or 159212eade12SRasmus Villemoes * following ranges. 159312eade12SRasmus Villemoes */ 159412eade12SRasmus Villemoes merge_lpi_ranges(old, new); 159512eade12SRasmus Villemoes merge_lpi_ranges(new, list_next_entry(new, entry)); 1596880cb3cdSMarc Zyngier 1597880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1598b31a3838SRasmus Villemoes return 0; 1599bf9529f8SMarc Zyngier } 1600bf9529f8SMarc Zyngier 160104a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1602bf9529f8SMarc Zyngier { 1603880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 160412b2905aSMarc Zyngier u32 numlpis; 1605880cb3cdSMarc Zyngier int err; 1606bf9529f8SMarc Zyngier 160712b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 160812b2905aSMarc Zyngier 160912b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 161012b2905aSMarc Zyngier lpis = numlpis; 161112b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 161212b2905aSMarc Zyngier lpis); 161312b2905aSMarc Zyngier } 161412b2905aSMarc Zyngier 1615880cb3cdSMarc Zyngier /* 1616880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 1617880cb3cdSMarc Zyngier * full range of LPIs. 1618880cb3cdSMarc Zyngier */ 1619880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 1620880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 1621880cb3cdSMarc Zyngier return err; 1622bf9529f8SMarc Zyngier } 1623bf9529f8SMarc Zyngier 162438dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 1625bf9529f8SMarc Zyngier { 1626bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1627880cb3cdSMarc Zyngier int err = 0; 1628bf9529f8SMarc Zyngier 1629bf9529f8SMarc Zyngier do { 163038dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 1631880cb3cdSMarc Zyngier if (!err) 1632bf9529f8SMarc Zyngier break; 1633bf9529f8SMarc Zyngier 163438dd7c49SMarc Zyngier nr_irqs /= 2; 163538dd7c49SMarc Zyngier } while (nr_irqs > 0); 1636bf9529f8SMarc Zyngier 163745725e0fSMarc Zyngier if (!nr_irqs) 163845725e0fSMarc Zyngier err = -ENOSPC; 163945725e0fSMarc Zyngier 1640880cb3cdSMarc Zyngier if (err) 1641bf9529f8SMarc Zyngier goto out; 1642bf9529f8SMarc Zyngier 164338dd7c49SMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_irqs), sizeof (long), GFP_ATOMIC); 1644bf9529f8SMarc Zyngier if (!bitmap) 1645bf9529f8SMarc Zyngier goto out; 1646bf9529f8SMarc Zyngier 164738dd7c49SMarc Zyngier *nr_ids = nr_irqs; 1648bf9529f8SMarc Zyngier 1649bf9529f8SMarc Zyngier out: 1650c8415b94SMarc Zyngier if (!bitmap) 1651c8415b94SMarc Zyngier *base = *nr_ids = 0; 1652c8415b94SMarc Zyngier 1653bf9529f8SMarc Zyngier return bitmap; 1654bf9529f8SMarc Zyngier } 1655bf9529f8SMarc Zyngier 165638dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 1657bf9529f8SMarc Zyngier { 1658880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 1659cf2be8baSMarc Zyngier kfree(bitmap); 1660bf9529f8SMarc Zyngier } 16611ac19ca6SMarc Zyngier 1662053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 1663053be485SMarc Zyngier { 1664053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 1665053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 1666053be485SMarc Zyngier 1667053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 1668053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 1669053be485SMarc Zyngier } 1670053be485SMarc Zyngier 16710e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 16720e5ccf91SMarc Zyngier { 16730e5ccf91SMarc Zyngier struct page *prop_page; 16741ac19ca6SMarc Zyngier 16750e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 16760e5ccf91SMarc Zyngier if (!prop_page) 16770e5ccf91SMarc Zyngier return NULL; 16780e5ccf91SMarc Zyngier 1679053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 16800e5ccf91SMarc Zyngier 16810e5ccf91SMarc Zyngier return prop_page; 16820e5ccf91SMarc Zyngier } 16830e5ccf91SMarc Zyngier 16847d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 16857d75bbb4SMarc Zyngier { 16867d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 16877d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 16887d75bbb4SMarc Zyngier } 16891ac19ca6SMarc Zyngier 16905e2c9f9aSMarc Zyngier static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) 16915e2c9f9aSMarc Zyngier { 16925e2c9f9aSMarc Zyngier phys_addr_t start, end, addr_end; 16935e2c9f9aSMarc Zyngier u64 i; 16945e2c9f9aSMarc Zyngier 16955e2c9f9aSMarc Zyngier /* 16965e2c9f9aSMarc Zyngier * We don't bother checking for a kdump kernel as by 16975e2c9f9aSMarc Zyngier * construction, the LPI tables are out of this kernel's 16985e2c9f9aSMarc Zyngier * memory map. 16995e2c9f9aSMarc Zyngier */ 17005e2c9f9aSMarc Zyngier if (is_kdump_kernel()) 17015e2c9f9aSMarc Zyngier return true; 17025e2c9f9aSMarc Zyngier 17035e2c9f9aSMarc Zyngier addr_end = addr + size - 1; 17045e2c9f9aSMarc Zyngier 17055e2c9f9aSMarc Zyngier for_each_reserved_mem_region(i, &start, &end) { 17065e2c9f9aSMarc Zyngier if (addr >= start && addr_end <= end) 17075e2c9f9aSMarc Zyngier return true; 17085e2c9f9aSMarc Zyngier } 17095e2c9f9aSMarc Zyngier 17105e2c9f9aSMarc Zyngier /* Not found, not a good sign... */ 17115e2c9f9aSMarc Zyngier pr_warn("GICv3: Expected reserved range [%pa:%pa], not found\n", 17125e2c9f9aSMarc Zyngier &addr, &addr_end); 17135e2c9f9aSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 17145e2c9f9aSMarc Zyngier return false; 17155e2c9f9aSMarc Zyngier } 17165e2c9f9aSMarc Zyngier 17173fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 17183fb68faeSMarc Zyngier { 17193fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 17203fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 17213fb68faeSMarc Zyngier 17223fb68faeSMarc Zyngier return 0; 17233fb68faeSMarc Zyngier } 17243fb68faeSMarc Zyngier 172511e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 17261ac19ca6SMarc Zyngier { 1727c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 1728c440a9d9SMarc Zyngier u64 val; 1729c440a9d9SMarc Zyngier 1730c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 1731c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 1732c440a9d9SMarc Zyngier 1733c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 1734c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 1735c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 1736c440a9d9SMarc Zyngier MEMREMAP_WB); 1737c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 1738c440a9d9SMarc Zyngier } else { 1739e1a2e201SMarc Zyngier struct page *page; 17401ac19ca6SMarc Zyngier 1741c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 1742c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 17434cb205c0SJia He ITS_MAX_LPI_NRBITS); 1744e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 1745e1a2e201SMarc Zyngier if (!page) { 17461ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 17471ac19ca6SMarc Zyngier return -ENOMEM; 17481ac19ca6SMarc Zyngier } 17491ac19ca6SMarc Zyngier 1750e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 1751e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 17523fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 17533fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 1754c440a9d9SMarc Zyngier } 1755e1a2e201SMarc Zyngier 1756e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 1757e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 17581ac19ca6SMarc Zyngier 17596c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 17601ac19ca6SMarc Zyngier } 17611ac19ca6SMarc Zyngier 17621ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 17631ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 17641ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 17654f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 17661ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 17671ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 17681ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 17691ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 17701ac19ca6SMarc Zyngier }; 17711ac19ca6SMarc Zyngier 17722d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 17732d81d425SShanker Donthineni { 17742d81d425SShanker Donthineni u32 idx = baser - its->tables; 17752d81d425SShanker Donthineni 17760968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 17772d81d425SShanker Donthineni } 17782d81d425SShanker Donthineni 17792d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 17802d81d425SShanker Donthineni u64 val) 17812d81d425SShanker Donthineni { 17822d81d425SShanker Donthineni u32 idx = baser - its->tables; 17832d81d425SShanker Donthineni 17840968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 17852d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 17862d81d425SShanker Donthineni } 17872d81d425SShanker Donthineni 17889347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 17893faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 17903faf24eaSShanker Donthineni bool indirect) 17919347359aSShanker Donthineni { 17929347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 17939347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 17949347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 179530ae9610SShanker Donthineni u64 baser_phys, tmp; 17969347359aSShanker Donthineni u32 alloc_pages; 1797539d3782SShanker Donthineni struct page *page; 17989347359aSShanker Donthineni void *base; 17999347359aSShanker Donthineni 18009347359aSShanker Donthineni retry_alloc_baser: 18019347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 18029347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 18039347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 18049347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 18059347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 18069347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 18079347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 18089347359aSShanker Donthineni } 18099347359aSShanker Donthineni 1810539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); 1811539d3782SShanker Donthineni if (!page) 18129347359aSShanker Donthineni return -ENOMEM; 18139347359aSShanker Donthineni 1814539d3782SShanker Donthineni base = (void *)page_address(page); 181530ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 181630ae9610SShanker Donthineni 181730ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 181830ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 181930ae9610SShanker Donthineni 182030ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 182130ae9610SShanker Donthineni if (psz != SZ_64K) { 182230ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 182330ae9610SShanker Donthineni free_pages((unsigned long)base, order); 182430ae9610SShanker Donthineni return -ENXIO; 182530ae9610SShanker Donthineni } 182630ae9610SShanker Donthineni 182730ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 182830ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 182930ae9610SShanker Donthineni } 183030ae9610SShanker Donthineni 18319347359aSShanker Donthineni retry_baser: 183230ae9610SShanker Donthineni val = (baser_phys | 18339347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 18349347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 18359347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 18369347359aSShanker Donthineni cache | 18379347359aSShanker Donthineni shr | 18389347359aSShanker Donthineni GITS_BASER_VALID); 18399347359aSShanker Donthineni 18403faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 18413faf24eaSShanker Donthineni 18429347359aSShanker Donthineni switch (psz) { 18439347359aSShanker Donthineni case SZ_4K: 18449347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 18459347359aSShanker Donthineni break; 18469347359aSShanker Donthineni case SZ_16K: 18479347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 18489347359aSShanker Donthineni break; 18499347359aSShanker Donthineni case SZ_64K: 18509347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 18519347359aSShanker Donthineni break; 18529347359aSShanker Donthineni } 18539347359aSShanker Donthineni 18549347359aSShanker Donthineni its_write_baser(its, baser, val); 18559347359aSShanker Donthineni tmp = baser->val; 18569347359aSShanker Donthineni 18579347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 18589347359aSShanker Donthineni /* 18599347359aSShanker Donthineni * Shareability didn't stick. Just use 18609347359aSShanker Donthineni * whatever the read reported, which is likely 18619347359aSShanker Donthineni * to be the only thing this redistributor 18629347359aSShanker Donthineni * supports. If that's zero, make it 18639347359aSShanker Donthineni * non-cacheable as well. 18649347359aSShanker Donthineni */ 18659347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 18669347359aSShanker Donthineni if (!shr) { 18679347359aSShanker Donthineni cache = GITS_BASER_nC; 1868328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 18699347359aSShanker Donthineni } 18709347359aSShanker Donthineni goto retry_baser; 18719347359aSShanker Donthineni } 18729347359aSShanker Donthineni 18739347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 18749347359aSShanker Donthineni /* 18759347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 18769347359aSShanker Donthineni * size and retry. If we reach 4K, then 18779347359aSShanker Donthineni * something is horribly wrong... 18789347359aSShanker Donthineni */ 18799347359aSShanker Donthineni free_pages((unsigned long)base, order); 18809347359aSShanker Donthineni baser->base = NULL; 18819347359aSShanker Donthineni 18829347359aSShanker Donthineni switch (psz) { 18839347359aSShanker Donthineni case SZ_16K: 18849347359aSShanker Donthineni psz = SZ_4K; 18859347359aSShanker Donthineni goto retry_alloc_baser; 18869347359aSShanker Donthineni case SZ_64K: 18879347359aSShanker Donthineni psz = SZ_16K; 18889347359aSShanker Donthineni goto retry_alloc_baser; 18899347359aSShanker Donthineni } 18909347359aSShanker Donthineni } 18919347359aSShanker Donthineni 18929347359aSShanker Donthineni if (val != tmp) { 1893b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 18949347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1895b11283ebSVladimir Murzin val, tmp); 18969347359aSShanker Donthineni free_pages((unsigned long)base, order); 18979347359aSShanker Donthineni return -ENXIO; 18989347359aSShanker Donthineni } 18999347359aSShanker Donthineni 19009347359aSShanker Donthineni baser->order = order; 19019347359aSShanker Donthineni baser->base = base; 19029347359aSShanker Donthineni baser->psz = psz; 19033faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 19049347359aSShanker Donthineni 19053faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1906d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 19079347359aSShanker Donthineni its_base_type_string[type], 19089347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 19093faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 19109347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 19119347359aSShanker Donthineni 19129347359aSShanker Donthineni return 0; 19139347359aSShanker Donthineni } 19149347359aSShanker Donthineni 19154cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 19164cacac57SMarc Zyngier struct its_baser *baser, 191732bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 19184b75c459SShanker Donthineni { 19194cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 19204cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 19214cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 19222fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 19234b75c459SShanker Donthineni u32 new_order = *order; 19243faf24eaSShanker Donthineni bool indirect = false; 19253faf24eaSShanker Donthineni 19263faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 19273faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 19283faf24eaSShanker Donthineni /* 19293faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 19303faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 19313faf24eaSShanker Donthineni */ 19323faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 19333faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 19343faf24eaSShanker Donthineni 19353faf24eaSShanker Donthineni if (indirect) { 19363faf24eaSShanker Donthineni /* 19373faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 19383faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 19393faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 19403faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 19413faf24eaSShanker Donthineni * entry size. 19423faf24eaSShanker Donthineni */ 1943d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 19443faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 19453faf24eaSShanker Donthineni } 19463faf24eaSShanker Donthineni } 19474b75c459SShanker Donthineni 19484b75c459SShanker Donthineni /* 19494b75c459SShanker Donthineni * Allocate as many entries as required to fit the 19504b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 19514b75c459SShanker Donthineni * space being incredibly sparse, this results in a 19523faf24eaSShanker Donthineni * massive waste of memory if two-level device table 19533faf24eaSShanker Donthineni * feature is not supported by hardware. 19544b75c459SShanker Donthineni */ 19554b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 19564b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 19574b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1958d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 1959576a8342SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", 19604cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 1961576a8342SMarc Zyngier device_ids(its), ids); 19624b75c459SShanker Donthineni } 19634b75c459SShanker Donthineni 19644b75c459SShanker Donthineni *order = new_order; 19653faf24eaSShanker Donthineni 19663faf24eaSShanker Donthineni return indirect; 19674b75c459SShanker Donthineni } 19684b75c459SShanker Donthineni 19691ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 19701ac19ca6SMarc Zyngier { 19711ac19ca6SMarc Zyngier int i; 19721ac19ca6SMarc Zyngier 19731ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 19741a485f4dSShanker Donthineni if (its->tables[i].base) { 19751a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 19761a485f4dSShanker Donthineni its->tables[i].order); 19771a485f4dSShanker Donthineni its->tables[i].base = NULL; 19781ac19ca6SMarc Zyngier } 19791ac19ca6SMarc Zyngier } 19801ac19ca6SMarc Zyngier } 19811ac19ca6SMarc Zyngier 19820e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 19831ac19ca6SMarc Zyngier { 19841ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 19852fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 19869347359aSShanker Donthineni u32 psz = SZ_64K; 19879347359aSShanker Donthineni int err, i; 198894100970SRobert Richter 1989fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 1990fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 19919347359aSShanker Donthineni cache = GITS_BASER_nCnB; 1992466b7d16SShanker Donthineni 19931ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 19942d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 19952d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 19961ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 19979347359aSShanker Donthineni u32 order = get_order(psz); 19983faf24eaSShanker Donthineni bool indirect = false; 19991ac19ca6SMarc Zyngier 20004cacac57SMarc Zyngier switch (type) { 20014cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 20021ac19ca6SMarc Zyngier continue; 20031ac19ca6SMarc Zyngier 20044cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 200532bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 200632bd44dcSShanker Donthineni psz, &order, 2007576a8342SMarc Zyngier device_ids(its)); 20088d565748SZenghui Yu break; 20098d565748SZenghui Yu 20104cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 20114cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 201232bd44dcSShanker Donthineni psz, &order, 201332bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 20144cacac57SMarc Zyngier break; 20154cacac57SMarc Zyngier } 2016f54b97edSMarc Zyngier 20173faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 20189347359aSShanker Donthineni if (err < 0) { 20199347359aSShanker Donthineni its_free_tables(its); 20209347359aSShanker Donthineni return err; 202130f21363SRobert Richter } 202230f21363SRobert Richter 20239347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 20249347359aSShanker Donthineni psz = baser->psz; 20259347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 20269347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 20271ac19ca6SMarc Zyngier } 20281ac19ca6SMarc Zyngier 20291ac19ca6SMarc Zyngier return 0; 20301ac19ca6SMarc Zyngier } 20311ac19ca6SMarc Zyngier 20321ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 20331ac19ca6SMarc Zyngier { 203483559b47SMarc Zyngier int i; 203583559b47SMarc Zyngier 20366396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 20371ac19ca6SMarc Zyngier GFP_KERNEL); 20381ac19ca6SMarc Zyngier if (!its->collections) 20391ac19ca6SMarc Zyngier return -ENOMEM; 20401ac19ca6SMarc Zyngier 204183559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 204283559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 204383559b47SMarc Zyngier 20441ac19ca6SMarc Zyngier return 0; 20451ac19ca6SMarc Zyngier } 20461ac19ca6SMarc Zyngier 20477c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 20487c297a2dSMarc Zyngier { 20497c297a2dSMarc Zyngier struct page *pend_page; 2050adaab500SMarc Zyngier 20517c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 2052adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 20537c297a2dSMarc Zyngier if (!pend_page) 20547c297a2dSMarc Zyngier return NULL; 20557c297a2dSMarc Zyngier 20567c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 20577c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 20587c297a2dSMarc Zyngier 20597c297a2dSMarc Zyngier return pend_page; 20607c297a2dSMarc Zyngier } 20617c297a2dSMarc Zyngier 20627d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 20637d75bbb4SMarc Zyngier { 2064adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 20657d75bbb4SMarc Zyngier } 20667d75bbb4SMarc Zyngier 2067c6e2ccb6SMarc Zyngier /* 20685e2c9f9aSMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. Any other 20695e2c9f9aSMarc Zyngier * case is wrong in the absence of firmware/EFI support. 2070c6e2ccb6SMarc Zyngier */ 2071c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 2072c440a9d9SMarc Zyngier { 20735e2c9f9aSMarc Zyngier phys_addr_t addr; 20745e2c9f9aSMarc Zyngier u64 val; 2075c6e2ccb6SMarc Zyngier 20765e2c9f9aSMarc Zyngier /* Check whether the property table is in a reserved region */ 20775e2c9f9aSMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 20785e2c9f9aSMarc Zyngier addr = val & GENMASK_ULL(51, 12); 20795e2c9f9aSMarc Zyngier 20805e2c9f9aSMarc Zyngier return gic_check_reserved_range(addr, LPI_PROPBASE_SZ); 2081c440a9d9SMarc Zyngier } 2082c440a9d9SMarc Zyngier 208311e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 208411e37d35SMarc Zyngier { 2085c440a9d9SMarc Zyngier u64 val; 208611e37d35SMarc Zyngier int err, cpu; 208711e37d35SMarc Zyngier 2088c440a9d9SMarc Zyngier /* 2089c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 2090c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 2091c440a9d9SMarc Zyngier */ 2092c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 2093c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 2094c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 2095c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 2096c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 2097c440a9d9SMarc Zyngier } 2098c440a9d9SMarc Zyngier 209911e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 210011e37d35SMarc Zyngier if (err) 210111e37d35SMarc Zyngier return err; 210211e37d35SMarc Zyngier 210311e37d35SMarc Zyngier /* 210411e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 210511e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 210611e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 210711e37d35SMarc Zyngier */ 210811e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 210911e37d35SMarc Zyngier struct page *pend_page; 211011e37d35SMarc Zyngier 211111e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 211211e37d35SMarc Zyngier if (!pend_page) { 211311e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 211411e37d35SMarc Zyngier return -ENOMEM; 211511e37d35SMarc Zyngier } 211611e37d35SMarc Zyngier 211711e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 211811e37d35SMarc Zyngier } 211911e37d35SMarc Zyngier 212011e37d35SMarc Zyngier return 0; 212111e37d35SMarc Zyngier } 212211e37d35SMarc Zyngier 21236479450fSHeyi Guo static u64 its_clear_vpend_valid(void __iomem *vlpi_base) 21246479450fSHeyi Guo { 21256479450fSHeyi Guo u32 count = 1000000; /* 1s! */ 21266479450fSHeyi Guo bool clean; 21276479450fSHeyi Guo u64 val; 21286479450fSHeyi Guo 21296479450fSHeyi Guo val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 21306479450fSHeyi Guo val &= ~GICR_VPENDBASER_Valid; 21316479450fSHeyi Guo gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 21326479450fSHeyi Guo 21336479450fSHeyi Guo do { 21346479450fSHeyi Guo val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 21356479450fSHeyi Guo clean = !(val & GICR_VPENDBASER_Dirty); 21366479450fSHeyi Guo if (!clean) { 21376479450fSHeyi Guo count--; 21386479450fSHeyi Guo cpu_relax(); 21396479450fSHeyi Guo udelay(1); 21406479450fSHeyi Guo } 21416479450fSHeyi Guo } while (!clean && count); 21426479450fSHeyi Guo 21436479450fSHeyi Guo return val; 21446479450fSHeyi Guo } 21456479450fSHeyi Guo 21461ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 21471ac19ca6SMarc Zyngier { 21481ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 21491ac19ca6SMarc Zyngier struct page *pend_page; 215011e37d35SMarc Zyngier phys_addr_t paddr; 21511ac19ca6SMarc Zyngier u64 val, tmp; 21521ac19ca6SMarc Zyngier 215311e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 21541ac19ca6SMarc Zyngier return; 21551ac19ca6SMarc Zyngier 2156c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 2157c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 2158c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 2159f842ca8eSMarc Zyngier /* 2160f842ca8eSMarc Zyngier * Check that we get the same property table on all 2161f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 2162f842ca8eSMarc Zyngier */ 2163f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 2164f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 2165f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 2166f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 2167f842ca8eSMarc Zyngier 2168c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2169c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 2170c440a9d9SMarc Zyngier 21715e2c9f9aSMarc Zyngier WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ)); 2172c440a9d9SMarc Zyngier its_free_pending_table(gic_data_rdist()->pend_page); 2173c440a9d9SMarc Zyngier gic_data_rdist()->pend_page = NULL; 2174c440a9d9SMarc Zyngier 2175c440a9d9SMarc Zyngier goto out; 2176c440a9d9SMarc Zyngier } 2177c440a9d9SMarc Zyngier 217811e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 21791ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 21803fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 21811ac19ca6SMarc Zyngier 21821ac19ca6SMarc Zyngier /* set PROPBASE */ 2183e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 21841ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 21852fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 21861ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 21871ac19ca6SMarc Zyngier 21880968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 21890968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 21901ac19ca6SMarc Zyngier 21911ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 2192241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 2193241a386cSMarc Zyngier /* 2194241a386cSMarc Zyngier * The HW reports non-shareable, we must 2195241a386cSMarc Zyngier * remove the cacheability attributes as 2196241a386cSMarc Zyngier * well. 2197241a386cSMarc Zyngier */ 2198241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 2199241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 2200241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 22010968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 2202241a386cSMarc Zyngier } 22031ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 22041ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 22051ac19ca6SMarc Zyngier } 22061ac19ca6SMarc Zyngier 22071ac19ca6SMarc Zyngier /* set PENDBASE */ 22081ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 22094ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 22102fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 22111ac19ca6SMarc Zyngier 22120968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 22130968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2214241a386cSMarc Zyngier 2215241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 2216241a386cSMarc Zyngier /* 2217241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 2218241a386cSMarc Zyngier * cacheability attributes as well. 2219241a386cSMarc Zyngier */ 2220241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 2221241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 2222241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 22230968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 2224241a386cSMarc Zyngier } 22251ac19ca6SMarc Zyngier 22261ac19ca6SMarc Zyngier /* Enable LPIs */ 22271ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 22281ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 22291ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 22301ac19ca6SMarc Zyngier 22316479450fSHeyi Guo if (gic_rdists->has_vlpis) { 22326479450fSHeyi Guo void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 22336479450fSHeyi Guo 22346479450fSHeyi Guo /* 22356479450fSHeyi Guo * It's possible for CPU to receive VLPIs before it is 22366479450fSHeyi Guo * sheduled as a vPE, especially for the first CPU, and the 22376479450fSHeyi Guo * VLPI with INTID larger than 2^(IDbits+1) will be considered 22386479450fSHeyi Guo * as out of range and dropped by GIC. 22396479450fSHeyi Guo * So we initialize IDbits to known value to avoid VLPI drop. 22406479450fSHeyi Guo */ 22416479450fSHeyi Guo val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 22426479450fSHeyi Guo pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n", 22436479450fSHeyi Guo smp_processor_id(), val); 22446479450fSHeyi Guo gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 22456479450fSHeyi Guo 22466479450fSHeyi Guo /* 22476479450fSHeyi Guo * Also clear Valid bit of GICR_VPENDBASER, in case some 22486479450fSHeyi Guo * ancient programming gets left in and has possibility of 22496479450fSHeyi Guo * corrupting memory. 22506479450fSHeyi Guo */ 22516479450fSHeyi Guo val = its_clear_vpend_valid(vlpi_base); 22526479450fSHeyi Guo WARN_ON(val & GICR_VPENDBASER_Dirty); 22536479450fSHeyi Guo } 22546479450fSHeyi Guo 22551ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 22561ac19ca6SMarc Zyngier dsb(sy); 2257c440a9d9SMarc Zyngier out: 225811e37d35SMarc Zyngier gic_data_rdist()->lpi_enabled = true; 2259c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 226011e37d35SMarc Zyngier smp_processor_id(), 2261c440a9d9SMarc Zyngier gic_data_rdist()->pend_page ? "allocated" : "reserved", 226211e37d35SMarc Zyngier &paddr); 22631ac19ca6SMarc Zyngier } 22641ac19ca6SMarc Zyngier 2265920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 22661ac19ca6SMarc Zyngier { 2267920181ceSDerek Basehore int cpu = smp_processor_id(); 22681ac19ca6SMarc Zyngier u64 target; 22691ac19ca6SMarc Zyngier 2270fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 2271fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 2272fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 2273fbf8f40eSGanapatrao Kulkarni 2274fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 2275fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 2276fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 2277920181ceSDerek Basehore return; 2278fbf8f40eSGanapatrao Kulkarni } 2279fbf8f40eSGanapatrao Kulkarni 22801ac19ca6SMarc Zyngier /* 22811ac19ca6SMarc Zyngier * We now have to bind each collection to its target 22821ac19ca6SMarc Zyngier * redistributor. 22831ac19ca6SMarc Zyngier */ 2284589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 22851ac19ca6SMarc Zyngier /* 22861ac19ca6SMarc Zyngier * This ITS wants the physical address of the 22871ac19ca6SMarc Zyngier * redistributor. 22881ac19ca6SMarc Zyngier */ 22891ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 22901ac19ca6SMarc Zyngier } else { 2291920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 2292589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 2293263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 22941ac19ca6SMarc Zyngier } 22951ac19ca6SMarc Zyngier 22961ac19ca6SMarc Zyngier /* Perform collection mapping */ 22971ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 22981ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 22991ac19ca6SMarc Zyngier 23001ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 23011ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 23021ac19ca6SMarc Zyngier } 23031ac19ca6SMarc Zyngier 2304920181ceSDerek Basehore static void its_cpu_init_collections(void) 2305920181ceSDerek Basehore { 2306920181ceSDerek Basehore struct its_node *its; 2307920181ceSDerek Basehore 2308a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 2309920181ceSDerek Basehore 2310920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 2311920181ceSDerek Basehore its_cpu_init_collection(its); 2312920181ceSDerek Basehore 2313a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 23141ac19ca6SMarc Zyngier } 231584a6a2e7SMarc Zyngier 231684a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 231784a6a2e7SMarc Zyngier { 231884a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 23193e39e8f5SMarc Zyngier unsigned long flags; 232084a6a2e7SMarc Zyngier 23213e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 232284a6a2e7SMarc Zyngier 232384a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 232484a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 232584a6a2e7SMarc Zyngier its_dev = tmp; 232684a6a2e7SMarc Zyngier break; 232784a6a2e7SMarc Zyngier } 232884a6a2e7SMarc Zyngier } 232984a6a2e7SMarc Zyngier 23303e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 233184a6a2e7SMarc Zyngier 233284a6a2e7SMarc Zyngier return its_dev; 233384a6a2e7SMarc Zyngier } 233484a6a2e7SMarc Zyngier 2335466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 2336466b7d16SShanker Donthineni { 2337466b7d16SShanker Donthineni int i; 2338466b7d16SShanker Donthineni 2339466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 2340466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 2341466b7d16SShanker Donthineni return &its->tables[i]; 2342466b7d16SShanker Donthineni } 2343466b7d16SShanker Donthineni 2344466b7d16SShanker Donthineni return NULL; 2345466b7d16SShanker Donthineni } 2346466b7d16SShanker Donthineni 2347539d3782SShanker Donthineni static bool its_alloc_table_entry(struct its_node *its, 2348539d3782SShanker Donthineni struct its_baser *baser, u32 id) 23493faf24eaSShanker Donthineni { 23503faf24eaSShanker Donthineni struct page *page; 23513faf24eaSShanker Donthineni u32 esz, idx; 23523faf24eaSShanker Donthineni __le64 *table; 23533faf24eaSShanker Donthineni 23543faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 23553faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 23563faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 235770cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 23583faf24eaSShanker Donthineni 23593faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 236070cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 23613faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 23623faf24eaSShanker Donthineni return false; 23633faf24eaSShanker Donthineni 23643faf24eaSShanker Donthineni table = baser->base; 23653faf24eaSShanker Donthineni 23663faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 23673faf24eaSShanker Donthineni if (!table[idx]) { 2368539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 2369539d3782SShanker Donthineni get_order(baser->psz)); 23703faf24eaSShanker Donthineni if (!page) 23713faf24eaSShanker Donthineni return false; 23723faf24eaSShanker Donthineni 23733faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 23743faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2375328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 23763faf24eaSShanker Donthineni 23773faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 23783faf24eaSShanker Donthineni 23793faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 23803faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2381328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 23823faf24eaSShanker Donthineni 23833faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 23843faf24eaSShanker Donthineni dsb(sy); 23853faf24eaSShanker Donthineni } 23863faf24eaSShanker Donthineni 23873faf24eaSShanker Donthineni return true; 23883faf24eaSShanker Donthineni } 23893faf24eaSShanker Donthineni 239070cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 239170cc81edSMarc Zyngier { 239270cc81edSMarc Zyngier struct its_baser *baser; 239370cc81edSMarc Zyngier 239470cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 239570cc81edSMarc Zyngier 239670cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 239770cc81edSMarc Zyngier if (!baser) 2398576a8342SMarc Zyngier return (ilog2(dev_id) < device_ids(its)); 239970cc81edSMarc Zyngier 2400539d3782SShanker Donthineni return its_alloc_table_entry(its, baser, dev_id); 240170cc81edSMarc Zyngier } 240270cc81edSMarc Zyngier 24037d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 24047d75bbb4SMarc Zyngier { 24057d75bbb4SMarc Zyngier struct its_node *its; 24067d75bbb4SMarc Zyngier 24077d75bbb4SMarc Zyngier /* 24087d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 24097d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 24107d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 24117d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 24127d75bbb4SMarc Zyngier * anyway, right?). 24137d75bbb4SMarc Zyngier */ 24147d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 24157d75bbb4SMarc Zyngier struct its_baser *baser; 24167d75bbb4SMarc Zyngier 24170dd57fedSMarc Zyngier if (!is_v4(its)) 24187d75bbb4SMarc Zyngier continue; 24197d75bbb4SMarc Zyngier 24207d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 24217d75bbb4SMarc Zyngier if (!baser) 24227d75bbb4SMarc Zyngier return false; 24237d75bbb4SMarc Zyngier 2424539d3782SShanker Donthineni if (!its_alloc_table_entry(its, baser, vpe_id)) 24257d75bbb4SMarc Zyngier return false; 24267d75bbb4SMarc Zyngier } 24277d75bbb4SMarc Zyngier 24287d75bbb4SMarc Zyngier return true; 24297d75bbb4SMarc Zyngier } 24307d75bbb4SMarc Zyngier 243184a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 243293f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 243384a6a2e7SMarc Zyngier { 243484a6a2e7SMarc Zyngier struct its_device *dev; 243593f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 24363e39e8f5SMarc Zyngier unsigned long flags; 2437591e5becSMarc Zyngier u16 *col_map = NULL; 243884a6a2e7SMarc Zyngier void *itt; 243984a6a2e7SMarc Zyngier int lpi_base; 244084a6a2e7SMarc Zyngier int nr_lpis; 2441c8481267SMarc Zyngier int nr_ites; 244284a6a2e7SMarc Zyngier int sz; 244384a6a2e7SMarc Zyngier 24443faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2445466b7d16SShanker Donthineni return NULL; 2446466b7d16SShanker Donthineni 2447147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 2448147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 2449147c8f37SMarc Zyngier 245084a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2451c8481267SMarc Zyngier /* 2452147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 2453147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 2454c8481267SMarc Zyngier */ 2455147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 2456ffedbf0cSMarc Zyngier sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); 245784a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 2458539d3782SShanker Donthineni itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); 245993f94ea0SMarc Zyngier if (alloc_lpis) { 246038dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 2461591e5becSMarc Zyngier if (lpi_map) 24626396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 246393f94ea0SMarc Zyngier GFP_KERNEL); 246493f94ea0SMarc Zyngier } else { 24656396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 246693f94ea0SMarc Zyngier nr_lpis = 0; 246793f94ea0SMarc Zyngier lpi_base = 0; 246893f94ea0SMarc Zyngier } 246984a6a2e7SMarc Zyngier 247093f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 247184a6a2e7SMarc Zyngier kfree(dev); 247284a6a2e7SMarc Zyngier kfree(itt); 247384a6a2e7SMarc Zyngier kfree(lpi_map); 2474591e5becSMarc Zyngier kfree(col_map); 247584a6a2e7SMarc Zyngier return NULL; 247684a6a2e7SMarc Zyngier } 247784a6a2e7SMarc Zyngier 2478328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 24795a9a8915SMarc Zyngier 248084a6a2e7SMarc Zyngier dev->its = its; 248184a6a2e7SMarc Zyngier dev->itt = itt; 2482c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2483591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2484591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2485591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2486591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 2487d011e4e6SMarc Zyngier mutex_init(&dev->event_map.vlpi_lock); 248884a6a2e7SMarc Zyngier dev->device_id = dev_id; 248984a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 249084a6a2e7SMarc Zyngier 24913e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 249284a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 24933e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 249484a6a2e7SMarc Zyngier 249584a6a2e7SMarc Zyngier /* Map device to its ITT */ 249684a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 249784a6a2e7SMarc Zyngier 249884a6a2e7SMarc Zyngier return dev; 249984a6a2e7SMarc Zyngier } 250084a6a2e7SMarc Zyngier 250184a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 250284a6a2e7SMarc Zyngier { 25033e39e8f5SMarc Zyngier unsigned long flags; 25043e39e8f5SMarc Zyngier 25053e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 250684a6a2e7SMarc Zyngier list_del(&its_dev->entry); 25073e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 2508898aa5ceSMarc Zyngier kfree(its_dev->event_map.col_map); 250984a6a2e7SMarc Zyngier kfree(its_dev->itt); 251084a6a2e7SMarc Zyngier kfree(its_dev); 251184a6a2e7SMarc Zyngier } 2512b48ac83dSMarc Zyngier 25138208d170SMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) 2514b48ac83dSMarc Zyngier { 2515b48ac83dSMarc Zyngier int idx; 2516b48ac83dSMarc Zyngier 2517342be106SZenghui Yu /* Find a free LPI region in lpi_map and allocate them. */ 25188208d170SMarc Zyngier idx = bitmap_find_free_region(dev->event_map.lpi_map, 25198208d170SMarc Zyngier dev->event_map.nr_lpis, 25208208d170SMarc Zyngier get_count_order(nvecs)); 25218208d170SMarc Zyngier if (idx < 0) 2522b48ac83dSMarc Zyngier return -ENOSPC; 2523b48ac83dSMarc Zyngier 2524591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 2525b48ac83dSMarc Zyngier 2526b48ac83dSMarc Zyngier return 0; 2527b48ac83dSMarc Zyngier } 2528b48ac83dSMarc Zyngier 252954456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 2530b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 2531b48ac83dSMarc Zyngier { 2532b48ac83dSMarc Zyngier struct its_node *its; 2533b48ac83dSMarc Zyngier struct its_device *its_dev; 253454456db9SMarc Zyngier struct msi_domain_info *msi_info; 253554456db9SMarc Zyngier u32 dev_id; 25369791ec7dSMarc Zyngier int err = 0; 2537b48ac83dSMarc Zyngier 253854456db9SMarc Zyngier /* 2539a7c90f51SJulien Grall * We ignore "dev" entirely, and rely on the dev_id that has 254054456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 254154456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 254254456db9SMarc Zyngier * are built on top of the ITS. 254354456db9SMarc Zyngier */ 254454456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 254554456db9SMarc Zyngier 254654456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 254754456db9SMarc Zyngier its = msi_info->data; 254854456db9SMarc Zyngier 254920b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 255020b3d54eSMarc Zyngier vpe_proxy.dev && 255120b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 255220b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 255320b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 255420b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 255520b3d54eSMarc Zyngier dev_id); 255620b3d54eSMarc Zyngier return -EINVAL; 255720b3d54eSMarc Zyngier } 255820b3d54eSMarc Zyngier 25599791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 2560f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 2561e8137f4fSMarc Zyngier if (its_dev) { 2562e8137f4fSMarc Zyngier /* 2563e8137f4fSMarc Zyngier * We already have seen this ID, probably through 2564e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 2565e8137f4fSMarc Zyngier * create the device. 2566e8137f4fSMarc Zyngier */ 25679791ec7dSMarc Zyngier its_dev->shared = true; 2568f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 2569e8137f4fSMarc Zyngier goto out; 2570e8137f4fSMarc Zyngier } 2571b48ac83dSMarc Zyngier 257293f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 25739791ec7dSMarc Zyngier if (!its_dev) { 25749791ec7dSMarc Zyngier err = -ENOMEM; 25759791ec7dSMarc Zyngier goto out; 25769791ec7dSMarc Zyngier } 2577b48ac83dSMarc Zyngier 2578f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 2579e8137f4fSMarc Zyngier out: 25809791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 2581b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 25829791ec7dSMarc Zyngier return err; 2583b48ac83dSMarc Zyngier } 2584b48ac83dSMarc Zyngier 258554456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 258654456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 258754456db9SMarc Zyngier }; 258854456db9SMarc Zyngier 2589b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 2590b48ac83dSMarc Zyngier unsigned int virq, 2591b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 2592b48ac83dSMarc Zyngier { 2593f833f57fSMarc Zyngier struct irq_fwspec fwspec; 2594b48ac83dSMarc Zyngier 2595f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 2596f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 2597f833f57fSMarc Zyngier fwspec.param_count = 3; 2598f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 2599f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 2600f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 26013f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 26023f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 26033f010cf1STomasz Nowicki fwspec.param_count = 2; 26043f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 26053f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 2606f833f57fSMarc Zyngier } else { 2607f833f57fSMarc Zyngier return -EINVAL; 2608f833f57fSMarc Zyngier } 2609b48ac83dSMarc Zyngier 2610f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 2611b48ac83dSMarc Zyngier } 2612b48ac83dSMarc Zyngier 2613b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 2614b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 2615b48ac83dSMarc Zyngier { 2616b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 2617b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 261835ae7df2SJulien Grall struct its_node *its = its_dev->its; 2619b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 2620b48ac83dSMarc Zyngier int err; 2621b48ac83dSMarc Zyngier int i; 2622b48ac83dSMarc Zyngier 26238208d170SMarc Zyngier err = its_alloc_device_irq(its_dev, nr_irqs, &hwirq); 2624b48ac83dSMarc Zyngier if (err) 2625b48ac83dSMarc Zyngier return err; 2626b48ac83dSMarc Zyngier 262735ae7df2SJulien Grall err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); 262835ae7df2SJulien Grall if (err) 262935ae7df2SJulien Grall return err; 263035ae7df2SJulien Grall 26318208d170SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 26328208d170SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); 2633b48ac83dSMarc Zyngier if (err) 2634b48ac83dSMarc Zyngier return err; 2635b48ac83dSMarc Zyngier 2636b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 26378208d170SMarc Zyngier hwirq + i, &its_irq_chip, its_dev); 26380d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 2639f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 26408208d170SMarc Zyngier (int)(hwirq + i - its_dev->event_map.lpi_base), 26418208d170SMarc Zyngier (int)(hwirq + i), virq + i); 2642b48ac83dSMarc Zyngier } 2643b48ac83dSMarc Zyngier 2644b48ac83dSMarc Zyngier return 0; 2645b48ac83dSMarc Zyngier } 2646b48ac83dSMarc Zyngier 264772491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 2648702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2649aca268dfSMarc Zyngier { 2650aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2651aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2652fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 26530d224d35SMarc Zyngier int cpu; 2654fbf8f40eSGanapatrao Kulkarni 2655fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 2656fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 2657fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 2658aca268dfSMarc Zyngier 2659591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 2660c1797b11SYang Yingliang cpu = cpumask_first_and(cpu_mask, cpu_online_mask); 2661c1797b11SYang Yingliang if (cpu >= nr_cpu_ids) { 2662c1797b11SYang Yingliang if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) 2663c1797b11SYang Yingliang return -EINVAL; 2664c1797b11SYang Yingliang 2665c1797b11SYang Yingliang cpu = cpumask_first(cpu_online_mask); 2666c1797b11SYang Yingliang } 2667c1797b11SYang Yingliang 26680d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 26690d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 2670591e5becSMarc Zyngier 2671aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 26726a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 267372491643SThomas Gleixner return 0; 2674aca268dfSMarc Zyngier } 2675aca268dfSMarc Zyngier 2676aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 2677aca268dfSMarc Zyngier struct irq_data *d) 2678aca268dfSMarc Zyngier { 2679aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2680aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2681aca268dfSMarc Zyngier 2682aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 2683aca268dfSMarc Zyngier its_send_discard(its_dev, event); 2684aca268dfSMarc Zyngier } 2685aca268dfSMarc Zyngier 2686b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 2687b48ac83dSMarc Zyngier unsigned int nr_irqs) 2688b48ac83dSMarc Zyngier { 2689b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 2690b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 26919791ec7dSMarc Zyngier struct its_node *its = its_dev->its; 2692b48ac83dSMarc Zyngier int i; 2693b48ac83dSMarc Zyngier 2694c9c96e30SMarc Zyngier bitmap_release_region(its_dev->event_map.lpi_map, 2695c9c96e30SMarc Zyngier its_get_event_id(irq_domain_get_irq_data(domain, virq)), 2696c9c96e30SMarc Zyngier get_count_order(nr_irqs)); 2697c9c96e30SMarc Zyngier 2698b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2699b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 2700b48ac83dSMarc Zyngier virq + i); 2701b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 27022da39949SMarc Zyngier irq_domain_reset_irq_data(data); 2703b48ac83dSMarc Zyngier } 2704b48ac83dSMarc Zyngier 27059791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 27069791ec7dSMarc Zyngier 27079791ec7dSMarc Zyngier /* 27089791ec7dSMarc Zyngier * If all interrupts have been freed, start mopping the 27099791ec7dSMarc Zyngier * floor. This is conditionned on the device not being shared. 27109791ec7dSMarc Zyngier */ 27119791ec7dSMarc Zyngier if (!its_dev->shared && 27129791ec7dSMarc Zyngier bitmap_empty(its_dev->event_map.lpi_map, 2713591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 271438dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 2715cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 2716cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 2717b48ac83dSMarc Zyngier 2718b48ac83dSMarc Zyngier /* Unmap device/itt */ 2719b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 2720b48ac83dSMarc Zyngier its_free_device(its_dev); 2721b48ac83dSMarc Zyngier } 2722b48ac83dSMarc Zyngier 27239791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 27249791ec7dSMarc Zyngier 2725b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 2726b48ac83dSMarc Zyngier } 2727b48ac83dSMarc Zyngier 2728b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 2729b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 2730b48ac83dSMarc Zyngier .free = its_irq_domain_free, 2731aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 2732aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 2733b48ac83dSMarc Zyngier }; 27344c21f3c2SMarc Zyngier 273520b3d54eSMarc Zyngier /* 273620b3d54eSMarc Zyngier * This is insane. 273720b3d54eSMarc Zyngier * 273820b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 273920b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 274020b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 274120b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 274220b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 274320b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 274420b3d54eSMarc Zyngier * 274520b3d54eSMarc Zyngier * Broken by design(tm). 274620b3d54eSMarc Zyngier */ 274720b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 274820b3d54eSMarc Zyngier { 274920b3d54eSMarc Zyngier /* Already unmapped? */ 275020b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 275120b3d54eSMarc Zyngier return; 275220b3d54eSMarc Zyngier 275320b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 275420b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 275520b3d54eSMarc Zyngier 275620b3d54eSMarc Zyngier /* 275720b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 275820b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 275920b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 276020b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 276120b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 276220b3d54eSMarc Zyngier */ 276320b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 276420b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 276520b3d54eSMarc Zyngier 276620b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 276720b3d54eSMarc Zyngier } 276820b3d54eSMarc Zyngier 276920b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 277020b3d54eSMarc Zyngier { 277120b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 277220b3d54eSMarc Zyngier unsigned long flags; 277320b3d54eSMarc Zyngier 277420b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 277520b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 277620b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 277720b3d54eSMarc Zyngier } 277820b3d54eSMarc Zyngier } 277920b3d54eSMarc Zyngier 278020b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 278120b3d54eSMarc Zyngier { 278220b3d54eSMarc Zyngier /* Already mapped? */ 278320b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 278420b3d54eSMarc Zyngier return; 278520b3d54eSMarc Zyngier 278620b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 278720b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 278820b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 278920b3d54eSMarc Zyngier 279020b3d54eSMarc Zyngier /* Map the new VPE instead */ 279120b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 279220b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 279320b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 279420b3d54eSMarc Zyngier 279520b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 279620b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 279720b3d54eSMarc Zyngier } 279820b3d54eSMarc Zyngier 2799958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 2800958b90d1SMarc Zyngier { 2801958b90d1SMarc Zyngier unsigned long flags; 2802958b90d1SMarc Zyngier struct its_collection *target_col; 2803958b90d1SMarc Zyngier 2804958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2805958b90d1SMarc Zyngier void __iomem *rdbase; 2806958b90d1SMarc Zyngier 2807958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 2808958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 28092f4f064bSMarc Zyngier wait_for_syncr(rdbase); 2810958b90d1SMarc Zyngier 2811958b90d1SMarc Zyngier return; 2812958b90d1SMarc Zyngier } 2813958b90d1SMarc Zyngier 2814958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 2815958b90d1SMarc Zyngier 2816958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 2817958b90d1SMarc Zyngier 2818958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 2819958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 2820958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 2821958b90d1SMarc Zyngier 2822958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 2823958b90d1SMarc Zyngier } 2824958b90d1SMarc Zyngier 28253171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 28263171a47aSMarc Zyngier const struct cpumask *mask_val, 28273171a47aSMarc Zyngier bool force) 28283171a47aSMarc Zyngier { 28293171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 28303171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 28313171a47aSMarc Zyngier 28323171a47aSMarc Zyngier /* 28333171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 283420b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 2835958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 2836958b90d1SMarc Zyngier * interrupt to its new location. 28373171a47aSMarc Zyngier */ 28383171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 2839958b90d1SMarc Zyngier int from = vpe->col_idx; 2840958b90d1SMarc Zyngier 28413171a47aSMarc Zyngier vpe->col_idx = cpu; 28423171a47aSMarc Zyngier its_send_vmovp(vpe); 2843958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 28443171a47aSMarc Zyngier } 28453171a47aSMarc Zyngier 284644c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 284744c4c25eSMarc Zyngier 28483171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 28493171a47aSMarc Zyngier } 28503171a47aSMarc Zyngier 2851e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 2852e643d803SMarc Zyngier { 285350c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2854e643d803SMarc Zyngier u64 val; 2855e643d803SMarc Zyngier 2856e643d803SMarc Zyngier /* Schedule the VPE */ 2857e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 2858e643d803SMarc Zyngier GENMASK_ULL(51, 12); 2859e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 2860e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 2861e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 2862e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 2863e643d803SMarc Zyngier 2864e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 2865e643d803SMarc Zyngier GENMASK_ULL(51, 16); 2866e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 2867e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 2868e643d803SMarc Zyngier /* 2869e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 2870e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 2871e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 2872e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 2873e643d803SMarc Zyngier * that the pending table is empty. A good implementation 2874e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 2875e643d803SMarc Zyngier * making this a tolerable issue. 2876e643d803SMarc Zyngier */ 2877e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2878e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 2879e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 2880e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2881e643d803SMarc Zyngier } 2882e643d803SMarc Zyngier 2883e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 2884e643d803SMarc Zyngier { 288550c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2886e643d803SMarc Zyngier u64 val; 2887e643d803SMarc Zyngier 28886479450fSHeyi Guo val = its_clear_vpend_valid(vlpi_base); 2889e643d803SMarc Zyngier 28906479450fSHeyi Guo if (unlikely(val & GICR_VPENDBASER_Dirty)) { 2891e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2892e643d803SMarc Zyngier vpe->idai = false; 2893e643d803SMarc Zyngier vpe->pending_last = true; 2894e643d803SMarc Zyngier } else { 2895e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 2896e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 2897e643d803SMarc Zyngier } 2898e643d803SMarc Zyngier } 2899e643d803SMarc Zyngier 290040619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 290140619a2eSMarc Zyngier { 290240619a2eSMarc Zyngier struct its_node *its; 290340619a2eSMarc Zyngier 290440619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 29050dd57fedSMarc Zyngier if (!is_v4(its)) 290640619a2eSMarc Zyngier continue; 290740619a2eSMarc Zyngier 29082247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 29092247e1bfSMarc Zyngier continue; 29102247e1bfSMarc Zyngier 29113c1cceebSMarc Zyngier /* 29123c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 29133c1cceebSMarc Zyngier * we need is to reach the redistributors. 29143c1cceebSMarc Zyngier */ 291540619a2eSMarc Zyngier its_send_vinvall(its, vpe); 29163c1cceebSMarc Zyngier return; 291740619a2eSMarc Zyngier } 291840619a2eSMarc Zyngier } 291940619a2eSMarc Zyngier 2920e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 2921e643d803SMarc Zyngier { 2922e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2923e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 2924e643d803SMarc Zyngier 2925e643d803SMarc Zyngier switch (info->cmd_type) { 2926e643d803SMarc Zyngier case SCHEDULE_VPE: 2927e643d803SMarc Zyngier its_vpe_schedule(vpe); 2928e643d803SMarc Zyngier return 0; 2929e643d803SMarc Zyngier 2930e643d803SMarc Zyngier case DESCHEDULE_VPE: 2931e643d803SMarc Zyngier its_vpe_deschedule(vpe); 2932e643d803SMarc Zyngier return 0; 2933e643d803SMarc Zyngier 29345e2f7642SMarc Zyngier case INVALL_VPE: 293540619a2eSMarc Zyngier its_vpe_invall(vpe); 29365e2f7642SMarc Zyngier return 0; 29375e2f7642SMarc Zyngier 2938e643d803SMarc Zyngier default: 2939e643d803SMarc Zyngier return -EINVAL; 2940e643d803SMarc Zyngier } 2941e643d803SMarc Zyngier } 2942e643d803SMarc Zyngier 294320b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 294420b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 294520b3d54eSMarc Zyngier { 294620b3d54eSMarc Zyngier unsigned long flags; 294720b3d54eSMarc Zyngier 294820b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 294920b3d54eSMarc Zyngier 295020b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 295120b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 295220b3d54eSMarc Zyngier 295320b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 295420b3d54eSMarc Zyngier } 295520b3d54eSMarc Zyngier 2956f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 2957f6a91da7SMarc Zyngier { 2958f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 295920b3d54eSMarc Zyngier 296020b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 2961f6a91da7SMarc Zyngier void __iomem *rdbase; 2962f6a91da7SMarc Zyngier 2963425c09beSMarc Zyngier /* Target the redistributor this VPE is currently known on */ 2964f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2965425c09beSMarc Zyngier gic_write_lpir(d->parent_data->hwirq, rdbase + GICR_INVLPIR); 29662f4f064bSMarc Zyngier wait_for_syncr(rdbase); 296720b3d54eSMarc Zyngier } else { 296820b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 296920b3d54eSMarc Zyngier } 2970f6a91da7SMarc Zyngier } 2971f6a91da7SMarc Zyngier 2972f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 2973f6a91da7SMarc Zyngier { 2974f6a91da7SMarc Zyngier /* 2975f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 2976f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 2977f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 2978f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 2979f6a91da7SMarc Zyngier */ 2980f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 2981f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2982f6a91da7SMarc Zyngier } 2983f6a91da7SMarc Zyngier 2984f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 2985f6a91da7SMarc Zyngier { 2986f6a91da7SMarc Zyngier /* Same hack as above... */ 2987f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 2988f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2989f6a91da7SMarc Zyngier } 2990f6a91da7SMarc Zyngier 2991e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 2992e57a3e28SMarc Zyngier enum irqchip_irq_state which, 2993e57a3e28SMarc Zyngier bool state) 2994e57a3e28SMarc Zyngier { 2995e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2996e57a3e28SMarc Zyngier 2997e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 2998e57a3e28SMarc Zyngier return -EINVAL; 2999e57a3e28SMarc Zyngier 3000e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3001e57a3e28SMarc Zyngier void __iomem *rdbase; 3002e57a3e28SMarc Zyngier 3003e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3004e57a3e28SMarc Zyngier if (state) { 3005e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 3006e57a3e28SMarc Zyngier } else { 3007e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 30082f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3009e57a3e28SMarc Zyngier } 3010e57a3e28SMarc Zyngier } else { 3011e57a3e28SMarc Zyngier if (state) 3012e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 3013e57a3e28SMarc Zyngier else 3014e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 3015e57a3e28SMarc Zyngier } 3016e57a3e28SMarc Zyngier 3017e57a3e28SMarc Zyngier return 0; 3018e57a3e28SMarc Zyngier } 3019e57a3e28SMarc Zyngier 30208fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 30218fff27aeSMarc Zyngier .name = "GICv4-vpe", 3022f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 3023f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 3024f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 30253171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 3026e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 3027e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 30288fff27aeSMarc Zyngier }; 30298fff27aeSMarc Zyngier 30307d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 30317d75bbb4SMarc Zyngier { 303232bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 30337d75bbb4SMarc Zyngier } 30347d75bbb4SMarc Zyngier 30357d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 30367d75bbb4SMarc Zyngier { 30377d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 30387d75bbb4SMarc Zyngier } 30397d75bbb4SMarc Zyngier 30407d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 30417d75bbb4SMarc Zyngier { 30427d75bbb4SMarc Zyngier struct page *vpt_page; 30437d75bbb4SMarc Zyngier int vpe_id; 30447d75bbb4SMarc Zyngier 30457d75bbb4SMarc Zyngier /* Allocate vpe_id */ 30467d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 30477d75bbb4SMarc Zyngier if (vpe_id < 0) 30487d75bbb4SMarc Zyngier return vpe_id; 30497d75bbb4SMarc Zyngier 30507d75bbb4SMarc Zyngier /* Allocate VPT */ 30517d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 30527d75bbb4SMarc Zyngier if (!vpt_page) { 30537d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 30547d75bbb4SMarc Zyngier return -ENOMEM; 30557d75bbb4SMarc Zyngier } 30567d75bbb4SMarc Zyngier 30577d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 30587d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 305934f8eb92SNianyao Tang its_free_pending_table(vpt_page); 30607d75bbb4SMarc Zyngier return -ENOMEM; 30617d75bbb4SMarc Zyngier } 30627d75bbb4SMarc Zyngier 30637d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 30647d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 306520b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 30667d75bbb4SMarc Zyngier 30677d75bbb4SMarc Zyngier return 0; 30687d75bbb4SMarc Zyngier } 30697d75bbb4SMarc Zyngier 30707d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 30717d75bbb4SMarc Zyngier { 307220b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 30737d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 30747d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 30757d75bbb4SMarc Zyngier } 30767d75bbb4SMarc Zyngier 30777d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 30787d75bbb4SMarc Zyngier unsigned int virq, 30797d75bbb4SMarc Zyngier unsigned int nr_irqs) 30807d75bbb4SMarc Zyngier { 30817d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 30827d75bbb4SMarc Zyngier int i; 30837d75bbb4SMarc Zyngier 30847d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 30857d75bbb4SMarc Zyngier 30867d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 30877d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 30887d75bbb4SMarc Zyngier virq + i); 30897d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 30907d75bbb4SMarc Zyngier 30917d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 30927d75bbb4SMarc Zyngier 30937d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 30947d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 30957d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 30967d75bbb4SMarc Zyngier } 30977d75bbb4SMarc Zyngier 30987d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 309938dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 31007d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 31017d75bbb4SMarc Zyngier } 31027d75bbb4SMarc Zyngier } 31037d75bbb4SMarc Zyngier 31047d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 31057d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 31067d75bbb4SMarc Zyngier { 31077d75bbb4SMarc Zyngier struct its_vm *vm = args; 31087d75bbb4SMarc Zyngier unsigned long *bitmap; 31097d75bbb4SMarc Zyngier struct page *vprop_page; 31107d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 31117d75bbb4SMarc Zyngier 31127d75bbb4SMarc Zyngier BUG_ON(!vm); 31137d75bbb4SMarc Zyngier 311438dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 31157d75bbb4SMarc Zyngier if (!bitmap) 31167d75bbb4SMarc Zyngier return -ENOMEM; 31177d75bbb4SMarc Zyngier 31187d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 311938dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 31207d75bbb4SMarc Zyngier return -ENOMEM; 31217d75bbb4SMarc Zyngier } 31227d75bbb4SMarc Zyngier 31237d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 31247d75bbb4SMarc Zyngier if (!vprop_page) { 312538dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 31267d75bbb4SMarc Zyngier return -ENOMEM; 31277d75bbb4SMarc Zyngier } 31287d75bbb4SMarc Zyngier 31297d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 31307d75bbb4SMarc Zyngier vm->db_lpi_base = base; 31317d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 31327d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 31337d75bbb4SMarc Zyngier 31347d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 31357d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 31367d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 31377d75bbb4SMarc Zyngier if (err) 31387d75bbb4SMarc Zyngier break; 31397d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 31407d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 31417d75bbb4SMarc Zyngier if (err) 31427d75bbb4SMarc Zyngier break; 31437d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 31447d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 31457d75bbb4SMarc Zyngier set_bit(i, bitmap); 31467d75bbb4SMarc Zyngier } 31477d75bbb4SMarc Zyngier 31487d75bbb4SMarc Zyngier if (err) { 31497d75bbb4SMarc Zyngier if (i > 0) 31507d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 31517d75bbb4SMarc Zyngier 315238dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 31537d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 31547d75bbb4SMarc Zyngier } 31557d75bbb4SMarc Zyngier 31567d75bbb4SMarc Zyngier return err; 31577d75bbb4SMarc Zyngier } 31587d75bbb4SMarc Zyngier 315972491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 3160702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3161eb78192bSMarc Zyngier { 3162eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 316340619a2eSMarc Zyngier struct its_node *its; 3164eb78192bSMarc Zyngier 31652247e1bfSMarc Zyngier /* If we use the list map, we issue VMAPP on demand... */ 31662247e1bfSMarc Zyngier if (its_list_map) 31676ef930f2SMarc Zyngier return 0; 3168eb78192bSMarc Zyngier 3169eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 3170eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 317140619a2eSMarc Zyngier 317240619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 31730dd57fedSMarc Zyngier if (!is_v4(its)) 317440619a2eSMarc Zyngier continue; 317540619a2eSMarc Zyngier 317675fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 317740619a2eSMarc Zyngier its_send_vinvall(its, vpe); 317840619a2eSMarc Zyngier } 317940619a2eSMarc Zyngier 318044c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 318144c4c25eSMarc Zyngier 318272491643SThomas Gleixner return 0; 3183eb78192bSMarc Zyngier } 3184eb78192bSMarc Zyngier 3185eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 3186eb78192bSMarc Zyngier struct irq_data *d) 3187eb78192bSMarc Zyngier { 3188eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 318975fd951bSMarc Zyngier struct its_node *its; 3190eb78192bSMarc Zyngier 31912247e1bfSMarc Zyngier /* 31922247e1bfSMarc Zyngier * If we use the list map, we unmap the VPE once no VLPIs are 31932247e1bfSMarc Zyngier * associated with the VM. 31942247e1bfSMarc Zyngier */ 31952247e1bfSMarc Zyngier if (its_list_map) 31962247e1bfSMarc Zyngier return; 31972247e1bfSMarc Zyngier 319875fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 31990dd57fedSMarc Zyngier if (!is_v4(its)) 320075fd951bSMarc Zyngier continue; 320175fd951bSMarc Zyngier 320275fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 320375fd951bSMarc Zyngier } 3204eb78192bSMarc Zyngier } 3205eb78192bSMarc Zyngier 32068fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 32077d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 32087d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 3209eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 3210eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 32118fff27aeSMarc Zyngier }; 32128fff27aeSMarc Zyngier 32134559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 32144559fbb3SYun Wu { 32154559fbb3SYun Wu u32 count = 1000000; /* 1s */ 32164559fbb3SYun Wu u32 val; 32174559fbb3SYun Wu 32184559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 32197611da86SDavid Daney /* 32207611da86SDavid Daney * GIC architecture specification requires the ITS to be both 32217611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 32227611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 32237611da86SDavid Daney */ 32247611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 32254559fbb3SYun Wu return 0; 32264559fbb3SYun Wu 32274559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 3228d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 32294559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 32304559fbb3SYun Wu 32314559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 32324559fbb3SYun Wu while (1) { 32334559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 32344559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 32354559fbb3SYun Wu return 0; 32364559fbb3SYun Wu 32374559fbb3SYun Wu count--; 32384559fbb3SYun Wu if (!count) 32394559fbb3SYun Wu return -EBUSY; 32404559fbb3SYun Wu 32414559fbb3SYun Wu cpu_relax(); 32424559fbb3SYun Wu udelay(1); 32434559fbb3SYun Wu } 32444559fbb3SYun Wu } 32454559fbb3SYun Wu 32469d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 324794100970SRobert Richter { 324894100970SRobert Richter struct its_node *its = data; 324994100970SRobert Richter 3250576a8342SMarc Zyngier /* erratum 22375: only alloc 8MB table size (20 bits) */ 3251576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 3252576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); 325394100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 32549d111d49SArd Biesheuvel 32559d111d49SArd Biesheuvel return true; 325694100970SRobert Richter } 325794100970SRobert Richter 32589d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 3259fbf8f40eSGanapatrao Kulkarni { 3260fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 3261fbf8f40eSGanapatrao Kulkarni 3262fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 32639d111d49SArd Biesheuvel 32649d111d49SArd Biesheuvel return true; 3265fbf8f40eSGanapatrao Kulkarni } 3266fbf8f40eSGanapatrao Kulkarni 32679d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 326890922a2dSShanker Donthineni { 326990922a2dSShanker Donthineni struct its_node *its = data; 327090922a2dSShanker Donthineni 327190922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 3272ffedbf0cSMarc Zyngier its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; 3273ffedbf0cSMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); 32749d111d49SArd Biesheuvel 32759d111d49SArd Biesheuvel return true; 327690922a2dSShanker Donthineni } 327790922a2dSShanker Donthineni 3278558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 3279558b0165SArd Biesheuvel { 3280558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 3281558b0165SArd Biesheuvel 3282558b0165SArd Biesheuvel /* 3283558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 3284558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 3285558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 3286558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 3287558b0165SArd Biesheuvel * the window offset. 3288558b0165SArd Biesheuvel */ 3289558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 3290558b0165SArd Biesheuvel } 3291558b0165SArd Biesheuvel 3292558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 3293558b0165SArd Biesheuvel { 3294558b0165SArd Biesheuvel struct its_node *its = data; 3295558b0165SArd Biesheuvel u32 pre_its_window[2]; 3296558b0165SArd Biesheuvel u32 ids; 3297558b0165SArd Biesheuvel 3298558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 3299558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 3300558b0165SArd Biesheuvel pre_its_window, 3301558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 3302558b0165SArd Biesheuvel 3303558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 3304558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 3305558b0165SArd Biesheuvel 3306558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 3307576a8342SMarc Zyngier if (device_ids(its) > ids) { 3308576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 3309576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); 3310576a8342SMarc Zyngier } 3311558b0165SArd Biesheuvel 3312558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 3313558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 3314558b0165SArd Biesheuvel return true; 3315558b0165SArd Biesheuvel } 3316558b0165SArd Biesheuvel return false; 3317558b0165SArd Biesheuvel } 3318558b0165SArd Biesheuvel 33195c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 33205c9a882eSMarc Zyngier { 33215c9a882eSMarc Zyngier struct its_node *its = data; 33225c9a882eSMarc Zyngier 33235c9a882eSMarc Zyngier /* 33245c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 33255c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 33265c9a882eSMarc Zyngier */ 33275c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 33285c9a882eSMarc Zyngier return true; 3329cc2d3216SMarc Zyngier } 33304c21f3c2SMarc Zyngier 333167510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 333294100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 333394100970SRobert Richter { 333494100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 333594100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 333694100970SRobert Richter .mask = 0xffff0fff, 333794100970SRobert Richter .init = its_enable_quirk_cavium_22375, 333894100970SRobert Richter }, 333994100970SRobert Richter #endif 3340fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 3341fbf8f40eSGanapatrao Kulkarni { 3342fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 3343fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 3344fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 3345fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 3346fbf8f40eSGanapatrao Kulkarni }, 3347fbf8f40eSGanapatrao Kulkarni #endif 334890922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 334990922a2dSShanker Donthineni { 335090922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 335190922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 335290922a2dSShanker Donthineni .mask = 0xffffffff, 335390922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 335490922a2dSShanker Donthineni }, 335590922a2dSShanker Donthineni #endif 3356558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 3357558b0165SArd Biesheuvel { 3358558b0165SArd Biesheuvel /* 3359558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 3360558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 3361558b0165SArd Biesheuvel * special handling in software. 3362558b0165SArd Biesheuvel */ 3363558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 3364558b0165SArd Biesheuvel .iidr = 0x0001143b, 3365558b0165SArd Biesheuvel .mask = 0xffffffff, 3366558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 3367558b0165SArd Biesheuvel }, 3368558b0165SArd Biesheuvel #endif 33695c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 33705c9a882eSMarc Zyngier { 33715c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 33725c9a882eSMarc Zyngier .iidr = 0x00000004, 33735c9a882eSMarc Zyngier .mask = 0xffffffff, 33745c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 33755c9a882eSMarc Zyngier }, 33765c9a882eSMarc Zyngier #endif 337767510ccaSRobert Richter { 337867510ccaSRobert Richter } 337967510ccaSRobert Richter }; 338067510ccaSRobert Richter 338167510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 338267510ccaSRobert Richter { 338367510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 338467510ccaSRobert Richter 338567510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 338667510ccaSRobert Richter } 338767510ccaSRobert Richter 3388dba0bc7bSDerek Basehore static int its_save_disable(void) 3389dba0bc7bSDerek Basehore { 3390dba0bc7bSDerek Basehore struct its_node *its; 3391dba0bc7bSDerek Basehore int err = 0; 3392dba0bc7bSDerek Basehore 3393a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3394dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3395dba0bc7bSDerek Basehore void __iomem *base; 3396dba0bc7bSDerek Basehore 3397dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3398dba0bc7bSDerek Basehore continue; 3399dba0bc7bSDerek Basehore 3400dba0bc7bSDerek Basehore base = its->base; 3401dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 3402dba0bc7bSDerek Basehore err = its_force_quiescent(base); 3403dba0bc7bSDerek Basehore if (err) { 3404dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 3405dba0bc7bSDerek Basehore &its->phys_base, err); 3406dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3407dba0bc7bSDerek Basehore goto err; 3408dba0bc7bSDerek Basehore } 3409dba0bc7bSDerek Basehore 3410dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 3411dba0bc7bSDerek Basehore } 3412dba0bc7bSDerek Basehore 3413dba0bc7bSDerek Basehore err: 3414dba0bc7bSDerek Basehore if (err) { 3415dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 3416dba0bc7bSDerek Basehore void __iomem *base; 3417dba0bc7bSDerek Basehore 3418dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3419dba0bc7bSDerek Basehore continue; 3420dba0bc7bSDerek Basehore 3421dba0bc7bSDerek Basehore base = its->base; 3422dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3423dba0bc7bSDerek Basehore } 3424dba0bc7bSDerek Basehore } 3425a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3426dba0bc7bSDerek Basehore 3427dba0bc7bSDerek Basehore return err; 3428dba0bc7bSDerek Basehore } 3429dba0bc7bSDerek Basehore 3430dba0bc7bSDerek Basehore static void its_restore_enable(void) 3431dba0bc7bSDerek Basehore { 3432dba0bc7bSDerek Basehore struct its_node *its; 3433dba0bc7bSDerek Basehore int ret; 3434dba0bc7bSDerek Basehore 3435a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3436dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3437dba0bc7bSDerek Basehore void __iomem *base; 3438dba0bc7bSDerek Basehore int i; 3439dba0bc7bSDerek Basehore 3440dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3441dba0bc7bSDerek Basehore continue; 3442dba0bc7bSDerek Basehore 3443dba0bc7bSDerek Basehore base = its->base; 3444dba0bc7bSDerek Basehore 3445dba0bc7bSDerek Basehore /* 3446dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 3447dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 3448dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 3449dba0bc7bSDerek Basehore * Specification. 3450dba0bc7bSDerek Basehore */ 3451dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 3452dba0bc7bSDerek Basehore if (ret) { 3453dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 3454dba0bc7bSDerek Basehore &its->phys_base, ret); 3455dba0bc7bSDerek Basehore continue; 3456dba0bc7bSDerek Basehore } 3457dba0bc7bSDerek Basehore 3458dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 3459dba0bc7bSDerek Basehore 3460dba0bc7bSDerek Basehore /* 3461dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 3462dba0bc7bSDerek Basehore * cmd_write line up with it. 3463dba0bc7bSDerek Basehore */ 3464dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 3465dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 3466dba0bc7bSDerek Basehore 3467dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 3468dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3469dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 3470dba0bc7bSDerek Basehore 3471dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 3472dba0bc7bSDerek Basehore continue; 3473dba0bc7bSDerek Basehore 3474dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 3475dba0bc7bSDerek Basehore } 3476dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3477920181ceSDerek Basehore 3478920181ceSDerek Basehore /* 3479920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 3480920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 3481920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 3482920181ceSDerek Basehore */ 3483920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 3484920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 3485920181ceSDerek Basehore its_cpu_init_collection(its); 3486dba0bc7bSDerek Basehore } 3487a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3488dba0bc7bSDerek Basehore } 3489dba0bc7bSDerek Basehore 3490dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 3491dba0bc7bSDerek Basehore .suspend = its_save_disable, 3492dba0bc7bSDerek Basehore .resume = its_restore_enable, 3493dba0bc7bSDerek Basehore }; 3494dba0bc7bSDerek Basehore 3495db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 3496d14ae5e6STomasz Nowicki { 3497d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 3498d14ae5e6STomasz Nowicki struct msi_domain_info *info; 3499d14ae5e6STomasz Nowicki 3500d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 3501d14ae5e6STomasz Nowicki if (!info) 3502d14ae5e6STomasz Nowicki return -ENOMEM; 3503d14ae5e6STomasz Nowicki 3504db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 3505d14ae5e6STomasz Nowicki if (!inner_domain) { 3506d14ae5e6STomasz Nowicki kfree(info); 3507d14ae5e6STomasz Nowicki return -ENOMEM; 3508d14ae5e6STomasz Nowicki } 3509d14ae5e6STomasz Nowicki 3510db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 351196f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 3512558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 3513d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 3514d14ae5e6STomasz Nowicki info->data = its; 3515d14ae5e6STomasz Nowicki inner_domain->host_data = info; 3516d14ae5e6STomasz Nowicki 3517d14ae5e6STomasz Nowicki return 0; 3518d14ae5e6STomasz Nowicki } 3519d14ae5e6STomasz Nowicki 35208fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 35218fff27aeSMarc Zyngier { 352220b3d54eSMarc Zyngier struct its_node *its; 352320b3d54eSMarc Zyngier u32 devid; 352420b3d54eSMarc Zyngier int entries; 352520b3d54eSMarc Zyngier 352620b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 352720b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 352820b3d54eSMarc Zyngier return 0; 352920b3d54eSMarc Zyngier } 353020b3d54eSMarc Zyngier 353120b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 353220b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 353320b3d54eSMarc Zyngier 353420b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 35356396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 353620b3d54eSMarc Zyngier GFP_KERNEL); 353720b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 353820b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 353920b3d54eSMarc Zyngier return -ENOMEM; 354020b3d54eSMarc Zyngier } 354120b3d54eSMarc Zyngier 354220b3d54eSMarc Zyngier /* Use the last possible DevID */ 3543576a8342SMarc Zyngier devid = GENMASK(device_ids(its) - 1, 0); 354420b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 354520b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 354620b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 354720b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 354820b3d54eSMarc Zyngier return -ENOMEM; 354920b3d54eSMarc Zyngier } 355020b3d54eSMarc Zyngier 3551c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 355220b3d54eSMarc Zyngier 355320b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 355420b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 355520b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 355620b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 355720b3d54eSMarc Zyngier 35588fff27aeSMarc Zyngier return 0; 35598fff27aeSMarc Zyngier } 35608fff27aeSMarc Zyngier 35613dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 35623dfa576bSMarc Zyngier void __iomem *its_base) 35633dfa576bSMarc Zyngier { 35643dfa576bSMarc Zyngier int its_number; 35653dfa576bSMarc Zyngier u32 ctlr; 35663dfa576bSMarc Zyngier 35673dfa576bSMarc Zyngier /* 35683dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 35693dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 35703dfa576bSMarc Zyngier * locking. Should this change, we should address 35713dfa576bSMarc Zyngier * this. 35723dfa576bSMarc Zyngier */ 3573ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 3574ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 35753dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 35763dfa576bSMarc Zyngier &res->start); 35773dfa576bSMarc Zyngier return -EINVAL; 35783dfa576bSMarc Zyngier } 35793dfa576bSMarc Zyngier 35803dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 35813dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 35823dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 35833dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 35843dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 35853dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 35863dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 35873dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 35883dfa576bSMarc Zyngier } 35893dfa576bSMarc Zyngier 35903dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 35913dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 35923dfa576bSMarc Zyngier &res->start, its_number); 35933dfa576bSMarc Zyngier return -EINVAL; 35943dfa576bSMarc Zyngier } 35953dfa576bSMarc Zyngier 35963dfa576bSMarc Zyngier return its_number; 35973dfa576bSMarc Zyngier } 35983dfa576bSMarc Zyngier 3599db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 3600db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 36014c21f3c2SMarc Zyngier { 36024c21f3c2SMarc Zyngier struct its_node *its; 36034c21f3c2SMarc Zyngier void __iomem *its_base; 36043dfa576bSMarc Zyngier u32 val, ctlr; 36053dfa576bSMarc Zyngier u64 baser, tmp, typer; 3606539d3782SShanker Donthineni struct page *page; 36074c21f3c2SMarc Zyngier int err; 36084c21f3c2SMarc Zyngier 3609db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 36104c21f3c2SMarc Zyngier if (!its_base) { 3611db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 36124c21f3c2SMarc Zyngier return -ENOMEM; 36134c21f3c2SMarc Zyngier } 36144c21f3c2SMarc Zyngier 36154c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 36164c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 3617db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 36184c21f3c2SMarc Zyngier err = -ENODEV; 36194c21f3c2SMarc Zyngier goto out_unmap; 36204c21f3c2SMarc Zyngier } 36214c21f3c2SMarc Zyngier 36224559fbb3SYun Wu err = its_force_quiescent(its_base); 36234559fbb3SYun Wu if (err) { 3624db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 36254559fbb3SYun Wu goto out_unmap; 36264559fbb3SYun Wu } 36274559fbb3SYun Wu 3628db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 36294c21f3c2SMarc Zyngier 36304c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 36314c21f3c2SMarc Zyngier if (!its) { 36324c21f3c2SMarc Zyngier err = -ENOMEM; 36334c21f3c2SMarc Zyngier goto out_unmap; 36344c21f3c2SMarc Zyngier } 36354c21f3c2SMarc Zyngier 36364c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 36379791ec7dSMarc Zyngier mutex_init(&its->dev_alloc_lock); 36384c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 36394c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 36403dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 36410dd57fedSMarc Zyngier its->typer = typer; 36424c21f3c2SMarc Zyngier its->base = its_base; 3643db40f0a7STomasz Nowicki its->phys_base = res->start; 36440dd57fedSMarc Zyngier if (is_v4(its)) { 36453dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 36463dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 36473dfa576bSMarc Zyngier if (err < 0) 36483dfa576bSMarc Zyngier goto out_free_its; 36493dfa576bSMarc Zyngier 3650debf6d02SMarc Zyngier its->list_nr = err; 3651debf6d02SMarc Zyngier 36523dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 36533dfa576bSMarc Zyngier &res->start, err); 36543dfa576bSMarc Zyngier } else { 36553dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 36563dfa576bSMarc Zyngier } 36573dfa576bSMarc Zyngier } 36583dfa576bSMarc Zyngier 3659db40f0a7STomasz Nowicki its->numa_node = numa_node; 36604c21f3c2SMarc Zyngier 3661539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 36625bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 3663539d3782SShanker Donthineni if (!page) { 36644c21f3c2SMarc Zyngier err = -ENOMEM; 36654c21f3c2SMarc Zyngier goto out_free_its; 36664c21f3c2SMarc Zyngier } 3667539d3782SShanker Donthineni its->cmd_base = (void *)page_address(page); 36684c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 3669558b0165SArd Biesheuvel its->fwnode_handle = handle; 3670558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 3671558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 36724c21f3c2SMarc Zyngier 367367510ccaSRobert Richter its_enable_quirks(its); 367467510ccaSRobert Richter 36750e0b0f69SShanker Donthineni err = its_alloc_tables(its); 36764c21f3c2SMarc Zyngier if (err) 36774c21f3c2SMarc Zyngier goto out_free_cmd; 36784c21f3c2SMarc Zyngier 36794c21f3c2SMarc Zyngier err = its_alloc_collections(its); 36804c21f3c2SMarc Zyngier if (err) 36814c21f3c2SMarc Zyngier goto out_free_tables; 36824c21f3c2SMarc Zyngier 36834c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 36842fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 36854c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 36864c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 36874c21f3c2SMarc Zyngier GITS_CBASER_VALID); 36884c21f3c2SMarc Zyngier 36890968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 36900968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 36914c21f3c2SMarc Zyngier 36924ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 3693241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 3694241a386cSMarc Zyngier /* 3695241a386cSMarc Zyngier * The HW reports non-shareable, we must 3696241a386cSMarc Zyngier * remove the cacheability attributes as 3697241a386cSMarc Zyngier * well. 3698241a386cSMarc Zyngier */ 3699241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 3700241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 3701241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 37020968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 3703241a386cSMarc Zyngier } 37044c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 37054c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 37064c21f3c2SMarc Zyngier } 37074c21f3c2SMarc Zyngier 37080968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 37093dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 3710d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 37110dd57fedSMarc Zyngier if (is_v4(its)) 3712d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 3713d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 3714241a386cSMarc Zyngier 3715dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 3716dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 3717dba0bc7bSDerek Basehore 3718db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 3719d14ae5e6STomasz Nowicki if (err) 372054456db9SMarc Zyngier goto out_free_tables; 37214c21f3c2SMarc Zyngier 3722a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 37234c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 3724a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 37254c21f3c2SMarc Zyngier 37264c21f3c2SMarc Zyngier return 0; 37274c21f3c2SMarc Zyngier 37284c21f3c2SMarc Zyngier out_free_tables: 37294c21f3c2SMarc Zyngier its_free_tables(its); 37304c21f3c2SMarc Zyngier out_free_cmd: 37315bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 37324c21f3c2SMarc Zyngier out_free_its: 37334c21f3c2SMarc Zyngier kfree(its); 37344c21f3c2SMarc Zyngier out_unmap: 37354c21f3c2SMarc Zyngier iounmap(its_base); 3736db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 37374c21f3c2SMarc Zyngier return err; 37384c21f3c2SMarc Zyngier } 37394c21f3c2SMarc Zyngier 37404c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 37414c21f3c2SMarc Zyngier { 3742589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 37434c21f3c2SMarc Zyngier } 37444c21f3c2SMarc Zyngier 37456eb486b6SShanker Donthineni static int redist_disable_lpis(void) 37464c21f3c2SMarc Zyngier { 37476eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 37486eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 37496eb486b6SShanker Donthineni u64 val; 37506eb486b6SShanker Donthineni 37514c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 37524c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 37534c21f3c2SMarc Zyngier return -ENXIO; 37544c21f3c2SMarc Zyngier } 37556eb486b6SShanker Donthineni 37566eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 37576eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 37586eb486b6SShanker Donthineni return 0; 37596eb486b6SShanker Donthineni 376011e37d35SMarc Zyngier /* 376111e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 376211e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 376311e37d35SMarc Zyngier * configured and all is well in the world. 3764c440a9d9SMarc Zyngier * 3765c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 376611e37d35SMarc Zyngier */ 3767c440a9d9SMarc Zyngier if (gic_data_rdist()->lpi_enabled || 3768c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 376911e37d35SMarc Zyngier return 0; 377011e37d35SMarc Zyngier 377111e37d35SMarc Zyngier /* 377211e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 377311e37d35SMarc Zyngier */ 377411e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 37756eb486b6SShanker Donthineni smp_processor_id()); 37766eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 37776eb486b6SShanker Donthineni 37786eb486b6SShanker Donthineni /* Disable LPIs */ 37796eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 37806eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 37816eb486b6SShanker Donthineni 37826eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 37836eb486b6SShanker Donthineni dsb(sy); 37846eb486b6SShanker Donthineni 37856eb486b6SShanker Donthineni /* 37866eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 37876eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 37886eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 37896eb486b6SShanker Donthineni */ 37906eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 37916eb486b6SShanker Donthineni if (!timeout) { 37926eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 37936eb486b6SShanker Donthineni smp_processor_id()); 37946eb486b6SShanker Donthineni return -ETIMEDOUT; 37956eb486b6SShanker Donthineni } 37966eb486b6SShanker Donthineni udelay(1); 37976eb486b6SShanker Donthineni timeout--; 37986eb486b6SShanker Donthineni } 37996eb486b6SShanker Donthineni 38006eb486b6SShanker Donthineni /* 38016eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 38026eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 38036eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 38046eb486b6SShanker Donthineni */ 38056eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 38066eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 38076eb486b6SShanker Donthineni return -EBUSY; 38086eb486b6SShanker Donthineni } 38096eb486b6SShanker Donthineni 38106eb486b6SShanker Donthineni return 0; 38116eb486b6SShanker Donthineni } 38126eb486b6SShanker Donthineni 38136eb486b6SShanker Donthineni int its_cpu_init(void) 38146eb486b6SShanker Donthineni { 38156eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 38166eb486b6SShanker Donthineni int ret; 38176eb486b6SShanker Donthineni 38186eb486b6SShanker Donthineni ret = redist_disable_lpis(); 38196eb486b6SShanker Donthineni if (ret) 38206eb486b6SShanker Donthineni return ret; 38216eb486b6SShanker Donthineni 38224c21f3c2SMarc Zyngier its_cpu_init_lpis(); 3823920181ceSDerek Basehore its_cpu_init_collections(); 38244c21f3c2SMarc Zyngier } 38254c21f3c2SMarc Zyngier 38264c21f3c2SMarc Zyngier return 0; 38274c21f3c2SMarc Zyngier } 38284c21f3c2SMarc Zyngier 3829935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 38304c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 38314c21f3c2SMarc Zyngier {}, 38324c21f3c2SMarc Zyngier }; 38334c21f3c2SMarc Zyngier 3834db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 38354c21f3c2SMarc Zyngier { 38364c21f3c2SMarc Zyngier struct device_node *np; 3837db40f0a7STomasz Nowicki struct resource res; 38384c21f3c2SMarc Zyngier 38394c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 38404c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 384195a25625SStephen Boyd if (!of_device_is_available(np)) 384295a25625SStephen Boyd continue; 3843d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 3844e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 3845e81f54c6SRob Herring np); 3846d14ae5e6STomasz Nowicki continue; 3847d14ae5e6STomasz Nowicki } 3848d14ae5e6STomasz Nowicki 3849db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 3850e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 3851db40f0a7STomasz Nowicki continue; 38524c21f3c2SMarc Zyngier } 38534c21f3c2SMarc Zyngier 3854db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 3855db40f0a7STomasz Nowicki } 3856db40f0a7STomasz Nowicki return 0; 3857db40f0a7STomasz Nowicki } 3858db40f0a7STomasz Nowicki 38593f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 38603f010cf1STomasz Nowicki 38613f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 38623f010cf1STomasz Nowicki 3863d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 3864dbd2b826SGanapatrao Kulkarni struct its_srat_map { 3865dbd2b826SGanapatrao Kulkarni /* numa node id */ 3866dbd2b826SGanapatrao Kulkarni u32 numa_node; 3867dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 3868dbd2b826SGanapatrao Kulkarni u32 its_id; 3869dbd2b826SGanapatrao Kulkarni }; 3870dbd2b826SGanapatrao Kulkarni 3871fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 3872dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 3873dbd2b826SGanapatrao Kulkarni 3874dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 3875dbd2b826SGanapatrao Kulkarni { 3876dbd2b826SGanapatrao Kulkarni int i; 3877dbd2b826SGanapatrao Kulkarni 3878dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 3879dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 3880dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 3881dbd2b826SGanapatrao Kulkarni } 3882dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 3883dbd2b826SGanapatrao Kulkarni } 3884dbd2b826SGanapatrao Kulkarni 388560574d1eSKeith Busch static int __init gic_acpi_match_srat_its(union acpi_subtable_headers *header, 3886fdf6e7a8SHanjun Guo const unsigned long end) 3887fdf6e7a8SHanjun Guo { 3888fdf6e7a8SHanjun Guo return 0; 3889fdf6e7a8SHanjun Guo } 3890fdf6e7a8SHanjun Guo 389160574d1eSKeith Busch static int __init gic_acpi_parse_srat_its(union acpi_subtable_headers *header, 3892dbd2b826SGanapatrao Kulkarni const unsigned long end) 3893dbd2b826SGanapatrao Kulkarni { 3894dbd2b826SGanapatrao Kulkarni int node; 3895dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 3896dbd2b826SGanapatrao Kulkarni 3897dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 3898dbd2b826SGanapatrao Kulkarni if (!its_affinity) 3899dbd2b826SGanapatrao Kulkarni return -EINVAL; 3900dbd2b826SGanapatrao Kulkarni 3901dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 3902dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 3903dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 3904dbd2b826SGanapatrao Kulkarni return -EINVAL; 3905dbd2b826SGanapatrao Kulkarni } 3906dbd2b826SGanapatrao Kulkarni 3907dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 3908dbd2b826SGanapatrao Kulkarni 3909dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 3910dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 3911dbd2b826SGanapatrao Kulkarni return 0; 3912dbd2b826SGanapatrao Kulkarni } 3913dbd2b826SGanapatrao Kulkarni 3914dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 3915dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 3916dbd2b826SGanapatrao Kulkarni its_in_srat++; 3917dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 3918dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 3919dbd2b826SGanapatrao Kulkarni 3920dbd2b826SGanapatrao Kulkarni return 0; 3921dbd2b826SGanapatrao Kulkarni } 3922dbd2b826SGanapatrao Kulkarni 3923dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 3924dbd2b826SGanapatrao Kulkarni { 3925fdf6e7a8SHanjun Guo int count; 3926fdf6e7a8SHanjun Guo 3927fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 3928fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 3929fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3930fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 3931fdf6e7a8SHanjun Guo if (count <= 0) 3932fdf6e7a8SHanjun Guo return; 3933fdf6e7a8SHanjun Guo 39346da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 3935fdf6e7a8SHanjun Guo GFP_KERNEL); 3936fdf6e7a8SHanjun Guo if (!its_srat_maps) { 3937fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 3938fdf6e7a8SHanjun Guo return; 3939fdf6e7a8SHanjun Guo } 3940fdf6e7a8SHanjun Guo 3941dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 3942dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 3943dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3944dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 3945dbd2b826SGanapatrao Kulkarni } 3946fdf6e7a8SHanjun Guo 3947fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 3948fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 3949fdf6e7a8SHanjun Guo { 3950fdf6e7a8SHanjun Guo kfree(its_srat_maps); 3951fdf6e7a8SHanjun Guo } 3952dbd2b826SGanapatrao Kulkarni #else 3953dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 3954dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 3955fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 3956dbd2b826SGanapatrao Kulkarni #endif 3957dbd2b826SGanapatrao Kulkarni 395860574d1eSKeith Busch static int __init gic_acpi_parse_madt_its(union acpi_subtable_headers *header, 39593f010cf1STomasz Nowicki const unsigned long end) 39603f010cf1STomasz Nowicki { 39613f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 39623f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 39633f010cf1STomasz Nowicki struct resource res; 39643f010cf1STomasz Nowicki int err; 39653f010cf1STomasz Nowicki 39663f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 39673f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 39683f010cf1STomasz Nowicki res.start = its_entry->base_address; 39693f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 39703f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 39713f010cf1STomasz Nowicki 39725778cc77SMarc Zyngier dom_handle = irq_domain_alloc_fwnode(&res.start); 39733f010cf1STomasz Nowicki if (!dom_handle) { 39743f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 39753f010cf1STomasz Nowicki &res.start); 39763f010cf1STomasz Nowicki return -ENOMEM; 39773f010cf1STomasz Nowicki } 39783f010cf1STomasz Nowicki 39798b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 39808b4282e6SShameer Kolothum dom_handle); 39813f010cf1STomasz Nowicki if (err) { 39823f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 39833f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 39843f010cf1STomasz Nowicki goto dom_err; 39853f010cf1STomasz Nowicki } 39863f010cf1STomasz Nowicki 3987dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 3988dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 39893f010cf1STomasz Nowicki if (!err) 39903f010cf1STomasz Nowicki return 0; 39913f010cf1STomasz Nowicki 39923f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 39933f010cf1STomasz Nowicki dom_err: 39943f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 39953f010cf1STomasz Nowicki return err; 39963f010cf1STomasz Nowicki } 39973f010cf1STomasz Nowicki 39983f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 39993f010cf1STomasz Nowicki { 4000dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 40013f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 40023f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 4003fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 40043f010cf1STomasz Nowicki } 40053f010cf1STomasz Nowicki #else 40063f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 40073f010cf1STomasz Nowicki #endif 40083f010cf1STomasz Nowicki 4009db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 4010db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 4011db40f0a7STomasz Nowicki { 4012db40f0a7STomasz Nowicki struct device_node *of_node; 40138fff27aeSMarc Zyngier struct its_node *its; 40148fff27aeSMarc Zyngier bool has_v4 = false; 40158fff27aeSMarc Zyngier int err; 4016db40f0a7STomasz Nowicki 4017db40f0a7STomasz Nowicki its_parent = parent_domain; 4018db40f0a7STomasz Nowicki of_node = to_of_node(handle); 4019db40f0a7STomasz Nowicki if (of_node) 4020db40f0a7STomasz Nowicki its_of_probe(of_node); 4021db40f0a7STomasz Nowicki else 40223f010cf1STomasz Nowicki its_acpi_probe(); 4023db40f0a7STomasz Nowicki 40244c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 40254c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 40264c21f3c2SMarc Zyngier return -ENXIO; 40274c21f3c2SMarc Zyngier } 40284c21f3c2SMarc Zyngier 40294c21f3c2SMarc Zyngier gic_rdists = rdists; 403011e37d35SMarc Zyngier 403111e37d35SMarc Zyngier err = allocate_lpi_tables(); 40328fff27aeSMarc Zyngier if (err) 40338fff27aeSMarc Zyngier return err; 40348fff27aeSMarc Zyngier 40358fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 40360dd57fedSMarc Zyngier has_v4 |= is_v4(its); 40378fff27aeSMarc Zyngier 40388fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 40393d63cb53SMarc Zyngier if (its_init_vpe_domain() || 40403d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 40418fff27aeSMarc Zyngier rdists->has_vlpis = false; 40428fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 40438fff27aeSMarc Zyngier } 40448fff27aeSMarc Zyngier } 40458fff27aeSMarc Zyngier 4046dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 4047dba0bc7bSDerek Basehore 40488fff27aeSMarc Zyngier return 0; 40494c21f3c2SMarc Zyngier } 4050