1cc2d3216SMarc Zyngier /* 2cc2d3216SMarc Zyngier * Copyright (C) 2013, 2014 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 18cc2d3216SMarc Zyngier #include <linux/bitmap.h> 19cc2d3216SMarc Zyngier #include <linux/cpu.h> 20cc2d3216SMarc Zyngier #include <linux/delay.h> 21cc2d3216SMarc Zyngier #include <linux/interrupt.h> 22cc2d3216SMarc Zyngier #include <linux/log2.h> 23cc2d3216SMarc Zyngier #include <linux/mm.h> 24cc2d3216SMarc Zyngier #include <linux/msi.h> 25cc2d3216SMarc Zyngier #include <linux/of.h> 26cc2d3216SMarc Zyngier #include <linux/of_address.h> 27cc2d3216SMarc Zyngier #include <linux/of_irq.h> 28cc2d3216SMarc Zyngier #include <linux/of_pci.h> 29cc2d3216SMarc Zyngier #include <linux/of_platform.h> 30cc2d3216SMarc Zyngier #include <linux/percpu.h> 31cc2d3216SMarc Zyngier #include <linux/slab.h> 32cc2d3216SMarc Zyngier 3341a83e06SJoel Porquet #include <linux/irqchip.h> 34cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 35cc2d3216SMarc Zyngier 36cc2d3216SMarc Zyngier #include <asm/cacheflush.h> 37cc2d3216SMarc Zyngier #include <asm/cputype.h> 38cc2d3216SMarc Zyngier #include <asm/exception.h> 39cc2d3216SMarc Zyngier 4067510ccaSRobert Richter #include "irq-gic-common.h" 4167510ccaSRobert Richter 4294100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4394100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 44cc2d3216SMarc Zyngier 45c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 46c48ed51cSMarc Zyngier 47cc2d3216SMarc Zyngier /* 48cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 49cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 50cc2d3216SMarc Zyngier * CPU. 51cc2d3216SMarc Zyngier */ 52cc2d3216SMarc Zyngier struct its_collection { 53cc2d3216SMarc Zyngier u64 target_address; 54cc2d3216SMarc Zyngier u16 col_id; 55cc2d3216SMarc Zyngier }; 56cc2d3216SMarc Zyngier 57cc2d3216SMarc Zyngier /* 58*466b7d16SShanker Donthineni * The ITS_BASER structure - contains memory information and cached 59*466b7d16SShanker Donthineni * value of BASER register configuration. 60*466b7d16SShanker Donthineni */ 61*466b7d16SShanker Donthineni struct its_baser { 62*466b7d16SShanker Donthineni void *base; 63*466b7d16SShanker Donthineni u64 val; 64*466b7d16SShanker Donthineni u32 order; 65*466b7d16SShanker Donthineni }; 66*466b7d16SShanker Donthineni 67*466b7d16SShanker Donthineni /* 68cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 69841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 70841514abSMarc Zyngier * list of devices writing to it. 71cc2d3216SMarc Zyngier */ 72cc2d3216SMarc Zyngier struct its_node { 73cc2d3216SMarc Zyngier raw_spinlock_t lock; 74cc2d3216SMarc Zyngier struct list_head entry; 75cc2d3216SMarc Zyngier void __iomem *base; 76cc2d3216SMarc Zyngier unsigned long phys_base; 77cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 78cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 79*466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 80cc2d3216SMarc Zyngier struct its_collection *collections; 81cc2d3216SMarc Zyngier struct list_head its_device_list; 82cc2d3216SMarc Zyngier u64 flags; 83cc2d3216SMarc Zyngier u32 ite_size; 84*466b7d16SShanker Donthineni u32 device_ids; 85cc2d3216SMarc Zyngier }; 86cc2d3216SMarc Zyngier 87cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 88cc2d3216SMarc Zyngier 892eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 902eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 912eca0d6cSShanker Donthineni 92591e5becSMarc Zyngier struct event_lpi_map { 93591e5becSMarc Zyngier unsigned long *lpi_map; 94591e5becSMarc Zyngier u16 *col_map; 95591e5becSMarc Zyngier irq_hw_number_t lpi_base; 96591e5becSMarc Zyngier int nr_lpis; 97591e5becSMarc Zyngier }; 98591e5becSMarc Zyngier 99cc2d3216SMarc Zyngier /* 100cc2d3216SMarc Zyngier * The ITS view of a device - belongs to an ITS, a collection, owns an 101cc2d3216SMarc Zyngier * interrupt translation table, and a list of interrupts. 102cc2d3216SMarc Zyngier */ 103cc2d3216SMarc Zyngier struct its_device { 104cc2d3216SMarc Zyngier struct list_head entry; 105cc2d3216SMarc Zyngier struct its_node *its; 106591e5becSMarc Zyngier struct event_lpi_map event_map; 107cc2d3216SMarc Zyngier void *itt; 108cc2d3216SMarc Zyngier u32 nr_ites; 109cc2d3216SMarc Zyngier u32 device_id; 110cc2d3216SMarc Zyngier }; 111cc2d3216SMarc Zyngier 1121ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 1131ac19ca6SMarc Zyngier static DEFINE_SPINLOCK(its_lock); 1141ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 1151ac19ca6SMarc Zyngier 1161ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 1171ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 1181ac19ca6SMarc Zyngier 119591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 120591e5becSMarc Zyngier u32 event) 121591e5becSMarc Zyngier { 122591e5becSMarc Zyngier struct its_node *its = its_dev->its; 123591e5becSMarc Zyngier 124591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 125591e5becSMarc Zyngier } 126591e5becSMarc Zyngier 127cc2d3216SMarc Zyngier /* 128cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 129cc2d3216SMarc Zyngier * block. 130cc2d3216SMarc Zyngier */ 131cc2d3216SMarc Zyngier struct its_cmd_desc { 132cc2d3216SMarc Zyngier union { 133cc2d3216SMarc Zyngier struct { 134cc2d3216SMarc Zyngier struct its_device *dev; 135cc2d3216SMarc Zyngier u32 event_id; 136cc2d3216SMarc Zyngier } its_inv_cmd; 137cc2d3216SMarc Zyngier 138cc2d3216SMarc Zyngier struct { 139cc2d3216SMarc Zyngier struct its_device *dev; 140cc2d3216SMarc Zyngier u32 event_id; 141cc2d3216SMarc Zyngier } its_int_cmd; 142cc2d3216SMarc Zyngier 143cc2d3216SMarc Zyngier struct { 144cc2d3216SMarc Zyngier struct its_device *dev; 145cc2d3216SMarc Zyngier int valid; 146cc2d3216SMarc Zyngier } its_mapd_cmd; 147cc2d3216SMarc Zyngier 148cc2d3216SMarc Zyngier struct { 149cc2d3216SMarc Zyngier struct its_collection *col; 150cc2d3216SMarc Zyngier int valid; 151cc2d3216SMarc Zyngier } its_mapc_cmd; 152cc2d3216SMarc Zyngier 153cc2d3216SMarc Zyngier struct { 154cc2d3216SMarc Zyngier struct its_device *dev; 155cc2d3216SMarc Zyngier u32 phys_id; 156cc2d3216SMarc Zyngier u32 event_id; 157cc2d3216SMarc Zyngier } its_mapvi_cmd; 158cc2d3216SMarc Zyngier 159cc2d3216SMarc Zyngier struct { 160cc2d3216SMarc Zyngier struct its_device *dev; 161cc2d3216SMarc Zyngier struct its_collection *col; 162591e5becSMarc Zyngier u32 event_id; 163cc2d3216SMarc Zyngier } its_movi_cmd; 164cc2d3216SMarc Zyngier 165cc2d3216SMarc Zyngier struct { 166cc2d3216SMarc Zyngier struct its_device *dev; 167cc2d3216SMarc Zyngier u32 event_id; 168cc2d3216SMarc Zyngier } its_discard_cmd; 169cc2d3216SMarc Zyngier 170cc2d3216SMarc Zyngier struct { 171cc2d3216SMarc Zyngier struct its_collection *col; 172cc2d3216SMarc Zyngier } its_invall_cmd; 173cc2d3216SMarc Zyngier }; 174cc2d3216SMarc Zyngier }; 175cc2d3216SMarc Zyngier 176cc2d3216SMarc Zyngier /* 177cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 178cc2d3216SMarc Zyngier */ 179cc2d3216SMarc Zyngier struct its_cmd_block { 180cc2d3216SMarc Zyngier u64 raw_cmd[4]; 181cc2d3216SMarc Zyngier }; 182cc2d3216SMarc Zyngier 183cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 184cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 185cc2d3216SMarc Zyngier 186cc2d3216SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_cmd_block *, 187cc2d3216SMarc Zyngier struct its_cmd_desc *); 188cc2d3216SMarc Zyngier 189cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 190cc2d3216SMarc Zyngier { 191cc2d3216SMarc Zyngier cmd->raw_cmd[0] &= ~0xffUL; 192cc2d3216SMarc Zyngier cmd->raw_cmd[0] |= cmd_nr; 193cc2d3216SMarc Zyngier } 194cc2d3216SMarc Zyngier 195cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 196cc2d3216SMarc Zyngier { 1977e195ba0SAndre Przywara cmd->raw_cmd[0] &= BIT_ULL(32) - 1; 198cc2d3216SMarc Zyngier cmd->raw_cmd[0] |= ((u64)devid) << 32; 199cc2d3216SMarc Zyngier } 200cc2d3216SMarc Zyngier 201cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 202cc2d3216SMarc Zyngier { 203cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= ~0xffffffffUL; 204cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= id; 205cc2d3216SMarc Zyngier } 206cc2d3216SMarc Zyngier 207cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 208cc2d3216SMarc Zyngier { 209cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= 0xffffffffUL; 210cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= ((u64)phys_id) << 32; 211cc2d3216SMarc Zyngier } 212cc2d3216SMarc Zyngier 213cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 214cc2d3216SMarc Zyngier { 215cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= ~0x1fUL; 216cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= size & 0x1f; 217cc2d3216SMarc Zyngier } 218cc2d3216SMarc Zyngier 219cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 220cc2d3216SMarc Zyngier { 221cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~0xffffffffffffUL; 222cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= itt_addr & 0xffffffffff00UL; 223cc2d3216SMarc Zyngier } 224cc2d3216SMarc Zyngier 225cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 226cc2d3216SMarc Zyngier { 227cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~(1UL << 63); 228cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= ((u64)!!valid) << 63; 229cc2d3216SMarc Zyngier } 230cc2d3216SMarc Zyngier 231cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 232cc2d3216SMarc Zyngier { 233cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~(0xffffffffUL << 16); 234cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= (target_addr & (0xffffffffUL << 16)); 235cc2d3216SMarc Zyngier } 236cc2d3216SMarc Zyngier 237cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 238cc2d3216SMarc Zyngier { 239cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~0xffffUL; 240cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= col; 241cc2d3216SMarc Zyngier } 242cc2d3216SMarc Zyngier 243cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 244cc2d3216SMarc Zyngier { 245cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 246cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 247cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 248cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 249cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 250cc2d3216SMarc Zyngier } 251cc2d3216SMarc Zyngier 252cc2d3216SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_cmd_block *cmd, 253cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 254cc2d3216SMarc Zyngier { 255cc2d3216SMarc Zyngier unsigned long itt_addr; 256c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 257cc2d3216SMarc Zyngier 258cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 259cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 260cc2d3216SMarc Zyngier 261cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 262cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 263cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 264cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 265cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 266cc2d3216SMarc Zyngier 267cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 268cc2d3216SMarc Zyngier 269591e5becSMarc Zyngier return NULL; 270cc2d3216SMarc Zyngier } 271cc2d3216SMarc Zyngier 272cc2d3216SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_cmd_block *cmd, 273cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 274cc2d3216SMarc Zyngier { 275cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 276cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 277cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 278cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 279cc2d3216SMarc Zyngier 280cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 281cc2d3216SMarc Zyngier 282cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 283cc2d3216SMarc Zyngier } 284cc2d3216SMarc Zyngier 285cc2d3216SMarc Zyngier static struct its_collection *its_build_mapvi_cmd(struct its_cmd_block *cmd, 286cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 287cc2d3216SMarc Zyngier { 288591e5becSMarc Zyngier struct its_collection *col; 289591e5becSMarc Zyngier 290591e5becSMarc Zyngier col = dev_event_to_col(desc->its_mapvi_cmd.dev, 291591e5becSMarc Zyngier desc->its_mapvi_cmd.event_id); 292591e5becSMarc Zyngier 293cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPVI); 294cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapvi_cmd.dev->device_id); 295cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_mapvi_cmd.event_id); 296cc2d3216SMarc Zyngier its_encode_phys_id(cmd, desc->its_mapvi_cmd.phys_id); 297591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 298cc2d3216SMarc Zyngier 299cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 300cc2d3216SMarc Zyngier 301591e5becSMarc Zyngier return col; 302cc2d3216SMarc Zyngier } 303cc2d3216SMarc Zyngier 304cc2d3216SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_cmd_block *cmd, 305cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 306cc2d3216SMarc Zyngier { 307591e5becSMarc Zyngier struct its_collection *col; 308591e5becSMarc Zyngier 309591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 310591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 311591e5becSMarc Zyngier 312cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 313cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 314591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 315cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 316cc2d3216SMarc Zyngier 317cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 318cc2d3216SMarc Zyngier 319591e5becSMarc Zyngier return col; 320cc2d3216SMarc Zyngier } 321cc2d3216SMarc Zyngier 322cc2d3216SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_cmd_block *cmd, 323cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 324cc2d3216SMarc Zyngier { 325591e5becSMarc Zyngier struct its_collection *col; 326591e5becSMarc Zyngier 327591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 328591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 329591e5becSMarc Zyngier 330cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 331cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 332cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 333cc2d3216SMarc Zyngier 334cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 335cc2d3216SMarc Zyngier 336591e5becSMarc Zyngier return col; 337cc2d3216SMarc Zyngier } 338cc2d3216SMarc Zyngier 339cc2d3216SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_cmd_block *cmd, 340cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 341cc2d3216SMarc Zyngier { 342591e5becSMarc Zyngier struct its_collection *col; 343591e5becSMarc Zyngier 344591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 345591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 346591e5becSMarc Zyngier 347cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 348cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 349cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 350cc2d3216SMarc Zyngier 351cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 352cc2d3216SMarc Zyngier 353591e5becSMarc Zyngier return col; 354cc2d3216SMarc Zyngier } 355cc2d3216SMarc Zyngier 356cc2d3216SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd, 357cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 358cc2d3216SMarc Zyngier { 359cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 360cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 361cc2d3216SMarc Zyngier 362cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 363cc2d3216SMarc Zyngier 364cc2d3216SMarc Zyngier return NULL; 365cc2d3216SMarc Zyngier } 366cc2d3216SMarc Zyngier 367cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 368cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 369cc2d3216SMarc Zyngier { 370cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 371cc2d3216SMarc Zyngier } 372cc2d3216SMarc Zyngier 373cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 374cc2d3216SMarc Zyngier { 375cc2d3216SMarc Zyngier int widx; 376cc2d3216SMarc Zyngier int ridx; 377cc2d3216SMarc Zyngier 378cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 379cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 380cc2d3216SMarc Zyngier 381cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 382cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 383cc2d3216SMarc Zyngier return 1; 384cc2d3216SMarc Zyngier 385cc2d3216SMarc Zyngier return 0; 386cc2d3216SMarc Zyngier } 387cc2d3216SMarc Zyngier 388cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 389cc2d3216SMarc Zyngier { 390cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 391cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 392cc2d3216SMarc Zyngier 393cc2d3216SMarc Zyngier while (its_queue_full(its)) { 394cc2d3216SMarc Zyngier count--; 395cc2d3216SMarc Zyngier if (!count) { 396cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 397cc2d3216SMarc Zyngier return NULL; 398cc2d3216SMarc Zyngier } 399cc2d3216SMarc Zyngier cpu_relax(); 400cc2d3216SMarc Zyngier udelay(1); 401cc2d3216SMarc Zyngier } 402cc2d3216SMarc Zyngier 403cc2d3216SMarc Zyngier cmd = its->cmd_write++; 404cc2d3216SMarc Zyngier 405cc2d3216SMarc Zyngier /* Handle queue wrapping */ 406cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 407cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 408cc2d3216SMarc Zyngier 409cc2d3216SMarc Zyngier return cmd; 410cc2d3216SMarc Zyngier } 411cc2d3216SMarc Zyngier 412cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 413cc2d3216SMarc Zyngier { 414cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 415cc2d3216SMarc Zyngier 416cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 417cc2d3216SMarc Zyngier 418cc2d3216SMarc Zyngier return its->cmd_write; 419cc2d3216SMarc Zyngier } 420cc2d3216SMarc Zyngier 421cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 422cc2d3216SMarc Zyngier { 423cc2d3216SMarc Zyngier /* 424cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 425cc2d3216SMarc Zyngier * the ITS. 426cc2d3216SMarc Zyngier */ 427cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 428cc2d3216SMarc Zyngier __flush_dcache_area(cmd, sizeof(*cmd)); 429cc2d3216SMarc Zyngier else 430cc2d3216SMarc Zyngier dsb(ishst); 431cc2d3216SMarc Zyngier } 432cc2d3216SMarc Zyngier 433cc2d3216SMarc Zyngier static void its_wait_for_range_completion(struct its_node *its, 434cc2d3216SMarc Zyngier struct its_cmd_block *from, 435cc2d3216SMarc Zyngier struct its_cmd_block *to) 436cc2d3216SMarc Zyngier { 437cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 438cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 439cc2d3216SMarc Zyngier 440cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 441cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 442cc2d3216SMarc Zyngier 443cc2d3216SMarc Zyngier while (1) { 444cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 445cc2d3216SMarc Zyngier if (rd_idx >= to_idx || rd_idx < from_idx) 446cc2d3216SMarc Zyngier break; 447cc2d3216SMarc Zyngier 448cc2d3216SMarc Zyngier count--; 449cc2d3216SMarc Zyngier if (!count) { 450cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue timeout\n"); 451cc2d3216SMarc Zyngier return; 452cc2d3216SMarc Zyngier } 453cc2d3216SMarc Zyngier cpu_relax(); 454cc2d3216SMarc Zyngier udelay(1); 455cc2d3216SMarc Zyngier } 456cc2d3216SMarc Zyngier } 457cc2d3216SMarc Zyngier 458cc2d3216SMarc Zyngier static void its_send_single_command(struct its_node *its, 459cc2d3216SMarc Zyngier its_cmd_builder_t builder, 460cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 461cc2d3216SMarc Zyngier { 462cc2d3216SMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; 463cc2d3216SMarc Zyngier struct its_collection *sync_col; 4643e39e8f5SMarc Zyngier unsigned long flags; 465cc2d3216SMarc Zyngier 4663e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 467cc2d3216SMarc Zyngier 468cc2d3216SMarc Zyngier cmd = its_allocate_entry(its); 469cc2d3216SMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ 470cc2d3216SMarc Zyngier pr_err_ratelimited("ITS can't allocate, dropping command\n"); 4713e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 472cc2d3216SMarc Zyngier return; 473cc2d3216SMarc Zyngier } 474cc2d3216SMarc Zyngier sync_col = builder(cmd, desc); 475cc2d3216SMarc Zyngier its_flush_cmd(its, cmd); 476cc2d3216SMarc Zyngier 477cc2d3216SMarc Zyngier if (sync_col) { 478cc2d3216SMarc Zyngier sync_cmd = its_allocate_entry(its); 479cc2d3216SMarc Zyngier if (!sync_cmd) { 480cc2d3216SMarc Zyngier pr_err_ratelimited("ITS can't SYNC, skipping\n"); 481cc2d3216SMarc Zyngier goto post; 482cc2d3216SMarc Zyngier } 483cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 484cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 485cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 486cc2d3216SMarc Zyngier its_flush_cmd(its, sync_cmd); 487cc2d3216SMarc Zyngier } 488cc2d3216SMarc Zyngier 489cc2d3216SMarc Zyngier post: 490cc2d3216SMarc Zyngier next_cmd = its_post_commands(its); 4913e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 492cc2d3216SMarc Zyngier 493cc2d3216SMarc Zyngier its_wait_for_range_completion(its, cmd, next_cmd); 494cc2d3216SMarc Zyngier } 495cc2d3216SMarc Zyngier 496cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 497cc2d3216SMarc Zyngier { 498cc2d3216SMarc Zyngier struct its_cmd_desc desc; 499cc2d3216SMarc Zyngier 500cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 501cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 502cc2d3216SMarc Zyngier 503cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 504cc2d3216SMarc Zyngier } 505cc2d3216SMarc Zyngier 506cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 507cc2d3216SMarc Zyngier { 508cc2d3216SMarc Zyngier struct its_cmd_desc desc; 509cc2d3216SMarc Zyngier 510cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 511cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 512cc2d3216SMarc Zyngier 513cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 514cc2d3216SMarc Zyngier } 515cc2d3216SMarc Zyngier 516cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 517cc2d3216SMarc Zyngier int valid) 518cc2d3216SMarc Zyngier { 519cc2d3216SMarc Zyngier struct its_cmd_desc desc; 520cc2d3216SMarc Zyngier 521cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 522cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 523cc2d3216SMarc Zyngier 524cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 525cc2d3216SMarc Zyngier } 526cc2d3216SMarc Zyngier 527cc2d3216SMarc Zyngier static void its_send_mapvi(struct its_device *dev, u32 irq_id, u32 id) 528cc2d3216SMarc Zyngier { 529cc2d3216SMarc Zyngier struct its_cmd_desc desc; 530cc2d3216SMarc Zyngier 531cc2d3216SMarc Zyngier desc.its_mapvi_cmd.dev = dev; 532cc2d3216SMarc Zyngier desc.its_mapvi_cmd.phys_id = irq_id; 533cc2d3216SMarc Zyngier desc.its_mapvi_cmd.event_id = id; 534cc2d3216SMarc Zyngier 535cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapvi_cmd, &desc); 536cc2d3216SMarc Zyngier } 537cc2d3216SMarc Zyngier 538cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 539cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 540cc2d3216SMarc Zyngier { 541cc2d3216SMarc Zyngier struct its_cmd_desc desc; 542cc2d3216SMarc Zyngier 543cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 544cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 545591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 546cc2d3216SMarc Zyngier 547cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 548cc2d3216SMarc Zyngier } 549cc2d3216SMarc Zyngier 550cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 551cc2d3216SMarc Zyngier { 552cc2d3216SMarc Zyngier struct its_cmd_desc desc; 553cc2d3216SMarc Zyngier 554cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 555cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 556cc2d3216SMarc Zyngier 557cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 558cc2d3216SMarc Zyngier } 559cc2d3216SMarc Zyngier 560cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 561cc2d3216SMarc Zyngier { 562cc2d3216SMarc Zyngier struct its_cmd_desc desc; 563cc2d3216SMarc Zyngier 564cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 565cc2d3216SMarc Zyngier 566cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 567cc2d3216SMarc Zyngier } 568c48ed51cSMarc Zyngier 569c48ed51cSMarc Zyngier /* 570c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 571c48ed51cSMarc Zyngier */ 572c48ed51cSMarc Zyngier 573c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 574c48ed51cSMarc Zyngier { 575c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 576591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 577c48ed51cSMarc Zyngier } 578c48ed51cSMarc Zyngier 579c48ed51cSMarc Zyngier static void lpi_set_config(struct irq_data *d, bool enable) 580c48ed51cSMarc Zyngier { 581c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 582c48ed51cSMarc Zyngier irq_hw_number_t hwirq = d->hwirq; 583c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 584c48ed51cSMarc Zyngier u8 *cfg = page_address(gic_rdists->prop_page) + hwirq - 8192; 585c48ed51cSMarc Zyngier 586c48ed51cSMarc Zyngier if (enable) 587c48ed51cSMarc Zyngier *cfg |= LPI_PROP_ENABLED; 588c48ed51cSMarc Zyngier else 589c48ed51cSMarc Zyngier *cfg &= ~LPI_PROP_ENABLED; 590c48ed51cSMarc Zyngier 591c48ed51cSMarc Zyngier /* 592c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 593c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 594c48ed51cSMarc Zyngier * Humpf... 595c48ed51cSMarc Zyngier */ 596c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 597c48ed51cSMarc Zyngier __flush_dcache_area(cfg, sizeof(*cfg)); 598c48ed51cSMarc Zyngier else 599c48ed51cSMarc Zyngier dsb(ishst); 600c48ed51cSMarc Zyngier its_send_inv(its_dev, id); 601c48ed51cSMarc Zyngier } 602c48ed51cSMarc Zyngier 603c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 604c48ed51cSMarc Zyngier { 605c48ed51cSMarc Zyngier lpi_set_config(d, false); 606c48ed51cSMarc Zyngier } 607c48ed51cSMarc Zyngier 608c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 609c48ed51cSMarc Zyngier { 610c48ed51cSMarc Zyngier lpi_set_config(d, true); 611c48ed51cSMarc Zyngier } 612c48ed51cSMarc Zyngier 613c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 614c48ed51cSMarc Zyngier bool force) 615c48ed51cSMarc Zyngier { 616c48ed51cSMarc Zyngier unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask); 617c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 618c48ed51cSMarc Zyngier struct its_collection *target_col; 619c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 620c48ed51cSMarc Zyngier 621c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 622c48ed51cSMarc Zyngier return -EINVAL; 623c48ed51cSMarc Zyngier 624c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 625c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 626591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 627c48ed51cSMarc Zyngier 628c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 629c48ed51cSMarc Zyngier } 630c48ed51cSMarc Zyngier 631b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 632b48ac83dSMarc Zyngier { 633b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 634b48ac83dSMarc Zyngier struct its_node *its; 635b48ac83dSMarc Zyngier u64 addr; 636b48ac83dSMarc Zyngier 637b48ac83dSMarc Zyngier its = its_dev->its; 638b48ac83dSMarc Zyngier addr = its->phys_base + GITS_TRANSLATER; 639b48ac83dSMarc Zyngier 640b48ac83dSMarc Zyngier msg->address_lo = addr & ((1UL << 32) - 1); 641b48ac83dSMarc Zyngier msg->address_hi = addr >> 32; 642b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 643b48ac83dSMarc Zyngier } 644b48ac83dSMarc Zyngier 645c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 646c48ed51cSMarc Zyngier .name = "ITS", 647c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 648c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 649004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 650c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 651b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 652b48ac83dSMarc Zyngier }; 653b48ac83dSMarc Zyngier 654bf9529f8SMarc Zyngier /* 655bf9529f8SMarc Zyngier * How we allocate LPIs: 656bf9529f8SMarc Zyngier * 657bf9529f8SMarc Zyngier * The GIC has id_bits bits for interrupt identifiers. From there, we 658bf9529f8SMarc Zyngier * must subtract 8192 which are reserved for SGIs/PPIs/SPIs. Then, as 659bf9529f8SMarc Zyngier * we allocate LPIs by chunks of 32, we can shift the whole thing by 5 660bf9529f8SMarc Zyngier * bits to the right. 661bf9529f8SMarc Zyngier * 662bf9529f8SMarc Zyngier * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations. 663bf9529f8SMarc Zyngier */ 664bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK_SHIFT 5 665bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK (1 << IRQS_PER_CHUNK_SHIFT) 666bf9529f8SMarc Zyngier 667bf9529f8SMarc Zyngier static unsigned long *lpi_bitmap; 668bf9529f8SMarc Zyngier static u32 lpi_chunks; 669bf9529f8SMarc Zyngier static DEFINE_SPINLOCK(lpi_lock); 670bf9529f8SMarc Zyngier 671bf9529f8SMarc Zyngier static int its_lpi_to_chunk(int lpi) 672bf9529f8SMarc Zyngier { 673bf9529f8SMarc Zyngier return (lpi - 8192) >> IRQS_PER_CHUNK_SHIFT; 674bf9529f8SMarc Zyngier } 675bf9529f8SMarc Zyngier 676bf9529f8SMarc Zyngier static int its_chunk_to_lpi(int chunk) 677bf9529f8SMarc Zyngier { 678bf9529f8SMarc Zyngier return (chunk << IRQS_PER_CHUNK_SHIFT) + 8192; 679bf9529f8SMarc Zyngier } 680bf9529f8SMarc Zyngier 68104a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 682bf9529f8SMarc Zyngier { 683bf9529f8SMarc Zyngier lpi_chunks = its_lpi_to_chunk(1UL << id_bits); 684bf9529f8SMarc Zyngier 685bf9529f8SMarc Zyngier lpi_bitmap = kzalloc(BITS_TO_LONGS(lpi_chunks) * sizeof(long), 686bf9529f8SMarc Zyngier GFP_KERNEL); 687bf9529f8SMarc Zyngier if (!lpi_bitmap) { 688bf9529f8SMarc Zyngier lpi_chunks = 0; 689bf9529f8SMarc Zyngier return -ENOMEM; 690bf9529f8SMarc Zyngier } 691bf9529f8SMarc Zyngier 692bf9529f8SMarc Zyngier pr_info("ITS: Allocated %d chunks for LPIs\n", (int)lpi_chunks); 693bf9529f8SMarc Zyngier return 0; 694bf9529f8SMarc Zyngier } 695bf9529f8SMarc Zyngier 696bf9529f8SMarc Zyngier static unsigned long *its_lpi_alloc_chunks(int nr_irqs, int *base, int *nr_ids) 697bf9529f8SMarc Zyngier { 698bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 699bf9529f8SMarc Zyngier int chunk_id; 700bf9529f8SMarc Zyngier int nr_chunks; 701bf9529f8SMarc Zyngier int i; 702bf9529f8SMarc Zyngier 703bf9529f8SMarc Zyngier nr_chunks = DIV_ROUND_UP(nr_irqs, IRQS_PER_CHUNK); 704bf9529f8SMarc Zyngier 705bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 706bf9529f8SMarc Zyngier 707bf9529f8SMarc Zyngier do { 708bf9529f8SMarc Zyngier chunk_id = bitmap_find_next_zero_area(lpi_bitmap, lpi_chunks, 709bf9529f8SMarc Zyngier 0, nr_chunks, 0); 710bf9529f8SMarc Zyngier if (chunk_id < lpi_chunks) 711bf9529f8SMarc Zyngier break; 712bf9529f8SMarc Zyngier 713bf9529f8SMarc Zyngier nr_chunks--; 714bf9529f8SMarc Zyngier } while (nr_chunks > 0); 715bf9529f8SMarc Zyngier 716bf9529f8SMarc Zyngier if (!nr_chunks) 717bf9529f8SMarc Zyngier goto out; 718bf9529f8SMarc Zyngier 719bf9529f8SMarc Zyngier bitmap = kzalloc(BITS_TO_LONGS(nr_chunks * IRQS_PER_CHUNK) * sizeof (long), 720bf9529f8SMarc Zyngier GFP_ATOMIC); 721bf9529f8SMarc Zyngier if (!bitmap) 722bf9529f8SMarc Zyngier goto out; 723bf9529f8SMarc Zyngier 724bf9529f8SMarc Zyngier for (i = 0; i < nr_chunks; i++) 725bf9529f8SMarc Zyngier set_bit(chunk_id + i, lpi_bitmap); 726bf9529f8SMarc Zyngier 727bf9529f8SMarc Zyngier *base = its_chunk_to_lpi(chunk_id); 728bf9529f8SMarc Zyngier *nr_ids = nr_chunks * IRQS_PER_CHUNK; 729bf9529f8SMarc Zyngier 730bf9529f8SMarc Zyngier out: 731bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 732bf9529f8SMarc Zyngier 733c8415b94SMarc Zyngier if (!bitmap) 734c8415b94SMarc Zyngier *base = *nr_ids = 0; 735c8415b94SMarc Zyngier 736bf9529f8SMarc Zyngier return bitmap; 737bf9529f8SMarc Zyngier } 738bf9529f8SMarc Zyngier 739591e5becSMarc Zyngier static void its_lpi_free(struct event_lpi_map *map) 740bf9529f8SMarc Zyngier { 741591e5becSMarc Zyngier int base = map->lpi_base; 742591e5becSMarc Zyngier int nr_ids = map->nr_lpis; 743bf9529f8SMarc Zyngier int lpi; 744bf9529f8SMarc Zyngier 745bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 746bf9529f8SMarc Zyngier 747bf9529f8SMarc Zyngier for (lpi = base; lpi < (base + nr_ids); lpi += IRQS_PER_CHUNK) { 748bf9529f8SMarc Zyngier int chunk = its_lpi_to_chunk(lpi); 749bf9529f8SMarc Zyngier BUG_ON(chunk > lpi_chunks); 750bf9529f8SMarc Zyngier if (test_bit(chunk, lpi_bitmap)) { 751bf9529f8SMarc Zyngier clear_bit(chunk, lpi_bitmap); 752bf9529f8SMarc Zyngier } else { 753bf9529f8SMarc Zyngier pr_err("Bad LPI chunk %d\n", chunk); 754bf9529f8SMarc Zyngier } 755bf9529f8SMarc Zyngier } 756bf9529f8SMarc Zyngier 757bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 758bf9529f8SMarc Zyngier 759591e5becSMarc Zyngier kfree(map->lpi_map); 760591e5becSMarc Zyngier kfree(map->col_map); 761bf9529f8SMarc Zyngier } 7621ac19ca6SMarc Zyngier 7631ac19ca6SMarc Zyngier /* 7641ac19ca6SMarc Zyngier * We allocate 64kB for PROPBASE. That gives us at most 64K LPIs to 7651ac19ca6SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 7661ac19ca6SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 7671ac19ca6SMarc Zyngier */ 7681ac19ca6SMarc Zyngier #define LPI_PROPBASE_SZ SZ_64K 7691ac19ca6SMarc Zyngier #define LPI_PENDBASE_SZ (LPI_PROPBASE_SZ / 8 + SZ_1K) 7701ac19ca6SMarc Zyngier 7711ac19ca6SMarc Zyngier /* 7721ac19ca6SMarc Zyngier * This is how many bits of ID we need, including the useless ones. 7731ac19ca6SMarc Zyngier */ 7741ac19ca6SMarc Zyngier #define LPI_NRBITS ilog2(LPI_PROPBASE_SZ + SZ_8K) 7751ac19ca6SMarc Zyngier 7761ac19ca6SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 7771ac19ca6SMarc Zyngier 7781ac19ca6SMarc Zyngier static int __init its_alloc_lpi_tables(void) 7791ac19ca6SMarc Zyngier { 7801ac19ca6SMarc Zyngier phys_addr_t paddr; 7811ac19ca6SMarc Zyngier 7821ac19ca6SMarc Zyngier gic_rdists->prop_page = alloc_pages(GFP_NOWAIT, 7831ac19ca6SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 7841ac19ca6SMarc Zyngier if (!gic_rdists->prop_page) { 7851ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 7861ac19ca6SMarc Zyngier return -ENOMEM; 7871ac19ca6SMarc Zyngier } 7881ac19ca6SMarc Zyngier 7891ac19ca6SMarc Zyngier paddr = page_to_phys(gic_rdists->prop_page); 7901ac19ca6SMarc Zyngier pr_info("GIC: using LPI property table @%pa\n", &paddr); 7911ac19ca6SMarc Zyngier 7921ac19ca6SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 7931ac19ca6SMarc Zyngier memset(page_address(gic_rdists->prop_page), 7941ac19ca6SMarc Zyngier LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, 7951ac19ca6SMarc Zyngier LPI_PROPBASE_SZ); 7961ac19ca6SMarc Zyngier 7971ac19ca6SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 7981ac19ca6SMarc Zyngier __flush_dcache_area(page_address(gic_rdists->prop_page), LPI_PROPBASE_SZ); 7991ac19ca6SMarc Zyngier 8001ac19ca6SMarc Zyngier return 0; 8011ac19ca6SMarc Zyngier } 8021ac19ca6SMarc Zyngier 8031ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 8041ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 8051ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 8061ac19ca6SMarc Zyngier [GITS_BASER_TYPE_CPU] = "Physical CPUs", 8071ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 8081ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 8091ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 8101ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 8111ac19ca6SMarc Zyngier }; 8121ac19ca6SMarc Zyngier 8131ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 8141ac19ca6SMarc Zyngier { 8151ac19ca6SMarc Zyngier int i; 8161ac19ca6SMarc Zyngier 8171ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 8181a485f4dSShanker Donthineni if (its->tables[i].base) { 8191a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 8201a485f4dSShanker Donthineni its->tables[i].order); 8211a485f4dSShanker Donthineni its->tables[i].base = NULL; 8221ac19ca6SMarc Zyngier } 8231ac19ca6SMarc Zyngier } 8241ac19ca6SMarc Zyngier } 8251ac19ca6SMarc Zyngier 826841514abSMarc Zyngier static int its_alloc_tables(const char *node_name, struct its_node *its) 8271ac19ca6SMarc Zyngier { 8281ac19ca6SMarc Zyngier int err; 8291ac19ca6SMarc Zyngier int i; 830790b57aeSYun Wu int psz = SZ_64K; 8311ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 83294100970SRobert Richter u64 cache; 83394100970SRobert Richter u64 typer; 83494100970SRobert Richter u32 ids; 83594100970SRobert Richter 83694100970SRobert Richter if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) { 83794100970SRobert Richter /* 83894100970SRobert Richter * erratum 22375: only alloc 8MB table size 83994100970SRobert Richter * erratum 24313: ignore memory access type 84094100970SRobert Richter */ 84194100970SRobert Richter cache = 0; 84294100970SRobert Richter ids = 0x14; /* 20 bits, 8MB */ 84394100970SRobert Richter } else { 84494100970SRobert Richter cache = GITS_BASER_WaWb; 84594100970SRobert Richter typer = readq_relaxed(its->base + GITS_TYPER); 84694100970SRobert Richter ids = GITS_TYPER_DEVBITS(typer); 84794100970SRobert Richter } 8481ac19ca6SMarc Zyngier 849*466b7d16SShanker Donthineni its->device_ids = ids; 850*466b7d16SShanker Donthineni 8511ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 8521ac19ca6SMarc Zyngier u64 val = readq_relaxed(its->base + GITS_BASER + i * 8); 8531ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 8541ac19ca6SMarc Zyngier u64 entry_size = GITS_BASER_ENTRY_SIZE(val); 855790b57aeSYun Wu int order = get_order(psz); 85630f21363SRobert Richter int alloc_pages; 8571ac19ca6SMarc Zyngier u64 tmp; 8581ac19ca6SMarc Zyngier void *base; 8591ac19ca6SMarc Zyngier 8601ac19ca6SMarc Zyngier if (type == GITS_BASER_TYPE_NONE) 8611ac19ca6SMarc Zyngier continue; 8621ac19ca6SMarc Zyngier 863f54b97edSMarc Zyngier /* 864f54b97edSMarc Zyngier * Allocate as many entries as required to fit the 865f54b97edSMarc Zyngier * range of device IDs that the ITS can grok... The ID 866f54b97edSMarc Zyngier * space being incredibly sparse, this results in a 867f54b97edSMarc Zyngier * massive waste of memory. 868f54b97edSMarc Zyngier * 869f54b97edSMarc Zyngier * For other tables, only allocate a single page. 870f54b97edSMarc Zyngier */ 871f54b97edSMarc Zyngier if (type == GITS_BASER_TYPE_DEVICE) { 8723ad2a5f5SMinghuan Lian /* 8733ad2a5f5SMinghuan Lian * 'order' was initialized earlier to the default page 8743ad2a5f5SMinghuan Lian * granule of the the ITS. We can't have an allocation 8753ad2a5f5SMinghuan Lian * smaller than that. If the requested allocation 8763ad2a5f5SMinghuan Lian * is smaller, round up to the default page granule. 8773ad2a5f5SMinghuan Lian */ 8783ad2a5f5SMinghuan Lian order = max(get_order((1UL << ids) * entry_size), 8793ad2a5f5SMinghuan Lian order); 8801d27704aSYun Wu if (order >= MAX_ORDER) { 8811d27704aSYun Wu order = MAX_ORDER - 1; 8821d27704aSYun Wu pr_warn("%s: Device Table too large, reduce its page order to %u\n", 883841514abSMarc Zyngier node_name, order); 8841d27704aSYun Wu } 885f54b97edSMarc Zyngier } 886f54b97edSMarc Zyngier 88718aa60ceSMarc Zyngier retry_alloc_baser: 8882eca0d6cSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 88930f21363SRobert Richter if (alloc_pages > GITS_BASER_PAGES_MAX) { 89030f21363SRobert Richter alloc_pages = GITS_BASER_PAGES_MAX; 89130f21363SRobert Richter order = get_order(GITS_BASER_PAGES_MAX * psz); 89230f21363SRobert Richter pr_warn("%s: Device Table too large, reduce its page order to %u (%u pages)\n", 89330f21363SRobert Richter node_name, order, alloc_pages); 89430f21363SRobert Richter } 89530f21363SRobert Richter 896f54b97edSMarc Zyngier base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 8971ac19ca6SMarc Zyngier if (!base) { 8981ac19ca6SMarc Zyngier err = -ENOMEM; 8991ac19ca6SMarc Zyngier goto out_free; 9001ac19ca6SMarc Zyngier } 9011ac19ca6SMarc Zyngier 9021a485f4dSShanker Donthineni its->tables[i].base = base; 9031a485f4dSShanker Donthineni its->tables[i].order = order; 9041ac19ca6SMarc Zyngier 9051ac19ca6SMarc Zyngier retry_baser: 9061ac19ca6SMarc Zyngier val = (virt_to_phys(base) | 9071ac19ca6SMarc Zyngier (type << GITS_BASER_TYPE_SHIFT) | 9081ac19ca6SMarc Zyngier ((entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 909241a386cSMarc Zyngier cache | 9101ac19ca6SMarc Zyngier shr | 9111ac19ca6SMarc Zyngier GITS_BASER_VALID); 9121ac19ca6SMarc Zyngier 9131ac19ca6SMarc Zyngier switch (psz) { 9141ac19ca6SMarc Zyngier case SZ_4K: 9151ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_4K; 9161ac19ca6SMarc Zyngier break; 9171ac19ca6SMarc Zyngier case SZ_16K: 9181ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_16K; 9191ac19ca6SMarc Zyngier break; 9201ac19ca6SMarc Zyngier case SZ_64K: 9211ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_64K; 9221ac19ca6SMarc Zyngier break; 9231ac19ca6SMarc Zyngier } 9241ac19ca6SMarc Zyngier 92530f21363SRobert Richter val |= alloc_pages - 1; 926*466b7d16SShanker Donthineni its->tables[i].val = val; 9271ac19ca6SMarc Zyngier 9281ac19ca6SMarc Zyngier writeq_relaxed(val, its->base + GITS_BASER + i * 8); 9291ac19ca6SMarc Zyngier tmp = readq_relaxed(its->base + GITS_BASER + i * 8); 9301ac19ca6SMarc Zyngier 9311ac19ca6SMarc Zyngier if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 9321ac19ca6SMarc Zyngier /* 9331ac19ca6SMarc Zyngier * Shareability didn't stick. Just use 9341ac19ca6SMarc Zyngier * whatever the read reported, which is likely 9351ac19ca6SMarc Zyngier * to be the only thing this redistributor 936241a386cSMarc Zyngier * supports. If that's zero, make it 937241a386cSMarc Zyngier * non-cacheable as well. 9381ac19ca6SMarc Zyngier */ 9391ac19ca6SMarc Zyngier shr = tmp & GITS_BASER_SHAREABILITY_MASK; 9405a9a8915SMarc Zyngier if (!shr) { 941241a386cSMarc Zyngier cache = GITS_BASER_nC; 9422eca0d6cSShanker Donthineni __flush_dcache_area(base, PAGE_ORDER_TO_SIZE(order)); 9435a9a8915SMarc Zyngier } 9441ac19ca6SMarc Zyngier goto retry_baser; 9451ac19ca6SMarc Zyngier } 9461ac19ca6SMarc Zyngier 9471ac19ca6SMarc Zyngier if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 9481ac19ca6SMarc Zyngier /* 9491ac19ca6SMarc Zyngier * Page size didn't stick. Let's try a smaller 9501ac19ca6SMarc Zyngier * size and retry. If we reach 4K, then 9511ac19ca6SMarc Zyngier * something is horribly wrong... 9521ac19ca6SMarc Zyngier */ 95318aa60ceSMarc Zyngier free_pages((unsigned long)base, order); 9541a485f4dSShanker Donthineni its->tables[i].base = NULL; 95518aa60ceSMarc Zyngier 9561ac19ca6SMarc Zyngier switch (psz) { 9571ac19ca6SMarc Zyngier case SZ_16K: 9581ac19ca6SMarc Zyngier psz = SZ_4K; 95918aa60ceSMarc Zyngier goto retry_alloc_baser; 9601ac19ca6SMarc Zyngier case SZ_64K: 9611ac19ca6SMarc Zyngier psz = SZ_16K; 96218aa60ceSMarc Zyngier goto retry_alloc_baser; 9631ac19ca6SMarc Zyngier } 9641ac19ca6SMarc Zyngier } 9651ac19ca6SMarc Zyngier 9661ac19ca6SMarc Zyngier if (val != tmp) { 9671ac19ca6SMarc Zyngier pr_err("ITS: %s: GITS_BASER%d doesn't stick: %lx %lx\n", 968841514abSMarc Zyngier node_name, i, 9691ac19ca6SMarc Zyngier (unsigned long) val, (unsigned long) tmp); 9701ac19ca6SMarc Zyngier err = -ENXIO; 9711ac19ca6SMarc Zyngier goto out_free; 9721ac19ca6SMarc Zyngier } 9731ac19ca6SMarc Zyngier 9741ac19ca6SMarc Zyngier pr_info("ITS: allocated %d %s @%lx (psz %dK, shr %d)\n", 9752eca0d6cSShanker Donthineni (int)(PAGE_ORDER_TO_SIZE(order) / entry_size), 9761ac19ca6SMarc Zyngier its_base_type_string[type], 9771ac19ca6SMarc Zyngier (unsigned long)virt_to_phys(base), 9781ac19ca6SMarc Zyngier psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 9791ac19ca6SMarc Zyngier } 9801ac19ca6SMarc Zyngier 9811ac19ca6SMarc Zyngier return 0; 9821ac19ca6SMarc Zyngier 9831ac19ca6SMarc Zyngier out_free: 9841ac19ca6SMarc Zyngier its_free_tables(its); 9851ac19ca6SMarc Zyngier 9861ac19ca6SMarc Zyngier return err; 9871ac19ca6SMarc Zyngier } 9881ac19ca6SMarc Zyngier 9891ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 9901ac19ca6SMarc Zyngier { 9911ac19ca6SMarc Zyngier its->collections = kzalloc(nr_cpu_ids * sizeof(*its->collections), 9921ac19ca6SMarc Zyngier GFP_KERNEL); 9931ac19ca6SMarc Zyngier if (!its->collections) 9941ac19ca6SMarc Zyngier return -ENOMEM; 9951ac19ca6SMarc Zyngier 9961ac19ca6SMarc Zyngier return 0; 9971ac19ca6SMarc Zyngier } 9981ac19ca6SMarc Zyngier 9991ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 10001ac19ca6SMarc Zyngier { 10011ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 10021ac19ca6SMarc Zyngier struct page *pend_page; 10031ac19ca6SMarc Zyngier u64 val, tmp; 10041ac19ca6SMarc Zyngier 10051ac19ca6SMarc Zyngier /* If we didn't allocate the pending table yet, do it now */ 10061ac19ca6SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 10071ac19ca6SMarc Zyngier if (!pend_page) { 10081ac19ca6SMarc Zyngier phys_addr_t paddr; 10091ac19ca6SMarc Zyngier /* 10101ac19ca6SMarc Zyngier * The pending pages have to be at least 64kB aligned, 10111ac19ca6SMarc Zyngier * hence the 'max(LPI_PENDBASE_SZ, SZ_64K)' below. 10121ac19ca6SMarc Zyngier */ 10131ac19ca6SMarc Zyngier pend_page = alloc_pages(GFP_NOWAIT | __GFP_ZERO, 10141ac19ca6SMarc Zyngier get_order(max(LPI_PENDBASE_SZ, SZ_64K))); 10151ac19ca6SMarc Zyngier if (!pend_page) { 10161ac19ca6SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", 10171ac19ca6SMarc Zyngier smp_processor_id()); 10181ac19ca6SMarc Zyngier return; 10191ac19ca6SMarc Zyngier } 10201ac19ca6SMarc Zyngier 10211ac19ca6SMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 10221ac19ca6SMarc Zyngier __flush_dcache_area(page_address(pend_page), LPI_PENDBASE_SZ); 10231ac19ca6SMarc Zyngier 10241ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 10251ac19ca6SMarc Zyngier pr_info("CPU%d: using LPI pending table @%pa\n", 10261ac19ca6SMarc Zyngier smp_processor_id(), &paddr); 10271ac19ca6SMarc Zyngier gic_data_rdist()->pend_page = pend_page; 10281ac19ca6SMarc Zyngier } 10291ac19ca6SMarc Zyngier 10301ac19ca6SMarc Zyngier /* Disable LPIs */ 10311ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 10321ac19ca6SMarc Zyngier val &= ~GICR_CTLR_ENABLE_LPIS; 10331ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 10341ac19ca6SMarc Zyngier 10351ac19ca6SMarc Zyngier /* 10361ac19ca6SMarc Zyngier * Make sure any change to the table is observable by the GIC. 10371ac19ca6SMarc Zyngier */ 10381ac19ca6SMarc Zyngier dsb(sy); 10391ac19ca6SMarc Zyngier 10401ac19ca6SMarc Zyngier /* set PROPBASE */ 10411ac19ca6SMarc Zyngier val = (page_to_phys(gic_rdists->prop_page) | 10421ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 10431ac19ca6SMarc Zyngier GICR_PROPBASER_WaWb | 10441ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 10451ac19ca6SMarc Zyngier 10461ac19ca6SMarc Zyngier writeq_relaxed(val, rbase + GICR_PROPBASER); 10471ac19ca6SMarc Zyngier tmp = readq_relaxed(rbase + GICR_PROPBASER); 10481ac19ca6SMarc Zyngier 10491ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 1050241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 1051241a386cSMarc Zyngier /* 1052241a386cSMarc Zyngier * The HW reports non-shareable, we must 1053241a386cSMarc Zyngier * remove the cacheability attributes as 1054241a386cSMarc Zyngier * well. 1055241a386cSMarc Zyngier */ 1056241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 1057241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 1058241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 1059241a386cSMarc Zyngier writeq_relaxed(val, rbase + GICR_PROPBASER); 1060241a386cSMarc Zyngier } 10611ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 10621ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 10631ac19ca6SMarc Zyngier } 10641ac19ca6SMarc Zyngier 10651ac19ca6SMarc Zyngier /* set PENDBASE */ 10661ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 10674ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 10684ad3e363SMarc Zyngier GICR_PENDBASER_WaWb); 10691ac19ca6SMarc Zyngier 10701ac19ca6SMarc Zyngier writeq_relaxed(val, rbase + GICR_PENDBASER); 1071241a386cSMarc Zyngier tmp = readq_relaxed(rbase + GICR_PENDBASER); 1072241a386cSMarc Zyngier 1073241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 1074241a386cSMarc Zyngier /* 1075241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 1076241a386cSMarc Zyngier * cacheability attributes as well. 1077241a386cSMarc Zyngier */ 1078241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 1079241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 1080241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 1081241a386cSMarc Zyngier writeq_relaxed(val, rbase + GICR_PENDBASER); 1082241a386cSMarc Zyngier } 10831ac19ca6SMarc Zyngier 10841ac19ca6SMarc Zyngier /* Enable LPIs */ 10851ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 10861ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 10871ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 10881ac19ca6SMarc Zyngier 10891ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 10901ac19ca6SMarc Zyngier dsb(sy); 10911ac19ca6SMarc Zyngier } 10921ac19ca6SMarc Zyngier 10931ac19ca6SMarc Zyngier static void its_cpu_init_collection(void) 10941ac19ca6SMarc Zyngier { 10951ac19ca6SMarc Zyngier struct its_node *its; 10961ac19ca6SMarc Zyngier int cpu; 10971ac19ca6SMarc Zyngier 10981ac19ca6SMarc Zyngier spin_lock(&its_lock); 10991ac19ca6SMarc Zyngier cpu = smp_processor_id(); 11001ac19ca6SMarc Zyngier 11011ac19ca6SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 11021ac19ca6SMarc Zyngier u64 target; 11031ac19ca6SMarc Zyngier 11041ac19ca6SMarc Zyngier /* 11051ac19ca6SMarc Zyngier * We now have to bind each collection to its target 11061ac19ca6SMarc Zyngier * redistributor. 11071ac19ca6SMarc Zyngier */ 11081ac19ca6SMarc Zyngier if (readq_relaxed(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 11091ac19ca6SMarc Zyngier /* 11101ac19ca6SMarc Zyngier * This ITS wants the physical address of the 11111ac19ca6SMarc Zyngier * redistributor. 11121ac19ca6SMarc Zyngier */ 11131ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 11141ac19ca6SMarc Zyngier } else { 11151ac19ca6SMarc Zyngier /* 11161ac19ca6SMarc Zyngier * This ITS wants a linear CPU number. 11171ac19ca6SMarc Zyngier */ 11181ac19ca6SMarc Zyngier target = readq_relaxed(gic_data_rdist_rd_base() + GICR_TYPER); 1119263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 11201ac19ca6SMarc Zyngier } 11211ac19ca6SMarc Zyngier 11221ac19ca6SMarc Zyngier /* Perform collection mapping */ 11231ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 11241ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 11251ac19ca6SMarc Zyngier 11261ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 11271ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 11281ac19ca6SMarc Zyngier } 11291ac19ca6SMarc Zyngier 11301ac19ca6SMarc Zyngier spin_unlock(&its_lock); 11311ac19ca6SMarc Zyngier } 113284a6a2e7SMarc Zyngier 113384a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 113484a6a2e7SMarc Zyngier { 113584a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 11363e39e8f5SMarc Zyngier unsigned long flags; 113784a6a2e7SMarc Zyngier 11383e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 113984a6a2e7SMarc Zyngier 114084a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 114184a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 114284a6a2e7SMarc Zyngier its_dev = tmp; 114384a6a2e7SMarc Zyngier break; 114484a6a2e7SMarc Zyngier } 114584a6a2e7SMarc Zyngier } 114684a6a2e7SMarc Zyngier 11473e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 114884a6a2e7SMarc Zyngier 114984a6a2e7SMarc Zyngier return its_dev; 115084a6a2e7SMarc Zyngier } 115184a6a2e7SMarc Zyngier 1152*466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 1153*466b7d16SShanker Donthineni { 1154*466b7d16SShanker Donthineni int i; 1155*466b7d16SShanker Donthineni 1156*466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 1157*466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 1158*466b7d16SShanker Donthineni return &its->tables[i]; 1159*466b7d16SShanker Donthineni } 1160*466b7d16SShanker Donthineni 1161*466b7d16SShanker Donthineni return NULL; 1162*466b7d16SShanker Donthineni } 1163*466b7d16SShanker Donthineni 116484a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 116584a6a2e7SMarc Zyngier int nvecs) 116684a6a2e7SMarc Zyngier { 1167*466b7d16SShanker Donthineni struct its_baser *baser; 116884a6a2e7SMarc Zyngier struct its_device *dev; 116984a6a2e7SMarc Zyngier unsigned long *lpi_map; 11703e39e8f5SMarc Zyngier unsigned long flags; 1171591e5becSMarc Zyngier u16 *col_map = NULL; 117284a6a2e7SMarc Zyngier void *itt; 117384a6a2e7SMarc Zyngier int lpi_base; 117484a6a2e7SMarc Zyngier int nr_lpis; 1175c8481267SMarc Zyngier int nr_ites; 117684a6a2e7SMarc Zyngier int sz; 117784a6a2e7SMarc Zyngier 1178*466b7d16SShanker Donthineni baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 1179*466b7d16SShanker Donthineni 1180*466b7d16SShanker Donthineni /* Don't allow 'dev_id' that exceeds single, flat table limit */ 1181*466b7d16SShanker Donthineni if (baser) { 1182*466b7d16SShanker Donthineni if (dev_id >= (PAGE_ORDER_TO_SIZE(baser->order) / 1183*466b7d16SShanker Donthineni GITS_BASER_ENTRY_SIZE(baser->val))) 1184*466b7d16SShanker Donthineni return NULL; 1185*466b7d16SShanker Donthineni } else if (ilog2(dev_id) >= its->device_ids) 1186*466b7d16SShanker Donthineni return NULL; 1187*466b7d16SShanker Donthineni 118884a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1189c8481267SMarc Zyngier /* 1190c8481267SMarc Zyngier * At least one bit of EventID is being used, hence a minimum 1191c8481267SMarc Zyngier * of two entries. No, the architecture doesn't let you 1192c8481267SMarc Zyngier * express an ITT with a single entry. 1193c8481267SMarc Zyngier */ 119496555c47SWill Deacon nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 1195c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 119684a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 11976c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 119884a6a2e7SMarc Zyngier lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 1199591e5becSMarc Zyngier if (lpi_map) 1200591e5becSMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_lpis, GFP_KERNEL); 120184a6a2e7SMarc Zyngier 1202591e5becSMarc Zyngier if (!dev || !itt || !lpi_map || !col_map) { 120384a6a2e7SMarc Zyngier kfree(dev); 120484a6a2e7SMarc Zyngier kfree(itt); 120584a6a2e7SMarc Zyngier kfree(lpi_map); 1206591e5becSMarc Zyngier kfree(col_map); 120784a6a2e7SMarc Zyngier return NULL; 120884a6a2e7SMarc Zyngier } 120984a6a2e7SMarc Zyngier 12105a9a8915SMarc Zyngier __flush_dcache_area(itt, sz); 12115a9a8915SMarc Zyngier 121284a6a2e7SMarc Zyngier dev->its = its; 121384a6a2e7SMarc Zyngier dev->itt = itt; 1214c8481267SMarc Zyngier dev->nr_ites = nr_ites; 1215591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 1216591e5becSMarc Zyngier dev->event_map.col_map = col_map; 1217591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 1218591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 121984a6a2e7SMarc Zyngier dev->device_id = dev_id; 122084a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 122184a6a2e7SMarc Zyngier 12223e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 122384a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 12243e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 122584a6a2e7SMarc Zyngier 122684a6a2e7SMarc Zyngier /* Map device to its ITT */ 122784a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 122884a6a2e7SMarc Zyngier 122984a6a2e7SMarc Zyngier return dev; 123084a6a2e7SMarc Zyngier } 123184a6a2e7SMarc Zyngier 123284a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 123384a6a2e7SMarc Zyngier { 12343e39e8f5SMarc Zyngier unsigned long flags; 12353e39e8f5SMarc Zyngier 12363e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 123784a6a2e7SMarc Zyngier list_del(&its_dev->entry); 12383e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 123984a6a2e7SMarc Zyngier kfree(its_dev->itt); 124084a6a2e7SMarc Zyngier kfree(its_dev); 124184a6a2e7SMarc Zyngier } 1242b48ac83dSMarc Zyngier 1243b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 1244b48ac83dSMarc Zyngier { 1245b48ac83dSMarc Zyngier int idx; 1246b48ac83dSMarc Zyngier 1247591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 1248591e5becSMarc Zyngier dev->event_map.nr_lpis); 1249591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 1250b48ac83dSMarc Zyngier return -ENOSPC; 1251b48ac83dSMarc Zyngier 1252591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 1253591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 1254b48ac83dSMarc Zyngier 1255b48ac83dSMarc Zyngier return 0; 1256b48ac83dSMarc Zyngier } 1257b48ac83dSMarc Zyngier 125854456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 1259b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 1260b48ac83dSMarc Zyngier { 1261b48ac83dSMarc Zyngier struct its_node *its; 1262b48ac83dSMarc Zyngier struct its_device *its_dev; 126354456db9SMarc Zyngier struct msi_domain_info *msi_info; 126454456db9SMarc Zyngier u32 dev_id; 1265b48ac83dSMarc Zyngier 126654456db9SMarc Zyngier /* 126754456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 126854456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 126954456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 127054456db9SMarc Zyngier * are built on top of the ITS. 127154456db9SMarc Zyngier */ 127254456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 127354456db9SMarc Zyngier 127454456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 127554456db9SMarc Zyngier its = msi_info->data; 127654456db9SMarc Zyngier 1277f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 1278e8137f4fSMarc Zyngier if (its_dev) { 1279e8137f4fSMarc Zyngier /* 1280e8137f4fSMarc Zyngier * We already have seen this ID, probably through 1281e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 1282e8137f4fSMarc Zyngier * create the device. 1283e8137f4fSMarc Zyngier */ 1284f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 1285e8137f4fSMarc Zyngier goto out; 1286e8137f4fSMarc Zyngier } 1287b48ac83dSMarc Zyngier 1288f130420eSMarc Zyngier its_dev = its_create_device(its, dev_id, nvec); 1289b48ac83dSMarc Zyngier if (!its_dev) 1290b48ac83dSMarc Zyngier return -ENOMEM; 1291b48ac83dSMarc Zyngier 1292f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 1293e8137f4fSMarc Zyngier out: 1294b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 1295b48ac83dSMarc Zyngier return 0; 1296b48ac83dSMarc Zyngier } 1297b48ac83dSMarc Zyngier 129854456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 129954456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 130054456db9SMarc Zyngier }; 130154456db9SMarc Zyngier 1302b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 1303b48ac83dSMarc Zyngier unsigned int virq, 1304b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 1305b48ac83dSMarc Zyngier { 1306f833f57fSMarc Zyngier struct irq_fwspec fwspec; 1307b48ac83dSMarc Zyngier 1308f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 1309f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 1310f833f57fSMarc Zyngier fwspec.param_count = 3; 1311f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 1312f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 1313f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 1314f833f57fSMarc Zyngier } else { 1315f833f57fSMarc Zyngier return -EINVAL; 1316f833f57fSMarc Zyngier } 1317b48ac83dSMarc Zyngier 1318f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 1319b48ac83dSMarc Zyngier } 1320b48ac83dSMarc Zyngier 1321b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 1322b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 1323b48ac83dSMarc Zyngier { 1324b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 1325b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 1326b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 1327b48ac83dSMarc Zyngier int err; 1328b48ac83dSMarc Zyngier int i; 1329b48ac83dSMarc Zyngier 1330b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1331b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 1332b48ac83dSMarc Zyngier if (err) 1333b48ac83dSMarc Zyngier return err; 1334b48ac83dSMarc Zyngier 1335b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 1336b48ac83dSMarc Zyngier if (err) 1337b48ac83dSMarc Zyngier return err; 1338b48ac83dSMarc Zyngier 1339b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 1340b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 1341f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 1342591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 1343591e5becSMarc Zyngier (int) hwirq, virq + i); 1344b48ac83dSMarc Zyngier } 1345b48ac83dSMarc Zyngier 1346b48ac83dSMarc Zyngier return 0; 1347b48ac83dSMarc Zyngier } 1348b48ac83dSMarc Zyngier 1349aca268dfSMarc Zyngier static void its_irq_domain_activate(struct irq_domain *domain, 1350aca268dfSMarc Zyngier struct irq_data *d) 1351aca268dfSMarc Zyngier { 1352aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1353aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 1354aca268dfSMarc Zyngier 1355591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 1356591e5becSMarc Zyngier its_dev->event_map.col_map[event] = cpumask_first(cpu_online_mask); 1357591e5becSMarc Zyngier 1358aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 1359aca268dfSMarc Zyngier its_send_mapvi(its_dev, d->hwirq, event); 1360aca268dfSMarc Zyngier } 1361aca268dfSMarc Zyngier 1362aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 1363aca268dfSMarc Zyngier struct irq_data *d) 1364aca268dfSMarc Zyngier { 1365aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1366aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 1367aca268dfSMarc Zyngier 1368aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 1369aca268dfSMarc Zyngier its_send_discard(its_dev, event); 1370aca268dfSMarc Zyngier } 1371aca268dfSMarc Zyngier 1372b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 1373b48ac83dSMarc Zyngier unsigned int nr_irqs) 1374b48ac83dSMarc Zyngier { 1375b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 1376b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1377b48ac83dSMarc Zyngier int i; 1378b48ac83dSMarc Zyngier 1379b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1380b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 1381b48ac83dSMarc Zyngier virq + i); 1382aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 1383b48ac83dSMarc Zyngier 1384b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 1385591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 1386b48ac83dSMarc Zyngier 1387b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 13882da39949SMarc Zyngier irq_domain_reset_irq_data(data); 1389b48ac83dSMarc Zyngier } 1390b48ac83dSMarc Zyngier 1391b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 1392591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 1393591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 1394591e5becSMarc Zyngier its_lpi_free(&its_dev->event_map); 1395b48ac83dSMarc Zyngier 1396b48ac83dSMarc Zyngier /* Unmap device/itt */ 1397b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 1398b48ac83dSMarc Zyngier its_free_device(its_dev); 1399b48ac83dSMarc Zyngier } 1400b48ac83dSMarc Zyngier 1401b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 1402b48ac83dSMarc Zyngier } 1403b48ac83dSMarc Zyngier 1404b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 1405b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 1406b48ac83dSMarc Zyngier .free = its_irq_domain_free, 1407aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 1408aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 1409b48ac83dSMarc Zyngier }; 14104c21f3c2SMarc Zyngier 14114559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 14124559fbb3SYun Wu { 14134559fbb3SYun Wu u32 count = 1000000; /* 1s */ 14144559fbb3SYun Wu u32 val; 14154559fbb3SYun Wu 14164559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 14174559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 14184559fbb3SYun Wu return 0; 14194559fbb3SYun Wu 14204559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 14214559fbb3SYun Wu val &= ~GITS_CTLR_ENABLE; 14224559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 14234559fbb3SYun Wu 14244559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 14254559fbb3SYun Wu while (1) { 14264559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 14274559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 14284559fbb3SYun Wu return 0; 14294559fbb3SYun Wu 14304559fbb3SYun Wu count--; 14314559fbb3SYun Wu if (!count) 14324559fbb3SYun Wu return -EBUSY; 14334559fbb3SYun Wu 14344559fbb3SYun Wu cpu_relax(); 14354559fbb3SYun Wu udelay(1); 14364559fbb3SYun Wu } 14374559fbb3SYun Wu } 14384559fbb3SYun Wu 143994100970SRobert Richter static void __maybe_unused its_enable_quirk_cavium_22375(void *data) 144094100970SRobert Richter { 144194100970SRobert Richter struct its_node *its = data; 144294100970SRobert Richter 144394100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 144494100970SRobert Richter } 144594100970SRobert Richter 144667510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 144794100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 144894100970SRobert Richter { 144994100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 145094100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 145194100970SRobert Richter .mask = 0xffff0fff, 145294100970SRobert Richter .init = its_enable_quirk_cavium_22375, 145394100970SRobert Richter }, 145494100970SRobert Richter #endif 145567510ccaSRobert Richter { 145667510ccaSRobert Richter } 145767510ccaSRobert Richter }; 145867510ccaSRobert Richter 145967510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 146067510ccaSRobert Richter { 146167510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 146267510ccaSRobert Richter 146367510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 146467510ccaSRobert Richter } 146567510ccaSRobert Richter 146604a0e4deSTomasz Nowicki static int __init its_probe(struct device_node *node, 146704a0e4deSTomasz Nowicki struct irq_domain *parent) 14684c21f3c2SMarc Zyngier { 14694c21f3c2SMarc Zyngier struct resource res; 14704c21f3c2SMarc Zyngier struct its_node *its; 14714c21f3c2SMarc Zyngier void __iomem *its_base; 147254456db9SMarc Zyngier struct irq_domain *inner_domain; 14734c21f3c2SMarc Zyngier u32 val; 14744c21f3c2SMarc Zyngier u64 baser, tmp; 14754c21f3c2SMarc Zyngier int err; 14764c21f3c2SMarc Zyngier 14774c21f3c2SMarc Zyngier err = of_address_to_resource(node, 0, &res); 14784c21f3c2SMarc Zyngier if (err) { 14794c21f3c2SMarc Zyngier pr_warn("%s: no regs?\n", node->full_name); 14804c21f3c2SMarc Zyngier return -ENXIO; 14814c21f3c2SMarc Zyngier } 14824c21f3c2SMarc Zyngier 14834c21f3c2SMarc Zyngier its_base = ioremap(res.start, resource_size(&res)); 14844c21f3c2SMarc Zyngier if (!its_base) { 14854c21f3c2SMarc Zyngier pr_warn("%s: unable to map registers\n", node->full_name); 14864c21f3c2SMarc Zyngier return -ENOMEM; 14874c21f3c2SMarc Zyngier } 14884c21f3c2SMarc Zyngier 14894c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 14904c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 14914c21f3c2SMarc Zyngier pr_warn("%s: no ITS detected, giving up\n", node->full_name); 14924c21f3c2SMarc Zyngier err = -ENODEV; 14934c21f3c2SMarc Zyngier goto out_unmap; 14944c21f3c2SMarc Zyngier } 14954c21f3c2SMarc Zyngier 14964559fbb3SYun Wu err = its_force_quiescent(its_base); 14974559fbb3SYun Wu if (err) { 14984559fbb3SYun Wu pr_warn("%s: failed to quiesce, giving up\n", 14994559fbb3SYun Wu node->full_name); 15004559fbb3SYun Wu goto out_unmap; 15014559fbb3SYun Wu } 15024559fbb3SYun Wu 15034c21f3c2SMarc Zyngier pr_info("ITS: %s\n", node->full_name); 15044c21f3c2SMarc Zyngier 15054c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 15064c21f3c2SMarc Zyngier if (!its) { 15074c21f3c2SMarc Zyngier err = -ENOMEM; 15084c21f3c2SMarc Zyngier goto out_unmap; 15094c21f3c2SMarc Zyngier } 15104c21f3c2SMarc Zyngier 15114c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 15124c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 15134c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 15144c21f3c2SMarc Zyngier its->base = its_base; 15154c21f3c2SMarc Zyngier its->phys_base = res.start; 15164c21f3c2SMarc Zyngier its->ite_size = ((readl_relaxed(its_base + GITS_TYPER) >> 4) & 0xf) + 1; 15174c21f3c2SMarc Zyngier 15184c21f3c2SMarc Zyngier its->cmd_base = kzalloc(ITS_CMD_QUEUE_SZ, GFP_KERNEL); 15194c21f3c2SMarc Zyngier if (!its->cmd_base) { 15204c21f3c2SMarc Zyngier err = -ENOMEM; 15214c21f3c2SMarc Zyngier goto out_free_its; 15224c21f3c2SMarc Zyngier } 15234c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 15244c21f3c2SMarc Zyngier 152567510ccaSRobert Richter its_enable_quirks(its); 152667510ccaSRobert Richter 1527841514abSMarc Zyngier err = its_alloc_tables(node->full_name, its); 15284c21f3c2SMarc Zyngier if (err) 15294c21f3c2SMarc Zyngier goto out_free_cmd; 15304c21f3c2SMarc Zyngier 15314c21f3c2SMarc Zyngier err = its_alloc_collections(its); 15324c21f3c2SMarc Zyngier if (err) 15334c21f3c2SMarc Zyngier goto out_free_tables; 15344c21f3c2SMarc Zyngier 15354c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 15364c21f3c2SMarc Zyngier GITS_CBASER_WaWb | 15374c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 15384c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 15394c21f3c2SMarc Zyngier GITS_CBASER_VALID); 15404c21f3c2SMarc Zyngier 15414c21f3c2SMarc Zyngier writeq_relaxed(baser, its->base + GITS_CBASER); 15424c21f3c2SMarc Zyngier tmp = readq_relaxed(its->base + GITS_CBASER); 15434c21f3c2SMarc Zyngier 15444ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 1545241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 1546241a386cSMarc Zyngier /* 1547241a386cSMarc Zyngier * The HW reports non-shareable, we must 1548241a386cSMarc Zyngier * remove the cacheability attributes as 1549241a386cSMarc Zyngier * well. 1550241a386cSMarc Zyngier */ 1551241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 1552241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 1553241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 1554241a386cSMarc Zyngier writeq_relaxed(baser, its->base + GITS_CBASER); 1555241a386cSMarc Zyngier } 15564c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 15574c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 15584c21f3c2SMarc Zyngier } 15594c21f3c2SMarc Zyngier 1560241a386cSMarc Zyngier writeq_relaxed(0, its->base + GITS_CWRITER); 1561241a386cSMarc Zyngier writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR); 1562241a386cSMarc Zyngier 1563841514abSMarc Zyngier if (of_property_read_bool(node, "msi-controller")) { 156454456db9SMarc Zyngier struct msi_domain_info *info; 156554456db9SMarc Zyngier 156654456db9SMarc Zyngier info = kzalloc(sizeof(*info), GFP_KERNEL); 156754456db9SMarc Zyngier if (!info) { 156854456db9SMarc Zyngier err = -ENOMEM; 156954456db9SMarc Zyngier goto out_free_tables; 157054456db9SMarc Zyngier } 157154456db9SMarc Zyngier 1572841514abSMarc Zyngier inner_domain = irq_domain_add_tree(node, &its_domain_ops, its); 1573841514abSMarc Zyngier if (!inner_domain) { 15744c21f3c2SMarc Zyngier err = -ENOMEM; 157554456db9SMarc Zyngier kfree(info); 15764c21f3c2SMarc Zyngier goto out_free_tables; 15774c21f3c2SMarc Zyngier } 15784c21f3c2SMarc Zyngier 1579841514abSMarc Zyngier inner_domain->parent = parent; 1580841514abSMarc Zyngier inner_domain->bus_token = DOMAIN_BUS_NEXUS; 158154456db9SMarc Zyngier info->ops = &its_msi_domain_ops; 158254456db9SMarc Zyngier info->data = its; 158354456db9SMarc Zyngier inner_domain->host_data = info; 15844c21f3c2SMarc Zyngier } 15854c21f3c2SMarc Zyngier 15864c21f3c2SMarc Zyngier spin_lock(&its_lock); 15874c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 15884c21f3c2SMarc Zyngier spin_unlock(&its_lock); 15894c21f3c2SMarc Zyngier 15904c21f3c2SMarc Zyngier return 0; 15914c21f3c2SMarc Zyngier 15924c21f3c2SMarc Zyngier out_free_tables: 15934c21f3c2SMarc Zyngier its_free_tables(its); 15944c21f3c2SMarc Zyngier out_free_cmd: 15954c21f3c2SMarc Zyngier kfree(its->cmd_base); 15964c21f3c2SMarc Zyngier out_free_its: 15974c21f3c2SMarc Zyngier kfree(its); 15984c21f3c2SMarc Zyngier out_unmap: 15994c21f3c2SMarc Zyngier iounmap(its_base); 16004c21f3c2SMarc Zyngier pr_err("ITS: failed probing %s (%d)\n", node->full_name, err); 16014c21f3c2SMarc Zyngier return err; 16024c21f3c2SMarc Zyngier } 16034c21f3c2SMarc Zyngier 16044c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 16054c21f3c2SMarc Zyngier { 16064c21f3c2SMarc Zyngier return !!(readl_relaxed(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 16074c21f3c2SMarc Zyngier } 16084c21f3c2SMarc Zyngier 16094c21f3c2SMarc Zyngier int its_cpu_init(void) 16104c21f3c2SMarc Zyngier { 161116acae72SVladimir Murzin if (!list_empty(&its_nodes)) { 16124c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 16134c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 16144c21f3c2SMarc Zyngier return -ENXIO; 16154c21f3c2SMarc Zyngier } 16164c21f3c2SMarc Zyngier its_cpu_init_lpis(); 16174c21f3c2SMarc Zyngier its_cpu_init_collection(); 16184c21f3c2SMarc Zyngier } 16194c21f3c2SMarc Zyngier 16204c21f3c2SMarc Zyngier return 0; 16214c21f3c2SMarc Zyngier } 16224c21f3c2SMarc Zyngier 16234c21f3c2SMarc Zyngier static struct of_device_id its_device_id[] = { 16244c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 16254c21f3c2SMarc Zyngier {}, 16264c21f3c2SMarc Zyngier }; 16274c21f3c2SMarc Zyngier 162804a0e4deSTomasz Nowicki int __init its_init(struct device_node *node, struct rdists *rdists, 16294c21f3c2SMarc Zyngier struct irq_domain *parent_domain) 16304c21f3c2SMarc Zyngier { 16314c21f3c2SMarc Zyngier struct device_node *np; 16324c21f3c2SMarc Zyngier 16334c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 16344c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 16354c21f3c2SMarc Zyngier its_probe(np, parent_domain); 16364c21f3c2SMarc Zyngier } 16374c21f3c2SMarc Zyngier 16384c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 16394c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 16404c21f3c2SMarc Zyngier return -ENXIO; 16414c21f3c2SMarc Zyngier } 16424c21f3c2SMarc Zyngier 16434c21f3c2SMarc Zyngier gic_rdists = rdists; 16444c21f3c2SMarc Zyngier its_alloc_lpi_tables(); 16454c21f3c2SMarc Zyngier its_lpi_init(rdists->id_bits); 16464c21f3c2SMarc Zyngier 16474c21f3c2SMarc Zyngier return 0; 16484c21f3c2SMarc Zyngier } 1649