1cc2d3216SMarc Zyngier /* 2d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 183f010cf1STomasz Nowicki #include <linux/acpi.h> 198d3554b8SHanjun Guo #include <linux/acpi_iort.h> 20cc2d3216SMarc Zyngier #include <linux/bitmap.h> 21cc2d3216SMarc Zyngier #include <linux/cpu.h> 22c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 23cc2d3216SMarc Zyngier #include <linux/delay.h> 2444bb7e24SRobin Murphy #include <linux/dma-iommu.h> 25*3fb68faeSMarc Zyngier #include <linux/efi.h> 26cc2d3216SMarc Zyngier #include <linux/interrupt.h> 273f010cf1STomasz Nowicki #include <linux/irqdomain.h> 28880cb3cdSMarc Zyngier #include <linux/list.h> 29880cb3cdSMarc Zyngier #include <linux/list_sort.h> 30cc2d3216SMarc Zyngier #include <linux/log2.h> 31cc2d3216SMarc Zyngier #include <linux/mm.h> 32cc2d3216SMarc Zyngier #include <linux/msi.h> 33cc2d3216SMarc Zyngier #include <linux/of.h> 34cc2d3216SMarc Zyngier #include <linux/of_address.h> 35cc2d3216SMarc Zyngier #include <linux/of_irq.h> 36cc2d3216SMarc Zyngier #include <linux/of_pci.h> 37cc2d3216SMarc Zyngier #include <linux/of_platform.h> 38cc2d3216SMarc Zyngier #include <linux/percpu.h> 39cc2d3216SMarc Zyngier #include <linux/slab.h> 40dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 41cc2d3216SMarc Zyngier 4241a83e06SJoel Porquet #include <linux/irqchip.h> 43cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 44c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 45cc2d3216SMarc Zyngier 46cc2d3216SMarc Zyngier #include <asm/cputype.h> 47cc2d3216SMarc Zyngier #include <asm/exception.h> 48cc2d3216SMarc Zyngier 4967510ccaSRobert Richter #include "irq-gic-common.h" 5067510ccaSRobert Richter 5194100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 5294100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 53fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 54dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 55cc2d3216SMarc Zyngier 56c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 57c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 58c48ed51cSMarc Zyngier 59a13b0404SMarc Zyngier static u32 lpi_id_bits; 60a13b0404SMarc Zyngier 61a13b0404SMarc Zyngier /* 62a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 63a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 64a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 65a13b0404SMarc Zyngier */ 66a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 67a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 68a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 69a13b0404SMarc Zyngier 70a13b0404SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 71a13b0404SMarc Zyngier 72cc2d3216SMarc Zyngier /* 73cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 74cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 75cc2d3216SMarc Zyngier * CPU. 76cc2d3216SMarc Zyngier */ 77cc2d3216SMarc Zyngier struct its_collection { 78cc2d3216SMarc Zyngier u64 target_address; 79cc2d3216SMarc Zyngier u16 col_id; 80cc2d3216SMarc Zyngier }; 81cc2d3216SMarc Zyngier 82cc2d3216SMarc Zyngier /* 839347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 849347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 85466b7d16SShanker Donthineni */ 86466b7d16SShanker Donthineni struct its_baser { 87466b7d16SShanker Donthineni void *base; 88466b7d16SShanker Donthineni u64 val; 89466b7d16SShanker Donthineni u32 order; 909347359aSShanker Donthineni u32 psz; 91466b7d16SShanker Donthineni }; 92466b7d16SShanker Donthineni 93558b0165SArd Biesheuvel struct its_device; 94558b0165SArd Biesheuvel 95466b7d16SShanker Donthineni /* 96cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 97841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 98841514abSMarc Zyngier * list of devices writing to it. 99cc2d3216SMarc Zyngier */ 100cc2d3216SMarc Zyngier struct its_node { 101cc2d3216SMarc Zyngier raw_spinlock_t lock; 102cc2d3216SMarc Zyngier struct list_head entry; 103cc2d3216SMarc Zyngier void __iomem *base; 104db40f0a7STomasz Nowicki phys_addr_t phys_base; 105cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 106cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 107466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 108cc2d3216SMarc Zyngier struct its_collection *collections; 109558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 110558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 111dba0bc7bSDerek Basehore u64 cbaser_save; 112dba0bc7bSDerek Basehore u32 ctlr_save; 113cc2d3216SMarc Zyngier struct list_head its_device_list; 114cc2d3216SMarc Zyngier u64 flags; 115debf6d02SMarc Zyngier unsigned long list_nr; 116cc2d3216SMarc Zyngier u32 ite_size; 117466b7d16SShanker Donthineni u32 device_ids; 118fbf8f40eSGanapatrao Kulkarni int numa_node; 119558b0165SArd Biesheuvel unsigned int msi_domain_flags; 120558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1213dfa576bSMarc Zyngier bool is_v4; 1225c9a882eSMarc Zyngier int vlpi_redist_offset; 123cc2d3216SMarc Zyngier }; 124cc2d3216SMarc Zyngier 125cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 126cc2d3216SMarc Zyngier 12732bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 12832bd44dcSShanker Donthineni #define ITS_MAX_VPEID_BITS (16) 12932bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 13032bd44dcSShanker Donthineni 1312eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1322eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1332eca0d6cSShanker Donthineni 134591e5becSMarc Zyngier struct event_lpi_map { 135591e5becSMarc Zyngier unsigned long *lpi_map; 136591e5becSMarc Zyngier u16 *col_map; 137591e5becSMarc Zyngier irq_hw_number_t lpi_base; 138591e5becSMarc Zyngier int nr_lpis; 139d011e4e6SMarc Zyngier struct mutex vlpi_lock; 140d011e4e6SMarc Zyngier struct its_vm *vm; 141d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 142d011e4e6SMarc Zyngier int nr_vlpis; 143591e5becSMarc Zyngier }; 144591e5becSMarc Zyngier 145cc2d3216SMarc Zyngier /* 146d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 147d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 148d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 149d011e4e6SMarc Zyngier * indicates which one. 150cc2d3216SMarc Zyngier */ 151cc2d3216SMarc Zyngier struct its_device { 152cc2d3216SMarc Zyngier struct list_head entry; 153cc2d3216SMarc Zyngier struct its_node *its; 154591e5becSMarc Zyngier struct event_lpi_map event_map; 155cc2d3216SMarc Zyngier void *itt; 156cc2d3216SMarc Zyngier u32 nr_ites; 157cc2d3216SMarc Zyngier u32 device_id; 158cc2d3216SMarc Zyngier }; 159cc2d3216SMarc Zyngier 16020b3d54eSMarc Zyngier static struct { 16120b3d54eSMarc Zyngier raw_spinlock_t lock; 16220b3d54eSMarc Zyngier struct its_device *dev; 16320b3d54eSMarc Zyngier struct its_vpe **vpes; 16420b3d54eSMarc Zyngier int next_victim; 16520b3d54eSMarc Zyngier } vpe_proxy; 16620b3d54eSMarc Zyngier 1671ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 168a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1691ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 170db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1711ac19ca6SMarc Zyngier 1723dfa576bSMarc Zyngier static unsigned long its_list_map; 1733171a47aSMarc Zyngier static u16 vmovp_seq_num; 1743171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1753171a47aSMarc Zyngier 1767d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1773dfa576bSMarc Zyngier 1781ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 17911e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1801ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 181e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1821ac19ca6SMarc Zyngier 183591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 184591e5becSMarc Zyngier u32 event) 185591e5becSMarc Zyngier { 186591e5becSMarc Zyngier struct its_node *its = its_dev->its; 187591e5becSMarc Zyngier 188591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 189591e5becSMarc Zyngier } 190591e5becSMarc Zyngier 19183559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 19283559b47SMarc Zyngier { 19383559b47SMarc Zyngier if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(0, 15))) 19483559b47SMarc Zyngier return NULL; 19583559b47SMarc Zyngier 19683559b47SMarc Zyngier return col; 19783559b47SMarc Zyngier } 19883559b47SMarc Zyngier 199205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 200205e065dSMarc Zyngier { 201205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 202205e065dSMarc Zyngier return vpe; 203205e065dSMarc Zyngier 204205e065dSMarc Zyngier return NULL; 205205e065dSMarc Zyngier } 206205e065dSMarc Zyngier 207cc2d3216SMarc Zyngier /* 208cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 209cc2d3216SMarc Zyngier * block. 210cc2d3216SMarc Zyngier */ 211cc2d3216SMarc Zyngier struct its_cmd_desc { 212cc2d3216SMarc Zyngier union { 213cc2d3216SMarc Zyngier struct { 214cc2d3216SMarc Zyngier struct its_device *dev; 215cc2d3216SMarc Zyngier u32 event_id; 216cc2d3216SMarc Zyngier } its_inv_cmd; 217cc2d3216SMarc Zyngier 218cc2d3216SMarc Zyngier struct { 219cc2d3216SMarc Zyngier struct its_device *dev; 220cc2d3216SMarc Zyngier u32 event_id; 2218d85dcedSMarc Zyngier } its_clear_cmd; 2228d85dcedSMarc Zyngier 2238d85dcedSMarc Zyngier struct { 2248d85dcedSMarc Zyngier struct its_device *dev; 2258d85dcedSMarc Zyngier u32 event_id; 226cc2d3216SMarc Zyngier } its_int_cmd; 227cc2d3216SMarc Zyngier 228cc2d3216SMarc Zyngier struct { 229cc2d3216SMarc Zyngier struct its_device *dev; 230cc2d3216SMarc Zyngier int valid; 231cc2d3216SMarc Zyngier } its_mapd_cmd; 232cc2d3216SMarc Zyngier 233cc2d3216SMarc Zyngier struct { 234cc2d3216SMarc Zyngier struct its_collection *col; 235cc2d3216SMarc Zyngier int valid; 236cc2d3216SMarc Zyngier } its_mapc_cmd; 237cc2d3216SMarc Zyngier 238cc2d3216SMarc Zyngier struct { 239cc2d3216SMarc Zyngier struct its_device *dev; 240cc2d3216SMarc Zyngier u32 phys_id; 241cc2d3216SMarc Zyngier u32 event_id; 2426a25ad3aSMarc Zyngier } its_mapti_cmd; 243cc2d3216SMarc Zyngier 244cc2d3216SMarc Zyngier struct { 245cc2d3216SMarc Zyngier struct its_device *dev; 246cc2d3216SMarc Zyngier struct its_collection *col; 247591e5becSMarc Zyngier u32 event_id; 248cc2d3216SMarc Zyngier } its_movi_cmd; 249cc2d3216SMarc Zyngier 250cc2d3216SMarc Zyngier struct { 251cc2d3216SMarc Zyngier struct its_device *dev; 252cc2d3216SMarc Zyngier u32 event_id; 253cc2d3216SMarc Zyngier } its_discard_cmd; 254cc2d3216SMarc Zyngier 255cc2d3216SMarc Zyngier struct { 256cc2d3216SMarc Zyngier struct its_collection *col; 257cc2d3216SMarc Zyngier } its_invall_cmd; 258d011e4e6SMarc Zyngier 259d011e4e6SMarc Zyngier struct { 260d011e4e6SMarc Zyngier struct its_vpe *vpe; 261eb78192bSMarc Zyngier } its_vinvall_cmd; 262eb78192bSMarc Zyngier 263eb78192bSMarc Zyngier struct { 264eb78192bSMarc Zyngier struct its_vpe *vpe; 265eb78192bSMarc Zyngier struct its_collection *col; 266eb78192bSMarc Zyngier bool valid; 267eb78192bSMarc Zyngier } its_vmapp_cmd; 268eb78192bSMarc Zyngier 269eb78192bSMarc Zyngier struct { 270eb78192bSMarc Zyngier struct its_vpe *vpe; 271d011e4e6SMarc Zyngier struct its_device *dev; 272d011e4e6SMarc Zyngier u32 virt_id; 273d011e4e6SMarc Zyngier u32 event_id; 274d011e4e6SMarc Zyngier bool db_enabled; 275d011e4e6SMarc Zyngier } its_vmapti_cmd; 276d011e4e6SMarc Zyngier 277d011e4e6SMarc Zyngier struct { 278d011e4e6SMarc Zyngier struct its_vpe *vpe; 279d011e4e6SMarc Zyngier struct its_device *dev; 280d011e4e6SMarc Zyngier u32 event_id; 281d011e4e6SMarc Zyngier bool db_enabled; 282d011e4e6SMarc Zyngier } its_vmovi_cmd; 2833171a47aSMarc Zyngier 2843171a47aSMarc Zyngier struct { 2853171a47aSMarc Zyngier struct its_vpe *vpe; 2863171a47aSMarc Zyngier struct its_collection *col; 2873171a47aSMarc Zyngier u16 seq_num; 2883171a47aSMarc Zyngier u16 its_list; 2893171a47aSMarc Zyngier } its_vmovp_cmd; 290cc2d3216SMarc Zyngier }; 291cc2d3216SMarc Zyngier }; 292cc2d3216SMarc Zyngier 293cc2d3216SMarc Zyngier /* 294cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 295cc2d3216SMarc Zyngier */ 296cc2d3216SMarc Zyngier struct its_cmd_block { 297cc2d3216SMarc Zyngier u64 raw_cmd[4]; 298cc2d3216SMarc Zyngier }; 299cc2d3216SMarc Zyngier 300cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 301cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 302cc2d3216SMarc Zyngier 30367047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 30467047f90SMarc Zyngier struct its_cmd_block *, 305cc2d3216SMarc Zyngier struct its_cmd_desc *); 306cc2d3216SMarc Zyngier 30767047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 30867047f90SMarc Zyngier struct its_cmd_block *, 309d011e4e6SMarc Zyngier struct its_cmd_desc *); 310d011e4e6SMarc Zyngier 3114d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 3124d36f136SMarc Zyngier { 3134d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 3144d36f136SMarc Zyngier *raw_cmd &= ~mask; 3154d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 3164d36f136SMarc Zyngier } 3174d36f136SMarc Zyngier 318cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 319cc2d3216SMarc Zyngier { 3204d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 321cc2d3216SMarc Zyngier } 322cc2d3216SMarc Zyngier 323cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 324cc2d3216SMarc Zyngier { 3254d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 326cc2d3216SMarc Zyngier } 327cc2d3216SMarc Zyngier 328cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 329cc2d3216SMarc Zyngier { 3304d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 331cc2d3216SMarc Zyngier } 332cc2d3216SMarc Zyngier 333cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 334cc2d3216SMarc Zyngier { 3354d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 336cc2d3216SMarc Zyngier } 337cc2d3216SMarc Zyngier 338cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 339cc2d3216SMarc Zyngier { 3404d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 341cc2d3216SMarc Zyngier } 342cc2d3216SMarc Zyngier 343cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 344cc2d3216SMarc Zyngier { 34530ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 346cc2d3216SMarc Zyngier } 347cc2d3216SMarc Zyngier 348cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 349cc2d3216SMarc Zyngier { 3504d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 351cc2d3216SMarc Zyngier } 352cc2d3216SMarc Zyngier 353cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 354cc2d3216SMarc Zyngier { 35530ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 356cc2d3216SMarc Zyngier } 357cc2d3216SMarc Zyngier 358cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 359cc2d3216SMarc Zyngier { 3604d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 361cc2d3216SMarc Zyngier } 362cc2d3216SMarc Zyngier 363d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 364d011e4e6SMarc Zyngier { 365d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 366d011e4e6SMarc Zyngier } 367d011e4e6SMarc Zyngier 368d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 369d011e4e6SMarc Zyngier { 370d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 371d011e4e6SMarc Zyngier } 372d011e4e6SMarc Zyngier 373d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 374d011e4e6SMarc Zyngier { 375d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 376d011e4e6SMarc Zyngier } 377d011e4e6SMarc Zyngier 378d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 379d011e4e6SMarc Zyngier { 380d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 381d011e4e6SMarc Zyngier } 382d011e4e6SMarc Zyngier 3833171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 3843171a47aSMarc Zyngier { 3853171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 3863171a47aSMarc Zyngier } 3873171a47aSMarc Zyngier 3883171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 3893171a47aSMarc Zyngier { 3903171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 3913171a47aSMarc Zyngier } 3923171a47aSMarc Zyngier 393eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 394eb78192bSMarc Zyngier { 39530ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 396eb78192bSMarc Zyngier } 397eb78192bSMarc Zyngier 398eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 399eb78192bSMarc Zyngier { 400eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 401eb78192bSMarc Zyngier } 402eb78192bSMarc Zyngier 403cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 404cc2d3216SMarc Zyngier { 405cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 406cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 407cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 408cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 409cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 410cc2d3216SMarc Zyngier } 411cc2d3216SMarc Zyngier 41267047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 41367047f90SMarc Zyngier struct its_cmd_block *cmd, 414cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 415cc2d3216SMarc Zyngier { 416cc2d3216SMarc Zyngier unsigned long itt_addr; 417c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 418cc2d3216SMarc Zyngier 419cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 420cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 421cc2d3216SMarc Zyngier 422cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 423cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 424cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 425cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 426cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 427cc2d3216SMarc Zyngier 428cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 429cc2d3216SMarc Zyngier 430591e5becSMarc Zyngier return NULL; 431cc2d3216SMarc Zyngier } 432cc2d3216SMarc Zyngier 43367047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 43467047f90SMarc Zyngier struct its_cmd_block *cmd, 435cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 436cc2d3216SMarc Zyngier { 437cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 438cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 439cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 440cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 441cc2d3216SMarc Zyngier 442cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 443cc2d3216SMarc Zyngier 444cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 445cc2d3216SMarc Zyngier } 446cc2d3216SMarc Zyngier 44767047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 44867047f90SMarc Zyngier struct its_cmd_block *cmd, 449cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 450cc2d3216SMarc Zyngier { 451591e5becSMarc Zyngier struct its_collection *col; 452591e5becSMarc Zyngier 4536a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 4546a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 455591e5becSMarc Zyngier 4566a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 4576a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 4586a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 4596a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 460591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 461cc2d3216SMarc Zyngier 462cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 463cc2d3216SMarc Zyngier 46483559b47SMarc Zyngier return valid_col(col); 465cc2d3216SMarc Zyngier } 466cc2d3216SMarc Zyngier 46767047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 46867047f90SMarc Zyngier struct its_cmd_block *cmd, 469cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 470cc2d3216SMarc Zyngier { 471591e5becSMarc Zyngier struct its_collection *col; 472591e5becSMarc Zyngier 473591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 474591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 475591e5becSMarc Zyngier 476cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 477cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 478591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 479cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 480cc2d3216SMarc Zyngier 481cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 482cc2d3216SMarc Zyngier 48383559b47SMarc Zyngier return valid_col(col); 484cc2d3216SMarc Zyngier } 485cc2d3216SMarc Zyngier 48667047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 48767047f90SMarc Zyngier struct its_cmd_block *cmd, 488cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 489cc2d3216SMarc Zyngier { 490591e5becSMarc Zyngier struct its_collection *col; 491591e5becSMarc Zyngier 492591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 493591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 494591e5becSMarc Zyngier 495cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 496cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 497cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 498cc2d3216SMarc Zyngier 499cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 500cc2d3216SMarc Zyngier 50183559b47SMarc Zyngier return valid_col(col); 502cc2d3216SMarc Zyngier } 503cc2d3216SMarc Zyngier 50467047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 50567047f90SMarc Zyngier struct its_cmd_block *cmd, 506cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 507cc2d3216SMarc Zyngier { 508591e5becSMarc Zyngier struct its_collection *col; 509591e5becSMarc Zyngier 510591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 511591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 512591e5becSMarc Zyngier 513cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 514cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 515cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 516cc2d3216SMarc Zyngier 517cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 518cc2d3216SMarc Zyngier 51983559b47SMarc Zyngier return valid_col(col); 520cc2d3216SMarc Zyngier } 521cc2d3216SMarc Zyngier 52267047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 52367047f90SMarc Zyngier struct its_cmd_block *cmd, 5248d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5258d85dcedSMarc Zyngier { 5268d85dcedSMarc Zyngier struct its_collection *col; 5278d85dcedSMarc Zyngier 5288d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 5298d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 5308d85dcedSMarc Zyngier 5318d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 5328d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 5338d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 5348d85dcedSMarc Zyngier 5358d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5368d85dcedSMarc Zyngier 53783559b47SMarc Zyngier return valid_col(col); 5388d85dcedSMarc Zyngier } 5398d85dcedSMarc Zyngier 54067047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 54167047f90SMarc Zyngier struct its_cmd_block *cmd, 5428d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5438d85dcedSMarc Zyngier { 5448d85dcedSMarc Zyngier struct its_collection *col; 5458d85dcedSMarc Zyngier 5468d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 5478d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 5488d85dcedSMarc Zyngier 5498d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 5508d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 5518d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 5528d85dcedSMarc Zyngier 5538d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5548d85dcedSMarc Zyngier 55583559b47SMarc Zyngier return valid_col(col); 5568d85dcedSMarc Zyngier } 5578d85dcedSMarc Zyngier 55867047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 55967047f90SMarc Zyngier struct its_cmd_block *cmd, 560cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 561cc2d3216SMarc Zyngier { 562cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 563cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 564cc2d3216SMarc Zyngier 565cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 566cc2d3216SMarc Zyngier 567cc2d3216SMarc Zyngier return NULL; 568cc2d3216SMarc Zyngier } 569cc2d3216SMarc Zyngier 57067047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 57167047f90SMarc Zyngier struct its_cmd_block *cmd, 572eb78192bSMarc Zyngier struct its_cmd_desc *desc) 573eb78192bSMarc Zyngier { 574eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 575eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 576eb78192bSMarc Zyngier 577eb78192bSMarc Zyngier its_fixup_cmd(cmd); 578eb78192bSMarc Zyngier 579205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 580eb78192bSMarc Zyngier } 581eb78192bSMarc Zyngier 58267047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 58367047f90SMarc Zyngier struct its_cmd_block *cmd, 584eb78192bSMarc Zyngier struct its_cmd_desc *desc) 585eb78192bSMarc Zyngier { 586eb78192bSMarc Zyngier unsigned long vpt_addr; 5875c9a882eSMarc Zyngier u64 target; 588eb78192bSMarc Zyngier 589eb78192bSMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 5905c9a882eSMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 591eb78192bSMarc Zyngier 592eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 593eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 594eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 5955c9a882eSMarc Zyngier its_encode_target(cmd, target); 596eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 597eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 598eb78192bSMarc Zyngier 599eb78192bSMarc Zyngier its_fixup_cmd(cmd); 600eb78192bSMarc Zyngier 601205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 602eb78192bSMarc Zyngier } 603eb78192bSMarc Zyngier 60467047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 60567047f90SMarc Zyngier struct its_cmd_block *cmd, 606d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 607d011e4e6SMarc Zyngier { 608d011e4e6SMarc Zyngier u32 db; 609d011e4e6SMarc Zyngier 610d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 611d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 612d011e4e6SMarc Zyngier else 613d011e4e6SMarc Zyngier db = 1023; 614d011e4e6SMarc Zyngier 615d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 616d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 617d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 618d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 619d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 620d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 621d011e4e6SMarc Zyngier 622d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 623d011e4e6SMarc Zyngier 624205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 625d011e4e6SMarc Zyngier } 626d011e4e6SMarc Zyngier 62767047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 62867047f90SMarc Zyngier struct its_cmd_block *cmd, 629d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 630d011e4e6SMarc Zyngier { 631d011e4e6SMarc Zyngier u32 db; 632d011e4e6SMarc Zyngier 633d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 634d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 635d011e4e6SMarc Zyngier else 636d011e4e6SMarc Zyngier db = 1023; 637d011e4e6SMarc Zyngier 638d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 639d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 640d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 641d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 642d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 643d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 644d011e4e6SMarc Zyngier 645d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 646d011e4e6SMarc Zyngier 647205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 648d011e4e6SMarc Zyngier } 649d011e4e6SMarc Zyngier 65067047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 65167047f90SMarc Zyngier struct its_cmd_block *cmd, 6523171a47aSMarc Zyngier struct its_cmd_desc *desc) 6533171a47aSMarc Zyngier { 6545c9a882eSMarc Zyngier u64 target; 6555c9a882eSMarc Zyngier 6565c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 6573171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 6583171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 6593171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 6603171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 6615c9a882eSMarc Zyngier its_encode_target(cmd, target); 6623171a47aSMarc Zyngier 6633171a47aSMarc Zyngier its_fixup_cmd(cmd); 6643171a47aSMarc Zyngier 665205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 6663171a47aSMarc Zyngier } 6673171a47aSMarc Zyngier 668cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 669cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 670cc2d3216SMarc Zyngier { 671cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 672cc2d3216SMarc Zyngier } 673cc2d3216SMarc Zyngier 674cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 675cc2d3216SMarc Zyngier { 676cc2d3216SMarc Zyngier int widx; 677cc2d3216SMarc Zyngier int ridx; 678cc2d3216SMarc Zyngier 679cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 680cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 681cc2d3216SMarc Zyngier 682cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 683cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 684cc2d3216SMarc Zyngier return 1; 685cc2d3216SMarc Zyngier 686cc2d3216SMarc Zyngier return 0; 687cc2d3216SMarc Zyngier } 688cc2d3216SMarc Zyngier 689cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 690cc2d3216SMarc Zyngier { 691cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 692cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 693cc2d3216SMarc Zyngier 694cc2d3216SMarc Zyngier while (its_queue_full(its)) { 695cc2d3216SMarc Zyngier count--; 696cc2d3216SMarc Zyngier if (!count) { 697cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 698cc2d3216SMarc Zyngier return NULL; 699cc2d3216SMarc Zyngier } 700cc2d3216SMarc Zyngier cpu_relax(); 701cc2d3216SMarc Zyngier udelay(1); 702cc2d3216SMarc Zyngier } 703cc2d3216SMarc Zyngier 704cc2d3216SMarc Zyngier cmd = its->cmd_write++; 705cc2d3216SMarc Zyngier 706cc2d3216SMarc Zyngier /* Handle queue wrapping */ 707cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 708cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 709cc2d3216SMarc Zyngier 71034d677a9SMarc Zyngier /* Clear command */ 71134d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 71234d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 71334d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 71434d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 71534d677a9SMarc Zyngier 716cc2d3216SMarc Zyngier return cmd; 717cc2d3216SMarc Zyngier } 718cc2d3216SMarc Zyngier 719cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 720cc2d3216SMarc Zyngier { 721cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 722cc2d3216SMarc Zyngier 723cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 724cc2d3216SMarc Zyngier 725cc2d3216SMarc Zyngier return its->cmd_write; 726cc2d3216SMarc Zyngier } 727cc2d3216SMarc Zyngier 728cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 729cc2d3216SMarc Zyngier { 730cc2d3216SMarc Zyngier /* 731cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 732cc2d3216SMarc Zyngier * the ITS. 733cc2d3216SMarc Zyngier */ 734cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 735328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 736cc2d3216SMarc Zyngier else 737cc2d3216SMarc Zyngier dsb(ishst); 738cc2d3216SMarc Zyngier } 739cc2d3216SMarc Zyngier 740a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 741cc2d3216SMarc Zyngier struct its_cmd_block *from, 742cc2d3216SMarc Zyngier struct its_cmd_block *to) 743cc2d3216SMarc Zyngier { 744cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 745cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 746cc2d3216SMarc Zyngier 747cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 748cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 749cc2d3216SMarc Zyngier 750cc2d3216SMarc Zyngier while (1) { 751cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 7529bdd8b1cSMarc Zyngier 7539bdd8b1cSMarc Zyngier /* Direct case */ 7549bdd8b1cSMarc Zyngier if (from_idx < to_idx && rd_idx >= to_idx) 7559bdd8b1cSMarc Zyngier break; 7569bdd8b1cSMarc Zyngier 7579bdd8b1cSMarc Zyngier /* Wrapped case */ 7589bdd8b1cSMarc Zyngier if (from_idx >= to_idx && rd_idx >= to_idx && rd_idx < from_idx) 759cc2d3216SMarc Zyngier break; 760cc2d3216SMarc Zyngier 761cc2d3216SMarc Zyngier count--; 762cc2d3216SMarc Zyngier if (!count) { 763a19b462fSMarc Zyngier pr_err_ratelimited("ITS queue timeout (%llu %llu %llu)\n", 764a19b462fSMarc Zyngier from_idx, to_idx, rd_idx); 765a19b462fSMarc Zyngier return -1; 766cc2d3216SMarc Zyngier } 767cc2d3216SMarc Zyngier cpu_relax(); 768cc2d3216SMarc Zyngier udelay(1); 769cc2d3216SMarc Zyngier } 770a19b462fSMarc Zyngier 771a19b462fSMarc Zyngier return 0; 772cc2d3216SMarc Zyngier } 773cc2d3216SMarc Zyngier 774e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 775e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 776e4f9094bSMarc Zyngier void name(struct its_node *its, \ 777e4f9094bSMarc Zyngier buildtype builder, \ 778e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 779e4f9094bSMarc Zyngier { \ 780e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 781e4f9094bSMarc Zyngier synctype *sync_obj; \ 782e4f9094bSMarc Zyngier unsigned long flags; \ 783e4f9094bSMarc Zyngier \ 784e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 785e4f9094bSMarc Zyngier \ 786e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 787e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 788e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 789e4f9094bSMarc Zyngier return; \ 790e4f9094bSMarc Zyngier } \ 79167047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 792e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 793e4f9094bSMarc Zyngier \ 794e4f9094bSMarc Zyngier if (sync_obj) { \ 795e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 796e4f9094bSMarc Zyngier if (!sync_cmd) \ 797e4f9094bSMarc Zyngier goto post; \ 798e4f9094bSMarc Zyngier \ 79967047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 800e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 801e4f9094bSMarc Zyngier } \ 802e4f9094bSMarc Zyngier \ 803e4f9094bSMarc Zyngier post: \ 804e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 805e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 806e4f9094bSMarc Zyngier \ 807a19b462fSMarc Zyngier if (its_wait_for_range_completion(its, cmd, next_cmd)) \ 808a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 809e4f9094bSMarc Zyngier } 810e4f9094bSMarc Zyngier 81167047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 81267047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 813e4f9094bSMarc Zyngier struct its_collection *sync_col) 814cc2d3216SMarc Zyngier { 815cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 816cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 817e4f9094bSMarc Zyngier 818cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 819cc2d3216SMarc Zyngier } 820cc2d3216SMarc Zyngier 821e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 822e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 823cc2d3216SMarc Zyngier 82467047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 82567047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 826d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 827d011e4e6SMarc Zyngier { 828d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 829d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 830d011e4e6SMarc Zyngier 831d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 832d011e4e6SMarc Zyngier } 833d011e4e6SMarc Zyngier 834d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 835d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 836d011e4e6SMarc Zyngier 8378d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 8388d85dcedSMarc Zyngier { 8398d85dcedSMarc Zyngier struct its_cmd_desc desc; 8408d85dcedSMarc Zyngier 8418d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 8428d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 8438d85dcedSMarc Zyngier 8448d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 8458d85dcedSMarc Zyngier } 8468d85dcedSMarc Zyngier 8478d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 8488d85dcedSMarc Zyngier { 8498d85dcedSMarc Zyngier struct its_cmd_desc desc; 8508d85dcedSMarc Zyngier 8518d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 8528d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 8538d85dcedSMarc Zyngier 8548d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 855cc2d3216SMarc Zyngier } 856cc2d3216SMarc Zyngier 857cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 858cc2d3216SMarc Zyngier { 859cc2d3216SMarc Zyngier struct its_cmd_desc desc; 860cc2d3216SMarc Zyngier 861cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 862cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 863cc2d3216SMarc Zyngier 864cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 865cc2d3216SMarc Zyngier } 866cc2d3216SMarc Zyngier 867cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 868cc2d3216SMarc Zyngier { 869cc2d3216SMarc Zyngier struct its_cmd_desc desc; 870cc2d3216SMarc Zyngier 871cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 872cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 873cc2d3216SMarc Zyngier 874cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 875cc2d3216SMarc Zyngier } 876cc2d3216SMarc Zyngier 877cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 878cc2d3216SMarc Zyngier int valid) 879cc2d3216SMarc Zyngier { 880cc2d3216SMarc Zyngier struct its_cmd_desc desc; 881cc2d3216SMarc Zyngier 882cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 883cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 884cc2d3216SMarc Zyngier 885cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 886cc2d3216SMarc Zyngier } 887cc2d3216SMarc Zyngier 8886a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 889cc2d3216SMarc Zyngier { 890cc2d3216SMarc Zyngier struct its_cmd_desc desc; 891cc2d3216SMarc Zyngier 8926a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 8936a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 8946a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 895cc2d3216SMarc Zyngier 8966a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 897cc2d3216SMarc Zyngier } 898cc2d3216SMarc Zyngier 899cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 900cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 901cc2d3216SMarc Zyngier { 902cc2d3216SMarc Zyngier struct its_cmd_desc desc; 903cc2d3216SMarc Zyngier 904cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 905cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 906591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 907cc2d3216SMarc Zyngier 908cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 909cc2d3216SMarc Zyngier } 910cc2d3216SMarc Zyngier 911cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 912cc2d3216SMarc Zyngier { 913cc2d3216SMarc Zyngier struct its_cmd_desc desc; 914cc2d3216SMarc Zyngier 915cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 916cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 917cc2d3216SMarc Zyngier 918cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 919cc2d3216SMarc Zyngier } 920cc2d3216SMarc Zyngier 921cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 922cc2d3216SMarc Zyngier { 923cc2d3216SMarc Zyngier struct its_cmd_desc desc; 924cc2d3216SMarc Zyngier 925cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 926cc2d3216SMarc Zyngier 927cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 928cc2d3216SMarc Zyngier } 929c48ed51cSMarc Zyngier 930d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 931d011e4e6SMarc Zyngier { 932d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 933d011e4e6SMarc Zyngier struct its_cmd_desc desc; 934d011e4e6SMarc Zyngier 935d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 936d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 937d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 938d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 939d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 940d011e4e6SMarc Zyngier 941d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 942d011e4e6SMarc Zyngier } 943d011e4e6SMarc Zyngier 944d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 945d011e4e6SMarc Zyngier { 946d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 947d011e4e6SMarc Zyngier struct its_cmd_desc desc; 948d011e4e6SMarc Zyngier 949d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 950d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 951d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 952d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 953d011e4e6SMarc Zyngier 954d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 955d011e4e6SMarc Zyngier } 956d011e4e6SMarc Zyngier 95775fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 95875fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 959eb78192bSMarc Zyngier { 960eb78192bSMarc Zyngier struct its_cmd_desc desc; 961eb78192bSMarc Zyngier 962eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 963eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 964eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 96575fd951bSMarc Zyngier 966eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 967eb78192bSMarc Zyngier } 968eb78192bSMarc Zyngier 9693171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 9703171a47aSMarc Zyngier { 9713171a47aSMarc Zyngier struct its_cmd_desc desc; 9723171a47aSMarc Zyngier struct its_node *its; 9733171a47aSMarc Zyngier unsigned long flags; 9743171a47aSMarc Zyngier int col_id = vpe->col_idx; 9753171a47aSMarc Zyngier 9763171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 9773171a47aSMarc Zyngier desc.its_vmovp_cmd.its_list = (u16)its_list_map; 9783171a47aSMarc Zyngier 9793171a47aSMarc Zyngier if (!its_list_map) { 9803171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 9813171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = 0; 9823171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9833171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9843171a47aSMarc Zyngier return; 9853171a47aSMarc Zyngier } 9863171a47aSMarc Zyngier 9873171a47aSMarc Zyngier /* 9883171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 9893171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 9903171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 9913171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 9923171a47aSMarc Zyngier * 9933171a47aSMarc Zyngier * Wall <-- Head. 9943171a47aSMarc Zyngier */ 9953171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 9963171a47aSMarc Zyngier 9973171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 9983171a47aSMarc Zyngier 9993171a47aSMarc Zyngier /* Emit VMOVPs */ 10003171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 10013171a47aSMarc Zyngier if (!its->is_v4) 10023171a47aSMarc Zyngier continue; 10033171a47aSMarc Zyngier 10042247e1bfSMarc Zyngier if (!vpe->its_vm->vlpi_count[its->list_nr]) 10052247e1bfSMarc Zyngier continue; 10062247e1bfSMarc Zyngier 10073171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 10083171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 10093171a47aSMarc Zyngier } 10103171a47aSMarc Zyngier 10113171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 10123171a47aSMarc Zyngier } 10133171a47aSMarc Zyngier 101440619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1015eb78192bSMarc Zyngier { 1016eb78192bSMarc Zyngier struct its_cmd_desc desc; 1017eb78192bSMarc Zyngier 1018eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1019eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1020eb78192bSMarc Zyngier } 1021eb78192bSMarc Zyngier 1022c48ed51cSMarc Zyngier /* 1023c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1024c48ed51cSMarc Zyngier */ 1025c48ed51cSMarc Zyngier 1026c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 1027c48ed51cSMarc Zyngier { 1028c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1029591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 1030c48ed51cSMarc Zyngier } 1031c48ed51cSMarc Zyngier 1032015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1033c48ed51cSMarc Zyngier { 1034015ec038SMarc Zyngier irq_hw_number_t hwirq; 1035e1a2e201SMarc Zyngier void *va; 1036adcdb94eSMarc Zyngier u8 *cfg; 1037c48ed51cSMarc Zyngier 1038015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1039015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1040015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1041d4d7b4adSMarc Zyngier struct its_vlpi_map *map; 1042015ec038SMarc Zyngier 1043e1a2e201SMarc Zyngier va = page_address(its_dev->event_map.vm->vprop_page); 1044d4d7b4adSMarc Zyngier map = &its_dev->event_map.vlpi_maps[event]; 1045d4d7b4adSMarc Zyngier hwirq = map->vintid; 1046d4d7b4adSMarc Zyngier 1047d4d7b4adSMarc Zyngier /* Remember the updated property */ 1048d4d7b4adSMarc Zyngier map->properties &= ~clr; 1049d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1050015ec038SMarc Zyngier } else { 1051e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1052015ec038SMarc Zyngier hwirq = d->hwirq; 1053015ec038SMarc Zyngier } 1054adcdb94eSMarc Zyngier 1055e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1056adcdb94eSMarc Zyngier *cfg &= ~clr; 1057015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1058c48ed51cSMarc Zyngier 1059c48ed51cSMarc Zyngier /* 1060c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1061c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1062c48ed51cSMarc Zyngier * Humpf... 1063c48ed51cSMarc Zyngier */ 1064c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1065328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1066c48ed51cSMarc Zyngier else 1067c48ed51cSMarc Zyngier dsb(ishst); 1068015ec038SMarc Zyngier } 1069015ec038SMarc Zyngier 1070015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1071015ec038SMarc Zyngier { 1072015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1073015ec038SMarc Zyngier 1074015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1075adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 1076c48ed51cSMarc Zyngier } 1077c48ed51cSMarc Zyngier 1078015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1079015ec038SMarc Zyngier { 1080015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1081015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1082015ec038SMarc Zyngier 1083015ec038SMarc Zyngier if (its_dev->event_map.vlpi_maps[event].db_enabled == enable) 1084015ec038SMarc Zyngier return; 1085015ec038SMarc Zyngier 1086015ec038SMarc Zyngier its_dev->event_map.vlpi_maps[event].db_enabled = enable; 1087015ec038SMarc Zyngier 1088015ec038SMarc Zyngier /* 1089015ec038SMarc Zyngier * More fun with the architecture: 1090015ec038SMarc Zyngier * 1091015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1092015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1093015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1094015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1095015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1096015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1097015ec038SMarc Zyngier */ 1098015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1099c48ed51cSMarc Zyngier } 1100c48ed51cSMarc Zyngier 1101c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1102c48ed51cSMarc Zyngier { 1103015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1104015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1105015ec038SMarc Zyngier 1106adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1107c48ed51cSMarc Zyngier } 1108c48ed51cSMarc Zyngier 1109c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1110c48ed51cSMarc Zyngier { 1111015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1112015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1113015ec038SMarc Zyngier 1114adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1115c48ed51cSMarc Zyngier } 1116c48ed51cSMarc Zyngier 1117c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1118c48ed51cSMarc Zyngier bool force) 1119c48ed51cSMarc Zyngier { 1120fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1121fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1122c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1123c48ed51cSMarc Zyngier struct its_collection *target_col; 1124c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1125c48ed51cSMarc Zyngier 1126015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1127015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1128015ec038SMarc Zyngier return -EINVAL; 1129015ec038SMarc Zyngier 1130fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1131fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1132fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1133fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1134fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1135fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1136fbf8f40eSGanapatrao Kulkarni } 1137fbf8f40eSGanapatrao Kulkarni } 1138fbf8f40eSGanapatrao Kulkarni 1139fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1140fbf8f40eSGanapatrao Kulkarni 1141c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1142c48ed51cSMarc Zyngier return -EINVAL; 1143c48ed51cSMarc Zyngier 11448b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 11458b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1146c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1147c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1148591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 11490d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 11508b8d94a7SMaJun } 1151c48ed51cSMarc Zyngier 1152c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1153c48ed51cSMarc Zyngier } 1154c48ed51cSMarc Zyngier 1155558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1156558b0165SArd Biesheuvel { 1157558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1158558b0165SArd Biesheuvel 1159558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1160558b0165SArd Biesheuvel } 1161558b0165SArd Biesheuvel 1162b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1163b48ac83dSMarc Zyngier { 1164b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1165b48ac83dSMarc Zyngier struct its_node *its; 1166b48ac83dSMarc Zyngier u64 addr; 1167b48ac83dSMarc Zyngier 1168b48ac83dSMarc Zyngier its = its_dev->its; 1169558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1170b48ac83dSMarc Zyngier 1171b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1172b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1173b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 117444bb7e24SRobin Murphy 117544bb7e24SRobin Murphy iommu_dma_map_msi_msg(d->irq, msg); 1176b48ac83dSMarc Zyngier } 1177b48ac83dSMarc Zyngier 11788d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 11798d85dcedSMarc Zyngier enum irqchip_irq_state which, 11808d85dcedSMarc Zyngier bool state) 11818d85dcedSMarc Zyngier { 11828d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 11838d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 11848d85dcedSMarc Zyngier 11858d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 11868d85dcedSMarc Zyngier return -EINVAL; 11878d85dcedSMarc Zyngier 11888d85dcedSMarc Zyngier if (state) 11898d85dcedSMarc Zyngier its_send_int(its_dev, event); 11908d85dcedSMarc Zyngier else 11918d85dcedSMarc Zyngier its_send_clear(its_dev, event); 11928d85dcedSMarc Zyngier 11938d85dcedSMarc Zyngier return 0; 11948d85dcedSMarc Zyngier } 11958d85dcedSMarc Zyngier 11962247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 11972247e1bfSMarc Zyngier { 11982247e1bfSMarc Zyngier unsigned long flags; 11992247e1bfSMarc Zyngier 12002247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12012247e1bfSMarc Zyngier if (!its_list_map) 12022247e1bfSMarc Zyngier return; 12032247e1bfSMarc Zyngier 12042247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12052247e1bfSMarc Zyngier 12062247e1bfSMarc Zyngier /* 12072247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 12082247e1bfSMarc Zyngier * them mapped now. 12092247e1bfSMarc Zyngier */ 12102247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 12112247e1bfSMarc Zyngier 12122247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 12132247e1bfSMarc Zyngier int i; 12142247e1bfSMarc Zyngier 12152247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 12162247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 121744c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 12182247e1bfSMarc Zyngier 12192247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 12202247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 12212247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 12222247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 122344c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 12242247e1bfSMarc Zyngier } 12252247e1bfSMarc Zyngier } 12262247e1bfSMarc Zyngier 12272247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12282247e1bfSMarc Zyngier } 12292247e1bfSMarc Zyngier 12302247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 12312247e1bfSMarc Zyngier { 12322247e1bfSMarc Zyngier unsigned long flags; 12332247e1bfSMarc Zyngier 12342247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12352247e1bfSMarc Zyngier if (!its_list_map) 12362247e1bfSMarc Zyngier return; 12372247e1bfSMarc Zyngier 12382247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12392247e1bfSMarc Zyngier 12402247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 12412247e1bfSMarc Zyngier int i; 12422247e1bfSMarc Zyngier 12432247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 12442247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 12452247e1bfSMarc Zyngier } 12462247e1bfSMarc Zyngier 12472247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12482247e1bfSMarc Zyngier } 12492247e1bfSMarc Zyngier 1250d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1251d011e4e6SMarc Zyngier { 1252d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1253d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1254d011e4e6SMarc Zyngier int ret = 0; 1255d011e4e6SMarc Zyngier 1256d011e4e6SMarc Zyngier if (!info->map) 1257d011e4e6SMarc Zyngier return -EINVAL; 1258d011e4e6SMarc Zyngier 1259d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1260d011e4e6SMarc Zyngier 1261d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1262d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1263d011e4e6SMarc Zyngier 12646396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 1265d011e4e6SMarc Zyngier GFP_KERNEL); 1266d011e4e6SMarc Zyngier if (!maps) { 1267d011e4e6SMarc Zyngier ret = -ENOMEM; 1268d011e4e6SMarc Zyngier goto out; 1269d011e4e6SMarc Zyngier } 1270d011e4e6SMarc Zyngier 1271d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1272d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1273d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1274d011e4e6SMarc Zyngier ret = -EINVAL; 1275d011e4e6SMarc Zyngier goto out; 1276d011e4e6SMarc Zyngier } 1277d011e4e6SMarc Zyngier 1278d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1279d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1280d011e4e6SMarc Zyngier 1281d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1282d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1283d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1284d011e4e6SMarc Zyngier } else { 12852247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 12862247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 12872247e1bfSMarc Zyngier 1288d4d7b4adSMarc Zyngier /* 1289d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1290d4d7b4adSMarc Zyngier * start poking the virtual property table. 1291d4d7b4adSMarc Zyngier */ 1292d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1293d4d7b4adSMarc Zyngier 1294d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1295d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1296d4d7b4adSMarc Zyngier 1297d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1298d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1299d011e4e6SMarc Zyngier 1300d011e4e6SMarc Zyngier /* and install the virtual one */ 1301d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1302d011e4e6SMarc Zyngier 1303d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1304d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1305d011e4e6SMarc Zyngier } 1306d011e4e6SMarc Zyngier 1307d011e4e6SMarc Zyngier out: 1308d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1309d011e4e6SMarc Zyngier return ret; 1310d011e4e6SMarc Zyngier } 1311d011e4e6SMarc Zyngier 1312d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1313d011e4e6SMarc Zyngier { 1314d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1315d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1316d011e4e6SMarc Zyngier int ret = 0; 1317d011e4e6SMarc Zyngier 1318d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1319d011e4e6SMarc Zyngier 1320d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || 1321d011e4e6SMarc Zyngier !its_dev->event_map.vlpi_maps[event].vm) { 1322d011e4e6SMarc Zyngier ret = -EINVAL; 1323d011e4e6SMarc Zyngier goto out; 1324d011e4e6SMarc Zyngier } 1325d011e4e6SMarc Zyngier 1326d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1327d011e4e6SMarc Zyngier *info->map = its_dev->event_map.vlpi_maps[event]; 1328d011e4e6SMarc Zyngier 1329d011e4e6SMarc Zyngier out: 1330d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1331d011e4e6SMarc Zyngier return ret; 1332d011e4e6SMarc Zyngier } 1333d011e4e6SMarc Zyngier 1334d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1335d011e4e6SMarc Zyngier { 1336d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1337d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1338d011e4e6SMarc Zyngier int ret = 0; 1339d011e4e6SMarc Zyngier 1340d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1341d011e4e6SMarc Zyngier 1342d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1343d011e4e6SMarc Zyngier ret = -EINVAL; 1344d011e4e6SMarc Zyngier goto out; 1345d011e4e6SMarc Zyngier } 1346d011e4e6SMarc Zyngier 1347d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1348d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1349d011e4e6SMarc Zyngier 1350d011e4e6SMarc Zyngier /* and restore the physical one */ 1351d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1352d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1353d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1354d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1355d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1356d011e4e6SMarc Zyngier 13572247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 13582247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 13592247e1bfSMarc Zyngier 1360d011e4e6SMarc Zyngier /* 1361d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1362d011e4e6SMarc Zyngier * this was the last VLPI. 1363d011e4e6SMarc Zyngier */ 1364d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1365d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1366d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1367d011e4e6SMarc Zyngier } 1368d011e4e6SMarc Zyngier 1369d011e4e6SMarc Zyngier out: 1370d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1371d011e4e6SMarc Zyngier return ret; 1372d011e4e6SMarc Zyngier } 1373d011e4e6SMarc Zyngier 1374015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1375015ec038SMarc Zyngier { 1376015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1377015ec038SMarc Zyngier 1378015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1379015ec038SMarc Zyngier return -EINVAL; 1380015ec038SMarc Zyngier 1381015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1382015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1383015ec038SMarc Zyngier else 1384015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1385015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1386015ec038SMarc Zyngier 1387015ec038SMarc Zyngier return 0; 1388015ec038SMarc Zyngier } 1389015ec038SMarc Zyngier 1390c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1391c808eea8SMarc Zyngier { 1392c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1393c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1394c808eea8SMarc Zyngier 1395c808eea8SMarc Zyngier /* Need a v4 ITS */ 1396d011e4e6SMarc Zyngier if (!its_dev->its->is_v4) 1397c808eea8SMarc Zyngier return -EINVAL; 1398c808eea8SMarc Zyngier 1399d011e4e6SMarc Zyngier /* Unmap request? */ 1400d011e4e6SMarc Zyngier if (!info) 1401d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1402d011e4e6SMarc Zyngier 1403c808eea8SMarc Zyngier switch (info->cmd_type) { 1404c808eea8SMarc Zyngier case MAP_VLPI: 1405d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1406c808eea8SMarc Zyngier 1407c808eea8SMarc Zyngier case GET_VLPI: 1408d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1409c808eea8SMarc Zyngier 1410c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1411c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1412015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1413c808eea8SMarc Zyngier 1414c808eea8SMarc Zyngier default: 1415c808eea8SMarc Zyngier return -EINVAL; 1416c808eea8SMarc Zyngier } 1417c808eea8SMarc Zyngier } 1418c808eea8SMarc Zyngier 1419c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1420c48ed51cSMarc Zyngier .name = "ITS", 1421c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1422c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1423004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1424c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1425b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 14268d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1427c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1428b48ac83dSMarc Zyngier }; 1429b48ac83dSMarc Zyngier 1430880cb3cdSMarc Zyngier 1431bf9529f8SMarc Zyngier /* 1432bf9529f8SMarc Zyngier * How we allocate LPIs: 1433bf9529f8SMarc Zyngier * 1434880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1435880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1436880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1437880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1438bf9529f8SMarc Zyngier * 1439880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1440880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1441880cb3cdSMarc Zyngier * already free block. 1442880cb3cdSMarc Zyngier * 1443880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1444880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1445880cb3cdSMarc Zyngier */ 14464cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1447880cb3cdSMarc Zyngier 1448880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 1449880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 1450bf9529f8SMarc Zyngier 1451880cb3cdSMarc Zyngier struct lpi_range { 1452880cb3cdSMarc Zyngier struct list_head entry; 1453880cb3cdSMarc Zyngier u32 base_id; 1454880cb3cdSMarc Zyngier u32 span; 1455880cb3cdSMarc Zyngier }; 1456880cb3cdSMarc Zyngier 1457880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 1458bf9529f8SMarc Zyngier { 1459880cb3cdSMarc Zyngier struct lpi_range *range; 1460880cb3cdSMarc Zyngier 1461880cb3cdSMarc Zyngier range = kzalloc(sizeof(*range), GFP_KERNEL); 1462880cb3cdSMarc Zyngier if (range) { 1463880cb3cdSMarc Zyngier INIT_LIST_HEAD(&range->entry); 1464880cb3cdSMarc Zyngier range->base_id = base; 1465880cb3cdSMarc Zyngier range->span = span; 1466bf9529f8SMarc Zyngier } 1467bf9529f8SMarc Zyngier 1468880cb3cdSMarc Zyngier return range; 1469880cb3cdSMarc Zyngier } 1470880cb3cdSMarc Zyngier 1471880cb3cdSMarc Zyngier static int lpi_range_cmp(void *priv, struct list_head *a, struct list_head *b) 1472bf9529f8SMarc Zyngier { 1473880cb3cdSMarc Zyngier struct lpi_range *ra, *rb; 1474880cb3cdSMarc Zyngier 1475880cb3cdSMarc Zyngier ra = container_of(a, struct lpi_range, entry); 1476880cb3cdSMarc Zyngier rb = container_of(b, struct lpi_range, entry); 1477880cb3cdSMarc Zyngier 1478880cb3cdSMarc Zyngier return rb->base_id - ra->base_id; 1479880cb3cdSMarc Zyngier } 1480880cb3cdSMarc Zyngier 1481880cb3cdSMarc Zyngier static void merge_lpi_ranges(void) 1482880cb3cdSMarc Zyngier { 1483880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1484880cb3cdSMarc Zyngier 1485880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1486880cb3cdSMarc Zyngier if (!list_is_last(&range->entry, &lpi_range_list) && 1487880cb3cdSMarc Zyngier (tmp->base_id == (range->base_id + range->span))) { 1488880cb3cdSMarc Zyngier tmp->base_id = range->base_id; 1489880cb3cdSMarc Zyngier tmp->span += range->span; 1490880cb3cdSMarc Zyngier list_del(&range->entry); 1491880cb3cdSMarc Zyngier kfree(range); 1492880cb3cdSMarc Zyngier } 1493880cb3cdSMarc Zyngier } 1494880cb3cdSMarc Zyngier } 1495880cb3cdSMarc Zyngier 1496880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 1497880cb3cdSMarc Zyngier { 1498880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1499880cb3cdSMarc Zyngier int err = -ENOSPC; 1500880cb3cdSMarc Zyngier 1501880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1502880cb3cdSMarc Zyngier 1503880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1504880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 1505880cb3cdSMarc Zyngier *base = range->base_id; 1506880cb3cdSMarc Zyngier range->base_id += nr_lpis; 1507880cb3cdSMarc Zyngier range->span -= nr_lpis; 1508880cb3cdSMarc Zyngier 1509880cb3cdSMarc Zyngier if (range->span == 0) { 1510880cb3cdSMarc Zyngier list_del(&range->entry); 1511880cb3cdSMarc Zyngier kfree(range); 1512880cb3cdSMarc Zyngier } 1513880cb3cdSMarc Zyngier 1514880cb3cdSMarc Zyngier err = 0; 1515880cb3cdSMarc Zyngier break; 1516880cb3cdSMarc Zyngier } 1517880cb3cdSMarc Zyngier } 1518880cb3cdSMarc Zyngier 1519880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1520880cb3cdSMarc Zyngier 1521880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 1522880cb3cdSMarc Zyngier return err; 1523880cb3cdSMarc Zyngier } 1524880cb3cdSMarc Zyngier 1525880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 1526880cb3cdSMarc Zyngier { 1527880cb3cdSMarc Zyngier struct lpi_range *new; 1528880cb3cdSMarc Zyngier int err = 0; 1529880cb3cdSMarc Zyngier 1530880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1531880cb3cdSMarc Zyngier 1532880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 1533880cb3cdSMarc Zyngier if (!new) { 1534880cb3cdSMarc Zyngier err = -ENOMEM; 1535880cb3cdSMarc Zyngier goto out; 1536880cb3cdSMarc Zyngier } 1537880cb3cdSMarc Zyngier 1538880cb3cdSMarc Zyngier list_add(&new->entry, &lpi_range_list); 1539880cb3cdSMarc Zyngier list_sort(NULL, &lpi_range_list, lpi_range_cmp); 1540880cb3cdSMarc Zyngier merge_lpi_ranges(); 1541880cb3cdSMarc Zyngier out: 1542880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1543880cb3cdSMarc Zyngier return err; 1544bf9529f8SMarc Zyngier } 1545bf9529f8SMarc Zyngier 154604a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1547bf9529f8SMarc Zyngier { 1548880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 154912b2905aSMarc Zyngier u32 numlpis; 1550880cb3cdSMarc Zyngier int err; 1551bf9529f8SMarc Zyngier 155212b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 155312b2905aSMarc Zyngier 155412b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 155512b2905aSMarc Zyngier lpis = numlpis; 155612b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 155712b2905aSMarc Zyngier lpis); 155812b2905aSMarc Zyngier } 155912b2905aSMarc Zyngier 1560880cb3cdSMarc Zyngier /* 1561880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 1562880cb3cdSMarc Zyngier * full range of LPIs. 1563880cb3cdSMarc Zyngier */ 1564880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 1565880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 1566880cb3cdSMarc Zyngier return err; 1567bf9529f8SMarc Zyngier } 1568bf9529f8SMarc Zyngier 156938dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 1570bf9529f8SMarc Zyngier { 1571bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1572880cb3cdSMarc Zyngier int err = 0; 1573bf9529f8SMarc Zyngier 1574bf9529f8SMarc Zyngier do { 157538dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 1576880cb3cdSMarc Zyngier if (!err) 1577bf9529f8SMarc Zyngier break; 1578bf9529f8SMarc Zyngier 157938dd7c49SMarc Zyngier nr_irqs /= 2; 158038dd7c49SMarc Zyngier } while (nr_irqs > 0); 1581bf9529f8SMarc Zyngier 1582880cb3cdSMarc Zyngier if (err) 1583bf9529f8SMarc Zyngier goto out; 1584bf9529f8SMarc Zyngier 158538dd7c49SMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_irqs), sizeof (long), GFP_ATOMIC); 1586bf9529f8SMarc Zyngier if (!bitmap) 1587bf9529f8SMarc Zyngier goto out; 1588bf9529f8SMarc Zyngier 158938dd7c49SMarc Zyngier *nr_ids = nr_irqs; 1590bf9529f8SMarc Zyngier 1591bf9529f8SMarc Zyngier out: 1592c8415b94SMarc Zyngier if (!bitmap) 1593c8415b94SMarc Zyngier *base = *nr_ids = 0; 1594c8415b94SMarc Zyngier 1595bf9529f8SMarc Zyngier return bitmap; 1596bf9529f8SMarc Zyngier } 1597bf9529f8SMarc Zyngier 159838dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 1599bf9529f8SMarc Zyngier { 1600880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 1601cf2be8baSMarc Zyngier kfree(bitmap); 1602bf9529f8SMarc Zyngier } 16031ac19ca6SMarc Zyngier 1604053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 1605053be485SMarc Zyngier { 1606053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 1607053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 1608053be485SMarc Zyngier 1609053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 1610053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 1611053be485SMarc Zyngier } 1612053be485SMarc Zyngier 16130e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 16140e5ccf91SMarc Zyngier { 16150e5ccf91SMarc Zyngier struct page *prop_page; 16161ac19ca6SMarc Zyngier 16170e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 16180e5ccf91SMarc Zyngier if (!prop_page) 16190e5ccf91SMarc Zyngier return NULL; 16200e5ccf91SMarc Zyngier 1621053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 16220e5ccf91SMarc Zyngier 16230e5ccf91SMarc Zyngier return prop_page; 16240e5ccf91SMarc Zyngier } 16250e5ccf91SMarc Zyngier 16267d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 16277d75bbb4SMarc Zyngier { 16287d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 16297d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 16307d75bbb4SMarc Zyngier } 16311ac19ca6SMarc Zyngier 1632*3fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 1633*3fb68faeSMarc Zyngier { 1634*3fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 1635*3fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 1636*3fb68faeSMarc Zyngier 1637*3fb68faeSMarc Zyngier return 0; 1638*3fb68faeSMarc Zyngier } 1639*3fb68faeSMarc Zyngier 164011e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 16411ac19ca6SMarc Zyngier { 1642c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 1643c440a9d9SMarc Zyngier u64 val; 1644c440a9d9SMarc Zyngier 1645c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 1646c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 1647c440a9d9SMarc Zyngier 1648c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 1649c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 1650c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 1651c440a9d9SMarc Zyngier MEMREMAP_WB); 1652c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 1653c440a9d9SMarc Zyngier } else { 1654e1a2e201SMarc Zyngier struct page *page; 16551ac19ca6SMarc Zyngier 1656c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 1657c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 16584cb205c0SJia He ITS_MAX_LPI_NRBITS); 1659e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 1660e1a2e201SMarc Zyngier if (!page) { 16611ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 16621ac19ca6SMarc Zyngier return -ENOMEM; 16631ac19ca6SMarc Zyngier } 16641ac19ca6SMarc Zyngier 1665e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 1666e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 1667*3fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 1668*3fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 1669c440a9d9SMarc Zyngier } 1670e1a2e201SMarc Zyngier 1671e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 1672e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 16731ac19ca6SMarc Zyngier 16746c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 16751ac19ca6SMarc Zyngier } 16761ac19ca6SMarc Zyngier 16771ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 16781ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 16791ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 16804f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 16811ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 16821ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 16831ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 16841ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 16851ac19ca6SMarc Zyngier }; 16861ac19ca6SMarc Zyngier 16872d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 16882d81d425SShanker Donthineni { 16892d81d425SShanker Donthineni u32 idx = baser - its->tables; 16902d81d425SShanker Donthineni 16910968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 16922d81d425SShanker Donthineni } 16932d81d425SShanker Donthineni 16942d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 16952d81d425SShanker Donthineni u64 val) 16962d81d425SShanker Donthineni { 16972d81d425SShanker Donthineni u32 idx = baser - its->tables; 16982d81d425SShanker Donthineni 16990968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 17002d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 17012d81d425SShanker Donthineni } 17022d81d425SShanker Donthineni 17039347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 17043faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 17053faf24eaSShanker Donthineni bool indirect) 17069347359aSShanker Donthineni { 17079347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 17089347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 17099347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 171030ae9610SShanker Donthineni u64 baser_phys, tmp; 17119347359aSShanker Donthineni u32 alloc_pages; 17129347359aSShanker Donthineni void *base; 17139347359aSShanker Donthineni 17149347359aSShanker Donthineni retry_alloc_baser: 17159347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 17169347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 17179347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 17189347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 17199347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 17209347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 17219347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 17229347359aSShanker Donthineni } 17239347359aSShanker Donthineni 17249347359aSShanker Donthineni base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 17259347359aSShanker Donthineni if (!base) 17269347359aSShanker Donthineni return -ENOMEM; 17279347359aSShanker Donthineni 172830ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 172930ae9610SShanker Donthineni 173030ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 173130ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 173230ae9610SShanker Donthineni 173330ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 173430ae9610SShanker Donthineni if (psz != SZ_64K) { 173530ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 173630ae9610SShanker Donthineni free_pages((unsigned long)base, order); 173730ae9610SShanker Donthineni return -ENXIO; 173830ae9610SShanker Donthineni } 173930ae9610SShanker Donthineni 174030ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 174130ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 174230ae9610SShanker Donthineni } 174330ae9610SShanker Donthineni 17449347359aSShanker Donthineni retry_baser: 174530ae9610SShanker Donthineni val = (baser_phys | 17469347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 17479347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 17489347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 17499347359aSShanker Donthineni cache | 17509347359aSShanker Donthineni shr | 17519347359aSShanker Donthineni GITS_BASER_VALID); 17529347359aSShanker Donthineni 17533faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 17543faf24eaSShanker Donthineni 17559347359aSShanker Donthineni switch (psz) { 17569347359aSShanker Donthineni case SZ_4K: 17579347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 17589347359aSShanker Donthineni break; 17599347359aSShanker Donthineni case SZ_16K: 17609347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 17619347359aSShanker Donthineni break; 17629347359aSShanker Donthineni case SZ_64K: 17639347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 17649347359aSShanker Donthineni break; 17659347359aSShanker Donthineni } 17669347359aSShanker Donthineni 17679347359aSShanker Donthineni its_write_baser(its, baser, val); 17689347359aSShanker Donthineni tmp = baser->val; 17699347359aSShanker Donthineni 17709347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 17719347359aSShanker Donthineni /* 17729347359aSShanker Donthineni * Shareability didn't stick. Just use 17739347359aSShanker Donthineni * whatever the read reported, which is likely 17749347359aSShanker Donthineni * to be the only thing this redistributor 17759347359aSShanker Donthineni * supports. If that's zero, make it 17769347359aSShanker Donthineni * non-cacheable as well. 17779347359aSShanker Donthineni */ 17789347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 17799347359aSShanker Donthineni if (!shr) { 17809347359aSShanker Donthineni cache = GITS_BASER_nC; 1781328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 17829347359aSShanker Donthineni } 17839347359aSShanker Donthineni goto retry_baser; 17849347359aSShanker Donthineni } 17859347359aSShanker Donthineni 17869347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 17879347359aSShanker Donthineni /* 17889347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 17899347359aSShanker Donthineni * size and retry. If we reach 4K, then 17909347359aSShanker Donthineni * something is horribly wrong... 17919347359aSShanker Donthineni */ 17929347359aSShanker Donthineni free_pages((unsigned long)base, order); 17939347359aSShanker Donthineni baser->base = NULL; 17949347359aSShanker Donthineni 17959347359aSShanker Donthineni switch (psz) { 17969347359aSShanker Donthineni case SZ_16K: 17979347359aSShanker Donthineni psz = SZ_4K; 17989347359aSShanker Donthineni goto retry_alloc_baser; 17999347359aSShanker Donthineni case SZ_64K: 18009347359aSShanker Donthineni psz = SZ_16K; 18019347359aSShanker Donthineni goto retry_alloc_baser; 18029347359aSShanker Donthineni } 18039347359aSShanker Donthineni } 18049347359aSShanker Donthineni 18059347359aSShanker Donthineni if (val != tmp) { 1806b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 18079347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1808b11283ebSVladimir Murzin val, tmp); 18099347359aSShanker Donthineni free_pages((unsigned long)base, order); 18109347359aSShanker Donthineni return -ENXIO; 18119347359aSShanker Donthineni } 18129347359aSShanker Donthineni 18139347359aSShanker Donthineni baser->order = order; 18149347359aSShanker Donthineni baser->base = base; 18159347359aSShanker Donthineni baser->psz = psz; 18163faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 18179347359aSShanker Donthineni 18183faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1819d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 18209347359aSShanker Donthineni its_base_type_string[type], 18219347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 18223faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 18239347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 18249347359aSShanker Donthineni 18259347359aSShanker Donthineni return 0; 18269347359aSShanker Donthineni } 18279347359aSShanker Donthineni 18284cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 18294cacac57SMarc Zyngier struct its_baser *baser, 183032bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 18314b75c459SShanker Donthineni { 18324cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 18334cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 18344cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 18352fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 18364b75c459SShanker Donthineni u32 new_order = *order; 18373faf24eaSShanker Donthineni bool indirect = false; 18383faf24eaSShanker Donthineni 18393faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 18403faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 18413faf24eaSShanker Donthineni /* 18423faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 18433faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 18443faf24eaSShanker Donthineni */ 18453faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 18463faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 18473faf24eaSShanker Donthineni 18483faf24eaSShanker Donthineni if (indirect) { 18493faf24eaSShanker Donthineni /* 18503faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 18513faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 18523faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 18533faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 18543faf24eaSShanker Donthineni * entry size. 18553faf24eaSShanker Donthineni */ 1856d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 18573faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 18583faf24eaSShanker Donthineni } 18593faf24eaSShanker Donthineni } 18604b75c459SShanker Donthineni 18614b75c459SShanker Donthineni /* 18624b75c459SShanker Donthineni * Allocate as many entries as required to fit the 18634b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 18644b75c459SShanker Donthineni * space being incredibly sparse, this results in a 18653faf24eaSShanker Donthineni * massive waste of memory if two-level device table 18663faf24eaSShanker Donthineni * feature is not supported by hardware. 18674b75c459SShanker Donthineni */ 18684b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 18694b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 18704b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1871d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 18724cacac57SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %u->%u\n", 18734cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 18744cacac57SMarc Zyngier its->device_ids, ids); 18754b75c459SShanker Donthineni } 18764b75c459SShanker Donthineni 18774b75c459SShanker Donthineni *order = new_order; 18783faf24eaSShanker Donthineni 18793faf24eaSShanker Donthineni return indirect; 18804b75c459SShanker Donthineni } 18814b75c459SShanker Donthineni 18821ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 18831ac19ca6SMarc Zyngier { 18841ac19ca6SMarc Zyngier int i; 18851ac19ca6SMarc Zyngier 18861ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 18871a485f4dSShanker Donthineni if (its->tables[i].base) { 18881a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 18891a485f4dSShanker Donthineni its->tables[i].order); 18901a485f4dSShanker Donthineni its->tables[i].base = NULL; 18911ac19ca6SMarc Zyngier } 18921ac19ca6SMarc Zyngier } 18931ac19ca6SMarc Zyngier } 18941ac19ca6SMarc Zyngier 18950e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 18961ac19ca6SMarc Zyngier { 18971ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 18982fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 18999347359aSShanker Donthineni u32 psz = SZ_64K; 19009347359aSShanker Donthineni int err, i; 190194100970SRobert Richter 1902fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 1903fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 19049347359aSShanker Donthineni cache = GITS_BASER_nCnB; 1905466b7d16SShanker Donthineni 19061ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 19072d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 19082d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 19091ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 19109347359aSShanker Donthineni u32 order = get_order(psz); 19113faf24eaSShanker Donthineni bool indirect = false; 19121ac19ca6SMarc Zyngier 19134cacac57SMarc Zyngier switch (type) { 19144cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 19151ac19ca6SMarc Zyngier continue; 19161ac19ca6SMarc Zyngier 19174cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 191832bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 191932bd44dcSShanker Donthineni psz, &order, 192032bd44dcSShanker Donthineni its->device_ids); 19214cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 19224cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 192332bd44dcSShanker Donthineni psz, &order, 192432bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 19254cacac57SMarc Zyngier break; 19264cacac57SMarc Zyngier } 1927f54b97edSMarc Zyngier 19283faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 19299347359aSShanker Donthineni if (err < 0) { 19309347359aSShanker Donthineni its_free_tables(its); 19319347359aSShanker Donthineni return err; 193230f21363SRobert Richter } 193330f21363SRobert Richter 19349347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 19359347359aSShanker Donthineni psz = baser->psz; 19369347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 19379347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 19381ac19ca6SMarc Zyngier } 19391ac19ca6SMarc Zyngier 19401ac19ca6SMarc Zyngier return 0; 19411ac19ca6SMarc Zyngier } 19421ac19ca6SMarc Zyngier 19431ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 19441ac19ca6SMarc Zyngier { 194583559b47SMarc Zyngier int i; 194683559b47SMarc Zyngier 19476396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 19481ac19ca6SMarc Zyngier GFP_KERNEL); 19491ac19ca6SMarc Zyngier if (!its->collections) 19501ac19ca6SMarc Zyngier return -ENOMEM; 19511ac19ca6SMarc Zyngier 195283559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 195383559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 195483559b47SMarc Zyngier 19551ac19ca6SMarc Zyngier return 0; 19561ac19ca6SMarc Zyngier } 19571ac19ca6SMarc Zyngier 19587c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 19597c297a2dSMarc Zyngier { 19607c297a2dSMarc Zyngier struct page *pend_page; 1961adaab500SMarc Zyngier 19627c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 1963adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 19647c297a2dSMarc Zyngier if (!pend_page) 19657c297a2dSMarc Zyngier return NULL; 19667c297a2dSMarc Zyngier 19677c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 19687c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 19697c297a2dSMarc Zyngier 19707c297a2dSMarc Zyngier return pend_page; 19717c297a2dSMarc Zyngier } 19727c297a2dSMarc Zyngier 19737d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 19747d75bbb4SMarc Zyngier { 1975adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 19767d75bbb4SMarc Zyngier } 19777d75bbb4SMarc Zyngier 1978c6e2ccb6SMarc Zyngier /* 1979c6e2ccb6SMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. 1980c6e2ccb6SMarc Zyngier */ 1981c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 1982c440a9d9SMarc Zyngier { 1983c6e2ccb6SMarc Zyngier /* Allow a kdump kernel */ 1984c6e2ccb6SMarc Zyngier if (is_kdump_kernel()) 1985c6e2ccb6SMarc Zyngier return true; 1986c6e2ccb6SMarc Zyngier 1987c440a9d9SMarc Zyngier return false; 1988c440a9d9SMarc Zyngier } 1989c440a9d9SMarc Zyngier 199011e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 199111e37d35SMarc Zyngier { 1992c440a9d9SMarc Zyngier u64 val; 199311e37d35SMarc Zyngier int err, cpu; 199411e37d35SMarc Zyngier 1995c440a9d9SMarc Zyngier /* 1996c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 1997c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 1998c440a9d9SMarc Zyngier */ 1999c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 2000c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 2001c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 2002c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 2003c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 2004c440a9d9SMarc Zyngier } 2005c440a9d9SMarc Zyngier 200611e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 200711e37d35SMarc Zyngier if (err) 200811e37d35SMarc Zyngier return err; 200911e37d35SMarc Zyngier 201011e37d35SMarc Zyngier /* 201111e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 201211e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 201311e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 201411e37d35SMarc Zyngier */ 201511e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 201611e37d35SMarc Zyngier struct page *pend_page; 201711e37d35SMarc Zyngier 201811e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 201911e37d35SMarc Zyngier if (!pend_page) { 202011e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 202111e37d35SMarc Zyngier return -ENOMEM; 202211e37d35SMarc Zyngier } 202311e37d35SMarc Zyngier 202411e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 202511e37d35SMarc Zyngier } 202611e37d35SMarc Zyngier 202711e37d35SMarc Zyngier return 0; 202811e37d35SMarc Zyngier } 202911e37d35SMarc Zyngier 20301ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 20311ac19ca6SMarc Zyngier { 20321ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 20331ac19ca6SMarc Zyngier struct page *pend_page; 203411e37d35SMarc Zyngier phys_addr_t paddr; 20351ac19ca6SMarc Zyngier u64 val, tmp; 20361ac19ca6SMarc Zyngier 203711e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 20381ac19ca6SMarc Zyngier return; 20391ac19ca6SMarc Zyngier 2040c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 2041c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 2042c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 2043f842ca8eSMarc Zyngier /* 2044f842ca8eSMarc Zyngier * Check that we get the same property table on all 2045f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 2046f842ca8eSMarc Zyngier */ 2047f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 2048f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 2049f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 2050f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 2051f842ca8eSMarc Zyngier 2052c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2053c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 2054c440a9d9SMarc Zyngier 2055c440a9d9SMarc Zyngier its_free_pending_table(gic_data_rdist()->pend_page); 2056c440a9d9SMarc Zyngier gic_data_rdist()->pend_page = NULL; 2057c440a9d9SMarc Zyngier 2058c440a9d9SMarc Zyngier goto out; 2059c440a9d9SMarc Zyngier } 2060c440a9d9SMarc Zyngier 206111e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 20621ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 2063*3fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 20641ac19ca6SMarc Zyngier 20651ac19ca6SMarc Zyngier /* set PROPBASE */ 2066e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 20671ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 20682fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 20691ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 20701ac19ca6SMarc Zyngier 20710968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 20720968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 20731ac19ca6SMarc Zyngier 20741ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 2075241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 2076241a386cSMarc Zyngier /* 2077241a386cSMarc Zyngier * The HW reports non-shareable, we must 2078241a386cSMarc Zyngier * remove the cacheability attributes as 2079241a386cSMarc Zyngier * well. 2080241a386cSMarc Zyngier */ 2081241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 2082241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 2083241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 20840968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 2085241a386cSMarc Zyngier } 20861ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 20871ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 20881ac19ca6SMarc Zyngier } 20891ac19ca6SMarc Zyngier 20901ac19ca6SMarc Zyngier /* set PENDBASE */ 20911ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 20924ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 20932fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 20941ac19ca6SMarc Zyngier 20950968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 20960968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2097241a386cSMarc Zyngier 2098241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 2099241a386cSMarc Zyngier /* 2100241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 2101241a386cSMarc Zyngier * cacheability attributes as well. 2102241a386cSMarc Zyngier */ 2103241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 2104241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 2105241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 21060968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 2107241a386cSMarc Zyngier } 21081ac19ca6SMarc Zyngier 21091ac19ca6SMarc Zyngier /* Enable LPIs */ 21101ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 21111ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 21121ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 21131ac19ca6SMarc Zyngier 21141ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 21151ac19ca6SMarc Zyngier dsb(sy); 2116c440a9d9SMarc Zyngier out: 211711e37d35SMarc Zyngier gic_data_rdist()->lpi_enabled = true; 2118c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 211911e37d35SMarc Zyngier smp_processor_id(), 2120c440a9d9SMarc Zyngier gic_data_rdist()->pend_page ? "allocated" : "reserved", 212111e37d35SMarc Zyngier &paddr); 21221ac19ca6SMarc Zyngier } 21231ac19ca6SMarc Zyngier 2124920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 21251ac19ca6SMarc Zyngier { 2126920181ceSDerek Basehore int cpu = smp_processor_id(); 21271ac19ca6SMarc Zyngier u64 target; 21281ac19ca6SMarc Zyngier 2129fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 2130fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 2131fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 2132fbf8f40eSGanapatrao Kulkarni 2133fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 2134fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 2135fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 2136920181ceSDerek Basehore return; 2137fbf8f40eSGanapatrao Kulkarni } 2138fbf8f40eSGanapatrao Kulkarni 21391ac19ca6SMarc Zyngier /* 21401ac19ca6SMarc Zyngier * We now have to bind each collection to its target 21411ac19ca6SMarc Zyngier * redistributor. 21421ac19ca6SMarc Zyngier */ 2143589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 21441ac19ca6SMarc Zyngier /* 21451ac19ca6SMarc Zyngier * This ITS wants the physical address of the 21461ac19ca6SMarc Zyngier * redistributor. 21471ac19ca6SMarc Zyngier */ 21481ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 21491ac19ca6SMarc Zyngier } else { 2150920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 2151589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 2152263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 21531ac19ca6SMarc Zyngier } 21541ac19ca6SMarc Zyngier 21551ac19ca6SMarc Zyngier /* Perform collection mapping */ 21561ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 21571ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 21581ac19ca6SMarc Zyngier 21591ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 21601ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 21611ac19ca6SMarc Zyngier } 21621ac19ca6SMarc Zyngier 2163920181ceSDerek Basehore static void its_cpu_init_collections(void) 2164920181ceSDerek Basehore { 2165920181ceSDerek Basehore struct its_node *its; 2166920181ceSDerek Basehore 2167a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 2168920181ceSDerek Basehore 2169920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 2170920181ceSDerek Basehore its_cpu_init_collection(its); 2171920181ceSDerek Basehore 2172a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 21731ac19ca6SMarc Zyngier } 217484a6a2e7SMarc Zyngier 217584a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 217684a6a2e7SMarc Zyngier { 217784a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 21783e39e8f5SMarc Zyngier unsigned long flags; 217984a6a2e7SMarc Zyngier 21803e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 218184a6a2e7SMarc Zyngier 218284a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 218384a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 218484a6a2e7SMarc Zyngier its_dev = tmp; 218584a6a2e7SMarc Zyngier break; 218684a6a2e7SMarc Zyngier } 218784a6a2e7SMarc Zyngier } 218884a6a2e7SMarc Zyngier 21893e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 219084a6a2e7SMarc Zyngier 219184a6a2e7SMarc Zyngier return its_dev; 219284a6a2e7SMarc Zyngier } 219384a6a2e7SMarc Zyngier 2194466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 2195466b7d16SShanker Donthineni { 2196466b7d16SShanker Donthineni int i; 2197466b7d16SShanker Donthineni 2198466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 2199466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 2200466b7d16SShanker Donthineni return &its->tables[i]; 2201466b7d16SShanker Donthineni } 2202466b7d16SShanker Donthineni 2203466b7d16SShanker Donthineni return NULL; 2204466b7d16SShanker Donthineni } 2205466b7d16SShanker Donthineni 220670cc81edSMarc Zyngier static bool its_alloc_table_entry(struct its_baser *baser, u32 id) 22073faf24eaSShanker Donthineni { 22083faf24eaSShanker Donthineni struct page *page; 22093faf24eaSShanker Donthineni u32 esz, idx; 22103faf24eaSShanker Donthineni __le64 *table; 22113faf24eaSShanker Donthineni 22123faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 22133faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 22143faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 221570cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 22163faf24eaSShanker Donthineni 22173faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 221870cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 22193faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 22203faf24eaSShanker Donthineni return false; 22213faf24eaSShanker Donthineni 22223faf24eaSShanker Donthineni table = baser->base; 22233faf24eaSShanker Donthineni 22243faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 22253faf24eaSShanker Donthineni if (!table[idx]) { 22263faf24eaSShanker Donthineni page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(baser->psz)); 22273faf24eaSShanker Donthineni if (!page) 22283faf24eaSShanker Donthineni return false; 22293faf24eaSShanker Donthineni 22303faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 22313faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2232328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 22333faf24eaSShanker Donthineni 22343faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 22353faf24eaSShanker Donthineni 22363faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 22373faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2238328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 22393faf24eaSShanker Donthineni 22403faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 22413faf24eaSShanker Donthineni dsb(sy); 22423faf24eaSShanker Donthineni } 22433faf24eaSShanker Donthineni 22443faf24eaSShanker Donthineni return true; 22453faf24eaSShanker Donthineni } 22463faf24eaSShanker Donthineni 224770cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 224870cc81edSMarc Zyngier { 224970cc81edSMarc Zyngier struct its_baser *baser; 225070cc81edSMarc Zyngier 225170cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 225270cc81edSMarc Zyngier 225370cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 225470cc81edSMarc Zyngier if (!baser) 225570cc81edSMarc Zyngier return (ilog2(dev_id) < its->device_ids); 225670cc81edSMarc Zyngier 225770cc81edSMarc Zyngier return its_alloc_table_entry(baser, dev_id); 225870cc81edSMarc Zyngier } 225970cc81edSMarc Zyngier 22607d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 22617d75bbb4SMarc Zyngier { 22627d75bbb4SMarc Zyngier struct its_node *its; 22637d75bbb4SMarc Zyngier 22647d75bbb4SMarc Zyngier /* 22657d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 22667d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 22677d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 22687d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 22697d75bbb4SMarc Zyngier * anyway, right?). 22707d75bbb4SMarc Zyngier */ 22717d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 22727d75bbb4SMarc Zyngier struct its_baser *baser; 22737d75bbb4SMarc Zyngier 22747d75bbb4SMarc Zyngier if (!its->is_v4) 22757d75bbb4SMarc Zyngier continue; 22767d75bbb4SMarc Zyngier 22777d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 22787d75bbb4SMarc Zyngier if (!baser) 22797d75bbb4SMarc Zyngier return false; 22807d75bbb4SMarc Zyngier 22817d75bbb4SMarc Zyngier if (!its_alloc_table_entry(baser, vpe_id)) 22827d75bbb4SMarc Zyngier return false; 22837d75bbb4SMarc Zyngier } 22847d75bbb4SMarc Zyngier 22857d75bbb4SMarc Zyngier return true; 22867d75bbb4SMarc Zyngier } 22877d75bbb4SMarc Zyngier 228884a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 228993f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 229084a6a2e7SMarc Zyngier { 229184a6a2e7SMarc Zyngier struct its_device *dev; 229293f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 22933e39e8f5SMarc Zyngier unsigned long flags; 2294591e5becSMarc Zyngier u16 *col_map = NULL; 229584a6a2e7SMarc Zyngier void *itt; 229684a6a2e7SMarc Zyngier int lpi_base; 229784a6a2e7SMarc Zyngier int nr_lpis; 2298c8481267SMarc Zyngier int nr_ites; 229984a6a2e7SMarc Zyngier int sz; 230084a6a2e7SMarc Zyngier 23013faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2302466b7d16SShanker Donthineni return NULL; 2303466b7d16SShanker Donthineni 2304147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 2305147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 2306147c8f37SMarc Zyngier 230784a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2308c8481267SMarc Zyngier /* 2309147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 2310147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 2311c8481267SMarc Zyngier */ 2312147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 2313c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 231484a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 23156c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 231693f94ea0SMarc Zyngier if (alloc_lpis) { 231738dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 2318591e5becSMarc Zyngier if (lpi_map) 23196396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 232093f94ea0SMarc Zyngier GFP_KERNEL); 232193f94ea0SMarc Zyngier } else { 23226396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 232393f94ea0SMarc Zyngier nr_lpis = 0; 232493f94ea0SMarc Zyngier lpi_base = 0; 232593f94ea0SMarc Zyngier } 232684a6a2e7SMarc Zyngier 232793f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 232884a6a2e7SMarc Zyngier kfree(dev); 232984a6a2e7SMarc Zyngier kfree(itt); 233084a6a2e7SMarc Zyngier kfree(lpi_map); 2331591e5becSMarc Zyngier kfree(col_map); 233284a6a2e7SMarc Zyngier return NULL; 233384a6a2e7SMarc Zyngier } 233484a6a2e7SMarc Zyngier 2335328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 23365a9a8915SMarc Zyngier 233784a6a2e7SMarc Zyngier dev->its = its; 233884a6a2e7SMarc Zyngier dev->itt = itt; 2339c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2340591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2341591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2342591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2343591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 2344d011e4e6SMarc Zyngier mutex_init(&dev->event_map.vlpi_lock); 234584a6a2e7SMarc Zyngier dev->device_id = dev_id; 234684a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 234784a6a2e7SMarc Zyngier 23483e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 234984a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 23503e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 235184a6a2e7SMarc Zyngier 235284a6a2e7SMarc Zyngier /* Map device to its ITT */ 235384a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 235484a6a2e7SMarc Zyngier 235584a6a2e7SMarc Zyngier return dev; 235684a6a2e7SMarc Zyngier } 235784a6a2e7SMarc Zyngier 235884a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 235984a6a2e7SMarc Zyngier { 23603e39e8f5SMarc Zyngier unsigned long flags; 23613e39e8f5SMarc Zyngier 23623e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 236384a6a2e7SMarc Zyngier list_del(&its_dev->entry); 23643e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 236584a6a2e7SMarc Zyngier kfree(its_dev->itt); 236684a6a2e7SMarc Zyngier kfree(its_dev); 236784a6a2e7SMarc Zyngier } 2368b48ac83dSMarc Zyngier 2369b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 2370b48ac83dSMarc Zyngier { 2371b48ac83dSMarc Zyngier int idx; 2372b48ac83dSMarc Zyngier 2373591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 2374591e5becSMarc Zyngier dev->event_map.nr_lpis); 2375591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 2376b48ac83dSMarc Zyngier return -ENOSPC; 2377b48ac83dSMarc Zyngier 2378591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 2379591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 2380b48ac83dSMarc Zyngier 2381b48ac83dSMarc Zyngier return 0; 2382b48ac83dSMarc Zyngier } 2383b48ac83dSMarc Zyngier 238454456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 2385b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 2386b48ac83dSMarc Zyngier { 2387b48ac83dSMarc Zyngier struct its_node *its; 2388b48ac83dSMarc Zyngier struct its_device *its_dev; 238954456db9SMarc Zyngier struct msi_domain_info *msi_info; 239054456db9SMarc Zyngier u32 dev_id; 2391b48ac83dSMarc Zyngier 239254456db9SMarc Zyngier /* 239354456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 239454456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 239554456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 239654456db9SMarc Zyngier * are built on top of the ITS. 239754456db9SMarc Zyngier */ 239854456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 239954456db9SMarc Zyngier 240054456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 240154456db9SMarc Zyngier its = msi_info->data; 240254456db9SMarc Zyngier 240320b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 240420b3d54eSMarc Zyngier vpe_proxy.dev && 240520b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 240620b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 240720b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 240820b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 240920b3d54eSMarc Zyngier dev_id); 241020b3d54eSMarc Zyngier return -EINVAL; 241120b3d54eSMarc Zyngier } 241220b3d54eSMarc Zyngier 2413f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 2414e8137f4fSMarc Zyngier if (its_dev) { 2415e8137f4fSMarc Zyngier /* 2416e8137f4fSMarc Zyngier * We already have seen this ID, probably through 2417e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 2418e8137f4fSMarc Zyngier * create the device. 2419e8137f4fSMarc Zyngier */ 2420f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 2421e8137f4fSMarc Zyngier goto out; 2422e8137f4fSMarc Zyngier } 2423b48ac83dSMarc Zyngier 242493f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 2425b48ac83dSMarc Zyngier if (!its_dev) 2426b48ac83dSMarc Zyngier return -ENOMEM; 2427b48ac83dSMarc Zyngier 2428f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 2429e8137f4fSMarc Zyngier out: 2430b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 2431b48ac83dSMarc Zyngier return 0; 2432b48ac83dSMarc Zyngier } 2433b48ac83dSMarc Zyngier 243454456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 243554456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 243654456db9SMarc Zyngier }; 243754456db9SMarc Zyngier 2438b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 2439b48ac83dSMarc Zyngier unsigned int virq, 2440b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 2441b48ac83dSMarc Zyngier { 2442f833f57fSMarc Zyngier struct irq_fwspec fwspec; 2443b48ac83dSMarc Zyngier 2444f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 2445f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 2446f833f57fSMarc Zyngier fwspec.param_count = 3; 2447f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 2448f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 2449f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 24503f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 24513f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 24523f010cf1STomasz Nowicki fwspec.param_count = 2; 24533f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 24543f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 2455f833f57fSMarc Zyngier } else { 2456f833f57fSMarc Zyngier return -EINVAL; 2457f833f57fSMarc Zyngier } 2458b48ac83dSMarc Zyngier 2459f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 2460b48ac83dSMarc Zyngier } 2461b48ac83dSMarc Zyngier 2462b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 2463b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 2464b48ac83dSMarc Zyngier { 2465b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 2466b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 2467b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 2468b48ac83dSMarc Zyngier int err; 2469b48ac83dSMarc Zyngier int i; 2470b48ac83dSMarc Zyngier 2471b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2472b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 2473b48ac83dSMarc Zyngier if (err) 2474b48ac83dSMarc Zyngier return err; 2475b48ac83dSMarc Zyngier 2476b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 2477b48ac83dSMarc Zyngier if (err) 2478b48ac83dSMarc Zyngier return err; 2479b48ac83dSMarc Zyngier 2480b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 2481b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 24820d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 2483f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 2484591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 2485591e5becSMarc Zyngier (int) hwirq, virq + i); 2486b48ac83dSMarc Zyngier } 2487b48ac83dSMarc Zyngier 2488b48ac83dSMarc Zyngier return 0; 2489b48ac83dSMarc Zyngier } 2490b48ac83dSMarc Zyngier 249172491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 2492702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2493aca268dfSMarc Zyngier { 2494aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2495aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2496fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 24970d224d35SMarc Zyngier int cpu; 2498fbf8f40eSGanapatrao Kulkarni 2499fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 2500fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 2501fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 2502aca268dfSMarc Zyngier 2503591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 2504c1797b11SYang Yingliang cpu = cpumask_first_and(cpu_mask, cpu_online_mask); 2505c1797b11SYang Yingliang if (cpu >= nr_cpu_ids) { 2506c1797b11SYang Yingliang if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) 2507c1797b11SYang Yingliang return -EINVAL; 2508c1797b11SYang Yingliang 2509c1797b11SYang Yingliang cpu = cpumask_first(cpu_online_mask); 2510c1797b11SYang Yingliang } 2511c1797b11SYang Yingliang 25120d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 25130d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 2514591e5becSMarc Zyngier 2515aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 25166a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 251772491643SThomas Gleixner return 0; 2518aca268dfSMarc Zyngier } 2519aca268dfSMarc Zyngier 2520aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 2521aca268dfSMarc Zyngier struct irq_data *d) 2522aca268dfSMarc Zyngier { 2523aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2524aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2525aca268dfSMarc Zyngier 2526aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 2527aca268dfSMarc Zyngier its_send_discard(its_dev, event); 2528aca268dfSMarc Zyngier } 2529aca268dfSMarc Zyngier 2530b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 2531b48ac83dSMarc Zyngier unsigned int nr_irqs) 2532b48ac83dSMarc Zyngier { 2533b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 2534b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2535b48ac83dSMarc Zyngier int i; 2536b48ac83dSMarc Zyngier 2537b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2538b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 2539b48ac83dSMarc Zyngier virq + i); 2540aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 2541b48ac83dSMarc Zyngier 2542b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 2543591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 2544b48ac83dSMarc Zyngier 2545b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 25462da39949SMarc Zyngier irq_domain_reset_irq_data(data); 2547b48ac83dSMarc Zyngier } 2548b48ac83dSMarc Zyngier 2549b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 2550591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 2551591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 255238dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 2553cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 2554cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 2555cf2be8baSMarc Zyngier kfree(its_dev->event_map.col_map); 2556b48ac83dSMarc Zyngier 2557b48ac83dSMarc Zyngier /* Unmap device/itt */ 2558b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 2559b48ac83dSMarc Zyngier its_free_device(its_dev); 2560b48ac83dSMarc Zyngier } 2561b48ac83dSMarc Zyngier 2562b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 2563b48ac83dSMarc Zyngier } 2564b48ac83dSMarc Zyngier 2565b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 2566b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 2567b48ac83dSMarc Zyngier .free = its_irq_domain_free, 2568aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 2569aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 2570b48ac83dSMarc Zyngier }; 25714c21f3c2SMarc Zyngier 257220b3d54eSMarc Zyngier /* 257320b3d54eSMarc Zyngier * This is insane. 257420b3d54eSMarc Zyngier * 257520b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 257620b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 257720b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 257820b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 257920b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 258020b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 258120b3d54eSMarc Zyngier * 258220b3d54eSMarc Zyngier * Broken by design(tm). 258320b3d54eSMarc Zyngier */ 258420b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 258520b3d54eSMarc Zyngier { 258620b3d54eSMarc Zyngier /* Already unmapped? */ 258720b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 258820b3d54eSMarc Zyngier return; 258920b3d54eSMarc Zyngier 259020b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 259120b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 259220b3d54eSMarc Zyngier 259320b3d54eSMarc Zyngier /* 259420b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 259520b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 259620b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 259720b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 259820b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 259920b3d54eSMarc Zyngier */ 260020b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 260120b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 260220b3d54eSMarc Zyngier 260320b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 260420b3d54eSMarc Zyngier } 260520b3d54eSMarc Zyngier 260620b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 260720b3d54eSMarc Zyngier { 260820b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 260920b3d54eSMarc Zyngier unsigned long flags; 261020b3d54eSMarc Zyngier 261120b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 261220b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 261320b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 261420b3d54eSMarc Zyngier } 261520b3d54eSMarc Zyngier } 261620b3d54eSMarc Zyngier 261720b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 261820b3d54eSMarc Zyngier { 261920b3d54eSMarc Zyngier /* Already mapped? */ 262020b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 262120b3d54eSMarc Zyngier return; 262220b3d54eSMarc Zyngier 262320b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 262420b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 262520b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 262620b3d54eSMarc Zyngier 262720b3d54eSMarc Zyngier /* Map the new VPE instead */ 262820b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 262920b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 263020b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 263120b3d54eSMarc Zyngier 263220b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 263320b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 263420b3d54eSMarc Zyngier } 263520b3d54eSMarc Zyngier 2636958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 2637958b90d1SMarc Zyngier { 2638958b90d1SMarc Zyngier unsigned long flags; 2639958b90d1SMarc Zyngier struct its_collection *target_col; 2640958b90d1SMarc Zyngier 2641958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2642958b90d1SMarc Zyngier void __iomem *rdbase; 2643958b90d1SMarc Zyngier 2644958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 2645958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2646958b90d1SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2647958b90d1SMarc Zyngier cpu_relax(); 2648958b90d1SMarc Zyngier 2649958b90d1SMarc Zyngier return; 2650958b90d1SMarc Zyngier } 2651958b90d1SMarc Zyngier 2652958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 2653958b90d1SMarc Zyngier 2654958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 2655958b90d1SMarc Zyngier 2656958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 2657958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 2658958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 2659958b90d1SMarc Zyngier 2660958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 2661958b90d1SMarc Zyngier } 2662958b90d1SMarc Zyngier 26633171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 26643171a47aSMarc Zyngier const struct cpumask *mask_val, 26653171a47aSMarc Zyngier bool force) 26663171a47aSMarc Zyngier { 26673171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 26683171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 26693171a47aSMarc Zyngier 26703171a47aSMarc Zyngier /* 26713171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 267220b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 2673958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 2674958b90d1SMarc Zyngier * interrupt to its new location. 26753171a47aSMarc Zyngier */ 26763171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 2677958b90d1SMarc Zyngier int from = vpe->col_idx; 2678958b90d1SMarc Zyngier 26793171a47aSMarc Zyngier vpe->col_idx = cpu; 26803171a47aSMarc Zyngier its_send_vmovp(vpe); 2681958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 26823171a47aSMarc Zyngier } 26833171a47aSMarc Zyngier 268444c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 268544c4c25eSMarc Zyngier 26863171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 26873171a47aSMarc Zyngier } 26883171a47aSMarc Zyngier 2689e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 2690e643d803SMarc Zyngier { 269150c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2692e643d803SMarc Zyngier u64 val; 2693e643d803SMarc Zyngier 2694e643d803SMarc Zyngier /* Schedule the VPE */ 2695e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 2696e643d803SMarc Zyngier GENMASK_ULL(51, 12); 2697e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 2698e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 2699e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 2700e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 2701e643d803SMarc Zyngier 2702e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 2703e643d803SMarc Zyngier GENMASK_ULL(51, 16); 2704e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 2705e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 2706e643d803SMarc Zyngier /* 2707e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 2708e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 2709e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 2710e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 2711e643d803SMarc Zyngier * that the pending table is empty. A good implementation 2712e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 2713e643d803SMarc Zyngier * making this a tolerable issue. 2714e643d803SMarc Zyngier */ 2715e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2716e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 2717e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 2718e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2719e643d803SMarc Zyngier } 2720e643d803SMarc Zyngier 2721e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 2722e643d803SMarc Zyngier { 272350c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2724e643d803SMarc Zyngier u32 count = 1000000; /* 1s! */ 2725e643d803SMarc Zyngier bool clean; 2726e643d803SMarc Zyngier u64 val; 2727e643d803SMarc Zyngier 2728e643d803SMarc Zyngier /* We're being scheduled out */ 2729e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2730e643d803SMarc Zyngier val &= ~GICR_VPENDBASER_Valid; 2731e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2732e643d803SMarc Zyngier 2733e643d803SMarc Zyngier do { 2734e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2735e643d803SMarc Zyngier clean = !(val & GICR_VPENDBASER_Dirty); 2736e643d803SMarc Zyngier if (!clean) { 2737e643d803SMarc Zyngier count--; 2738e643d803SMarc Zyngier cpu_relax(); 2739e643d803SMarc Zyngier udelay(1); 2740e643d803SMarc Zyngier } 2741e643d803SMarc Zyngier } while (!clean && count); 2742e643d803SMarc Zyngier 2743e643d803SMarc Zyngier if (unlikely(!clean && !count)) { 2744e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2745e643d803SMarc Zyngier vpe->idai = false; 2746e643d803SMarc Zyngier vpe->pending_last = true; 2747e643d803SMarc Zyngier } else { 2748e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 2749e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 2750e643d803SMarc Zyngier } 2751e643d803SMarc Zyngier } 2752e643d803SMarc Zyngier 275340619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 275440619a2eSMarc Zyngier { 275540619a2eSMarc Zyngier struct its_node *its; 275640619a2eSMarc Zyngier 275740619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 275840619a2eSMarc Zyngier if (!its->is_v4) 275940619a2eSMarc Zyngier continue; 276040619a2eSMarc Zyngier 27612247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 27622247e1bfSMarc Zyngier continue; 27632247e1bfSMarc Zyngier 27643c1cceebSMarc Zyngier /* 27653c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 27663c1cceebSMarc Zyngier * we need is to reach the redistributors. 27673c1cceebSMarc Zyngier */ 276840619a2eSMarc Zyngier its_send_vinvall(its, vpe); 27693c1cceebSMarc Zyngier return; 277040619a2eSMarc Zyngier } 277140619a2eSMarc Zyngier } 277240619a2eSMarc Zyngier 2773e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 2774e643d803SMarc Zyngier { 2775e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2776e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 2777e643d803SMarc Zyngier 2778e643d803SMarc Zyngier switch (info->cmd_type) { 2779e643d803SMarc Zyngier case SCHEDULE_VPE: 2780e643d803SMarc Zyngier its_vpe_schedule(vpe); 2781e643d803SMarc Zyngier return 0; 2782e643d803SMarc Zyngier 2783e643d803SMarc Zyngier case DESCHEDULE_VPE: 2784e643d803SMarc Zyngier its_vpe_deschedule(vpe); 2785e643d803SMarc Zyngier return 0; 2786e643d803SMarc Zyngier 27875e2f7642SMarc Zyngier case INVALL_VPE: 278840619a2eSMarc Zyngier its_vpe_invall(vpe); 27895e2f7642SMarc Zyngier return 0; 27905e2f7642SMarc Zyngier 2791e643d803SMarc Zyngier default: 2792e643d803SMarc Zyngier return -EINVAL; 2793e643d803SMarc Zyngier } 2794e643d803SMarc Zyngier } 2795e643d803SMarc Zyngier 279620b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 279720b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 279820b3d54eSMarc Zyngier { 279920b3d54eSMarc Zyngier unsigned long flags; 280020b3d54eSMarc Zyngier 280120b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 280220b3d54eSMarc Zyngier 280320b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 280420b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 280520b3d54eSMarc Zyngier 280620b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 280720b3d54eSMarc Zyngier } 280820b3d54eSMarc Zyngier 2809f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 2810f6a91da7SMarc Zyngier { 2811f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 281220b3d54eSMarc Zyngier 281320b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 2814f6a91da7SMarc Zyngier void __iomem *rdbase; 2815f6a91da7SMarc Zyngier 2816f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2817f6a91da7SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_INVLPIR); 2818f6a91da7SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2819f6a91da7SMarc Zyngier cpu_relax(); 282020b3d54eSMarc Zyngier } else { 282120b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 282220b3d54eSMarc Zyngier } 2823f6a91da7SMarc Zyngier } 2824f6a91da7SMarc Zyngier 2825f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 2826f6a91da7SMarc Zyngier { 2827f6a91da7SMarc Zyngier /* 2828f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 2829f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 2830f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 2831f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 2832f6a91da7SMarc Zyngier */ 2833f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 2834f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2835f6a91da7SMarc Zyngier } 2836f6a91da7SMarc Zyngier 2837f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 2838f6a91da7SMarc Zyngier { 2839f6a91da7SMarc Zyngier /* Same hack as above... */ 2840f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 2841f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2842f6a91da7SMarc Zyngier } 2843f6a91da7SMarc Zyngier 2844e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 2845e57a3e28SMarc Zyngier enum irqchip_irq_state which, 2846e57a3e28SMarc Zyngier bool state) 2847e57a3e28SMarc Zyngier { 2848e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2849e57a3e28SMarc Zyngier 2850e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 2851e57a3e28SMarc Zyngier return -EINVAL; 2852e57a3e28SMarc Zyngier 2853e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2854e57a3e28SMarc Zyngier void __iomem *rdbase; 2855e57a3e28SMarc Zyngier 2856e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2857e57a3e28SMarc Zyngier if (state) { 2858e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 2859e57a3e28SMarc Zyngier } else { 2860e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2861e57a3e28SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2862e57a3e28SMarc Zyngier cpu_relax(); 2863e57a3e28SMarc Zyngier } 2864e57a3e28SMarc Zyngier } else { 2865e57a3e28SMarc Zyngier if (state) 2866e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 2867e57a3e28SMarc Zyngier else 2868e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 2869e57a3e28SMarc Zyngier } 2870e57a3e28SMarc Zyngier 2871e57a3e28SMarc Zyngier return 0; 2872e57a3e28SMarc Zyngier } 2873e57a3e28SMarc Zyngier 28748fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 28758fff27aeSMarc Zyngier .name = "GICv4-vpe", 2876f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 2877f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 2878f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 28793171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 2880e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 2881e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 28828fff27aeSMarc Zyngier }; 28838fff27aeSMarc Zyngier 28847d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 28857d75bbb4SMarc Zyngier { 288632bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 28877d75bbb4SMarc Zyngier } 28887d75bbb4SMarc Zyngier 28897d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 28907d75bbb4SMarc Zyngier { 28917d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 28927d75bbb4SMarc Zyngier } 28937d75bbb4SMarc Zyngier 28947d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 28957d75bbb4SMarc Zyngier { 28967d75bbb4SMarc Zyngier struct page *vpt_page; 28977d75bbb4SMarc Zyngier int vpe_id; 28987d75bbb4SMarc Zyngier 28997d75bbb4SMarc Zyngier /* Allocate vpe_id */ 29007d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 29017d75bbb4SMarc Zyngier if (vpe_id < 0) 29027d75bbb4SMarc Zyngier return vpe_id; 29037d75bbb4SMarc Zyngier 29047d75bbb4SMarc Zyngier /* Allocate VPT */ 29057d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 29067d75bbb4SMarc Zyngier if (!vpt_page) { 29077d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 29087d75bbb4SMarc Zyngier return -ENOMEM; 29097d75bbb4SMarc Zyngier } 29107d75bbb4SMarc Zyngier 29117d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 29127d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 29137d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 29147d75bbb4SMarc Zyngier return -ENOMEM; 29157d75bbb4SMarc Zyngier } 29167d75bbb4SMarc Zyngier 29177d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 29187d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 291920b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 29207d75bbb4SMarc Zyngier 29217d75bbb4SMarc Zyngier return 0; 29227d75bbb4SMarc Zyngier } 29237d75bbb4SMarc Zyngier 29247d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 29257d75bbb4SMarc Zyngier { 292620b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 29277d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 29287d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 29297d75bbb4SMarc Zyngier } 29307d75bbb4SMarc Zyngier 29317d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 29327d75bbb4SMarc Zyngier unsigned int virq, 29337d75bbb4SMarc Zyngier unsigned int nr_irqs) 29347d75bbb4SMarc Zyngier { 29357d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 29367d75bbb4SMarc Zyngier int i; 29377d75bbb4SMarc Zyngier 29387d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 29397d75bbb4SMarc Zyngier 29407d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 29417d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 29427d75bbb4SMarc Zyngier virq + i); 29437d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 29447d75bbb4SMarc Zyngier 29457d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 29467d75bbb4SMarc Zyngier 29477d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 29487d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 29497d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 29507d75bbb4SMarc Zyngier } 29517d75bbb4SMarc Zyngier 29527d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 295338dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 29547d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 29557d75bbb4SMarc Zyngier } 29567d75bbb4SMarc Zyngier } 29577d75bbb4SMarc Zyngier 29587d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 29597d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 29607d75bbb4SMarc Zyngier { 29617d75bbb4SMarc Zyngier struct its_vm *vm = args; 29627d75bbb4SMarc Zyngier unsigned long *bitmap; 29637d75bbb4SMarc Zyngier struct page *vprop_page; 29647d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 29657d75bbb4SMarc Zyngier 29667d75bbb4SMarc Zyngier BUG_ON(!vm); 29677d75bbb4SMarc Zyngier 296838dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 29697d75bbb4SMarc Zyngier if (!bitmap) 29707d75bbb4SMarc Zyngier return -ENOMEM; 29717d75bbb4SMarc Zyngier 29727d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 297338dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 29747d75bbb4SMarc Zyngier return -ENOMEM; 29757d75bbb4SMarc Zyngier } 29767d75bbb4SMarc Zyngier 29777d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 29787d75bbb4SMarc Zyngier if (!vprop_page) { 297938dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 29807d75bbb4SMarc Zyngier return -ENOMEM; 29817d75bbb4SMarc Zyngier } 29827d75bbb4SMarc Zyngier 29837d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 29847d75bbb4SMarc Zyngier vm->db_lpi_base = base; 29857d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 29867d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 29877d75bbb4SMarc Zyngier 29887d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 29897d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 29907d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 29917d75bbb4SMarc Zyngier if (err) 29927d75bbb4SMarc Zyngier break; 29937d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 29947d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 29957d75bbb4SMarc Zyngier if (err) 29967d75bbb4SMarc Zyngier break; 29977d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 29987d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 29997d75bbb4SMarc Zyngier set_bit(i, bitmap); 30007d75bbb4SMarc Zyngier } 30017d75bbb4SMarc Zyngier 30027d75bbb4SMarc Zyngier if (err) { 30037d75bbb4SMarc Zyngier if (i > 0) 30047d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 30057d75bbb4SMarc Zyngier 300638dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 30077d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 30087d75bbb4SMarc Zyngier } 30097d75bbb4SMarc Zyngier 30107d75bbb4SMarc Zyngier return err; 30117d75bbb4SMarc Zyngier } 30127d75bbb4SMarc Zyngier 301372491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 3014702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3015eb78192bSMarc Zyngier { 3016eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 301740619a2eSMarc Zyngier struct its_node *its; 3018eb78192bSMarc Zyngier 30192247e1bfSMarc Zyngier /* If we use the list map, we issue VMAPP on demand... */ 30202247e1bfSMarc Zyngier if (its_list_map) 30216ef930f2SMarc Zyngier return 0; 3022eb78192bSMarc Zyngier 3023eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 3024eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 302540619a2eSMarc Zyngier 302640619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 302740619a2eSMarc Zyngier if (!its->is_v4) 302840619a2eSMarc Zyngier continue; 302940619a2eSMarc Zyngier 303075fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 303140619a2eSMarc Zyngier its_send_vinvall(its, vpe); 303240619a2eSMarc Zyngier } 303340619a2eSMarc Zyngier 303444c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 303544c4c25eSMarc Zyngier 303672491643SThomas Gleixner return 0; 3037eb78192bSMarc Zyngier } 3038eb78192bSMarc Zyngier 3039eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 3040eb78192bSMarc Zyngier struct irq_data *d) 3041eb78192bSMarc Zyngier { 3042eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 304375fd951bSMarc Zyngier struct its_node *its; 3044eb78192bSMarc Zyngier 30452247e1bfSMarc Zyngier /* 30462247e1bfSMarc Zyngier * If we use the list map, we unmap the VPE once no VLPIs are 30472247e1bfSMarc Zyngier * associated with the VM. 30482247e1bfSMarc Zyngier */ 30492247e1bfSMarc Zyngier if (its_list_map) 30502247e1bfSMarc Zyngier return; 30512247e1bfSMarc Zyngier 305275fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 305375fd951bSMarc Zyngier if (!its->is_v4) 305475fd951bSMarc Zyngier continue; 305575fd951bSMarc Zyngier 305675fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 305775fd951bSMarc Zyngier } 3058eb78192bSMarc Zyngier } 3059eb78192bSMarc Zyngier 30608fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 30617d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 30627d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 3063eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 3064eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 30658fff27aeSMarc Zyngier }; 30668fff27aeSMarc Zyngier 30674559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 30684559fbb3SYun Wu { 30694559fbb3SYun Wu u32 count = 1000000; /* 1s */ 30704559fbb3SYun Wu u32 val; 30714559fbb3SYun Wu 30724559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 30737611da86SDavid Daney /* 30747611da86SDavid Daney * GIC architecture specification requires the ITS to be both 30757611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 30767611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 30777611da86SDavid Daney */ 30787611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 30794559fbb3SYun Wu return 0; 30804559fbb3SYun Wu 30814559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 3082d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 30834559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 30844559fbb3SYun Wu 30854559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 30864559fbb3SYun Wu while (1) { 30874559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 30884559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 30894559fbb3SYun Wu return 0; 30904559fbb3SYun Wu 30914559fbb3SYun Wu count--; 30924559fbb3SYun Wu if (!count) 30934559fbb3SYun Wu return -EBUSY; 30944559fbb3SYun Wu 30954559fbb3SYun Wu cpu_relax(); 30964559fbb3SYun Wu udelay(1); 30974559fbb3SYun Wu } 30984559fbb3SYun Wu } 30994559fbb3SYun Wu 31009d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 310194100970SRobert Richter { 310294100970SRobert Richter struct its_node *its = data; 310394100970SRobert Richter 3104fa150019SArd Biesheuvel /* erratum 22375: only alloc 8MB table size */ 3105fa150019SArd Biesheuvel its->device_ids = 0x14; /* 20 bits, 8MB */ 310694100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 31079d111d49SArd Biesheuvel 31089d111d49SArd Biesheuvel return true; 310994100970SRobert Richter } 311094100970SRobert Richter 31119d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 3112fbf8f40eSGanapatrao Kulkarni { 3113fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 3114fbf8f40eSGanapatrao Kulkarni 3115fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 31169d111d49SArd Biesheuvel 31179d111d49SArd Biesheuvel return true; 3118fbf8f40eSGanapatrao Kulkarni } 3119fbf8f40eSGanapatrao Kulkarni 31209d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 312190922a2dSShanker Donthineni { 312290922a2dSShanker Donthineni struct its_node *its = data; 312390922a2dSShanker Donthineni 312490922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 312590922a2dSShanker Donthineni its->ite_size = 16; 31269d111d49SArd Biesheuvel 31279d111d49SArd Biesheuvel return true; 312890922a2dSShanker Donthineni } 312990922a2dSShanker Donthineni 3130558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 3131558b0165SArd Biesheuvel { 3132558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 3133558b0165SArd Biesheuvel 3134558b0165SArd Biesheuvel /* 3135558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 3136558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 3137558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 3138558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 3139558b0165SArd Biesheuvel * the window offset. 3140558b0165SArd Biesheuvel */ 3141558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 3142558b0165SArd Biesheuvel } 3143558b0165SArd Biesheuvel 3144558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 3145558b0165SArd Biesheuvel { 3146558b0165SArd Biesheuvel struct its_node *its = data; 3147558b0165SArd Biesheuvel u32 pre_its_window[2]; 3148558b0165SArd Biesheuvel u32 ids; 3149558b0165SArd Biesheuvel 3150558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 3151558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 3152558b0165SArd Biesheuvel pre_its_window, 3153558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 3154558b0165SArd Biesheuvel 3155558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 3156558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 3157558b0165SArd Biesheuvel 3158558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 3159558b0165SArd Biesheuvel if (its->device_ids > ids) 3160558b0165SArd Biesheuvel its->device_ids = ids; 3161558b0165SArd Biesheuvel 3162558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 3163558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 3164558b0165SArd Biesheuvel return true; 3165558b0165SArd Biesheuvel } 3166558b0165SArd Biesheuvel return false; 3167558b0165SArd Biesheuvel } 3168558b0165SArd Biesheuvel 31695c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 31705c9a882eSMarc Zyngier { 31715c9a882eSMarc Zyngier struct its_node *its = data; 31725c9a882eSMarc Zyngier 31735c9a882eSMarc Zyngier /* 31745c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 31755c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 31765c9a882eSMarc Zyngier */ 31775c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 31785c9a882eSMarc Zyngier return true; 3179cc2d3216SMarc Zyngier } 31804c21f3c2SMarc Zyngier 318167510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 318294100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 318394100970SRobert Richter { 318494100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 318594100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 318694100970SRobert Richter .mask = 0xffff0fff, 318794100970SRobert Richter .init = its_enable_quirk_cavium_22375, 318894100970SRobert Richter }, 318994100970SRobert Richter #endif 3190fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 3191fbf8f40eSGanapatrao Kulkarni { 3192fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 3193fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 3194fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 3195fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 3196fbf8f40eSGanapatrao Kulkarni }, 3197fbf8f40eSGanapatrao Kulkarni #endif 319890922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 319990922a2dSShanker Donthineni { 320090922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 320190922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 320290922a2dSShanker Donthineni .mask = 0xffffffff, 320390922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 320490922a2dSShanker Donthineni }, 320590922a2dSShanker Donthineni #endif 3206558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 3207558b0165SArd Biesheuvel { 3208558b0165SArd Biesheuvel /* 3209558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 3210558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 3211558b0165SArd Biesheuvel * special handling in software. 3212558b0165SArd Biesheuvel */ 3213558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 3214558b0165SArd Biesheuvel .iidr = 0x0001143b, 3215558b0165SArd Biesheuvel .mask = 0xffffffff, 3216558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 3217558b0165SArd Biesheuvel }, 3218558b0165SArd Biesheuvel #endif 32195c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 32205c9a882eSMarc Zyngier { 32215c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 32225c9a882eSMarc Zyngier .iidr = 0x00000004, 32235c9a882eSMarc Zyngier .mask = 0xffffffff, 32245c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 32255c9a882eSMarc Zyngier }, 32265c9a882eSMarc Zyngier #endif 322767510ccaSRobert Richter { 322867510ccaSRobert Richter } 322967510ccaSRobert Richter }; 323067510ccaSRobert Richter 323167510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 323267510ccaSRobert Richter { 323367510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 323467510ccaSRobert Richter 323567510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 323667510ccaSRobert Richter } 323767510ccaSRobert Richter 3238dba0bc7bSDerek Basehore static int its_save_disable(void) 3239dba0bc7bSDerek Basehore { 3240dba0bc7bSDerek Basehore struct its_node *its; 3241dba0bc7bSDerek Basehore int err = 0; 3242dba0bc7bSDerek Basehore 3243a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3244dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3245dba0bc7bSDerek Basehore void __iomem *base; 3246dba0bc7bSDerek Basehore 3247dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3248dba0bc7bSDerek Basehore continue; 3249dba0bc7bSDerek Basehore 3250dba0bc7bSDerek Basehore base = its->base; 3251dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 3252dba0bc7bSDerek Basehore err = its_force_quiescent(base); 3253dba0bc7bSDerek Basehore if (err) { 3254dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 3255dba0bc7bSDerek Basehore &its->phys_base, err); 3256dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3257dba0bc7bSDerek Basehore goto err; 3258dba0bc7bSDerek Basehore } 3259dba0bc7bSDerek Basehore 3260dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 3261dba0bc7bSDerek Basehore } 3262dba0bc7bSDerek Basehore 3263dba0bc7bSDerek Basehore err: 3264dba0bc7bSDerek Basehore if (err) { 3265dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 3266dba0bc7bSDerek Basehore void __iomem *base; 3267dba0bc7bSDerek Basehore 3268dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3269dba0bc7bSDerek Basehore continue; 3270dba0bc7bSDerek Basehore 3271dba0bc7bSDerek Basehore base = its->base; 3272dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3273dba0bc7bSDerek Basehore } 3274dba0bc7bSDerek Basehore } 3275a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3276dba0bc7bSDerek Basehore 3277dba0bc7bSDerek Basehore return err; 3278dba0bc7bSDerek Basehore } 3279dba0bc7bSDerek Basehore 3280dba0bc7bSDerek Basehore static void its_restore_enable(void) 3281dba0bc7bSDerek Basehore { 3282dba0bc7bSDerek Basehore struct its_node *its; 3283dba0bc7bSDerek Basehore int ret; 3284dba0bc7bSDerek Basehore 3285a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3286dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3287dba0bc7bSDerek Basehore void __iomem *base; 3288dba0bc7bSDerek Basehore int i; 3289dba0bc7bSDerek Basehore 3290dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3291dba0bc7bSDerek Basehore continue; 3292dba0bc7bSDerek Basehore 3293dba0bc7bSDerek Basehore base = its->base; 3294dba0bc7bSDerek Basehore 3295dba0bc7bSDerek Basehore /* 3296dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 3297dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 3298dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 3299dba0bc7bSDerek Basehore * Specification. 3300dba0bc7bSDerek Basehore */ 3301dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 3302dba0bc7bSDerek Basehore if (ret) { 3303dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 3304dba0bc7bSDerek Basehore &its->phys_base, ret); 3305dba0bc7bSDerek Basehore continue; 3306dba0bc7bSDerek Basehore } 3307dba0bc7bSDerek Basehore 3308dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 3309dba0bc7bSDerek Basehore 3310dba0bc7bSDerek Basehore /* 3311dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 3312dba0bc7bSDerek Basehore * cmd_write line up with it. 3313dba0bc7bSDerek Basehore */ 3314dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 3315dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 3316dba0bc7bSDerek Basehore 3317dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 3318dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3319dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 3320dba0bc7bSDerek Basehore 3321dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 3322dba0bc7bSDerek Basehore continue; 3323dba0bc7bSDerek Basehore 3324dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 3325dba0bc7bSDerek Basehore } 3326dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3327920181ceSDerek Basehore 3328920181ceSDerek Basehore /* 3329920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 3330920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 3331920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 3332920181ceSDerek Basehore */ 3333920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 3334920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 3335920181ceSDerek Basehore its_cpu_init_collection(its); 3336dba0bc7bSDerek Basehore } 3337a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3338dba0bc7bSDerek Basehore } 3339dba0bc7bSDerek Basehore 3340dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 3341dba0bc7bSDerek Basehore .suspend = its_save_disable, 3342dba0bc7bSDerek Basehore .resume = its_restore_enable, 3343dba0bc7bSDerek Basehore }; 3344dba0bc7bSDerek Basehore 3345db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 3346d14ae5e6STomasz Nowicki { 3347d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 3348d14ae5e6STomasz Nowicki struct msi_domain_info *info; 3349d14ae5e6STomasz Nowicki 3350d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 3351d14ae5e6STomasz Nowicki if (!info) 3352d14ae5e6STomasz Nowicki return -ENOMEM; 3353d14ae5e6STomasz Nowicki 3354db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 3355d14ae5e6STomasz Nowicki if (!inner_domain) { 3356d14ae5e6STomasz Nowicki kfree(info); 3357d14ae5e6STomasz Nowicki return -ENOMEM; 3358d14ae5e6STomasz Nowicki } 3359d14ae5e6STomasz Nowicki 3360db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 336196f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 3362558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 3363d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 3364d14ae5e6STomasz Nowicki info->data = its; 3365d14ae5e6STomasz Nowicki inner_domain->host_data = info; 3366d14ae5e6STomasz Nowicki 3367d14ae5e6STomasz Nowicki return 0; 3368d14ae5e6STomasz Nowicki } 3369d14ae5e6STomasz Nowicki 33708fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 33718fff27aeSMarc Zyngier { 337220b3d54eSMarc Zyngier struct its_node *its; 337320b3d54eSMarc Zyngier u32 devid; 337420b3d54eSMarc Zyngier int entries; 337520b3d54eSMarc Zyngier 337620b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 337720b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 337820b3d54eSMarc Zyngier return 0; 337920b3d54eSMarc Zyngier } 338020b3d54eSMarc Zyngier 338120b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 338220b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 338320b3d54eSMarc Zyngier 338420b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 33856396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 338620b3d54eSMarc Zyngier GFP_KERNEL); 338720b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 338820b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 338920b3d54eSMarc Zyngier return -ENOMEM; 339020b3d54eSMarc Zyngier } 339120b3d54eSMarc Zyngier 339220b3d54eSMarc Zyngier /* Use the last possible DevID */ 339320b3d54eSMarc Zyngier devid = GENMASK(its->device_ids - 1, 0); 339420b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 339520b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 339620b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 339720b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 339820b3d54eSMarc Zyngier return -ENOMEM; 339920b3d54eSMarc Zyngier } 340020b3d54eSMarc Zyngier 3401c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 340220b3d54eSMarc Zyngier 340320b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 340420b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 340520b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 340620b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 340720b3d54eSMarc Zyngier 34088fff27aeSMarc Zyngier return 0; 34098fff27aeSMarc Zyngier } 34108fff27aeSMarc Zyngier 34113dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 34123dfa576bSMarc Zyngier void __iomem *its_base) 34133dfa576bSMarc Zyngier { 34143dfa576bSMarc Zyngier int its_number; 34153dfa576bSMarc Zyngier u32 ctlr; 34163dfa576bSMarc Zyngier 34173dfa576bSMarc Zyngier /* 34183dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 34193dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 34203dfa576bSMarc Zyngier * locking. Should this change, we should address 34213dfa576bSMarc Zyngier * this. 34223dfa576bSMarc Zyngier */ 3423ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 3424ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 34253dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 34263dfa576bSMarc Zyngier &res->start); 34273dfa576bSMarc Zyngier return -EINVAL; 34283dfa576bSMarc Zyngier } 34293dfa576bSMarc Zyngier 34303dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 34313dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 34323dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 34333dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 34343dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 34353dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 34363dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 34373dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 34383dfa576bSMarc Zyngier } 34393dfa576bSMarc Zyngier 34403dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 34413dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 34423dfa576bSMarc Zyngier &res->start, its_number); 34433dfa576bSMarc Zyngier return -EINVAL; 34443dfa576bSMarc Zyngier } 34453dfa576bSMarc Zyngier 34463dfa576bSMarc Zyngier return its_number; 34473dfa576bSMarc Zyngier } 34483dfa576bSMarc Zyngier 3449db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 3450db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 34514c21f3c2SMarc Zyngier { 34524c21f3c2SMarc Zyngier struct its_node *its; 34534c21f3c2SMarc Zyngier void __iomem *its_base; 34543dfa576bSMarc Zyngier u32 val, ctlr; 34553dfa576bSMarc Zyngier u64 baser, tmp, typer; 34564c21f3c2SMarc Zyngier int err; 34574c21f3c2SMarc Zyngier 3458db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 34594c21f3c2SMarc Zyngier if (!its_base) { 3460db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 34614c21f3c2SMarc Zyngier return -ENOMEM; 34624c21f3c2SMarc Zyngier } 34634c21f3c2SMarc Zyngier 34644c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 34654c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 3466db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 34674c21f3c2SMarc Zyngier err = -ENODEV; 34684c21f3c2SMarc Zyngier goto out_unmap; 34694c21f3c2SMarc Zyngier } 34704c21f3c2SMarc Zyngier 34714559fbb3SYun Wu err = its_force_quiescent(its_base); 34724559fbb3SYun Wu if (err) { 3473db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 34744559fbb3SYun Wu goto out_unmap; 34754559fbb3SYun Wu } 34764559fbb3SYun Wu 3477db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 34784c21f3c2SMarc Zyngier 34794c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 34804c21f3c2SMarc Zyngier if (!its) { 34814c21f3c2SMarc Zyngier err = -ENOMEM; 34824c21f3c2SMarc Zyngier goto out_unmap; 34834c21f3c2SMarc Zyngier } 34844c21f3c2SMarc Zyngier 34854c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 34864c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 34874c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 34883dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 34894c21f3c2SMarc Zyngier its->base = its_base; 3490db40f0a7STomasz Nowicki its->phys_base = res->start; 34913dfa576bSMarc Zyngier its->ite_size = GITS_TYPER_ITT_ENTRY_SIZE(typer); 3492fa150019SArd Biesheuvel its->device_ids = GITS_TYPER_DEVBITS(typer); 34933dfa576bSMarc Zyngier its->is_v4 = !!(typer & GITS_TYPER_VLPIS); 34943dfa576bSMarc Zyngier if (its->is_v4) { 34953dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 34963dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 34973dfa576bSMarc Zyngier if (err < 0) 34983dfa576bSMarc Zyngier goto out_free_its; 34993dfa576bSMarc Zyngier 3500debf6d02SMarc Zyngier its->list_nr = err; 3501debf6d02SMarc Zyngier 35023dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 35033dfa576bSMarc Zyngier &res->start, err); 35043dfa576bSMarc Zyngier } else { 35053dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 35063dfa576bSMarc Zyngier } 35073dfa576bSMarc Zyngier } 35083dfa576bSMarc Zyngier 3509db40f0a7STomasz Nowicki its->numa_node = numa_node; 35104c21f3c2SMarc Zyngier 35115bc13c2cSRobert Richter its->cmd_base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 35125bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 35134c21f3c2SMarc Zyngier if (!its->cmd_base) { 35144c21f3c2SMarc Zyngier err = -ENOMEM; 35154c21f3c2SMarc Zyngier goto out_free_its; 35164c21f3c2SMarc Zyngier } 35174c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 3518558b0165SArd Biesheuvel its->fwnode_handle = handle; 3519558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 3520558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 35214c21f3c2SMarc Zyngier 352267510ccaSRobert Richter its_enable_quirks(its); 352367510ccaSRobert Richter 35240e0b0f69SShanker Donthineni err = its_alloc_tables(its); 35254c21f3c2SMarc Zyngier if (err) 35264c21f3c2SMarc Zyngier goto out_free_cmd; 35274c21f3c2SMarc Zyngier 35284c21f3c2SMarc Zyngier err = its_alloc_collections(its); 35294c21f3c2SMarc Zyngier if (err) 35304c21f3c2SMarc Zyngier goto out_free_tables; 35314c21f3c2SMarc Zyngier 35324c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 35332fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 35344c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 35354c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 35364c21f3c2SMarc Zyngier GITS_CBASER_VALID); 35374c21f3c2SMarc Zyngier 35380968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 35390968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 35404c21f3c2SMarc Zyngier 35414ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 3542241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 3543241a386cSMarc Zyngier /* 3544241a386cSMarc Zyngier * The HW reports non-shareable, we must 3545241a386cSMarc Zyngier * remove the cacheability attributes as 3546241a386cSMarc Zyngier * well. 3547241a386cSMarc Zyngier */ 3548241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 3549241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 3550241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 35510968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 3552241a386cSMarc Zyngier } 35534c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 35544c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 35554c21f3c2SMarc Zyngier } 35564c21f3c2SMarc Zyngier 35570968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 35583dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 3559d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 3560d51c4b4dSMarc Zyngier if (its->is_v4) 3561d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 3562d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 3563241a386cSMarc Zyngier 3564dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 3565dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 3566dba0bc7bSDerek Basehore 3567db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 3568d14ae5e6STomasz Nowicki if (err) 356954456db9SMarc Zyngier goto out_free_tables; 35704c21f3c2SMarc Zyngier 3571a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 35724c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 3573a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 35744c21f3c2SMarc Zyngier 35754c21f3c2SMarc Zyngier return 0; 35764c21f3c2SMarc Zyngier 35774c21f3c2SMarc Zyngier out_free_tables: 35784c21f3c2SMarc Zyngier its_free_tables(its); 35794c21f3c2SMarc Zyngier out_free_cmd: 35805bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 35814c21f3c2SMarc Zyngier out_free_its: 35824c21f3c2SMarc Zyngier kfree(its); 35834c21f3c2SMarc Zyngier out_unmap: 35844c21f3c2SMarc Zyngier iounmap(its_base); 3585db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 35864c21f3c2SMarc Zyngier return err; 35874c21f3c2SMarc Zyngier } 35884c21f3c2SMarc Zyngier 35894c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 35904c21f3c2SMarc Zyngier { 3591589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 35924c21f3c2SMarc Zyngier } 35934c21f3c2SMarc Zyngier 35946eb486b6SShanker Donthineni static int redist_disable_lpis(void) 35954c21f3c2SMarc Zyngier { 35966eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 35976eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 35986eb486b6SShanker Donthineni u64 val; 35996eb486b6SShanker Donthineni 36004c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 36014c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 36024c21f3c2SMarc Zyngier return -ENXIO; 36034c21f3c2SMarc Zyngier } 36046eb486b6SShanker Donthineni 36056eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 36066eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 36076eb486b6SShanker Donthineni return 0; 36086eb486b6SShanker Donthineni 360911e37d35SMarc Zyngier /* 361011e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 361111e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 361211e37d35SMarc Zyngier * configured and all is well in the world. 3613c440a9d9SMarc Zyngier * 3614c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 361511e37d35SMarc Zyngier */ 3616c440a9d9SMarc Zyngier if (gic_data_rdist()->lpi_enabled || 3617c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 361811e37d35SMarc Zyngier return 0; 361911e37d35SMarc Zyngier 362011e37d35SMarc Zyngier /* 362111e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 362211e37d35SMarc Zyngier */ 362311e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 36246eb486b6SShanker Donthineni smp_processor_id()); 36256eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 36266eb486b6SShanker Donthineni 36276eb486b6SShanker Donthineni /* Disable LPIs */ 36286eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 36296eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 36306eb486b6SShanker Donthineni 36316eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 36326eb486b6SShanker Donthineni dsb(sy); 36336eb486b6SShanker Donthineni 36346eb486b6SShanker Donthineni /* 36356eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 36366eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 36376eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 36386eb486b6SShanker Donthineni */ 36396eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 36406eb486b6SShanker Donthineni if (!timeout) { 36416eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 36426eb486b6SShanker Donthineni smp_processor_id()); 36436eb486b6SShanker Donthineni return -ETIMEDOUT; 36446eb486b6SShanker Donthineni } 36456eb486b6SShanker Donthineni udelay(1); 36466eb486b6SShanker Donthineni timeout--; 36476eb486b6SShanker Donthineni } 36486eb486b6SShanker Donthineni 36496eb486b6SShanker Donthineni /* 36506eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 36516eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 36526eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 36536eb486b6SShanker Donthineni */ 36546eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 36556eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 36566eb486b6SShanker Donthineni return -EBUSY; 36576eb486b6SShanker Donthineni } 36586eb486b6SShanker Donthineni 36596eb486b6SShanker Donthineni return 0; 36606eb486b6SShanker Donthineni } 36616eb486b6SShanker Donthineni 36626eb486b6SShanker Donthineni int its_cpu_init(void) 36636eb486b6SShanker Donthineni { 36646eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 36656eb486b6SShanker Donthineni int ret; 36666eb486b6SShanker Donthineni 36676eb486b6SShanker Donthineni ret = redist_disable_lpis(); 36686eb486b6SShanker Donthineni if (ret) 36696eb486b6SShanker Donthineni return ret; 36706eb486b6SShanker Donthineni 36714c21f3c2SMarc Zyngier its_cpu_init_lpis(); 3672920181ceSDerek Basehore its_cpu_init_collections(); 36734c21f3c2SMarc Zyngier } 36744c21f3c2SMarc Zyngier 36754c21f3c2SMarc Zyngier return 0; 36764c21f3c2SMarc Zyngier } 36774c21f3c2SMarc Zyngier 3678935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 36794c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 36804c21f3c2SMarc Zyngier {}, 36814c21f3c2SMarc Zyngier }; 36824c21f3c2SMarc Zyngier 3683db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 36844c21f3c2SMarc Zyngier { 36854c21f3c2SMarc Zyngier struct device_node *np; 3686db40f0a7STomasz Nowicki struct resource res; 36874c21f3c2SMarc Zyngier 36884c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 36894c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 369095a25625SStephen Boyd if (!of_device_is_available(np)) 369195a25625SStephen Boyd continue; 3692d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 3693e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 3694e81f54c6SRob Herring np); 3695d14ae5e6STomasz Nowicki continue; 3696d14ae5e6STomasz Nowicki } 3697d14ae5e6STomasz Nowicki 3698db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 3699e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 3700db40f0a7STomasz Nowicki continue; 37014c21f3c2SMarc Zyngier } 37024c21f3c2SMarc Zyngier 3703db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 3704db40f0a7STomasz Nowicki } 3705db40f0a7STomasz Nowicki return 0; 3706db40f0a7STomasz Nowicki } 3707db40f0a7STomasz Nowicki 37083f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 37093f010cf1STomasz Nowicki 37103f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 37113f010cf1STomasz Nowicki 3712d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 3713dbd2b826SGanapatrao Kulkarni struct its_srat_map { 3714dbd2b826SGanapatrao Kulkarni /* numa node id */ 3715dbd2b826SGanapatrao Kulkarni u32 numa_node; 3716dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 3717dbd2b826SGanapatrao Kulkarni u32 its_id; 3718dbd2b826SGanapatrao Kulkarni }; 3719dbd2b826SGanapatrao Kulkarni 3720fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 3721dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 3722dbd2b826SGanapatrao Kulkarni 3723dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 3724dbd2b826SGanapatrao Kulkarni { 3725dbd2b826SGanapatrao Kulkarni int i; 3726dbd2b826SGanapatrao Kulkarni 3727dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 3728dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 3729dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 3730dbd2b826SGanapatrao Kulkarni } 3731dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 3732dbd2b826SGanapatrao Kulkarni } 3733dbd2b826SGanapatrao Kulkarni 3734fdf6e7a8SHanjun Guo static int __init gic_acpi_match_srat_its(struct acpi_subtable_header *header, 3735fdf6e7a8SHanjun Guo const unsigned long end) 3736fdf6e7a8SHanjun Guo { 3737fdf6e7a8SHanjun Guo return 0; 3738fdf6e7a8SHanjun Guo } 3739fdf6e7a8SHanjun Guo 3740dbd2b826SGanapatrao Kulkarni static int __init gic_acpi_parse_srat_its(struct acpi_subtable_header *header, 3741dbd2b826SGanapatrao Kulkarni const unsigned long end) 3742dbd2b826SGanapatrao Kulkarni { 3743dbd2b826SGanapatrao Kulkarni int node; 3744dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 3745dbd2b826SGanapatrao Kulkarni 3746dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 3747dbd2b826SGanapatrao Kulkarni if (!its_affinity) 3748dbd2b826SGanapatrao Kulkarni return -EINVAL; 3749dbd2b826SGanapatrao Kulkarni 3750dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 3751dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 3752dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 3753dbd2b826SGanapatrao Kulkarni return -EINVAL; 3754dbd2b826SGanapatrao Kulkarni } 3755dbd2b826SGanapatrao Kulkarni 3756dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 3757dbd2b826SGanapatrao Kulkarni 3758dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 3759dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 3760dbd2b826SGanapatrao Kulkarni return 0; 3761dbd2b826SGanapatrao Kulkarni } 3762dbd2b826SGanapatrao Kulkarni 3763dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 3764dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 3765dbd2b826SGanapatrao Kulkarni its_in_srat++; 3766dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 3767dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 3768dbd2b826SGanapatrao Kulkarni 3769dbd2b826SGanapatrao Kulkarni return 0; 3770dbd2b826SGanapatrao Kulkarni } 3771dbd2b826SGanapatrao Kulkarni 3772dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 3773dbd2b826SGanapatrao Kulkarni { 3774fdf6e7a8SHanjun Guo int count; 3775fdf6e7a8SHanjun Guo 3776fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 3777fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 3778fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3779fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 3780fdf6e7a8SHanjun Guo if (count <= 0) 3781fdf6e7a8SHanjun Guo return; 3782fdf6e7a8SHanjun Guo 37836da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 3784fdf6e7a8SHanjun Guo GFP_KERNEL); 3785fdf6e7a8SHanjun Guo if (!its_srat_maps) { 3786fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 3787fdf6e7a8SHanjun Guo return; 3788fdf6e7a8SHanjun Guo } 3789fdf6e7a8SHanjun Guo 3790dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 3791dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 3792dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3793dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 3794dbd2b826SGanapatrao Kulkarni } 3795fdf6e7a8SHanjun Guo 3796fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 3797fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 3798fdf6e7a8SHanjun Guo { 3799fdf6e7a8SHanjun Guo kfree(its_srat_maps); 3800fdf6e7a8SHanjun Guo } 3801dbd2b826SGanapatrao Kulkarni #else 3802dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 3803dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 3804fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 3805dbd2b826SGanapatrao Kulkarni #endif 3806dbd2b826SGanapatrao Kulkarni 38073f010cf1STomasz Nowicki static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header, 38083f010cf1STomasz Nowicki const unsigned long end) 38093f010cf1STomasz Nowicki { 38103f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 38113f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 38123f010cf1STomasz Nowicki struct resource res; 38133f010cf1STomasz Nowicki int err; 38143f010cf1STomasz Nowicki 38153f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 38163f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 38173f010cf1STomasz Nowicki res.start = its_entry->base_address; 38183f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 38193f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 38203f010cf1STomasz Nowicki 38213f010cf1STomasz Nowicki dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address); 38223f010cf1STomasz Nowicki if (!dom_handle) { 38233f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 38243f010cf1STomasz Nowicki &res.start); 38253f010cf1STomasz Nowicki return -ENOMEM; 38263f010cf1STomasz Nowicki } 38273f010cf1STomasz Nowicki 38288b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 38298b4282e6SShameer Kolothum dom_handle); 38303f010cf1STomasz Nowicki if (err) { 38313f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 38323f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 38333f010cf1STomasz Nowicki goto dom_err; 38343f010cf1STomasz Nowicki } 38353f010cf1STomasz Nowicki 3836dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 3837dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 38383f010cf1STomasz Nowicki if (!err) 38393f010cf1STomasz Nowicki return 0; 38403f010cf1STomasz Nowicki 38413f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 38423f010cf1STomasz Nowicki dom_err: 38433f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 38443f010cf1STomasz Nowicki return err; 38453f010cf1STomasz Nowicki } 38463f010cf1STomasz Nowicki 38473f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 38483f010cf1STomasz Nowicki { 3849dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 38503f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 38513f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 3852fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 38533f010cf1STomasz Nowicki } 38543f010cf1STomasz Nowicki #else 38553f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 38563f010cf1STomasz Nowicki #endif 38573f010cf1STomasz Nowicki 3858db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 3859db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 3860db40f0a7STomasz Nowicki { 3861db40f0a7STomasz Nowicki struct device_node *of_node; 38628fff27aeSMarc Zyngier struct its_node *its; 38638fff27aeSMarc Zyngier bool has_v4 = false; 38648fff27aeSMarc Zyngier int err; 3865db40f0a7STomasz Nowicki 3866db40f0a7STomasz Nowicki its_parent = parent_domain; 3867db40f0a7STomasz Nowicki of_node = to_of_node(handle); 3868db40f0a7STomasz Nowicki if (of_node) 3869db40f0a7STomasz Nowicki its_of_probe(of_node); 3870db40f0a7STomasz Nowicki else 38713f010cf1STomasz Nowicki its_acpi_probe(); 3872db40f0a7STomasz Nowicki 38734c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 38744c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 38754c21f3c2SMarc Zyngier return -ENXIO; 38764c21f3c2SMarc Zyngier } 38774c21f3c2SMarc Zyngier 38784c21f3c2SMarc Zyngier gic_rdists = rdists; 387911e37d35SMarc Zyngier 388011e37d35SMarc Zyngier err = allocate_lpi_tables(); 38818fff27aeSMarc Zyngier if (err) 38828fff27aeSMarc Zyngier return err; 38838fff27aeSMarc Zyngier 38848fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 38858fff27aeSMarc Zyngier has_v4 |= its->is_v4; 38868fff27aeSMarc Zyngier 38878fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 38883d63cb53SMarc Zyngier if (its_init_vpe_domain() || 38893d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 38908fff27aeSMarc Zyngier rdists->has_vlpis = false; 38918fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 38928fff27aeSMarc Zyngier } 38938fff27aeSMarc Zyngier } 38948fff27aeSMarc Zyngier 3895dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 3896dba0bc7bSDerek Basehore 38978fff27aeSMarc Zyngier return 0; 38984c21f3c2SMarc Zyngier } 3899