1cc2d3216SMarc Zyngier /* 2d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 183f010cf1STomasz Nowicki #include <linux/acpi.h> 198d3554b8SHanjun Guo #include <linux/acpi_iort.h> 20cc2d3216SMarc Zyngier #include <linux/bitmap.h> 21cc2d3216SMarc Zyngier #include <linux/cpu.h> 22cc2d3216SMarc Zyngier #include <linux/delay.h> 2344bb7e24SRobin Murphy #include <linux/dma-iommu.h> 24cc2d3216SMarc Zyngier #include <linux/interrupt.h> 253f010cf1STomasz Nowicki #include <linux/irqdomain.h> 26cc2d3216SMarc Zyngier #include <linux/log2.h> 27cc2d3216SMarc Zyngier #include <linux/mm.h> 28cc2d3216SMarc Zyngier #include <linux/msi.h> 29cc2d3216SMarc Zyngier #include <linux/of.h> 30cc2d3216SMarc Zyngier #include <linux/of_address.h> 31cc2d3216SMarc Zyngier #include <linux/of_irq.h> 32cc2d3216SMarc Zyngier #include <linux/of_pci.h> 33cc2d3216SMarc Zyngier #include <linux/of_platform.h> 34cc2d3216SMarc Zyngier #include <linux/percpu.h> 35cc2d3216SMarc Zyngier #include <linux/slab.h> 36cc2d3216SMarc Zyngier 3741a83e06SJoel Porquet #include <linux/irqchip.h> 38cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 39c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 40cc2d3216SMarc Zyngier 41cc2d3216SMarc Zyngier #include <asm/cputype.h> 42cc2d3216SMarc Zyngier #include <asm/exception.h> 43cc2d3216SMarc Zyngier 4467510ccaSRobert Richter #include "irq-gic-common.h" 4567510ccaSRobert Richter 4694100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4794100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 48fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 49cc2d3216SMarc Zyngier 50c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 51c48ed51cSMarc Zyngier 52a13b0404SMarc Zyngier static u32 lpi_id_bits; 53a13b0404SMarc Zyngier 54a13b0404SMarc Zyngier /* 55a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 56a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 57a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 58a13b0404SMarc Zyngier */ 59a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 60a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 61a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 62a13b0404SMarc Zyngier 63a13b0404SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 64a13b0404SMarc Zyngier 65cc2d3216SMarc Zyngier /* 66cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 67cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 68cc2d3216SMarc Zyngier * CPU. 69cc2d3216SMarc Zyngier */ 70cc2d3216SMarc Zyngier struct its_collection { 71cc2d3216SMarc Zyngier u64 target_address; 72cc2d3216SMarc Zyngier u16 col_id; 73cc2d3216SMarc Zyngier }; 74cc2d3216SMarc Zyngier 75cc2d3216SMarc Zyngier /* 769347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 779347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 78466b7d16SShanker Donthineni */ 79466b7d16SShanker Donthineni struct its_baser { 80466b7d16SShanker Donthineni void *base; 81466b7d16SShanker Donthineni u64 val; 82466b7d16SShanker Donthineni u32 order; 839347359aSShanker Donthineni u32 psz; 84466b7d16SShanker Donthineni }; 85466b7d16SShanker Donthineni 86466b7d16SShanker Donthineni /* 87cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 88841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 89841514abSMarc Zyngier * list of devices writing to it. 90cc2d3216SMarc Zyngier */ 91cc2d3216SMarc Zyngier struct its_node { 92cc2d3216SMarc Zyngier raw_spinlock_t lock; 93cc2d3216SMarc Zyngier struct list_head entry; 94cc2d3216SMarc Zyngier void __iomem *base; 95db40f0a7STomasz Nowicki phys_addr_t phys_base; 96cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 97cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 98466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 99cc2d3216SMarc Zyngier struct its_collection *collections; 100cc2d3216SMarc Zyngier struct list_head its_device_list; 101cc2d3216SMarc Zyngier u64 flags; 102cc2d3216SMarc Zyngier u32 ite_size; 103466b7d16SShanker Donthineni u32 device_ids; 104fbf8f40eSGanapatrao Kulkarni int numa_node; 1053dfa576bSMarc Zyngier bool is_v4; 106cc2d3216SMarc Zyngier }; 107cc2d3216SMarc Zyngier 108cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 109cc2d3216SMarc Zyngier 11032bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 11132bd44dcSShanker Donthineni #define ITS_MAX_VPEID_BITS (16) 11232bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 11332bd44dcSShanker Donthineni 1142eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1152eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1162eca0d6cSShanker Donthineni 117591e5becSMarc Zyngier struct event_lpi_map { 118591e5becSMarc Zyngier unsigned long *lpi_map; 119591e5becSMarc Zyngier u16 *col_map; 120591e5becSMarc Zyngier irq_hw_number_t lpi_base; 121591e5becSMarc Zyngier int nr_lpis; 122d011e4e6SMarc Zyngier struct mutex vlpi_lock; 123d011e4e6SMarc Zyngier struct its_vm *vm; 124d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 125d011e4e6SMarc Zyngier int nr_vlpis; 126591e5becSMarc Zyngier }; 127591e5becSMarc Zyngier 128cc2d3216SMarc Zyngier /* 129d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 130d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 131d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 132d011e4e6SMarc Zyngier * indicates which one. 133cc2d3216SMarc Zyngier */ 134cc2d3216SMarc Zyngier struct its_device { 135cc2d3216SMarc Zyngier struct list_head entry; 136cc2d3216SMarc Zyngier struct its_node *its; 137591e5becSMarc Zyngier struct event_lpi_map event_map; 138cc2d3216SMarc Zyngier void *itt; 139cc2d3216SMarc Zyngier u32 nr_ites; 140cc2d3216SMarc Zyngier u32 device_id; 141cc2d3216SMarc Zyngier }; 142cc2d3216SMarc Zyngier 14320b3d54eSMarc Zyngier static struct { 14420b3d54eSMarc Zyngier raw_spinlock_t lock; 14520b3d54eSMarc Zyngier struct its_device *dev; 14620b3d54eSMarc Zyngier struct its_vpe **vpes; 14720b3d54eSMarc Zyngier int next_victim; 14820b3d54eSMarc Zyngier } vpe_proxy; 14920b3d54eSMarc Zyngier 1501ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 1511ac19ca6SMarc Zyngier static DEFINE_SPINLOCK(its_lock); 1521ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 153db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1541ac19ca6SMarc Zyngier 1553dfa576bSMarc Zyngier /* 1563dfa576bSMarc Zyngier * We have a maximum number of 16 ITSs in the whole system if we're 1573dfa576bSMarc Zyngier * using the ITSList mechanism 1583dfa576bSMarc Zyngier */ 1593dfa576bSMarc Zyngier #define ITS_LIST_MAX 16 1603dfa576bSMarc Zyngier 1613dfa576bSMarc Zyngier static unsigned long its_list_map; 1623171a47aSMarc Zyngier static u16 vmovp_seq_num; 1633171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1643171a47aSMarc Zyngier 1657d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1663dfa576bSMarc Zyngier 1671ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 1681ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 169e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1701ac19ca6SMarc Zyngier 171591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 172591e5becSMarc Zyngier u32 event) 173591e5becSMarc Zyngier { 174591e5becSMarc Zyngier struct its_node *its = its_dev->its; 175591e5becSMarc Zyngier 176591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 177591e5becSMarc Zyngier } 178591e5becSMarc Zyngier 179cc2d3216SMarc Zyngier /* 180cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 181cc2d3216SMarc Zyngier * block. 182cc2d3216SMarc Zyngier */ 183cc2d3216SMarc Zyngier struct its_cmd_desc { 184cc2d3216SMarc Zyngier union { 185cc2d3216SMarc Zyngier struct { 186cc2d3216SMarc Zyngier struct its_device *dev; 187cc2d3216SMarc Zyngier u32 event_id; 188cc2d3216SMarc Zyngier } its_inv_cmd; 189cc2d3216SMarc Zyngier 190cc2d3216SMarc Zyngier struct { 191cc2d3216SMarc Zyngier struct its_device *dev; 192cc2d3216SMarc Zyngier u32 event_id; 1938d85dcedSMarc Zyngier } its_clear_cmd; 1948d85dcedSMarc Zyngier 1958d85dcedSMarc Zyngier struct { 1968d85dcedSMarc Zyngier struct its_device *dev; 1978d85dcedSMarc Zyngier u32 event_id; 198cc2d3216SMarc Zyngier } its_int_cmd; 199cc2d3216SMarc Zyngier 200cc2d3216SMarc Zyngier struct { 201cc2d3216SMarc Zyngier struct its_device *dev; 202cc2d3216SMarc Zyngier int valid; 203cc2d3216SMarc Zyngier } its_mapd_cmd; 204cc2d3216SMarc Zyngier 205cc2d3216SMarc Zyngier struct { 206cc2d3216SMarc Zyngier struct its_collection *col; 207cc2d3216SMarc Zyngier int valid; 208cc2d3216SMarc Zyngier } its_mapc_cmd; 209cc2d3216SMarc Zyngier 210cc2d3216SMarc Zyngier struct { 211cc2d3216SMarc Zyngier struct its_device *dev; 212cc2d3216SMarc Zyngier u32 phys_id; 213cc2d3216SMarc Zyngier u32 event_id; 2146a25ad3aSMarc Zyngier } its_mapti_cmd; 215cc2d3216SMarc Zyngier 216cc2d3216SMarc Zyngier struct { 217cc2d3216SMarc Zyngier struct its_device *dev; 218cc2d3216SMarc Zyngier struct its_collection *col; 219591e5becSMarc Zyngier u32 event_id; 220cc2d3216SMarc Zyngier } its_movi_cmd; 221cc2d3216SMarc Zyngier 222cc2d3216SMarc Zyngier struct { 223cc2d3216SMarc Zyngier struct its_device *dev; 224cc2d3216SMarc Zyngier u32 event_id; 225cc2d3216SMarc Zyngier } its_discard_cmd; 226cc2d3216SMarc Zyngier 227cc2d3216SMarc Zyngier struct { 228cc2d3216SMarc Zyngier struct its_collection *col; 229cc2d3216SMarc Zyngier } its_invall_cmd; 230d011e4e6SMarc Zyngier 231d011e4e6SMarc Zyngier struct { 232d011e4e6SMarc Zyngier struct its_vpe *vpe; 233eb78192bSMarc Zyngier } its_vinvall_cmd; 234eb78192bSMarc Zyngier 235eb78192bSMarc Zyngier struct { 236eb78192bSMarc Zyngier struct its_vpe *vpe; 237eb78192bSMarc Zyngier struct its_collection *col; 238eb78192bSMarc Zyngier bool valid; 239eb78192bSMarc Zyngier } its_vmapp_cmd; 240eb78192bSMarc Zyngier 241eb78192bSMarc Zyngier struct { 242eb78192bSMarc Zyngier struct its_vpe *vpe; 243d011e4e6SMarc Zyngier struct its_device *dev; 244d011e4e6SMarc Zyngier u32 virt_id; 245d011e4e6SMarc Zyngier u32 event_id; 246d011e4e6SMarc Zyngier bool db_enabled; 247d011e4e6SMarc Zyngier } its_vmapti_cmd; 248d011e4e6SMarc Zyngier 249d011e4e6SMarc Zyngier struct { 250d011e4e6SMarc Zyngier struct its_vpe *vpe; 251d011e4e6SMarc Zyngier struct its_device *dev; 252d011e4e6SMarc Zyngier u32 event_id; 253d011e4e6SMarc Zyngier bool db_enabled; 254d011e4e6SMarc Zyngier } its_vmovi_cmd; 2553171a47aSMarc Zyngier 2563171a47aSMarc Zyngier struct { 2573171a47aSMarc Zyngier struct its_vpe *vpe; 2583171a47aSMarc Zyngier struct its_collection *col; 2593171a47aSMarc Zyngier u16 seq_num; 2603171a47aSMarc Zyngier u16 its_list; 2613171a47aSMarc Zyngier } its_vmovp_cmd; 262cc2d3216SMarc Zyngier }; 263cc2d3216SMarc Zyngier }; 264cc2d3216SMarc Zyngier 265cc2d3216SMarc Zyngier /* 266cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 267cc2d3216SMarc Zyngier */ 268cc2d3216SMarc Zyngier struct its_cmd_block { 269cc2d3216SMarc Zyngier u64 raw_cmd[4]; 270cc2d3216SMarc Zyngier }; 271cc2d3216SMarc Zyngier 272cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 273cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 274cc2d3216SMarc Zyngier 275cc2d3216SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_cmd_block *, 276cc2d3216SMarc Zyngier struct its_cmd_desc *); 277cc2d3216SMarc Zyngier 278d011e4e6SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_cmd_block *, 279d011e4e6SMarc Zyngier struct its_cmd_desc *); 280d011e4e6SMarc Zyngier 2814d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 2824d36f136SMarc Zyngier { 2834d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 2844d36f136SMarc Zyngier *raw_cmd &= ~mask; 2854d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 2864d36f136SMarc Zyngier } 2874d36f136SMarc Zyngier 288cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 289cc2d3216SMarc Zyngier { 2904d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 291cc2d3216SMarc Zyngier } 292cc2d3216SMarc Zyngier 293cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 294cc2d3216SMarc Zyngier { 2954d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 296cc2d3216SMarc Zyngier } 297cc2d3216SMarc Zyngier 298cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 299cc2d3216SMarc Zyngier { 3004d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 301cc2d3216SMarc Zyngier } 302cc2d3216SMarc Zyngier 303cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 304cc2d3216SMarc Zyngier { 3054d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 306cc2d3216SMarc Zyngier } 307cc2d3216SMarc Zyngier 308cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 309cc2d3216SMarc Zyngier { 3104d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 311cc2d3216SMarc Zyngier } 312cc2d3216SMarc Zyngier 313cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 314cc2d3216SMarc Zyngier { 31530ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 316cc2d3216SMarc Zyngier } 317cc2d3216SMarc Zyngier 318cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 319cc2d3216SMarc Zyngier { 3204d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 321cc2d3216SMarc Zyngier } 322cc2d3216SMarc Zyngier 323cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 324cc2d3216SMarc Zyngier { 32530ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 326cc2d3216SMarc Zyngier } 327cc2d3216SMarc Zyngier 328cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 329cc2d3216SMarc Zyngier { 3304d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 331cc2d3216SMarc Zyngier } 332cc2d3216SMarc Zyngier 333d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 334d011e4e6SMarc Zyngier { 335d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 336d011e4e6SMarc Zyngier } 337d011e4e6SMarc Zyngier 338d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 339d011e4e6SMarc Zyngier { 340d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 341d011e4e6SMarc Zyngier } 342d011e4e6SMarc Zyngier 343d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 344d011e4e6SMarc Zyngier { 345d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 346d011e4e6SMarc Zyngier } 347d011e4e6SMarc Zyngier 348d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 349d011e4e6SMarc Zyngier { 350d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 351d011e4e6SMarc Zyngier } 352d011e4e6SMarc Zyngier 3533171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 3543171a47aSMarc Zyngier { 3553171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 3563171a47aSMarc Zyngier } 3573171a47aSMarc Zyngier 3583171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 3593171a47aSMarc Zyngier { 3603171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 3613171a47aSMarc Zyngier } 3623171a47aSMarc Zyngier 363eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 364eb78192bSMarc Zyngier { 36530ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 366eb78192bSMarc Zyngier } 367eb78192bSMarc Zyngier 368eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 369eb78192bSMarc Zyngier { 370eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 371eb78192bSMarc Zyngier } 372eb78192bSMarc Zyngier 373cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 374cc2d3216SMarc Zyngier { 375cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 376cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 377cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 378cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 379cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 380cc2d3216SMarc Zyngier } 381cc2d3216SMarc Zyngier 382cc2d3216SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_cmd_block *cmd, 383cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 384cc2d3216SMarc Zyngier { 385cc2d3216SMarc Zyngier unsigned long itt_addr; 386c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 387cc2d3216SMarc Zyngier 388cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 389cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 390cc2d3216SMarc Zyngier 391cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 392cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 393cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 394cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 395cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 396cc2d3216SMarc Zyngier 397cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 398cc2d3216SMarc Zyngier 399591e5becSMarc Zyngier return NULL; 400cc2d3216SMarc Zyngier } 401cc2d3216SMarc Zyngier 402cc2d3216SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_cmd_block *cmd, 403cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 404cc2d3216SMarc Zyngier { 405cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 406cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 407cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 408cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 409cc2d3216SMarc Zyngier 410cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 411cc2d3216SMarc Zyngier 412cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 413cc2d3216SMarc Zyngier } 414cc2d3216SMarc Zyngier 4156a25ad3aSMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_cmd_block *cmd, 416cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 417cc2d3216SMarc Zyngier { 418591e5becSMarc Zyngier struct its_collection *col; 419591e5becSMarc Zyngier 4206a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 4216a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 422591e5becSMarc Zyngier 4236a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 4246a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 4256a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 4266a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 427591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 428cc2d3216SMarc Zyngier 429cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 430cc2d3216SMarc Zyngier 431591e5becSMarc Zyngier return col; 432cc2d3216SMarc Zyngier } 433cc2d3216SMarc Zyngier 434cc2d3216SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_cmd_block *cmd, 435cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 436cc2d3216SMarc Zyngier { 437591e5becSMarc Zyngier struct its_collection *col; 438591e5becSMarc Zyngier 439591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 440591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 441591e5becSMarc Zyngier 442cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 443cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 444591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 445cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 446cc2d3216SMarc Zyngier 447cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 448cc2d3216SMarc Zyngier 449591e5becSMarc Zyngier return col; 450cc2d3216SMarc Zyngier } 451cc2d3216SMarc Zyngier 452cc2d3216SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_cmd_block *cmd, 453cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 454cc2d3216SMarc Zyngier { 455591e5becSMarc Zyngier struct its_collection *col; 456591e5becSMarc Zyngier 457591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 458591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 459591e5becSMarc Zyngier 460cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 461cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 462cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 463cc2d3216SMarc Zyngier 464cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 465cc2d3216SMarc Zyngier 466591e5becSMarc Zyngier return col; 467cc2d3216SMarc Zyngier } 468cc2d3216SMarc Zyngier 469cc2d3216SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_cmd_block *cmd, 470cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 471cc2d3216SMarc Zyngier { 472591e5becSMarc Zyngier struct its_collection *col; 473591e5becSMarc Zyngier 474591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 475591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 476591e5becSMarc Zyngier 477cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 478cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 479cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 480cc2d3216SMarc Zyngier 481cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 482cc2d3216SMarc Zyngier 483591e5becSMarc Zyngier return col; 484cc2d3216SMarc Zyngier } 485cc2d3216SMarc Zyngier 4868d85dcedSMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_cmd_block *cmd, 4878d85dcedSMarc Zyngier struct its_cmd_desc *desc) 4888d85dcedSMarc Zyngier { 4898d85dcedSMarc Zyngier struct its_collection *col; 4908d85dcedSMarc Zyngier 4918d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 4928d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 4938d85dcedSMarc Zyngier 4948d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 4958d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 4968d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 4978d85dcedSMarc Zyngier 4988d85dcedSMarc Zyngier its_fixup_cmd(cmd); 4998d85dcedSMarc Zyngier 5008d85dcedSMarc Zyngier return col; 5018d85dcedSMarc Zyngier } 5028d85dcedSMarc Zyngier 5038d85dcedSMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_cmd_block *cmd, 5048d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5058d85dcedSMarc Zyngier { 5068d85dcedSMarc Zyngier struct its_collection *col; 5078d85dcedSMarc Zyngier 5088d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 5098d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 5108d85dcedSMarc Zyngier 5118d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 5128d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 5138d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 5148d85dcedSMarc Zyngier 5158d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5168d85dcedSMarc Zyngier 5178d85dcedSMarc Zyngier return col; 5188d85dcedSMarc Zyngier } 5198d85dcedSMarc Zyngier 520cc2d3216SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd, 521cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 522cc2d3216SMarc Zyngier { 523cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 524cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 525cc2d3216SMarc Zyngier 526cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 527cc2d3216SMarc Zyngier 528cc2d3216SMarc Zyngier return NULL; 529cc2d3216SMarc Zyngier } 530cc2d3216SMarc Zyngier 531eb78192bSMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_cmd_block *cmd, 532eb78192bSMarc Zyngier struct its_cmd_desc *desc) 533eb78192bSMarc Zyngier { 534eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 535eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 536eb78192bSMarc Zyngier 537eb78192bSMarc Zyngier its_fixup_cmd(cmd); 538eb78192bSMarc Zyngier 539eb78192bSMarc Zyngier return desc->its_vinvall_cmd.vpe; 540eb78192bSMarc Zyngier } 541eb78192bSMarc Zyngier 542eb78192bSMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_cmd_block *cmd, 543eb78192bSMarc Zyngier struct its_cmd_desc *desc) 544eb78192bSMarc Zyngier { 545eb78192bSMarc Zyngier unsigned long vpt_addr; 546eb78192bSMarc Zyngier 547eb78192bSMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 548eb78192bSMarc Zyngier 549eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 550eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 551eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 552eb78192bSMarc Zyngier its_encode_target(cmd, desc->its_vmapp_cmd.col->target_address); 553eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 554eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 555eb78192bSMarc Zyngier 556eb78192bSMarc Zyngier its_fixup_cmd(cmd); 557eb78192bSMarc Zyngier 558eb78192bSMarc Zyngier return desc->its_vmapp_cmd.vpe; 559eb78192bSMarc Zyngier } 560eb78192bSMarc Zyngier 561d011e4e6SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_cmd_block *cmd, 562d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 563d011e4e6SMarc Zyngier { 564d011e4e6SMarc Zyngier u32 db; 565d011e4e6SMarc Zyngier 566d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 567d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 568d011e4e6SMarc Zyngier else 569d011e4e6SMarc Zyngier db = 1023; 570d011e4e6SMarc Zyngier 571d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 572d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 573d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 574d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 575d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 576d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 577d011e4e6SMarc Zyngier 578d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 579d011e4e6SMarc Zyngier 580d011e4e6SMarc Zyngier return desc->its_vmapti_cmd.vpe; 581d011e4e6SMarc Zyngier } 582d011e4e6SMarc Zyngier 583d011e4e6SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_cmd_block *cmd, 584d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 585d011e4e6SMarc Zyngier { 586d011e4e6SMarc Zyngier u32 db; 587d011e4e6SMarc Zyngier 588d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 589d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 590d011e4e6SMarc Zyngier else 591d011e4e6SMarc Zyngier db = 1023; 592d011e4e6SMarc Zyngier 593d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 594d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 595d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 596d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 597d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 598d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 599d011e4e6SMarc Zyngier 600d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 601d011e4e6SMarc Zyngier 602d011e4e6SMarc Zyngier return desc->its_vmovi_cmd.vpe; 603d011e4e6SMarc Zyngier } 604d011e4e6SMarc Zyngier 6053171a47aSMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_cmd_block *cmd, 6063171a47aSMarc Zyngier struct its_cmd_desc *desc) 6073171a47aSMarc Zyngier { 6083171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 6093171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 6103171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 6113171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 6123171a47aSMarc Zyngier its_encode_target(cmd, desc->its_vmovp_cmd.col->target_address); 6133171a47aSMarc Zyngier 6143171a47aSMarc Zyngier its_fixup_cmd(cmd); 6153171a47aSMarc Zyngier 6163171a47aSMarc Zyngier return desc->its_vmovp_cmd.vpe; 6173171a47aSMarc Zyngier } 6183171a47aSMarc Zyngier 619cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 620cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 621cc2d3216SMarc Zyngier { 622cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 623cc2d3216SMarc Zyngier } 624cc2d3216SMarc Zyngier 625cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 626cc2d3216SMarc Zyngier { 627cc2d3216SMarc Zyngier int widx; 628cc2d3216SMarc Zyngier int ridx; 629cc2d3216SMarc Zyngier 630cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 631cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 632cc2d3216SMarc Zyngier 633cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 634cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 635cc2d3216SMarc Zyngier return 1; 636cc2d3216SMarc Zyngier 637cc2d3216SMarc Zyngier return 0; 638cc2d3216SMarc Zyngier } 639cc2d3216SMarc Zyngier 640cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 641cc2d3216SMarc Zyngier { 642cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 643cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 644cc2d3216SMarc Zyngier 645cc2d3216SMarc Zyngier while (its_queue_full(its)) { 646cc2d3216SMarc Zyngier count--; 647cc2d3216SMarc Zyngier if (!count) { 648cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 649cc2d3216SMarc Zyngier return NULL; 650cc2d3216SMarc Zyngier } 651cc2d3216SMarc Zyngier cpu_relax(); 652cc2d3216SMarc Zyngier udelay(1); 653cc2d3216SMarc Zyngier } 654cc2d3216SMarc Zyngier 655cc2d3216SMarc Zyngier cmd = its->cmd_write++; 656cc2d3216SMarc Zyngier 657cc2d3216SMarc Zyngier /* Handle queue wrapping */ 658cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 659cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 660cc2d3216SMarc Zyngier 66134d677a9SMarc Zyngier /* Clear command */ 66234d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 66334d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 66434d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 66534d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 66634d677a9SMarc Zyngier 667cc2d3216SMarc Zyngier return cmd; 668cc2d3216SMarc Zyngier } 669cc2d3216SMarc Zyngier 670cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 671cc2d3216SMarc Zyngier { 672cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 673cc2d3216SMarc Zyngier 674cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 675cc2d3216SMarc Zyngier 676cc2d3216SMarc Zyngier return its->cmd_write; 677cc2d3216SMarc Zyngier } 678cc2d3216SMarc Zyngier 679cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 680cc2d3216SMarc Zyngier { 681cc2d3216SMarc Zyngier /* 682cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 683cc2d3216SMarc Zyngier * the ITS. 684cc2d3216SMarc Zyngier */ 685cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 686328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 687cc2d3216SMarc Zyngier else 688cc2d3216SMarc Zyngier dsb(ishst); 689cc2d3216SMarc Zyngier } 690cc2d3216SMarc Zyngier 691cc2d3216SMarc Zyngier static void its_wait_for_range_completion(struct its_node *its, 692cc2d3216SMarc Zyngier struct its_cmd_block *from, 693cc2d3216SMarc Zyngier struct its_cmd_block *to) 694cc2d3216SMarc Zyngier { 695cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 696cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 697cc2d3216SMarc Zyngier 698cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 699cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 700cc2d3216SMarc Zyngier 701cc2d3216SMarc Zyngier while (1) { 702cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 7039bdd8b1cSMarc Zyngier 7049bdd8b1cSMarc Zyngier /* Direct case */ 7059bdd8b1cSMarc Zyngier if (from_idx < to_idx && rd_idx >= to_idx) 7069bdd8b1cSMarc Zyngier break; 7079bdd8b1cSMarc Zyngier 7089bdd8b1cSMarc Zyngier /* Wrapped case */ 7099bdd8b1cSMarc Zyngier if (from_idx >= to_idx && rd_idx >= to_idx && rd_idx < from_idx) 710cc2d3216SMarc Zyngier break; 711cc2d3216SMarc Zyngier 712cc2d3216SMarc Zyngier count--; 713cc2d3216SMarc Zyngier if (!count) { 714cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue timeout\n"); 715cc2d3216SMarc Zyngier return; 716cc2d3216SMarc Zyngier } 717cc2d3216SMarc Zyngier cpu_relax(); 718cc2d3216SMarc Zyngier udelay(1); 719cc2d3216SMarc Zyngier } 720cc2d3216SMarc Zyngier } 721cc2d3216SMarc Zyngier 722e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 723e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 724e4f9094bSMarc Zyngier void name(struct its_node *its, \ 725e4f9094bSMarc Zyngier buildtype builder, \ 726e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 727e4f9094bSMarc Zyngier { \ 728e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 729e4f9094bSMarc Zyngier synctype *sync_obj; \ 730e4f9094bSMarc Zyngier unsigned long flags; \ 731e4f9094bSMarc Zyngier \ 732e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 733e4f9094bSMarc Zyngier \ 734e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 735e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 736e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 737e4f9094bSMarc Zyngier return; \ 738e4f9094bSMarc Zyngier } \ 739e4f9094bSMarc Zyngier sync_obj = builder(cmd, desc); \ 740e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 741e4f9094bSMarc Zyngier \ 742e4f9094bSMarc Zyngier if (sync_obj) { \ 743e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 744e4f9094bSMarc Zyngier if (!sync_cmd) \ 745e4f9094bSMarc Zyngier goto post; \ 746e4f9094bSMarc Zyngier \ 747e4f9094bSMarc Zyngier buildfn(sync_cmd, sync_obj); \ 748e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 749e4f9094bSMarc Zyngier } \ 750e4f9094bSMarc Zyngier \ 751e4f9094bSMarc Zyngier post: \ 752e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 753e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 754e4f9094bSMarc Zyngier \ 755e4f9094bSMarc Zyngier its_wait_for_range_completion(its, cmd, next_cmd); \ 756e4f9094bSMarc Zyngier } 757e4f9094bSMarc Zyngier 758e4f9094bSMarc Zyngier static void its_build_sync_cmd(struct its_cmd_block *sync_cmd, 759e4f9094bSMarc Zyngier struct its_collection *sync_col) 760cc2d3216SMarc Zyngier { 761cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 762cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 763e4f9094bSMarc Zyngier 764cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 765cc2d3216SMarc Zyngier } 766cc2d3216SMarc Zyngier 767e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 768e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 769cc2d3216SMarc Zyngier 770d011e4e6SMarc Zyngier static void its_build_vsync_cmd(struct its_cmd_block *sync_cmd, 771d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 772d011e4e6SMarc Zyngier { 773d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 774d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 775d011e4e6SMarc Zyngier 776d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 777d011e4e6SMarc Zyngier } 778d011e4e6SMarc Zyngier 779d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 780d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 781d011e4e6SMarc Zyngier 7828d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 7838d85dcedSMarc Zyngier { 7848d85dcedSMarc Zyngier struct its_cmd_desc desc; 7858d85dcedSMarc Zyngier 7868d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 7878d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 7888d85dcedSMarc Zyngier 7898d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 7908d85dcedSMarc Zyngier } 7918d85dcedSMarc Zyngier 7928d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 7938d85dcedSMarc Zyngier { 7948d85dcedSMarc Zyngier struct its_cmd_desc desc; 7958d85dcedSMarc Zyngier 7968d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 7978d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 7988d85dcedSMarc Zyngier 7998d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 800cc2d3216SMarc Zyngier } 801cc2d3216SMarc Zyngier 802cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 803cc2d3216SMarc Zyngier { 804cc2d3216SMarc Zyngier struct its_cmd_desc desc; 805cc2d3216SMarc Zyngier 806cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 807cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 808cc2d3216SMarc Zyngier 809cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 810cc2d3216SMarc Zyngier } 811cc2d3216SMarc Zyngier 812cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 813cc2d3216SMarc Zyngier { 814cc2d3216SMarc Zyngier struct its_cmd_desc desc; 815cc2d3216SMarc Zyngier 816cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 817cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 818cc2d3216SMarc Zyngier 819cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 820cc2d3216SMarc Zyngier } 821cc2d3216SMarc Zyngier 822cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 823cc2d3216SMarc Zyngier int valid) 824cc2d3216SMarc Zyngier { 825cc2d3216SMarc Zyngier struct its_cmd_desc desc; 826cc2d3216SMarc Zyngier 827cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 828cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 829cc2d3216SMarc Zyngier 830cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 831cc2d3216SMarc Zyngier } 832cc2d3216SMarc Zyngier 8336a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 834cc2d3216SMarc Zyngier { 835cc2d3216SMarc Zyngier struct its_cmd_desc desc; 836cc2d3216SMarc Zyngier 8376a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 8386a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 8396a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 840cc2d3216SMarc Zyngier 8416a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 842cc2d3216SMarc Zyngier } 843cc2d3216SMarc Zyngier 844cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 845cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 846cc2d3216SMarc Zyngier { 847cc2d3216SMarc Zyngier struct its_cmd_desc desc; 848cc2d3216SMarc Zyngier 849cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 850cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 851591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 852cc2d3216SMarc Zyngier 853cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 854cc2d3216SMarc Zyngier } 855cc2d3216SMarc Zyngier 856cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 857cc2d3216SMarc Zyngier { 858cc2d3216SMarc Zyngier struct its_cmd_desc desc; 859cc2d3216SMarc Zyngier 860cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 861cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 862cc2d3216SMarc Zyngier 863cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 864cc2d3216SMarc Zyngier } 865cc2d3216SMarc Zyngier 866cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 867cc2d3216SMarc Zyngier { 868cc2d3216SMarc Zyngier struct its_cmd_desc desc; 869cc2d3216SMarc Zyngier 870cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 871cc2d3216SMarc Zyngier 872cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 873cc2d3216SMarc Zyngier } 874c48ed51cSMarc Zyngier 875d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 876d011e4e6SMarc Zyngier { 877d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 878d011e4e6SMarc Zyngier struct its_cmd_desc desc; 879d011e4e6SMarc Zyngier 880d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 881d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 882d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 883d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 884d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 885d011e4e6SMarc Zyngier 886d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 887d011e4e6SMarc Zyngier } 888d011e4e6SMarc Zyngier 889d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 890d011e4e6SMarc Zyngier { 891d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 892d011e4e6SMarc Zyngier struct its_cmd_desc desc; 893d011e4e6SMarc Zyngier 894d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 895d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 896d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 897d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 898d011e4e6SMarc Zyngier 899d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 900d011e4e6SMarc Zyngier } 901d011e4e6SMarc Zyngier 902eb78192bSMarc Zyngier static void its_send_vmapp(struct its_vpe *vpe, bool valid) 903eb78192bSMarc Zyngier { 904eb78192bSMarc Zyngier struct its_cmd_desc desc; 905eb78192bSMarc Zyngier struct its_node *its; 906eb78192bSMarc Zyngier 907eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 908eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 909eb78192bSMarc Zyngier 910eb78192bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 911eb78192bSMarc Zyngier if (!its->is_v4) 912eb78192bSMarc Zyngier continue; 913eb78192bSMarc Zyngier 914eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 915eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 916eb78192bSMarc Zyngier } 917eb78192bSMarc Zyngier } 918eb78192bSMarc Zyngier 9193171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 9203171a47aSMarc Zyngier { 9213171a47aSMarc Zyngier struct its_cmd_desc desc; 9223171a47aSMarc Zyngier struct its_node *its; 9233171a47aSMarc Zyngier unsigned long flags; 9243171a47aSMarc Zyngier int col_id = vpe->col_idx; 9253171a47aSMarc Zyngier 9263171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 9273171a47aSMarc Zyngier desc.its_vmovp_cmd.its_list = (u16)its_list_map; 9283171a47aSMarc Zyngier 9293171a47aSMarc Zyngier if (!its_list_map) { 9303171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 9313171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = 0; 9323171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9333171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9343171a47aSMarc Zyngier return; 9353171a47aSMarc Zyngier } 9363171a47aSMarc Zyngier 9373171a47aSMarc Zyngier /* 9383171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 9393171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 9403171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 9413171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 9423171a47aSMarc Zyngier * 9433171a47aSMarc Zyngier * Wall <-- Head. 9443171a47aSMarc Zyngier */ 9453171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 9463171a47aSMarc Zyngier 9473171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 9483171a47aSMarc Zyngier 9493171a47aSMarc Zyngier /* Emit VMOVPs */ 9503171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 9513171a47aSMarc Zyngier if (!its->is_v4) 9523171a47aSMarc Zyngier continue; 9533171a47aSMarc Zyngier 9543171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9553171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9563171a47aSMarc Zyngier } 9573171a47aSMarc Zyngier 9583171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 9593171a47aSMarc Zyngier } 9603171a47aSMarc Zyngier 961eb78192bSMarc Zyngier static void its_send_vinvall(struct its_vpe *vpe) 962eb78192bSMarc Zyngier { 963eb78192bSMarc Zyngier struct its_cmd_desc desc; 964eb78192bSMarc Zyngier struct its_node *its; 965eb78192bSMarc Zyngier 966eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 967eb78192bSMarc Zyngier 968eb78192bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 969eb78192bSMarc Zyngier if (!its->is_v4) 970eb78192bSMarc Zyngier continue; 971eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 972eb78192bSMarc Zyngier } 973eb78192bSMarc Zyngier } 974eb78192bSMarc Zyngier 975c48ed51cSMarc Zyngier /* 976c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 977c48ed51cSMarc Zyngier */ 978c48ed51cSMarc Zyngier 979c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 980c48ed51cSMarc Zyngier { 981c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 982591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 983c48ed51cSMarc Zyngier } 984c48ed51cSMarc Zyngier 985015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 986c48ed51cSMarc Zyngier { 987015ec038SMarc Zyngier irq_hw_number_t hwirq; 988adcdb94eSMarc Zyngier struct page *prop_page; 989adcdb94eSMarc Zyngier u8 *cfg; 990c48ed51cSMarc Zyngier 991015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 992015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 993015ec038SMarc Zyngier u32 event = its_get_event_id(d); 994015ec038SMarc Zyngier 995015ec038SMarc Zyngier prop_page = its_dev->event_map.vm->vprop_page; 996015ec038SMarc Zyngier hwirq = its_dev->event_map.vlpi_maps[event].vintid; 997015ec038SMarc Zyngier } else { 998adcdb94eSMarc Zyngier prop_page = gic_rdists->prop_page; 999015ec038SMarc Zyngier hwirq = d->hwirq; 1000015ec038SMarc Zyngier } 1001adcdb94eSMarc Zyngier 1002adcdb94eSMarc Zyngier cfg = page_address(prop_page) + hwirq - 8192; 1003adcdb94eSMarc Zyngier *cfg &= ~clr; 1004015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1005c48ed51cSMarc Zyngier 1006c48ed51cSMarc Zyngier /* 1007c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1008c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1009c48ed51cSMarc Zyngier * Humpf... 1010c48ed51cSMarc Zyngier */ 1011c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1012328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1013c48ed51cSMarc Zyngier else 1014c48ed51cSMarc Zyngier dsb(ishst); 1015015ec038SMarc Zyngier } 1016015ec038SMarc Zyngier 1017015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1018015ec038SMarc Zyngier { 1019015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1020015ec038SMarc Zyngier 1021015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1022adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 1023c48ed51cSMarc Zyngier } 1024c48ed51cSMarc Zyngier 1025015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1026015ec038SMarc Zyngier { 1027015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1028015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1029015ec038SMarc Zyngier 1030015ec038SMarc Zyngier if (its_dev->event_map.vlpi_maps[event].db_enabled == enable) 1031015ec038SMarc Zyngier return; 1032015ec038SMarc Zyngier 1033015ec038SMarc Zyngier its_dev->event_map.vlpi_maps[event].db_enabled = enable; 1034015ec038SMarc Zyngier 1035015ec038SMarc Zyngier /* 1036015ec038SMarc Zyngier * More fun with the architecture: 1037015ec038SMarc Zyngier * 1038015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1039015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1040015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1041015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1042015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1043015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1044015ec038SMarc Zyngier */ 1045015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1046c48ed51cSMarc Zyngier } 1047c48ed51cSMarc Zyngier 1048c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1049c48ed51cSMarc Zyngier { 1050015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1051015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1052015ec038SMarc Zyngier 1053adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1054c48ed51cSMarc Zyngier } 1055c48ed51cSMarc Zyngier 1056c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1057c48ed51cSMarc Zyngier { 1058015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1059015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1060015ec038SMarc Zyngier 1061adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1062c48ed51cSMarc Zyngier } 1063c48ed51cSMarc Zyngier 1064c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1065c48ed51cSMarc Zyngier bool force) 1066c48ed51cSMarc Zyngier { 1067fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1068fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1069c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1070c48ed51cSMarc Zyngier struct its_collection *target_col; 1071c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1072c48ed51cSMarc Zyngier 1073015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1074015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1075015ec038SMarc Zyngier return -EINVAL; 1076015ec038SMarc Zyngier 1077fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1078fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1079fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1080fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1081fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1082fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1083fbf8f40eSGanapatrao Kulkarni } 1084fbf8f40eSGanapatrao Kulkarni } 1085fbf8f40eSGanapatrao Kulkarni 1086fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1087fbf8f40eSGanapatrao Kulkarni 1088c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1089c48ed51cSMarc Zyngier return -EINVAL; 1090c48ed51cSMarc Zyngier 10918b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 10928b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1093c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1094c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1095591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 10960d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 10978b8d94a7SMaJun } 1098c48ed51cSMarc Zyngier 1099c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1100c48ed51cSMarc Zyngier } 1101c48ed51cSMarc Zyngier 1102b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1103b48ac83dSMarc Zyngier { 1104b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1105b48ac83dSMarc Zyngier struct its_node *its; 1106b48ac83dSMarc Zyngier u64 addr; 1107b48ac83dSMarc Zyngier 1108b48ac83dSMarc Zyngier its = its_dev->its; 1109b48ac83dSMarc Zyngier addr = its->phys_base + GITS_TRANSLATER; 1110b48ac83dSMarc Zyngier 1111b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1112b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1113b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 111444bb7e24SRobin Murphy 111544bb7e24SRobin Murphy iommu_dma_map_msi_msg(d->irq, msg); 1116b48ac83dSMarc Zyngier } 1117b48ac83dSMarc Zyngier 11188d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 11198d85dcedSMarc Zyngier enum irqchip_irq_state which, 11208d85dcedSMarc Zyngier bool state) 11218d85dcedSMarc Zyngier { 11228d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 11238d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 11248d85dcedSMarc Zyngier 11258d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 11268d85dcedSMarc Zyngier return -EINVAL; 11278d85dcedSMarc Zyngier 11288d85dcedSMarc Zyngier if (state) 11298d85dcedSMarc Zyngier its_send_int(its_dev, event); 11308d85dcedSMarc Zyngier else 11318d85dcedSMarc Zyngier its_send_clear(its_dev, event); 11328d85dcedSMarc Zyngier 11338d85dcedSMarc Zyngier return 0; 11348d85dcedSMarc Zyngier } 11358d85dcedSMarc Zyngier 1136d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1137d011e4e6SMarc Zyngier { 1138d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1139d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1140d011e4e6SMarc Zyngier int ret = 0; 1141d011e4e6SMarc Zyngier 1142d011e4e6SMarc Zyngier if (!info->map) 1143d011e4e6SMarc Zyngier return -EINVAL; 1144d011e4e6SMarc Zyngier 1145d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1146d011e4e6SMarc Zyngier 1147d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1148d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1149d011e4e6SMarc Zyngier 1150d011e4e6SMarc Zyngier maps = kzalloc(sizeof(*maps) * its_dev->event_map.nr_lpis, 1151d011e4e6SMarc Zyngier GFP_KERNEL); 1152d011e4e6SMarc Zyngier if (!maps) { 1153d011e4e6SMarc Zyngier ret = -ENOMEM; 1154d011e4e6SMarc Zyngier goto out; 1155d011e4e6SMarc Zyngier } 1156d011e4e6SMarc Zyngier 1157d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1158d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1159d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1160d011e4e6SMarc Zyngier ret = -EINVAL; 1161d011e4e6SMarc Zyngier goto out; 1162d011e4e6SMarc Zyngier } 1163d011e4e6SMarc Zyngier 1164d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1165d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1166d011e4e6SMarc Zyngier 1167d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1168d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1169d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1170d011e4e6SMarc Zyngier } else { 1171d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1172d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1173d011e4e6SMarc Zyngier 1174d011e4e6SMarc Zyngier /* and install the virtual one */ 1175d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1176d011e4e6SMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1177d011e4e6SMarc Zyngier 1178d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1179d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1180d011e4e6SMarc Zyngier } 1181d011e4e6SMarc Zyngier 1182d011e4e6SMarc Zyngier out: 1183d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1184d011e4e6SMarc Zyngier return ret; 1185d011e4e6SMarc Zyngier } 1186d011e4e6SMarc Zyngier 1187d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1188d011e4e6SMarc Zyngier { 1189d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1190d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1191d011e4e6SMarc Zyngier int ret = 0; 1192d011e4e6SMarc Zyngier 1193d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1194d011e4e6SMarc Zyngier 1195d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || 1196d011e4e6SMarc Zyngier !its_dev->event_map.vlpi_maps[event].vm) { 1197d011e4e6SMarc Zyngier ret = -EINVAL; 1198d011e4e6SMarc Zyngier goto out; 1199d011e4e6SMarc Zyngier } 1200d011e4e6SMarc Zyngier 1201d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1202d011e4e6SMarc Zyngier *info->map = its_dev->event_map.vlpi_maps[event]; 1203d011e4e6SMarc Zyngier 1204d011e4e6SMarc Zyngier out: 1205d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1206d011e4e6SMarc Zyngier return ret; 1207d011e4e6SMarc Zyngier } 1208d011e4e6SMarc Zyngier 1209d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1210d011e4e6SMarc Zyngier { 1211d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1212d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1213d011e4e6SMarc Zyngier int ret = 0; 1214d011e4e6SMarc Zyngier 1215d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1216d011e4e6SMarc Zyngier 1217d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1218d011e4e6SMarc Zyngier ret = -EINVAL; 1219d011e4e6SMarc Zyngier goto out; 1220d011e4e6SMarc Zyngier } 1221d011e4e6SMarc Zyngier 1222d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1223d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1224d011e4e6SMarc Zyngier 1225d011e4e6SMarc Zyngier /* and restore the physical one */ 1226d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1227d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1228d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1229d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1230d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1231d011e4e6SMarc Zyngier 1232d011e4e6SMarc Zyngier /* 1233d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1234d011e4e6SMarc Zyngier * this was the last VLPI. 1235d011e4e6SMarc Zyngier */ 1236d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1237d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1238d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1239d011e4e6SMarc Zyngier } 1240d011e4e6SMarc Zyngier 1241d011e4e6SMarc Zyngier out: 1242d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1243d011e4e6SMarc Zyngier return ret; 1244d011e4e6SMarc Zyngier } 1245d011e4e6SMarc Zyngier 1246015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1247015ec038SMarc Zyngier { 1248015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1249015ec038SMarc Zyngier 1250015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1251015ec038SMarc Zyngier return -EINVAL; 1252015ec038SMarc Zyngier 1253015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1254015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1255015ec038SMarc Zyngier else 1256015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1257015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1258015ec038SMarc Zyngier 1259015ec038SMarc Zyngier return 0; 1260015ec038SMarc Zyngier } 1261015ec038SMarc Zyngier 1262c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1263c808eea8SMarc Zyngier { 1264c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1265c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1266c808eea8SMarc Zyngier 1267c808eea8SMarc Zyngier /* Need a v4 ITS */ 1268d011e4e6SMarc Zyngier if (!its_dev->its->is_v4) 1269c808eea8SMarc Zyngier return -EINVAL; 1270c808eea8SMarc Zyngier 1271d011e4e6SMarc Zyngier /* Unmap request? */ 1272d011e4e6SMarc Zyngier if (!info) 1273d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1274d011e4e6SMarc Zyngier 1275c808eea8SMarc Zyngier switch (info->cmd_type) { 1276c808eea8SMarc Zyngier case MAP_VLPI: 1277d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1278c808eea8SMarc Zyngier 1279c808eea8SMarc Zyngier case GET_VLPI: 1280d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1281c808eea8SMarc Zyngier 1282c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1283c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1284015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1285c808eea8SMarc Zyngier 1286c808eea8SMarc Zyngier default: 1287c808eea8SMarc Zyngier return -EINVAL; 1288c808eea8SMarc Zyngier } 1289c808eea8SMarc Zyngier } 1290c808eea8SMarc Zyngier 1291c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1292c48ed51cSMarc Zyngier .name = "ITS", 1293c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1294c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1295004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1296c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1297b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 12988d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1299c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1300b48ac83dSMarc Zyngier }; 1301b48ac83dSMarc Zyngier 1302bf9529f8SMarc Zyngier /* 1303bf9529f8SMarc Zyngier * How we allocate LPIs: 1304bf9529f8SMarc Zyngier * 1305bf9529f8SMarc Zyngier * The GIC has id_bits bits for interrupt identifiers. From there, we 1306bf9529f8SMarc Zyngier * must subtract 8192 which are reserved for SGIs/PPIs/SPIs. Then, as 1307bf9529f8SMarc Zyngier * we allocate LPIs by chunks of 32, we can shift the whole thing by 5 1308bf9529f8SMarc Zyngier * bits to the right. 1309bf9529f8SMarc Zyngier * 1310bf9529f8SMarc Zyngier * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations. 1311bf9529f8SMarc Zyngier */ 1312bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK_SHIFT 5 1313bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK (1 << IRQS_PER_CHUNK_SHIFT) 13146c31e123SShanker Donthineni #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1315bf9529f8SMarc Zyngier 1316bf9529f8SMarc Zyngier static unsigned long *lpi_bitmap; 1317bf9529f8SMarc Zyngier static u32 lpi_chunks; 1318bf9529f8SMarc Zyngier static DEFINE_SPINLOCK(lpi_lock); 1319bf9529f8SMarc Zyngier 1320bf9529f8SMarc Zyngier static int its_lpi_to_chunk(int lpi) 1321bf9529f8SMarc Zyngier { 1322bf9529f8SMarc Zyngier return (lpi - 8192) >> IRQS_PER_CHUNK_SHIFT; 1323bf9529f8SMarc Zyngier } 1324bf9529f8SMarc Zyngier 1325bf9529f8SMarc Zyngier static int its_chunk_to_lpi(int chunk) 1326bf9529f8SMarc Zyngier { 1327bf9529f8SMarc Zyngier return (chunk << IRQS_PER_CHUNK_SHIFT) + 8192; 1328bf9529f8SMarc Zyngier } 1329bf9529f8SMarc Zyngier 133004a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1331bf9529f8SMarc Zyngier { 1332bf9529f8SMarc Zyngier lpi_chunks = its_lpi_to_chunk(1UL << id_bits); 1333bf9529f8SMarc Zyngier 1334bf9529f8SMarc Zyngier lpi_bitmap = kzalloc(BITS_TO_LONGS(lpi_chunks) * sizeof(long), 1335bf9529f8SMarc Zyngier GFP_KERNEL); 1336bf9529f8SMarc Zyngier if (!lpi_bitmap) { 1337bf9529f8SMarc Zyngier lpi_chunks = 0; 1338bf9529f8SMarc Zyngier return -ENOMEM; 1339bf9529f8SMarc Zyngier } 1340bf9529f8SMarc Zyngier 1341bf9529f8SMarc Zyngier pr_info("ITS: Allocated %d chunks for LPIs\n", (int)lpi_chunks); 1342bf9529f8SMarc Zyngier return 0; 1343bf9529f8SMarc Zyngier } 1344bf9529f8SMarc Zyngier 1345bf9529f8SMarc Zyngier static unsigned long *its_lpi_alloc_chunks(int nr_irqs, int *base, int *nr_ids) 1346bf9529f8SMarc Zyngier { 1347bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1348bf9529f8SMarc Zyngier int chunk_id; 1349bf9529f8SMarc Zyngier int nr_chunks; 1350bf9529f8SMarc Zyngier int i; 1351bf9529f8SMarc Zyngier 1352bf9529f8SMarc Zyngier nr_chunks = DIV_ROUND_UP(nr_irqs, IRQS_PER_CHUNK); 1353bf9529f8SMarc Zyngier 1354bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 1355bf9529f8SMarc Zyngier 1356bf9529f8SMarc Zyngier do { 1357bf9529f8SMarc Zyngier chunk_id = bitmap_find_next_zero_area(lpi_bitmap, lpi_chunks, 1358bf9529f8SMarc Zyngier 0, nr_chunks, 0); 1359bf9529f8SMarc Zyngier if (chunk_id < lpi_chunks) 1360bf9529f8SMarc Zyngier break; 1361bf9529f8SMarc Zyngier 1362bf9529f8SMarc Zyngier nr_chunks--; 1363bf9529f8SMarc Zyngier } while (nr_chunks > 0); 1364bf9529f8SMarc Zyngier 1365bf9529f8SMarc Zyngier if (!nr_chunks) 1366bf9529f8SMarc Zyngier goto out; 1367bf9529f8SMarc Zyngier 1368bf9529f8SMarc Zyngier bitmap = kzalloc(BITS_TO_LONGS(nr_chunks * IRQS_PER_CHUNK) * sizeof (long), 1369bf9529f8SMarc Zyngier GFP_ATOMIC); 1370bf9529f8SMarc Zyngier if (!bitmap) 1371bf9529f8SMarc Zyngier goto out; 1372bf9529f8SMarc Zyngier 1373bf9529f8SMarc Zyngier for (i = 0; i < nr_chunks; i++) 1374bf9529f8SMarc Zyngier set_bit(chunk_id + i, lpi_bitmap); 1375bf9529f8SMarc Zyngier 1376bf9529f8SMarc Zyngier *base = its_chunk_to_lpi(chunk_id); 1377bf9529f8SMarc Zyngier *nr_ids = nr_chunks * IRQS_PER_CHUNK; 1378bf9529f8SMarc Zyngier 1379bf9529f8SMarc Zyngier out: 1380bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 1381bf9529f8SMarc Zyngier 1382c8415b94SMarc Zyngier if (!bitmap) 1383c8415b94SMarc Zyngier *base = *nr_ids = 0; 1384c8415b94SMarc Zyngier 1385bf9529f8SMarc Zyngier return bitmap; 1386bf9529f8SMarc Zyngier } 1387bf9529f8SMarc Zyngier 1388cf2be8baSMarc Zyngier static void its_lpi_free_chunks(unsigned long *bitmap, int base, int nr_ids) 1389bf9529f8SMarc Zyngier { 1390bf9529f8SMarc Zyngier int lpi; 1391bf9529f8SMarc Zyngier 1392bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 1393bf9529f8SMarc Zyngier 1394bf9529f8SMarc Zyngier for (lpi = base; lpi < (base + nr_ids); lpi += IRQS_PER_CHUNK) { 1395bf9529f8SMarc Zyngier int chunk = its_lpi_to_chunk(lpi); 1396cf2be8baSMarc Zyngier 1397bf9529f8SMarc Zyngier BUG_ON(chunk > lpi_chunks); 1398bf9529f8SMarc Zyngier if (test_bit(chunk, lpi_bitmap)) { 1399bf9529f8SMarc Zyngier clear_bit(chunk, lpi_bitmap); 1400bf9529f8SMarc Zyngier } else { 1401bf9529f8SMarc Zyngier pr_err("Bad LPI chunk %d\n", chunk); 1402bf9529f8SMarc Zyngier } 1403bf9529f8SMarc Zyngier } 1404bf9529f8SMarc Zyngier 1405bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 1406bf9529f8SMarc Zyngier 1407cf2be8baSMarc Zyngier kfree(bitmap); 1408bf9529f8SMarc Zyngier } 14091ac19ca6SMarc Zyngier 14100e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 14110e5ccf91SMarc Zyngier { 14120e5ccf91SMarc Zyngier struct page *prop_page; 14131ac19ca6SMarc Zyngier 14140e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 14150e5ccf91SMarc Zyngier if (!prop_page) 14160e5ccf91SMarc Zyngier return NULL; 14170e5ccf91SMarc Zyngier 14180e5ccf91SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 14190e5ccf91SMarc Zyngier memset(page_address(prop_page), 14200e5ccf91SMarc Zyngier LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, 14210e5ccf91SMarc Zyngier LPI_PROPBASE_SZ); 14220e5ccf91SMarc Zyngier 14230e5ccf91SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 14240e5ccf91SMarc Zyngier gic_flush_dcache_to_poc(page_address(prop_page), LPI_PROPBASE_SZ); 14250e5ccf91SMarc Zyngier 14260e5ccf91SMarc Zyngier return prop_page; 14270e5ccf91SMarc Zyngier } 14280e5ccf91SMarc Zyngier 14297d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 14307d75bbb4SMarc Zyngier { 14317d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 14327d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 14337d75bbb4SMarc Zyngier } 14341ac19ca6SMarc Zyngier 14351ac19ca6SMarc Zyngier static int __init its_alloc_lpi_tables(void) 14361ac19ca6SMarc Zyngier { 14371ac19ca6SMarc Zyngier phys_addr_t paddr; 14381ac19ca6SMarc Zyngier 14396c31e123SShanker Donthineni lpi_id_bits = min_t(u32, gic_rdists->id_bits, ITS_MAX_LPI_NRBITS); 14400e5ccf91SMarc Zyngier gic_rdists->prop_page = its_allocate_prop_table(GFP_NOWAIT); 14411ac19ca6SMarc Zyngier if (!gic_rdists->prop_page) { 14421ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 14431ac19ca6SMarc Zyngier return -ENOMEM; 14441ac19ca6SMarc Zyngier } 14451ac19ca6SMarc Zyngier 14461ac19ca6SMarc Zyngier paddr = page_to_phys(gic_rdists->prop_page); 14471ac19ca6SMarc Zyngier pr_info("GIC: using LPI property table @%pa\n", &paddr); 14481ac19ca6SMarc Zyngier 14496c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 14501ac19ca6SMarc Zyngier } 14511ac19ca6SMarc Zyngier 14521ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 14531ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 14541ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 14554f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 14561ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 14571ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 14581ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 14591ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 14601ac19ca6SMarc Zyngier }; 14611ac19ca6SMarc Zyngier 14622d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 14632d81d425SShanker Donthineni { 14642d81d425SShanker Donthineni u32 idx = baser - its->tables; 14652d81d425SShanker Donthineni 14660968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 14672d81d425SShanker Donthineni } 14682d81d425SShanker Donthineni 14692d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 14702d81d425SShanker Donthineni u64 val) 14712d81d425SShanker Donthineni { 14722d81d425SShanker Donthineni u32 idx = baser - its->tables; 14732d81d425SShanker Donthineni 14740968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 14752d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 14762d81d425SShanker Donthineni } 14772d81d425SShanker Donthineni 14789347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 14793faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 14803faf24eaSShanker Donthineni bool indirect) 14819347359aSShanker Donthineni { 14829347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 14839347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 14849347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 148530ae9610SShanker Donthineni u64 baser_phys, tmp; 14869347359aSShanker Donthineni u32 alloc_pages; 14879347359aSShanker Donthineni void *base; 14889347359aSShanker Donthineni 14899347359aSShanker Donthineni retry_alloc_baser: 14909347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 14919347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 14929347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 14939347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 14949347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 14959347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 14969347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 14979347359aSShanker Donthineni } 14989347359aSShanker Donthineni 14999347359aSShanker Donthineni base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 15009347359aSShanker Donthineni if (!base) 15019347359aSShanker Donthineni return -ENOMEM; 15029347359aSShanker Donthineni 150330ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 150430ae9610SShanker Donthineni 150530ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 150630ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 150730ae9610SShanker Donthineni 150830ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 150930ae9610SShanker Donthineni if (psz != SZ_64K) { 151030ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 151130ae9610SShanker Donthineni free_pages((unsigned long)base, order); 151230ae9610SShanker Donthineni return -ENXIO; 151330ae9610SShanker Donthineni } 151430ae9610SShanker Donthineni 151530ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 151630ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 151730ae9610SShanker Donthineni } 151830ae9610SShanker Donthineni 15199347359aSShanker Donthineni retry_baser: 152030ae9610SShanker Donthineni val = (baser_phys | 15219347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 15229347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 15239347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 15249347359aSShanker Donthineni cache | 15259347359aSShanker Donthineni shr | 15269347359aSShanker Donthineni GITS_BASER_VALID); 15279347359aSShanker Donthineni 15283faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 15293faf24eaSShanker Donthineni 15309347359aSShanker Donthineni switch (psz) { 15319347359aSShanker Donthineni case SZ_4K: 15329347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 15339347359aSShanker Donthineni break; 15349347359aSShanker Donthineni case SZ_16K: 15359347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 15369347359aSShanker Donthineni break; 15379347359aSShanker Donthineni case SZ_64K: 15389347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 15399347359aSShanker Donthineni break; 15409347359aSShanker Donthineni } 15419347359aSShanker Donthineni 15429347359aSShanker Donthineni its_write_baser(its, baser, val); 15439347359aSShanker Donthineni tmp = baser->val; 15449347359aSShanker Donthineni 15459347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 15469347359aSShanker Donthineni /* 15479347359aSShanker Donthineni * Shareability didn't stick. Just use 15489347359aSShanker Donthineni * whatever the read reported, which is likely 15499347359aSShanker Donthineni * to be the only thing this redistributor 15509347359aSShanker Donthineni * supports. If that's zero, make it 15519347359aSShanker Donthineni * non-cacheable as well. 15529347359aSShanker Donthineni */ 15539347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 15549347359aSShanker Donthineni if (!shr) { 15559347359aSShanker Donthineni cache = GITS_BASER_nC; 1556328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 15579347359aSShanker Donthineni } 15589347359aSShanker Donthineni goto retry_baser; 15599347359aSShanker Donthineni } 15609347359aSShanker Donthineni 15619347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 15629347359aSShanker Donthineni /* 15639347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 15649347359aSShanker Donthineni * size and retry. If we reach 4K, then 15659347359aSShanker Donthineni * something is horribly wrong... 15669347359aSShanker Donthineni */ 15679347359aSShanker Donthineni free_pages((unsigned long)base, order); 15689347359aSShanker Donthineni baser->base = NULL; 15699347359aSShanker Donthineni 15709347359aSShanker Donthineni switch (psz) { 15719347359aSShanker Donthineni case SZ_16K: 15729347359aSShanker Donthineni psz = SZ_4K; 15739347359aSShanker Donthineni goto retry_alloc_baser; 15749347359aSShanker Donthineni case SZ_64K: 15759347359aSShanker Donthineni psz = SZ_16K; 15769347359aSShanker Donthineni goto retry_alloc_baser; 15779347359aSShanker Donthineni } 15789347359aSShanker Donthineni } 15799347359aSShanker Donthineni 15809347359aSShanker Donthineni if (val != tmp) { 1581b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 15829347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1583b11283ebSVladimir Murzin val, tmp); 15849347359aSShanker Donthineni free_pages((unsigned long)base, order); 15859347359aSShanker Donthineni return -ENXIO; 15869347359aSShanker Donthineni } 15879347359aSShanker Donthineni 15889347359aSShanker Donthineni baser->order = order; 15899347359aSShanker Donthineni baser->base = base; 15909347359aSShanker Donthineni baser->psz = psz; 15913faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 15929347359aSShanker Donthineni 15933faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1594d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 15959347359aSShanker Donthineni its_base_type_string[type], 15969347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 15973faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 15989347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 15999347359aSShanker Donthineni 16009347359aSShanker Donthineni return 0; 16019347359aSShanker Donthineni } 16029347359aSShanker Donthineni 16034cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 16044cacac57SMarc Zyngier struct its_baser *baser, 160532bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 16064b75c459SShanker Donthineni { 16074cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 16084cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 16094cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 16102fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 16114b75c459SShanker Donthineni u32 new_order = *order; 16123faf24eaSShanker Donthineni bool indirect = false; 16133faf24eaSShanker Donthineni 16143faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 16153faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 16163faf24eaSShanker Donthineni /* 16173faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 16183faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 16193faf24eaSShanker Donthineni */ 16203faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 16213faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 16223faf24eaSShanker Donthineni 16233faf24eaSShanker Donthineni if (indirect) { 16243faf24eaSShanker Donthineni /* 16253faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 16263faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 16273faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 16283faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 16293faf24eaSShanker Donthineni * entry size. 16303faf24eaSShanker Donthineni */ 1631d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 16323faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 16333faf24eaSShanker Donthineni } 16343faf24eaSShanker Donthineni } 16354b75c459SShanker Donthineni 16364b75c459SShanker Donthineni /* 16374b75c459SShanker Donthineni * Allocate as many entries as required to fit the 16384b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 16394b75c459SShanker Donthineni * space being incredibly sparse, this results in a 16403faf24eaSShanker Donthineni * massive waste of memory if two-level device table 16413faf24eaSShanker Donthineni * feature is not supported by hardware. 16424b75c459SShanker Donthineni */ 16434b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 16444b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 16454b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1646d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 16474cacac57SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %u->%u\n", 16484cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 16494cacac57SMarc Zyngier its->device_ids, ids); 16504b75c459SShanker Donthineni } 16514b75c459SShanker Donthineni 16524b75c459SShanker Donthineni *order = new_order; 16533faf24eaSShanker Donthineni 16543faf24eaSShanker Donthineni return indirect; 16554b75c459SShanker Donthineni } 16564b75c459SShanker Donthineni 16571ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 16581ac19ca6SMarc Zyngier { 16591ac19ca6SMarc Zyngier int i; 16601ac19ca6SMarc Zyngier 16611ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 16621a485f4dSShanker Donthineni if (its->tables[i].base) { 16631a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 16641a485f4dSShanker Donthineni its->tables[i].order); 16651a485f4dSShanker Donthineni its->tables[i].base = NULL; 16661ac19ca6SMarc Zyngier } 16671ac19ca6SMarc Zyngier } 16681ac19ca6SMarc Zyngier } 16691ac19ca6SMarc Zyngier 16700e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 16711ac19ca6SMarc Zyngier { 1672589ce5f4SMarc Zyngier u64 typer = gic_read_typer(its->base + GITS_TYPER); 16739347359aSShanker Donthineni u32 ids = GITS_TYPER_DEVBITS(typer); 16741ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 16752fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 16769347359aSShanker Donthineni u32 psz = SZ_64K; 16779347359aSShanker Donthineni int err, i; 167894100970SRobert Richter 167994100970SRobert Richter if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) { 168094100970SRobert Richter /* 168194100970SRobert Richter * erratum 22375: only alloc 8MB table size 168294100970SRobert Richter * erratum 24313: ignore memory access type 168394100970SRobert Richter */ 16849347359aSShanker Donthineni cache = GITS_BASER_nCnB; 168594100970SRobert Richter ids = 0x14; /* 20 bits, 8MB */ 168694100970SRobert Richter } 16871ac19ca6SMarc Zyngier 1688466b7d16SShanker Donthineni its->device_ids = ids; 1689466b7d16SShanker Donthineni 16901ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 16912d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 16922d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 16931ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 16949347359aSShanker Donthineni u32 order = get_order(psz); 16953faf24eaSShanker Donthineni bool indirect = false; 16961ac19ca6SMarc Zyngier 16974cacac57SMarc Zyngier switch (type) { 16984cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 16991ac19ca6SMarc Zyngier continue; 17001ac19ca6SMarc Zyngier 17014cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 170232bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 170332bd44dcSShanker Donthineni psz, &order, 170432bd44dcSShanker Donthineni its->device_ids); 17054cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 17064cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 170732bd44dcSShanker Donthineni psz, &order, 170832bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 17094cacac57SMarc Zyngier break; 17104cacac57SMarc Zyngier } 1711f54b97edSMarc Zyngier 17123faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 17139347359aSShanker Donthineni if (err < 0) { 17149347359aSShanker Donthineni its_free_tables(its); 17159347359aSShanker Donthineni return err; 171630f21363SRobert Richter } 171730f21363SRobert Richter 17189347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 17199347359aSShanker Donthineni psz = baser->psz; 17209347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 17219347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 17221ac19ca6SMarc Zyngier } 17231ac19ca6SMarc Zyngier 17241ac19ca6SMarc Zyngier return 0; 17251ac19ca6SMarc Zyngier } 17261ac19ca6SMarc Zyngier 17271ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 17281ac19ca6SMarc Zyngier { 17291ac19ca6SMarc Zyngier its->collections = kzalloc(nr_cpu_ids * sizeof(*its->collections), 17301ac19ca6SMarc Zyngier GFP_KERNEL); 17311ac19ca6SMarc Zyngier if (!its->collections) 17321ac19ca6SMarc Zyngier return -ENOMEM; 17331ac19ca6SMarc Zyngier 17341ac19ca6SMarc Zyngier return 0; 17351ac19ca6SMarc Zyngier } 17361ac19ca6SMarc Zyngier 17377c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 17387c297a2dSMarc Zyngier { 17397c297a2dSMarc Zyngier struct page *pend_page; 17407c297a2dSMarc Zyngier /* 17417c297a2dSMarc Zyngier * The pending pages have to be at least 64kB aligned, 17427c297a2dSMarc Zyngier * hence the 'max(LPI_PENDBASE_SZ, SZ_64K)' below. 17437c297a2dSMarc Zyngier */ 17447c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 17457c297a2dSMarc Zyngier get_order(max_t(u32, LPI_PENDBASE_SZ, SZ_64K))); 17467c297a2dSMarc Zyngier if (!pend_page) 17477c297a2dSMarc Zyngier return NULL; 17487c297a2dSMarc Zyngier 17497c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 17507c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 17517c297a2dSMarc Zyngier 17527c297a2dSMarc Zyngier return pend_page; 17537c297a2dSMarc Zyngier } 17547c297a2dSMarc Zyngier 17557d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 17567d75bbb4SMarc Zyngier { 17577d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(pt), 17587d75bbb4SMarc Zyngier get_order(max_t(u32, LPI_PENDBASE_SZ, SZ_64K))); 17597d75bbb4SMarc Zyngier } 17607d75bbb4SMarc Zyngier 17611ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 17621ac19ca6SMarc Zyngier { 17631ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 17641ac19ca6SMarc Zyngier struct page *pend_page; 17651ac19ca6SMarc Zyngier u64 val, tmp; 17661ac19ca6SMarc Zyngier 17671ac19ca6SMarc Zyngier /* If we didn't allocate the pending table yet, do it now */ 17681ac19ca6SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 17691ac19ca6SMarc Zyngier if (!pend_page) { 17701ac19ca6SMarc Zyngier phys_addr_t paddr; 17717c297a2dSMarc Zyngier 17727c297a2dSMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 17731ac19ca6SMarc Zyngier if (!pend_page) { 17741ac19ca6SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", 17751ac19ca6SMarc Zyngier smp_processor_id()); 17761ac19ca6SMarc Zyngier return; 17771ac19ca6SMarc Zyngier } 17781ac19ca6SMarc Zyngier 17791ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 17801ac19ca6SMarc Zyngier pr_info("CPU%d: using LPI pending table @%pa\n", 17811ac19ca6SMarc Zyngier smp_processor_id(), &paddr); 17821ac19ca6SMarc Zyngier gic_data_rdist()->pend_page = pend_page; 17831ac19ca6SMarc Zyngier } 17841ac19ca6SMarc Zyngier 17851ac19ca6SMarc Zyngier /* Disable LPIs */ 17861ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 17871ac19ca6SMarc Zyngier val &= ~GICR_CTLR_ENABLE_LPIS; 17881ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 17891ac19ca6SMarc Zyngier 17901ac19ca6SMarc Zyngier /* 17911ac19ca6SMarc Zyngier * Make sure any change to the table is observable by the GIC. 17921ac19ca6SMarc Zyngier */ 17931ac19ca6SMarc Zyngier dsb(sy); 17941ac19ca6SMarc Zyngier 17951ac19ca6SMarc Zyngier /* set PROPBASE */ 17961ac19ca6SMarc Zyngier val = (page_to_phys(gic_rdists->prop_page) | 17971ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 17982fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 17991ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 18001ac19ca6SMarc Zyngier 18010968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 18020968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 18031ac19ca6SMarc Zyngier 18041ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 1805241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 1806241a386cSMarc Zyngier /* 1807241a386cSMarc Zyngier * The HW reports non-shareable, we must 1808241a386cSMarc Zyngier * remove the cacheability attributes as 1809241a386cSMarc Zyngier * well. 1810241a386cSMarc Zyngier */ 1811241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 1812241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 1813241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 18140968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 1815241a386cSMarc Zyngier } 18161ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 18171ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 18181ac19ca6SMarc Zyngier } 18191ac19ca6SMarc Zyngier 18201ac19ca6SMarc Zyngier /* set PENDBASE */ 18211ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 18224ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 18232fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 18241ac19ca6SMarc Zyngier 18250968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 18260968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 1827241a386cSMarc Zyngier 1828241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 1829241a386cSMarc Zyngier /* 1830241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 1831241a386cSMarc Zyngier * cacheability attributes as well. 1832241a386cSMarc Zyngier */ 1833241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 1834241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 1835241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 18360968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 1837241a386cSMarc Zyngier } 18381ac19ca6SMarc Zyngier 18391ac19ca6SMarc Zyngier /* Enable LPIs */ 18401ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 18411ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 18421ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 18431ac19ca6SMarc Zyngier 18441ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 18451ac19ca6SMarc Zyngier dsb(sy); 18461ac19ca6SMarc Zyngier } 18471ac19ca6SMarc Zyngier 18481ac19ca6SMarc Zyngier static void its_cpu_init_collection(void) 18491ac19ca6SMarc Zyngier { 18501ac19ca6SMarc Zyngier struct its_node *its; 18511ac19ca6SMarc Zyngier int cpu; 18521ac19ca6SMarc Zyngier 18531ac19ca6SMarc Zyngier spin_lock(&its_lock); 18541ac19ca6SMarc Zyngier cpu = smp_processor_id(); 18551ac19ca6SMarc Zyngier 18561ac19ca6SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 18571ac19ca6SMarc Zyngier u64 target; 18581ac19ca6SMarc Zyngier 1859fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 1860fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1861fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 1862fbf8f40eSGanapatrao Kulkarni 1863fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 1864fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 1865fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 1866fbf8f40eSGanapatrao Kulkarni continue; 1867fbf8f40eSGanapatrao Kulkarni } 1868fbf8f40eSGanapatrao Kulkarni 18691ac19ca6SMarc Zyngier /* 18701ac19ca6SMarc Zyngier * We now have to bind each collection to its target 18711ac19ca6SMarc Zyngier * redistributor. 18721ac19ca6SMarc Zyngier */ 1873589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 18741ac19ca6SMarc Zyngier /* 18751ac19ca6SMarc Zyngier * This ITS wants the physical address of the 18761ac19ca6SMarc Zyngier * redistributor. 18771ac19ca6SMarc Zyngier */ 18781ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 18791ac19ca6SMarc Zyngier } else { 18801ac19ca6SMarc Zyngier /* 18811ac19ca6SMarc Zyngier * This ITS wants a linear CPU number. 18821ac19ca6SMarc Zyngier */ 1883589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 1884263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 18851ac19ca6SMarc Zyngier } 18861ac19ca6SMarc Zyngier 18871ac19ca6SMarc Zyngier /* Perform collection mapping */ 18881ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 18891ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 18901ac19ca6SMarc Zyngier 18911ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 18921ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 18931ac19ca6SMarc Zyngier } 18941ac19ca6SMarc Zyngier 18951ac19ca6SMarc Zyngier spin_unlock(&its_lock); 18961ac19ca6SMarc Zyngier } 189784a6a2e7SMarc Zyngier 189884a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 189984a6a2e7SMarc Zyngier { 190084a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 19013e39e8f5SMarc Zyngier unsigned long flags; 190284a6a2e7SMarc Zyngier 19033e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 190484a6a2e7SMarc Zyngier 190584a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 190684a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 190784a6a2e7SMarc Zyngier its_dev = tmp; 190884a6a2e7SMarc Zyngier break; 190984a6a2e7SMarc Zyngier } 191084a6a2e7SMarc Zyngier } 191184a6a2e7SMarc Zyngier 19123e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 191384a6a2e7SMarc Zyngier 191484a6a2e7SMarc Zyngier return its_dev; 191584a6a2e7SMarc Zyngier } 191684a6a2e7SMarc Zyngier 1917466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 1918466b7d16SShanker Donthineni { 1919466b7d16SShanker Donthineni int i; 1920466b7d16SShanker Donthineni 1921466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 1922466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 1923466b7d16SShanker Donthineni return &its->tables[i]; 1924466b7d16SShanker Donthineni } 1925466b7d16SShanker Donthineni 1926466b7d16SShanker Donthineni return NULL; 1927466b7d16SShanker Donthineni } 1928466b7d16SShanker Donthineni 192970cc81edSMarc Zyngier static bool its_alloc_table_entry(struct its_baser *baser, u32 id) 19303faf24eaSShanker Donthineni { 19313faf24eaSShanker Donthineni struct page *page; 19323faf24eaSShanker Donthineni u32 esz, idx; 19333faf24eaSShanker Donthineni __le64 *table; 19343faf24eaSShanker Donthineni 19353faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 19363faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 19373faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 193870cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 19393faf24eaSShanker Donthineni 19403faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 194170cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 19423faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 19433faf24eaSShanker Donthineni return false; 19443faf24eaSShanker Donthineni 19453faf24eaSShanker Donthineni table = baser->base; 19463faf24eaSShanker Donthineni 19473faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 19483faf24eaSShanker Donthineni if (!table[idx]) { 19493faf24eaSShanker Donthineni page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(baser->psz)); 19503faf24eaSShanker Donthineni if (!page) 19513faf24eaSShanker Donthineni return false; 19523faf24eaSShanker Donthineni 19533faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 19543faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 1955328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 19563faf24eaSShanker Donthineni 19573faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 19583faf24eaSShanker Donthineni 19593faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 19603faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 1961328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 19623faf24eaSShanker Donthineni 19633faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 19643faf24eaSShanker Donthineni dsb(sy); 19653faf24eaSShanker Donthineni } 19663faf24eaSShanker Donthineni 19673faf24eaSShanker Donthineni return true; 19683faf24eaSShanker Donthineni } 19693faf24eaSShanker Donthineni 197070cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 197170cc81edSMarc Zyngier { 197270cc81edSMarc Zyngier struct its_baser *baser; 197370cc81edSMarc Zyngier 197470cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 197570cc81edSMarc Zyngier 197670cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 197770cc81edSMarc Zyngier if (!baser) 197870cc81edSMarc Zyngier return (ilog2(dev_id) < its->device_ids); 197970cc81edSMarc Zyngier 198070cc81edSMarc Zyngier return its_alloc_table_entry(baser, dev_id); 198170cc81edSMarc Zyngier } 198270cc81edSMarc Zyngier 19837d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 19847d75bbb4SMarc Zyngier { 19857d75bbb4SMarc Zyngier struct its_node *its; 19867d75bbb4SMarc Zyngier 19877d75bbb4SMarc Zyngier /* 19887d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 19897d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 19907d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 19917d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 19927d75bbb4SMarc Zyngier * anyway, right?). 19937d75bbb4SMarc Zyngier */ 19947d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 19957d75bbb4SMarc Zyngier struct its_baser *baser; 19967d75bbb4SMarc Zyngier 19977d75bbb4SMarc Zyngier if (!its->is_v4) 19987d75bbb4SMarc Zyngier continue; 19997d75bbb4SMarc Zyngier 20007d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 20017d75bbb4SMarc Zyngier if (!baser) 20027d75bbb4SMarc Zyngier return false; 20037d75bbb4SMarc Zyngier 20047d75bbb4SMarc Zyngier if (!its_alloc_table_entry(baser, vpe_id)) 20057d75bbb4SMarc Zyngier return false; 20067d75bbb4SMarc Zyngier } 20077d75bbb4SMarc Zyngier 20087d75bbb4SMarc Zyngier return true; 20097d75bbb4SMarc Zyngier } 20107d75bbb4SMarc Zyngier 201184a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 201293f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 201384a6a2e7SMarc Zyngier { 201484a6a2e7SMarc Zyngier struct its_device *dev; 201593f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 20163e39e8f5SMarc Zyngier unsigned long flags; 2017591e5becSMarc Zyngier u16 *col_map = NULL; 201884a6a2e7SMarc Zyngier void *itt; 201984a6a2e7SMarc Zyngier int lpi_base; 202084a6a2e7SMarc Zyngier int nr_lpis; 2021c8481267SMarc Zyngier int nr_ites; 202284a6a2e7SMarc Zyngier int sz; 202384a6a2e7SMarc Zyngier 20243faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2025466b7d16SShanker Donthineni return NULL; 2026466b7d16SShanker Donthineni 202784a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2028c8481267SMarc Zyngier /* 2029c8481267SMarc Zyngier * At least one bit of EventID is being used, hence a minimum 2030c8481267SMarc Zyngier * of two entries. No, the architecture doesn't let you 2031c8481267SMarc Zyngier * express an ITT with a single entry. 2032c8481267SMarc Zyngier */ 203396555c47SWill Deacon nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 2034c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 203584a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 20366c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 203793f94ea0SMarc Zyngier if (alloc_lpis) { 203884a6a2e7SMarc Zyngier lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 2039591e5becSMarc Zyngier if (lpi_map) 204093f94ea0SMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_lpis, 204193f94ea0SMarc Zyngier GFP_KERNEL); 204293f94ea0SMarc Zyngier } else { 204393f94ea0SMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_ites, GFP_KERNEL); 204493f94ea0SMarc Zyngier nr_lpis = 0; 204593f94ea0SMarc Zyngier lpi_base = 0; 204693f94ea0SMarc Zyngier } 204784a6a2e7SMarc Zyngier 204893f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 204984a6a2e7SMarc Zyngier kfree(dev); 205084a6a2e7SMarc Zyngier kfree(itt); 205184a6a2e7SMarc Zyngier kfree(lpi_map); 2052591e5becSMarc Zyngier kfree(col_map); 205384a6a2e7SMarc Zyngier return NULL; 205484a6a2e7SMarc Zyngier } 205584a6a2e7SMarc Zyngier 2056328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 20575a9a8915SMarc Zyngier 205884a6a2e7SMarc Zyngier dev->its = its; 205984a6a2e7SMarc Zyngier dev->itt = itt; 2060c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2061591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2062591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2063591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2064591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 2065d011e4e6SMarc Zyngier mutex_init(&dev->event_map.vlpi_lock); 206684a6a2e7SMarc Zyngier dev->device_id = dev_id; 206784a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 206884a6a2e7SMarc Zyngier 20693e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 207084a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 20713e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 207284a6a2e7SMarc Zyngier 207384a6a2e7SMarc Zyngier /* Map device to its ITT */ 207484a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 207584a6a2e7SMarc Zyngier 207684a6a2e7SMarc Zyngier return dev; 207784a6a2e7SMarc Zyngier } 207884a6a2e7SMarc Zyngier 207984a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 208084a6a2e7SMarc Zyngier { 20813e39e8f5SMarc Zyngier unsigned long flags; 20823e39e8f5SMarc Zyngier 20833e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 208484a6a2e7SMarc Zyngier list_del(&its_dev->entry); 20853e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 208684a6a2e7SMarc Zyngier kfree(its_dev->itt); 208784a6a2e7SMarc Zyngier kfree(its_dev); 208884a6a2e7SMarc Zyngier } 2089b48ac83dSMarc Zyngier 2090b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 2091b48ac83dSMarc Zyngier { 2092b48ac83dSMarc Zyngier int idx; 2093b48ac83dSMarc Zyngier 2094591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 2095591e5becSMarc Zyngier dev->event_map.nr_lpis); 2096591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 2097b48ac83dSMarc Zyngier return -ENOSPC; 2098b48ac83dSMarc Zyngier 2099591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 2100591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 2101b48ac83dSMarc Zyngier 2102b48ac83dSMarc Zyngier return 0; 2103b48ac83dSMarc Zyngier } 2104b48ac83dSMarc Zyngier 210554456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 2106b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 2107b48ac83dSMarc Zyngier { 2108b48ac83dSMarc Zyngier struct its_node *its; 2109b48ac83dSMarc Zyngier struct its_device *its_dev; 211054456db9SMarc Zyngier struct msi_domain_info *msi_info; 211154456db9SMarc Zyngier u32 dev_id; 2112b48ac83dSMarc Zyngier 211354456db9SMarc Zyngier /* 211454456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 211554456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 211654456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 211754456db9SMarc Zyngier * are built on top of the ITS. 211854456db9SMarc Zyngier */ 211954456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 212054456db9SMarc Zyngier 212154456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 212254456db9SMarc Zyngier its = msi_info->data; 212354456db9SMarc Zyngier 212420b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 212520b3d54eSMarc Zyngier vpe_proxy.dev && 212620b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 212720b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 212820b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 212920b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 213020b3d54eSMarc Zyngier dev_id); 213120b3d54eSMarc Zyngier return -EINVAL; 213220b3d54eSMarc Zyngier } 213320b3d54eSMarc Zyngier 2134f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 2135e8137f4fSMarc Zyngier if (its_dev) { 2136e8137f4fSMarc Zyngier /* 2137e8137f4fSMarc Zyngier * We already have seen this ID, probably through 2138e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 2139e8137f4fSMarc Zyngier * create the device. 2140e8137f4fSMarc Zyngier */ 2141f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 2142e8137f4fSMarc Zyngier goto out; 2143e8137f4fSMarc Zyngier } 2144b48ac83dSMarc Zyngier 214593f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 2146b48ac83dSMarc Zyngier if (!its_dev) 2147b48ac83dSMarc Zyngier return -ENOMEM; 2148b48ac83dSMarc Zyngier 2149f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 2150e8137f4fSMarc Zyngier out: 2151b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 2152b48ac83dSMarc Zyngier return 0; 2153b48ac83dSMarc Zyngier } 2154b48ac83dSMarc Zyngier 215554456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 215654456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 215754456db9SMarc Zyngier }; 215854456db9SMarc Zyngier 2159b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 2160b48ac83dSMarc Zyngier unsigned int virq, 2161b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 2162b48ac83dSMarc Zyngier { 2163f833f57fSMarc Zyngier struct irq_fwspec fwspec; 2164b48ac83dSMarc Zyngier 2165f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 2166f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 2167f833f57fSMarc Zyngier fwspec.param_count = 3; 2168f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 2169f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 2170f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 21713f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 21723f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 21733f010cf1STomasz Nowicki fwspec.param_count = 2; 21743f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 21753f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 2176f833f57fSMarc Zyngier } else { 2177f833f57fSMarc Zyngier return -EINVAL; 2178f833f57fSMarc Zyngier } 2179b48ac83dSMarc Zyngier 2180f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 2181b48ac83dSMarc Zyngier } 2182b48ac83dSMarc Zyngier 2183b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 2184b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 2185b48ac83dSMarc Zyngier { 2186b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 2187b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 2188b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 2189b48ac83dSMarc Zyngier int err; 2190b48ac83dSMarc Zyngier int i; 2191b48ac83dSMarc Zyngier 2192b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2193b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 2194b48ac83dSMarc Zyngier if (err) 2195b48ac83dSMarc Zyngier return err; 2196b48ac83dSMarc Zyngier 2197b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 2198b48ac83dSMarc Zyngier if (err) 2199b48ac83dSMarc Zyngier return err; 2200b48ac83dSMarc Zyngier 2201b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 2202b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 22030d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 2204f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 2205591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 2206591e5becSMarc Zyngier (int) hwirq, virq + i); 2207b48ac83dSMarc Zyngier } 2208b48ac83dSMarc Zyngier 2209b48ac83dSMarc Zyngier return 0; 2210b48ac83dSMarc Zyngier } 2211b48ac83dSMarc Zyngier 2212aca268dfSMarc Zyngier static void its_irq_domain_activate(struct irq_domain *domain, 2213aca268dfSMarc Zyngier struct irq_data *d) 2214aca268dfSMarc Zyngier { 2215aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2216aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2217fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 22180d224d35SMarc Zyngier int cpu; 2219fbf8f40eSGanapatrao Kulkarni 2220fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 2221fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 2222fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 2223aca268dfSMarc Zyngier 2224591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 22250d224d35SMarc Zyngier cpu = cpumask_first(cpu_mask); 22260d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 22270d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 2228591e5becSMarc Zyngier 2229aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 22306a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 2231aca268dfSMarc Zyngier } 2232aca268dfSMarc Zyngier 2233aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 2234aca268dfSMarc Zyngier struct irq_data *d) 2235aca268dfSMarc Zyngier { 2236aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2237aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2238aca268dfSMarc Zyngier 2239aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 2240aca268dfSMarc Zyngier its_send_discard(its_dev, event); 2241aca268dfSMarc Zyngier } 2242aca268dfSMarc Zyngier 2243b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 2244b48ac83dSMarc Zyngier unsigned int nr_irqs) 2245b48ac83dSMarc Zyngier { 2246b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 2247b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2248b48ac83dSMarc Zyngier int i; 2249b48ac83dSMarc Zyngier 2250b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2251b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 2252b48ac83dSMarc Zyngier virq + i); 2253aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 2254b48ac83dSMarc Zyngier 2255b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 2256591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 2257b48ac83dSMarc Zyngier 2258b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 22592da39949SMarc Zyngier irq_domain_reset_irq_data(data); 2260b48ac83dSMarc Zyngier } 2261b48ac83dSMarc Zyngier 2262b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 2263591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 2264591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 2265cf2be8baSMarc Zyngier its_lpi_free_chunks(its_dev->event_map.lpi_map, 2266cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 2267cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 2268cf2be8baSMarc Zyngier kfree(its_dev->event_map.col_map); 2269b48ac83dSMarc Zyngier 2270b48ac83dSMarc Zyngier /* Unmap device/itt */ 2271b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 2272b48ac83dSMarc Zyngier its_free_device(its_dev); 2273b48ac83dSMarc Zyngier } 2274b48ac83dSMarc Zyngier 2275b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 2276b48ac83dSMarc Zyngier } 2277b48ac83dSMarc Zyngier 2278b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 2279b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 2280b48ac83dSMarc Zyngier .free = its_irq_domain_free, 2281aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 2282aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 2283b48ac83dSMarc Zyngier }; 22844c21f3c2SMarc Zyngier 228520b3d54eSMarc Zyngier /* 228620b3d54eSMarc Zyngier * This is insane. 228720b3d54eSMarc Zyngier * 228820b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 228920b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 229020b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 229120b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 229220b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 229320b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 229420b3d54eSMarc Zyngier * 229520b3d54eSMarc Zyngier * Broken by design(tm). 229620b3d54eSMarc Zyngier */ 229720b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 229820b3d54eSMarc Zyngier { 229920b3d54eSMarc Zyngier /* Already unmapped? */ 230020b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 230120b3d54eSMarc Zyngier return; 230220b3d54eSMarc Zyngier 230320b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 230420b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 230520b3d54eSMarc Zyngier 230620b3d54eSMarc Zyngier /* 230720b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 230820b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 230920b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 231020b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 231120b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 231220b3d54eSMarc Zyngier */ 231320b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 231420b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 231520b3d54eSMarc Zyngier 231620b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 231720b3d54eSMarc Zyngier } 231820b3d54eSMarc Zyngier 231920b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 232020b3d54eSMarc Zyngier { 232120b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 232220b3d54eSMarc Zyngier unsigned long flags; 232320b3d54eSMarc Zyngier 232420b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 232520b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 232620b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 232720b3d54eSMarc Zyngier } 232820b3d54eSMarc Zyngier } 232920b3d54eSMarc Zyngier 233020b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 233120b3d54eSMarc Zyngier { 233220b3d54eSMarc Zyngier /* Already mapped? */ 233320b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 233420b3d54eSMarc Zyngier return; 233520b3d54eSMarc Zyngier 233620b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 233720b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 233820b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 233920b3d54eSMarc Zyngier 234020b3d54eSMarc Zyngier /* Map the new VPE instead */ 234120b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 234220b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 234320b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 234420b3d54eSMarc Zyngier 234520b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 234620b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 234720b3d54eSMarc Zyngier } 234820b3d54eSMarc Zyngier 2349958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 2350958b90d1SMarc Zyngier { 2351958b90d1SMarc Zyngier unsigned long flags; 2352958b90d1SMarc Zyngier struct its_collection *target_col; 2353958b90d1SMarc Zyngier 2354958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2355958b90d1SMarc Zyngier void __iomem *rdbase; 2356958b90d1SMarc Zyngier 2357958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 2358958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2359958b90d1SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2360958b90d1SMarc Zyngier cpu_relax(); 2361958b90d1SMarc Zyngier 2362958b90d1SMarc Zyngier return; 2363958b90d1SMarc Zyngier } 2364958b90d1SMarc Zyngier 2365958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 2366958b90d1SMarc Zyngier 2367958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 2368958b90d1SMarc Zyngier 2369958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 2370958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 2371958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 2372958b90d1SMarc Zyngier 2373958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 2374958b90d1SMarc Zyngier } 2375958b90d1SMarc Zyngier 23763171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 23773171a47aSMarc Zyngier const struct cpumask *mask_val, 23783171a47aSMarc Zyngier bool force) 23793171a47aSMarc Zyngier { 23803171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 23813171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 23823171a47aSMarc Zyngier 23833171a47aSMarc Zyngier /* 23843171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 238520b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 2386958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 2387958b90d1SMarc Zyngier * interrupt to its new location. 23883171a47aSMarc Zyngier */ 23893171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 2390958b90d1SMarc Zyngier int from = vpe->col_idx; 2391958b90d1SMarc Zyngier 23923171a47aSMarc Zyngier vpe->col_idx = cpu; 23933171a47aSMarc Zyngier its_send_vmovp(vpe); 2394958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 23953171a47aSMarc Zyngier } 23963171a47aSMarc Zyngier 23973171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 23983171a47aSMarc Zyngier } 23993171a47aSMarc Zyngier 2400e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 2401e643d803SMarc Zyngier { 2402e643d803SMarc Zyngier void * __iomem vlpi_base = gic_data_rdist_vlpi_base(); 2403e643d803SMarc Zyngier u64 val; 2404e643d803SMarc Zyngier 2405e643d803SMarc Zyngier /* Schedule the VPE */ 2406e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 2407e643d803SMarc Zyngier GENMASK_ULL(51, 12); 2408e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 2409e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 2410e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 2411e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 2412e643d803SMarc Zyngier 2413e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 2414e643d803SMarc Zyngier GENMASK_ULL(51, 16); 2415e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 2416e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 2417e643d803SMarc Zyngier /* 2418e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 2419e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 2420e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 2421e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 2422e643d803SMarc Zyngier * that the pending table is empty. A good implementation 2423e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 2424e643d803SMarc Zyngier * making this a tolerable issue. 2425e643d803SMarc Zyngier */ 2426e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2427e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 2428e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 2429e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2430e643d803SMarc Zyngier } 2431e643d803SMarc Zyngier 2432e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 2433e643d803SMarc Zyngier { 2434e643d803SMarc Zyngier void * __iomem vlpi_base = gic_data_rdist_vlpi_base(); 2435e643d803SMarc Zyngier u32 count = 1000000; /* 1s! */ 2436e643d803SMarc Zyngier bool clean; 2437e643d803SMarc Zyngier u64 val; 2438e643d803SMarc Zyngier 2439e643d803SMarc Zyngier /* We're being scheduled out */ 2440e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2441e643d803SMarc Zyngier val &= ~GICR_VPENDBASER_Valid; 2442e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2443e643d803SMarc Zyngier 2444e643d803SMarc Zyngier do { 2445e643d803SMarc Zyngier val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 2446e643d803SMarc Zyngier clean = !(val & GICR_VPENDBASER_Dirty); 2447e643d803SMarc Zyngier if (!clean) { 2448e643d803SMarc Zyngier count--; 2449e643d803SMarc Zyngier cpu_relax(); 2450e643d803SMarc Zyngier udelay(1); 2451e643d803SMarc Zyngier } 2452e643d803SMarc Zyngier } while (!clean && count); 2453e643d803SMarc Zyngier 2454e643d803SMarc Zyngier if (unlikely(!clean && !count)) { 2455e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2456e643d803SMarc Zyngier vpe->idai = false; 2457e643d803SMarc Zyngier vpe->pending_last = true; 2458e643d803SMarc Zyngier } else { 2459e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 2460e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 2461e643d803SMarc Zyngier } 2462e643d803SMarc Zyngier } 2463e643d803SMarc Zyngier 2464e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 2465e643d803SMarc Zyngier { 2466e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2467e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 2468e643d803SMarc Zyngier 2469e643d803SMarc Zyngier switch (info->cmd_type) { 2470e643d803SMarc Zyngier case SCHEDULE_VPE: 2471e643d803SMarc Zyngier its_vpe_schedule(vpe); 2472e643d803SMarc Zyngier return 0; 2473e643d803SMarc Zyngier 2474e643d803SMarc Zyngier case DESCHEDULE_VPE: 2475e643d803SMarc Zyngier its_vpe_deschedule(vpe); 2476e643d803SMarc Zyngier return 0; 2477e643d803SMarc Zyngier 24785e2f7642SMarc Zyngier case INVALL_VPE: 24795e2f7642SMarc Zyngier its_send_vinvall(vpe); 24805e2f7642SMarc Zyngier return 0; 24815e2f7642SMarc Zyngier 2482e643d803SMarc Zyngier default: 2483e643d803SMarc Zyngier return -EINVAL; 2484e643d803SMarc Zyngier } 2485e643d803SMarc Zyngier } 2486e643d803SMarc Zyngier 248720b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 248820b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 248920b3d54eSMarc Zyngier { 249020b3d54eSMarc Zyngier unsigned long flags; 249120b3d54eSMarc Zyngier 249220b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 249320b3d54eSMarc Zyngier 249420b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 249520b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 249620b3d54eSMarc Zyngier 249720b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 249820b3d54eSMarc Zyngier } 249920b3d54eSMarc Zyngier 2500f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 2501f6a91da7SMarc Zyngier { 2502f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 250320b3d54eSMarc Zyngier 250420b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 2505f6a91da7SMarc Zyngier void __iomem *rdbase; 2506f6a91da7SMarc Zyngier 2507f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2508f6a91da7SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_INVLPIR); 2509f6a91da7SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2510f6a91da7SMarc Zyngier cpu_relax(); 251120b3d54eSMarc Zyngier } else { 251220b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 251320b3d54eSMarc Zyngier } 2514f6a91da7SMarc Zyngier } 2515f6a91da7SMarc Zyngier 2516f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 2517f6a91da7SMarc Zyngier { 2518f6a91da7SMarc Zyngier /* 2519f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 2520f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 2521f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 2522f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 2523f6a91da7SMarc Zyngier */ 2524f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 2525f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2526f6a91da7SMarc Zyngier } 2527f6a91da7SMarc Zyngier 2528f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 2529f6a91da7SMarc Zyngier { 2530f6a91da7SMarc Zyngier /* Same hack as above... */ 2531f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 2532f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2533f6a91da7SMarc Zyngier } 2534f6a91da7SMarc Zyngier 2535e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 2536e57a3e28SMarc Zyngier enum irqchip_irq_state which, 2537e57a3e28SMarc Zyngier bool state) 2538e57a3e28SMarc Zyngier { 2539e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2540e57a3e28SMarc Zyngier 2541e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 2542e57a3e28SMarc Zyngier return -EINVAL; 2543e57a3e28SMarc Zyngier 2544e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2545e57a3e28SMarc Zyngier void __iomem *rdbase; 2546e57a3e28SMarc Zyngier 2547e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2548e57a3e28SMarc Zyngier if (state) { 2549e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 2550e57a3e28SMarc Zyngier } else { 2551e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2552e57a3e28SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2553e57a3e28SMarc Zyngier cpu_relax(); 2554e57a3e28SMarc Zyngier } 2555e57a3e28SMarc Zyngier } else { 2556e57a3e28SMarc Zyngier if (state) 2557e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 2558e57a3e28SMarc Zyngier else 2559e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 2560e57a3e28SMarc Zyngier } 2561e57a3e28SMarc Zyngier 2562e57a3e28SMarc Zyngier return 0; 2563e57a3e28SMarc Zyngier } 2564e57a3e28SMarc Zyngier 25658fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 25668fff27aeSMarc Zyngier .name = "GICv4-vpe", 2567f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 2568f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 2569f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 25703171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 2571e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 2572e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 25738fff27aeSMarc Zyngier }; 25748fff27aeSMarc Zyngier 25757d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 25767d75bbb4SMarc Zyngier { 257732bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 25787d75bbb4SMarc Zyngier } 25797d75bbb4SMarc Zyngier 25807d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 25817d75bbb4SMarc Zyngier { 25827d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 25837d75bbb4SMarc Zyngier } 25847d75bbb4SMarc Zyngier 25857d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 25867d75bbb4SMarc Zyngier { 25877d75bbb4SMarc Zyngier struct page *vpt_page; 25887d75bbb4SMarc Zyngier int vpe_id; 25897d75bbb4SMarc Zyngier 25907d75bbb4SMarc Zyngier /* Allocate vpe_id */ 25917d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 25927d75bbb4SMarc Zyngier if (vpe_id < 0) 25937d75bbb4SMarc Zyngier return vpe_id; 25947d75bbb4SMarc Zyngier 25957d75bbb4SMarc Zyngier /* Allocate VPT */ 25967d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 25977d75bbb4SMarc Zyngier if (!vpt_page) { 25987d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 25997d75bbb4SMarc Zyngier return -ENOMEM; 26007d75bbb4SMarc Zyngier } 26017d75bbb4SMarc Zyngier 26027d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 26037d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 26047d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 26057d75bbb4SMarc Zyngier return -ENOMEM; 26067d75bbb4SMarc Zyngier } 26077d75bbb4SMarc Zyngier 26087d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 26097d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 261020b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 26117d75bbb4SMarc Zyngier 26127d75bbb4SMarc Zyngier return 0; 26137d75bbb4SMarc Zyngier } 26147d75bbb4SMarc Zyngier 26157d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 26167d75bbb4SMarc Zyngier { 261720b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 26187d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 26197d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 26207d75bbb4SMarc Zyngier } 26217d75bbb4SMarc Zyngier 26227d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 26237d75bbb4SMarc Zyngier unsigned int virq, 26247d75bbb4SMarc Zyngier unsigned int nr_irqs) 26257d75bbb4SMarc Zyngier { 26267d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 26277d75bbb4SMarc Zyngier int i; 26287d75bbb4SMarc Zyngier 26297d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 26307d75bbb4SMarc Zyngier 26317d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 26327d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 26337d75bbb4SMarc Zyngier virq + i); 26347d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 26357d75bbb4SMarc Zyngier 26367d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 26377d75bbb4SMarc Zyngier 26387d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 26397d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 26407d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 26417d75bbb4SMarc Zyngier } 26427d75bbb4SMarc Zyngier 26437d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 26447d75bbb4SMarc Zyngier its_lpi_free_chunks(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 26457d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 26467d75bbb4SMarc Zyngier } 26477d75bbb4SMarc Zyngier } 26487d75bbb4SMarc Zyngier 26497d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 26507d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 26517d75bbb4SMarc Zyngier { 26527d75bbb4SMarc Zyngier struct its_vm *vm = args; 26537d75bbb4SMarc Zyngier unsigned long *bitmap; 26547d75bbb4SMarc Zyngier struct page *vprop_page; 26557d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 26567d75bbb4SMarc Zyngier 26577d75bbb4SMarc Zyngier BUG_ON(!vm); 26587d75bbb4SMarc Zyngier 26597d75bbb4SMarc Zyngier bitmap = its_lpi_alloc_chunks(nr_irqs, &base, &nr_ids); 26607d75bbb4SMarc Zyngier if (!bitmap) 26617d75bbb4SMarc Zyngier return -ENOMEM; 26627d75bbb4SMarc Zyngier 26637d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 26647d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 26657d75bbb4SMarc Zyngier return -ENOMEM; 26667d75bbb4SMarc Zyngier } 26677d75bbb4SMarc Zyngier 26687d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 26697d75bbb4SMarc Zyngier if (!vprop_page) { 26707d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 26717d75bbb4SMarc Zyngier return -ENOMEM; 26727d75bbb4SMarc Zyngier } 26737d75bbb4SMarc Zyngier 26747d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 26757d75bbb4SMarc Zyngier vm->db_lpi_base = base; 26767d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 26777d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 26787d75bbb4SMarc Zyngier 26797d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 26807d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 26817d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 26827d75bbb4SMarc Zyngier if (err) 26837d75bbb4SMarc Zyngier break; 26847d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 26857d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 26867d75bbb4SMarc Zyngier if (err) 26877d75bbb4SMarc Zyngier break; 26887d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 26897d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 26907d75bbb4SMarc Zyngier set_bit(i, bitmap); 26917d75bbb4SMarc Zyngier } 26927d75bbb4SMarc Zyngier 26937d75bbb4SMarc Zyngier if (err) { 26947d75bbb4SMarc Zyngier if (i > 0) 26957d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 26967d75bbb4SMarc Zyngier 26977d75bbb4SMarc Zyngier its_lpi_free_chunks(bitmap, base, nr_ids); 26987d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 26997d75bbb4SMarc Zyngier } 27007d75bbb4SMarc Zyngier 27017d75bbb4SMarc Zyngier return err; 27027d75bbb4SMarc Zyngier } 27037d75bbb4SMarc Zyngier 2704eb78192bSMarc Zyngier static void its_vpe_irq_domain_activate(struct irq_domain *domain, 2705eb78192bSMarc Zyngier struct irq_data *d) 2706eb78192bSMarc Zyngier { 2707eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2708eb78192bSMarc Zyngier 2709eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 2710eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 2711eb78192bSMarc Zyngier its_send_vmapp(vpe, true); 2712eb78192bSMarc Zyngier its_send_vinvall(vpe); 2713eb78192bSMarc Zyngier } 2714eb78192bSMarc Zyngier 2715eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 2716eb78192bSMarc Zyngier struct irq_data *d) 2717eb78192bSMarc Zyngier { 2718eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2719eb78192bSMarc Zyngier 2720eb78192bSMarc Zyngier its_send_vmapp(vpe, false); 2721eb78192bSMarc Zyngier } 2722eb78192bSMarc Zyngier 27238fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 27247d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 27257d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 2726eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 2727eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 27288fff27aeSMarc Zyngier }; 27298fff27aeSMarc Zyngier 27304559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 27314559fbb3SYun Wu { 27324559fbb3SYun Wu u32 count = 1000000; /* 1s */ 27334559fbb3SYun Wu u32 val; 27344559fbb3SYun Wu 27354559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 27367611da86SDavid Daney /* 27377611da86SDavid Daney * GIC architecture specification requires the ITS to be both 27387611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 27397611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 27407611da86SDavid Daney */ 27417611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 27424559fbb3SYun Wu return 0; 27434559fbb3SYun Wu 27444559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 2745d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 27464559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 27474559fbb3SYun Wu 27484559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 27494559fbb3SYun Wu while (1) { 27504559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 27514559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 27524559fbb3SYun Wu return 0; 27534559fbb3SYun Wu 27544559fbb3SYun Wu count--; 27554559fbb3SYun Wu if (!count) 27564559fbb3SYun Wu return -EBUSY; 27574559fbb3SYun Wu 27584559fbb3SYun Wu cpu_relax(); 27594559fbb3SYun Wu udelay(1); 27604559fbb3SYun Wu } 27614559fbb3SYun Wu } 27624559fbb3SYun Wu 276394100970SRobert Richter static void __maybe_unused its_enable_quirk_cavium_22375(void *data) 276494100970SRobert Richter { 276594100970SRobert Richter struct its_node *its = data; 276694100970SRobert Richter 276794100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 276894100970SRobert Richter } 276994100970SRobert Richter 2770fbf8f40eSGanapatrao Kulkarni static void __maybe_unused its_enable_quirk_cavium_23144(void *data) 2771fbf8f40eSGanapatrao Kulkarni { 2772fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 2773fbf8f40eSGanapatrao Kulkarni 2774fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 2775fbf8f40eSGanapatrao Kulkarni } 2776fbf8f40eSGanapatrao Kulkarni 277790922a2dSShanker Donthineni static void __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 277890922a2dSShanker Donthineni { 277990922a2dSShanker Donthineni struct its_node *its = data; 278090922a2dSShanker Donthineni 278190922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 278290922a2dSShanker Donthineni its->ite_size = 16; 278390922a2dSShanker Donthineni } 278490922a2dSShanker Donthineni 278567510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 278694100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 278794100970SRobert Richter { 278894100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 278994100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 279094100970SRobert Richter .mask = 0xffff0fff, 279194100970SRobert Richter .init = its_enable_quirk_cavium_22375, 279294100970SRobert Richter }, 279394100970SRobert Richter #endif 2794fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 2795fbf8f40eSGanapatrao Kulkarni { 2796fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 2797fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 2798fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 2799fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 2800fbf8f40eSGanapatrao Kulkarni }, 2801fbf8f40eSGanapatrao Kulkarni #endif 280290922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 280390922a2dSShanker Donthineni { 280490922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 280590922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 280690922a2dSShanker Donthineni .mask = 0xffffffff, 280790922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 280890922a2dSShanker Donthineni }, 280990922a2dSShanker Donthineni #endif 281067510ccaSRobert Richter { 281167510ccaSRobert Richter } 281267510ccaSRobert Richter }; 281367510ccaSRobert Richter 281467510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 281567510ccaSRobert Richter { 281667510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 281767510ccaSRobert Richter 281867510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 281967510ccaSRobert Richter } 282067510ccaSRobert Richter 2821db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 2822d14ae5e6STomasz Nowicki { 2823d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 2824d14ae5e6STomasz Nowicki struct msi_domain_info *info; 2825d14ae5e6STomasz Nowicki 2826d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 2827d14ae5e6STomasz Nowicki if (!info) 2828d14ae5e6STomasz Nowicki return -ENOMEM; 2829d14ae5e6STomasz Nowicki 2830db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 2831d14ae5e6STomasz Nowicki if (!inner_domain) { 2832d14ae5e6STomasz Nowicki kfree(info); 2833d14ae5e6STomasz Nowicki return -ENOMEM; 2834d14ae5e6STomasz Nowicki } 2835d14ae5e6STomasz Nowicki 2836db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 283796f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 283859768527SEric Auger inner_domain->flags |= IRQ_DOMAIN_FLAG_MSI_REMAP; 2839d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 2840d14ae5e6STomasz Nowicki info->data = its; 2841d14ae5e6STomasz Nowicki inner_domain->host_data = info; 2842d14ae5e6STomasz Nowicki 2843d14ae5e6STomasz Nowicki return 0; 2844d14ae5e6STomasz Nowicki } 2845d14ae5e6STomasz Nowicki 28468fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 28478fff27aeSMarc Zyngier { 284820b3d54eSMarc Zyngier struct its_node *its; 284920b3d54eSMarc Zyngier u32 devid; 285020b3d54eSMarc Zyngier int entries; 285120b3d54eSMarc Zyngier 285220b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 285320b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 285420b3d54eSMarc Zyngier return 0; 285520b3d54eSMarc Zyngier } 285620b3d54eSMarc Zyngier 285720b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 285820b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 285920b3d54eSMarc Zyngier 286020b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 286120b3d54eSMarc Zyngier vpe_proxy.vpes = kzalloc(sizeof(*vpe_proxy.vpes) * entries, 286220b3d54eSMarc Zyngier GFP_KERNEL); 286320b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 286420b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 286520b3d54eSMarc Zyngier return -ENOMEM; 286620b3d54eSMarc Zyngier } 286720b3d54eSMarc Zyngier 286820b3d54eSMarc Zyngier /* Use the last possible DevID */ 286920b3d54eSMarc Zyngier devid = GENMASK(its->device_ids - 1, 0); 287020b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 287120b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 287220b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 287320b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 287420b3d54eSMarc Zyngier return -ENOMEM; 287520b3d54eSMarc Zyngier } 287620b3d54eSMarc Zyngier 2877c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 287820b3d54eSMarc Zyngier 287920b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 288020b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 288120b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 288220b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 288320b3d54eSMarc Zyngier 28848fff27aeSMarc Zyngier return 0; 28858fff27aeSMarc Zyngier } 28868fff27aeSMarc Zyngier 28873dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 28883dfa576bSMarc Zyngier void __iomem *its_base) 28893dfa576bSMarc Zyngier { 28903dfa576bSMarc Zyngier int its_number; 28913dfa576bSMarc Zyngier u32 ctlr; 28923dfa576bSMarc Zyngier 28933dfa576bSMarc Zyngier /* 28943dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 28953dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 28963dfa576bSMarc Zyngier * locking. Should this change, we should address 28973dfa576bSMarc Zyngier * this. 28983dfa576bSMarc Zyngier */ 28993dfa576bSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, ITS_LIST_MAX); 29003dfa576bSMarc Zyngier if (its_number >= ITS_LIST_MAX) { 29013dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 29023dfa576bSMarc Zyngier &res->start); 29033dfa576bSMarc Zyngier return -EINVAL; 29043dfa576bSMarc Zyngier } 29053dfa576bSMarc Zyngier 29063dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 29073dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 29083dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 29093dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 29103dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 29113dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 29123dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 29133dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 29143dfa576bSMarc Zyngier } 29153dfa576bSMarc Zyngier 29163dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 29173dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 29183dfa576bSMarc Zyngier &res->start, its_number); 29193dfa576bSMarc Zyngier return -EINVAL; 29203dfa576bSMarc Zyngier } 29213dfa576bSMarc Zyngier 29223dfa576bSMarc Zyngier return its_number; 29233dfa576bSMarc Zyngier } 29243dfa576bSMarc Zyngier 2925db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 2926db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 29274c21f3c2SMarc Zyngier { 29284c21f3c2SMarc Zyngier struct its_node *its; 29294c21f3c2SMarc Zyngier void __iomem *its_base; 29303dfa576bSMarc Zyngier u32 val, ctlr; 29313dfa576bSMarc Zyngier u64 baser, tmp, typer; 29324c21f3c2SMarc Zyngier int err; 29334c21f3c2SMarc Zyngier 2934db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 29354c21f3c2SMarc Zyngier if (!its_base) { 2936db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 29374c21f3c2SMarc Zyngier return -ENOMEM; 29384c21f3c2SMarc Zyngier } 29394c21f3c2SMarc Zyngier 29404c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 29414c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 2942db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 29434c21f3c2SMarc Zyngier err = -ENODEV; 29444c21f3c2SMarc Zyngier goto out_unmap; 29454c21f3c2SMarc Zyngier } 29464c21f3c2SMarc Zyngier 29474559fbb3SYun Wu err = its_force_quiescent(its_base); 29484559fbb3SYun Wu if (err) { 2949db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 29504559fbb3SYun Wu goto out_unmap; 29514559fbb3SYun Wu } 29524559fbb3SYun Wu 2953db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 29544c21f3c2SMarc Zyngier 29554c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 29564c21f3c2SMarc Zyngier if (!its) { 29574c21f3c2SMarc Zyngier err = -ENOMEM; 29584c21f3c2SMarc Zyngier goto out_unmap; 29594c21f3c2SMarc Zyngier } 29604c21f3c2SMarc Zyngier 29614c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 29624c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 29634c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 29643dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 29654c21f3c2SMarc Zyngier its->base = its_base; 2966db40f0a7STomasz Nowicki its->phys_base = res->start; 29673dfa576bSMarc Zyngier its->ite_size = GITS_TYPER_ITT_ENTRY_SIZE(typer); 29683dfa576bSMarc Zyngier its->is_v4 = !!(typer & GITS_TYPER_VLPIS); 29693dfa576bSMarc Zyngier if (its->is_v4) { 29703dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 29713dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 29723dfa576bSMarc Zyngier if (err < 0) 29733dfa576bSMarc Zyngier goto out_free_its; 29743dfa576bSMarc Zyngier 29753dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 29763dfa576bSMarc Zyngier &res->start, err); 29773dfa576bSMarc Zyngier } else { 29783dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 29793dfa576bSMarc Zyngier } 29803dfa576bSMarc Zyngier } 29813dfa576bSMarc Zyngier 2982db40f0a7STomasz Nowicki its->numa_node = numa_node; 29834c21f3c2SMarc Zyngier 29845bc13c2cSRobert Richter its->cmd_base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 29855bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 29864c21f3c2SMarc Zyngier if (!its->cmd_base) { 29874c21f3c2SMarc Zyngier err = -ENOMEM; 29884c21f3c2SMarc Zyngier goto out_free_its; 29894c21f3c2SMarc Zyngier } 29904c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 29914c21f3c2SMarc Zyngier 299267510ccaSRobert Richter its_enable_quirks(its); 299367510ccaSRobert Richter 29940e0b0f69SShanker Donthineni err = its_alloc_tables(its); 29954c21f3c2SMarc Zyngier if (err) 29964c21f3c2SMarc Zyngier goto out_free_cmd; 29974c21f3c2SMarc Zyngier 29984c21f3c2SMarc Zyngier err = its_alloc_collections(its); 29994c21f3c2SMarc Zyngier if (err) 30004c21f3c2SMarc Zyngier goto out_free_tables; 30014c21f3c2SMarc Zyngier 30024c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 30032fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 30044c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 30054c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 30064c21f3c2SMarc Zyngier GITS_CBASER_VALID); 30074c21f3c2SMarc Zyngier 30080968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 30090968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 30104c21f3c2SMarc Zyngier 30114ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 3012241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 3013241a386cSMarc Zyngier /* 3014241a386cSMarc Zyngier * The HW reports non-shareable, we must 3015241a386cSMarc Zyngier * remove the cacheability attributes as 3016241a386cSMarc Zyngier * well. 3017241a386cSMarc Zyngier */ 3018241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 3019241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 3020241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 30210968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 3022241a386cSMarc Zyngier } 30234c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 30244c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 30254c21f3c2SMarc Zyngier } 30264c21f3c2SMarc Zyngier 30270968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 30283dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 3029d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 3030d51c4b4dSMarc Zyngier if (its->is_v4) 3031d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 3032d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 3033241a386cSMarc Zyngier 3034db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 3035d14ae5e6STomasz Nowicki if (err) 303654456db9SMarc Zyngier goto out_free_tables; 30374c21f3c2SMarc Zyngier 30384c21f3c2SMarc Zyngier spin_lock(&its_lock); 30394c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 30404c21f3c2SMarc Zyngier spin_unlock(&its_lock); 30414c21f3c2SMarc Zyngier 30424c21f3c2SMarc Zyngier return 0; 30434c21f3c2SMarc Zyngier 30444c21f3c2SMarc Zyngier out_free_tables: 30454c21f3c2SMarc Zyngier its_free_tables(its); 30464c21f3c2SMarc Zyngier out_free_cmd: 30475bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 30484c21f3c2SMarc Zyngier out_free_its: 30494c21f3c2SMarc Zyngier kfree(its); 30504c21f3c2SMarc Zyngier out_unmap: 30514c21f3c2SMarc Zyngier iounmap(its_base); 3052db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 30534c21f3c2SMarc Zyngier return err; 30544c21f3c2SMarc Zyngier } 30554c21f3c2SMarc Zyngier 30564c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 30574c21f3c2SMarc Zyngier { 3058589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 30594c21f3c2SMarc Zyngier } 30604c21f3c2SMarc Zyngier 30614c21f3c2SMarc Zyngier int its_cpu_init(void) 30624c21f3c2SMarc Zyngier { 306316acae72SVladimir Murzin if (!list_empty(&its_nodes)) { 30644c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 30654c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 30664c21f3c2SMarc Zyngier return -ENXIO; 30674c21f3c2SMarc Zyngier } 30684c21f3c2SMarc Zyngier its_cpu_init_lpis(); 30694c21f3c2SMarc Zyngier its_cpu_init_collection(); 30704c21f3c2SMarc Zyngier } 30714c21f3c2SMarc Zyngier 30724c21f3c2SMarc Zyngier return 0; 30734c21f3c2SMarc Zyngier } 30744c21f3c2SMarc Zyngier 3075935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 30764c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 30774c21f3c2SMarc Zyngier {}, 30784c21f3c2SMarc Zyngier }; 30794c21f3c2SMarc Zyngier 3080db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 30814c21f3c2SMarc Zyngier { 30824c21f3c2SMarc Zyngier struct device_node *np; 3083db40f0a7STomasz Nowicki struct resource res; 30844c21f3c2SMarc Zyngier 30854c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 30864c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 3087d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 3088e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 3089e81f54c6SRob Herring np); 3090d14ae5e6STomasz Nowicki continue; 3091d14ae5e6STomasz Nowicki } 3092d14ae5e6STomasz Nowicki 3093db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 3094e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 3095db40f0a7STomasz Nowicki continue; 30964c21f3c2SMarc Zyngier } 30974c21f3c2SMarc Zyngier 3098db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 3099db40f0a7STomasz Nowicki } 3100db40f0a7STomasz Nowicki return 0; 3101db40f0a7STomasz Nowicki } 3102db40f0a7STomasz Nowicki 31033f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 31043f010cf1STomasz Nowicki 31053f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 31063f010cf1STomasz Nowicki 3107d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 3108dbd2b826SGanapatrao Kulkarni struct its_srat_map { 3109dbd2b826SGanapatrao Kulkarni /* numa node id */ 3110dbd2b826SGanapatrao Kulkarni u32 numa_node; 3111dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 3112dbd2b826SGanapatrao Kulkarni u32 its_id; 3113dbd2b826SGanapatrao Kulkarni }; 3114dbd2b826SGanapatrao Kulkarni 3115fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 3116dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 3117dbd2b826SGanapatrao Kulkarni 3118dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 3119dbd2b826SGanapatrao Kulkarni { 3120dbd2b826SGanapatrao Kulkarni int i; 3121dbd2b826SGanapatrao Kulkarni 3122dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 3123dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 3124dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 3125dbd2b826SGanapatrao Kulkarni } 3126dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 3127dbd2b826SGanapatrao Kulkarni } 3128dbd2b826SGanapatrao Kulkarni 3129fdf6e7a8SHanjun Guo static int __init gic_acpi_match_srat_its(struct acpi_subtable_header *header, 3130fdf6e7a8SHanjun Guo const unsigned long end) 3131fdf6e7a8SHanjun Guo { 3132fdf6e7a8SHanjun Guo return 0; 3133fdf6e7a8SHanjun Guo } 3134fdf6e7a8SHanjun Guo 3135dbd2b826SGanapatrao Kulkarni static int __init gic_acpi_parse_srat_its(struct acpi_subtable_header *header, 3136dbd2b826SGanapatrao Kulkarni const unsigned long end) 3137dbd2b826SGanapatrao Kulkarni { 3138dbd2b826SGanapatrao Kulkarni int node; 3139dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 3140dbd2b826SGanapatrao Kulkarni 3141dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 3142dbd2b826SGanapatrao Kulkarni if (!its_affinity) 3143dbd2b826SGanapatrao Kulkarni return -EINVAL; 3144dbd2b826SGanapatrao Kulkarni 3145dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 3146dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 3147dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 3148dbd2b826SGanapatrao Kulkarni return -EINVAL; 3149dbd2b826SGanapatrao Kulkarni } 3150dbd2b826SGanapatrao Kulkarni 3151dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 3152dbd2b826SGanapatrao Kulkarni 3153dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 3154dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 3155dbd2b826SGanapatrao Kulkarni return 0; 3156dbd2b826SGanapatrao Kulkarni } 3157dbd2b826SGanapatrao Kulkarni 3158dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 3159dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 3160dbd2b826SGanapatrao Kulkarni its_in_srat++; 3161dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 3162dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 3163dbd2b826SGanapatrao Kulkarni 3164dbd2b826SGanapatrao Kulkarni return 0; 3165dbd2b826SGanapatrao Kulkarni } 3166dbd2b826SGanapatrao Kulkarni 3167dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 3168dbd2b826SGanapatrao Kulkarni { 3169fdf6e7a8SHanjun Guo int count; 3170fdf6e7a8SHanjun Guo 3171fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 3172fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 3173fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3174fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 3175fdf6e7a8SHanjun Guo if (count <= 0) 3176fdf6e7a8SHanjun Guo return; 3177fdf6e7a8SHanjun Guo 3178fdf6e7a8SHanjun Guo its_srat_maps = kmalloc(count * sizeof(struct its_srat_map), 3179fdf6e7a8SHanjun Guo GFP_KERNEL); 3180fdf6e7a8SHanjun Guo if (!its_srat_maps) { 3181fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 3182fdf6e7a8SHanjun Guo return; 3183fdf6e7a8SHanjun Guo } 3184fdf6e7a8SHanjun Guo 3185dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 3186dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 3187dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3188dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 3189dbd2b826SGanapatrao Kulkarni } 3190fdf6e7a8SHanjun Guo 3191fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 3192fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 3193fdf6e7a8SHanjun Guo { 3194fdf6e7a8SHanjun Guo kfree(its_srat_maps); 3195fdf6e7a8SHanjun Guo } 3196dbd2b826SGanapatrao Kulkarni #else 3197dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 3198dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 3199fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 3200dbd2b826SGanapatrao Kulkarni #endif 3201dbd2b826SGanapatrao Kulkarni 32023f010cf1STomasz Nowicki static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header, 32033f010cf1STomasz Nowicki const unsigned long end) 32043f010cf1STomasz Nowicki { 32053f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 32063f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 32073f010cf1STomasz Nowicki struct resource res; 32083f010cf1STomasz Nowicki int err; 32093f010cf1STomasz Nowicki 32103f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 32113f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 32123f010cf1STomasz Nowicki res.start = its_entry->base_address; 32133f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 32143f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 32153f010cf1STomasz Nowicki 32163f010cf1STomasz Nowicki dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address); 32173f010cf1STomasz Nowicki if (!dom_handle) { 32183f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 32193f010cf1STomasz Nowicki &res.start); 32203f010cf1STomasz Nowicki return -ENOMEM; 32213f010cf1STomasz Nowicki } 32223f010cf1STomasz Nowicki 32233f010cf1STomasz Nowicki err = iort_register_domain_token(its_entry->translation_id, dom_handle); 32243f010cf1STomasz Nowicki if (err) { 32253f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 32263f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 32273f010cf1STomasz Nowicki goto dom_err; 32283f010cf1STomasz Nowicki } 32293f010cf1STomasz Nowicki 3230dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 3231dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 32323f010cf1STomasz Nowicki if (!err) 32333f010cf1STomasz Nowicki return 0; 32343f010cf1STomasz Nowicki 32353f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 32363f010cf1STomasz Nowicki dom_err: 32373f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 32383f010cf1STomasz Nowicki return err; 32393f010cf1STomasz Nowicki } 32403f010cf1STomasz Nowicki 32413f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 32423f010cf1STomasz Nowicki { 3243dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 32443f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 32453f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 3246fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 32473f010cf1STomasz Nowicki } 32483f010cf1STomasz Nowicki #else 32493f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 32503f010cf1STomasz Nowicki #endif 32513f010cf1STomasz Nowicki 3252db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 3253db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 3254db40f0a7STomasz Nowicki { 3255db40f0a7STomasz Nowicki struct device_node *of_node; 32568fff27aeSMarc Zyngier struct its_node *its; 32578fff27aeSMarc Zyngier bool has_v4 = false; 32588fff27aeSMarc Zyngier int err; 3259db40f0a7STomasz Nowicki 3260db40f0a7STomasz Nowicki its_parent = parent_domain; 3261db40f0a7STomasz Nowicki of_node = to_of_node(handle); 3262db40f0a7STomasz Nowicki if (of_node) 3263db40f0a7STomasz Nowicki its_of_probe(of_node); 3264db40f0a7STomasz Nowicki else 32653f010cf1STomasz Nowicki its_acpi_probe(); 3266db40f0a7STomasz Nowicki 32674c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 32684c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 32694c21f3c2SMarc Zyngier return -ENXIO; 32704c21f3c2SMarc Zyngier } 32714c21f3c2SMarc Zyngier 32724c21f3c2SMarc Zyngier gic_rdists = rdists; 32738fff27aeSMarc Zyngier err = its_alloc_lpi_tables(); 32748fff27aeSMarc Zyngier if (err) 32758fff27aeSMarc Zyngier return err; 32768fff27aeSMarc Zyngier 32778fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 32788fff27aeSMarc Zyngier has_v4 |= its->is_v4; 32798fff27aeSMarc Zyngier 32808fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 32813d63cb53SMarc Zyngier if (its_init_vpe_domain() || 32823d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 32838fff27aeSMarc Zyngier rdists->has_vlpis = false; 32848fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 32858fff27aeSMarc Zyngier } 32868fff27aeSMarc Zyngier } 32878fff27aeSMarc Zyngier 32888fff27aeSMarc Zyngier return 0; 32894c21f3c2SMarc Zyngier } 3290