1cc2d3216SMarc Zyngier /* 2cc2d3216SMarc Zyngier * Copyright (C) 2013, 2014 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 18cc2d3216SMarc Zyngier #include <linux/bitmap.h> 19cc2d3216SMarc Zyngier #include <linux/cpu.h> 20cc2d3216SMarc Zyngier #include <linux/delay.h> 21cc2d3216SMarc Zyngier #include <linux/interrupt.h> 22cc2d3216SMarc Zyngier #include <linux/log2.h> 23cc2d3216SMarc Zyngier #include <linux/mm.h> 24cc2d3216SMarc Zyngier #include <linux/msi.h> 25cc2d3216SMarc Zyngier #include <linux/of.h> 26cc2d3216SMarc Zyngier #include <linux/of_address.h> 27cc2d3216SMarc Zyngier #include <linux/of_irq.h> 28cc2d3216SMarc Zyngier #include <linux/of_pci.h> 29cc2d3216SMarc Zyngier #include <linux/of_platform.h> 30cc2d3216SMarc Zyngier #include <linux/percpu.h> 31cc2d3216SMarc Zyngier #include <linux/slab.h> 32cc2d3216SMarc Zyngier 3341a83e06SJoel Porquet #include <linux/irqchip.h> 34cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 35cc2d3216SMarc Zyngier 36cc2d3216SMarc Zyngier #include <asm/cacheflush.h> 37cc2d3216SMarc Zyngier #include <asm/cputype.h> 38cc2d3216SMarc Zyngier #include <asm/exception.h> 39cc2d3216SMarc Zyngier 4067510ccaSRobert Richter #include "irq-gic-common.h" 4167510ccaSRobert Richter 4294100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4394100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 44fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 45cc2d3216SMarc Zyngier 46c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 47c48ed51cSMarc Zyngier 48cc2d3216SMarc Zyngier /* 49cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 50cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 51cc2d3216SMarc Zyngier * CPU. 52cc2d3216SMarc Zyngier */ 53cc2d3216SMarc Zyngier struct its_collection { 54cc2d3216SMarc Zyngier u64 target_address; 55cc2d3216SMarc Zyngier u16 col_id; 56cc2d3216SMarc Zyngier }; 57cc2d3216SMarc Zyngier 58cc2d3216SMarc Zyngier /* 59466b7d16SShanker Donthineni * The ITS_BASER structure - contains memory information and cached 60466b7d16SShanker Donthineni * value of BASER register configuration. 61466b7d16SShanker Donthineni */ 62466b7d16SShanker Donthineni struct its_baser { 63466b7d16SShanker Donthineni void *base; 64466b7d16SShanker Donthineni u64 val; 65466b7d16SShanker Donthineni u32 order; 66466b7d16SShanker Donthineni }; 67466b7d16SShanker Donthineni 68466b7d16SShanker Donthineni /* 69cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 70841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 71841514abSMarc Zyngier * list of devices writing to it. 72cc2d3216SMarc Zyngier */ 73cc2d3216SMarc Zyngier struct its_node { 74cc2d3216SMarc Zyngier raw_spinlock_t lock; 75cc2d3216SMarc Zyngier struct list_head entry; 76cc2d3216SMarc Zyngier void __iomem *base; 77cc2d3216SMarc Zyngier unsigned long phys_base; 78cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 79cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 80466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 81cc2d3216SMarc Zyngier struct its_collection *collections; 82cc2d3216SMarc Zyngier struct list_head its_device_list; 83cc2d3216SMarc Zyngier u64 flags; 84cc2d3216SMarc Zyngier u32 ite_size; 85466b7d16SShanker Donthineni u32 device_ids; 86fbf8f40eSGanapatrao Kulkarni int numa_node; 87cc2d3216SMarc Zyngier }; 88cc2d3216SMarc Zyngier 89cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 90cc2d3216SMarc Zyngier 912eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 922eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 932eca0d6cSShanker Donthineni 94591e5becSMarc Zyngier struct event_lpi_map { 95591e5becSMarc Zyngier unsigned long *lpi_map; 96591e5becSMarc Zyngier u16 *col_map; 97591e5becSMarc Zyngier irq_hw_number_t lpi_base; 98591e5becSMarc Zyngier int nr_lpis; 99591e5becSMarc Zyngier }; 100591e5becSMarc Zyngier 101cc2d3216SMarc Zyngier /* 102cc2d3216SMarc Zyngier * The ITS view of a device - belongs to an ITS, a collection, owns an 103cc2d3216SMarc Zyngier * interrupt translation table, and a list of interrupts. 104cc2d3216SMarc Zyngier */ 105cc2d3216SMarc Zyngier struct its_device { 106cc2d3216SMarc Zyngier struct list_head entry; 107cc2d3216SMarc Zyngier struct its_node *its; 108591e5becSMarc Zyngier struct event_lpi_map event_map; 109cc2d3216SMarc Zyngier void *itt; 110cc2d3216SMarc Zyngier u32 nr_ites; 111cc2d3216SMarc Zyngier u32 device_id; 112cc2d3216SMarc Zyngier }; 113cc2d3216SMarc Zyngier 1141ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 1151ac19ca6SMarc Zyngier static DEFINE_SPINLOCK(its_lock); 1161ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 1171ac19ca6SMarc Zyngier 1181ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 1191ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 1201ac19ca6SMarc Zyngier 121591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 122591e5becSMarc Zyngier u32 event) 123591e5becSMarc Zyngier { 124591e5becSMarc Zyngier struct its_node *its = its_dev->its; 125591e5becSMarc Zyngier 126591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 127591e5becSMarc Zyngier } 128591e5becSMarc Zyngier 129cc2d3216SMarc Zyngier /* 130cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 131cc2d3216SMarc Zyngier * block. 132cc2d3216SMarc Zyngier */ 133cc2d3216SMarc Zyngier struct its_cmd_desc { 134cc2d3216SMarc Zyngier union { 135cc2d3216SMarc Zyngier struct { 136cc2d3216SMarc Zyngier struct its_device *dev; 137cc2d3216SMarc Zyngier u32 event_id; 138cc2d3216SMarc Zyngier } its_inv_cmd; 139cc2d3216SMarc Zyngier 140cc2d3216SMarc Zyngier struct { 141cc2d3216SMarc Zyngier struct its_device *dev; 142cc2d3216SMarc Zyngier u32 event_id; 143cc2d3216SMarc Zyngier } its_int_cmd; 144cc2d3216SMarc Zyngier 145cc2d3216SMarc Zyngier struct { 146cc2d3216SMarc Zyngier struct its_device *dev; 147cc2d3216SMarc Zyngier int valid; 148cc2d3216SMarc Zyngier } its_mapd_cmd; 149cc2d3216SMarc Zyngier 150cc2d3216SMarc Zyngier struct { 151cc2d3216SMarc Zyngier struct its_collection *col; 152cc2d3216SMarc Zyngier int valid; 153cc2d3216SMarc Zyngier } its_mapc_cmd; 154cc2d3216SMarc Zyngier 155cc2d3216SMarc Zyngier struct { 156cc2d3216SMarc Zyngier struct its_device *dev; 157cc2d3216SMarc Zyngier u32 phys_id; 158cc2d3216SMarc Zyngier u32 event_id; 159cc2d3216SMarc Zyngier } its_mapvi_cmd; 160cc2d3216SMarc Zyngier 161cc2d3216SMarc Zyngier struct { 162cc2d3216SMarc Zyngier struct its_device *dev; 163cc2d3216SMarc Zyngier struct its_collection *col; 164591e5becSMarc Zyngier u32 event_id; 165cc2d3216SMarc Zyngier } its_movi_cmd; 166cc2d3216SMarc Zyngier 167cc2d3216SMarc Zyngier struct { 168cc2d3216SMarc Zyngier struct its_device *dev; 169cc2d3216SMarc Zyngier u32 event_id; 170cc2d3216SMarc Zyngier } its_discard_cmd; 171cc2d3216SMarc Zyngier 172cc2d3216SMarc Zyngier struct { 173cc2d3216SMarc Zyngier struct its_collection *col; 174cc2d3216SMarc Zyngier } its_invall_cmd; 175cc2d3216SMarc Zyngier }; 176cc2d3216SMarc Zyngier }; 177cc2d3216SMarc Zyngier 178cc2d3216SMarc Zyngier /* 179cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 180cc2d3216SMarc Zyngier */ 181cc2d3216SMarc Zyngier struct its_cmd_block { 182cc2d3216SMarc Zyngier u64 raw_cmd[4]; 183cc2d3216SMarc Zyngier }; 184cc2d3216SMarc Zyngier 185cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 186cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 187cc2d3216SMarc Zyngier 188cc2d3216SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_cmd_block *, 189cc2d3216SMarc Zyngier struct its_cmd_desc *); 190cc2d3216SMarc Zyngier 191cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 192cc2d3216SMarc Zyngier { 193cc2d3216SMarc Zyngier cmd->raw_cmd[0] &= ~0xffUL; 194cc2d3216SMarc Zyngier cmd->raw_cmd[0] |= cmd_nr; 195cc2d3216SMarc Zyngier } 196cc2d3216SMarc Zyngier 197cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 198cc2d3216SMarc Zyngier { 1997e195ba0SAndre Przywara cmd->raw_cmd[0] &= BIT_ULL(32) - 1; 200cc2d3216SMarc Zyngier cmd->raw_cmd[0] |= ((u64)devid) << 32; 201cc2d3216SMarc Zyngier } 202cc2d3216SMarc Zyngier 203cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 204cc2d3216SMarc Zyngier { 205cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= ~0xffffffffUL; 206cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= id; 207cc2d3216SMarc Zyngier } 208cc2d3216SMarc Zyngier 209cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 210cc2d3216SMarc Zyngier { 211cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= 0xffffffffUL; 212cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= ((u64)phys_id) << 32; 213cc2d3216SMarc Zyngier } 214cc2d3216SMarc Zyngier 215cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 216cc2d3216SMarc Zyngier { 217cc2d3216SMarc Zyngier cmd->raw_cmd[1] &= ~0x1fUL; 218cc2d3216SMarc Zyngier cmd->raw_cmd[1] |= size & 0x1f; 219cc2d3216SMarc Zyngier } 220cc2d3216SMarc Zyngier 221cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 222cc2d3216SMarc Zyngier { 223cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~0xffffffffffffUL; 224cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= itt_addr & 0xffffffffff00UL; 225cc2d3216SMarc Zyngier } 226cc2d3216SMarc Zyngier 227cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 228cc2d3216SMarc Zyngier { 229cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~(1UL << 63); 230cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= ((u64)!!valid) << 63; 231cc2d3216SMarc Zyngier } 232cc2d3216SMarc Zyngier 233cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 234cc2d3216SMarc Zyngier { 235cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~(0xffffffffUL << 16); 236cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= (target_addr & (0xffffffffUL << 16)); 237cc2d3216SMarc Zyngier } 238cc2d3216SMarc Zyngier 239cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 240cc2d3216SMarc Zyngier { 241cc2d3216SMarc Zyngier cmd->raw_cmd[2] &= ~0xffffUL; 242cc2d3216SMarc Zyngier cmd->raw_cmd[2] |= col; 243cc2d3216SMarc Zyngier } 244cc2d3216SMarc Zyngier 245cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 246cc2d3216SMarc Zyngier { 247cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 248cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 249cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 250cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 251cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 252cc2d3216SMarc Zyngier } 253cc2d3216SMarc Zyngier 254cc2d3216SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_cmd_block *cmd, 255cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 256cc2d3216SMarc Zyngier { 257cc2d3216SMarc Zyngier unsigned long itt_addr; 258c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 259cc2d3216SMarc Zyngier 260cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 261cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 262cc2d3216SMarc Zyngier 263cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 264cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 265cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 266cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 267cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 268cc2d3216SMarc Zyngier 269cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 270cc2d3216SMarc Zyngier 271591e5becSMarc Zyngier return NULL; 272cc2d3216SMarc Zyngier } 273cc2d3216SMarc Zyngier 274cc2d3216SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_cmd_block *cmd, 275cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 276cc2d3216SMarc Zyngier { 277cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 278cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 279cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 280cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 281cc2d3216SMarc Zyngier 282cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 283cc2d3216SMarc Zyngier 284cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 285cc2d3216SMarc Zyngier } 286cc2d3216SMarc Zyngier 287cc2d3216SMarc Zyngier static struct its_collection *its_build_mapvi_cmd(struct its_cmd_block *cmd, 288cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 289cc2d3216SMarc Zyngier { 290591e5becSMarc Zyngier struct its_collection *col; 291591e5becSMarc Zyngier 292591e5becSMarc Zyngier col = dev_event_to_col(desc->its_mapvi_cmd.dev, 293591e5becSMarc Zyngier desc->its_mapvi_cmd.event_id); 294591e5becSMarc Zyngier 295cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPVI); 296cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapvi_cmd.dev->device_id); 297cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_mapvi_cmd.event_id); 298cc2d3216SMarc Zyngier its_encode_phys_id(cmd, desc->its_mapvi_cmd.phys_id); 299591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 300cc2d3216SMarc Zyngier 301cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 302cc2d3216SMarc Zyngier 303591e5becSMarc Zyngier return col; 304cc2d3216SMarc Zyngier } 305cc2d3216SMarc Zyngier 306cc2d3216SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_cmd_block *cmd, 307cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 308cc2d3216SMarc Zyngier { 309591e5becSMarc Zyngier struct its_collection *col; 310591e5becSMarc Zyngier 311591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 312591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 313591e5becSMarc Zyngier 314cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 315cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 316591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 317cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 318cc2d3216SMarc Zyngier 319cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 320cc2d3216SMarc Zyngier 321591e5becSMarc Zyngier return col; 322cc2d3216SMarc Zyngier } 323cc2d3216SMarc Zyngier 324cc2d3216SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_cmd_block *cmd, 325cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 326cc2d3216SMarc Zyngier { 327591e5becSMarc Zyngier struct its_collection *col; 328591e5becSMarc Zyngier 329591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 330591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 331591e5becSMarc Zyngier 332cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 333cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 334cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 335cc2d3216SMarc Zyngier 336cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 337cc2d3216SMarc Zyngier 338591e5becSMarc Zyngier return col; 339cc2d3216SMarc Zyngier } 340cc2d3216SMarc Zyngier 341cc2d3216SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_cmd_block *cmd, 342cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 343cc2d3216SMarc Zyngier { 344591e5becSMarc Zyngier struct its_collection *col; 345591e5becSMarc Zyngier 346591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 347591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 348591e5becSMarc Zyngier 349cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 350cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 351cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 352cc2d3216SMarc Zyngier 353cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 354cc2d3216SMarc Zyngier 355591e5becSMarc Zyngier return col; 356cc2d3216SMarc Zyngier } 357cc2d3216SMarc Zyngier 358cc2d3216SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd, 359cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 360cc2d3216SMarc Zyngier { 361cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 362cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 363cc2d3216SMarc Zyngier 364cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 365cc2d3216SMarc Zyngier 366cc2d3216SMarc Zyngier return NULL; 367cc2d3216SMarc Zyngier } 368cc2d3216SMarc Zyngier 369cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 370cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 371cc2d3216SMarc Zyngier { 372cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 373cc2d3216SMarc Zyngier } 374cc2d3216SMarc Zyngier 375cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 376cc2d3216SMarc Zyngier { 377cc2d3216SMarc Zyngier int widx; 378cc2d3216SMarc Zyngier int ridx; 379cc2d3216SMarc Zyngier 380cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 381cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 382cc2d3216SMarc Zyngier 383cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 384cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 385cc2d3216SMarc Zyngier return 1; 386cc2d3216SMarc Zyngier 387cc2d3216SMarc Zyngier return 0; 388cc2d3216SMarc Zyngier } 389cc2d3216SMarc Zyngier 390cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 391cc2d3216SMarc Zyngier { 392cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 393cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 394cc2d3216SMarc Zyngier 395cc2d3216SMarc Zyngier while (its_queue_full(its)) { 396cc2d3216SMarc Zyngier count--; 397cc2d3216SMarc Zyngier if (!count) { 398cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 399cc2d3216SMarc Zyngier return NULL; 400cc2d3216SMarc Zyngier } 401cc2d3216SMarc Zyngier cpu_relax(); 402cc2d3216SMarc Zyngier udelay(1); 403cc2d3216SMarc Zyngier } 404cc2d3216SMarc Zyngier 405cc2d3216SMarc Zyngier cmd = its->cmd_write++; 406cc2d3216SMarc Zyngier 407cc2d3216SMarc Zyngier /* Handle queue wrapping */ 408cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 409cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 410cc2d3216SMarc Zyngier 411cc2d3216SMarc Zyngier return cmd; 412cc2d3216SMarc Zyngier } 413cc2d3216SMarc Zyngier 414cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 415cc2d3216SMarc Zyngier { 416cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 417cc2d3216SMarc Zyngier 418cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 419cc2d3216SMarc Zyngier 420cc2d3216SMarc Zyngier return its->cmd_write; 421cc2d3216SMarc Zyngier } 422cc2d3216SMarc Zyngier 423cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 424cc2d3216SMarc Zyngier { 425cc2d3216SMarc Zyngier /* 426cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 427cc2d3216SMarc Zyngier * the ITS. 428cc2d3216SMarc Zyngier */ 429cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 430cc2d3216SMarc Zyngier __flush_dcache_area(cmd, sizeof(*cmd)); 431cc2d3216SMarc Zyngier else 432cc2d3216SMarc Zyngier dsb(ishst); 433cc2d3216SMarc Zyngier } 434cc2d3216SMarc Zyngier 435cc2d3216SMarc Zyngier static void its_wait_for_range_completion(struct its_node *its, 436cc2d3216SMarc Zyngier struct its_cmd_block *from, 437cc2d3216SMarc Zyngier struct its_cmd_block *to) 438cc2d3216SMarc Zyngier { 439cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 440cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 441cc2d3216SMarc Zyngier 442cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 443cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 444cc2d3216SMarc Zyngier 445cc2d3216SMarc Zyngier while (1) { 446cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 447cc2d3216SMarc Zyngier if (rd_idx >= to_idx || rd_idx < from_idx) 448cc2d3216SMarc Zyngier break; 449cc2d3216SMarc Zyngier 450cc2d3216SMarc Zyngier count--; 451cc2d3216SMarc Zyngier if (!count) { 452cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue timeout\n"); 453cc2d3216SMarc Zyngier return; 454cc2d3216SMarc Zyngier } 455cc2d3216SMarc Zyngier cpu_relax(); 456cc2d3216SMarc Zyngier udelay(1); 457cc2d3216SMarc Zyngier } 458cc2d3216SMarc Zyngier } 459cc2d3216SMarc Zyngier 460cc2d3216SMarc Zyngier static void its_send_single_command(struct its_node *its, 461cc2d3216SMarc Zyngier its_cmd_builder_t builder, 462cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 463cc2d3216SMarc Zyngier { 464cc2d3216SMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; 465cc2d3216SMarc Zyngier struct its_collection *sync_col; 4663e39e8f5SMarc Zyngier unsigned long flags; 467cc2d3216SMarc Zyngier 4683e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 469cc2d3216SMarc Zyngier 470cc2d3216SMarc Zyngier cmd = its_allocate_entry(its); 471cc2d3216SMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ 472cc2d3216SMarc Zyngier pr_err_ratelimited("ITS can't allocate, dropping command\n"); 4733e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 474cc2d3216SMarc Zyngier return; 475cc2d3216SMarc Zyngier } 476cc2d3216SMarc Zyngier sync_col = builder(cmd, desc); 477cc2d3216SMarc Zyngier its_flush_cmd(its, cmd); 478cc2d3216SMarc Zyngier 479cc2d3216SMarc Zyngier if (sync_col) { 480cc2d3216SMarc Zyngier sync_cmd = its_allocate_entry(its); 481cc2d3216SMarc Zyngier if (!sync_cmd) { 482cc2d3216SMarc Zyngier pr_err_ratelimited("ITS can't SYNC, skipping\n"); 483cc2d3216SMarc Zyngier goto post; 484cc2d3216SMarc Zyngier } 485cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 486cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 487cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 488cc2d3216SMarc Zyngier its_flush_cmd(its, sync_cmd); 489cc2d3216SMarc Zyngier } 490cc2d3216SMarc Zyngier 491cc2d3216SMarc Zyngier post: 492cc2d3216SMarc Zyngier next_cmd = its_post_commands(its); 4933e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 494cc2d3216SMarc Zyngier 495cc2d3216SMarc Zyngier its_wait_for_range_completion(its, cmd, next_cmd); 496cc2d3216SMarc Zyngier } 497cc2d3216SMarc Zyngier 498cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 499cc2d3216SMarc Zyngier { 500cc2d3216SMarc Zyngier struct its_cmd_desc desc; 501cc2d3216SMarc Zyngier 502cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 503cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 504cc2d3216SMarc Zyngier 505cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 506cc2d3216SMarc Zyngier } 507cc2d3216SMarc Zyngier 508cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 509cc2d3216SMarc Zyngier { 510cc2d3216SMarc Zyngier struct its_cmd_desc desc; 511cc2d3216SMarc Zyngier 512cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 513cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 514cc2d3216SMarc Zyngier 515cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 516cc2d3216SMarc Zyngier } 517cc2d3216SMarc Zyngier 518cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 519cc2d3216SMarc Zyngier int valid) 520cc2d3216SMarc Zyngier { 521cc2d3216SMarc Zyngier struct its_cmd_desc desc; 522cc2d3216SMarc Zyngier 523cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 524cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 525cc2d3216SMarc Zyngier 526cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 527cc2d3216SMarc Zyngier } 528cc2d3216SMarc Zyngier 529cc2d3216SMarc Zyngier static void its_send_mapvi(struct its_device *dev, u32 irq_id, u32 id) 530cc2d3216SMarc Zyngier { 531cc2d3216SMarc Zyngier struct its_cmd_desc desc; 532cc2d3216SMarc Zyngier 533cc2d3216SMarc Zyngier desc.its_mapvi_cmd.dev = dev; 534cc2d3216SMarc Zyngier desc.its_mapvi_cmd.phys_id = irq_id; 535cc2d3216SMarc Zyngier desc.its_mapvi_cmd.event_id = id; 536cc2d3216SMarc Zyngier 537cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapvi_cmd, &desc); 538cc2d3216SMarc Zyngier } 539cc2d3216SMarc Zyngier 540cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 541cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 542cc2d3216SMarc Zyngier { 543cc2d3216SMarc Zyngier struct its_cmd_desc desc; 544cc2d3216SMarc Zyngier 545cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 546cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 547591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 548cc2d3216SMarc Zyngier 549cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 550cc2d3216SMarc Zyngier } 551cc2d3216SMarc Zyngier 552cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 553cc2d3216SMarc Zyngier { 554cc2d3216SMarc Zyngier struct its_cmd_desc desc; 555cc2d3216SMarc Zyngier 556cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 557cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 558cc2d3216SMarc Zyngier 559cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 560cc2d3216SMarc Zyngier } 561cc2d3216SMarc Zyngier 562cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 563cc2d3216SMarc Zyngier { 564cc2d3216SMarc Zyngier struct its_cmd_desc desc; 565cc2d3216SMarc Zyngier 566cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 567cc2d3216SMarc Zyngier 568cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 569cc2d3216SMarc Zyngier } 570c48ed51cSMarc Zyngier 571c48ed51cSMarc Zyngier /* 572c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 573c48ed51cSMarc Zyngier */ 574c48ed51cSMarc Zyngier 575c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 576c48ed51cSMarc Zyngier { 577c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 578591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 579c48ed51cSMarc Zyngier } 580c48ed51cSMarc Zyngier 581c48ed51cSMarc Zyngier static void lpi_set_config(struct irq_data *d, bool enable) 582c48ed51cSMarc Zyngier { 583c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 584c48ed51cSMarc Zyngier irq_hw_number_t hwirq = d->hwirq; 585c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 586c48ed51cSMarc Zyngier u8 *cfg = page_address(gic_rdists->prop_page) + hwirq - 8192; 587c48ed51cSMarc Zyngier 588c48ed51cSMarc Zyngier if (enable) 589c48ed51cSMarc Zyngier *cfg |= LPI_PROP_ENABLED; 590c48ed51cSMarc Zyngier else 591c48ed51cSMarc Zyngier *cfg &= ~LPI_PROP_ENABLED; 592c48ed51cSMarc Zyngier 593c48ed51cSMarc Zyngier /* 594c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 595c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 596c48ed51cSMarc Zyngier * Humpf... 597c48ed51cSMarc Zyngier */ 598c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 599c48ed51cSMarc Zyngier __flush_dcache_area(cfg, sizeof(*cfg)); 600c48ed51cSMarc Zyngier else 601c48ed51cSMarc Zyngier dsb(ishst); 602c48ed51cSMarc Zyngier its_send_inv(its_dev, id); 603c48ed51cSMarc Zyngier } 604c48ed51cSMarc Zyngier 605c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 606c48ed51cSMarc Zyngier { 607c48ed51cSMarc Zyngier lpi_set_config(d, false); 608c48ed51cSMarc Zyngier } 609c48ed51cSMarc Zyngier 610c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 611c48ed51cSMarc Zyngier { 612c48ed51cSMarc Zyngier lpi_set_config(d, true); 613c48ed51cSMarc Zyngier } 614c48ed51cSMarc Zyngier 615c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 616c48ed51cSMarc Zyngier bool force) 617c48ed51cSMarc Zyngier { 618fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 619fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 620c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 621c48ed51cSMarc Zyngier struct its_collection *target_col; 622c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 623c48ed51cSMarc Zyngier 624fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 625fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 626fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 627fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 628fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 629fbf8f40eSGanapatrao Kulkarni return -EINVAL; 630fbf8f40eSGanapatrao Kulkarni } 631fbf8f40eSGanapatrao Kulkarni } 632fbf8f40eSGanapatrao Kulkarni 633fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 634fbf8f40eSGanapatrao Kulkarni 635c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 636c48ed51cSMarc Zyngier return -EINVAL; 637c48ed51cSMarc Zyngier 638c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 639c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 640591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 641c48ed51cSMarc Zyngier 642c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 643c48ed51cSMarc Zyngier } 644c48ed51cSMarc Zyngier 645b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 646b48ac83dSMarc Zyngier { 647b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 648b48ac83dSMarc Zyngier struct its_node *its; 649b48ac83dSMarc Zyngier u64 addr; 650b48ac83dSMarc Zyngier 651b48ac83dSMarc Zyngier its = its_dev->its; 652b48ac83dSMarc Zyngier addr = its->phys_base + GITS_TRANSLATER; 653b48ac83dSMarc Zyngier 654b48ac83dSMarc Zyngier msg->address_lo = addr & ((1UL << 32) - 1); 655b48ac83dSMarc Zyngier msg->address_hi = addr >> 32; 656b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 657b48ac83dSMarc Zyngier } 658b48ac83dSMarc Zyngier 659c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 660c48ed51cSMarc Zyngier .name = "ITS", 661c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 662c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 663004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 664c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 665b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 666b48ac83dSMarc Zyngier }; 667b48ac83dSMarc Zyngier 668bf9529f8SMarc Zyngier /* 669bf9529f8SMarc Zyngier * How we allocate LPIs: 670bf9529f8SMarc Zyngier * 671bf9529f8SMarc Zyngier * The GIC has id_bits bits for interrupt identifiers. From there, we 672bf9529f8SMarc Zyngier * must subtract 8192 which are reserved for SGIs/PPIs/SPIs. Then, as 673bf9529f8SMarc Zyngier * we allocate LPIs by chunks of 32, we can shift the whole thing by 5 674bf9529f8SMarc Zyngier * bits to the right. 675bf9529f8SMarc Zyngier * 676bf9529f8SMarc Zyngier * This gives us (((1UL << id_bits) - 8192) >> 5) possible allocations. 677bf9529f8SMarc Zyngier */ 678bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK_SHIFT 5 679bf9529f8SMarc Zyngier #define IRQS_PER_CHUNK (1 << IRQS_PER_CHUNK_SHIFT) 680bf9529f8SMarc Zyngier 681bf9529f8SMarc Zyngier static unsigned long *lpi_bitmap; 682bf9529f8SMarc Zyngier static u32 lpi_chunks; 683bf9529f8SMarc Zyngier static DEFINE_SPINLOCK(lpi_lock); 684bf9529f8SMarc Zyngier 685bf9529f8SMarc Zyngier static int its_lpi_to_chunk(int lpi) 686bf9529f8SMarc Zyngier { 687bf9529f8SMarc Zyngier return (lpi - 8192) >> IRQS_PER_CHUNK_SHIFT; 688bf9529f8SMarc Zyngier } 689bf9529f8SMarc Zyngier 690bf9529f8SMarc Zyngier static int its_chunk_to_lpi(int chunk) 691bf9529f8SMarc Zyngier { 692bf9529f8SMarc Zyngier return (chunk << IRQS_PER_CHUNK_SHIFT) + 8192; 693bf9529f8SMarc Zyngier } 694bf9529f8SMarc Zyngier 69504a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 696bf9529f8SMarc Zyngier { 697bf9529f8SMarc Zyngier lpi_chunks = its_lpi_to_chunk(1UL << id_bits); 698bf9529f8SMarc Zyngier 699bf9529f8SMarc Zyngier lpi_bitmap = kzalloc(BITS_TO_LONGS(lpi_chunks) * sizeof(long), 700bf9529f8SMarc Zyngier GFP_KERNEL); 701bf9529f8SMarc Zyngier if (!lpi_bitmap) { 702bf9529f8SMarc Zyngier lpi_chunks = 0; 703bf9529f8SMarc Zyngier return -ENOMEM; 704bf9529f8SMarc Zyngier } 705bf9529f8SMarc Zyngier 706bf9529f8SMarc Zyngier pr_info("ITS: Allocated %d chunks for LPIs\n", (int)lpi_chunks); 707bf9529f8SMarc Zyngier return 0; 708bf9529f8SMarc Zyngier } 709bf9529f8SMarc Zyngier 710bf9529f8SMarc Zyngier static unsigned long *its_lpi_alloc_chunks(int nr_irqs, int *base, int *nr_ids) 711bf9529f8SMarc Zyngier { 712bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 713bf9529f8SMarc Zyngier int chunk_id; 714bf9529f8SMarc Zyngier int nr_chunks; 715bf9529f8SMarc Zyngier int i; 716bf9529f8SMarc Zyngier 717bf9529f8SMarc Zyngier nr_chunks = DIV_ROUND_UP(nr_irqs, IRQS_PER_CHUNK); 718bf9529f8SMarc Zyngier 719bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 720bf9529f8SMarc Zyngier 721bf9529f8SMarc Zyngier do { 722bf9529f8SMarc Zyngier chunk_id = bitmap_find_next_zero_area(lpi_bitmap, lpi_chunks, 723bf9529f8SMarc Zyngier 0, nr_chunks, 0); 724bf9529f8SMarc Zyngier if (chunk_id < lpi_chunks) 725bf9529f8SMarc Zyngier break; 726bf9529f8SMarc Zyngier 727bf9529f8SMarc Zyngier nr_chunks--; 728bf9529f8SMarc Zyngier } while (nr_chunks > 0); 729bf9529f8SMarc Zyngier 730bf9529f8SMarc Zyngier if (!nr_chunks) 731bf9529f8SMarc Zyngier goto out; 732bf9529f8SMarc Zyngier 733bf9529f8SMarc Zyngier bitmap = kzalloc(BITS_TO_LONGS(nr_chunks * IRQS_PER_CHUNK) * sizeof (long), 734bf9529f8SMarc Zyngier GFP_ATOMIC); 735bf9529f8SMarc Zyngier if (!bitmap) 736bf9529f8SMarc Zyngier goto out; 737bf9529f8SMarc Zyngier 738bf9529f8SMarc Zyngier for (i = 0; i < nr_chunks; i++) 739bf9529f8SMarc Zyngier set_bit(chunk_id + i, lpi_bitmap); 740bf9529f8SMarc Zyngier 741bf9529f8SMarc Zyngier *base = its_chunk_to_lpi(chunk_id); 742bf9529f8SMarc Zyngier *nr_ids = nr_chunks * IRQS_PER_CHUNK; 743bf9529f8SMarc Zyngier 744bf9529f8SMarc Zyngier out: 745bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 746bf9529f8SMarc Zyngier 747c8415b94SMarc Zyngier if (!bitmap) 748c8415b94SMarc Zyngier *base = *nr_ids = 0; 749c8415b94SMarc Zyngier 750bf9529f8SMarc Zyngier return bitmap; 751bf9529f8SMarc Zyngier } 752bf9529f8SMarc Zyngier 753591e5becSMarc Zyngier static void its_lpi_free(struct event_lpi_map *map) 754bf9529f8SMarc Zyngier { 755591e5becSMarc Zyngier int base = map->lpi_base; 756591e5becSMarc Zyngier int nr_ids = map->nr_lpis; 757bf9529f8SMarc Zyngier int lpi; 758bf9529f8SMarc Zyngier 759bf9529f8SMarc Zyngier spin_lock(&lpi_lock); 760bf9529f8SMarc Zyngier 761bf9529f8SMarc Zyngier for (lpi = base; lpi < (base + nr_ids); lpi += IRQS_PER_CHUNK) { 762bf9529f8SMarc Zyngier int chunk = its_lpi_to_chunk(lpi); 763bf9529f8SMarc Zyngier BUG_ON(chunk > lpi_chunks); 764bf9529f8SMarc Zyngier if (test_bit(chunk, lpi_bitmap)) { 765bf9529f8SMarc Zyngier clear_bit(chunk, lpi_bitmap); 766bf9529f8SMarc Zyngier } else { 767bf9529f8SMarc Zyngier pr_err("Bad LPI chunk %d\n", chunk); 768bf9529f8SMarc Zyngier } 769bf9529f8SMarc Zyngier } 770bf9529f8SMarc Zyngier 771bf9529f8SMarc Zyngier spin_unlock(&lpi_lock); 772bf9529f8SMarc Zyngier 773591e5becSMarc Zyngier kfree(map->lpi_map); 774591e5becSMarc Zyngier kfree(map->col_map); 775bf9529f8SMarc Zyngier } 7761ac19ca6SMarc Zyngier 7771ac19ca6SMarc Zyngier /* 7781ac19ca6SMarc Zyngier * We allocate 64kB for PROPBASE. That gives us at most 64K LPIs to 7791ac19ca6SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 7801ac19ca6SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 7811ac19ca6SMarc Zyngier */ 7821ac19ca6SMarc Zyngier #define LPI_PROPBASE_SZ SZ_64K 7831ac19ca6SMarc Zyngier #define LPI_PENDBASE_SZ (LPI_PROPBASE_SZ / 8 + SZ_1K) 7841ac19ca6SMarc Zyngier 7851ac19ca6SMarc Zyngier /* 7861ac19ca6SMarc Zyngier * This is how many bits of ID we need, including the useless ones. 7871ac19ca6SMarc Zyngier */ 7881ac19ca6SMarc Zyngier #define LPI_NRBITS ilog2(LPI_PROPBASE_SZ + SZ_8K) 7891ac19ca6SMarc Zyngier 7901ac19ca6SMarc Zyngier #define LPI_PROP_DEFAULT_PRIO 0xa0 7911ac19ca6SMarc Zyngier 7921ac19ca6SMarc Zyngier static int __init its_alloc_lpi_tables(void) 7931ac19ca6SMarc Zyngier { 7941ac19ca6SMarc Zyngier phys_addr_t paddr; 7951ac19ca6SMarc Zyngier 7961ac19ca6SMarc Zyngier gic_rdists->prop_page = alloc_pages(GFP_NOWAIT, 7971ac19ca6SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 7981ac19ca6SMarc Zyngier if (!gic_rdists->prop_page) { 7991ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 8001ac19ca6SMarc Zyngier return -ENOMEM; 8011ac19ca6SMarc Zyngier } 8021ac19ca6SMarc Zyngier 8031ac19ca6SMarc Zyngier paddr = page_to_phys(gic_rdists->prop_page); 8041ac19ca6SMarc Zyngier pr_info("GIC: using LPI property table @%pa\n", &paddr); 8051ac19ca6SMarc Zyngier 8061ac19ca6SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 8071ac19ca6SMarc Zyngier memset(page_address(gic_rdists->prop_page), 8081ac19ca6SMarc Zyngier LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, 8091ac19ca6SMarc Zyngier LPI_PROPBASE_SZ); 8101ac19ca6SMarc Zyngier 8111ac19ca6SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 8121ac19ca6SMarc Zyngier __flush_dcache_area(page_address(gic_rdists->prop_page), LPI_PROPBASE_SZ); 8131ac19ca6SMarc Zyngier 8141ac19ca6SMarc Zyngier return 0; 8151ac19ca6SMarc Zyngier } 8161ac19ca6SMarc Zyngier 8171ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 8181ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 8191ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 8201ac19ca6SMarc Zyngier [GITS_BASER_TYPE_CPU] = "Physical CPUs", 8211ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 8221ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 8231ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 8241ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 8251ac19ca6SMarc Zyngier }; 8261ac19ca6SMarc Zyngier 827*2d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 828*2d81d425SShanker Donthineni { 829*2d81d425SShanker Donthineni u32 idx = baser - its->tables; 830*2d81d425SShanker Donthineni 831*2d81d425SShanker Donthineni return readq_relaxed(its->base + GITS_BASER + (idx << 3)); 832*2d81d425SShanker Donthineni } 833*2d81d425SShanker Donthineni 834*2d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 835*2d81d425SShanker Donthineni u64 val) 836*2d81d425SShanker Donthineni { 837*2d81d425SShanker Donthineni u32 idx = baser - its->tables; 838*2d81d425SShanker Donthineni 839*2d81d425SShanker Donthineni writeq_relaxed(val, its->base + GITS_BASER + (idx << 3)); 840*2d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 841*2d81d425SShanker Donthineni } 842*2d81d425SShanker Donthineni 8431ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 8441ac19ca6SMarc Zyngier { 8451ac19ca6SMarc Zyngier int i; 8461ac19ca6SMarc Zyngier 8471ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 8481a485f4dSShanker Donthineni if (its->tables[i].base) { 8491a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 8501a485f4dSShanker Donthineni its->tables[i].order); 8511a485f4dSShanker Donthineni its->tables[i].base = NULL; 8521ac19ca6SMarc Zyngier } 8531ac19ca6SMarc Zyngier } 8541ac19ca6SMarc Zyngier } 8551ac19ca6SMarc Zyngier 856841514abSMarc Zyngier static int its_alloc_tables(const char *node_name, struct its_node *its) 8571ac19ca6SMarc Zyngier { 8581ac19ca6SMarc Zyngier int err; 8591ac19ca6SMarc Zyngier int i; 860790b57aeSYun Wu int psz = SZ_64K; 8611ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 86294100970SRobert Richter u64 cache; 86394100970SRobert Richter u64 typer; 86494100970SRobert Richter u32 ids; 86594100970SRobert Richter 86694100970SRobert Richter if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) { 86794100970SRobert Richter /* 86894100970SRobert Richter * erratum 22375: only alloc 8MB table size 86994100970SRobert Richter * erratum 24313: ignore memory access type 87094100970SRobert Richter */ 87194100970SRobert Richter cache = 0; 87294100970SRobert Richter ids = 0x14; /* 20 bits, 8MB */ 87394100970SRobert Richter } else { 87494100970SRobert Richter cache = GITS_BASER_WaWb; 87594100970SRobert Richter typer = readq_relaxed(its->base + GITS_TYPER); 87694100970SRobert Richter ids = GITS_TYPER_DEVBITS(typer); 87794100970SRobert Richter } 8781ac19ca6SMarc Zyngier 879466b7d16SShanker Donthineni its->device_ids = ids; 880466b7d16SShanker Donthineni 8811ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 882*2d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 883*2d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 8841ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 8851ac19ca6SMarc Zyngier u64 entry_size = GITS_BASER_ENTRY_SIZE(val); 886790b57aeSYun Wu int order = get_order(psz); 88730f21363SRobert Richter int alloc_pages; 8881ac19ca6SMarc Zyngier u64 tmp; 8891ac19ca6SMarc Zyngier void *base; 8901ac19ca6SMarc Zyngier 8911ac19ca6SMarc Zyngier if (type == GITS_BASER_TYPE_NONE) 8921ac19ca6SMarc Zyngier continue; 8931ac19ca6SMarc Zyngier 894f54b97edSMarc Zyngier /* 895f54b97edSMarc Zyngier * Allocate as many entries as required to fit the 896f54b97edSMarc Zyngier * range of device IDs that the ITS can grok... The ID 897f54b97edSMarc Zyngier * space being incredibly sparse, this results in a 898f54b97edSMarc Zyngier * massive waste of memory. 899f54b97edSMarc Zyngier * 900f54b97edSMarc Zyngier * For other tables, only allocate a single page. 901f54b97edSMarc Zyngier */ 902f54b97edSMarc Zyngier if (type == GITS_BASER_TYPE_DEVICE) { 9033ad2a5f5SMinghuan Lian /* 9043ad2a5f5SMinghuan Lian * 'order' was initialized earlier to the default page 9053ad2a5f5SMinghuan Lian * granule of the the ITS. We can't have an allocation 9063ad2a5f5SMinghuan Lian * smaller than that. If the requested allocation 9073ad2a5f5SMinghuan Lian * is smaller, round up to the default page granule. 9083ad2a5f5SMinghuan Lian */ 9093ad2a5f5SMinghuan Lian order = max(get_order((1UL << ids) * entry_size), 9103ad2a5f5SMinghuan Lian order); 9111d27704aSYun Wu if (order >= MAX_ORDER) { 9121d27704aSYun Wu order = MAX_ORDER - 1; 9131d27704aSYun Wu pr_warn("%s: Device Table too large, reduce its page order to %u\n", 914841514abSMarc Zyngier node_name, order); 9151d27704aSYun Wu } 916f54b97edSMarc Zyngier } 917f54b97edSMarc Zyngier 91818aa60ceSMarc Zyngier retry_alloc_baser: 9192eca0d6cSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 92030f21363SRobert Richter if (alloc_pages > GITS_BASER_PAGES_MAX) { 92130f21363SRobert Richter alloc_pages = GITS_BASER_PAGES_MAX; 92230f21363SRobert Richter order = get_order(GITS_BASER_PAGES_MAX * psz); 92330f21363SRobert Richter pr_warn("%s: Device Table too large, reduce its page order to %u (%u pages)\n", 92430f21363SRobert Richter node_name, order, alloc_pages); 92530f21363SRobert Richter } 92630f21363SRobert Richter 927f54b97edSMarc Zyngier base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 9281ac19ca6SMarc Zyngier if (!base) { 9291ac19ca6SMarc Zyngier err = -ENOMEM; 9301ac19ca6SMarc Zyngier goto out_free; 9311ac19ca6SMarc Zyngier } 9321ac19ca6SMarc Zyngier 9331a485f4dSShanker Donthineni its->tables[i].base = base; 9341a485f4dSShanker Donthineni its->tables[i].order = order; 9351ac19ca6SMarc Zyngier 9361ac19ca6SMarc Zyngier retry_baser: 9371ac19ca6SMarc Zyngier val = (virt_to_phys(base) | 9381ac19ca6SMarc Zyngier (type << GITS_BASER_TYPE_SHIFT) | 9391ac19ca6SMarc Zyngier ((entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 940241a386cSMarc Zyngier cache | 9411ac19ca6SMarc Zyngier shr | 9421ac19ca6SMarc Zyngier GITS_BASER_VALID); 9431ac19ca6SMarc Zyngier 9441ac19ca6SMarc Zyngier switch (psz) { 9451ac19ca6SMarc Zyngier case SZ_4K: 9461ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_4K; 9471ac19ca6SMarc Zyngier break; 9481ac19ca6SMarc Zyngier case SZ_16K: 9491ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_16K; 9501ac19ca6SMarc Zyngier break; 9511ac19ca6SMarc Zyngier case SZ_64K: 9521ac19ca6SMarc Zyngier val |= GITS_BASER_PAGE_SIZE_64K; 9531ac19ca6SMarc Zyngier break; 9541ac19ca6SMarc Zyngier } 9551ac19ca6SMarc Zyngier 95630f21363SRobert Richter val |= alloc_pages - 1; 9571ac19ca6SMarc Zyngier 958*2d81d425SShanker Donthineni its_write_baser_cache(its, baser, val); 959*2d81d425SShanker Donthineni tmp = baser->val; 9601ac19ca6SMarc Zyngier 9611ac19ca6SMarc Zyngier if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 9621ac19ca6SMarc Zyngier /* 9631ac19ca6SMarc Zyngier * Shareability didn't stick. Just use 9641ac19ca6SMarc Zyngier * whatever the read reported, which is likely 9651ac19ca6SMarc Zyngier * to be the only thing this redistributor 966241a386cSMarc Zyngier * supports. If that's zero, make it 967241a386cSMarc Zyngier * non-cacheable as well. 9681ac19ca6SMarc Zyngier */ 9691ac19ca6SMarc Zyngier shr = tmp & GITS_BASER_SHAREABILITY_MASK; 9705a9a8915SMarc Zyngier if (!shr) { 971241a386cSMarc Zyngier cache = GITS_BASER_nC; 9722eca0d6cSShanker Donthineni __flush_dcache_area(base, PAGE_ORDER_TO_SIZE(order)); 9735a9a8915SMarc Zyngier } 9741ac19ca6SMarc Zyngier goto retry_baser; 9751ac19ca6SMarc Zyngier } 9761ac19ca6SMarc Zyngier 9771ac19ca6SMarc Zyngier if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 9781ac19ca6SMarc Zyngier /* 9791ac19ca6SMarc Zyngier * Page size didn't stick. Let's try a smaller 9801ac19ca6SMarc Zyngier * size and retry. If we reach 4K, then 9811ac19ca6SMarc Zyngier * something is horribly wrong... 9821ac19ca6SMarc Zyngier */ 98318aa60ceSMarc Zyngier free_pages((unsigned long)base, order); 9841a485f4dSShanker Donthineni its->tables[i].base = NULL; 98518aa60ceSMarc Zyngier 9861ac19ca6SMarc Zyngier switch (psz) { 9871ac19ca6SMarc Zyngier case SZ_16K: 9881ac19ca6SMarc Zyngier psz = SZ_4K; 98918aa60ceSMarc Zyngier goto retry_alloc_baser; 9901ac19ca6SMarc Zyngier case SZ_64K: 9911ac19ca6SMarc Zyngier psz = SZ_16K; 99218aa60ceSMarc Zyngier goto retry_alloc_baser; 9931ac19ca6SMarc Zyngier } 9941ac19ca6SMarc Zyngier } 9951ac19ca6SMarc Zyngier 9961ac19ca6SMarc Zyngier if (val != tmp) { 9971ac19ca6SMarc Zyngier pr_err("ITS: %s: GITS_BASER%d doesn't stick: %lx %lx\n", 998841514abSMarc Zyngier node_name, i, 9991ac19ca6SMarc Zyngier (unsigned long) val, (unsigned long) tmp); 10001ac19ca6SMarc Zyngier err = -ENXIO; 10011ac19ca6SMarc Zyngier goto out_free; 10021ac19ca6SMarc Zyngier } 10031ac19ca6SMarc Zyngier 10041ac19ca6SMarc Zyngier pr_info("ITS: allocated %d %s @%lx (psz %dK, shr %d)\n", 10052eca0d6cSShanker Donthineni (int)(PAGE_ORDER_TO_SIZE(order) / entry_size), 10061ac19ca6SMarc Zyngier its_base_type_string[type], 10071ac19ca6SMarc Zyngier (unsigned long)virt_to_phys(base), 10081ac19ca6SMarc Zyngier psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 10091ac19ca6SMarc Zyngier } 10101ac19ca6SMarc Zyngier 10111ac19ca6SMarc Zyngier return 0; 10121ac19ca6SMarc Zyngier 10131ac19ca6SMarc Zyngier out_free: 10141ac19ca6SMarc Zyngier its_free_tables(its); 10151ac19ca6SMarc Zyngier 10161ac19ca6SMarc Zyngier return err; 10171ac19ca6SMarc Zyngier } 10181ac19ca6SMarc Zyngier 10191ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 10201ac19ca6SMarc Zyngier { 10211ac19ca6SMarc Zyngier its->collections = kzalloc(nr_cpu_ids * sizeof(*its->collections), 10221ac19ca6SMarc Zyngier GFP_KERNEL); 10231ac19ca6SMarc Zyngier if (!its->collections) 10241ac19ca6SMarc Zyngier return -ENOMEM; 10251ac19ca6SMarc Zyngier 10261ac19ca6SMarc Zyngier return 0; 10271ac19ca6SMarc Zyngier } 10281ac19ca6SMarc Zyngier 10291ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 10301ac19ca6SMarc Zyngier { 10311ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 10321ac19ca6SMarc Zyngier struct page *pend_page; 10331ac19ca6SMarc Zyngier u64 val, tmp; 10341ac19ca6SMarc Zyngier 10351ac19ca6SMarc Zyngier /* If we didn't allocate the pending table yet, do it now */ 10361ac19ca6SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 10371ac19ca6SMarc Zyngier if (!pend_page) { 10381ac19ca6SMarc Zyngier phys_addr_t paddr; 10391ac19ca6SMarc Zyngier /* 10401ac19ca6SMarc Zyngier * The pending pages have to be at least 64kB aligned, 10411ac19ca6SMarc Zyngier * hence the 'max(LPI_PENDBASE_SZ, SZ_64K)' below. 10421ac19ca6SMarc Zyngier */ 10431ac19ca6SMarc Zyngier pend_page = alloc_pages(GFP_NOWAIT | __GFP_ZERO, 10441ac19ca6SMarc Zyngier get_order(max(LPI_PENDBASE_SZ, SZ_64K))); 10451ac19ca6SMarc Zyngier if (!pend_page) { 10461ac19ca6SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", 10471ac19ca6SMarc Zyngier smp_processor_id()); 10481ac19ca6SMarc Zyngier return; 10491ac19ca6SMarc Zyngier } 10501ac19ca6SMarc Zyngier 10511ac19ca6SMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 10521ac19ca6SMarc Zyngier __flush_dcache_area(page_address(pend_page), LPI_PENDBASE_SZ); 10531ac19ca6SMarc Zyngier 10541ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 10551ac19ca6SMarc Zyngier pr_info("CPU%d: using LPI pending table @%pa\n", 10561ac19ca6SMarc Zyngier smp_processor_id(), &paddr); 10571ac19ca6SMarc Zyngier gic_data_rdist()->pend_page = pend_page; 10581ac19ca6SMarc Zyngier } 10591ac19ca6SMarc Zyngier 10601ac19ca6SMarc Zyngier /* Disable LPIs */ 10611ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 10621ac19ca6SMarc Zyngier val &= ~GICR_CTLR_ENABLE_LPIS; 10631ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 10641ac19ca6SMarc Zyngier 10651ac19ca6SMarc Zyngier /* 10661ac19ca6SMarc Zyngier * Make sure any change to the table is observable by the GIC. 10671ac19ca6SMarc Zyngier */ 10681ac19ca6SMarc Zyngier dsb(sy); 10691ac19ca6SMarc Zyngier 10701ac19ca6SMarc Zyngier /* set PROPBASE */ 10711ac19ca6SMarc Zyngier val = (page_to_phys(gic_rdists->prop_page) | 10721ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 10731ac19ca6SMarc Zyngier GICR_PROPBASER_WaWb | 10741ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 10751ac19ca6SMarc Zyngier 10761ac19ca6SMarc Zyngier writeq_relaxed(val, rbase + GICR_PROPBASER); 10771ac19ca6SMarc Zyngier tmp = readq_relaxed(rbase + GICR_PROPBASER); 10781ac19ca6SMarc Zyngier 10791ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 1080241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 1081241a386cSMarc Zyngier /* 1082241a386cSMarc Zyngier * The HW reports non-shareable, we must 1083241a386cSMarc Zyngier * remove the cacheability attributes as 1084241a386cSMarc Zyngier * well. 1085241a386cSMarc Zyngier */ 1086241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 1087241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 1088241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 1089241a386cSMarc Zyngier writeq_relaxed(val, rbase + GICR_PROPBASER); 1090241a386cSMarc Zyngier } 10911ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 10921ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 10931ac19ca6SMarc Zyngier } 10941ac19ca6SMarc Zyngier 10951ac19ca6SMarc Zyngier /* set PENDBASE */ 10961ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 10974ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 10984ad3e363SMarc Zyngier GICR_PENDBASER_WaWb); 10991ac19ca6SMarc Zyngier 11001ac19ca6SMarc Zyngier writeq_relaxed(val, rbase + GICR_PENDBASER); 1101241a386cSMarc Zyngier tmp = readq_relaxed(rbase + GICR_PENDBASER); 1102241a386cSMarc Zyngier 1103241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 1104241a386cSMarc Zyngier /* 1105241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 1106241a386cSMarc Zyngier * cacheability attributes as well. 1107241a386cSMarc Zyngier */ 1108241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 1109241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 1110241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 1111241a386cSMarc Zyngier writeq_relaxed(val, rbase + GICR_PENDBASER); 1112241a386cSMarc Zyngier } 11131ac19ca6SMarc Zyngier 11141ac19ca6SMarc Zyngier /* Enable LPIs */ 11151ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 11161ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 11171ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 11181ac19ca6SMarc Zyngier 11191ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 11201ac19ca6SMarc Zyngier dsb(sy); 11211ac19ca6SMarc Zyngier } 11221ac19ca6SMarc Zyngier 11231ac19ca6SMarc Zyngier static void its_cpu_init_collection(void) 11241ac19ca6SMarc Zyngier { 11251ac19ca6SMarc Zyngier struct its_node *its; 11261ac19ca6SMarc Zyngier int cpu; 11271ac19ca6SMarc Zyngier 11281ac19ca6SMarc Zyngier spin_lock(&its_lock); 11291ac19ca6SMarc Zyngier cpu = smp_processor_id(); 11301ac19ca6SMarc Zyngier 11311ac19ca6SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 11321ac19ca6SMarc Zyngier u64 target; 11331ac19ca6SMarc Zyngier 1134fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 1135fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1136fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 1137fbf8f40eSGanapatrao Kulkarni 1138fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 1139fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 1140fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 1141fbf8f40eSGanapatrao Kulkarni continue; 1142fbf8f40eSGanapatrao Kulkarni } 1143fbf8f40eSGanapatrao Kulkarni 11441ac19ca6SMarc Zyngier /* 11451ac19ca6SMarc Zyngier * We now have to bind each collection to its target 11461ac19ca6SMarc Zyngier * redistributor. 11471ac19ca6SMarc Zyngier */ 11481ac19ca6SMarc Zyngier if (readq_relaxed(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 11491ac19ca6SMarc Zyngier /* 11501ac19ca6SMarc Zyngier * This ITS wants the physical address of the 11511ac19ca6SMarc Zyngier * redistributor. 11521ac19ca6SMarc Zyngier */ 11531ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 11541ac19ca6SMarc Zyngier } else { 11551ac19ca6SMarc Zyngier /* 11561ac19ca6SMarc Zyngier * This ITS wants a linear CPU number. 11571ac19ca6SMarc Zyngier */ 11581ac19ca6SMarc Zyngier target = readq_relaxed(gic_data_rdist_rd_base() + GICR_TYPER); 1159263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 11601ac19ca6SMarc Zyngier } 11611ac19ca6SMarc Zyngier 11621ac19ca6SMarc Zyngier /* Perform collection mapping */ 11631ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 11641ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 11651ac19ca6SMarc Zyngier 11661ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 11671ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 11681ac19ca6SMarc Zyngier } 11691ac19ca6SMarc Zyngier 11701ac19ca6SMarc Zyngier spin_unlock(&its_lock); 11711ac19ca6SMarc Zyngier } 117284a6a2e7SMarc Zyngier 117384a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 117484a6a2e7SMarc Zyngier { 117584a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 11763e39e8f5SMarc Zyngier unsigned long flags; 117784a6a2e7SMarc Zyngier 11783e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 117984a6a2e7SMarc Zyngier 118084a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 118184a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 118284a6a2e7SMarc Zyngier its_dev = tmp; 118384a6a2e7SMarc Zyngier break; 118484a6a2e7SMarc Zyngier } 118584a6a2e7SMarc Zyngier } 118684a6a2e7SMarc Zyngier 11873e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 118884a6a2e7SMarc Zyngier 118984a6a2e7SMarc Zyngier return its_dev; 119084a6a2e7SMarc Zyngier } 119184a6a2e7SMarc Zyngier 1192466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 1193466b7d16SShanker Donthineni { 1194466b7d16SShanker Donthineni int i; 1195466b7d16SShanker Donthineni 1196466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 1197466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 1198466b7d16SShanker Donthineni return &its->tables[i]; 1199466b7d16SShanker Donthineni } 1200466b7d16SShanker Donthineni 1201466b7d16SShanker Donthineni return NULL; 1202466b7d16SShanker Donthineni } 1203466b7d16SShanker Donthineni 120484a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 120584a6a2e7SMarc Zyngier int nvecs) 120684a6a2e7SMarc Zyngier { 1207466b7d16SShanker Donthineni struct its_baser *baser; 120884a6a2e7SMarc Zyngier struct its_device *dev; 120984a6a2e7SMarc Zyngier unsigned long *lpi_map; 12103e39e8f5SMarc Zyngier unsigned long flags; 1211591e5becSMarc Zyngier u16 *col_map = NULL; 121284a6a2e7SMarc Zyngier void *itt; 121384a6a2e7SMarc Zyngier int lpi_base; 121484a6a2e7SMarc Zyngier int nr_lpis; 1215c8481267SMarc Zyngier int nr_ites; 121684a6a2e7SMarc Zyngier int sz; 121784a6a2e7SMarc Zyngier 1218466b7d16SShanker Donthineni baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 1219466b7d16SShanker Donthineni 1220466b7d16SShanker Donthineni /* Don't allow 'dev_id' that exceeds single, flat table limit */ 1221466b7d16SShanker Donthineni if (baser) { 1222466b7d16SShanker Donthineni if (dev_id >= (PAGE_ORDER_TO_SIZE(baser->order) / 1223466b7d16SShanker Donthineni GITS_BASER_ENTRY_SIZE(baser->val))) 1224466b7d16SShanker Donthineni return NULL; 1225466b7d16SShanker Donthineni } else if (ilog2(dev_id) >= its->device_ids) 1226466b7d16SShanker Donthineni return NULL; 1227466b7d16SShanker Donthineni 122884a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1229c8481267SMarc Zyngier /* 1230c8481267SMarc Zyngier * At least one bit of EventID is being used, hence a minimum 1231c8481267SMarc Zyngier * of two entries. No, the architecture doesn't let you 1232c8481267SMarc Zyngier * express an ITT with a single entry. 1233c8481267SMarc Zyngier */ 123496555c47SWill Deacon nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 1235c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 123684a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 12376c834125SYun Wu itt = kzalloc(sz, GFP_KERNEL); 123884a6a2e7SMarc Zyngier lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 1239591e5becSMarc Zyngier if (lpi_map) 1240591e5becSMarc Zyngier col_map = kzalloc(sizeof(*col_map) * nr_lpis, GFP_KERNEL); 124184a6a2e7SMarc Zyngier 1242591e5becSMarc Zyngier if (!dev || !itt || !lpi_map || !col_map) { 124384a6a2e7SMarc Zyngier kfree(dev); 124484a6a2e7SMarc Zyngier kfree(itt); 124584a6a2e7SMarc Zyngier kfree(lpi_map); 1246591e5becSMarc Zyngier kfree(col_map); 124784a6a2e7SMarc Zyngier return NULL; 124884a6a2e7SMarc Zyngier } 124984a6a2e7SMarc Zyngier 12505a9a8915SMarc Zyngier __flush_dcache_area(itt, sz); 12515a9a8915SMarc Zyngier 125284a6a2e7SMarc Zyngier dev->its = its; 125384a6a2e7SMarc Zyngier dev->itt = itt; 1254c8481267SMarc Zyngier dev->nr_ites = nr_ites; 1255591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 1256591e5becSMarc Zyngier dev->event_map.col_map = col_map; 1257591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 1258591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 125984a6a2e7SMarc Zyngier dev->device_id = dev_id; 126084a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 126184a6a2e7SMarc Zyngier 12623e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 126384a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 12643e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 126584a6a2e7SMarc Zyngier 126684a6a2e7SMarc Zyngier /* Map device to its ITT */ 126784a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 126884a6a2e7SMarc Zyngier 126984a6a2e7SMarc Zyngier return dev; 127084a6a2e7SMarc Zyngier } 127184a6a2e7SMarc Zyngier 127284a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 127384a6a2e7SMarc Zyngier { 12743e39e8f5SMarc Zyngier unsigned long flags; 12753e39e8f5SMarc Zyngier 12763e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 127784a6a2e7SMarc Zyngier list_del(&its_dev->entry); 12783e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 127984a6a2e7SMarc Zyngier kfree(its_dev->itt); 128084a6a2e7SMarc Zyngier kfree(its_dev); 128184a6a2e7SMarc Zyngier } 1282b48ac83dSMarc Zyngier 1283b48ac83dSMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) 1284b48ac83dSMarc Zyngier { 1285b48ac83dSMarc Zyngier int idx; 1286b48ac83dSMarc Zyngier 1287591e5becSMarc Zyngier idx = find_first_zero_bit(dev->event_map.lpi_map, 1288591e5becSMarc Zyngier dev->event_map.nr_lpis); 1289591e5becSMarc Zyngier if (idx == dev->event_map.nr_lpis) 1290b48ac83dSMarc Zyngier return -ENOSPC; 1291b48ac83dSMarc Zyngier 1292591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 1293591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 1294b48ac83dSMarc Zyngier 1295b48ac83dSMarc Zyngier return 0; 1296b48ac83dSMarc Zyngier } 1297b48ac83dSMarc Zyngier 129854456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 1299b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 1300b48ac83dSMarc Zyngier { 1301b48ac83dSMarc Zyngier struct its_node *its; 1302b48ac83dSMarc Zyngier struct its_device *its_dev; 130354456db9SMarc Zyngier struct msi_domain_info *msi_info; 130454456db9SMarc Zyngier u32 dev_id; 1305b48ac83dSMarc Zyngier 130654456db9SMarc Zyngier /* 130754456db9SMarc Zyngier * We ignore "dev" entierely, and rely on the dev_id that has 130854456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 130954456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 131054456db9SMarc Zyngier * are built on top of the ITS. 131154456db9SMarc Zyngier */ 131254456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 131354456db9SMarc Zyngier 131454456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 131554456db9SMarc Zyngier its = msi_info->data; 131654456db9SMarc Zyngier 1317f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 1318e8137f4fSMarc Zyngier if (its_dev) { 1319e8137f4fSMarc Zyngier /* 1320e8137f4fSMarc Zyngier * We already have seen this ID, probably through 1321e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 1322e8137f4fSMarc Zyngier * create the device. 1323e8137f4fSMarc Zyngier */ 1324f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 1325e8137f4fSMarc Zyngier goto out; 1326e8137f4fSMarc Zyngier } 1327b48ac83dSMarc Zyngier 1328f130420eSMarc Zyngier its_dev = its_create_device(its, dev_id, nvec); 1329b48ac83dSMarc Zyngier if (!its_dev) 1330b48ac83dSMarc Zyngier return -ENOMEM; 1331b48ac83dSMarc Zyngier 1332f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 1333e8137f4fSMarc Zyngier out: 1334b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 1335b48ac83dSMarc Zyngier return 0; 1336b48ac83dSMarc Zyngier } 1337b48ac83dSMarc Zyngier 133854456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 133954456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 134054456db9SMarc Zyngier }; 134154456db9SMarc Zyngier 1342b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 1343b48ac83dSMarc Zyngier unsigned int virq, 1344b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 1345b48ac83dSMarc Zyngier { 1346f833f57fSMarc Zyngier struct irq_fwspec fwspec; 1347b48ac83dSMarc Zyngier 1348f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 1349f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 1350f833f57fSMarc Zyngier fwspec.param_count = 3; 1351f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 1352f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 1353f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 1354f833f57fSMarc Zyngier } else { 1355f833f57fSMarc Zyngier return -EINVAL; 1356f833f57fSMarc Zyngier } 1357b48ac83dSMarc Zyngier 1358f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 1359b48ac83dSMarc Zyngier } 1360b48ac83dSMarc Zyngier 1361b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 1362b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 1363b48ac83dSMarc Zyngier { 1364b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 1365b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 1366b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 1367b48ac83dSMarc Zyngier int err; 1368b48ac83dSMarc Zyngier int i; 1369b48ac83dSMarc Zyngier 1370b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1371b48ac83dSMarc Zyngier err = its_alloc_device_irq(its_dev, &hwirq); 1372b48ac83dSMarc Zyngier if (err) 1373b48ac83dSMarc Zyngier return err; 1374b48ac83dSMarc Zyngier 1375b48ac83dSMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); 1376b48ac83dSMarc Zyngier if (err) 1377b48ac83dSMarc Zyngier return err; 1378b48ac83dSMarc Zyngier 1379b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 1380b48ac83dSMarc Zyngier hwirq, &its_irq_chip, its_dev); 1381f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 1382591e5becSMarc Zyngier (int)(hwirq - its_dev->event_map.lpi_base), 1383591e5becSMarc Zyngier (int) hwirq, virq + i); 1384b48ac83dSMarc Zyngier } 1385b48ac83dSMarc Zyngier 1386b48ac83dSMarc Zyngier return 0; 1387b48ac83dSMarc Zyngier } 1388b48ac83dSMarc Zyngier 1389aca268dfSMarc Zyngier static void its_irq_domain_activate(struct irq_domain *domain, 1390aca268dfSMarc Zyngier struct irq_data *d) 1391aca268dfSMarc Zyngier { 1392aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1393aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 1394fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1395fbf8f40eSGanapatrao Kulkarni 1396fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 1397fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 1398fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1399aca268dfSMarc Zyngier 1400591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 1401fbf8f40eSGanapatrao Kulkarni its_dev->event_map.col_map[event] = cpumask_first(cpu_mask); 1402591e5becSMarc Zyngier 1403aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 1404aca268dfSMarc Zyngier its_send_mapvi(its_dev, d->hwirq, event); 1405aca268dfSMarc Zyngier } 1406aca268dfSMarc Zyngier 1407aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 1408aca268dfSMarc Zyngier struct irq_data *d) 1409aca268dfSMarc Zyngier { 1410aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1411aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 1412aca268dfSMarc Zyngier 1413aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 1414aca268dfSMarc Zyngier its_send_discard(its_dev, event); 1415aca268dfSMarc Zyngier } 1416aca268dfSMarc Zyngier 1417b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 1418b48ac83dSMarc Zyngier unsigned int nr_irqs) 1419b48ac83dSMarc Zyngier { 1420b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 1421b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1422b48ac83dSMarc Zyngier int i; 1423b48ac83dSMarc Zyngier 1424b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 1425b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 1426b48ac83dSMarc Zyngier virq + i); 1427aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 1428b48ac83dSMarc Zyngier 1429b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 1430591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 1431b48ac83dSMarc Zyngier 1432b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 14332da39949SMarc Zyngier irq_domain_reset_irq_data(data); 1434b48ac83dSMarc Zyngier } 1435b48ac83dSMarc Zyngier 1436b48ac83dSMarc Zyngier /* If all interrupts have been freed, start mopping the floor */ 1437591e5becSMarc Zyngier if (bitmap_empty(its_dev->event_map.lpi_map, 1438591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 1439591e5becSMarc Zyngier its_lpi_free(&its_dev->event_map); 1440b48ac83dSMarc Zyngier 1441b48ac83dSMarc Zyngier /* Unmap device/itt */ 1442b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 1443b48ac83dSMarc Zyngier its_free_device(its_dev); 1444b48ac83dSMarc Zyngier } 1445b48ac83dSMarc Zyngier 1446b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 1447b48ac83dSMarc Zyngier } 1448b48ac83dSMarc Zyngier 1449b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 1450b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 1451b48ac83dSMarc Zyngier .free = its_irq_domain_free, 1452aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 1453aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 1454b48ac83dSMarc Zyngier }; 14554c21f3c2SMarc Zyngier 14564559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 14574559fbb3SYun Wu { 14584559fbb3SYun Wu u32 count = 1000000; /* 1s */ 14594559fbb3SYun Wu u32 val; 14604559fbb3SYun Wu 14614559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 14624559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 14634559fbb3SYun Wu return 0; 14644559fbb3SYun Wu 14654559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 14664559fbb3SYun Wu val &= ~GITS_CTLR_ENABLE; 14674559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 14684559fbb3SYun Wu 14694559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 14704559fbb3SYun Wu while (1) { 14714559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 14724559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 14734559fbb3SYun Wu return 0; 14744559fbb3SYun Wu 14754559fbb3SYun Wu count--; 14764559fbb3SYun Wu if (!count) 14774559fbb3SYun Wu return -EBUSY; 14784559fbb3SYun Wu 14794559fbb3SYun Wu cpu_relax(); 14804559fbb3SYun Wu udelay(1); 14814559fbb3SYun Wu } 14824559fbb3SYun Wu } 14834559fbb3SYun Wu 148494100970SRobert Richter static void __maybe_unused its_enable_quirk_cavium_22375(void *data) 148594100970SRobert Richter { 148694100970SRobert Richter struct its_node *its = data; 148794100970SRobert Richter 148894100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 148994100970SRobert Richter } 149094100970SRobert Richter 1491fbf8f40eSGanapatrao Kulkarni static void __maybe_unused its_enable_quirk_cavium_23144(void *data) 1492fbf8f40eSGanapatrao Kulkarni { 1493fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 1494fbf8f40eSGanapatrao Kulkarni 1495fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 1496fbf8f40eSGanapatrao Kulkarni } 1497fbf8f40eSGanapatrao Kulkarni 149867510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 149994100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 150094100970SRobert Richter { 150194100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 150294100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 150394100970SRobert Richter .mask = 0xffff0fff, 150494100970SRobert Richter .init = its_enable_quirk_cavium_22375, 150594100970SRobert Richter }, 150694100970SRobert Richter #endif 1507fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 1508fbf8f40eSGanapatrao Kulkarni { 1509fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 1510fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 1511fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 1512fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 1513fbf8f40eSGanapatrao Kulkarni }, 1514fbf8f40eSGanapatrao Kulkarni #endif 151567510ccaSRobert Richter { 151667510ccaSRobert Richter } 151767510ccaSRobert Richter }; 151867510ccaSRobert Richter 151967510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 152067510ccaSRobert Richter { 152167510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 152267510ccaSRobert Richter 152367510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 152467510ccaSRobert Richter } 152567510ccaSRobert Richter 152604a0e4deSTomasz Nowicki static int __init its_probe(struct device_node *node, 152704a0e4deSTomasz Nowicki struct irq_domain *parent) 15284c21f3c2SMarc Zyngier { 15294c21f3c2SMarc Zyngier struct resource res; 15304c21f3c2SMarc Zyngier struct its_node *its; 15314c21f3c2SMarc Zyngier void __iomem *its_base; 153254456db9SMarc Zyngier struct irq_domain *inner_domain; 15334c21f3c2SMarc Zyngier u32 val; 15344c21f3c2SMarc Zyngier u64 baser, tmp; 15354c21f3c2SMarc Zyngier int err; 15364c21f3c2SMarc Zyngier 15374c21f3c2SMarc Zyngier err = of_address_to_resource(node, 0, &res); 15384c21f3c2SMarc Zyngier if (err) { 15394c21f3c2SMarc Zyngier pr_warn("%s: no regs?\n", node->full_name); 15404c21f3c2SMarc Zyngier return -ENXIO; 15414c21f3c2SMarc Zyngier } 15424c21f3c2SMarc Zyngier 15434c21f3c2SMarc Zyngier its_base = ioremap(res.start, resource_size(&res)); 15444c21f3c2SMarc Zyngier if (!its_base) { 15454c21f3c2SMarc Zyngier pr_warn("%s: unable to map registers\n", node->full_name); 15464c21f3c2SMarc Zyngier return -ENOMEM; 15474c21f3c2SMarc Zyngier } 15484c21f3c2SMarc Zyngier 15494c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 15504c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 15514c21f3c2SMarc Zyngier pr_warn("%s: no ITS detected, giving up\n", node->full_name); 15524c21f3c2SMarc Zyngier err = -ENODEV; 15534c21f3c2SMarc Zyngier goto out_unmap; 15544c21f3c2SMarc Zyngier } 15554c21f3c2SMarc Zyngier 15564559fbb3SYun Wu err = its_force_quiescent(its_base); 15574559fbb3SYun Wu if (err) { 15584559fbb3SYun Wu pr_warn("%s: failed to quiesce, giving up\n", 15594559fbb3SYun Wu node->full_name); 15604559fbb3SYun Wu goto out_unmap; 15614559fbb3SYun Wu } 15624559fbb3SYun Wu 15634c21f3c2SMarc Zyngier pr_info("ITS: %s\n", node->full_name); 15644c21f3c2SMarc Zyngier 15654c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 15664c21f3c2SMarc Zyngier if (!its) { 15674c21f3c2SMarc Zyngier err = -ENOMEM; 15684c21f3c2SMarc Zyngier goto out_unmap; 15694c21f3c2SMarc Zyngier } 15704c21f3c2SMarc Zyngier 15714c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 15724c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 15734c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 15744c21f3c2SMarc Zyngier its->base = its_base; 15754c21f3c2SMarc Zyngier its->phys_base = res.start; 15764c21f3c2SMarc Zyngier its->ite_size = ((readl_relaxed(its_base + GITS_TYPER) >> 4) & 0xf) + 1; 1577fbf8f40eSGanapatrao Kulkarni its->numa_node = of_node_to_nid(node); 15784c21f3c2SMarc Zyngier 15794c21f3c2SMarc Zyngier its->cmd_base = kzalloc(ITS_CMD_QUEUE_SZ, GFP_KERNEL); 15804c21f3c2SMarc Zyngier if (!its->cmd_base) { 15814c21f3c2SMarc Zyngier err = -ENOMEM; 15824c21f3c2SMarc Zyngier goto out_free_its; 15834c21f3c2SMarc Zyngier } 15844c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 15854c21f3c2SMarc Zyngier 158667510ccaSRobert Richter its_enable_quirks(its); 158767510ccaSRobert Richter 1588841514abSMarc Zyngier err = its_alloc_tables(node->full_name, its); 15894c21f3c2SMarc Zyngier if (err) 15904c21f3c2SMarc Zyngier goto out_free_cmd; 15914c21f3c2SMarc Zyngier 15924c21f3c2SMarc Zyngier err = its_alloc_collections(its); 15934c21f3c2SMarc Zyngier if (err) 15944c21f3c2SMarc Zyngier goto out_free_tables; 15954c21f3c2SMarc Zyngier 15964c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 15974c21f3c2SMarc Zyngier GITS_CBASER_WaWb | 15984c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 15994c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 16004c21f3c2SMarc Zyngier GITS_CBASER_VALID); 16014c21f3c2SMarc Zyngier 16024c21f3c2SMarc Zyngier writeq_relaxed(baser, its->base + GITS_CBASER); 16034c21f3c2SMarc Zyngier tmp = readq_relaxed(its->base + GITS_CBASER); 16044c21f3c2SMarc Zyngier 16054ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 1606241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 1607241a386cSMarc Zyngier /* 1608241a386cSMarc Zyngier * The HW reports non-shareable, we must 1609241a386cSMarc Zyngier * remove the cacheability attributes as 1610241a386cSMarc Zyngier * well. 1611241a386cSMarc Zyngier */ 1612241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 1613241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 1614241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 1615241a386cSMarc Zyngier writeq_relaxed(baser, its->base + GITS_CBASER); 1616241a386cSMarc Zyngier } 16174c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 16184c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 16194c21f3c2SMarc Zyngier } 16204c21f3c2SMarc Zyngier 1621241a386cSMarc Zyngier writeq_relaxed(0, its->base + GITS_CWRITER); 1622241a386cSMarc Zyngier writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR); 1623241a386cSMarc Zyngier 1624841514abSMarc Zyngier if (of_property_read_bool(node, "msi-controller")) { 162554456db9SMarc Zyngier struct msi_domain_info *info; 162654456db9SMarc Zyngier 162754456db9SMarc Zyngier info = kzalloc(sizeof(*info), GFP_KERNEL); 162854456db9SMarc Zyngier if (!info) { 162954456db9SMarc Zyngier err = -ENOMEM; 163054456db9SMarc Zyngier goto out_free_tables; 163154456db9SMarc Zyngier } 163254456db9SMarc Zyngier 1633841514abSMarc Zyngier inner_domain = irq_domain_add_tree(node, &its_domain_ops, its); 1634841514abSMarc Zyngier if (!inner_domain) { 16354c21f3c2SMarc Zyngier err = -ENOMEM; 163654456db9SMarc Zyngier kfree(info); 16374c21f3c2SMarc Zyngier goto out_free_tables; 16384c21f3c2SMarc Zyngier } 16394c21f3c2SMarc Zyngier 1640841514abSMarc Zyngier inner_domain->parent = parent; 1641841514abSMarc Zyngier inner_domain->bus_token = DOMAIN_BUS_NEXUS; 164254456db9SMarc Zyngier info->ops = &its_msi_domain_ops; 164354456db9SMarc Zyngier info->data = its; 164454456db9SMarc Zyngier inner_domain->host_data = info; 16454c21f3c2SMarc Zyngier } 16464c21f3c2SMarc Zyngier 16474c21f3c2SMarc Zyngier spin_lock(&its_lock); 16484c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 16494c21f3c2SMarc Zyngier spin_unlock(&its_lock); 16504c21f3c2SMarc Zyngier 16514c21f3c2SMarc Zyngier return 0; 16524c21f3c2SMarc Zyngier 16534c21f3c2SMarc Zyngier out_free_tables: 16544c21f3c2SMarc Zyngier its_free_tables(its); 16554c21f3c2SMarc Zyngier out_free_cmd: 16564c21f3c2SMarc Zyngier kfree(its->cmd_base); 16574c21f3c2SMarc Zyngier out_free_its: 16584c21f3c2SMarc Zyngier kfree(its); 16594c21f3c2SMarc Zyngier out_unmap: 16604c21f3c2SMarc Zyngier iounmap(its_base); 16614c21f3c2SMarc Zyngier pr_err("ITS: failed probing %s (%d)\n", node->full_name, err); 16624c21f3c2SMarc Zyngier return err; 16634c21f3c2SMarc Zyngier } 16644c21f3c2SMarc Zyngier 16654c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 16664c21f3c2SMarc Zyngier { 16674c21f3c2SMarc Zyngier return !!(readl_relaxed(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 16684c21f3c2SMarc Zyngier } 16694c21f3c2SMarc Zyngier 16704c21f3c2SMarc Zyngier int its_cpu_init(void) 16714c21f3c2SMarc Zyngier { 167216acae72SVladimir Murzin if (!list_empty(&its_nodes)) { 16734c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 16744c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 16754c21f3c2SMarc Zyngier return -ENXIO; 16764c21f3c2SMarc Zyngier } 16774c21f3c2SMarc Zyngier its_cpu_init_lpis(); 16784c21f3c2SMarc Zyngier its_cpu_init_collection(); 16794c21f3c2SMarc Zyngier } 16804c21f3c2SMarc Zyngier 16814c21f3c2SMarc Zyngier return 0; 16824c21f3c2SMarc Zyngier } 16834c21f3c2SMarc Zyngier 16844c21f3c2SMarc Zyngier static struct of_device_id its_device_id[] = { 16854c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 16864c21f3c2SMarc Zyngier {}, 16874c21f3c2SMarc Zyngier }; 16884c21f3c2SMarc Zyngier 168904a0e4deSTomasz Nowicki int __init its_init(struct device_node *node, struct rdists *rdists, 16904c21f3c2SMarc Zyngier struct irq_domain *parent_domain) 16914c21f3c2SMarc Zyngier { 16924c21f3c2SMarc Zyngier struct device_node *np; 16934c21f3c2SMarc Zyngier 16944c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 16954c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 16964c21f3c2SMarc Zyngier its_probe(np, parent_domain); 16974c21f3c2SMarc Zyngier } 16984c21f3c2SMarc Zyngier 16994c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 17004c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 17014c21f3c2SMarc Zyngier return -ENXIO; 17024c21f3c2SMarc Zyngier } 17034c21f3c2SMarc Zyngier 17044c21f3c2SMarc Zyngier gic_rdists = rdists; 17054c21f3c2SMarc Zyngier its_alloc_lpi_tables(); 17064c21f3c2SMarc Zyngier its_lpi_init(rdists->id_bits); 17074c21f3c2SMarc Zyngier 17084c21f3c2SMarc Zyngier return 0; 17094c21f3c2SMarc Zyngier } 1710