1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2cc2d3216SMarc Zyngier /* 3d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 4cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 5cc2d3216SMarc Zyngier */ 6cc2d3216SMarc Zyngier 73f010cf1STomasz Nowicki #include <linux/acpi.h> 88d3554b8SHanjun Guo #include <linux/acpi_iort.h> 9cc2d3216SMarc Zyngier #include <linux/bitmap.h> 10cc2d3216SMarc Zyngier #include <linux/cpu.h> 11c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 12cc2d3216SMarc Zyngier #include <linux/delay.h> 1344bb7e24SRobin Murphy #include <linux/dma-iommu.h> 143fb68faeSMarc Zyngier #include <linux/efi.h> 15cc2d3216SMarc Zyngier #include <linux/interrupt.h> 163f010cf1STomasz Nowicki #include <linux/irqdomain.h> 17880cb3cdSMarc Zyngier #include <linux/list.h> 18cc2d3216SMarc Zyngier #include <linux/log2.h> 195e2c9f9aSMarc Zyngier #include <linux/memblock.h> 20cc2d3216SMarc Zyngier #include <linux/mm.h> 21cc2d3216SMarc Zyngier #include <linux/msi.h> 22cc2d3216SMarc Zyngier #include <linux/of.h> 23cc2d3216SMarc Zyngier #include <linux/of_address.h> 24cc2d3216SMarc Zyngier #include <linux/of_irq.h> 25cc2d3216SMarc Zyngier #include <linux/of_pci.h> 26cc2d3216SMarc Zyngier #include <linux/of_platform.h> 27cc2d3216SMarc Zyngier #include <linux/percpu.h> 28cc2d3216SMarc Zyngier #include <linux/slab.h> 29dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 30cc2d3216SMarc Zyngier 3141a83e06SJoel Porquet #include <linux/irqchip.h> 32cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 33c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 34cc2d3216SMarc Zyngier 35cc2d3216SMarc Zyngier #include <asm/cputype.h> 36cc2d3216SMarc Zyngier #include <asm/exception.h> 37cc2d3216SMarc Zyngier 3867510ccaSRobert Richter #include "irq-gic-common.h" 3967510ccaSRobert Richter 4094100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4194100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 42fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 43dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 44cc2d3216SMarc Zyngier 45c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 46c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 47c48ed51cSMarc Zyngier 48a13b0404SMarc Zyngier static u32 lpi_id_bits; 49a13b0404SMarc Zyngier 50a13b0404SMarc Zyngier /* 51a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 52a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 53a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 54a13b0404SMarc Zyngier */ 55a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 56a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 57a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 58a13b0404SMarc Zyngier 592130b789SJulien Thierry #define LPI_PROP_DEFAULT_PRIO GICD_INT_DEF_PRI 60a13b0404SMarc Zyngier 61cc2d3216SMarc Zyngier /* 62cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 63cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 64cc2d3216SMarc Zyngier * CPU. 65cc2d3216SMarc Zyngier */ 66cc2d3216SMarc Zyngier struct its_collection { 67cc2d3216SMarc Zyngier u64 target_address; 68cc2d3216SMarc Zyngier u16 col_id; 69cc2d3216SMarc Zyngier }; 70cc2d3216SMarc Zyngier 71cc2d3216SMarc Zyngier /* 729347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 739347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 74466b7d16SShanker Donthineni */ 75466b7d16SShanker Donthineni struct its_baser { 76466b7d16SShanker Donthineni void *base; 77466b7d16SShanker Donthineni u64 val; 78466b7d16SShanker Donthineni u32 order; 799347359aSShanker Donthineni u32 psz; 80466b7d16SShanker Donthineni }; 81466b7d16SShanker Donthineni 82558b0165SArd Biesheuvel struct its_device; 83558b0165SArd Biesheuvel 84466b7d16SShanker Donthineni /* 85cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 86841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 87841514abSMarc Zyngier * list of devices writing to it. 889791ec7dSMarc Zyngier * 899791ec7dSMarc Zyngier * dev_alloc_lock has to be taken for device allocations, while the 909791ec7dSMarc Zyngier * spinlock must be taken to parse data structures such as the device 919791ec7dSMarc Zyngier * list. 92cc2d3216SMarc Zyngier */ 93cc2d3216SMarc Zyngier struct its_node { 94cc2d3216SMarc Zyngier raw_spinlock_t lock; 959791ec7dSMarc Zyngier struct mutex dev_alloc_lock; 96cc2d3216SMarc Zyngier struct list_head entry; 97cc2d3216SMarc Zyngier void __iomem *base; 98db40f0a7STomasz Nowicki phys_addr_t phys_base; 99cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 100cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 101466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 102cc2d3216SMarc Zyngier struct its_collection *collections; 103558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 104558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 105dba0bc7bSDerek Basehore u64 cbaser_save; 106dba0bc7bSDerek Basehore u32 ctlr_save; 107cc2d3216SMarc Zyngier struct list_head its_device_list; 108cc2d3216SMarc Zyngier u64 flags; 109debf6d02SMarc Zyngier unsigned long list_nr; 110cc2d3216SMarc Zyngier u32 ite_size; 111466b7d16SShanker Donthineni u32 device_ids; 112fbf8f40eSGanapatrao Kulkarni int numa_node; 113558b0165SArd Biesheuvel unsigned int msi_domain_flags; 114558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1153dfa576bSMarc Zyngier bool is_v4; 1165c9a882eSMarc Zyngier int vlpi_redist_offset; 117cc2d3216SMarc Zyngier }; 118cc2d3216SMarc Zyngier 119cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 120cc2d3216SMarc Zyngier 12132bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 12232bd44dcSShanker Donthineni #define ITS_MAX_VPEID_BITS (16) 12332bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 12432bd44dcSShanker Donthineni 1252eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1262eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1272eca0d6cSShanker Donthineni 128591e5becSMarc Zyngier struct event_lpi_map { 129591e5becSMarc Zyngier unsigned long *lpi_map; 130591e5becSMarc Zyngier u16 *col_map; 131591e5becSMarc Zyngier irq_hw_number_t lpi_base; 132591e5becSMarc Zyngier int nr_lpis; 133d011e4e6SMarc Zyngier struct mutex vlpi_lock; 134d011e4e6SMarc Zyngier struct its_vm *vm; 135d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 136d011e4e6SMarc Zyngier int nr_vlpis; 137591e5becSMarc Zyngier }; 138591e5becSMarc Zyngier 139cc2d3216SMarc Zyngier /* 140d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 141d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 142d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 143d011e4e6SMarc Zyngier * indicates which one. 144cc2d3216SMarc Zyngier */ 145cc2d3216SMarc Zyngier struct its_device { 146cc2d3216SMarc Zyngier struct list_head entry; 147cc2d3216SMarc Zyngier struct its_node *its; 148591e5becSMarc Zyngier struct event_lpi_map event_map; 149cc2d3216SMarc Zyngier void *itt; 150cc2d3216SMarc Zyngier u32 nr_ites; 151cc2d3216SMarc Zyngier u32 device_id; 1529791ec7dSMarc Zyngier bool shared; 153cc2d3216SMarc Zyngier }; 154cc2d3216SMarc Zyngier 15520b3d54eSMarc Zyngier static struct { 15620b3d54eSMarc Zyngier raw_spinlock_t lock; 15720b3d54eSMarc Zyngier struct its_device *dev; 15820b3d54eSMarc Zyngier struct its_vpe **vpes; 15920b3d54eSMarc Zyngier int next_victim; 16020b3d54eSMarc Zyngier } vpe_proxy; 16120b3d54eSMarc Zyngier 1621ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 163a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1641ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 165db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1661ac19ca6SMarc Zyngier 1673dfa576bSMarc Zyngier static unsigned long its_list_map; 1683171a47aSMarc Zyngier static u16 vmovp_seq_num; 1693171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1703171a47aSMarc Zyngier 1717d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1723dfa576bSMarc Zyngier 1731ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 17411e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1751ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 176e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1771ac19ca6SMarc Zyngier 178591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 179591e5becSMarc Zyngier u32 event) 180591e5becSMarc Zyngier { 181591e5becSMarc Zyngier struct its_node *its = its_dev->its; 182591e5becSMarc Zyngier 183591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 184591e5becSMarc Zyngier } 185591e5becSMarc Zyngier 18683559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 18783559b47SMarc Zyngier { 18820faba84SJoe Perches if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(15, 0))) 18983559b47SMarc Zyngier return NULL; 19083559b47SMarc Zyngier 19183559b47SMarc Zyngier return col; 19283559b47SMarc Zyngier } 19383559b47SMarc Zyngier 194205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 195205e065dSMarc Zyngier { 196205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 197205e065dSMarc Zyngier return vpe; 198205e065dSMarc Zyngier 199205e065dSMarc Zyngier return NULL; 200205e065dSMarc Zyngier } 201205e065dSMarc Zyngier 202cc2d3216SMarc Zyngier /* 203cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 204cc2d3216SMarc Zyngier * block. 205cc2d3216SMarc Zyngier */ 206cc2d3216SMarc Zyngier struct its_cmd_desc { 207cc2d3216SMarc Zyngier union { 208cc2d3216SMarc Zyngier struct { 209cc2d3216SMarc Zyngier struct its_device *dev; 210cc2d3216SMarc Zyngier u32 event_id; 211cc2d3216SMarc Zyngier } its_inv_cmd; 212cc2d3216SMarc Zyngier 213cc2d3216SMarc Zyngier struct { 214cc2d3216SMarc Zyngier struct its_device *dev; 215cc2d3216SMarc Zyngier u32 event_id; 2168d85dcedSMarc Zyngier } its_clear_cmd; 2178d85dcedSMarc Zyngier 2188d85dcedSMarc Zyngier struct { 2198d85dcedSMarc Zyngier struct its_device *dev; 2208d85dcedSMarc Zyngier u32 event_id; 221cc2d3216SMarc Zyngier } its_int_cmd; 222cc2d3216SMarc Zyngier 223cc2d3216SMarc Zyngier struct { 224cc2d3216SMarc Zyngier struct its_device *dev; 225cc2d3216SMarc Zyngier int valid; 226cc2d3216SMarc Zyngier } its_mapd_cmd; 227cc2d3216SMarc Zyngier 228cc2d3216SMarc Zyngier struct { 229cc2d3216SMarc Zyngier struct its_collection *col; 230cc2d3216SMarc Zyngier int valid; 231cc2d3216SMarc Zyngier } its_mapc_cmd; 232cc2d3216SMarc Zyngier 233cc2d3216SMarc Zyngier struct { 234cc2d3216SMarc Zyngier struct its_device *dev; 235cc2d3216SMarc Zyngier u32 phys_id; 236cc2d3216SMarc Zyngier u32 event_id; 2376a25ad3aSMarc Zyngier } its_mapti_cmd; 238cc2d3216SMarc Zyngier 239cc2d3216SMarc Zyngier struct { 240cc2d3216SMarc Zyngier struct its_device *dev; 241cc2d3216SMarc Zyngier struct its_collection *col; 242591e5becSMarc Zyngier u32 event_id; 243cc2d3216SMarc Zyngier } its_movi_cmd; 244cc2d3216SMarc Zyngier 245cc2d3216SMarc Zyngier struct { 246cc2d3216SMarc Zyngier struct its_device *dev; 247cc2d3216SMarc Zyngier u32 event_id; 248cc2d3216SMarc Zyngier } its_discard_cmd; 249cc2d3216SMarc Zyngier 250cc2d3216SMarc Zyngier struct { 251cc2d3216SMarc Zyngier struct its_collection *col; 252cc2d3216SMarc Zyngier } its_invall_cmd; 253d011e4e6SMarc Zyngier 254d011e4e6SMarc Zyngier struct { 255d011e4e6SMarc Zyngier struct its_vpe *vpe; 256eb78192bSMarc Zyngier } its_vinvall_cmd; 257eb78192bSMarc Zyngier 258eb78192bSMarc Zyngier struct { 259eb78192bSMarc Zyngier struct its_vpe *vpe; 260eb78192bSMarc Zyngier struct its_collection *col; 261eb78192bSMarc Zyngier bool valid; 262eb78192bSMarc Zyngier } its_vmapp_cmd; 263eb78192bSMarc Zyngier 264eb78192bSMarc Zyngier struct { 265eb78192bSMarc Zyngier struct its_vpe *vpe; 266d011e4e6SMarc Zyngier struct its_device *dev; 267d011e4e6SMarc Zyngier u32 virt_id; 268d011e4e6SMarc Zyngier u32 event_id; 269d011e4e6SMarc Zyngier bool db_enabled; 270d011e4e6SMarc Zyngier } its_vmapti_cmd; 271d011e4e6SMarc Zyngier 272d011e4e6SMarc Zyngier struct { 273d011e4e6SMarc Zyngier struct its_vpe *vpe; 274d011e4e6SMarc Zyngier struct its_device *dev; 275d011e4e6SMarc Zyngier u32 event_id; 276d011e4e6SMarc Zyngier bool db_enabled; 277d011e4e6SMarc Zyngier } its_vmovi_cmd; 2783171a47aSMarc Zyngier 2793171a47aSMarc Zyngier struct { 2803171a47aSMarc Zyngier struct its_vpe *vpe; 2813171a47aSMarc Zyngier struct its_collection *col; 2823171a47aSMarc Zyngier u16 seq_num; 2833171a47aSMarc Zyngier u16 its_list; 2843171a47aSMarc Zyngier } its_vmovp_cmd; 285cc2d3216SMarc Zyngier }; 286cc2d3216SMarc Zyngier }; 287cc2d3216SMarc Zyngier 288cc2d3216SMarc Zyngier /* 289cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 290cc2d3216SMarc Zyngier */ 291cc2d3216SMarc Zyngier struct its_cmd_block { 292cc2d3216SMarc Zyngier u64 raw_cmd[4]; 293cc2d3216SMarc Zyngier }; 294cc2d3216SMarc Zyngier 295cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 296cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 297cc2d3216SMarc Zyngier 29867047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 29967047f90SMarc Zyngier struct its_cmd_block *, 300cc2d3216SMarc Zyngier struct its_cmd_desc *); 301cc2d3216SMarc Zyngier 30267047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 30367047f90SMarc Zyngier struct its_cmd_block *, 304d011e4e6SMarc Zyngier struct its_cmd_desc *); 305d011e4e6SMarc Zyngier 3064d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 3074d36f136SMarc Zyngier { 3084d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 3094d36f136SMarc Zyngier *raw_cmd &= ~mask; 3104d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 3114d36f136SMarc Zyngier } 3124d36f136SMarc Zyngier 313cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 314cc2d3216SMarc Zyngier { 3154d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 316cc2d3216SMarc Zyngier } 317cc2d3216SMarc Zyngier 318cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 319cc2d3216SMarc Zyngier { 3204d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 321cc2d3216SMarc Zyngier } 322cc2d3216SMarc Zyngier 323cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 324cc2d3216SMarc Zyngier { 3254d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 326cc2d3216SMarc Zyngier } 327cc2d3216SMarc Zyngier 328cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 329cc2d3216SMarc Zyngier { 3304d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 331cc2d3216SMarc Zyngier } 332cc2d3216SMarc Zyngier 333cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 334cc2d3216SMarc Zyngier { 3354d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 336cc2d3216SMarc Zyngier } 337cc2d3216SMarc Zyngier 338cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 339cc2d3216SMarc Zyngier { 34030ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 341cc2d3216SMarc Zyngier } 342cc2d3216SMarc Zyngier 343cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 344cc2d3216SMarc Zyngier { 3454d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 346cc2d3216SMarc Zyngier } 347cc2d3216SMarc Zyngier 348cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 349cc2d3216SMarc Zyngier { 35030ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 351cc2d3216SMarc Zyngier } 352cc2d3216SMarc Zyngier 353cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 354cc2d3216SMarc Zyngier { 3554d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 356cc2d3216SMarc Zyngier } 357cc2d3216SMarc Zyngier 358d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 359d011e4e6SMarc Zyngier { 360d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 361d011e4e6SMarc Zyngier } 362d011e4e6SMarc Zyngier 363d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 364d011e4e6SMarc Zyngier { 365d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 366d011e4e6SMarc Zyngier } 367d011e4e6SMarc Zyngier 368d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 369d011e4e6SMarc Zyngier { 370d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 371d011e4e6SMarc Zyngier } 372d011e4e6SMarc Zyngier 373d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 374d011e4e6SMarc Zyngier { 375d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 376d011e4e6SMarc Zyngier } 377d011e4e6SMarc Zyngier 3783171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 3793171a47aSMarc Zyngier { 3803171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 3813171a47aSMarc Zyngier } 3823171a47aSMarc Zyngier 3833171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 3843171a47aSMarc Zyngier { 3853171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 3863171a47aSMarc Zyngier } 3873171a47aSMarc Zyngier 388eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 389eb78192bSMarc Zyngier { 39030ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 391eb78192bSMarc Zyngier } 392eb78192bSMarc Zyngier 393eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 394eb78192bSMarc Zyngier { 395eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 396eb78192bSMarc Zyngier } 397eb78192bSMarc Zyngier 398cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 399cc2d3216SMarc Zyngier { 400cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 401cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 402cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 403cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 404cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 405cc2d3216SMarc Zyngier } 406cc2d3216SMarc Zyngier 40767047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 40867047f90SMarc Zyngier struct its_cmd_block *cmd, 409cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 410cc2d3216SMarc Zyngier { 411cc2d3216SMarc Zyngier unsigned long itt_addr; 412c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 413cc2d3216SMarc Zyngier 414cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 415cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 416cc2d3216SMarc Zyngier 417cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 418cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 419cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 420cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 421cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 422cc2d3216SMarc Zyngier 423cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 424cc2d3216SMarc Zyngier 425591e5becSMarc Zyngier return NULL; 426cc2d3216SMarc Zyngier } 427cc2d3216SMarc Zyngier 42867047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 42967047f90SMarc Zyngier struct its_cmd_block *cmd, 430cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 431cc2d3216SMarc Zyngier { 432cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 433cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 434cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 435cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 436cc2d3216SMarc Zyngier 437cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 438cc2d3216SMarc Zyngier 439cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 440cc2d3216SMarc Zyngier } 441cc2d3216SMarc Zyngier 44267047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 44367047f90SMarc Zyngier struct its_cmd_block *cmd, 444cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 445cc2d3216SMarc Zyngier { 446591e5becSMarc Zyngier struct its_collection *col; 447591e5becSMarc Zyngier 4486a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 4496a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 450591e5becSMarc Zyngier 4516a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 4526a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 4536a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 4546a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 455591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 456cc2d3216SMarc Zyngier 457cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 458cc2d3216SMarc Zyngier 45983559b47SMarc Zyngier return valid_col(col); 460cc2d3216SMarc Zyngier } 461cc2d3216SMarc Zyngier 46267047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 46367047f90SMarc Zyngier struct its_cmd_block *cmd, 464cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 465cc2d3216SMarc Zyngier { 466591e5becSMarc Zyngier struct its_collection *col; 467591e5becSMarc Zyngier 468591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 469591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 470591e5becSMarc Zyngier 471cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 472cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 473591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 474cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 475cc2d3216SMarc Zyngier 476cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 477cc2d3216SMarc Zyngier 47883559b47SMarc Zyngier return valid_col(col); 479cc2d3216SMarc Zyngier } 480cc2d3216SMarc Zyngier 48167047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 48267047f90SMarc Zyngier struct its_cmd_block *cmd, 483cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 484cc2d3216SMarc Zyngier { 485591e5becSMarc Zyngier struct its_collection *col; 486591e5becSMarc Zyngier 487591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 488591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 489591e5becSMarc Zyngier 490cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 491cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 492cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 493cc2d3216SMarc Zyngier 494cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 495cc2d3216SMarc Zyngier 49683559b47SMarc Zyngier return valid_col(col); 497cc2d3216SMarc Zyngier } 498cc2d3216SMarc Zyngier 49967047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 50067047f90SMarc Zyngier struct its_cmd_block *cmd, 501cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 502cc2d3216SMarc Zyngier { 503591e5becSMarc Zyngier struct its_collection *col; 504591e5becSMarc Zyngier 505591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 506591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 507591e5becSMarc Zyngier 508cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 509cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 510cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 511cc2d3216SMarc Zyngier 512cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 513cc2d3216SMarc Zyngier 51483559b47SMarc Zyngier return valid_col(col); 515cc2d3216SMarc Zyngier } 516cc2d3216SMarc Zyngier 51767047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 51867047f90SMarc Zyngier struct its_cmd_block *cmd, 5198d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5208d85dcedSMarc Zyngier { 5218d85dcedSMarc Zyngier struct its_collection *col; 5228d85dcedSMarc Zyngier 5238d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 5248d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 5258d85dcedSMarc Zyngier 5268d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 5278d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 5288d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 5298d85dcedSMarc Zyngier 5308d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5318d85dcedSMarc Zyngier 53283559b47SMarc Zyngier return valid_col(col); 5338d85dcedSMarc Zyngier } 5348d85dcedSMarc Zyngier 53567047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 53667047f90SMarc Zyngier struct its_cmd_block *cmd, 5378d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5388d85dcedSMarc Zyngier { 5398d85dcedSMarc Zyngier struct its_collection *col; 5408d85dcedSMarc Zyngier 5418d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 5428d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 5438d85dcedSMarc Zyngier 5448d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 5458d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 5468d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 5478d85dcedSMarc Zyngier 5488d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5498d85dcedSMarc Zyngier 55083559b47SMarc Zyngier return valid_col(col); 5518d85dcedSMarc Zyngier } 5528d85dcedSMarc Zyngier 55367047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 55467047f90SMarc Zyngier struct its_cmd_block *cmd, 555cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 556cc2d3216SMarc Zyngier { 557cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 558cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 559cc2d3216SMarc Zyngier 560cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 561cc2d3216SMarc Zyngier 562cc2d3216SMarc Zyngier return NULL; 563cc2d3216SMarc Zyngier } 564cc2d3216SMarc Zyngier 56567047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 56667047f90SMarc Zyngier struct its_cmd_block *cmd, 567eb78192bSMarc Zyngier struct its_cmd_desc *desc) 568eb78192bSMarc Zyngier { 569eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 570eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 571eb78192bSMarc Zyngier 572eb78192bSMarc Zyngier its_fixup_cmd(cmd); 573eb78192bSMarc Zyngier 574205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 575eb78192bSMarc Zyngier } 576eb78192bSMarc Zyngier 57767047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 57867047f90SMarc Zyngier struct its_cmd_block *cmd, 579eb78192bSMarc Zyngier struct its_cmd_desc *desc) 580eb78192bSMarc Zyngier { 581eb78192bSMarc Zyngier unsigned long vpt_addr; 5825c9a882eSMarc Zyngier u64 target; 583eb78192bSMarc Zyngier 584eb78192bSMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 5855c9a882eSMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 586eb78192bSMarc Zyngier 587eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 588eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 589eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 5905c9a882eSMarc Zyngier its_encode_target(cmd, target); 591eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 592eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 593eb78192bSMarc Zyngier 594eb78192bSMarc Zyngier its_fixup_cmd(cmd); 595eb78192bSMarc Zyngier 596205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 597eb78192bSMarc Zyngier } 598eb78192bSMarc Zyngier 59967047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 60067047f90SMarc Zyngier struct its_cmd_block *cmd, 601d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 602d011e4e6SMarc Zyngier { 603d011e4e6SMarc Zyngier u32 db; 604d011e4e6SMarc Zyngier 605d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 606d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 607d011e4e6SMarc Zyngier else 608d011e4e6SMarc Zyngier db = 1023; 609d011e4e6SMarc Zyngier 610d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 611d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 612d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 613d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 614d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 615d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 616d011e4e6SMarc Zyngier 617d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 618d011e4e6SMarc Zyngier 619205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 620d011e4e6SMarc Zyngier } 621d011e4e6SMarc Zyngier 62267047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 62367047f90SMarc Zyngier struct its_cmd_block *cmd, 624d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 625d011e4e6SMarc Zyngier { 626d011e4e6SMarc Zyngier u32 db; 627d011e4e6SMarc Zyngier 628d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 629d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 630d011e4e6SMarc Zyngier else 631d011e4e6SMarc Zyngier db = 1023; 632d011e4e6SMarc Zyngier 633d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 634d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 635d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 636d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 637d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 638d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 639d011e4e6SMarc Zyngier 640d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 641d011e4e6SMarc Zyngier 642205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 643d011e4e6SMarc Zyngier } 644d011e4e6SMarc Zyngier 64567047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 64667047f90SMarc Zyngier struct its_cmd_block *cmd, 6473171a47aSMarc Zyngier struct its_cmd_desc *desc) 6483171a47aSMarc Zyngier { 6495c9a882eSMarc Zyngier u64 target; 6505c9a882eSMarc Zyngier 6515c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 6523171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 6533171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 6543171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 6553171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 6565c9a882eSMarc Zyngier its_encode_target(cmd, target); 6573171a47aSMarc Zyngier 6583171a47aSMarc Zyngier its_fixup_cmd(cmd); 6593171a47aSMarc Zyngier 660205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 6613171a47aSMarc Zyngier } 6623171a47aSMarc Zyngier 663cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 664cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 665cc2d3216SMarc Zyngier { 666cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 667cc2d3216SMarc Zyngier } 668cc2d3216SMarc Zyngier 669cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 670cc2d3216SMarc Zyngier { 671cc2d3216SMarc Zyngier int widx; 672cc2d3216SMarc Zyngier int ridx; 673cc2d3216SMarc Zyngier 674cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 675cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 676cc2d3216SMarc Zyngier 677cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 678cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 679cc2d3216SMarc Zyngier return 1; 680cc2d3216SMarc Zyngier 681cc2d3216SMarc Zyngier return 0; 682cc2d3216SMarc Zyngier } 683cc2d3216SMarc Zyngier 684cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 685cc2d3216SMarc Zyngier { 686cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 687cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 688cc2d3216SMarc Zyngier 689cc2d3216SMarc Zyngier while (its_queue_full(its)) { 690cc2d3216SMarc Zyngier count--; 691cc2d3216SMarc Zyngier if (!count) { 692cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 693cc2d3216SMarc Zyngier return NULL; 694cc2d3216SMarc Zyngier } 695cc2d3216SMarc Zyngier cpu_relax(); 696cc2d3216SMarc Zyngier udelay(1); 697cc2d3216SMarc Zyngier } 698cc2d3216SMarc Zyngier 699cc2d3216SMarc Zyngier cmd = its->cmd_write++; 700cc2d3216SMarc Zyngier 701cc2d3216SMarc Zyngier /* Handle queue wrapping */ 702cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 703cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 704cc2d3216SMarc Zyngier 70534d677a9SMarc Zyngier /* Clear command */ 70634d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 70734d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 70834d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 70934d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 71034d677a9SMarc Zyngier 711cc2d3216SMarc Zyngier return cmd; 712cc2d3216SMarc Zyngier } 713cc2d3216SMarc Zyngier 714cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 715cc2d3216SMarc Zyngier { 716cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 717cc2d3216SMarc Zyngier 718cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 719cc2d3216SMarc Zyngier 720cc2d3216SMarc Zyngier return its->cmd_write; 721cc2d3216SMarc Zyngier } 722cc2d3216SMarc Zyngier 723cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 724cc2d3216SMarc Zyngier { 725cc2d3216SMarc Zyngier /* 726cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 727cc2d3216SMarc Zyngier * the ITS. 728cc2d3216SMarc Zyngier */ 729cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 730328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 731cc2d3216SMarc Zyngier else 732cc2d3216SMarc Zyngier dsb(ishst); 733cc2d3216SMarc Zyngier } 734cc2d3216SMarc Zyngier 735a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 736a050fa54SHeyi Guo u64 prev_idx, 737cc2d3216SMarc Zyngier struct its_cmd_block *to) 738cc2d3216SMarc Zyngier { 739a050fa54SHeyi Guo u64 rd_idx, to_idx, linear_idx; 740cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 741cc2d3216SMarc Zyngier 742a050fa54SHeyi Guo /* Linearize to_idx if the command set has wrapped around */ 743cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 744a050fa54SHeyi Guo if (to_idx < prev_idx) 745a050fa54SHeyi Guo to_idx += ITS_CMD_QUEUE_SZ; 746a050fa54SHeyi Guo 747a050fa54SHeyi Guo linear_idx = prev_idx; 748cc2d3216SMarc Zyngier 749cc2d3216SMarc Zyngier while (1) { 750a050fa54SHeyi Guo s64 delta; 751a050fa54SHeyi Guo 752cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 7539bdd8b1cSMarc Zyngier 754a050fa54SHeyi Guo /* 755a050fa54SHeyi Guo * Compute the read pointer progress, taking the 756a050fa54SHeyi Guo * potential wrap-around into account. 757a050fa54SHeyi Guo */ 758a050fa54SHeyi Guo delta = rd_idx - prev_idx; 759a050fa54SHeyi Guo if (rd_idx < prev_idx) 760a050fa54SHeyi Guo delta += ITS_CMD_QUEUE_SZ; 7619bdd8b1cSMarc Zyngier 762a050fa54SHeyi Guo linear_idx += delta; 763a050fa54SHeyi Guo if (linear_idx >= to_idx) 764cc2d3216SMarc Zyngier break; 765cc2d3216SMarc Zyngier 766cc2d3216SMarc Zyngier count--; 767cc2d3216SMarc Zyngier if (!count) { 768a050fa54SHeyi Guo pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", 769a050fa54SHeyi Guo to_idx, linear_idx); 770a19b462fSMarc Zyngier return -1; 771cc2d3216SMarc Zyngier } 772a050fa54SHeyi Guo prev_idx = rd_idx; 773cc2d3216SMarc Zyngier cpu_relax(); 774cc2d3216SMarc Zyngier udelay(1); 775cc2d3216SMarc Zyngier } 776a19b462fSMarc Zyngier 777a19b462fSMarc Zyngier return 0; 778cc2d3216SMarc Zyngier } 779cc2d3216SMarc Zyngier 780e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 781e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 782e4f9094bSMarc Zyngier void name(struct its_node *its, \ 783e4f9094bSMarc Zyngier buildtype builder, \ 784e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 785e4f9094bSMarc Zyngier { \ 786e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 787e4f9094bSMarc Zyngier synctype *sync_obj; \ 788e4f9094bSMarc Zyngier unsigned long flags; \ 789a050fa54SHeyi Guo u64 rd_idx; \ 790e4f9094bSMarc Zyngier \ 791e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 792e4f9094bSMarc Zyngier \ 793e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 794e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 795e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 796e4f9094bSMarc Zyngier return; \ 797e4f9094bSMarc Zyngier } \ 79867047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 799e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 800e4f9094bSMarc Zyngier \ 801e4f9094bSMarc Zyngier if (sync_obj) { \ 802e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 803e4f9094bSMarc Zyngier if (!sync_cmd) \ 804e4f9094bSMarc Zyngier goto post; \ 805e4f9094bSMarc Zyngier \ 80667047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 807e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 808e4f9094bSMarc Zyngier } \ 809e4f9094bSMarc Zyngier \ 810e4f9094bSMarc Zyngier post: \ 811a050fa54SHeyi Guo rd_idx = readl_relaxed(its->base + GITS_CREADR); \ 812e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 813e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 814e4f9094bSMarc Zyngier \ 815a050fa54SHeyi Guo if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \ 816a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 817e4f9094bSMarc Zyngier } 818e4f9094bSMarc Zyngier 81967047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 82067047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 821e4f9094bSMarc Zyngier struct its_collection *sync_col) 822cc2d3216SMarc Zyngier { 823cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 824cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 825e4f9094bSMarc Zyngier 826cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 827cc2d3216SMarc Zyngier } 828cc2d3216SMarc Zyngier 829e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 830e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 831cc2d3216SMarc Zyngier 83267047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 83367047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 834d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 835d011e4e6SMarc Zyngier { 836d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 837d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 838d011e4e6SMarc Zyngier 839d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 840d011e4e6SMarc Zyngier } 841d011e4e6SMarc Zyngier 842d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 843d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 844d011e4e6SMarc Zyngier 8458d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 8468d85dcedSMarc Zyngier { 8478d85dcedSMarc Zyngier struct its_cmd_desc desc; 8488d85dcedSMarc Zyngier 8498d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 8508d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 8518d85dcedSMarc Zyngier 8528d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 8538d85dcedSMarc Zyngier } 8548d85dcedSMarc Zyngier 8558d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 8568d85dcedSMarc Zyngier { 8578d85dcedSMarc Zyngier struct its_cmd_desc desc; 8588d85dcedSMarc Zyngier 8598d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 8608d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 8618d85dcedSMarc Zyngier 8628d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 863cc2d3216SMarc Zyngier } 864cc2d3216SMarc Zyngier 865cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 866cc2d3216SMarc Zyngier { 867cc2d3216SMarc Zyngier struct its_cmd_desc desc; 868cc2d3216SMarc Zyngier 869cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 870cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 871cc2d3216SMarc Zyngier 872cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 873cc2d3216SMarc Zyngier } 874cc2d3216SMarc Zyngier 875cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 876cc2d3216SMarc Zyngier { 877cc2d3216SMarc Zyngier struct its_cmd_desc desc; 878cc2d3216SMarc Zyngier 879cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 880cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 881cc2d3216SMarc Zyngier 882cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 883cc2d3216SMarc Zyngier } 884cc2d3216SMarc Zyngier 885cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 886cc2d3216SMarc Zyngier int valid) 887cc2d3216SMarc Zyngier { 888cc2d3216SMarc Zyngier struct its_cmd_desc desc; 889cc2d3216SMarc Zyngier 890cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 891cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 892cc2d3216SMarc Zyngier 893cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 894cc2d3216SMarc Zyngier } 895cc2d3216SMarc Zyngier 8966a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 897cc2d3216SMarc Zyngier { 898cc2d3216SMarc Zyngier struct its_cmd_desc desc; 899cc2d3216SMarc Zyngier 9006a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 9016a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 9026a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 903cc2d3216SMarc Zyngier 9046a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 905cc2d3216SMarc Zyngier } 906cc2d3216SMarc Zyngier 907cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 908cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 909cc2d3216SMarc Zyngier { 910cc2d3216SMarc Zyngier struct its_cmd_desc desc; 911cc2d3216SMarc Zyngier 912cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 913cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 914591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 915cc2d3216SMarc Zyngier 916cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 917cc2d3216SMarc Zyngier } 918cc2d3216SMarc Zyngier 919cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 920cc2d3216SMarc Zyngier { 921cc2d3216SMarc Zyngier struct its_cmd_desc desc; 922cc2d3216SMarc Zyngier 923cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 924cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 925cc2d3216SMarc Zyngier 926cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 927cc2d3216SMarc Zyngier } 928cc2d3216SMarc Zyngier 929cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 930cc2d3216SMarc Zyngier { 931cc2d3216SMarc Zyngier struct its_cmd_desc desc; 932cc2d3216SMarc Zyngier 933cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 934cc2d3216SMarc Zyngier 935cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 936cc2d3216SMarc Zyngier } 937c48ed51cSMarc Zyngier 938d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 939d011e4e6SMarc Zyngier { 940d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 941d011e4e6SMarc Zyngier struct its_cmd_desc desc; 942d011e4e6SMarc Zyngier 943d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 944d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 945d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 946d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 947d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 948d011e4e6SMarc Zyngier 949d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 950d011e4e6SMarc Zyngier } 951d011e4e6SMarc Zyngier 952d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 953d011e4e6SMarc Zyngier { 954d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 955d011e4e6SMarc Zyngier struct its_cmd_desc desc; 956d011e4e6SMarc Zyngier 957d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 958d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 959d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 960d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 961d011e4e6SMarc Zyngier 962d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 963d011e4e6SMarc Zyngier } 964d011e4e6SMarc Zyngier 96575fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 96675fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 967eb78192bSMarc Zyngier { 968eb78192bSMarc Zyngier struct its_cmd_desc desc; 969eb78192bSMarc Zyngier 970eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 971eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 972eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 97375fd951bSMarc Zyngier 974eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 975eb78192bSMarc Zyngier } 976eb78192bSMarc Zyngier 9773171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 9783171a47aSMarc Zyngier { 9793171a47aSMarc Zyngier struct its_cmd_desc desc; 9803171a47aSMarc Zyngier struct its_node *its; 9813171a47aSMarc Zyngier unsigned long flags; 9823171a47aSMarc Zyngier int col_id = vpe->col_idx; 9833171a47aSMarc Zyngier 9843171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 9853171a47aSMarc Zyngier desc.its_vmovp_cmd.its_list = (u16)its_list_map; 9863171a47aSMarc Zyngier 9873171a47aSMarc Zyngier if (!its_list_map) { 9883171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 9893171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = 0; 9903171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9913171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9923171a47aSMarc Zyngier return; 9933171a47aSMarc Zyngier } 9943171a47aSMarc Zyngier 9953171a47aSMarc Zyngier /* 9963171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 9973171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 9983171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 9993171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 10003171a47aSMarc Zyngier * 10013171a47aSMarc Zyngier * Wall <-- Head. 10023171a47aSMarc Zyngier */ 10033171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 10043171a47aSMarc Zyngier 10053171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 10063171a47aSMarc Zyngier 10073171a47aSMarc Zyngier /* Emit VMOVPs */ 10083171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 10093171a47aSMarc Zyngier if (!its->is_v4) 10103171a47aSMarc Zyngier continue; 10113171a47aSMarc Zyngier 10122247e1bfSMarc Zyngier if (!vpe->its_vm->vlpi_count[its->list_nr]) 10132247e1bfSMarc Zyngier continue; 10142247e1bfSMarc Zyngier 10153171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 10163171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 10173171a47aSMarc Zyngier } 10183171a47aSMarc Zyngier 10193171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 10203171a47aSMarc Zyngier } 10213171a47aSMarc Zyngier 102240619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1023eb78192bSMarc Zyngier { 1024eb78192bSMarc Zyngier struct its_cmd_desc desc; 1025eb78192bSMarc Zyngier 1026eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1027eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1028eb78192bSMarc Zyngier } 1029eb78192bSMarc Zyngier 1030c48ed51cSMarc Zyngier /* 1031c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1032c48ed51cSMarc Zyngier */ 1033c48ed51cSMarc Zyngier 1034c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 1035c48ed51cSMarc Zyngier { 1036c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1037591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 1038c48ed51cSMarc Zyngier } 1039c48ed51cSMarc Zyngier 1040015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1041c48ed51cSMarc Zyngier { 1042015ec038SMarc Zyngier irq_hw_number_t hwirq; 1043e1a2e201SMarc Zyngier void *va; 1044adcdb94eSMarc Zyngier u8 *cfg; 1045c48ed51cSMarc Zyngier 1046015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1047015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1048015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1049d4d7b4adSMarc Zyngier struct its_vlpi_map *map; 1050015ec038SMarc Zyngier 1051e1a2e201SMarc Zyngier va = page_address(its_dev->event_map.vm->vprop_page); 1052d4d7b4adSMarc Zyngier map = &its_dev->event_map.vlpi_maps[event]; 1053d4d7b4adSMarc Zyngier hwirq = map->vintid; 1054d4d7b4adSMarc Zyngier 1055d4d7b4adSMarc Zyngier /* Remember the updated property */ 1056d4d7b4adSMarc Zyngier map->properties &= ~clr; 1057d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1058015ec038SMarc Zyngier } else { 1059e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1060015ec038SMarc Zyngier hwirq = d->hwirq; 1061015ec038SMarc Zyngier } 1062adcdb94eSMarc Zyngier 1063e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1064adcdb94eSMarc Zyngier *cfg &= ~clr; 1065015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1066c48ed51cSMarc Zyngier 1067c48ed51cSMarc Zyngier /* 1068c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1069c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1070c48ed51cSMarc Zyngier * Humpf... 1071c48ed51cSMarc Zyngier */ 1072c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1073328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1074c48ed51cSMarc Zyngier else 1075c48ed51cSMarc Zyngier dsb(ishst); 1076015ec038SMarc Zyngier } 1077015ec038SMarc Zyngier 1078015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1079015ec038SMarc Zyngier { 1080015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1081015ec038SMarc Zyngier 1082015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1083adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 1084c48ed51cSMarc Zyngier } 1085c48ed51cSMarc Zyngier 1086015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1087015ec038SMarc Zyngier { 1088015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1089015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1090015ec038SMarc Zyngier 1091015ec038SMarc Zyngier if (its_dev->event_map.vlpi_maps[event].db_enabled == enable) 1092015ec038SMarc Zyngier return; 1093015ec038SMarc Zyngier 1094015ec038SMarc Zyngier its_dev->event_map.vlpi_maps[event].db_enabled = enable; 1095015ec038SMarc Zyngier 1096015ec038SMarc Zyngier /* 1097015ec038SMarc Zyngier * More fun with the architecture: 1098015ec038SMarc Zyngier * 1099015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1100015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1101015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1102015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1103015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1104015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1105015ec038SMarc Zyngier */ 1106015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1107c48ed51cSMarc Zyngier } 1108c48ed51cSMarc Zyngier 1109c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1110c48ed51cSMarc Zyngier { 1111015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1112015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1113015ec038SMarc Zyngier 1114adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1115c48ed51cSMarc Zyngier } 1116c48ed51cSMarc Zyngier 1117c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1118c48ed51cSMarc Zyngier { 1119015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1120015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1121015ec038SMarc Zyngier 1122adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1123c48ed51cSMarc Zyngier } 1124c48ed51cSMarc Zyngier 1125c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1126c48ed51cSMarc Zyngier bool force) 1127c48ed51cSMarc Zyngier { 1128fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1129fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1130c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1131c48ed51cSMarc Zyngier struct its_collection *target_col; 1132c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1133c48ed51cSMarc Zyngier 1134015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1135015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1136015ec038SMarc Zyngier return -EINVAL; 1137015ec038SMarc Zyngier 1138fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1139fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1140fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1141fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1142fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1143fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1144fbf8f40eSGanapatrao Kulkarni } 1145fbf8f40eSGanapatrao Kulkarni } 1146fbf8f40eSGanapatrao Kulkarni 1147fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1148fbf8f40eSGanapatrao Kulkarni 1149c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1150c48ed51cSMarc Zyngier return -EINVAL; 1151c48ed51cSMarc Zyngier 11528b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 11538b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1154c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1155c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1156591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 11570d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 11588b8d94a7SMaJun } 1159c48ed51cSMarc Zyngier 1160c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1161c48ed51cSMarc Zyngier } 1162c48ed51cSMarc Zyngier 1163558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1164558b0165SArd Biesheuvel { 1165558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1166558b0165SArd Biesheuvel 1167558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1168558b0165SArd Biesheuvel } 1169558b0165SArd Biesheuvel 1170b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1171b48ac83dSMarc Zyngier { 1172b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1173b48ac83dSMarc Zyngier struct its_node *its; 1174b48ac83dSMarc Zyngier u64 addr; 1175b48ac83dSMarc Zyngier 1176b48ac83dSMarc Zyngier its = its_dev->its; 1177558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1178b48ac83dSMarc Zyngier 1179b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1180b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1181b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 118244bb7e24SRobin Murphy 118335ae7df2SJulien Grall iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); 1184b48ac83dSMarc Zyngier } 1185b48ac83dSMarc Zyngier 11868d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 11878d85dcedSMarc Zyngier enum irqchip_irq_state which, 11888d85dcedSMarc Zyngier bool state) 11898d85dcedSMarc Zyngier { 11908d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 11918d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 11928d85dcedSMarc Zyngier 11938d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 11948d85dcedSMarc Zyngier return -EINVAL; 11958d85dcedSMarc Zyngier 11968d85dcedSMarc Zyngier if (state) 11978d85dcedSMarc Zyngier its_send_int(its_dev, event); 11988d85dcedSMarc Zyngier else 11998d85dcedSMarc Zyngier its_send_clear(its_dev, event); 12008d85dcedSMarc Zyngier 12018d85dcedSMarc Zyngier return 0; 12028d85dcedSMarc Zyngier } 12038d85dcedSMarc Zyngier 12042247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 12052247e1bfSMarc Zyngier { 12062247e1bfSMarc Zyngier unsigned long flags; 12072247e1bfSMarc Zyngier 12082247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12092247e1bfSMarc Zyngier if (!its_list_map) 12102247e1bfSMarc Zyngier return; 12112247e1bfSMarc Zyngier 12122247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12132247e1bfSMarc Zyngier 12142247e1bfSMarc Zyngier /* 12152247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 12162247e1bfSMarc Zyngier * them mapped now. 12172247e1bfSMarc Zyngier */ 12182247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 12192247e1bfSMarc Zyngier 12202247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 12212247e1bfSMarc Zyngier int i; 12222247e1bfSMarc Zyngier 12232247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 12242247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 122544c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 12262247e1bfSMarc Zyngier 12272247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 12282247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 12292247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 12302247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 123144c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 12322247e1bfSMarc Zyngier } 12332247e1bfSMarc Zyngier } 12342247e1bfSMarc Zyngier 12352247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12362247e1bfSMarc Zyngier } 12372247e1bfSMarc Zyngier 12382247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 12392247e1bfSMarc Zyngier { 12402247e1bfSMarc Zyngier unsigned long flags; 12412247e1bfSMarc Zyngier 12422247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12432247e1bfSMarc Zyngier if (!its_list_map) 12442247e1bfSMarc Zyngier return; 12452247e1bfSMarc Zyngier 12462247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12472247e1bfSMarc Zyngier 12482247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 12492247e1bfSMarc Zyngier int i; 12502247e1bfSMarc Zyngier 12512247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 12522247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 12532247e1bfSMarc Zyngier } 12542247e1bfSMarc Zyngier 12552247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12562247e1bfSMarc Zyngier } 12572247e1bfSMarc Zyngier 1258d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1259d011e4e6SMarc Zyngier { 1260d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1261d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1262d011e4e6SMarc Zyngier int ret = 0; 1263d011e4e6SMarc Zyngier 1264d011e4e6SMarc Zyngier if (!info->map) 1265d011e4e6SMarc Zyngier return -EINVAL; 1266d011e4e6SMarc Zyngier 1267d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1268d011e4e6SMarc Zyngier 1269d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1270d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1271d011e4e6SMarc Zyngier 12726396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 1273d011e4e6SMarc Zyngier GFP_KERNEL); 1274d011e4e6SMarc Zyngier if (!maps) { 1275d011e4e6SMarc Zyngier ret = -ENOMEM; 1276d011e4e6SMarc Zyngier goto out; 1277d011e4e6SMarc Zyngier } 1278d011e4e6SMarc Zyngier 1279d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1280d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1281d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1282d011e4e6SMarc Zyngier ret = -EINVAL; 1283d011e4e6SMarc Zyngier goto out; 1284d011e4e6SMarc Zyngier } 1285d011e4e6SMarc Zyngier 1286d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1287d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1288d011e4e6SMarc Zyngier 1289d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1290d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1291d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1292d011e4e6SMarc Zyngier } else { 12932247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 12942247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 12952247e1bfSMarc Zyngier 1296d4d7b4adSMarc Zyngier /* 1297d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1298d4d7b4adSMarc Zyngier * start poking the virtual property table. 1299d4d7b4adSMarc Zyngier */ 1300d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1301d4d7b4adSMarc Zyngier 1302d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1303d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1304d4d7b4adSMarc Zyngier 1305d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1306d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1307d011e4e6SMarc Zyngier 1308d011e4e6SMarc Zyngier /* and install the virtual one */ 1309d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1310d011e4e6SMarc Zyngier 1311d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1312d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1313d011e4e6SMarc Zyngier } 1314d011e4e6SMarc Zyngier 1315d011e4e6SMarc Zyngier out: 1316d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1317d011e4e6SMarc Zyngier return ret; 1318d011e4e6SMarc Zyngier } 1319d011e4e6SMarc Zyngier 1320d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1321d011e4e6SMarc Zyngier { 1322d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1323d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1324d011e4e6SMarc Zyngier int ret = 0; 1325d011e4e6SMarc Zyngier 1326d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1327d011e4e6SMarc Zyngier 1328d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || 1329d011e4e6SMarc Zyngier !its_dev->event_map.vlpi_maps[event].vm) { 1330d011e4e6SMarc Zyngier ret = -EINVAL; 1331d011e4e6SMarc Zyngier goto out; 1332d011e4e6SMarc Zyngier } 1333d011e4e6SMarc Zyngier 1334d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1335d011e4e6SMarc Zyngier *info->map = its_dev->event_map.vlpi_maps[event]; 1336d011e4e6SMarc Zyngier 1337d011e4e6SMarc Zyngier out: 1338d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1339d011e4e6SMarc Zyngier return ret; 1340d011e4e6SMarc Zyngier } 1341d011e4e6SMarc Zyngier 1342d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1343d011e4e6SMarc Zyngier { 1344d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1345d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1346d011e4e6SMarc Zyngier int ret = 0; 1347d011e4e6SMarc Zyngier 1348d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1349d011e4e6SMarc Zyngier 1350d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1351d011e4e6SMarc Zyngier ret = -EINVAL; 1352d011e4e6SMarc Zyngier goto out; 1353d011e4e6SMarc Zyngier } 1354d011e4e6SMarc Zyngier 1355d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1356d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1357d011e4e6SMarc Zyngier 1358d011e4e6SMarc Zyngier /* and restore the physical one */ 1359d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1360d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1361d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1362d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1363d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1364d011e4e6SMarc Zyngier 13652247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 13662247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 13672247e1bfSMarc Zyngier 1368d011e4e6SMarc Zyngier /* 1369d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1370d011e4e6SMarc Zyngier * this was the last VLPI. 1371d011e4e6SMarc Zyngier */ 1372d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1373d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1374d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1375d011e4e6SMarc Zyngier } 1376d011e4e6SMarc Zyngier 1377d011e4e6SMarc Zyngier out: 1378d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1379d011e4e6SMarc Zyngier return ret; 1380d011e4e6SMarc Zyngier } 1381d011e4e6SMarc Zyngier 1382015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1383015ec038SMarc Zyngier { 1384015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1385015ec038SMarc Zyngier 1386015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1387015ec038SMarc Zyngier return -EINVAL; 1388015ec038SMarc Zyngier 1389015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1390015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1391015ec038SMarc Zyngier else 1392015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1393015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1394015ec038SMarc Zyngier 1395015ec038SMarc Zyngier return 0; 1396015ec038SMarc Zyngier } 1397015ec038SMarc Zyngier 1398c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1399c808eea8SMarc Zyngier { 1400c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1401c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1402c808eea8SMarc Zyngier 1403c808eea8SMarc Zyngier /* Need a v4 ITS */ 1404d011e4e6SMarc Zyngier if (!its_dev->its->is_v4) 1405c808eea8SMarc Zyngier return -EINVAL; 1406c808eea8SMarc Zyngier 1407d011e4e6SMarc Zyngier /* Unmap request? */ 1408d011e4e6SMarc Zyngier if (!info) 1409d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1410d011e4e6SMarc Zyngier 1411c808eea8SMarc Zyngier switch (info->cmd_type) { 1412c808eea8SMarc Zyngier case MAP_VLPI: 1413d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1414c808eea8SMarc Zyngier 1415c808eea8SMarc Zyngier case GET_VLPI: 1416d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1417c808eea8SMarc Zyngier 1418c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1419c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1420015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1421c808eea8SMarc Zyngier 1422c808eea8SMarc Zyngier default: 1423c808eea8SMarc Zyngier return -EINVAL; 1424c808eea8SMarc Zyngier } 1425c808eea8SMarc Zyngier } 1426c808eea8SMarc Zyngier 1427c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1428c48ed51cSMarc Zyngier .name = "ITS", 1429c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1430c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1431004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1432c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1433b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 14348d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1435c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1436b48ac83dSMarc Zyngier }; 1437b48ac83dSMarc Zyngier 1438880cb3cdSMarc Zyngier 1439bf9529f8SMarc Zyngier /* 1440bf9529f8SMarc Zyngier * How we allocate LPIs: 1441bf9529f8SMarc Zyngier * 1442880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1443880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1444880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1445880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1446bf9529f8SMarc Zyngier * 1447880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1448880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1449880cb3cdSMarc Zyngier * already free block. 1450880cb3cdSMarc Zyngier * 1451880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1452880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1453880cb3cdSMarc Zyngier */ 14544cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1455880cb3cdSMarc Zyngier 1456880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 1457880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 1458bf9529f8SMarc Zyngier 1459880cb3cdSMarc Zyngier struct lpi_range { 1460880cb3cdSMarc Zyngier struct list_head entry; 1461880cb3cdSMarc Zyngier u32 base_id; 1462880cb3cdSMarc Zyngier u32 span; 1463880cb3cdSMarc Zyngier }; 1464880cb3cdSMarc Zyngier 1465880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 1466bf9529f8SMarc Zyngier { 1467880cb3cdSMarc Zyngier struct lpi_range *range; 1468880cb3cdSMarc Zyngier 14691c73fac5SRasmus Villemoes range = kmalloc(sizeof(*range), GFP_KERNEL); 1470880cb3cdSMarc Zyngier if (range) { 1471880cb3cdSMarc Zyngier range->base_id = base; 1472880cb3cdSMarc Zyngier range->span = span; 1473bf9529f8SMarc Zyngier } 1474bf9529f8SMarc Zyngier 1475880cb3cdSMarc Zyngier return range; 1476880cb3cdSMarc Zyngier } 1477880cb3cdSMarc Zyngier 1478880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 1479880cb3cdSMarc Zyngier { 1480880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1481880cb3cdSMarc Zyngier int err = -ENOSPC; 1482880cb3cdSMarc Zyngier 1483880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1484880cb3cdSMarc Zyngier 1485880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1486880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 1487880cb3cdSMarc Zyngier *base = range->base_id; 1488880cb3cdSMarc Zyngier range->base_id += nr_lpis; 1489880cb3cdSMarc Zyngier range->span -= nr_lpis; 1490880cb3cdSMarc Zyngier 1491880cb3cdSMarc Zyngier if (range->span == 0) { 1492880cb3cdSMarc Zyngier list_del(&range->entry); 1493880cb3cdSMarc Zyngier kfree(range); 1494880cb3cdSMarc Zyngier } 1495880cb3cdSMarc Zyngier 1496880cb3cdSMarc Zyngier err = 0; 1497880cb3cdSMarc Zyngier break; 1498880cb3cdSMarc Zyngier } 1499880cb3cdSMarc Zyngier } 1500880cb3cdSMarc Zyngier 1501880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1502880cb3cdSMarc Zyngier 1503880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 1504880cb3cdSMarc Zyngier return err; 1505880cb3cdSMarc Zyngier } 1506880cb3cdSMarc Zyngier 150712eade12SRasmus Villemoes static void merge_lpi_ranges(struct lpi_range *a, struct lpi_range *b) 150812eade12SRasmus Villemoes { 150912eade12SRasmus Villemoes if (&a->entry == &lpi_range_list || &b->entry == &lpi_range_list) 151012eade12SRasmus Villemoes return; 151112eade12SRasmus Villemoes if (a->base_id + a->span != b->base_id) 151212eade12SRasmus Villemoes return; 151312eade12SRasmus Villemoes b->base_id = a->base_id; 151412eade12SRasmus Villemoes b->span += a->span; 151512eade12SRasmus Villemoes list_del(&a->entry); 151612eade12SRasmus Villemoes kfree(a); 151712eade12SRasmus Villemoes } 151812eade12SRasmus Villemoes 1519880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 1520880cb3cdSMarc Zyngier { 152112eade12SRasmus Villemoes struct lpi_range *new, *old; 1522880cb3cdSMarc Zyngier 1523880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 1524b31a3838SRasmus Villemoes if (!new) 1525b31a3838SRasmus Villemoes return -ENOMEM; 1526880cb3cdSMarc Zyngier 1527880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1528880cb3cdSMarc Zyngier 152912eade12SRasmus Villemoes list_for_each_entry_reverse(old, &lpi_range_list, entry) { 153012eade12SRasmus Villemoes if (old->base_id < base) 153112eade12SRasmus Villemoes break; 1532880cb3cdSMarc Zyngier } 153312eade12SRasmus Villemoes /* 153412eade12SRasmus Villemoes * old is the last element with ->base_id smaller than base, 153512eade12SRasmus Villemoes * so new goes right after it. If there are no elements with 153612eade12SRasmus Villemoes * ->base_id smaller than base, &old->entry ends up pointing 153712eade12SRasmus Villemoes * at the head of the list, and inserting new it the start of 153812eade12SRasmus Villemoes * the list is the right thing to do in that case as well. 153912eade12SRasmus Villemoes */ 154012eade12SRasmus Villemoes list_add(&new->entry, &old->entry); 154112eade12SRasmus Villemoes /* 154212eade12SRasmus Villemoes * Now check if we can merge with the preceding and/or 154312eade12SRasmus Villemoes * following ranges. 154412eade12SRasmus Villemoes */ 154512eade12SRasmus Villemoes merge_lpi_ranges(old, new); 154612eade12SRasmus Villemoes merge_lpi_ranges(new, list_next_entry(new, entry)); 1547880cb3cdSMarc Zyngier 1548880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1549b31a3838SRasmus Villemoes return 0; 1550bf9529f8SMarc Zyngier } 1551bf9529f8SMarc Zyngier 155204a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1553bf9529f8SMarc Zyngier { 1554880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 155512b2905aSMarc Zyngier u32 numlpis; 1556880cb3cdSMarc Zyngier int err; 1557bf9529f8SMarc Zyngier 155812b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 155912b2905aSMarc Zyngier 156012b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 156112b2905aSMarc Zyngier lpis = numlpis; 156212b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 156312b2905aSMarc Zyngier lpis); 156412b2905aSMarc Zyngier } 156512b2905aSMarc Zyngier 1566880cb3cdSMarc Zyngier /* 1567880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 1568880cb3cdSMarc Zyngier * full range of LPIs. 1569880cb3cdSMarc Zyngier */ 1570880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 1571880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 1572880cb3cdSMarc Zyngier return err; 1573bf9529f8SMarc Zyngier } 1574bf9529f8SMarc Zyngier 157538dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 1576bf9529f8SMarc Zyngier { 1577bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1578880cb3cdSMarc Zyngier int err = 0; 1579bf9529f8SMarc Zyngier 1580bf9529f8SMarc Zyngier do { 158138dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 1582880cb3cdSMarc Zyngier if (!err) 1583bf9529f8SMarc Zyngier break; 1584bf9529f8SMarc Zyngier 158538dd7c49SMarc Zyngier nr_irqs /= 2; 158638dd7c49SMarc Zyngier } while (nr_irqs > 0); 1587bf9529f8SMarc Zyngier 158845725e0fSMarc Zyngier if (!nr_irqs) 158945725e0fSMarc Zyngier err = -ENOSPC; 159045725e0fSMarc Zyngier 1591880cb3cdSMarc Zyngier if (err) 1592bf9529f8SMarc Zyngier goto out; 1593bf9529f8SMarc Zyngier 159438dd7c49SMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_irqs), sizeof (long), GFP_ATOMIC); 1595bf9529f8SMarc Zyngier if (!bitmap) 1596bf9529f8SMarc Zyngier goto out; 1597bf9529f8SMarc Zyngier 159838dd7c49SMarc Zyngier *nr_ids = nr_irqs; 1599bf9529f8SMarc Zyngier 1600bf9529f8SMarc Zyngier out: 1601c8415b94SMarc Zyngier if (!bitmap) 1602c8415b94SMarc Zyngier *base = *nr_ids = 0; 1603c8415b94SMarc Zyngier 1604bf9529f8SMarc Zyngier return bitmap; 1605bf9529f8SMarc Zyngier } 1606bf9529f8SMarc Zyngier 160738dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 1608bf9529f8SMarc Zyngier { 1609880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 1610cf2be8baSMarc Zyngier kfree(bitmap); 1611bf9529f8SMarc Zyngier } 16121ac19ca6SMarc Zyngier 1613053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 1614053be485SMarc Zyngier { 1615053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 1616053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 1617053be485SMarc Zyngier 1618053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 1619053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 1620053be485SMarc Zyngier } 1621053be485SMarc Zyngier 16220e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 16230e5ccf91SMarc Zyngier { 16240e5ccf91SMarc Zyngier struct page *prop_page; 16251ac19ca6SMarc Zyngier 16260e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 16270e5ccf91SMarc Zyngier if (!prop_page) 16280e5ccf91SMarc Zyngier return NULL; 16290e5ccf91SMarc Zyngier 1630053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 16310e5ccf91SMarc Zyngier 16320e5ccf91SMarc Zyngier return prop_page; 16330e5ccf91SMarc Zyngier } 16340e5ccf91SMarc Zyngier 16357d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 16367d75bbb4SMarc Zyngier { 16377d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 16387d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 16397d75bbb4SMarc Zyngier } 16401ac19ca6SMarc Zyngier 16415e2c9f9aSMarc Zyngier static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) 16425e2c9f9aSMarc Zyngier { 16435e2c9f9aSMarc Zyngier phys_addr_t start, end, addr_end; 16445e2c9f9aSMarc Zyngier u64 i; 16455e2c9f9aSMarc Zyngier 16465e2c9f9aSMarc Zyngier /* 16475e2c9f9aSMarc Zyngier * We don't bother checking for a kdump kernel as by 16485e2c9f9aSMarc Zyngier * construction, the LPI tables are out of this kernel's 16495e2c9f9aSMarc Zyngier * memory map. 16505e2c9f9aSMarc Zyngier */ 16515e2c9f9aSMarc Zyngier if (is_kdump_kernel()) 16525e2c9f9aSMarc Zyngier return true; 16535e2c9f9aSMarc Zyngier 16545e2c9f9aSMarc Zyngier addr_end = addr + size - 1; 16555e2c9f9aSMarc Zyngier 16565e2c9f9aSMarc Zyngier for_each_reserved_mem_region(i, &start, &end) { 16575e2c9f9aSMarc Zyngier if (addr >= start && addr_end <= end) 16585e2c9f9aSMarc Zyngier return true; 16595e2c9f9aSMarc Zyngier } 16605e2c9f9aSMarc Zyngier 16615e2c9f9aSMarc Zyngier /* Not found, not a good sign... */ 16625e2c9f9aSMarc Zyngier pr_warn("GICv3: Expected reserved range [%pa:%pa], not found\n", 16635e2c9f9aSMarc Zyngier &addr, &addr_end); 16645e2c9f9aSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 16655e2c9f9aSMarc Zyngier return false; 16665e2c9f9aSMarc Zyngier } 16675e2c9f9aSMarc Zyngier 16683fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 16693fb68faeSMarc Zyngier { 16703fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 16713fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 16723fb68faeSMarc Zyngier 16733fb68faeSMarc Zyngier return 0; 16743fb68faeSMarc Zyngier } 16753fb68faeSMarc Zyngier 167611e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 16771ac19ca6SMarc Zyngier { 1678c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 1679c440a9d9SMarc Zyngier u64 val; 1680c440a9d9SMarc Zyngier 1681c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 1682c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 1683c440a9d9SMarc Zyngier 1684c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 1685c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 1686c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 1687c440a9d9SMarc Zyngier MEMREMAP_WB); 1688c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 1689c440a9d9SMarc Zyngier } else { 1690e1a2e201SMarc Zyngier struct page *page; 16911ac19ca6SMarc Zyngier 1692c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 1693c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 16944cb205c0SJia He ITS_MAX_LPI_NRBITS); 1695e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 1696e1a2e201SMarc Zyngier if (!page) { 16971ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 16981ac19ca6SMarc Zyngier return -ENOMEM; 16991ac19ca6SMarc Zyngier } 17001ac19ca6SMarc Zyngier 1701e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 1702e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 17033fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 17043fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 1705c440a9d9SMarc Zyngier } 1706e1a2e201SMarc Zyngier 1707e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 1708e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 17091ac19ca6SMarc Zyngier 17106c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 17111ac19ca6SMarc Zyngier } 17121ac19ca6SMarc Zyngier 17131ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 17141ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 17151ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 17164f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 17171ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 17181ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 17191ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 17201ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 17211ac19ca6SMarc Zyngier }; 17221ac19ca6SMarc Zyngier 17232d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 17242d81d425SShanker Donthineni { 17252d81d425SShanker Donthineni u32 idx = baser - its->tables; 17262d81d425SShanker Donthineni 17270968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 17282d81d425SShanker Donthineni } 17292d81d425SShanker Donthineni 17302d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 17312d81d425SShanker Donthineni u64 val) 17322d81d425SShanker Donthineni { 17332d81d425SShanker Donthineni u32 idx = baser - its->tables; 17342d81d425SShanker Donthineni 17350968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 17362d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 17372d81d425SShanker Donthineni } 17382d81d425SShanker Donthineni 17399347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 17403faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 17413faf24eaSShanker Donthineni bool indirect) 17429347359aSShanker Donthineni { 17439347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 17449347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 17459347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 174630ae9610SShanker Donthineni u64 baser_phys, tmp; 17479347359aSShanker Donthineni u32 alloc_pages; 1748539d3782SShanker Donthineni struct page *page; 17499347359aSShanker Donthineni void *base; 17509347359aSShanker Donthineni 17519347359aSShanker Donthineni retry_alloc_baser: 17529347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 17539347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 17549347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 17559347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 17569347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 17579347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 17589347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 17599347359aSShanker Donthineni } 17609347359aSShanker Donthineni 1761539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); 1762539d3782SShanker Donthineni if (!page) 17639347359aSShanker Donthineni return -ENOMEM; 17649347359aSShanker Donthineni 1765539d3782SShanker Donthineni base = (void *)page_address(page); 176630ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 176730ae9610SShanker Donthineni 176830ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 176930ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 177030ae9610SShanker Donthineni 177130ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 177230ae9610SShanker Donthineni if (psz != SZ_64K) { 177330ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 177430ae9610SShanker Donthineni free_pages((unsigned long)base, order); 177530ae9610SShanker Donthineni return -ENXIO; 177630ae9610SShanker Donthineni } 177730ae9610SShanker Donthineni 177830ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 177930ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 178030ae9610SShanker Donthineni } 178130ae9610SShanker Donthineni 17829347359aSShanker Donthineni retry_baser: 178330ae9610SShanker Donthineni val = (baser_phys | 17849347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 17859347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 17869347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 17879347359aSShanker Donthineni cache | 17889347359aSShanker Donthineni shr | 17899347359aSShanker Donthineni GITS_BASER_VALID); 17909347359aSShanker Donthineni 17913faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 17923faf24eaSShanker Donthineni 17939347359aSShanker Donthineni switch (psz) { 17949347359aSShanker Donthineni case SZ_4K: 17959347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 17969347359aSShanker Donthineni break; 17979347359aSShanker Donthineni case SZ_16K: 17989347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 17999347359aSShanker Donthineni break; 18009347359aSShanker Donthineni case SZ_64K: 18019347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 18029347359aSShanker Donthineni break; 18039347359aSShanker Donthineni } 18049347359aSShanker Donthineni 18059347359aSShanker Donthineni its_write_baser(its, baser, val); 18069347359aSShanker Donthineni tmp = baser->val; 18079347359aSShanker Donthineni 18089347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 18099347359aSShanker Donthineni /* 18109347359aSShanker Donthineni * Shareability didn't stick. Just use 18119347359aSShanker Donthineni * whatever the read reported, which is likely 18129347359aSShanker Donthineni * to be the only thing this redistributor 18139347359aSShanker Donthineni * supports. If that's zero, make it 18149347359aSShanker Donthineni * non-cacheable as well. 18159347359aSShanker Donthineni */ 18169347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 18179347359aSShanker Donthineni if (!shr) { 18189347359aSShanker Donthineni cache = GITS_BASER_nC; 1819328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 18209347359aSShanker Donthineni } 18219347359aSShanker Donthineni goto retry_baser; 18229347359aSShanker Donthineni } 18239347359aSShanker Donthineni 18249347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 18259347359aSShanker Donthineni /* 18269347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 18279347359aSShanker Donthineni * size and retry. If we reach 4K, then 18289347359aSShanker Donthineni * something is horribly wrong... 18299347359aSShanker Donthineni */ 18309347359aSShanker Donthineni free_pages((unsigned long)base, order); 18319347359aSShanker Donthineni baser->base = NULL; 18329347359aSShanker Donthineni 18339347359aSShanker Donthineni switch (psz) { 18349347359aSShanker Donthineni case SZ_16K: 18359347359aSShanker Donthineni psz = SZ_4K; 18369347359aSShanker Donthineni goto retry_alloc_baser; 18379347359aSShanker Donthineni case SZ_64K: 18389347359aSShanker Donthineni psz = SZ_16K; 18399347359aSShanker Donthineni goto retry_alloc_baser; 18409347359aSShanker Donthineni } 18419347359aSShanker Donthineni } 18429347359aSShanker Donthineni 18439347359aSShanker Donthineni if (val != tmp) { 1844b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 18459347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1846b11283ebSVladimir Murzin val, tmp); 18479347359aSShanker Donthineni free_pages((unsigned long)base, order); 18489347359aSShanker Donthineni return -ENXIO; 18499347359aSShanker Donthineni } 18509347359aSShanker Donthineni 18519347359aSShanker Donthineni baser->order = order; 18529347359aSShanker Donthineni baser->base = base; 18539347359aSShanker Donthineni baser->psz = psz; 18543faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 18559347359aSShanker Donthineni 18563faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1857d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 18589347359aSShanker Donthineni its_base_type_string[type], 18599347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 18603faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 18619347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 18629347359aSShanker Donthineni 18639347359aSShanker Donthineni return 0; 18649347359aSShanker Donthineni } 18659347359aSShanker Donthineni 18664cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 18674cacac57SMarc Zyngier struct its_baser *baser, 186832bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 18694b75c459SShanker Donthineni { 18704cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 18714cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 18724cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 18732fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 18744b75c459SShanker Donthineni u32 new_order = *order; 18753faf24eaSShanker Donthineni bool indirect = false; 18763faf24eaSShanker Donthineni 18773faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 18783faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 18793faf24eaSShanker Donthineni /* 18803faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 18813faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 18823faf24eaSShanker Donthineni */ 18833faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 18843faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 18853faf24eaSShanker Donthineni 18863faf24eaSShanker Donthineni if (indirect) { 18873faf24eaSShanker Donthineni /* 18883faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 18893faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 18903faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 18913faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 18923faf24eaSShanker Donthineni * entry size. 18933faf24eaSShanker Donthineni */ 1894d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 18953faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 18963faf24eaSShanker Donthineni } 18973faf24eaSShanker Donthineni } 18984b75c459SShanker Donthineni 18994b75c459SShanker Donthineni /* 19004b75c459SShanker Donthineni * Allocate as many entries as required to fit the 19014b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 19024b75c459SShanker Donthineni * space being incredibly sparse, this results in a 19033faf24eaSShanker Donthineni * massive waste of memory if two-level device table 19043faf24eaSShanker Donthineni * feature is not supported by hardware. 19054b75c459SShanker Donthineni */ 19064b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 19074b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 19084b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1909d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 19104cacac57SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %u->%u\n", 19114cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 19124cacac57SMarc Zyngier its->device_ids, ids); 19134b75c459SShanker Donthineni } 19144b75c459SShanker Donthineni 19154b75c459SShanker Donthineni *order = new_order; 19163faf24eaSShanker Donthineni 19173faf24eaSShanker Donthineni return indirect; 19184b75c459SShanker Donthineni } 19194b75c459SShanker Donthineni 19201ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 19211ac19ca6SMarc Zyngier { 19221ac19ca6SMarc Zyngier int i; 19231ac19ca6SMarc Zyngier 19241ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 19251a485f4dSShanker Donthineni if (its->tables[i].base) { 19261a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 19271a485f4dSShanker Donthineni its->tables[i].order); 19281a485f4dSShanker Donthineni its->tables[i].base = NULL; 19291ac19ca6SMarc Zyngier } 19301ac19ca6SMarc Zyngier } 19311ac19ca6SMarc Zyngier } 19321ac19ca6SMarc Zyngier 19330e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 19341ac19ca6SMarc Zyngier { 19351ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 19362fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 19379347359aSShanker Donthineni u32 psz = SZ_64K; 19389347359aSShanker Donthineni int err, i; 193994100970SRobert Richter 1940fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 1941fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 19429347359aSShanker Donthineni cache = GITS_BASER_nCnB; 1943466b7d16SShanker Donthineni 19441ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 19452d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 19462d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 19471ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 19489347359aSShanker Donthineni u32 order = get_order(psz); 19493faf24eaSShanker Donthineni bool indirect = false; 19501ac19ca6SMarc Zyngier 19514cacac57SMarc Zyngier switch (type) { 19524cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 19531ac19ca6SMarc Zyngier continue; 19541ac19ca6SMarc Zyngier 19554cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 195632bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 195732bd44dcSShanker Donthineni psz, &order, 195832bd44dcSShanker Donthineni its->device_ids); 19598d565748SZenghui Yu break; 19608d565748SZenghui Yu 19614cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 19624cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 196332bd44dcSShanker Donthineni psz, &order, 196432bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 19654cacac57SMarc Zyngier break; 19664cacac57SMarc Zyngier } 1967f54b97edSMarc Zyngier 19683faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 19699347359aSShanker Donthineni if (err < 0) { 19709347359aSShanker Donthineni its_free_tables(its); 19719347359aSShanker Donthineni return err; 197230f21363SRobert Richter } 197330f21363SRobert Richter 19749347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 19759347359aSShanker Donthineni psz = baser->psz; 19769347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 19779347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 19781ac19ca6SMarc Zyngier } 19791ac19ca6SMarc Zyngier 19801ac19ca6SMarc Zyngier return 0; 19811ac19ca6SMarc Zyngier } 19821ac19ca6SMarc Zyngier 19831ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 19841ac19ca6SMarc Zyngier { 198583559b47SMarc Zyngier int i; 198683559b47SMarc Zyngier 19876396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 19881ac19ca6SMarc Zyngier GFP_KERNEL); 19891ac19ca6SMarc Zyngier if (!its->collections) 19901ac19ca6SMarc Zyngier return -ENOMEM; 19911ac19ca6SMarc Zyngier 199283559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 199383559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 199483559b47SMarc Zyngier 19951ac19ca6SMarc Zyngier return 0; 19961ac19ca6SMarc Zyngier } 19971ac19ca6SMarc Zyngier 19987c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 19997c297a2dSMarc Zyngier { 20007c297a2dSMarc Zyngier struct page *pend_page; 2001adaab500SMarc Zyngier 20027c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 2003adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 20047c297a2dSMarc Zyngier if (!pend_page) 20057c297a2dSMarc Zyngier return NULL; 20067c297a2dSMarc Zyngier 20077c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 20087c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 20097c297a2dSMarc Zyngier 20107c297a2dSMarc Zyngier return pend_page; 20117c297a2dSMarc Zyngier } 20127c297a2dSMarc Zyngier 20137d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 20147d75bbb4SMarc Zyngier { 2015adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 20167d75bbb4SMarc Zyngier } 20177d75bbb4SMarc Zyngier 2018c6e2ccb6SMarc Zyngier /* 20195e2c9f9aSMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. Any other 20205e2c9f9aSMarc Zyngier * case is wrong in the absence of firmware/EFI support. 2021c6e2ccb6SMarc Zyngier */ 2022c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 2023c440a9d9SMarc Zyngier { 20245e2c9f9aSMarc Zyngier phys_addr_t addr; 20255e2c9f9aSMarc Zyngier u64 val; 2026c6e2ccb6SMarc Zyngier 20275e2c9f9aSMarc Zyngier /* Check whether the property table is in a reserved region */ 20285e2c9f9aSMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 20295e2c9f9aSMarc Zyngier addr = val & GENMASK_ULL(51, 12); 20305e2c9f9aSMarc Zyngier 20315e2c9f9aSMarc Zyngier return gic_check_reserved_range(addr, LPI_PROPBASE_SZ); 2032c440a9d9SMarc Zyngier } 2033c440a9d9SMarc Zyngier 203411e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 203511e37d35SMarc Zyngier { 2036c440a9d9SMarc Zyngier u64 val; 203711e37d35SMarc Zyngier int err, cpu; 203811e37d35SMarc Zyngier 2039c440a9d9SMarc Zyngier /* 2040c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 2041c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 2042c440a9d9SMarc Zyngier */ 2043c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 2044c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 2045c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 2046c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 2047c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 2048c440a9d9SMarc Zyngier } 2049c440a9d9SMarc Zyngier 205011e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 205111e37d35SMarc Zyngier if (err) 205211e37d35SMarc Zyngier return err; 205311e37d35SMarc Zyngier 205411e37d35SMarc Zyngier /* 205511e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 205611e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 205711e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 205811e37d35SMarc Zyngier */ 205911e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 206011e37d35SMarc Zyngier struct page *pend_page; 206111e37d35SMarc Zyngier 206211e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 206311e37d35SMarc Zyngier if (!pend_page) { 206411e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 206511e37d35SMarc Zyngier return -ENOMEM; 206611e37d35SMarc Zyngier } 206711e37d35SMarc Zyngier 206811e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 206911e37d35SMarc Zyngier } 207011e37d35SMarc Zyngier 207111e37d35SMarc Zyngier return 0; 207211e37d35SMarc Zyngier } 207311e37d35SMarc Zyngier 20746479450fSHeyi Guo static u64 its_clear_vpend_valid(void __iomem *vlpi_base) 20756479450fSHeyi Guo { 20766479450fSHeyi Guo u32 count = 1000000; /* 1s! */ 20776479450fSHeyi Guo bool clean; 20786479450fSHeyi Guo u64 val; 20796479450fSHeyi Guo 20806479450fSHeyi Guo val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 20816479450fSHeyi Guo val &= ~GICR_VPENDBASER_Valid; 20826479450fSHeyi Guo gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 20836479450fSHeyi Guo 20846479450fSHeyi Guo do { 20856479450fSHeyi Guo val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 20866479450fSHeyi Guo clean = !(val & GICR_VPENDBASER_Dirty); 20876479450fSHeyi Guo if (!clean) { 20886479450fSHeyi Guo count--; 20896479450fSHeyi Guo cpu_relax(); 20906479450fSHeyi Guo udelay(1); 20916479450fSHeyi Guo } 20926479450fSHeyi Guo } while (!clean && count); 20936479450fSHeyi Guo 20946479450fSHeyi Guo return val; 20956479450fSHeyi Guo } 20966479450fSHeyi Guo 20971ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 20981ac19ca6SMarc Zyngier { 20991ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 21001ac19ca6SMarc Zyngier struct page *pend_page; 210111e37d35SMarc Zyngier phys_addr_t paddr; 21021ac19ca6SMarc Zyngier u64 val, tmp; 21031ac19ca6SMarc Zyngier 210411e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 21051ac19ca6SMarc Zyngier return; 21061ac19ca6SMarc Zyngier 2107c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 2108c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 2109c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 2110f842ca8eSMarc Zyngier /* 2111f842ca8eSMarc Zyngier * Check that we get the same property table on all 2112f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 2113f842ca8eSMarc Zyngier */ 2114f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 2115f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 2116f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 2117f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 2118f842ca8eSMarc Zyngier 2119c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2120c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 2121c440a9d9SMarc Zyngier 21225e2c9f9aSMarc Zyngier WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ)); 2123c440a9d9SMarc Zyngier its_free_pending_table(gic_data_rdist()->pend_page); 2124c440a9d9SMarc Zyngier gic_data_rdist()->pend_page = NULL; 2125c440a9d9SMarc Zyngier 2126c440a9d9SMarc Zyngier goto out; 2127c440a9d9SMarc Zyngier } 2128c440a9d9SMarc Zyngier 212911e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 21301ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 21313fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 21321ac19ca6SMarc Zyngier 21331ac19ca6SMarc Zyngier /* set PROPBASE */ 2134e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 21351ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 21362fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 21371ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 21381ac19ca6SMarc Zyngier 21390968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 21400968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 21411ac19ca6SMarc Zyngier 21421ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 2143241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 2144241a386cSMarc Zyngier /* 2145241a386cSMarc Zyngier * The HW reports non-shareable, we must 2146241a386cSMarc Zyngier * remove the cacheability attributes as 2147241a386cSMarc Zyngier * well. 2148241a386cSMarc Zyngier */ 2149241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 2150241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 2151241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 21520968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 2153241a386cSMarc Zyngier } 21541ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 21551ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 21561ac19ca6SMarc Zyngier } 21571ac19ca6SMarc Zyngier 21581ac19ca6SMarc Zyngier /* set PENDBASE */ 21591ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 21604ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 21612fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 21621ac19ca6SMarc Zyngier 21630968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 21640968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2165241a386cSMarc Zyngier 2166241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 2167241a386cSMarc Zyngier /* 2168241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 2169241a386cSMarc Zyngier * cacheability attributes as well. 2170241a386cSMarc Zyngier */ 2171241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 2172241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 2173241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 21740968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 2175241a386cSMarc Zyngier } 21761ac19ca6SMarc Zyngier 21771ac19ca6SMarc Zyngier /* Enable LPIs */ 21781ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 21791ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 21801ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 21811ac19ca6SMarc Zyngier 21826479450fSHeyi Guo if (gic_rdists->has_vlpis) { 21836479450fSHeyi Guo void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 21846479450fSHeyi Guo 21856479450fSHeyi Guo /* 21866479450fSHeyi Guo * It's possible for CPU to receive VLPIs before it is 21876479450fSHeyi Guo * sheduled as a vPE, especially for the first CPU, and the 21886479450fSHeyi Guo * VLPI with INTID larger than 2^(IDbits+1) will be considered 21896479450fSHeyi Guo * as out of range and dropped by GIC. 21906479450fSHeyi Guo * So we initialize IDbits to known value to avoid VLPI drop. 21916479450fSHeyi Guo */ 21926479450fSHeyi Guo val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 21936479450fSHeyi Guo pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n", 21946479450fSHeyi Guo smp_processor_id(), val); 21956479450fSHeyi Guo gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 21966479450fSHeyi Guo 21976479450fSHeyi Guo /* 21986479450fSHeyi Guo * Also clear Valid bit of GICR_VPENDBASER, in case some 21996479450fSHeyi Guo * ancient programming gets left in and has possibility of 22006479450fSHeyi Guo * corrupting memory. 22016479450fSHeyi Guo */ 22026479450fSHeyi Guo val = its_clear_vpend_valid(vlpi_base); 22036479450fSHeyi Guo WARN_ON(val & GICR_VPENDBASER_Dirty); 22046479450fSHeyi Guo } 22056479450fSHeyi Guo 22061ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 22071ac19ca6SMarc Zyngier dsb(sy); 2208c440a9d9SMarc Zyngier out: 220911e37d35SMarc Zyngier gic_data_rdist()->lpi_enabled = true; 2210c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 221111e37d35SMarc Zyngier smp_processor_id(), 2212c440a9d9SMarc Zyngier gic_data_rdist()->pend_page ? "allocated" : "reserved", 221311e37d35SMarc Zyngier &paddr); 22141ac19ca6SMarc Zyngier } 22151ac19ca6SMarc Zyngier 2216920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 22171ac19ca6SMarc Zyngier { 2218920181ceSDerek Basehore int cpu = smp_processor_id(); 22191ac19ca6SMarc Zyngier u64 target; 22201ac19ca6SMarc Zyngier 2221fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 2222fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 2223fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 2224fbf8f40eSGanapatrao Kulkarni 2225fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 2226fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 2227fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 2228920181ceSDerek Basehore return; 2229fbf8f40eSGanapatrao Kulkarni } 2230fbf8f40eSGanapatrao Kulkarni 22311ac19ca6SMarc Zyngier /* 22321ac19ca6SMarc Zyngier * We now have to bind each collection to its target 22331ac19ca6SMarc Zyngier * redistributor. 22341ac19ca6SMarc Zyngier */ 2235589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 22361ac19ca6SMarc Zyngier /* 22371ac19ca6SMarc Zyngier * This ITS wants the physical address of the 22381ac19ca6SMarc Zyngier * redistributor. 22391ac19ca6SMarc Zyngier */ 22401ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 22411ac19ca6SMarc Zyngier } else { 2242920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 2243589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 2244263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 22451ac19ca6SMarc Zyngier } 22461ac19ca6SMarc Zyngier 22471ac19ca6SMarc Zyngier /* Perform collection mapping */ 22481ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 22491ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 22501ac19ca6SMarc Zyngier 22511ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 22521ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 22531ac19ca6SMarc Zyngier } 22541ac19ca6SMarc Zyngier 2255920181ceSDerek Basehore static void its_cpu_init_collections(void) 2256920181ceSDerek Basehore { 2257920181ceSDerek Basehore struct its_node *its; 2258920181ceSDerek Basehore 2259a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 2260920181ceSDerek Basehore 2261920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 2262920181ceSDerek Basehore its_cpu_init_collection(its); 2263920181ceSDerek Basehore 2264a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 22651ac19ca6SMarc Zyngier } 226684a6a2e7SMarc Zyngier 226784a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 226884a6a2e7SMarc Zyngier { 226984a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 22703e39e8f5SMarc Zyngier unsigned long flags; 227184a6a2e7SMarc Zyngier 22723e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 227384a6a2e7SMarc Zyngier 227484a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 227584a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 227684a6a2e7SMarc Zyngier its_dev = tmp; 227784a6a2e7SMarc Zyngier break; 227884a6a2e7SMarc Zyngier } 227984a6a2e7SMarc Zyngier } 228084a6a2e7SMarc Zyngier 22813e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 228284a6a2e7SMarc Zyngier 228384a6a2e7SMarc Zyngier return its_dev; 228484a6a2e7SMarc Zyngier } 228584a6a2e7SMarc Zyngier 2286466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 2287466b7d16SShanker Donthineni { 2288466b7d16SShanker Donthineni int i; 2289466b7d16SShanker Donthineni 2290466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 2291466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 2292466b7d16SShanker Donthineni return &its->tables[i]; 2293466b7d16SShanker Donthineni } 2294466b7d16SShanker Donthineni 2295466b7d16SShanker Donthineni return NULL; 2296466b7d16SShanker Donthineni } 2297466b7d16SShanker Donthineni 2298539d3782SShanker Donthineni static bool its_alloc_table_entry(struct its_node *its, 2299539d3782SShanker Donthineni struct its_baser *baser, u32 id) 23003faf24eaSShanker Donthineni { 23013faf24eaSShanker Donthineni struct page *page; 23023faf24eaSShanker Donthineni u32 esz, idx; 23033faf24eaSShanker Donthineni __le64 *table; 23043faf24eaSShanker Donthineni 23053faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 23063faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 23073faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 230870cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 23093faf24eaSShanker Donthineni 23103faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 231170cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 23123faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 23133faf24eaSShanker Donthineni return false; 23143faf24eaSShanker Donthineni 23153faf24eaSShanker Donthineni table = baser->base; 23163faf24eaSShanker Donthineni 23173faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 23183faf24eaSShanker Donthineni if (!table[idx]) { 2319539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 2320539d3782SShanker Donthineni get_order(baser->psz)); 23213faf24eaSShanker Donthineni if (!page) 23223faf24eaSShanker Donthineni return false; 23233faf24eaSShanker Donthineni 23243faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 23253faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2326328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 23273faf24eaSShanker Donthineni 23283faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 23293faf24eaSShanker Donthineni 23303faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 23313faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2332328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 23333faf24eaSShanker Donthineni 23343faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 23353faf24eaSShanker Donthineni dsb(sy); 23363faf24eaSShanker Donthineni } 23373faf24eaSShanker Donthineni 23383faf24eaSShanker Donthineni return true; 23393faf24eaSShanker Donthineni } 23403faf24eaSShanker Donthineni 234170cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 234270cc81edSMarc Zyngier { 234370cc81edSMarc Zyngier struct its_baser *baser; 234470cc81edSMarc Zyngier 234570cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 234670cc81edSMarc Zyngier 234770cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 234870cc81edSMarc Zyngier if (!baser) 234970cc81edSMarc Zyngier return (ilog2(dev_id) < its->device_ids); 235070cc81edSMarc Zyngier 2351539d3782SShanker Donthineni return its_alloc_table_entry(its, baser, dev_id); 235270cc81edSMarc Zyngier } 235370cc81edSMarc Zyngier 23547d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 23557d75bbb4SMarc Zyngier { 23567d75bbb4SMarc Zyngier struct its_node *its; 23577d75bbb4SMarc Zyngier 23587d75bbb4SMarc Zyngier /* 23597d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 23607d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 23617d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 23627d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 23637d75bbb4SMarc Zyngier * anyway, right?). 23647d75bbb4SMarc Zyngier */ 23657d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 23667d75bbb4SMarc Zyngier struct its_baser *baser; 23677d75bbb4SMarc Zyngier 23687d75bbb4SMarc Zyngier if (!its->is_v4) 23697d75bbb4SMarc Zyngier continue; 23707d75bbb4SMarc Zyngier 23717d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 23727d75bbb4SMarc Zyngier if (!baser) 23737d75bbb4SMarc Zyngier return false; 23747d75bbb4SMarc Zyngier 2375539d3782SShanker Donthineni if (!its_alloc_table_entry(its, baser, vpe_id)) 23767d75bbb4SMarc Zyngier return false; 23777d75bbb4SMarc Zyngier } 23787d75bbb4SMarc Zyngier 23797d75bbb4SMarc Zyngier return true; 23807d75bbb4SMarc Zyngier } 23817d75bbb4SMarc Zyngier 238284a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 238393f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 238484a6a2e7SMarc Zyngier { 238584a6a2e7SMarc Zyngier struct its_device *dev; 238693f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 23873e39e8f5SMarc Zyngier unsigned long flags; 2388591e5becSMarc Zyngier u16 *col_map = NULL; 238984a6a2e7SMarc Zyngier void *itt; 239084a6a2e7SMarc Zyngier int lpi_base; 239184a6a2e7SMarc Zyngier int nr_lpis; 2392c8481267SMarc Zyngier int nr_ites; 239384a6a2e7SMarc Zyngier int sz; 239484a6a2e7SMarc Zyngier 23953faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2396466b7d16SShanker Donthineni return NULL; 2397466b7d16SShanker Donthineni 2398147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 2399147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 2400147c8f37SMarc Zyngier 240184a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2402c8481267SMarc Zyngier /* 2403147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 2404147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 2405c8481267SMarc Zyngier */ 2406147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 2407c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 240884a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 2409539d3782SShanker Donthineni itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); 241093f94ea0SMarc Zyngier if (alloc_lpis) { 241138dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 2412591e5becSMarc Zyngier if (lpi_map) 24136396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 241493f94ea0SMarc Zyngier GFP_KERNEL); 241593f94ea0SMarc Zyngier } else { 24166396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 241793f94ea0SMarc Zyngier nr_lpis = 0; 241893f94ea0SMarc Zyngier lpi_base = 0; 241993f94ea0SMarc Zyngier } 242084a6a2e7SMarc Zyngier 242193f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 242284a6a2e7SMarc Zyngier kfree(dev); 242384a6a2e7SMarc Zyngier kfree(itt); 242484a6a2e7SMarc Zyngier kfree(lpi_map); 2425591e5becSMarc Zyngier kfree(col_map); 242684a6a2e7SMarc Zyngier return NULL; 242784a6a2e7SMarc Zyngier } 242884a6a2e7SMarc Zyngier 2429328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 24305a9a8915SMarc Zyngier 243184a6a2e7SMarc Zyngier dev->its = its; 243284a6a2e7SMarc Zyngier dev->itt = itt; 2433c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2434591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2435591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2436591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2437591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 2438d011e4e6SMarc Zyngier mutex_init(&dev->event_map.vlpi_lock); 243984a6a2e7SMarc Zyngier dev->device_id = dev_id; 244084a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 244184a6a2e7SMarc Zyngier 24423e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 244384a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 24443e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 244584a6a2e7SMarc Zyngier 244684a6a2e7SMarc Zyngier /* Map device to its ITT */ 244784a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 244884a6a2e7SMarc Zyngier 244984a6a2e7SMarc Zyngier return dev; 245084a6a2e7SMarc Zyngier } 245184a6a2e7SMarc Zyngier 245284a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 245384a6a2e7SMarc Zyngier { 24543e39e8f5SMarc Zyngier unsigned long flags; 24553e39e8f5SMarc Zyngier 24563e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 245784a6a2e7SMarc Zyngier list_del(&its_dev->entry); 24583e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 245984a6a2e7SMarc Zyngier kfree(its_dev->itt); 246084a6a2e7SMarc Zyngier kfree(its_dev); 246184a6a2e7SMarc Zyngier } 2462b48ac83dSMarc Zyngier 24638208d170SMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) 2464b48ac83dSMarc Zyngier { 2465b48ac83dSMarc Zyngier int idx; 2466b48ac83dSMarc Zyngier 24678208d170SMarc Zyngier idx = bitmap_find_free_region(dev->event_map.lpi_map, 24688208d170SMarc Zyngier dev->event_map.nr_lpis, 24698208d170SMarc Zyngier get_count_order(nvecs)); 24708208d170SMarc Zyngier if (idx < 0) 2471b48ac83dSMarc Zyngier return -ENOSPC; 2472b48ac83dSMarc Zyngier 2473591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 2474591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 2475b48ac83dSMarc Zyngier 2476b48ac83dSMarc Zyngier return 0; 2477b48ac83dSMarc Zyngier } 2478b48ac83dSMarc Zyngier 247954456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 2480b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 2481b48ac83dSMarc Zyngier { 2482b48ac83dSMarc Zyngier struct its_node *its; 2483b48ac83dSMarc Zyngier struct its_device *its_dev; 248454456db9SMarc Zyngier struct msi_domain_info *msi_info; 248554456db9SMarc Zyngier u32 dev_id; 24869791ec7dSMarc Zyngier int err = 0; 2487b48ac83dSMarc Zyngier 248854456db9SMarc Zyngier /* 2489a7c90f51SJulien Grall * We ignore "dev" entirely, and rely on the dev_id that has 249054456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 249154456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 249254456db9SMarc Zyngier * are built on top of the ITS. 249354456db9SMarc Zyngier */ 249454456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 249554456db9SMarc Zyngier 249654456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 249754456db9SMarc Zyngier its = msi_info->data; 249854456db9SMarc Zyngier 249920b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 250020b3d54eSMarc Zyngier vpe_proxy.dev && 250120b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 250220b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 250320b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 250420b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 250520b3d54eSMarc Zyngier dev_id); 250620b3d54eSMarc Zyngier return -EINVAL; 250720b3d54eSMarc Zyngier } 250820b3d54eSMarc Zyngier 25099791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 2510f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 2511e8137f4fSMarc Zyngier if (its_dev) { 2512e8137f4fSMarc Zyngier /* 2513e8137f4fSMarc Zyngier * We already have seen this ID, probably through 2514e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 2515e8137f4fSMarc Zyngier * create the device. 2516e8137f4fSMarc Zyngier */ 25179791ec7dSMarc Zyngier its_dev->shared = true; 2518f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 2519e8137f4fSMarc Zyngier goto out; 2520e8137f4fSMarc Zyngier } 2521b48ac83dSMarc Zyngier 252293f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 25239791ec7dSMarc Zyngier if (!its_dev) { 25249791ec7dSMarc Zyngier err = -ENOMEM; 25259791ec7dSMarc Zyngier goto out; 25269791ec7dSMarc Zyngier } 2527b48ac83dSMarc Zyngier 2528f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 2529e8137f4fSMarc Zyngier out: 25309791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 2531b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 25329791ec7dSMarc Zyngier return err; 2533b48ac83dSMarc Zyngier } 2534b48ac83dSMarc Zyngier 253554456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 253654456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 253754456db9SMarc Zyngier }; 253854456db9SMarc Zyngier 2539b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 2540b48ac83dSMarc Zyngier unsigned int virq, 2541b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 2542b48ac83dSMarc Zyngier { 2543f833f57fSMarc Zyngier struct irq_fwspec fwspec; 2544b48ac83dSMarc Zyngier 2545f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 2546f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 2547f833f57fSMarc Zyngier fwspec.param_count = 3; 2548f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 2549f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 2550f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 25513f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 25523f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 25533f010cf1STomasz Nowicki fwspec.param_count = 2; 25543f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 25553f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 2556f833f57fSMarc Zyngier } else { 2557f833f57fSMarc Zyngier return -EINVAL; 2558f833f57fSMarc Zyngier } 2559b48ac83dSMarc Zyngier 2560f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 2561b48ac83dSMarc Zyngier } 2562b48ac83dSMarc Zyngier 2563b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 2564b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 2565b48ac83dSMarc Zyngier { 2566b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 2567b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 256835ae7df2SJulien Grall struct its_node *its = its_dev->its; 2569b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 2570b48ac83dSMarc Zyngier int err; 2571b48ac83dSMarc Zyngier int i; 2572b48ac83dSMarc Zyngier 25738208d170SMarc Zyngier err = its_alloc_device_irq(its_dev, nr_irqs, &hwirq); 2574b48ac83dSMarc Zyngier if (err) 2575b48ac83dSMarc Zyngier return err; 2576b48ac83dSMarc Zyngier 257735ae7df2SJulien Grall err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); 257835ae7df2SJulien Grall if (err) 257935ae7df2SJulien Grall return err; 258035ae7df2SJulien Grall 25818208d170SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 25828208d170SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); 2583b48ac83dSMarc Zyngier if (err) 2584b48ac83dSMarc Zyngier return err; 2585b48ac83dSMarc Zyngier 2586b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 25878208d170SMarc Zyngier hwirq + i, &its_irq_chip, its_dev); 25880d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 2589f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 25908208d170SMarc Zyngier (int)(hwirq + i - its_dev->event_map.lpi_base), 25918208d170SMarc Zyngier (int)(hwirq + i), virq + i); 2592b48ac83dSMarc Zyngier } 2593b48ac83dSMarc Zyngier 2594b48ac83dSMarc Zyngier return 0; 2595b48ac83dSMarc Zyngier } 2596b48ac83dSMarc Zyngier 259772491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 2598702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2599aca268dfSMarc Zyngier { 2600aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2601aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2602fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 26030d224d35SMarc Zyngier int cpu; 2604fbf8f40eSGanapatrao Kulkarni 2605fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 2606fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 2607fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 2608aca268dfSMarc Zyngier 2609591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 2610c1797b11SYang Yingliang cpu = cpumask_first_and(cpu_mask, cpu_online_mask); 2611c1797b11SYang Yingliang if (cpu >= nr_cpu_ids) { 2612c1797b11SYang Yingliang if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) 2613c1797b11SYang Yingliang return -EINVAL; 2614c1797b11SYang Yingliang 2615c1797b11SYang Yingliang cpu = cpumask_first(cpu_online_mask); 2616c1797b11SYang Yingliang } 2617c1797b11SYang Yingliang 26180d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 26190d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 2620591e5becSMarc Zyngier 2621aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 26226a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 262372491643SThomas Gleixner return 0; 2624aca268dfSMarc Zyngier } 2625aca268dfSMarc Zyngier 2626aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 2627aca268dfSMarc Zyngier struct irq_data *d) 2628aca268dfSMarc Zyngier { 2629aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2630aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2631aca268dfSMarc Zyngier 2632aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 2633aca268dfSMarc Zyngier its_send_discard(its_dev, event); 2634aca268dfSMarc Zyngier } 2635aca268dfSMarc Zyngier 2636b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 2637b48ac83dSMarc Zyngier unsigned int nr_irqs) 2638b48ac83dSMarc Zyngier { 2639b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 2640b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 26419791ec7dSMarc Zyngier struct its_node *its = its_dev->its; 2642b48ac83dSMarc Zyngier int i; 2643b48ac83dSMarc Zyngier 2644b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2645b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 2646b48ac83dSMarc Zyngier virq + i); 2647aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 2648b48ac83dSMarc Zyngier 2649b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 2650591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 2651b48ac83dSMarc Zyngier 2652b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 26532da39949SMarc Zyngier irq_domain_reset_irq_data(data); 2654b48ac83dSMarc Zyngier } 2655b48ac83dSMarc Zyngier 26569791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 26579791ec7dSMarc Zyngier 26589791ec7dSMarc Zyngier /* 26599791ec7dSMarc Zyngier * If all interrupts have been freed, start mopping the 26609791ec7dSMarc Zyngier * floor. This is conditionned on the device not being shared. 26619791ec7dSMarc Zyngier */ 26629791ec7dSMarc Zyngier if (!its_dev->shared && 26639791ec7dSMarc Zyngier bitmap_empty(its_dev->event_map.lpi_map, 2664591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 266538dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 2666cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 2667cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 2668cf2be8baSMarc Zyngier kfree(its_dev->event_map.col_map); 2669b48ac83dSMarc Zyngier 2670b48ac83dSMarc Zyngier /* Unmap device/itt */ 2671b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 2672b48ac83dSMarc Zyngier its_free_device(its_dev); 2673b48ac83dSMarc Zyngier } 2674b48ac83dSMarc Zyngier 26759791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 26769791ec7dSMarc Zyngier 2677b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 2678b48ac83dSMarc Zyngier } 2679b48ac83dSMarc Zyngier 2680b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 2681b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 2682b48ac83dSMarc Zyngier .free = its_irq_domain_free, 2683aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 2684aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 2685b48ac83dSMarc Zyngier }; 26864c21f3c2SMarc Zyngier 268720b3d54eSMarc Zyngier /* 268820b3d54eSMarc Zyngier * This is insane. 268920b3d54eSMarc Zyngier * 269020b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 269120b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 269220b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 269320b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 269420b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 269520b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 269620b3d54eSMarc Zyngier * 269720b3d54eSMarc Zyngier * Broken by design(tm). 269820b3d54eSMarc Zyngier */ 269920b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 270020b3d54eSMarc Zyngier { 270120b3d54eSMarc Zyngier /* Already unmapped? */ 270220b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 270320b3d54eSMarc Zyngier return; 270420b3d54eSMarc Zyngier 270520b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 270620b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 270720b3d54eSMarc Zyngier 270820b3d54eSMarc Zyngier /* 270920b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 271020b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 271120b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 271220b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 271320b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 271420b3d54eSMarc Zyngier */ 271520b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 271620b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 271720b3d54eSMarc Zyngier 271820b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 271920b3d54eSMarc Zyngier } 272020b3d54eSMarc Zyngier 272120b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 272220b3d54eSMarc Zyngier { 272320b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 272420b3d54eSMarc Zyngier unsigned long flags; 272520b3d54eSMarc Zyngier 272620b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 272720b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 272820b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 272920b3d54eSMarc Zyngier } 273020b3d54eSMarc Zyngier } 273120b3d54eSMarc Zyngier 273220b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 273320b3d54eSMarc Zyngier { 273420b3d54eSMarc Zyngier /* Already mapped? */ 273520b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 273620b3d54eSMarc Zyngier return; 273720b3d54eSMarc Zyngier 273820b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 273920b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 274020b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 274120b3d54eSMarc Zyngier 274220b3d54eSMarc Zyngier /* Map the new VPE instead */ 274320b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 274420b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 274520b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 274620b3d54eSMarc Zyngier 274720b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 274820b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 274920b3d54eSMarc Zyngier } 275020b3d54eSMarc Zyngier 2751958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 2752958b90d1SMarc Zyngier { 2753958b90d1SMarc Zyngier unsigned long flags; 2754958b90d1SMarc Zyngier struct its_collection *target_col; 2755958b90d1SMarc Zyngier 2756958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2757958b90d1SMarc Zyngier void __iomem *rdbase; 2758958b90d1SMarc Zyngier 2759958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 2760958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2761958b90d1SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2762958b90d1SMarc Zyngier cpu_relax(); 2763958b90d1SMarc Zyngier 2764958b90d1SMarc Zyngier return; 2765958b90d1SMarc Zyngier } 2766958b90d1SMarc Zyngier 2767958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 2768958b90d1SMarc Zyngier 2769958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 2770958b90d1SMarc Zyngier 2771958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 2772958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 2773958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 2774958b90d1SMarc Zyngier 2775958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 2776958b90d1SMarc Zyngier } 2777958b90d1SMarc Zyngier 27783171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 27793171a47aSMarc Zyngier const struct cpumask *mask_val, 27803171a47aSMarc Zyngier bool force) 27813171a47aSMarc Zyngier { 27823171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 27833171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 27843171a47aSMarc Zyngier 27853171a47aSMarc Zyngier /* 27863171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 278720b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 2788958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 2789958b90d1SMarc Zyngier * interrupt to its new location. 27903171a47aSMarc Zyngier */ 27913171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 2792958b90d1SMarc Zyngier int from = vpe->col_idx; 2793958b90d1SMarc Zyngier 27943171a47aSMarc Zyngier vpe->col_idx = cpu; 27953171a47aSMarc Zyngier its_send_vmovp(vpe); 2796958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 27973171a47aSMarc Zyngier } 27983171a47aSMarc Zyngier 279944c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 280044c4c25eSMarc Zyngier 28013171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 28023171a47aSMarc Zyngier } 28033171a47aSMarc Zyngier 2804e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 2805e643d803SMarc Zyngier { 280650c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2807e643d803SMarc Zyngier u64 val; 2808e643d803SMarc Zyngier 2809e643d803SMarc Zyngier /* Schedule the VPE */ 2810e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 2811e643d803SMarc Zyngier GENMASK_ULL(51, 12); 2812e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 2813e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 2814e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 2815e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 2816e643d803SMarc Zyngier 2817e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 2818e643d803SMarc Zyngier GENMASK_ULL(51, 16); 2819e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 2820e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 2821e643d803SMarc Zyngier /* 2822e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 2823e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 2824e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 2825e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 2826e643d803SMarc Zyngier * that the pending table is empty. A good implementation 2827e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 2828e643d803SMarc Zyngier * making this a tolerable issue. 2829e643d803SMarc Zyngier */ 2830e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2831e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 2832e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 2833e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2834e643d803SMarc Zyngier } 2835e643d803SMarc Zyngier 2836e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 2837e643d803SMarc Zyngier { 283850c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2839e643d803SMarc Zyngier u64 val; 2840e643d803SMarc Zyngier 28416479450fSHeyi Guo val = its_clear_vpend_valid(vlpi_base); 2842e643d803SMarc Zyngier 28436479450fSHeyi Guo if (unlikely(val & GICR_VPENDBASER_Dirty)) { 2844e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2845e643d803SMarc Zyngier vpe->idai = false; 2846e643d803SMarc Zyngier vpe->pending_last = true; 2847e643d803SMarc Zyngier } else { 2848e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 2849e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 2850e643d803SMarc Zyngier } 2851e643d803SMarc Zyngier } 2852e643d803SMarc Zyngier 285340619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 285440619a2eSMarc Zyngier { 285540619a2eSMarc Zyngier struct its_node *its; 285640619a2eSMarc Zyngier 285740619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 285840619a2eSMarc Zyngier if (!its->is_v4) 285940619a2eSMarc Zyngier continue; 286040619a2eSMarc Zyngier 28612247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 28622247e1bfSMarc Zyngier continue; 28632247e1bfSMarc Zyngier 28643c1cceebSMarc Zyngier /* 28653c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 28663c1cceebSMarc Zyngier * we need is to reach the redistributors. 28673c1cceebSMarc Zyngier */ 286840619a2eSMarc Zyngier its_send_vinvall(its, vpe); 28693c1cceebSMarc Zyngier return; 287040619a2eSMarc Zyngier } 287140619a2eSMarc Zyngier } 287240619a2eSMarc Zyngier 2873e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 2874e643d803SMarc Zyngier { 2875e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2876e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 2877e643d803SMarc Zyngier 2878e643d803SMarc Zyngier switch (info->cmd_type) { 2879e643d803SMarc Zyngier case SCHEDULE_VPE: 2880e643d803SMarc Zyngier its_vpe_schedule(vpe); 2881e643d803SMarc Zyngier return 0; 2882e643d803SMarc Zyngier 2883e643d803SMarc Zyngier case DESCHEDULE_VPE: 2884e643d803SMarc Zyngier its_vpe_deschedule(vpe); 2885e643d803SMarc Zyngier return 0; 2886e643d803SMarc Zyngier 28875e2f7642SMarc Zyngier case INVALL_VPE: 288840619a2eSMarc Zyngier its_vpe_invall(vpe); 28895e2f7642SMarc Zyngier return 0; 28905e2f7642SMarc Zyngier 2891e643d803SMarc Zyngier default: 2892e643d803SMarc Zyngier return -EINVAL; 2893e643d803SMarc Zyngier } 2894e643d803SMarc Zyngier } 2895e643d803SMarc Zyngier 289620b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 289720b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 289820b3d54eSMarc Zyngier { 289920b3d54eSMarc Zyngier unsigned long flags; 290020b3d54eSMarc Zyngier 290120b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 290220b3d54eSMarc Zyngier 290320b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 290420b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 290520b3d54eSMarc Zyngier 290620b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 290720b3d54eSMarc Zyngier } 290820b3d54eSMarc Zyngier 2909f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 2910f6a91da7SMarc Zyngier { 2911f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 291220b3d54eSMarc Zyngier 291320b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 2914f6a91da7SMarc Zyngier void __iomem *rdbase; 2915f6a91da7SMarc Zyngier 2916f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2917f6a91da7SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_INVLPIR); 2918f6a91da7SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2919f6a91da7SMarc Zyngier cpu_relax(); 292020b3d54eSMarc Zyngier } else { 292120b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 292220b3d54eSMarc Zyngier } 2923f6a91da7SMarc Zyngier } 2924f6a91da7SMarc Zyngier 2925f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 2926f6a91da7SMarc Zyngier { 2927f6a91da7SMarc Zyngier /* 2928f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 2929f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 2930f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 2931f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 2932f6a91da7SMarc Zyngier */ 2933f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 2934f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2935f6a91da7SMarc Zyngier } 2936f6a91da7SMarc Zyngier 2937f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 2938f6a91da7SMarc Zyngier { 2939f6a91da7SMarc Zyngier /* Same hack as above... */ 2940f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 2941f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2942f6a91da7SMarc Zyngier } 2943f6a91da7SMarc Zyngier 2944e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 2945e57a3e28SMarc Zyngier enum irqchip_irq_state which, 2946e57a3e28SMarc Zyngier bool state) 2947e57a3e28SMarc Zyngier { 2948e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2949e57a3e28SMarc Zyngier 2950e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 2951e57a3e28SMarc Zyngier return -EINVAL; 2952e57a3e28SMarc Zyngier 2953e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2954e57a3e28SMarc Zyngier void __iomem *rdbase; 2955e57a3e28SMarc Zyngier 2956e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2957e57a3e28SMarc Zyngier if (state) { 2958e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 2959e57a3e28SMarc Zyngier } else { 2960e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2961e57a3e28SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2962e57a3e28SMarc Zyngier cpu_relax(); 2963e57a3e28SMarc Zyngier } 2964e57a3e28SMarc Zyngier } else { 2965e57a3e28SMarc Zyngier if (state) 2966e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 2967e57a3e28SMarc Zyngier else 2968e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 2969e57a3e28SMarc Zyngier } 2970e57a3e28SMarc Zyngier 2971e57a3e28SMarc Zyngier return 0; 2972e57a3e28SMarc Zyngier } 2973e57a3e28SMarc Zyngier 29748fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 29758fff27aeSMarc Zyngier .name = "GICv4-vpe", 2976f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 2977f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 2978f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 29793171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 2980e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 2981e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 29828fff27aeSMarc Zyngier }; 29838fff27aeSMarc Zyngier 29847d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 29857d75bbb4SMarc Zyngier { 298632bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 29877d75bbb4SMarc Zyngier } 29887d75bbb4SMarc Zyngier 29897d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 29907d75bbb4SMarc Zyngier { 29917d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 29927d75bbb4SMarc Zyngier } 29937d75bbb4SMarc Zyngier 29947d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 29957d75bbb4SMarc Zyngier { 29967d75bbb4SMarc Zyngier struct page *vpt_page; 29977d75bbb4SMarc Zyngier int vpe_id; 29987d75bbb4SMarc Zyngier 29997d75bbb4SMarc Zyngier /* Allocate vpe_id */ 30007d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 30017d75bbb4SMarc Zyngier if (vpe_id < 0) 30027d75bbb4SMarc Zyngier return vpe_id; 30037d75bbb4SMarc Zyngier 30047d75bbb4SMarc Zyngier /* Allocate VPT */ 30057d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 30067d75bbb4SMarc Zyngier if (!vpt_page) { 30077d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 30087d75bbb4SMarc Zyngier return -ENOMEM; 30097d75bbb4SMarc Zyngier } 30107d75bbb4SMarc Zyngier 30117d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 30127d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 30137d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 30147d75bbb4SMarc Zyngier return -ENOMEM; 30157d75bbb4SMarc Zyngier } 30167d75bbb4SMarc Zyngier 30177d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 30187d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 301920b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 30207d75bbb4SMarc Zyngier 30217d75bbb4SMarc Zyngier return 0; 30227d75bbb4SMarc Zyngier } 30237d75bbb4SMarc Zyngier 30247d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 30257d75bbb4SMarc Zyngier { 302620b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 30277d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 30287d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 30297d75bbb4SMarc Zyngier } 30307d75bbb4SMarc Zyngier 30317d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 30327d75bbb4SMarc Zyngier unsigned int virq, 30337d75bbb4SMarc Zyngier unsigned int nr_irqs) 30347d75bbb4SMarc Zyngier { 30357d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 30367d75bbb4SMarc Zyngier int i; 30377d75bbb4SMarc Zyngier 30387d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 30397d75bbb4SMarc Zyngier 30407d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 30417d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 30427d75bbb4SMarc Zyngier virq + i); 30437d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 30447d75bbb4SMarc Zyngier 30457d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 30467d75bbb4SMarc Zyngier 30477d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 30487d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 30497d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 30507d75bbb4SMarc Zyngier } 30517d75bbb4SMarc Zyngier 30527d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 305338dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 30547d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 30557d75bbb4SMarc Zyngier } 30567d75bbb4SMarc Zyngier } 30577d75bbb4SMarc Zyngier 30587d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 30597d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 30607d75bbb4SMarc Zyngier { 30617d75bbb4SMarc Zyngier struct its_vm *vm = args; 30627d75bbb4SMarc Zyngier unsigned long *bitmap; 30637d75bbb4SMarc Zyngier struct page *vprop_page; 30647d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 30657d75bbb4SMarc Zyngier 30667d75bbb4SMarc Zyngier BUG_ON(!vm); 30677d75bbb4SMarc Zyngier 306838dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 30697d75bbb4SMarc Zyngier if (!bitmap) 30707d75bbb4SMarc Zyngier return -ENOMEM; 30717d75bbb4SMarc Zyngier 30727d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 307338dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 30747d75bbb4SMarc Zyngier return -ENOMEM; 30757d75bbb4SMarc Zyngier } 30767d75bbb4SMarc Zyngier 30777d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 30787d75bbb4SMarc Zyngier if (!vprop_page) { 307938dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 30807d75bbb4SMarc Zyngier return -ENOMEM; 30817d75bbb4SMarc Zyngier } 30827d75bbb4SMarc Zyngier 30837d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 30847d75bbb4SMarc Zyngier vm->db_lpi_base = base; 30857d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 30867d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 30877d75bbb4SMarc Zyngier 30887d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 30897d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 30907d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 30917d75bbb4SMarc Zyngier if (err) 30927d75bbb4SMarc Zyngier break; 30937d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 30947d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 30957d75bbb4SMarc Zyngier if (err) 30967d75bbb4SMarc Zyngier break; 30977d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 30987d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 30997d75bbb4SMarc Zyngier set_bit(i, bitmap); 31007d75bbb4SMarc Zyngier } 31017d75bbb4SMarc Zyngier 31027d75bbb4SMarc Zyngier if (err) { 31037d75bbb4SMarc Zyngier if (i > 0) 31047d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 31057d75bbb4SMarc Zyngier 310638dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 31077d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 31087d75bbb4SMarc Zyngier } 31097d75bbb4SMarc Zyngier 31107d75bbb4SMarc Zyngier return err; 31117d75bbb4SMarc Zyngier } 31127d75bbb4SMarc Zyngier 311372491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 3114702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3115eb78192bSMarc Zyngier { 3116eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 311740619a2eSMarc Zyngier struct its_node *its; 3118eb78192bSMarc Zyngier 31192247e1bfSMarc Zyngier /* If we use the list map, we issue VMAPP on demand... */ 31202247e1bfSMarc Zyngier if (its_list_map) 31216ef930f2SMarc Zyngier return 0; 3122eb78192bSMarc Zyngier 3123eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 3124eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 312540619a2eSMarc Zyngier 312640619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 312740619a2eSMarc Zyngier if (!its->is_v4) 312840619a2eSMarc Zyngier continue; 312940619a2eSMarc Zyngier 313075fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 313140619a2eSMarc Zyngier its_send_vinvall(its, vpe); 313240619a2eSMarc Zyngier } 313340619a2eSMarc Zyngier 313444c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 313544c4c25eSMarc Zyngier 313672491643SThomas Gleixner return 0; 3137eb78192bSMarc Zyngier } 3138eb78192bSMarc Zyngier 3139eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 3140eb78192bSMarc Zyngier struct irq_data *d) 3141eb78192bSMarc Zyngier { 3142eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 314375fd951bSMarc Zyngier struct its_node *its; 3144eb78192bSMarc Zyngier 31452247e1bfSMarc Zyngier /* 31462247e1bfSMarc Zyngier * If we use the list map, we unmap the VPE once no VLPIs are 31472247e1bfSMarc Zyngier * associated with the VM. 31482247e1bfSMarc Zyngier */ 31492247e1bfSMarc Zyngier if (its_list_map) 31502247e1bfSMarc Zyngier return; 31512247e1bfSMarc Zyngier 315275fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 315375fd951bSMarc Zyngier if (!its->is_v4) 315475fd951bSMarc Zyngier continue; 315575fd951bSMarc Zyngier 315675fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 315775fd951bSMarc Zyngier } 3158eb78192bSMarc Zyngier } 3159eb78192bSMarc Zyngier 31608fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 31617d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 31627d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 3163eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 3164eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 31658fff27aeSMarc Zyngier }; 31668fff27aeSMarc Zyngier 31674559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 31684559fbb3SYun Wu { 31694559fbb3SYun Wu u32 count = 1000000; /* 1s */ 31704559fbb3SYun Wu u32 val; 31714559fbb3SYun Wu 31724559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 31737611da86SDavid Daney /* 31747611da86SDavid Daney * GIC architecture specification requires the ITS to be both 31757611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 31767611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 31777611da86SDavid Daney */ 31787611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 31794559fbb3SYun Wu return 0; 31804559fbb3SYun Wu 31814559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 3182d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 31834559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 31844559fbb3SYun Wu 31854559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 31864559fbb3SYun Wu while (1) { 31874559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 31884559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 31894559fbb3SYun Wu return 0; 31904559fbb3SYun Wu 31914559fbb3SYun Wu count--; 31924559fbb3SYun Wu if (!count) 31934559fbb3SYun Wu return -EBUSY; 31944559fbb3SYun Wu 31954559fbb3SYun Wu cpu_relax(); 31964559fbb3SYun Wu udelay(1); 31974559fbb3SYun Wu } 31984559fbb3SYun Wu } 31994559fbb3SYun Wu 32009d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 320194100970SRobert Richter { 320294100970SRobert Richter struct its_node *its = data; 320394100970SRobert Richter 3204fa150019SArd Biesheuvel /* erratum 22375: only alloc 8MB table size */ 3205fa150019SArd Biesheuvel its->device_ids = 0x14; /* 20 bits, 8MB */ 320694100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 32079d111d49SArd Biesheuvel 32089d111d49SArd Biesheuvel return true; 320994100970SRobert Richter } 321094100970SRobert Richter 32119d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 3212fbf8f40eSGanapatrao Kulkarni { 3213fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 3214fbf8f40eSGanapatrao Kulkarni 3215fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 32169d111d49SArd Biesheuvel 32179d111d49SArd Biesheuvel return true; 3218fbf8f40eSGanapatrao Kulkarni } 3219fbf8f40eSGanapatrao Kulkarni 32209d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 322190922a2dSShanker Donthineni { 322290922a2dSShanker Donthineni struct its_node *its = data; 322390922a2dSShanker Donthineni 322490922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 322590922a2dSShanker Donthineni its->ite_size = 16; 32269d111d49SArd Biesheuvel 32279d111d49SArd Biesheuvel return true; 322890922a2dSShanker Donthineni } 322990922a2dSShanker Donthineni 3230558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 3231558b0165SArd Biesheuvel { 3232558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 3233558b0165SArd Biesheuvel 3234558b0165SArd Biesheuvel /* 3235558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 3236558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 3237558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 3238558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 3239558b0165SArd Biesheuvel * the window offset. 3240558b0165SArd Biesheuvel */ 3241558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 3242558b0165SArd Biesheuvel } 3243558b0165SArd Biesheuvel 3244558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 3245558b0165SArd Biesheuvel { 3246558b0165SArd Biesheuvel struct its_node *its = data; 3247558b0165SArd Biesheuvel u32 pre_its_window[2]; 3248558b0165SArd Biesheuvel u32 ids; 3249558b0165SArd Biesheuvel 3250558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 3251558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 3252558b0165SArd Biesheuvel pre_its_window, 3253558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 3254558b0165SArd Biesheuvel 3255558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 3256558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 3257558b0165SArd Biesheuvel 3258558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 3259558b0165SArd Biesheuvel if (its->device_ids > ids) 3260558b0165SArd Biesheuvel its->device_ids = ids; 3261558b0165SArd Biesheuvel 3262558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 3263558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 3264558b0165SArd Biesheuvel return true; 3265558b0165SArd Biesheuvel } 3266558b0165SArd Biesheuvel return false; 3267558b0165SArd Biesheuvel } 3268558b0165SArd Biesheuvel 32695c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 32705c9a882eSMarc Zyngier { 32715c9a882eSMarc Zyngier struct its_node *its = data; 32725c9a882eSMarc Zyngier 32735c9a882eSMarc Zyngier /* 32745c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 32755c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 32765c9a882eSMarc Zyngier */ 32775c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 32785c9a882eSMarc Zyngier return true; 3279cc2d3216SMarc Zyngier } 32804c21f3c2SMarc Zyngier 328167510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 328294100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 328394100970SRobert Richter { 328494100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 328594100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 328694100970SRobert Richter .mask = 0xffff0fff, 328794100970SRobert Richter .init = its_enable_quirk_cavium_22375, 328894100970SRobert Richter }, 328994100970SRobert Richter #endif 3290fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 3291fbf8f40eSGanapatrao Kulkarni { 3292fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 3293fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 3294fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 3295fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 3296fbf8f40eSGanapatrao Kulkarni }, 3297fbf8f40eSGanapatrao Kulkarni #endif 329890922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 329990922a2dSShanker Donthineni { 330090922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 330190922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 330290922a2dSShanker Donthineni .mask = 0xffffffff, 330390922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 330490922a2dSShanker Donthineni }, 330590922a2dSShanker Donthineni #endif 3306558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 3307558b0165SArd Biesheuvel { 3308558b0165SArd Biesheuvel /* 3309558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 3310558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 3311558b0165SArd Biesheuvel * special handling in software. 3312558b0165SArd Biesheuvel */ 3313558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 3314558b0165SArd Biesheuvel .iidr = 0x0001143b, 3315558b0165SArd Biesheuvel .mask = 0xffffffff, 3316558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 3317558b0165SArd Biesheuvel }, 3318558b0165SArd Biesheuvel #endif 33195c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 33205c9a882eSMarc Zyngier { 33215c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 33225c9a882eSMarc Zyngier .iidr = 0x00000004, 33235c9a882eSMarc Zyngier .mask = 0xffffffff, 33245c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 33255c9a882eSMarc Zyngier }, 33265c9a882eSMarc Zyngier #endif 332767510ccaSRobert Richter { 332867510ccaSRobert Richter } 332967510ccaSRobert Richter }; 333067510ccaSRobert Richter 333167510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 333267510ccaSRobert Richter { 333367510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 333467510ccaSRobert Richter 333567510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 333667510ccaSRobert Richter } 333767510ccaSRobert Richter 3338dba0bc7bSDerek Basehore static int its_save_disable(void) 3339dba0bc7bSDerek Basehore { 3340dba0bc7bSDerek Basehore struct its_node *its; 3341dba0bc7bSDerek Basehore int err = 0; 3342dba0bc7bSDerek Basehore 3343a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3344dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3345dba0bc7bSDerek Basehore void __iomem *base; 3346dba0bc7bSDerek Basehore 3347dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3348dba0bc7bSDerek Basehore continue; 3349dba0bc7bSDerek Basehore 3350dba0bc7bSDerek Basehore base = its->base; 3351dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 3352dba0bc7bSDerek Basehore err = its_force_quiescent(base); 3353dba0bc7bSDerek Basehore if (err) { 3354dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 3355dba0bc7bSDerek Basehore &its->phys_base, err); 3356dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3357dba0bc7bSDerek Basehore goto err; 3358dba0bc7bSDerek Basehore } 3359dba0bc7bSDerek Basehore 3360dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 3361dba0bc7bSDerek Basehore } 3362dba0bc7bSDerek Basehore 3363dba0bc7bSDerek Basehore err: 3364dba0bc7bSDerek Basehore if (err) { 3365dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 3366dba0bc7bSDerek Basehore void __iomem *base; 3367dba0bc7bSDerek Basehore 3368dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3369dba0bc7bSDerek Basehore continue; 3370dba0bc7bSDerek Basehore 3371dba0bc7bSDerek Basehore base = its->base; 3372dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3373dba0bc7bSDerek Basehore } 3374dba0bc7bSDerek Basehore } 3375a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3376dba0bc7bSDerek Basehore 3377dba0bc7bSDerek Basehore return err; 3378dba0bc7bSDerek Basehore } 3379dba0bc7bSDerek Basehore 3380dba0bc7bSDerek Basehore static void its_restore_enable(void) 3381dba0bc7bSDerek Basehore { 3382dba0bc7bSDerek Basehore struct its_node *its; 3383dba0bc7bSDerek Basehore int ret; 3384dba0bc7bSDerek Basehore 3385a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3386dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3387dba0bc7bSDerek Basehore void __iomem *base; 3388dba0bc7bSDerek Basehore int i; 3389dba0bc7bSDerek Basehore 3390dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3391dba0bc7bSDerek Basehore continue; 3392dba0bc7bSDerek Basehore 3393dba0bc7bSDerek Basehore base = its->base; 3394dba0bc7bSDerek Basehore 3395dba0bc7bSDerek Basehore /* 3396dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 3397dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 3398dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 3399dba0bc7bSDerek Basehore * Specification. 3400dba0bc7bSDerek Basehore */ 3401dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 3402dba0bc7bSDerek Basehore if (ret) { 3403dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 3404dba0bc7bSDerek Basehore &its->phys_base, ret); 3405dba0bc7bSDerek Basehore continue; 3406dba0bc7bSDerek Basehore } 3407dba0bc7bSDerek Basehore 3408dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 3409dba0bc7bSDerek Basehore 3410dba0bc7bSDerek Basehore /* 3411dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 3412dba0bc7bSDerek Basehore * cmd_write line up with it. 3413dba0bc7bSDerek Basehore */ 3414dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 3415dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 3416dba0bc7bSDerek Basehore 3417dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 3418dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3419dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 3420dba0bc7bSDerek Basehore 3421dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 3422dba0bc7bSDerek Basehore continue; 3423dba0bc7bSDerek Basehore 3424dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 3425dba0bc7bSDerek Basehore } 3426dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3427920181ceSDerek Basehore 3428920181ceSDerek Basehore /* 3429920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 3430920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 3431920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 3432920181ceSDerek Basehore */ 3433920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 3434920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 3435920181ceSDerek Basehore its_cpu_init_collection(its); 3436dba0bc7bSDerek Basehore } 3437a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3438dba0bc7bSDerek Basehore } 3439dba0bc7bSDerek Basehore 3440dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 3441dba0bc7bSDerek Basehore .suspend = its_save_disable, 3442dba0bc7bSDerek Basehore .resume = its_restore_enable, 3443dba0bc7bSDerek Basehore }; 3444dba0bc7bSDerek Basehore 3445db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 3446d14ae5e6STomasz Nowicki { 3447d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 3448d14ae5e6STomasz Nowicki struct msi_domain_info *info; 3449d14ae5e6STomasz Nowicki 3450d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 3451d14ae5e6STomasz Nowicki if (!info) 3452d14ae5e6STomasz Nowicki return -ENOMEM; 3453d14ae5e6STomasz Nowicki 3454db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 3455d14ae5e6STomasz Nowicki if (!inner_domain) { 3456d14ae5e6STomasz Nowicki kfree(info); 3457d14ae5e6STomasz Nowicki return -ENOMEM; 3458d14ae5e6STomasz Nowicki } 3459d14ae5e6STomasz Nowicki 3460db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 346196f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 3462558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 3463d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 3464d14ae5e6STomasz Nowicki info->data = its; 3465d14ae5e6STomasz Nowicki inner_domain->host_data = info; 3466d14ae5e6STomasz Nowicki 3467d14ae5e6STomasz Nowicki return 0; 3468d14ae5e6STomasz Nowicki } 3469d14ae5e6STomasz Nowicki 34708fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 34718fff27aeSMarc Zyngier { 347220b3d54eSMarc Zyngier struct its_node *its; 347320b3d54eSMarc Zyngier u32 devid; 347420b3d54eSMarc Zyngier int entries; 347520b3d54eSMarc Zyngier 347620b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 347720b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 347820b3d54eSMarc Zyngier return 0; 347920b3d54eSMarc Zyngier } 348020b3d54eSMarc Zyngier 348120b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 348220b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 348320b3d54eSMarc Zyngier 348420b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 34856396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 348620b3d54eSMarc Zyngier GFP_KERNEL); 348720b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 348820b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 348920b3d54eSMarc Zyngier return -ENOMEM; 349020b3d54eSMarc Zyngier } 349120b3d54eSMarc Zyngier 349220b3d54eSMarc Zyngier /* Use the last possible DevID */ 349320b3d54eSMarc Zyngier devid = GENMASK(its->device_ids - 1, 0); 349420b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 349520b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 349620b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 349720b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 349820b3d54eSMarc Zyngier return -ENOMEM; 349920b3d54eSMarc Zyngier } 350020b3d54eSMarc Zyngier 3501c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 350220b3d54eSMarc Zyngier 350320b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 350420b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 350520b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 350620b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 350720b3d54eSMarc Zyngier 35088fff27aeSMarc Zyngier return 0; 35098fff27aeSMarc Zyngier } 35108fff27aeSMarc Zyngier 35113dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 35123dfa576bSMarc Zyngier void __iomem *its_base) 35133dfa576bSMarc Zyngier { 35143dfa576bSMarc Zyngier int its_number; 35153dfa576bSMarc Zyngier u32 ctlr; 35163dfa576bSMarc Zyngier 35173dfa576bSMarc Zyngier /* 35183dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 35193dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 35203dfa576bSMarc Zyngier * locking. Should this change, we should address 35213dfa576bSMarc Zyngier * this. 35223dfa576bSMarc Zyngier */ 3523ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 3524ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 35253dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 35263dfa576bSMarc Zyngier &res->start); 35273dfa576bSMarc Zyngier return -EINVAL; 35283dfa576bSMarc Zyngier } 35293dfa576bSMarc Zyngier 35303dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 35313dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 35323dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 35333dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 35343dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 35353dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 35363dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 35373dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 35383dfa576bSMarc Zyngier } 35393dfa576bSMarc Zyngier 35403dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 35413dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 35423dfa576bSMarc Zyngier &res->start, its_number); 35433dfa576bSMarc Zyngier return -EINVAL; 35443dfa576bSMarc Zyngier } 35453dfa576bSMarc Zyngier 35463dfa576bSMarc Zyngier return its_number; 35473dfa576bSMarc Zyngier } 35483dfa576bSMarc Zyngier 3549db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 3550db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 35514c21f3c2SMarc Zyngier { 35524c21f3c2SMarc Zyngier struct its_node *its; 35534c21f3c2SMarc Zyngier void __iomem *its_base; 35543dfa576bSMarc Zyngier u32 val, ctlr; 35553dfa576bSMarc Zyngier u64 baser, tmp, typer; 3556539d3782SShanker Donthineni struct page *page; 35574c21f3c2SMarc Zyngier int err; 35584c21f3c2SMarc Zyngier 3559db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 35604c21f3c2SMarc Zyngier if (!its_base) { 3561db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 35624c21f3c2SMarc Zyngier return -ENOMEM; 35634c21f3c2SMarc Zyngier } 35644c21f3c2SMarc Zyngier 35654c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 35664c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 3567db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 35684c21f3c2SMarc Zyngier err = -ENODEV; 35694c21f3c2SMarc Zyngier goto out_unmap; 35704c21f3c2SMarc Zyngier } 35714c21f3c2SMarc Zyngier 35724559fbb3SYun Wu err = its_force_quiescent(its_base); 35734559fbb3SYun Wu if (err) { 3574db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 35754559fbb3SYun Wu goto out_unmap; 35764559fbb3SYun Wu } 35774559fbb3SYun Wu 3578db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 35794c21f3c2SMarc Zyngier 35804c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 35814c21f3c2SMarc Zyngier if (!its) { 35824c21f3c2SMarc Zyngier err = -ENOMEM; 35834c21f3c2SMarc Zyngier goto out_unmap; 35844c21f3c2SMarc Zyngier } 35854c21f3c2SMarc Zyngier 35864c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 35879791ec7dSMarc Zyngier mutex_init(&its->dev_alloc_lock); 35884c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 35894c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 35903dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 35914c21f3c2SMarc Zyngier its->base = its_base; 3592db40f0a7STomasz Nowicki its->phys_base = res->start; 35933dfa576bSMarc Zyngier its->ite_size = GITS_TYPER_ITT_ENTRY_SIZE(typer); 3594fa150019SArd Biesheuvel its->device_ids = GITS_TYPER_DEVBITS(typer); 35953dfa576bSMarc Zyngier its->is_v4 = !!(typer & GITS_TYPER_VLPIS); 35963dfa576bSMarc Zyngier if (its->is_v4) { 35973dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 35983dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 35993dfa576bSMarc Zyngier if (err < 0) 36003dfa576bSMarc Zyngier goto out_free_its; 36013dfa576bSMarc Zyngier 3602debf6d02SMarc Zyngier its->list_nr = err; 3603debf6d02SMarc Zyngier 36043dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 36053dfa576bSMarc Zyngier &res->start, err); 36063dfa576bSMarc Zyngier } else { 36073dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 36083dfa576bSMarc Zyngier } 36093dfa576bSMarc Zyngier } 36103dfa576bSMarc Zyngier 3611db40f0a7STomasz Nowicki its->numa_node = numa_node; 36124c21f3c2SMarc Zyngier 3613539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 36145bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 3615539d3782SShanker Donthineni if (!page) { 36164c21f3c2SMarc Zyngier err = -ENOMEM; 36174c21f3c2SMarc Zyngier goto out_free_its; 36184c21f3c2SMarc Zyngier } 3619539d3782SShanker Donthineni its->cmd_base = (void *)page_address(page); 36204c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 3621558b0165SArd Biesheuvel its->fwnode_handle = handle; 3622558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 3623558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 36244c21f3c2SMarc Zyngier 362567510ccaSRobert Richter its_enable_quirks(its); 362667510ccaSRobert Richter 36270e0b0f69SShanker Donthineni err = its_alloc_tables(its); 36284c21f3c2SMarc Zyngier if (err) 36294c21f3c2SMarc Zyngier goto out_free_cmd; 36304c21f3c2SMarc Zyngier 36314c21f3c2SMarc Zyngier err = its_alloc_collections(its); 36324c21f3c2SMarc Zyngier if (err) 36334c21f3c2SMarc Zyngier goto out_free_tables; 36344c21f3c2SMarc Zyngier 36354c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 36362fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 36374c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 36384c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 36394c21f3c2SMarc Zyngier GITS_CBASER_VALID); 36404c21f3c2SMarc Zyngier 36410968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 36420968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 36434c21f3c2SMarc Zyngier 36444ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 3645241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 3646241a386cSMarc Zyngier /* 3647241a386cSMarc Zyngier * The HW reports non-shareable, we must 3648241a386cSMarc Zyngier * remove the cacheability attributes as 3649241a386cSMarc Zyngier * well. 3650241a386cSMarc Zyngier */ 3651241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 3652241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 3653241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 36540968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 3655241a386cSMarc Zyngier } 36564c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 36574c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 36584c21f3c2SMarc Zyngier } 36594c21f3c2SMarc Zyngier 36600968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 36613dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 3662d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 3663d51c4b4dSMarc Zyngier if (its->is_v4) 3664d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 3665d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 3666241a386cSMarc Zyngier 3667dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 3668dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 3669dba0bc7bSDerek Basehore 3670db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 3671d14ae5e6STomasz Nowicki if (err) 367254456db9SMarc Zyngier goto out_free_tables; 36734c21f3c2SMarc Zyngier 3674a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 36754c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 3676a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 36774c21f3c2SMarc Zyngier 36784c21f3c2SMarc Zyngier return 0; 36794c21f3c2SMarc Zyngier 36804c21f3c2SMarc Zyngier out_free_tables: 36814c21f3c2SMarc Zyngier its_free_tables(its); 36824c21f3c2SMarc Zyngier out_free_cmd: 36835bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 36844c21f3c2SMarc Zyngier out_free_its: 36854c21f3c2SMarc Zyngier kfree(its); 36864c21f3c2SMarc Zyngier out_unmap: 36874c21f3c2SMarc Zyngier iounmap(its_base); 3688db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 36894c21f3c2SMarc Zyngier return err; 36904c21f3c2SMarc Zyngier } 36914c21f3c2SMarc Zyngier 36924c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 36934c21f3c2SMarc Zyngier { 3694589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 36954c21f3c2SMarc Zyngier } 36964c21f3c2SMarc Zyngier 36976eb486b6SShanker Donthineni static int redist_disable_lpis(void) 36984c21f3c2SMarc Zyngier { 36996eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 37006eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 37016eb486b6SShanker Donthineni u64 val; 37026eb486b6SShanker Donthineni 37034c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 37044c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 37054c21f3c2SMarc Zyngier return -ENXIO; 37064c21f3c2SMarc Zyngier } 37076eb486b6SShanker Donthineni 37086eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 37096eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 37106eb486b6SShanker Donthineni return 0; 37116eb486b6SShanker Donthineni 371211e37d35SMarc Zyngier /* 371311e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 371411e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 371511e37d35SMarc Zyngier * configured and all is well in the world. 3716c440a9d9SMarc Zyngier * 3717c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 371811e37d35SMarc Zyngier */ 3719c440a9d9SMarc Zyngier if (gic_data_rdist()->lpi_enabled || 3720c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 372111e37d35SMarc Zyngier return 0; 372211e37d35SMarc Zyngier 372311e37d35SMarc Zyngier /* 372411e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 372511e37d35SMarc Zyngier */ 372611e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 37276eb486b6SShanker Donthineni smp_processor_id()); 37286eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 37296eb486b6SShanker Donthineni 37306eb486b6SShanker Donthineni /* Disable LPIs */ 37316eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 37326eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 37336eb486b6SShanker Donthineni 37346eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 37356eb486b6SShanker Donthineni dsb(sy); 37366eb486b6SShanker Donthineni 37376eb486b6SShanker Donthineni /* 37386eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 37396eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 37406eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 37416eb486b6SShanker Donthineni */ 37426eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 37436eb486b6SShanker Donthineni if (!timeout) { 37446eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 37456eb486b6SShanker Donthineni smp_processor_id()); 37466eb486b6SShanker Donthineni return -ETIMEDOUT; 37476eb486b6SShanker Donthineni } 37486eb486b6SShanker Donthineni udelay(1); 37496eb486b6SShanker Donthineni timeout--; 37506eb486b6SShanker Donthineni } 37516eb486b6SShanker Donthineni 37526eb486b6SShanker Donthineni /* 37536eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 37546eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 37556eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 37566eb486b6SShanker Donthineni */ 37576eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 37586eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 37596eb486b6SShanker Donthineni return -EBUSY; 37606eb486b6SShanker Donthineni } 37616eb486b6SShanker Donthineni 37626eb486b6SShanker Donthineni return 0; 37636eb486b6SShanker Donthineni } 37646eb486b6SShanker Donthineni 37656eb486b6SShanker Donthineni int its_cpu_init(void) 37666eb486b6SShanker Donthineni { 37676eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 37686eb486b6SShanker Donthineni int ret; 37696eb486b6SShanker Donthineni 37706eb486b6SShanker Donthineni ret = redist_disable_lpis(); 37716eb486b6SShanker Donthineni if (ret) 37726eb486b6SShanker Donthineni return ret; 37736eb486b6SShanker Donthineni 37744c21f3c2SMarc Zyngier its_cpu_init_lpis(); 3775920181ceSDerek Basehore its_cpu_init_collections(); 37764c21f3c2SMarc Zyngier } 37774c21f3c2SMarc Zyngier 37784c21f3c2SMarc Zyngier return 0; 37794c21f3c2SMarc Zyngier } 37804c21f3c2SMarc Zyngier 3781935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 37824c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 37834c21f3c2SMarc Zyngier {}, 37844c21f3c2SMarc Zyngier }; 37854c21f3c2SMarc Zyngier 3786db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 37874c21f3c2SMarc Zyngier { 37884c21f3c2SMarc Zyngier struct device_node *np; 3789db40f0a7STomasz Nowicki struct resource res; 37904c21f3c2SMarc Zyngier 37914c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 37924c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 379395a25625SStephen Boyd if (!of_device_is_available(np)) 379495a25625SStephen Boyd continue; 3795d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 3796e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 3797e81f54c6SRob Herring np); 3798d14ae5e6STomasz Nowicki continue; 3799d14ae5e6STomasz Nowicki } 3800d14ae5e6STomasz Nowicki 3801db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 3802e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 3803db40f0a7STomasz Nowicki continue; 38044c21f3c2SMarc Zyngier } 38054c21f3c2SMarc Zyngier 3806db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 3807db40f0a7STomasz Nowicki } 3808db40f0a7STomasz Nowicki return 0; 3809db40f0a7STomasz Nowicki } 3810db40f0a7STomasz Nowicki 38113f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 38123f010cf1STomasz Nowicki 38133f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 38143f010cf1STomasz Nowicki 3815d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 3816dbd2b826SGanapatrao Kulkarni struct its_srat_map { 3817dbd2b826SGanapatrao Kulkarni /* numa node id */ 3818dbd2b826SGanapatrao Kulkarni u32 numa_node; 3819dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 3820dbd2b826SGanapatrao Kulkarni u32 its_id; 3821dbd2b826SGanapatrao Kulkarni }; 3822dbd2b826SGanapatrao Kulkarni 3823fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 3824dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 3825dbd2b826SGanapatrao Kulkarni 3826dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 3827dbd2b826SGanapatrao Kulkarni { 3828dbd2b826SGanapatrao Kulkarni int i; 3829dbd2b826SGanapatrao Kulkarni 3830dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 3831dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 3832dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 3833dbd2b826SGanapatrao Kulkarni } 3834dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 3835dbd2b826SGanapatrao Kulkarni } 3836dbd2b826SGanapatrao Kulkarni 383760574d1eSKeith Busch static int __init gic_acpi_match_srat_its(union acpi_subtable_headers *header, 3838fdf6e7a8SHanjun Guo const unsigned long end) 3839fdf6e7a8SHanjun Guo { 3840fdf6e7a8SHanjun Guo return 0; 3841fdf6e7a8SHanjun Guo } 3842fdf6e7a8SHanjun Guo 384360574d1eSKeith Busch static int __init gic_acpi_parse_srat_its(union acpi_subtable_headers *header, 3844dbd2b826SGanapatrao Kulkarni const unsigned long end) 3845dbd2b826SGanapatrao Kulkarni { 3846dbd2b826SGanapatrao Kulkarni int node; 3847dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 3848dbd2b826SGanapatrao Kulkarni 3849dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 3850dbd2b826SGanapatrao Kulkarni if (!its_affinity) 3851dbd2b826SGanapatrao Kulkarni return -EINVAL; 3852dbd2b826SGanapatrao Kulkarni 3853dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 3854dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 3855dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 3856dbd2b826SGanapatrao Kulkarni return -EINVAL; 3857dbd2b826SGanapatrao Kulkarni } 3858dbd2b826SGanapatrao Kulkarni 3859dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 3860dbd2b826SGanapatrao Kulkarni 3861dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 3862dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 3863dbd2b826SGanapatrao Kulkarni return 0; 3864dbd2b826SGanapatrao Kulkarni } 3865dbd2b826SGanapatrao Kulkarni 3866dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 3867dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 3868dbd2b826SGanapatrao Kulkarni its_in_srat++; 3869dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 3870dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 3871dbd2b826SGanapatrao Kulkarni 3872dbd2b826SGanapatrao Kulkarni return 0; 3873dbd2b826SGanapatrao Kulkarni } 3874dbd2b826SGanapatrao Kulkarni 3875dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 3876dbd2b826SGanapatrao Kulkarni { 3877fdf6e7a8SHanjun Guo int count; 3878fdf6e7a8SHanjun Guo 3879fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 3880fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 3881fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3882fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 3883fdf6e7a8SHanjun Guo if (count <= 0) 3884fdf6e7a8SHanjun Guo return; 3885fdf6e7a8SHanjun Guo 38866da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 3887fdf6e7a8SHanjun Guo GFP_KERNEL); 3888fdf6e7a8SHanjun Guo if (!its_srat_maps) { 3889fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 3890fdf6e7a8SHanjun Guo return; 3891fdf6e7a8SHanjun Guo } 3892fdf6e7a8SHanjun Guo 3893dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 3894dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 3895dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3896dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 3897dbd2b826SGanapatrao Kulkarni } 3898fdf6e7a8SHanjun Guo 3899fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 3900fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 3901fdf6e7a8SHanjun Guo { 3902fdf6e7a8SHanjun Guo kfree(its_srat_maps); 3903fdf6e7a8SHanjun Guo } 3904dbd2b826SGanapatrao Kulkarni #else 3905dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 3906dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 3907fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 3908dbd2b826SGanapatrao Kulkarni #endif 3909dbd2b826SGanapatrao Kulkarni 391060574d1eSKeith Busch static int __init gic_acpi_parse_madt_its(union acpi_subtable_headers *header, 39113f010cf1STomasz Nowicki const unsigned long end) 39123f010cf1STomasz Nowicki { 39133f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 39143f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 39153f010cf1STomasz Nowicki struct resource res; 39163f010cf1STomasz Nowicki int err; 39173f010cf1STomasz Nowicki 39183f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 39193f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 39203f010cf1STomasz Nowicki res.start = its_entry->base_address; 39213f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 39223f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 39233f010cf1STomasz Nowicki 39243f010cf1STomasz Nowicki dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address); 39253f010cf1STomasz Nowicki if (!dom_handle) { 39263f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 39273f010cf1STomasz Nowicki &res.start); 39283f010cf1STomasz Nowicki return -ENOMEM; 39293f010cf1STomasz Nowicki } 39303f010cf1STomasz Nowicki 39318b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 39328b4282e6SShameer Kolothum dom_handle); 39333f010cf1STomasz Nowicki if (err) { 39343f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 39353f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 39363f010cf1STomasz Nowicki goto dom_err; 39373f010cf1STomasz Nowicki } 39383f010cf1STomasz Nowicki 3939dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 3940dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 39413f010cf1STomasz Nowicki if (!err) 39423f010cf1STomasz Nowicki return 0; 39433f010cf1STomasz Nowicki 39443f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 39453f010cf1STomasz Nowicki dom_err: 39463f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 39473f010cf1STomasz Nowicki return err; 39483f010cf1STomasz Nowicki } 39493f010cf1STomasz Nowicki 39503f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 39513f010cf1STomasz Nowicki { 3952dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 39533f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 39543f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 3955fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 39563f010cf1STomasz Nowicki } 39573f010cf1STomasz Nowicki #else 39583f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 39593f010cf1STomasz Nowicki #endif 39603f010cf1STomasz Nowicki 3961db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 3962db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 3963db40f0a7STomasz Nowicki { 3964db40f0a7STomasz Nowicki struct device_node *of_node; 39658fff27aeSMarc Zyngier struct its_node *its; 39668fff27aeSMarc Zyngier bool has_v4 = false; 39678fff27aeSMarc Zyngier int err; 3968db40f0a7STomasz Nowicki 3969db40f0a7STomasz Nowicki its_parent = parent_domain; 3970db40f0a7STomasz Nowicki of_node = to_of_node(handle); 3971db40f0a7STomasz Nowicki if (of_node) 3972db40f0a7STomasz Nowicki its_of_probe(of_node); 3973db40f0a7STomasz Nowicki else 39743f010cf1STomasz Nowicki its_acpi_probe(); 3975db40f0a7STomasz Nowicki 39764c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 39774c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 39784c21f3c2SMarc Zyngier return -ENXIO; 39794c21f3c2SMarc Zyngier } 39804c21f3c2SMarc Zyngier 39814c21f3c2SMarc Zyngier gic_rdists = rdists; 398211e37d35SMarc Zyngier 398311e37d35SMarc Zyngier err = allocate_lpi_tables(); 39848fff27aeSMarc Zyngier if (err) 39858fff27aeSMarc Zyngier return err; 39868fff27aeSMarc Zyngier 39878fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 39888fff27aeSMarc Zyngier has_v4 |= its->is_v4; 39898fff27aeSMarc Zyngier 39908fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 39913d63cb53SMarc Zyngier if (its_init_vpe_domain() || 39923d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 39938fff27aeSMarc Zyngier rdists->has_vlpis = false; 39948fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 39958fff27aeSMarc Zyngier } 39968fff27aeSMarc Zyngier } 39978fff27aeSMarc Zyngier 3998dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 3999dba0bc7bSDerek Basehore 40008fff27aeSMarc Zyngier return 0; 40014c21f3c2SMarc Zyngier } 4002