1cc2d3216SMarc Zyngier /* 2d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 3cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 4cc2d3216SMarc Zyngier * 5cc2d3216SMarc Zyngier * This program is free software; you can redistribute it and/or modify 6cc2d3216SMarc Zyngier * it under the terms of the GNU General Public License version 2 as 7cc2d3216SMarc Zyngier * published by the Free Software Foundation. 8cc2d3216SMarc Zyngier * 9cc2d3216SMarc Zyngier * This program is distributed in the hope that it will be useful, 10cc2d3216SMarc Zyngier * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc2d3216SMarc Zyngier * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc2d3216SMarc Zyngier * GNU General Public License for more details. 13cc2d3216SMarc Zyngier * 14cc2d3216SMarc Zyngier * You should have received a copy of the GNU General Public License 15cc2d3216SMarc Zyngier * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc2d3216SMarc Zyngier */ 17cc2d3216SMarc Zyngier 183f010cf1STomasz Nowicki #include <linux/acpi.h> 198d3554b8SHanjun Guo #include <linux/acpi_iort.h> 20cc2d3216SMarc Zyngier #include <linux/bitmap.h> 21cc2d3216SMarc Zyngier #include <linux/cpu.h> 22c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 23cc2d3216SMarc Zyngier #include <linux/delay.h> 2444bb7e24SRobin Murphy #include <linux/dma-iommu.h> 253fb68faeSMarc Zyngier #include <linux/efi.h> 26cc2d3216SMarc Zyngier #include <linux/interrupt.h> 273f010cf1STomasz Nowicki #include <linux/irqdomain.h> 28880cb3cdSMarc Zyngier #include <linux/list.h> 29880cb3cdSMarc Zyngier #include <linux/list_sort.h> 30cc2d3216SMarc Zyngier #include <linux/log2.h> 315e2c9f9aSMarc Zyngier #include <linux/memblock.h> 32cc2d3216SMarc Zyngier #include <linux/mm.h> 33cc2d3216SMarc Zyngier #include <linux/msi.h> 34cc2d3216SMarc Zyngier #include <linux/of.h> 35cc2d3216SMarc Zyngier #include <linux/of_address.h> 36cc2d3216SMarc Zyngier #include <linux/of_irq.h> 37cc2d3216SMarc Zyngier #include <linux/of_pci.h> 38cc2d3216SMarc Zyngier #include <linux/of_platform.h> 39cc2d3216SMarc Zyngier #include <linux/percpu.h> 40cc2d3216SMarc Zyngier #include <linux/slab.h> 41dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 42cc2d3216SMarc Zyngier 4341a83e06SJoel Porquet #include <linux/irqchip.h> 44cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 45c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 46cc2d3216SMarc Zyngier 47cc2d3216SMarc Zyngier #include <asm/cputype.h> 48cc2d3216SMarc Zyngier #include <asm/exception.h> 49cc2d3216SMarc Zyngier 5067510ccaSRobert Richter #include "irq-gic-common.h" 5167510ccaSRobert Richter 5294100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 5394100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 54fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 55dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 56cc2d3216SMarc Zyngier 57c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 58c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 59c48ed51cSMarc Zyngier 60a13b0404SMarc Zyngier static u32 lpi_id_bits; 61a13b0404SMarc Zyngier 62a13b0404SMarc Zyngier /* 63a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 64a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 65a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 66a13b0404SMarc Zyngier */ 67a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 68a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 69a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 70a13b0404SMarc Zyngier 712130b789SJulien Thierry #define LPI_PROP_DEFAULT_PRIO GICD_INT_DEF_PRI 72a13b0404SMarc Zyngier 73cc2d3216SMarc Zyngier /* 74cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 75cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 76cc2d3216SMarc Zyngier * CPU. 77cc2d3216SMarc Zyngier */ 78cc2d3216SMarc Zyngier struct its_collection { 79cc2d3216SMarc Zyngier u64 target_address; 80cc2d3216SMarc Zyngier u16 col_id; 81cc2d3216SMarc Zyngier }; 82cc2d3216SMarc Zyngier 83cc2d3216SMarc Zyngier /* 849347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 859347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 86466b7d16SShanker Donthineni */ 87466b7d16SShanker Donthineni struct its_baser { 88466b7d16SShanker Donthineni void *base; 89466b7d16SShanker Donthineni u64 val; 90466b7d16SShanker Donthineni u32 order; 919347359aSShanker Donthineni u32 psz; 92466b7d16SShanker Donthineni }; 93466b7d16SShanker Donthineni 94558b0165SArd Biesheuvel struct its_device; 95558b0165SArd Biesheuvel 96466b7d16SShanker Donthineni /* 97cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 98841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 99841514abSMarc Zyngier * list of devices writing to it. 1009791ec7dSMarc Zyngier * 1019791ec7dSMarc Zyngier * dev_alloc_lock has to be taken for device allocations, while the 1029791ec7dSMarc Zyngier * spinlock must be taken to parse data structures such as the device 1039791ec7dSMarc Zyngier * list. 104cc2d3216SMarc Zyngier */ 105cc2d3216SMarc Zyngier struct its_node { 106cc2d3216SMarc Zyngier raw_spinlock_t lock; 1079791ec7dSMarc Zyngier struct mutex dev_alloc_lock; 108cc2d3216SMarc Zyngier struct list_head entry; 109cc2d3216SMarc Zyngier void __iomem *base; 110db40f0a7STomasz Nowicki phys_addr_t phys_base; 111cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 112cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 113466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 114cc2d3216SMarc Zyngier struct its_collection *collections; 115558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 116558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 117dba0bc7bSDerek Basehore u64 cbaser_save; 118dba0bc7bSDerek Basehore u32 ctlr_save; 119cc2d3216SMarc Zyngier struct list_head its_device_list; 120cc2d3216SMarc Zyngier u64 flags; 121debf6d02SMarc Zyngier unsigned long list_nr; 122cc2d3216SMarc Zyngier u32 ite_size; 123466b7d16SShanker Donthineni u32 device_ids; 124fbf8f40eSGanapatrao Kulkarni int numa_node; 125558b0165SArd Biesheuvel unsigned int msi_domain_flags; 126558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1273dfa576bSMarc Zyngier bool is_v4; 1285c9a882eSMarc Zyngier int vlpi_redist_offset; 129cc2d3216SMarc Zyngier }; 130cc2d3216SMarc Zyngier 131cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 132cc2d3216SMarc Zyngier 13332bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 13432bd44dcSShanker Donthineni #define ITS_MAX_VPEID_BITS (16) 13532bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 13632bd44dcSShanker Donthineni 1372eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1382eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1392eca0d6cSShanker Donthineni 140591e5becSMarc Zyngier struct event_lpi_map { 141591e5becSMarc Zyngier unsigned long *lpi_map; 142591e5becSMarc Zyngier u16 *col_map; 143591e5becSMarc Zyngier irq_hw_number_t lpi_base; 144591e5becSMarc Zyngier int nr_lpis; 145d011e4e6SMarc Zyngier struct mutex vlpi_lock; 146d011e4e6SMarc Zyngier struct its_vm *vm; 147d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 148d011e4e6SMarc Zyngier int nr_vlpis; 149591e5becSMarc Zyngier }; 150591e5becSMarc Zyngier 151cc2d3216SMarc Zyngier /* 152d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 153d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 154d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 155d011e4e6SMarc Zyngier * indicates which one. 156cc2d3216SMarc Zyngier */ 157cc2d3216SMarc Zyngier struct its_device { 158cc2d3216SMarc Zyngier struct list_head entry; 159cc2d3216SMarc Zyngier struct its_node *its; 160591e5becSMarc Zyngier struct event_lpi_map event_map; 161cc2d3216SMarc Zyngier void *itt; 162cc2d3216SMarc Zyngier u32 nr_ites; 163cc2d3216SMarc Zyngier u32 device_id; 1649791ec7dSMarc Zyngier bool shared; 165cc2d3216SMarc Zyngier }; 166cc2d3216SMarc Zyngier 16720b3d54eSMarc Zyngier static struct { 16820b3d54eSMarc Zyngier raw_spinlock_t lock; 16920b3d54eSMarc Zyngier struct its_device *dev; 17020b3d54eSMarc Zyngier struct its_vpe **vpes; 17120b3d54eSMarc Zyngier int next_victim; 17220b3d54eSMarc Zyngier } vpe_proxy; 17320b3d54eSMarc Zyngier 1741ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 175a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1761ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 177db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1781ac19ca6SMarc Zyngier 1793dfa576bSMarc Zyngier static unsigned long its_list_map; 1803171a47aSMarc Zyngier static u16 vmovp_seq_num; 1813171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1823171a47aSMarc Zyngier 1837d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1843dfa576bSMarc Zyngier 1851ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 18611e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1871ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 188e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1891ac19ca6SMarc Zyngier 190591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 191591e5becSMarc Zyngier u32 event) 192591e5becSMarc Zyngier { 193591e5becSMarc Zyngier struct its_node *its = its_dev->its; 194591e5becSMarc Zyngier 195591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 196591e5becSMarc Zyngier } 197591e5becSMarc Zyngier 19883559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 19983559b47SMarc Zyngier { 20083559b47SMarc Zyngier if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(0, 15))) 20183559b47SMarc Zyngier return NULL; 20283559b47SMarc Zyngier 20383559b47SMarc Zyngier return col; 20483559b47SMarc Zyngier } 20583559b47SMarc Zyngier 206205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 207205e065dSMarc Zyngier { 208205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 209205e065dSMarc Zyngier return vpe; 210205e065dSMarc Zyngier 211205e065dSMarc Zyngier return NULL; 212205e065dSMarc Zyngier } 213205e065dSMarc Zyngier 214cc2d3216SMarc Zyngier /* 215cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 216cc2d3216SMarc Zyngier * block. 217cc2d3216SMarc Zyngier */ 218cc2d3216SMarc Zyngier struct its_cmd_desc { 219cc2d3216SMarc Zyngier union { 220cc2d3216SMarc Zyngier struct { 221cc2d3216SMarc Zyngier struct its_device *dev; 222cc2d3216SMarc Zyngier u32 event_id; 223cc2d3216SMarc Zyngier } its_inv_cmd; 224cc2d3216SMarc Zyngier 225cc2d3216SMarc Zyngier struct { 226cc2d3216SMarc Zyngier struct its_device *dev; 227cc2d3216SMarc Zyngier u32 event_id; 2288d85dcedSMarc Zyngier } its_clear_cmd; 2298d85dcedSMarc Zyngier 2308d85dcedSMarc Zyngier struct { 2318d85dcedSMarc Zyngier struct its_device *dev; 2328d85dcedSMarc Zyngier u32 event_id; 233cc2d3216SMarc Zyngier } its_int_cmd; 234cc2d3216SMarc Zyngier 235cc2d3216SMarc Zyngier struct { 236cc2d3216SMarc Zyngier struct its_device *dev; 237cc2d3216SMarc Zyngier int valid; 238cc2d3216SMarc Zyngier } its_mapd_cmd; 239cc2d3216SMarc Zyngier 240cc2d3216SMarc Zyngier struct { 241cc2d3216SMarc Zyngier struct its_collection *col; 242cc2d3216SMarc Zyngier int valid; 243cc2d3216SMarc Zyngier } its_mapc_cmd; 244cc2d3216SMarc Zyngier 245cc2d3216SMarc Zyngier struct { 246cc2d3216SMarc Zyngier struct its_device *dev; 247cc2d3216SMarc Zyngier u32 phys_id; 248cc2d3216SMarc Zyngier u32 event_id; 2496a25ad3aSMarc Zyngier } its_mapti_cmd; 250cc2d3216SMarc Zyngier 251cc2d3216SMarc Zyngier struct { 252cc2d3216SMarc Zyngier struct its_device *dev; 253cc2d3216SMarc Zyngier struct its_collection *col; 254591e5becSMarc Zyngier u32 event_id; 255cc2d3216SMarc Zyngier } its_movi_cmd; 256cc2d3216SMarc Zyngier 257cc2d3216SMarc Zyngier struct { 258cc2d3216SMarc Zyngier struct its_device *dev; 259cc2d3216SMarc Zyngier u32 event_id; 260cc2d3216SMarc Zyngier } its_discard_cmd; 261cc2d3216SMarc Zyngier 262cc2d3216SMarc Zyngier struct { 263cc2d3216SMarc Zyngier struct its_collection *col; 264cc2d3216SMarc Zyngier } its_invall_cmd; 265d011e4e6SMarc Zyngier 266d011e4e6SMarc Zyngier struct { 267d011e4e6SMarc Zyngier struct its_vpe *vpe; 268eb78192bSMarc Zyngier } its_vinvall_cmd; 269eb78192bSMarc Zyngier 270eb78192bSMarc Zyngier struct { 271eb78192bSMarc Zyngier struct its_vpe *vpe; 272eb78192bSMarc Zyngier struct its_collection *col; 273eb78192bSMarc Zyngier bool valid; 274eb78192bSMarc Zyngier } its_vmapp_cmd; 275eb78192bSMarc Zyngier 276eb78192bSMarc Zyngier struct { 277eb78192bSMarc Zyngier struct its_vpe *vpe; 278d011e4e6SMarc Zyngier struct its_device *dev; 279d011e4e6SMarc Zyngier u32 virt_id; 280d011e4e6SMarc Zyngier u32 event_id; 281d011e4e6SMarc Zyngier bool db_enabled; 282d011e4e6SMarc Zyngier } its_vmapti_cmd; 283d011e4e6SMarc Zyngier 284d011e4e6SMarc Zyngier struct { 285d011e4e6SMarc Zyngier struct its_vpe *vpe; 286d011e4e6SMarc Zyngier struct its_device *dev; 287d011e4e6SMarc Zyngier u32 event_id; 288d011e4e6SMarc Zyngier bool db_enabled; 289d011e4e6SMarc Zyngier } its_vmovi_cmd; 2903171a47aSMarc Zyngier 2913171a47aSMarc Zyngier struct { 2923171a47aSMarc Zyngier struct its_vpe *vpe; 2933171a47aSMarc Zyngier struct its_collection *col; 2943171a47aSMarc Zyngier u16 seq_num; 2953171a47aSMarc Zyngier u16 its_list; 2963171a47aSMarc Zyngier } its_vmovp_cmd; 297cc2d3216SMarc Zyngier }; 298cc2d3216SMarc Zyngier }; 299cc2d3216SMarc Zyngier 300cc2d3216SMarc Zyngier /* 301cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 302cc2d3216SMarc Zyngier */ 303cc2d3216SMarc Zyngier struct its_cmd_block { 304cc2d3216SMarc Zyngier u64 raw_cmd[4]; 305cc2d3216SMarc Zyngier }; 306cc2d3216SMarc Zyngier 307cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 308cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 309cc2d3216SMarc Zyngier 31067047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 31167047f90SMarc Zyngier struct its_cmd_block *, 312cc2d3216SMarc Zyngier struct its_cmd_desc *); 313cc2d3216SMarc Zyngier 31467047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 31567047f90SMarc Zyngier struct its_cmd_block *, 316d011e4e6SMarc Zyngier struct its_cmd_desc *); 317d011e4e6SMarc Zyngier 3184d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 3194d36f136SMarc Zyngier { 3204d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 3214d36f136SMarc Zyngier *raw_cmd &= ~mask; 3224d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 3234d36f136SMarc Zyngier } 3244d36f136SMarc Zyngier 325cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 326cc2d3216SMarc Zyngier { 3274d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 328cc2d3216SMarc Zyngier } 329cc2d3216SMarc Zyngier 330cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 331cc2d3216SMarc Zyngier { 3324d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 333cc2d3216SMarc Zyngier } 334cc2d3216SMarc Zyngier 335cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 336cc2d3216SMarc Zyngier { 3374d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 338cc2d3216SMarc Zyngier } 339cc2d3216SMarc Zyngier 340cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 341cc2d3216SMarc Zyngier { 3424d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 343cc2d3216SMarc Zyngier } 344cc2d3216SMarc Zyngier 345cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 346cc2d3216SMarc Zyngier { 3474d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 348cc2d3216SMarc Zyngier } 349cc2d3216SMarc Zyngier 350cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 351cc2d3216SMarc Zyngier { 35230ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 353cc2d3216SMarc Zyngier } 354cc2d3216SMarc Zyngier 355cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 356cc2d3216SMarc Zyngier { 3574d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 358cc2d3216SMarc Zyngier } 359cc2d3216SMarc Zyngier 360cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 361cc2d3216SMarc Zyngier { 36230ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 363cc2d3216SMarc Zyngier } 364cc2d3216SMarc Zyngier 365cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 366cc2d3216SMarc Zyngier { 3674d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 368cc2d3216SMarc Zyngier } 369cc2d3216SMarc Zyngier 370d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 371d011e4e6SMarc Zyngier { 372d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 373d011e4e6SMarc Zyngier } 374d011e4e6SMarc Zyngier 375d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 376d011e4e6SMarc Zyngier { 377d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 378d011e4e6SMarc Zyngier } 379d011e4e6SMarc Zyngier 380d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 381d011e4e6SMarc Zyngier { 382d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 383d011e4e6SMarc Zyngier } 384d011e4e6SMarc Zyngier 385d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 386d011e4e6SMarc Zyngier { 387d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 388d011e4e6SMarc Zyngier } 389d011e4e6SMarc Zyngier 3903171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 3913171a47aSMarc Zyngier { 3923171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 3933171a47aSMarc Zyngier } 3943171a47aSMarc Zyngier 3953171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 3963171a47aSMarc Zyngier { 3973171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 3983171a47aSMarc Zyngier } 3993171a47aSMarc Zyngier 400eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 401eb78192bSMarc Zyngier { 40230ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 403eb78192bSMarc Zyngier } 404eb78192bSMarc Zyngier 405eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 406eb78192bSMarc Zyngier { 407eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 408eb78192bSMarc Zyngier } 409eb78192bSMarc Zyngier 410cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 411cc2d3216SMarc Zyngier { 412cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 413cc2d3216SMarc Zyngier cmd->raw_cmd[0] = cpu_to_le64(cmd->raw_cmd[0]); 414cc2d3216SMarc Zyngier cmd->raw_cmd[1] = cpu_to_le64(cmd->raw_cmd[1]); 415cc2d3216SMarc Zyngier cmd->raw_cmd[2] = cpu_to_le64(cmd->raw_cmd[2]); 416cc2d3216SMarc Zyngier cmd->raw_cmd[3] = cpu_to_le64(cmd->raw_cmd[3]); 417cc2d3216SMarc Zyngier } 418cc2d3216SMarc Zyngier 41967047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 42067047f90SMarc Zyngier struct its_cmd_block *cmd, 421cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 422cc2d3216SMarc Zyngier { 423cc2d3216SMarc Zyngier unsigned long itt_addr; 424c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 425cc2d3216SMarc Zyngier 426cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 427cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 428cc2d3216SMarc Zyngier 429cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 430cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 431cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 432cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 433cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 434cc2d3216SMarc Zyngier 435cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 436cc2d3216SMarc Zyngier 437591e5becSMarc Zyngier return NULL; 438cc2d3216SMarc Zyngier } 439cc2d3216SMarc Zyngier 44067047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 44167047f90SMarc Zyngier struct its_cmd_block *cmd, 442cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 443cc2d3216SMarc Zyngier { 444cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 445cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 446cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 447cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 448cc2d3216SMarc Zyngier 449cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 450cc2d3216SMarc Zyngier 451cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 452cc2d3216SMarc Zyngier } 453cc2d3216SMarc Zyngier 45467047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 45567047f90SMarc Zyngier struct its_cmd_block *cmd, 456cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 457cc2d3216SMarc Zyngier { 458591e5becSMarc Zyngier struct its_collection *col; 459591e5becSMarc Zyngier 4606a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 4616a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 462591e5becSMarc Zyngier 4636a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 4646a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 4656a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 4666a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 467591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 468cc2d3216SMarc Zyngier 469cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 470cc2d3216SMarc Zyngier 47183559b47SMarc Zyngier return valid_col(col); 472cc2d3216SMarc Zyngier } 473cc2d3216SMarc Zyngier 47467047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 47567047f90SMarc Zyngier struct its_cmd_block *cmd, 476cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 477cc2d3216SMarc Zyngier { 478591e5becSMarc Zyngier struct its_collection *col; 479591e5becSMarc Zyngier 480591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 481591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 482591e5becSMarc Zyngier 483cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 484cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 485591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 486cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 487cc2d3216SMarc Zyngier 488cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 489cc2d3216SMarc Zyngier 49083559b47SMarc Zyngier return valid_col(col); 491cc2d3216SMarc Zyngier } 492cc2d3216SMarc Zyngier 49367047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 49467047f90SMarc Zyngier struct its_cmd_block *cmd, 495cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 496cc2d3216SMarc Zyngier { 497591e5becSMarc Zyngier struct its_collection *col; 498591e5becSMarc Zyngier 499591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 500591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 501591e5becSMarc Zyngier 502cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 503cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 504cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 505cc2d3216SMarc Zyngier 506cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 507cc2d3216SMarc Zyngier 50883559b47SMarc Zyngier return valid_col(col); 509cc2d3216SMarc Zyngier } 510cc2d3216SMarc Zyngier 51167047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 51267047f90SMarc Zyngier struct its_cmd_block *cmd, 513cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 514cc2d3216SMarc Zyngier { 515591e5becSMarc Zyngier struct its_collection *col; 516591e5becSMarc Zyngier 517591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 518591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 519591e5becSMarc Zyngier 520cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 521cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 522cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 523cc2d3216SMarc Zyngier 524cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 525cc2d3216SMarc Zyngier 52683559b47SMarc Zyngier return valid_col(col); 527cc2d3216SMarc Zyngier } 528cc2d3216SMarc Zyngier 52967047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 53067047f90SMarc Zyngier struct its_cmd_block *cmd, 5318d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5328d85dcedSMarc Zyngier { 5338d85dcedSMarc Zyngier struct its_collection *col; 5348d85dcedSMarc Zyngier 5358d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 5368d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 5378d85dcedSMarc Zyngier 5388d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 5398d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 5408d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 5418d85dcedSMarc Zyngier 5428d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5438d85dcedSMarc Zyngier 54483559b47SMarc Zyngier return valid_col(col); 5458d85dcedSMarc Zyngier } 5468d85dcedSMarc Zyngier 54767047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 54867047f90SMarc Zyngier struct its_cmd_block *cmd, 5498d85dcedSMarc Zyngier struct its_cmd_desc *desc) 5508d85dcedSMarc Zyngier { 5518d85dcedSMarc Zyngier struct its_collection *col; 5528d85dcedSMarc Zyngier 5538d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 5548d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 5558d85dcedSMarc Zyngier 5568d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 5578d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 5588d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 5598d85dcedSMarc Zyngier 5608d85dcedSMarc Zyngier its_fixup_cmd(cmd); 5618d85dcedSMarc Zyngier 56283559b47SMarc Zyngier return valid_col(col); 5638d85dcedSMarc Zyngier } 5648d85dcedSMarc Zyngier 56567047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 56667047f90SMarc Zyngier struct its_cmd_block *cmd, 567cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 568cc2d3216SMarc Zyngier { 569cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 570cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 571cc2d3216SMarc Zyngier 572cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 573cc2d3216SMarc Zyngier 574cc2d3216SMarc Zyngier return NULL; 575cc2d3216SMarc Zyngier } 576cc2d3216SMarc Zyngier 57767047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 57867047f90SMarc Zyngier struct its_cmd_block *cmd, 579eb78192bSMarc Zyngier struct its_cmd_desc *desc) 580eb78192bSMarc Zyngier { 581eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 582eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 583eb78192bSMarc Zyngier 584eb78192bSMarc Zyngier its_fixup_cmd(cmd); 585eb78192bSMarc Zyngier 586205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 587eb78192bSMarc Zyngier } 588eb78192bSMarc Zyngier 58967047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 59067047f90SMarc Zyngier struct its_cmd_block *cmd, 591eb78192bSMarc Zyngier struct its_cmd_desc *desc) 592eb78192bSMarc Zyngier { 593eb78192bSMarc Zyngier unsigned long vpt_addr; 5945c9a882eSMarc Zyngier u64 target; 595eb78192bSMarc Zyngier 596eb78192bSMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 5975c9a882eSMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 598eb78192bSMarc Zyngier 599eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 600eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 601eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 6025c9a882eSMarc Zyngier its_encode_target(cmd, target); 603eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 604eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 605eb78192bSMarc Zyngier 606eb78192bSMarc Zyngier its_fixup_cmd(cmd); 607eb78192bSMarc Zyngier 608205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 609eb78192bSMarc Zyngier } 610eb78192bSMarc Zyngier 61167047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 61267047f90SMarc Zyngier struct its_cmd_block *cmd, 613d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 614d011e4e6SMarc Zyngier { 615d011e4e6SMarc Zyngier u32 db; 616d011e4e6SMarc Zyngier 617d011e4e6SMarc Zyngier if (desc->its_vmapti_cmd.db_enabled) 618d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 619d011e4e6SMarc Zyngier else 620d011e4e6SMarc Zyngier db = 1023; 621d011e4e6SMarc Zyngier 622d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 623d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 624d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 625d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 626d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 627d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 628d011e4e6SMarc Zyngier 629d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 630d011e4e6SMarc Zyngier 631205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 632d011e4e6SMarc Zyngier } 633d011e4e6SMarc Zyngier 63467047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 63567047f90SMarc Zyngier struct its_cmd_block *cmd, 636d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 637d011e4e6SMarc Zyngier { 638d011e4e6SMarc Zyngier u32 db; 639d011e4e6SMarc Zyngier 640d011e4e6SMarc Zyngier if (desc->its_vmovi_cmd.db_enabled) 641d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 642d011e4e6SMarc Zyngier else 643d011e4e6SMarc Zyngier db = 1023; 644d011e4e6SMarc Zyngier 645d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 646d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 647d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 648d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 649d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 650d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 651d011e4e6SMarc Zyngier 652d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 653d011e4e6SMarc Zyngier 654205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 655d011e4e6SMarc Zyngier } 656d011e4e6SMarc Zyngier 65767047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 65867047f90SMarc Zyngier struct its_cmd_block *cmd, 6593171a47aSMarc Zyngier struct its_cmd_desc *desc) 6603171a47aSMarc Zyngier { 6615c9a882eSMarc Zyngier u64 target; 6625c9a882eSMarc Zyngier 6635c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 6643171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 6653171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 6663171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 6673171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 6685c9a882eSMarc Zyngier its_encode_target(cmd, target); 6693171a47aSMarc Zyngier 6703171a47aSMarc Zyngier its_fixup_cmd(cmd); 6713171a47aSMarc Zyngier 672205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 6733171a47aSMarc Zyngier } 6743171a47aSMarc Zyngier 675cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 676cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 677cc2d3216SMarc Zyngier { 678cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 679cc2d3216SMarc Zyngier } 680cc2d3216SMarc Zyngier 681cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 682cc2d3216SMarc Zyngier { 683cc2d3216SMarc Zyngier int widx; 684cc2d3216SMarc Zyngier int ridx; 685cc2d3216SMarc Zyngier 686cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 687cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 688cc2d3216SMarc Zyngier 689cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 690cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 691cc2d3216SMarc Zyngier return 1; 692cc2d3216SMarc Zyngier 693cc2d3216SMarc Zyngier return 0; 694cc2d3216SMarc Zyngier } 695cc2d3216SMarc Zyngier 696cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 697cc2d3216SMarc Zyngier { 698cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 699cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 700cc2d3216SMarc Zyngier 701cc2d3216SMarc Zyngier while (its_queue_full(its)) { 702cc2d3216SMarc Zyngier count--; 703cc2d3216SMarc Zyngier if (!count) { 704cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 705cc2d3216SMarc Zyngier return NULL; 706cc2d3216SMarc Zyngier } 707cc2d3216SMarc Zyngier cpu_relax(); 708cc2d3216SMarc Zyngier udelay(1); 709cc2d3216SMarc Zyngier } 710cc2d3216SMarc Zyngier 711cc2d3216SMarc Zyngier cmd = its->cmd_write++; 712cc2d3216SMarc Zyngier 713cc2d3216SMarc Zyngier /* Handle queue wrapping */ 714cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 715cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 716cc2d3216SMarc Zyngier 71734d677a9SMarc Zyngier /* Clear command */ 71834d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 71934d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 72034d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 72134d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 72234d677a9SMarc Zyngier 723cc2d3216SMarc Zyngier return cmd; 724cc2d3216SMarc Zyngier } 725cc2d3216SMarc Zyngier 726cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 727cc2d3216SMarc Zyngier { 728cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 729cc2d3216SMarc Zyngier 730cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 731cc2d3216SMarc Zyngier 732cc2d3216SMarc Zyngier return its->cmd_write; 733cc2d3216SMarc Zyngier } 734cc2d3216SMarc Zyngier 735cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 736cc2d3216SMarc Zyngier { 737cc2d3216SMarc Zyngier /* 738cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 739cc2d3216SMarc Zyngier * the ITS. 740cc2d3216SMarc Zyngier */ 741cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 742328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 743cc2d3216SMarc Zyngier else 744cc2d3216SMarc Zyngier dsb(ishst); 745cc2d3216SMarc Zyngier } 746cc2d3216SMarc Zyngier 747a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 748cc2d3216SMarc Zyngier struct its_cmd_block *from, 749cc2d3216SMarc Zyngier struct its_cmd_block *to) 750cc2d3216SMarc Zyngier { 751cc2d3216SMarc Zyngier u64 rd_idx, from_idx, to_idx; 752cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 753cc2d3216SMarc Zyngier 754cc2d3216SMarc Zyngier from_idx = its_cmd_ptr_to_offset(its, from); 755cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 756cc2d3216SMarc Zyngier 757cc2d3216SMarc Zyngier while (1) { 758cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 7599bdd8b1cSMarc Zyngier 7609bdd8b1cSMarc Zyngier /* Direct case */ 7619bdd8b1cSMarc Zyngier if (from_idx < to_idx && rd_idx >= to_idx) 7629bdd8b1cSMarc Zyngier break; 7639bdd8b1cSMarc Zyngier 7649bdd8b1cSMarc Zyngier /* Wrapped case */ 7659bdd8b1cSMarc Zyngier if (from_idx >= to_idx && rd_idx >= to_idx && rd_idx < from_idx) 766cc2d3216SMarc Zyngier break; 767cc2d3216SMarc Zyngier 768cc2d3216SMarc Zyngier count--; 769cc2d3216SMarc Zyngier if (!count) { 770a19b462fSMarc Zyngier pr_err_ratelimited("ITS queue timeout (%llu %llu %llu)\n", 771a19b462fSMarc Zyngier from_idx, to_idx, rd_idx); 772a19b462fSMarc Zyngier return -1; 773cc2d3216SMarc Zyngier } 774cc2d3216SMarc Zyngier cpu_relax(); 775cc2d3216SMarc Zyngier udelay(1); 776cc2d3216SMarc Zyngier } 777a19b462fSMarc Zyngier 778a19b462fSMarc Zyngier return 0; 779cc2d3216SMarc Zyngier } 780cc2d3216SMarc Zyngier 781e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 782e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 783e4f9094bSMarc Zyngier void name(struct its_node *its, \ 784e4f9094bSMarc Zyngier buildtype builder, \ 785e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 786e4f9094bSMarc Zyngier { \ 787e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 788e4f9094bSMarc Zyngier synctype *sync_obj; \ 789e4f9094bSMarc Zyngier unsigned long flags; \ 790e4f9094bSMarc Zyngier \ 791e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 792e4f9094bSMarc Zyngier \ 793e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 794e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 795e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 796e4f9094bSMarc Zyngier return; \ 797e4f9094bSMarc Zyngier } \ 79867047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 799e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 800e4f9094bSMarc Zyngier \ 801e4f9094bSMarc Zyngier if (sync_obj) { \ 802e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 803e4f9094bSMarc Zyngier if (!sync_cmd) \ 804e4f9094bSMarc Zyngier goto post; \ 805e4f9094bSMarc Zyngier \ 80667047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 807e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 808e4f9094bSMarc Zyngier } \ 809e4f9094bSMarc Zyngier \ 810e4f9094bSMarc Zyngier post: \ 811e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 812e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 813e4f9094bSMarc Zyngier \ 814a19b462fSMarc Zyngier if (its_wait_for_range_completion(its, cmd, next_cmd)) \ 815a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 816e4f9094bSMarc Zyngier } 817e4f9094bSMarc Zyngier 81867047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 81967047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 820e4f9094bSMarc Zyngier struct its_collection *sync_col) 821cc2d3216SMarc Zyngier { 822cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 823cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 824e4f9094bSMarc Zyngier 825cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 826cc2d3216SMarc Zyngier } 827cc2d3216SMarc Zyngier 828e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 829e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 830cc2d3216SMarc Zyngier 83167047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 83267047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 833d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 834d011e4e6SMarc Zyngier { 835d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 836d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 837d011e4e6SMarc Zyngier 838d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 839d011e4e6SMarc Zyngier } 840d011e4e6SMarc Zyngier 841d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 842d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 843d011e4e6SMarc Zyngier 8448d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 8458d85dcedSMarc Zyngier { 8468d85dcedSMarc Zyngier struct its_cmd_desc desc; 8478d85dcedSMarc Zyngier 8488d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 8498d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 8508d85dcedSMarc Zyngier 8518d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 8528d85dcedSMarc Zyngier } 8538d85dcedSMarc Zyngier 8548d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 8558d85dcedSMarc Zyngier { 8568d85dcedSMarc Zyngier struct its_cmd_desc desc; 8578d85dcedSMarc Zyngier 8588d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 8598d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 8608d85dcedSMarc Zyngier 8618d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 862cc2d3216SMarc Zyngier } 863cc2d3216SMarc Zyngier 864cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 865cc2d3216SMarc Zyngier { 866cc2d3216SMarc Zyngier struct its_cmd_desc desc; 867cc2d3216SMarc Zyngier 868cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 869cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 870cc2d3216SMarc Zyngier 871cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 872cc2d3216SMarc Zyngier } 873cc2d3216SMarc Zyngier 874cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 875cc2d3216SMarc Zyngier { 876cc2d3216SMarc Zyngier struct its_cmd_desc desc; 877cc2d3216SMarc Zyngier 878cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 879cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 880cc2d3216SMarc Zyngier 881cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 882cc2d3216SMarc Zyngier } 883cc2d3216SMarc Zyngier 884cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 885cc2d3216SMarc Zyngier int valid) 886cc2d3216SMarc Zyngier { 887cc2d3216SMarc Zyngier struct its_cmd_desc desc; 888cc2d3216SMarc Zyngier 889cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 890cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 891cc2d3216SMarc Zyngier 892cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 893cc2d3216SMarc Zyngier } 894cc2d3216SMarc Zyngier 8956a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 896cc2d3216SMarc Zyngier { 897cc2d3216SMarc Zyngier struct its_cmd_desc desc; 898cc2d3216SMarc Zyngier 8996a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 9006a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 9016a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 902cc2d3216SMarc Zyngier 9036a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 904cc2d3216SMarc Zyngier } 905cc2d3216SMarc Zyngier 906cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 907cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 908cc2d3216SMarc Zyngier { 909cc2d3216SMarc Zyngier struct its_cmd_desc desc; 910cc2d3216SMarc Zyngier 911cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 912cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 913591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 914cc2d3216SMarc Zyngier 915cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 916cc2d3216SMarc Zyngier } 917cc2d3216SMarc Zyngier 918cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 919cc2d3216SMarc Zyngier { 920cc2d3216SMarc Zyngier struct its_cmd_desc desc; 921cc2d3216SMarc Zyngier 922cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 923cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 924cc2d3216SMarc Zyngier 925cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 926cc2d3216SMarc Zyngier } 927cc2d3216SMarc Zyngier 928cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 929cc2d3216SMarc Zyngier { 930cc2d3216SMarc Zyngier struct its_cmd_desc desc; 931cc2d3216SMarc Zyngier 932cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 933cc2d3216SMarc Zyngier 934cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 935cc2d3216SMarc Zyngier } 936c48ed51cSMarc Zyngier 937d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 938d011e4e6SMarc Zyngier { 939d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 940d011e4e6SMarc Zyngier struct its_cmd_desc desc; 941d011e4e6SMarc Zyngier 942d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 943d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 944d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 945d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 946d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 947d011e4e6SMarc Zyngier 948d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 949d011e4e6SMarc Zyngier } 950d011e4e6SMarc Zyngier 951d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 952d011e4e6SMarc Zyngier { 953d011e4e6SMarc Zyngier struct its_vlpi_map *map = &dev->event_map.vlpi_maps[id]; 954d011e4e6SMarc Zyngier struct its_cmd_desc desc; 955d011e4e6SMarc Zyngier 956d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 957d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 958d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 959d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 960d011e4e6SMarc Zyngier 961d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 962d011e4e6SMarc Zyngier } 963d011e4e6SMarc Zyngier 96475fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 96575fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 966eb78192bSMarc Zyngier { 967eb78192bSMarc Zyngier struct its_cmd_desc desc; 968eb78192bSMarc Zyngier 969eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 970eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 971eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 97275fd951bSMarc Zyngier 973eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 974eb78192bSMarc Zyngier } 975eb78192bSMarc Zyngier 9763171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 9773171a47aSMarc Zyngier { 9783171a47aSMarc Zyngier struct its_cmd_desc desc; 9793171a47aSMarc Zyngier struct its_node *its; 9803171a47aSMarc Zyngier unsigned long flags; 9813171a47aSMarc Zyngier int col_id = vpe->col_idx; 9823171a47aSMarc Zyngier 9833171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 9843171a47aSMarc Zyngier desc.its_vmovp_cmd.its_list = (u16)its_list_map; 9853171a47aSMarc Zyngier 9863171a47aSMarc Zyngier if (!its_list_map) { 9873171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 9883171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = 0; 9893171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 9903171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 9913171a47aSMarc Zyngier return; 9923171a47aSMarc Zyngier } 9933171a47aSMarc Zyngier 9943171a47aSMarc Zyngier /* 9953171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 9963171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 9973171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 9983171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 9993171a47aSMarc Zyngier * 10003171a47aSMarc Zyngier * Wall <-- Head. 10013171a47aSMarc Zyngier */ 10023171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 10033171a47aSMarc Zyngier 10043171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 10053171a47aSMarc Zyngier 10063171a47aSMarc Zyngier /* Emit VMOVPs */ 10073171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 10083171a47aSMarc Zyngier if (!its->is_v4) 10093171a47aSMarc Zyngier continue; 10103171a47aSMarc Zyngier 10112247e1bfSMarc Zyngier if (!vpe->its_vm->vlpi_count[its->list_nr]) 10122247e1bfSMarc Zyngier continue; 10132247e1bfSMarc Zyngier 10143171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 10153171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 10163171a47aSMarc Zyngier } 10173171a47aSMarc Zyngier 10183171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 10193171a47aSMarc Zyngier } 10203171a47aSMarc Zyngier 102140619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1022eb78192bSMarc Zyngier { 1023eb78192bSMarc Zyngier struct its_cmd_desc desc; 1024eb78192bSMarc Zyngier 1025eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1026eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1027eb78192bSMarc Zyngier } 1028eb78192bSMarc Zyngier 1029c48ed51cSMarc Zyngier /* 1030c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1031c48ed51cSMarc Zyngier */ 1032c48ed51cSMarc Zyngier 1033c48ed51cSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 1034c48ed51cSMarc Zyngier { 1035c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1036591e5becSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 1037c48ed51cSMarc Zyngier } 1038c48ed51cSMarc Zyngier 1039015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1040c48ed51cSMarc Zyngier { 1041015ec038SMarc Zyngier irq_hw_number_t hwirq; 1042e1a2e201SMarc Zyngier void *va; 1043adcdb94eSMarc Zyngier u8 *cfg; 1044c48ed51cSMarc Zyngier 1045015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1046015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1047015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1048d4d7b4adSMarc Zyngier struct its_vlpi_map *map; 1049015ec038SMarc Zyngier 1050e1a2e201SMarc Zyngier va = page_address(its_dev->event_map.vm->vprop_page); 1051d4d7b4adSMarc Zyngier map = &its_dev->event_map.vlpi_maps[event]; 1052d4d7b4adSMarc Zyngier hwirq = map->vintid; 1053d4d7b4adSMarc Zyngier 1054d4d7b4adSMarc Zyngier /* Remember the updated property */ 1055d4d7b4adSMarc Zyngier map->properties &= ~clr; 1056d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1057015ec038SMarc Zyngier } else { 1058e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1059015ec038SMarc Zyngier hwirq = d->hwirq; 1060015ec038SMarc Zyngier } 1061adcdb94eSMarc Zyngier 1062e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1063adcdb94eSMarc Zyngier *cfg &= ~clr; 1064015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1065c48ed51cSMarc Zyngier 1066c48ed51cSMarc Zyngier /* 1067c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1068c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1069c48ed51cSMarc Zyngier * Humpf... 1070c48ed51cSMarc Zyngier */ 1071c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1072328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1073c48ed51cSMarc Zyngier else 1074c48ed51cSMarc Zyngier dsb(ishst); 1075015ec038SMarc Zyngier } 1076015ec038SMarc Zyngier 1077015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1078015ec038SMarc Zyngier { 1079015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1080015ec038SMarc Zyngier 1081015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1082adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 1083c48ed51cSMarc Zyngier } 1084c48ed51cSMarc Zyngier 1085015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1086015ec038SMarc Zyngier { 1087015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1088015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1089015ec038SMarc Zyngier 1090015ec038SMarc Zyngier if (its_dev->event_map.vlpi_maps[event].db_enabled == enable) 1091015ec038SMarc Zyngier return; 1092015ec038SMarc Zyngier 1093015ec038SMarc Zyngier its_dev->event_map.vlpi_maps[event].db_enabled = enable; 1094015ec038SMarc Zyngier 1095015ec038SMarc Zyngier /* 1096015ec038SMarc Zyngier * More fun with the architecture: 1097015ec038SMarc Zyngier * 1098015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1099015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1100015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1101015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1102015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1103015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1104015ec038SMarc Zyngier */ 1105015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1106c48ed51cSMarc Zyngier } 1107c48ed51cSMarc Zyngier 1108c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1109c48ed51cSMarc Zyngier { 1110015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1111015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1112015ec038SMarc Zyngier 1113adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1114c48ed51cSMarc Zyngier } 1115c48ed51cSMarc Zyngier 1116c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1117c48ed51cSMarc Zyngier { 1118015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1119015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1120015ec038SMarc Zyngier 1121adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1122c48ed51cSMarc Zyngier } 1123c48ed51cSMarc Zyngier 1124c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1125c48ed51cSMarc Zyngier bool force) 1126c48ed51cSMarc Zyngier { 1127fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1128fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1129c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1130c48ed51cSMarc Zyngier struct its_collection *target_col; 1131c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1132c48ed51cSMarc Zyngier 1133015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1134015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1135015ec038SMarc Zyngier return -EINVAL; 1136015ec038SMarc Zyngier 1137fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1138fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1139fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1140fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1141fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1142fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1143fbf8f40eSGanapatrao Kulkarni } 1144fbf8f40eSGanapatrao Kulkarni } 1145fbf8f40eSGanapatrao Kulkarni 1146fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1147fbf8f40eSGanapatrao Kulkarni 1148c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1149c48ed51cSMarc Zyngier return -EINVAL; 1150c48ed51cSMarc Zyngier 11518b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 11528b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1153c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1154c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1155591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 11560d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 11578b8d94a7SMaJun } 1158c48ed51cSMarc Zyngier 1159c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1160c48ed51cSMarc Zyngier } 1161c48ed51cSMarc Zyngier 1162558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1163558b0165SArd Biesheuvel { 1164558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1165558b0165SArd Biesheuvel 1166558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1167558b0165SArd Biesheuvel } 1168558b0165SArd Biesheuvel 1169b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1170b48ac83dSMarc Zyngier { 1171b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1172b48ac83dSMarc Zyngier struct its_node *its; 1173b48ac83dSMarc Zyngier u64 addr; 1174b48ac83dSMarc Zyngier 1175b48ac83dSMarc Zyngier its = its_dev->its; 1176558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1177b48ac83dSMarc Zyngier 1178b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1179b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1180b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 118144bb7e24SRobin Murphy 118244bb7e24SRobin Murphy iommu_dma_map_msi_msg(d->irq, msg); 1183b48ac83dSMarc Zyngier } 1184b48ac83dSMarc Zyngier 11858d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 11868d85dcedSMarc Zyngier enum irqchip_irq_state which, 11878d85dcedSMarc Zyngier bool state) 11888d85dcedSMarc Zyngier { 11898d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 11908d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 11918d85dcedSMarc Zyngier 11928d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 11938d85dcedSMarc Zyngier return -EINVAL; 11948d85dcedSMarc Zyngier 11958d85dcedSMarc Zyngier if (state) 11968d85dcedSMarc Zyngier its_send_int(its_dev, event); 11978d85dcedSMarc Zyngier else 11988d85dcedSMarc Zyngier its_send_clear(its_dev, event); 11998d85dcedSMarc Zyngier 12008d85dcedSMarc Zyngier return 0; 12018d85dcedSMarc Zyngier } 12028d85dcedSMarc Zyngier 12032247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 12042247e1bfSMarc Zyngier { 12052247e1bfSMarc Zyngier unsigned long flags; 12062247e1bfSMarc Zyngier 12072247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12082247e1bfSMarc Zyngier if (!its_list_map) 12092247e1bfSMarc Zyngier return; 12102247e1bfSMarc Zyngier 12112247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12122247e1bfSMarc Zyngier 12132247e1bfSMarc Zyngier /* 12142247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 12152247e1bfSMarc Zyngier * them mapped now. 12162247e1bfSMarc Zyngier */ 12172247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 12182247e1bfSMarc Zyngier 12192247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 12202247e1bfSMarc Zyngier int i; 12212247e1bfSMarc Zyngier 12222247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 12232247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 122444c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 12252247e1bfSMarc Zyngier 12262247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 12272247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 12282247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 12292247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 123044c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 12312247e1bfSMarc Zyngier } 12322247e1bfSMarc Zyngier } 12332247e1bfSMarc Zyngier 12342247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12352247e1bfSMarc Zyngier } 12362247e1bfSMarc Zyngier 12372247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 12382247e1bfSMarc Zyngier { 12392247e1bfSMarc Zyngier unsigned long flags; 12402247e1bfSMarc Zyngier 12412247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 12422247e1bfSMarc Zyngier if (!its_list_map) 12432247e1bfSMarc Zyngier return; 12442247e1bfSMarc Zyngier 12452247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12462247e1bfSMarc Zyngier 12472247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 12482247e1bfSMarc Zyngier int i; 12492247e1bfSMarc Zyngier 12502247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 12512247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 12522247e1bfSMarc Zyngier } 12532247e1bfSMarc Zyngier 12542247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 12552247e1bfSMarc Zyngier } 12562247e1bfSMarc Zyngier 1257d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1258d011e4e6SMarc Zyngier { 1259d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1260d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1261d011e4e6SMarc Zyngier int ret = 0; 1262d011e4e6SMarc Zyngier 1263d011e4e6SMarc Zyngier if (!info->map) 1264d011e4e6SMarc Zyngier return -EINVAL; 1265d011e4e6SMarc Zyngier 1266d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1267d011e4e6SMarc Zyngier 1268d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1269d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1270d011e4e6SMarc Zyngier 12716396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 1272d011e4e6SMarc Zyngier GFP_KERNEL); 1273d011e4e6SMarc Zyngier if (!maps) { 1274d011e4e6SMarc Zyngier ret = -ENOMEM; 1275d011e4e6SMarc Zyngier goto out; 1276d011e4e6SMarc Zyngier } 1277d011e4e6SMarc Zyngier 1278d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1279d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1280d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1281d011e4e6SMarc Zyngier ret = -EINVAL; 1282d011e4e6SMarc Zyngier goto out; 1283d011e4e6SMarc Zyngier } 1284d011e4e6SMarc Zyngier 1285d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1286d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1287d011e4e6SMarc Zyngier 1288d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1289d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1290d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1291d011e4e6SMarc Zyngier } else { 12922247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 12932247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 12942247e1bfSMarc Zyngier 1295d4d7b4adSMarc Zyngier /* 1296d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1297d4d7b4adSMarc Zyngier * start poking the virtual property table. 1298d4d7b4adSMarc Zyngier */ 1299d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1300d4d7b4adSMarc Zyngier 1301d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1302d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1303d4d7b4adSMarc Zyngier 1304d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1305d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1306d011e4e6SMarc Zyngier 1307d011e4e6SMarc Zyngier /* and install the virtual one */ 1308d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1309d011e4e6SMarc Zyngier 1310d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1311d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1312d011e4e6SMarc Zyngier } 1313d011e4e6SMarc Zyngier 1314d011e4e6SMarc Zyngier out: 1315d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1316d011e4e6SMarc Zyngier return ret; 1317d011e4e6SMarc Zyngier } 1318d011e4e6SMarc Zyngier 1319d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1320d011e4e6SMarc Zyngier { 1321d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1322d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1323d011e4e6SMarc Zyngier int ret = 0; 1324d011e4e6SMarc Zyngier 1325d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1326d011e4e6SMarc Zyngier 1327d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || 1328d011e4e6SMarc Zyngier !its_dev->event_map.vlpi_maps[event].vm) { 1329d011e4e6SMarc Zyngier ret = -EINVAL; 1330d011e4e6SMarc Zyngier goto out; 1331d011e4e6SMarc Zyngier } 1332d011e4e6SMarc Zyngier 1333d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1334d011e4e6SMarc Zyngier *info->map = its_dev->event_map.vlpi_maps[event]; 1335d011e4e6SMarc Zyngier 1336d011e4e6SMarc Zyngier out: 1337d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1338d011e4e6SMarc Zyngier return ret; 1339d011e4e6SMarc Zyngier } 1340d011e4e6SMarc Zyngier 1341d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1342d011e4e6SMarc Zyngier { 1343d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1344d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1345d011e4e6SMarc Zyngier int ret = 0; 1346d011e4e6SMarc Zyngier 1347d011e4e6SMarc Zyngier mutex_lock(&its_dev->event_map.vlpi_lock); 1348d011e4e6SMarc Zyngier 1349d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1350d011e4e6SMarc Zyngier ret = -EINVAL; 1351d011e4e6SMarc Zyngier goto out; 1352d011e4e6SMarc Zyngier } 1353d011e4e6SMarc Zyngier 1354d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1355d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1356d011e4e6SMarc Zyngier 1357d011e4e6SMarc Zyngier /* and restore the physical one */ 1358d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1359d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1360d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1361d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1362d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1363d011e4e6SMarc Zyngier 13642247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 13652247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 13662247e1bfSMarc Zyngier 1367d011e4e6SMarc Zyngier /* 1368d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1369d011e4e6SMarc Zyngier * this was the last VLPI. 1370d011e4e6SMarc Zyngier */ 1371d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1372d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1373d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1374d011e4e6SMarc Zyngier } 1375d011e4e6SMarc Zyngier 1376d011e4e6SMarc Zyngier out: 1377d011e4e6SMarc Zyngier mutex_unlock(&its_dev->event_map.vlpi_lock); 1378d011e4e6SMarc Zyngier return ret; 1379d011e4e6SMarc Zyngier } 1380d011e4e6SMarc Zyngier 1381015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1382015ec038SMarc Zyngier { 1383015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1384015ec038SMarc Zyngier 1385015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1386015ec038SMarc Zyngier return -EINVAL; 1387015ec038SMarc Zyngier 1388015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1389015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1390015ec038SMarc Zyngier else 1391015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1392015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1393015ec038SMarc Zyngier 1394015ec038SMarc Zyngier return 0; 1395015ec038SMarc Zyngier } 1396015ec038SMarc Zyngier 1397c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1398c808eea8SMarc Zyngier { 1399c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1400c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1401c808eea8SMarc Zyngier 1402c808eea8SMarc Zyngier /* Need a v4 ITS */ 1403d011e4e6SMarc Zyngier if (!its_dev->its->is_v4) 1404c808eea8SMarc Zyngier return -EINVAL; 1405c808eea8SMarc Zyngier 1406d011e4e6SMarc Zyngier /* Unmap request? */ 1407d011e4e6SMarc Zyngier if (!info) 1408d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1409d011e4e6SMarc Zyngier 1410c808eea8SMarc Zyngier switch (info->cmd_type) { 1411c808eea8SMarc Zyngier case MAP_VLPI: 1412d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1413c808eea8SMarc Zyngier 1414c808eea8SMarc Zyngier case GET_VLPI: 1415d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1416c808eea8SMarc Zyngier 1417c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1418c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1419015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1420c808eea8SMarc Zyngier 1421c808eea8SMarc Zyngier default: 1422c808eea8SMarc Zyngier return -EINVAL; 1423c808eea8SMarc Zyngier } 1424c808eea8SMarc Zyngier } 1425c808eea8SMarc Zyngier 1426c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1427c48ed51cSMarc Zyngier .name = "ITS", 1428c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1429c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1430004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1431c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1432b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 14338d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1434c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1435b48ac83dSMarc Zyngier }; 1436b48ac83dSMarc Zyngier 1437880cb3cdSMarc Zyngier 1438bf9529f8SMarc Zyngier /* 1439bf9529f8SMarc Zyngier * How we allocate LPIs: 1440bf9529f8SMarc Zyngier * 1441880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1442880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1443880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1444880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1445bf9529f8SMarc Zyngier * 1446880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1447880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1448880cb3cdSMarc Zyngier * already free block. 1449880cb3cdSMarc Zyngier * 1450880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1451880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1452880cb3cdSMarc Zyngier */ 14534cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1454880cb3cdSMarc Zyngier 1455880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 1456880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 1457bf9529f8SMarc Zyngier 1458880cb3cdSMarc Zyngier struct lpi_range { 1459880cb3cdSMarc Zyngier struct list_head entry; 1460880cb3cdSMarc Zyngier u32 base_id; 1461880cb3cdSMarc Zyngier u32 span; 1462880cb3cdSMarc Zyngier }; 1463880cb3cdSMarc Zyngier 1464880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 1465bf9529f8SMarc Zyngier { 1466880cb3cdSMarc Zyngier struct lpi_range *range; 1467880cb3cdSMarc Zyngier 14681c73fac5SRasmus Villemoes range = kmalloc(sizeof(*range), GFP_KERNEL); 1469880cb3cdSMarc Zyngier if (range) { 1470880cb3cdSMarc Zyngier range->base_id = base; 1471880cb3cdSMarc Zyngier range->span = span; 1472bf9529f8SMarc Zyngier } 1473bf9529f8SMarc Zyngier 1474880cb3cdSMarc Zyngier return range; 1475880cb3cdSMarc Zyngier } 1476880cb3cdSMarc Zyngier 1477880cb3cdSMarc Zyngier static int lpi_range_cmp(void *priv, struct list_head *a, struct list_head *b) 1478bf9529f8SMarc Zyngier { 1479880cb3cdSMarc Zyngier struct lpi_range *ra, *rb; 1480880cb3cdSMarc Zyngier 1481880cb3cdSMarc Zyngier ra = container_of(a, struct lpi_range, entry); 1482880cb3cdSMarc Zyngier rb = container_of(b, struct lpi_range, entry); 1483880cb3cdSMarc Zyngier 148489dc8917SRasmus Villemoes return ra->base_id - rb->base_id; 1485880cb3cdSMarc Zyngier } 1486880cb3cdSMarc Zyngier 1487880cb3cdSMarc Zyngier static void merge_lpi_ranges(void) 1488880cb3cdSMarc Zyngier { 1489880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1490880cb3cdSMarc Zyngier 1491880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1492880cb3cdSMarc Zyngier if (!list_is_last(&range->entry, &lpi_range_list) && 1493880cb3cdSMarc Zyngier (tmp->base_id == (range->base_id + range->span))) { 1494880cb3cdSMarc Zyngier tmp->base_id = range->base_id; 1495880cb3cdSMarc Zyngier tmp->span += range->span; 1496880cb3cdSMarc Zyngier list_del(&range->entry); 1497880cb3cdSMarc Zyngier kfree(range); 1498880cb3cdSMarc Zyngier } 1499880cb3cdSMarc Zyngier } 1500880cb3cdSMarc Zyngier } 1501880cb3cdSMarc Zyngier 1502880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 1503880cb3cdSMarc Zyngier { 1504880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1505880cb3cdSMarc Zyngier int err = -ENOSPC; 1506880cb3cdSMarc Zyngier 1507880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1508880cb3cdSMarc Zyngier 1509880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1510880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 1511880cb3cdSMarc Zyngier *base = range->base_id; 1512880cb3cdSMarc Zyngier range->base_id += nr_lpis; 1513880cb3cdSMarc Zyngier range->span -= nr_lpis; 1514880cb3cdSMarc Zyngier 1515880cb3cdSMarc Zyngier if (range->span == 0) { 1516880cb3cdSMarc Zyngier list_del(&range->entry); 1517880cb3cdSMarc Zyngier kfree(range); 1518880cb3cdSMarc Zyngier } 1519880cb3cdSMarc Zyngier 1520880cb3cdSMarc Zyngier err = 0; 1521880cb3cdSMarc Zyngier break; 1522880cb3cdSMarc Zyngier } 1523880cb3cdSMarc Zyngier } 1524880cb3cdSMarc Zyngier 1525880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1526880cb3cdSMarc Zyngier 1527880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 1528880cb3cdSMarc Zyngier return err; 1529880cb3cdSMarc Zyngier } 1530880cb3cdSMarc Zyngier 1531880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 1532880cb3cdSMarc Zyngier { 1533880cb3cdSMarc Zyngier struct lpi_range *new; 1534880cb3cdSMarc Zyngier 1535880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 1536b31a3838SRasmus Villemoes if (!new) 1537b31a3838SRasmus Villemoes return -ENOMEM; 1538b31a3838SRasmus Villemoes 1539b31a3838SRasmus Villemoes mutex_lock(&lpi_range_lock); 1540880cb3cdSMarc Zyngier 1541880cb3cdSMarc Zyngier list_add(&new->entry, &lpi_range_list); 1542880cb3cdSMarc Zyngier list_sort(NULL, &lpi_range_list, lpi_range_cmp); 1543880cb3cdSMarc Zyngier merge_lpi_ranges(); 1544b31a3838SRasmus Villemoes 1545880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1546b31a3838SRasmus Villemoes return 0; 1547bf9529f8SMarc Zyngier } 1548bf9529f8SMarc Zyngier 154904a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1550bf9529f8SMarc Zyngier { 1551880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 155212b2905aSMarc Zyngier u32 numlpis; 1553880cb3cdSMarc Zyngier int err; 1554bf9529f8SMarc Zyngier 155512b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 155612b2905aSMarc Zyngier 155712b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 155812b2905aSMarc Zyngier lpis = numlpis; 155912b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 156012b2905aSMarc Zyngier lpis); 156112b2905aSMarc Zyngier } 156212b2905aSMarc Zyngier 1563880cb3cdSMarc Zyngier /* 1564880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 1565880cb3cdSMarc Zyngier * full range of LPIs. 1566880cb3cdSMarc Zyngier */ 1567880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 1568880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 1569880cb3cdSMarc Zyngier return err; 1570bf9529f8SMarc Zyngier } 1571bf9529f8SMarc Zyngier 157238dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 1573bf9529f8SMarc Zyngier { 1574bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1575880cb3cdSMarc Zyngier int err = 0; 1576bf9529f8SMarc Zyngier 1577bf9529f8SMarc Zyngier do { 157838dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 1579880cb3cdSMarc Zyngier if (!err) 1580bf9529f8SMarc Zyngier break; 1581bf9529f8SMarc Zyngier 158238dd7c49SMarc Zyngier nr_irqs /= 2; 158338dd7c49SMarc Zyngier } while (nr_irqs > 0); 1584bf9529f8SMarc Zyngier 158545725e0fSMarc Zyngier if (!nr_irqs) 158645725e0fSMarc Zyngier err = -ENOSPC; 158745725e0fSMarc Zyngier 1588880cb3cdSMarc Zyngier if (err) 1589bf9529f8SMarc Zyngier goto out; 1590bf9529f8SMarc Zyngier 159138dd7c49SMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_irqs), sizeof (long), GFP_ATOMIC); 1592bf9529f8SMarc Zyngier if (!bitmap) 1593bf9529f8SMarc Zyngier goto out; 1594bf9529f8SMarc Zyngier 159538dd7c49SMarc Zyngier *nr_ids = nr_irqs; 1596bf9529f8SMarc Zyngier 1597bf9529f8SMarc Zyngier out: 1598c8415b94SMarc Zyngier if (!bitmap) 1599c8415b94SMarc Zyngier *base = *nr_ids = 0; 1600c8415b94SMarc Zyngier 1601bf9529f8SMarc Zyngier return bitmap; 1602bf9529f8SMarc Zyngier } 1603bf9529f8SMarc Zyngier 160438dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 1605bf9529f8SMarc Zyngier { 1606880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 1607cf2be8baSMarc Zyngier kfree(bitmap); 1608bf9529f8SMarc Zyngier } 16091ac19ca6SMarc Zyngier 1610053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 1611053be485SMarc Zyngier { 1612053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 1613053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 1614053be485SMarc Zyngier 1615053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 1616053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 1617053be485SMarc Zyngier } 1618053be485SMarc Zyngier 16190e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 16200e5ccf91SMarc Zyngier { 16210e5ccf91SMarc Zyngier struct page *prop_page; 16221ac19ca6SMarc Zyngier 16230e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 16240e5ccf91SMarc Zyngier if (!prop_page) 16250e5ccf91SMarc Zyngier return NULL; 16260e5ccf91SMarc Zyngier 1627053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 16280e5ccf91SMarc Zyngier 16290e5ccf91SMarc Zyngier return prop_page; 16300e5ccf91SMarc Zyngier } 16310e5ccf91SMarc Zyngier 16327d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 16337d75bbb4SMarc Zyngier { 16347d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 16357d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 16367d75bbb4SMarc Zyngier } 16371ac19ca6SMarc Zyngier 16385e2c9f9aSMarc Zyngier static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) 16395e2c9f9aSMarc Zyngier { 16405e2c9f9aSMarc Zyngier phys_addr_t start, end, addr_end; 16415e2c9f9aSMarc Zyngier u64 i; 16425e2c9f9aSMarc Zyngier 16435e2c9f9aSMarc Zyngier /* 16445e2c9f9aSMarc Zyngier * We don't bother checking for a kdump kernel as by 16455e2c9f9aSMarc Zyngier * construction, the LPI tables are out of this kernel's 16465e2c9f9aSMarc Zyngier * memory map. 16475e2c9f9aSMarc Zyngier */ 16485e2c9f9aSMarc Zyngier if (is_kdump_kernel()) 16495e2c9f9aSMarc Zyngier return true; 16505e2c9f9aSMarc Zyngier 16515e2c9f9aSMarc Zyngier addr_end = addr + size - 1; 16525e2c9f9aSMarc Zyngier 16535e2c9f9aSMarc Zyngier for_each_reserved_mem_region(i, &start, &end) { 16545e2c9f9aSMarc Zyngier if (addr >= start && addr_end <= end) 16555e2c9f9aSMarc Zyngier return true; 16565e2c9f9aSMarc Zyngier } 16575e2c9f9aSMarc Zyngier 16585e2c9f9aSMarc Zyngier /* Not found, not a good sign... */ 16595e2c9f9aSMarc Zyngier pr_warn("GICv3: Expected reserved range [%pa:%pa], not found\n", 16605e2c9f9aSMarc Zyngier &addr, &addr_end); 16615e2c9f9aSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 16625e2c9f9aSMarc Zyngier return false; 16635e2c9f9aSMarc Zyngier } 16645e2c9f9aSMarc Zyngier 16653fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 16663fb68faeSMarc Zyngier { 16673fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 16683fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 16693fb68faeSMarc Zyngier 16703fb68faeSMarc Zyngier return 0; 16713fb68faeSMarc Zyngier } 16723fb68faeSMarc Zyngier 167311e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 16741ac19ca6SMarc Zyngier { 1675c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 1676c440a9d9SMarc Zyngier u64 val; 1677c440a9d9SMarc Zyngier 1678c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 1679c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 1680c440a9d9SMarc Zyngier 1681c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 1682c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 1683c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 1684c440a9d9SMarc Zyngier MEMREMAP_WB); 1685c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 1686c440a9d9SMarc Zyngier } else { 1687e1a2e201SMarc Zyngier struct page *page; 16881ac19ca6SMarc Zyngier 1689c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 1690c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 16914cb205c0SJia He ITS_MAX_LPI_NRBITS); 1692e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 1693e1a2e201SMarc Zyngier if (!page) { 16941ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 16951ac19ca6SMarc Zyngier return -ENOMEM; 16961ac19ca6SMarc Zyngier } 16971ac19ca6SMarc Zyngier 1698e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 1699e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 17003fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 17013fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 1702c440a9d9SMarc Zyngier } 1703e1a2e201SMarc Zyngier 1704e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 1705e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 17061ac19ca6SMarc Zyngier 17076c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 17081ac19ca6SMarc Zyngier } 17091ac19ca6SMarc Zyngier 17101ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 17111ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 17121ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 17134f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 17141ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 17151ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 17161ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 17171ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 17181ac19ca6SMarc Zyngier }; 17191ac19ca6SMarc Zyngier 17202d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 17212d81d425SShanker Donthineni { 17222d81d425SShanker Donthineni u32 idx = baser - its->tables; 17232d81d425SShanker Donthineni 17240968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 17252d81d425SShanker Donthineni } 17262d81d425SShanker Donthineni 17272d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 17282d81d425SShanker Donthineni u64 val) 17292d81d425SShanker Donthineni { 17302d81d425SShanker Donthineni u32 idx = baser - its->tables; 17312d81d425SShanker Donthineni 17320968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 17332d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 17342d81d425SShanker Donthineni } 17352d81d425SShanker Donthineni 17369347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 17373faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 17383faf24eaSShanker Donthineni bool indirect) 17399347359aSShanker Donthineni { 17409347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 17419347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 17429347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 174330ae9610SShanker Donthineni u64 baser_phys, tmp; 17449347359aSShanker Donthineni u32 alloc_pages; 1745539d3782SShanker Donthineni struct page *page; 17469347359aSShanker Donthineni void *base; 17479347359aSShanker Donthineni 17489347359aSShanker Donthineni retry_alloc_baser: 17499347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 17509347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 17519347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 17529347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 17539347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 17549347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 17559347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 17569347359aSShanker Donthineni } 17579347359aSShanker Donthineni 1758539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); 1759539d3782SShanker Donthineni if (!page) 17609347359aSShanker Donthineni return -ENOMEM; 17619347359aSShanker Donthineni 1762539d3782SShanker Donthineni base = (void *)page_address(page); 176330ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 176430ae9610SShanker Donthineni 176530ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 176630ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 176730ae9610SShanker Donthineni 176830ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 176930ae9610SShanker Donthineni if (psz != SZ_64K) { 177030ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 177130ae9610SShanker Donthineni free_pages((unsigned long)base, order); 177230ae9610SShanker Donthineni return -ENXIO; 177330ae9610SShanker Donthineni } 177430ae9610SShanker Donthineni 177530ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 177630ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 177730ae9610SShanker Donthineni } 177830ae9610SShanker Donthineni 17799347359aSShanker Donthineni retry_baser: 178030ae9610SShanker Donthineni val = (baser_phys | 17819347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 17829347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 17839347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 17849347359aSShanker Donthineni cache | 17859347359aSShanker Donthineni shr | 17869347359aSShanker Donthineni GITS_BASER_VALID); 17879347359aSShanker Donthineni 17883faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 17893faf24eaSShanker Donthineni 17909347359aSShanker Donthineni switch (psz) { 17919347359aSShanker Donthineni case SZ_4K: 17929347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 17939347359aSShanker Donthineni break; 17949347359aSShanker Donthineni case SZ_16K: 17959347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 17969347359aSShanker Donthineni break; 17979347359aSShanker Donthineni case SZ_64K: 17989347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 17999347359aSShanker Donthineni break; 18009347359aSShanker Donthineni } 18019347359aSShanker Donthineni 18029347359aSShanker Donthineni its_write_baser(its, baser, val); 18039347359aSShanker Donthineni tmp = baser->val; 18049347359aSShanker Donthineni 18059347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 18069347359aSShanker Donthineni /* 18079347359aSShanker Donthineni * Shareability didn't stick. Just use 18089347359aSShanker Donthineni * whatever the read reported, which is likely 18099347359aSShanker Donthineni * to be the only thing this redistributor 18109347359aSShanker Donthineni * supports. If that's zero, make it 18119347359aSShanker Donthineni * non-cacheable as well. 18129347359aSShanker Donthineni */ 18139347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 18149347359aSShanker Donthineni if (!shr) { 18159347359aSShanker Donthineni cache = GITS_BASER_nC; 1816328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 18179347359aSShanker Donthineni } 18189347359aSShanker Donthineni goto retry_baser; 18199347359aSShanker Donthineni } 18209347359aSShanker Donthineni 18219347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 18229347359aSShanker Donthineni /* 18239347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 18249347359aSShanker Donthineni * size and retry. If we reach 4K, then 18259347359aSShanker Donthineni * something is horribly wrong... 18269347359aSShanker Donthineni */ 18279347359aSShanker Donthineni free_pages((unsigned long)base, order); 18289347359aSShanker Donthineni baser->base = NULL; 18299347359aSShanker Donthineni 18309347359aSShanker Donthineni switch (psz) { 18319347359aSShanker Donthineni case SZ_16K: 18329347359aSShanker Donthineni psz = SZ_4K; 18339347359aSShanker Donthineni goto retry_alloc_baser; 18349347359aSShanker Donthineni case SZ_64K: 18359347359aSShanker Donthineni psz = SZ_16K; 18369347359aSShanker Donthineni goto retry_alloc_baser; 18379347359aSShanker Donthineni } 18389347359aSShanker Donthineni } 18399347359aSShanker Donthineni 18409347359aSShanker Donthineni if (val != tmp) { 1841b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 18429347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 1843b11283ebSVladimir Murzin val, tmp); 18449347359aSShanker Donthineni free_pages((unsigned long)base, order); 18459347359aSShanker Donthineni return -ENXIO; 18469347359aSShanker Donthineni } 18479347359aSShanker Donthineni 18489347359aSShanker Donthineni baser->order = order; 18499347359aSShanker Donthineni baser->base = base; 18509347359aSShanker Donthineni baser->psz = psz; 18513faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 18529347359aSShanker Donthineni 18533faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 1854d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 18559347359aSShanker Donthineni its_base_type_string[type], 18569347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 18573faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 18589347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 18599347359aSShanker Donthineni 18609347359aSShanker Donthineni return 0; 18619347359aSShanker Donthineni } 18629347359aSShanker Donthineni 18634cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 18644cacac57SMarc Zyngier struct its_baser *baser, 186532bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 18664b75c459SShanker Donthineni { 18674cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 18684cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 18694cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 18702fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 18714b75c459SShanker Donthineni u32 new_order = *order; 18723faf24eaSShanker Donthineni bool indirect = false; 18733faf24eaSShanker Donthineni 18743faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 18753faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 18763faf24eaSShanker Donthineni /* 18773faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 18783faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 18793faf24eaSShanker Donthineni */ 18803faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 18813faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 18823faf24eaSShanker Donthineni 18833faf24eaSShanker Donthineni if (indirect) { 18843faf24eaSShanker Donthineni /* 18853faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 18863faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 18873faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 18883faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 18893faf24eaSShanker Donthineni * entry size. 18903faf24eaSShanker Donthineni */ 1891d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 18923faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 18933faf24eaSShanker Donthineni } 18943faf24eaSShanker Donthineni } 18954b75c459SShanker Donthineni 18964b75c459SShanker Donthineni /* 18974b75c459SShanker Donthineni * Allocate as many entries as required to fit the 18984b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 18994b75c459SShanker Donthineni * space being incredibly sparse, this results in a 19003faf24eaSShanker Donthineni * massive waste of memory if two-level device table 19013faf24eaSShanker Donthineni * feature is not supported by hardware. 19024b75c459SShanker Donthineni */ 19034b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 19044b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 19054b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 1906d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 19074cacac57SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %u->%u\n", 19084cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 19094cacac57SMarc Zyngier its->device_ids, ids); 19104b75c459SShanker Donthineni } 19114b75c459SShanker Donthineni 19124b75c459SShanker Donthineni *order = new_order; 19133faf24eaSShanker Donthineni 19143faf24eaSShanker Donthineni return indirect; 19154b75c459SShanker Donthineni } 19164b75c459SShanker Donthineni 19171ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 19181ac19ca6SMarc Zyngier { 19191ac19ca6SMarc Zyngier int i; 19201ac19ca6SMarc Zyngier 19211ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 19221a485f4dSShanker Donthineni if (its->tables[i].base) { 19231a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 19241a485f4dSShanker Donthineni its->tables[i].order); 19251a485f4dSShanker Donthineni its->tables[i].base = NULL; 19261ac19ca6SMarc Zyngier } 19271ac19ca6SMarc Zyngier } 19281ac19ca6SMarc Zyngier } 19291ac19ca6SMarc Zyngier 19300e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 19311ac19ca6SMarc Zyngier { 19321ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 19332fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 19349347359aSShanker Donthineni u32 psz = SZ_64K; 19359347359aSShanker Donthineni int err, i; 193694100970SRobert Richter 1937fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 1938fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 19399347359aSShanker Donthineni cache = GITS_BASER_nCnB; 1940466b7d16SShanker Donthineni 19411ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 19422d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 19432d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 19441ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 19459347359aSShanker Donthineni u32 order = get_order(psz); 19463faf24eaSShanker Donthineni bool indirect = false; 19471ac19ca6SMarc Zyngier 19484cacac57SMarc Zyngier switch (type) { 19494cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 19501ac19ca6SMarc Zyngier continue; 19511ac19ca6SMarc Zyngier 19524cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 195332bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 195432bd44dcSShanker Donthineni psz, &order, 195532bd44dcSShanker Donthineni its->device_ids); 19568d565748SZenghui Yu break; 19578d565748SZenghui Yu 19584cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 19594cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 196032bd44dcSShanker Donthineni psz, &order, 196132bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 19624cacac57SMarc Zyngier break; 19634cacac57SMarc Zyngier } 1964f54b97edSMarc Zyngier 19653faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 19669347359aSShanker Donthineni if (err < 0) { 19679347359aSShanker Donthineni its_free_tables(its); 19689347359aSShanker Donthineni return err; 196930f21363SRobert Richter } 197030f21363SRobert Richter 19719347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 19729347359aSShanker Donthineni psz = baser->psz; 19739347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 19749347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 19751ac19ca6SMarc Zyngier } 19761ac19ca6SMarc Zyngier 19771ac19ca6SMarc Zyngier return 0; 19781ac19ca6SMarc Zyngier } 19791ac19ca6SMarc Zyngier 19801ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 19811ac19ca6SMarc Zyngier { 198283559b47SMarc Zyngier int i; 198383559b47SMarc Zyngier 19846396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 19851ac19ca6SMarc Zyngier GFP_KERNEL); 19861ac19ca6SMarc Zyngier if (!its->collections) 19871ac19ca6SMarc Zyngier return -ENOMEM; 19881ac19ca6SMarc Zyngier 198983559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 199083559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 199183559b47SMarc Zyngier 19921ac19ca6SMarc Zyngier return 0; 19931ac19ca6SMarc Zyngier } 19941ac19ca6SMarc Zyngier 19957c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 19967c297a2dSMarc Zyngier { 19977c297a2dSMarc Zyngier struct page *pend_page; 1998adaab500SMarc Zyngier 19997c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 2000adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 20017c297a2dSMarc Zyngier if (!pend_page) 20027c297a2dSMarc Zyngier return NULL; 20037c297a2dSMarc Zyngier 20047c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 20057c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 20067c297a2dSMarc Zyngier 20077c297a2dSMarc Zyngier return pend_page; 20087c297a2dSMarc Zyngier } 20097c297a2dSMarc Zyngier 20107d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 20117d75bbb4SMarc Zyngier { 2012adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 20137d75bbb4SMarc Zyngier } 20147d75bbb4SMarc Zyngier 2015c6e2ccb6SMarc Zyngier /* 20165e2c9f9aSMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. Any other 20175e2c9f9aSMarc Zyngier * case is wrong in the absence of firmware/EFI support. 2018c6e2ccb6SMarc Zyngier */ 2019c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 2020c440a9d9SMarc Zyngier { 20215e2c9f9aSMarc Zyngier phys_addr_t addr; 20225e2c9f9aSMarc Zyngier u64 val; 2023c6e2ccb6SMarc Zyngier 20245e2c9f9aSMarc Zyngier /* Check whether the property table is in a reserved region */ 20255e2c9f9aSMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 20265e2c9f9aSMarc Zyngier addr = val & GENMASK_ULL(51, 12); 20275e2c9f9aSMarc Zyngier 20285e2c9f9aSMarc Zyngier return gic_check_reserved_range(addr, LPI_PROPBASE_SZ); 2029c440a9d9SMarc Zyngier } 2030c440a9d9SMarc Zyngier 203111e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 203211e37d35SMarc Zyngier { 2033c440a9d9SMarc Zyngier u64 val; 203411e37d35SMarc Zyngier int err, cpu; 203511e37d35SMarc Zyngier 2036c440a9d9SMarc Zyngier /* 2037c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 2038c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 2039c440a9d9SMarc Zyngier */ 2040c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 2041c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 2042c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 2043c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 2044c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 2045c440a9d9SMarc Zyngier } 2046c440a9d9SMarc Zyngier 204711e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 204811e37d35SMarc Zyngier if (err) 204911e37d35SMarc Zyngier return err; 205011e37d35SMarc Zyngier 205111e37d35SMarc Zyngier /* 205211e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 205311e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 205411e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 205511e37d35SMarc Zyngier */ 205611e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 205711e37d35SMarc Zyngier struct page *pend_page; 205811e37d35SMarc Zyngier 205911e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 206011e37d35SMarc Zyngier if (!pend_page) { 206111e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 206211e37d35SMarc Zyngier return -ENOMEM; 206311e37d35SMarc Zyngier } 206411e37d35SMarc Zyngier 206511e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 206611e37d35SMarc Zyngier } 206711e37d35SMarc Zyngier 206811e37d35SMarc Zyngier return 0; 206911e37d35SMarc Zyngier } 207011e37d35SMarc Zyngier 20716479450fSHeyi Guo static u64 its_clear_vpend_valid(void __iomem *vlpi_base) 20726479450fSHeyi Guo { 20736479450fSHeyi Guo u32 count = 1000000; /* 1s! */ 20746479450fSHeyi Guo bool clean; 20756479450fSHeyi Guo u64 val; 20766479450fSHeyi Guo 20776479450fSHeyi Guo val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 20786479450fSHeyi Guo val &= ~GICR_VPENDBASER_Valid; 20796479450fSHeyi Guo gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 20806479450fSHeyi Guo 20816479450fSHeyi Guo do { 20826479450fSHeyi Guo val = gits_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 20836479450fSHeyi Guo clean = !(val & GICR_VPENDBASER_Dirty); 20846479450fSHeyi Guo if (!clean) { 20856479450fSHeyi Guo count--; 20866479450fSHeyi Guo cpu_relax(); 20876479450fSHeyi Guo udelay(1); 20886479450fSHeyi Guo } 20896479450fSHeyi Guo } while (!clean && count); 20906479450fSHeyi Guo 20916479450fSHeyi Guo return val; 20926479450fSHeyi Guo } 20936479450fSHeyi Guo 20941ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 20951ac19ca6SMarc Zyngier { 20961ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 20971ac19ca6SMarc Zyngier struct page *pend_page; 209811e37d35SMarc Zyngier phys_addr_t paddr; 20991ac19ca6SMarc Zyngier u64 val, tmp; 21001ac19ca6SMarc Zyngier 210111e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 21021ac19ca6SMarc Zyngier return; 21031ac19ca6SMarc Zyngier 2104c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 2105c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 2106c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 2107f842ca8eSMarc Zyngier /* 2108f842ca8eSMarc Zyngier * Check that we get the same property table on all 2109f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 2110f842ca8eSMarc Zyngier */ 2111f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 2112f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 2113f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 2114f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 2115f842ca8eSMarc Zyngier 2116c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2117c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 2118c440a9d9SMarc Zyngier 21195e2c9f9aSMarc Zyngier WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ)); 2120c440a9d9SMarc Zyngier its_free_pending_table(gic_data_rdist()->pend_page); 2121c440a9d9SMarc Zyngier gic_data_rdist()->pend_page = NULL; 2122c440a9d9SMarc Zyngier 2123c440a9d9SMarc Zyngier goto out; 2124c440a9d9SMarc Zyngier } 2125c440a9d9SMarc Zyngier 212611e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 21271ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 21283fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 21291ac19ca6SMarc Zyngier 21301ac19ca6SMarc Zyngier /* set PROPBASE */ 2131e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 21321ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 21332fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 21341ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 21351ac19ca6SMarc Zyngier 21360968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 21370968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 21381ac19ca6SMarc Zyngier 21391ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 2140241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 2141241a386cSMarc Zyngier /* 2142241a386cSMarc Zyngier * The HW reports non-shareable, we must 2143241a386cSMarc Zyngier * remove the cacheability attributes as 2144241a386cSMarc Zyngier * well. 2145241a386cSMarc Zyngier */ 2146241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 2147241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 2148241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 21490968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 2150241a386cSMarc Zyngier } 21511ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 21521ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 21531ac19ca6SMarc Zyngier } 21541ac19ca6SMarc Zyngier 21551ac19ca6SMarc Zyngier /* set PENDBASE */ 21561ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 21574ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 21582fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 21591ac19ca6SMarc Zyngier 21600968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 21610968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2162241a386cSMarc Zyngier 2163241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 2164241a386cSMarc Zyngier /* 2165241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 2166241a386cSMarc Zyngier * cacheability attributes as well. 2167241a386cSMarc Zyngier */ 2168241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 2169241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 2170241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 21710968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 2172241a386cSMarc Zyngier } 21731ac19ca6SMarc Zyngier 21741ac19ca6SMarc Zyngier /* Enable LPIs */ 21751ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 21761ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 21771ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 21781ac19ca6SMarc Zyngier 21796479450fSHeyi Guo if (gic_rdists->has_vlpis) { 21806479450fSHeyi Guo void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 21816479450fSHeyi Guo 21826479450fSHeyi Guo /* 21836479450fSHeyi Guo * It's possible for CPU to receive VLPIs before it is 21846479450fSHeyi Guo * sheduled as a vPE, especially for the first CPU, and the 21856479450fSHeyi Guo * VLPI with INTID larger than 2^(IDbits+1) will be considered 21866479450fSHeyi Guo * as out of range and dropped by GIC. 21876479450fSHeyi Guo * So we initialize IDbits to known value to avoid VLPI drop. 21886479450fSHeyi Guo */ 21896479450fSHeyi Guo val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 21906479450fSHeyi Guo pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n", 21916479450fSHeyi Guo smp_processor_id(), val); 21926479450fSHeyi Guo gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 21936479450fSHeyi Guo 21946479450fSHeyi Guo /* 21956479450fSHeyi Guo * Also clear Valid bit of GICR_VPENDBASER, in case some 21966479450fSHeyi Guo * ancient programming gets left in and has possibility of 21976479450fSHeyi Guo * corrupting memory. 21986479450fSHeyi Guo */ 21996479450fSHeyi Guo val = its_clear_vpend_valid(vlpi_base); 22006479450fSHeyi Guo WARN_ON(val & GICR_VPENDBASER_Dirty); 22016479450fSHeyi Guo } 22026479450fSHeyi Guo 22031ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 22041ac19ca6SMarc Zyngier dsb(sy); 2205c440a9d9SMarc Zyngier out: 220611e37d35SMarc Zyngier gic_data_rdist()->lpi_enabled = true; 2207c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 220811e37d35SMarc Zyngier smp_processor_id(), 2209c440a9d9SMarc Zyngier gic_data_rdist()->pend_page ? "allocated" : "reserved", 221011e37d35SMarc Zyngier &paddr); 22111ac19ca6SMarc Zyngier } 22121ac19ca6SMarc Zyngier 2213920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 22141ac19ca6SMarc Zyngier { 2215920181ceSDerek Basehore int cpu = smp_processor_id(); 22161ac19ca6SMarc Zyngier u64 target; 22171ac19ca6SMarc Zyngier 2218fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 2219fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 2220fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 2221fbf8f40eSGanapatrao Kulkarni 2222fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 2223fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 2224fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 2225920181ceSDerek Basehore return; 2226fbf8f40eSGanapatrao Kulkarni } 2227fbf8f40eSGanapatrao Kulkarni 22281ac19ca6SMarc Zyngier /* 22291ac19ca6SMarc Zyngier * We now have to bind each collection to its target 22301ac19ca6SMarc Zyngier * redistributor. 22311ac19ca6SMarc Zyngier */ 2232589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 22331ac19ca6SMarc Zyngier /* 22341ac19ca6SMarc Zyngier * This ITS wants the physical address of the 22351ac19ca6SMarc Zyngier * redistributor. 22361ac19ca6SMarc Zyngier */ 22371ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 22381ac19ca6SMarc Zyngier } else { 2239920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 2240589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 2241263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 22421ac19ca6SMarc Zyngier } 22431ac19ca6SMarc Zyngier 22441ac19ca6SMarc Zyngier /* Perform collection mapping */ 22451ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 22461ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 22471ac19ca6SMarc Zyngier 22481ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 22491ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 22501ac19ca6SMarc Zyngier } 22511ac19ca6SMarc Zyngier 2252920181ceSDerek Basehore static void its_cpu_init_collections(void) 2253920181ceSDerek Basehore { 2254920181ceSDerek Basehore struct its_node *its; 2255920181ceSDerek Basehore 2256a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 2257920181ceSDerek Basehore 2258920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 2259920181ceSDerek Basehore its_cpu_init_collection(its); 2260920181ceSDerek Basehore 2261a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 22621ac19ca6SMarc Zyngier } 226384a6a2e7SMarc Zyngier 226484a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 226584a6a2e7SMarc Zyngier { 226684a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 22673e39e8f5SMarc Zyngier unsigned long flags; 226884a6a2e7SMarc Zyngier 22693e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 227084a6a2e7SMarc Zyngier 227184a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 227284a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 227384a6a2e7SMarc Zyngier its_dev = tmp; 227484a6a2e7SMarc Zyngier break; 227584a6a2e7SMarc Zyngier } 227684a6a2e7SMarc Zyngier } 227784a6a2e7SMarc Zyngier 22783e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 227984a6a2e7SMarc Zyngier 228084a6a2e7SMarc Zyngier return its_dev; 228184a6a2e7SMarc Zyngier } 228284a6a2e7SMarc Zyngier 2283466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 2284466b7d16SShanker Donthineni { 2285466b7d16SShanker Donthineni int i; 2286466b7d16SShanker Donthineni 2287466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 2288466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 2289466b7d16SShanker Donthineni return &its->tables[i]; 2290466b7d16SShanker Donthineni } 2291466b7d16SShanker Donthineni 2292466b7d16SShanker Donthineni return NULL; 2293466b7d16SShanker Donthineni } 2294466b7d16SShanker Donthineni 2295539d3782SShanker Donthineni static bool its_alloc_table_entry(struct its_node *its, 2296539d3782SShanker Donthineni struct its_baser *baser, u32 id) 22973faf24eaSShanker Donthineni { 22983faf24eaSShanker Donthineni struct page *page; 22993faf24eaSShanker Donthineni u32 esz, idx; 23003faf24eaSShanker Donthineni __le64 *table; 23013faf24eaSShanker Donthineni 23023faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 23033faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 23043faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 230570cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 23063faf24eaSShanker Donthineni 23073faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 230870cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 23093faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 23103faf24eaSShanker Donthineni return false; 23113faf24eaSShanker Donthineni 23123faf24eaSShanker Donthineni table = baser->base; 23133faf24eaSShanker Donthineni 23143faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 23153faf24eaSShanker Donthineni if (!table[idx]) { 2316539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 2317539d3782SShanker Donthineni get_order(baser->psz)); 23183faf24eaSShanker Donthineni if (!page) 23193faf24eaSShanker Donthineni return false; 23203faf24eaSShanker Donthineni 23213faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 23223faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2323328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 23243faf24eaSShanker Donthineni 23253faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 23263faf24eaSShanker Donthineni 23273faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 23283faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 2329328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 23303faf24eaSShanker Donthineni 23313faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 23323faf24eaSShanker Donthineni dsb(sy); 23333faf24eaSShanker Donthineni } 23343faf24eaSShanker Donthineni 23353faf24eaSShanker Donthineni return true; 23363faf24eaSShanker Donthineni } 23373faf24eaSShanker Donthineni 233870cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 233970cc81edSMarc Zyngier { 234070cc81edSMarc Zyngier struct its_baser *baser; 234170cc81edSMarc Zyngier 234270cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 234370cc81edSMarc Zyngier 234470cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 234570cc81edSMarc Zyngier if (!baser) 234670cc81edSMarc Zyngier return (ilog2(dev_id) < its->device_ids); 234770cc81edSMarc Zyngier 2348539d3782SShanker Donthineni return its_alloc_table_entry(its, baser, dev_id); 234970cc81edSMarc Zyngier } 235070cc81edSMarc Zyngier 23517d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 23527d75bbb4SMarc Zyngier { 23537d75bbb4SMarc Zyngier struct its_node *its; 23547d75bbb4SMarc Zyngier 23557d75bbb4SMarc Zyngier /* 23567d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 23577d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 23587d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 23597d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 23607d75bbb4SMarc Zyngier * anyway, right?). 23617d75bbb4SMarc Zyngier */ 23627d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 23637d75bbb4SMarc Zyngier struct its_baser *baser; 23647d75bbb4SMarc Zyngier 23657d75bbb4SMarc Zyngier if (!its->is_v4) 23667d75bbb4SMarc Zyngier continue; 23677d75bbb4SMarc Zyngier 23687d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 23697d75bbb4SMarc Zyngier if (!baser) 23707d75bbb4SMarc Zyngier return false; 23717d75bbb4SMarc Zyngier 2372539d3782SShanker Donthineni if (!its_alloc_table_entry(its, baser, vpe_id)) 23737d75bbb4SMarc Zyngier return false; 23747d75bbb4SMarc Zyngier } 23757d75bbb4SMarc Zyngier 23767d75bbb4SMarc Zyngier return true; 23777d75bbb4SMarc Zyngier } 23787d75bbb4SMarc Zyngier 237984a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 238093f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 238184a6a2e7SMarc Zyngier { 238284a6a2e7SMarc Zyngier struct its_device *dev; 238393f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 23843e39e8f5SMarc Zyngier unsigned long flags; 2385591e5becSMarc Zyngier u16 *col_map = NULL; 238684a6a2e7SMarc Zyngier void *itt; 238784a6a2e7SMarc Zyngier int lpi_base; 238884a6a2e7SMarc Zyngier int nr_lpis; 2389c8481267SMarc Zyngier int nr_ites; 239084a6a2e7SMarc Zyngier int sz; 239184a6a2e7SMarc Zyngier 23923faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 2393466b7d16SShanker Donthineni return NULL; 2394466b7d16SShanker Donthineni 2395147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 2396147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 2397147c8f37SMarc Zyngier 239884a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 2399c8481267SMarc Zyngier /* 2400147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 2401147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 2402c8481267SMarc Zyngier */ 2403147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 2404c8481267SMarc Zyngier sz = nr_ites * its->ite_size; 240584a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 2406539d3782SShanker Donthineni itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); 240793f94ea0SMarc Zyngier if (alloc_lpis) { 240838dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 2409591e5becSMarc Zyngier if (lpi_map) 24106396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 241193f94ea0SMarc Zyngier GFP_KERNEL); 241293f94ea0SMarc Zyngier } else { 24136396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 241493f94ea0SMarc Zyngier nr_lpis = 0; 241593f94ea0SMarc Zyngier lpi_base = 0; 241693f94ea0SMarc Zyngier } 241784a6a2e7SMarc Zyngier 241893f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 241984a6a2e7SMarc Zyngier kfree(dev); 242084a6a2e7SMarc Zyngier kfree(itt); 242184a6a2e7SMarc Zyngier kfree(lpi_map); 2422591e5becSMarc Zyngier kfree(col_map); 242384a6a2e7SMarc Zyngier return NULL; 242484a6a2e7SMarc Zyngier } 242584a6a2e7SMarc Zyngier 2426328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 24275a9a8915SMarc Zyngier 242884a6a2e7SMarc Zyngier dev->its = its; 242984a6a2e7SMarc Zyngier dev->itt = itt; 2430c8481267SMarc Zyngier dev->nr_ites = nr_ites; 2431591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 2432591e5becSMarc Zyngier dev->event_map.col_map = col_map; 2433591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 2434591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 2435d011e4e6SMarc Zyngier mutex_init(&dev->event_map.vlpi_lock); 243684a6a2e7SMarc Zyngier dev->device_id = dev_id; 243784a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 243884a6a2e7SMarc Zyngier 24393e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 244084a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 24413e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 244284a6a2e7SMarc Zyngier 244384a6a2e7SMarc Zyngier /* Map device to its ITT */ 244484a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 244584a6a2e7SMarc Zyngier 244684a6a2e7SMarc Zyngier return dev; 244784a6a2e7SMarc Zyngier } 244884a6a2e7SMarc Zyngier 244984a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 245084a6a2e7SMarc Zyngier { 24513e39e8f5SMarc Zyngier unsigned long flags; 24523e39e8f5SMarc Zyngier 24533e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 245484a6a2e7SMarc Zyngier list_del(&its_dev->entry); 24553e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 245684a6a2e7SMarc Zyngier kfree(its_dev->itt); 245784a6a2e7SMarc Zyngier kfree(its_dev); 245884a6a2e7SMarc Zyngier } 2459b48ac83dSMarc Zyngier 24608208d170SMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) 2461b48ac83dSMarc Zyngier { 2462b48ac83dSMarc Zyngier int idx; 2463b48ac83dSMarc Zyngier 24648208d170SMarc Zyngier idx = bitmap_find_free_region(dev->event_map.lpi_map, 24658208d170SMarc Zyngier dev->event_map.nr_lpis, 24668208d170SMarc Zyngier get_count_order(nvecs)); 24678208d170SMarc Zyngier if (idx < 0) 2468b48ac83dSMarc Zyngier return -ENOSPC; 2469b48ac83dSMarc Zyngier 2470591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 2471591e5becSMarc Zyngier set_bit(idx, dev->event_map.lpi_map); 2472b48ac83dSMarc Zyngier 2473b48ac83dSMarc Zyngier return 0; 2474b48ac83dSMarc Zyngier } 2475b48ac83dSMarc Zyngier 247654456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 2477b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 2478b48ac83dSMarc Zyngier { 2479b48ac83dSMarc Zyngier struct its_node *its; 2480b48ac83dSMarc Zyngier struct its_device *its_dev; 248154456db9SMarc Zyngier struct msi_domain_info *msi_info; 248254456db9SMarc Zyngier u32 dev_id; 24839791ec7dSMarc Zyngier int err = 0; 2484b48ac83dSMarc Zyngier 248554456db9SMarc Zyngier /* 2486a7c90f51SJulien Grall * We ignore "dev" entirely, and rely on the dev_id that has 248754456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 248854456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 248954456db9SMarc Zyngier * are built on top of the ITS. 249054456db9SMarc Zyngier */ 249154456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 249254456db9SMarc Zyngier 249354456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 249454456db9SMarc Zyngier its = msi_info->data; 249554456db9SMarc Zyngier 249620b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 249720b3d54eSMarc Zyngier vpe_proxy.dev && 249820b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 249920b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 250020b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 250120b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 250220b3d54eSMarc Zyngier dev_id); 250320b3d54eSMarc Zyngier return -EINVAL; 250420b3d54eSMarc Zyngier } 250520b3d54eSMarc Zyngier 25069791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 2507f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 2508e8137f4fSMarc Zyngier if (its_dev) { 2509e8137f4fSMarc Zyngier /* 2510e8137f4fSMarc Zyngier * We already have seen this ID, probably through 2511e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 2512e8137f4fSMarc Zyngier * create the device. 2513e8137f4fSMarc Zyngier */ 25149791ec7dSMarc Zyngier its_dev->shared = true; 2515f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 2516e8137f4fSMarc Zyngier goto out; 2517e8137f4fSMarc Zyngier } 2518b48ac83dSMarc Zyngier 251993f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 25209791ec7dSMarc Zyngier if (!its_dev) { 25219791ec7dSMarc Zyngier err = -ENOMEM; 25229791ec7dSMarc Zyngier goto out; 25239791ec7dSMarc Zyngier } 2524b48ac83dSMarc Zyngier 2525f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 2526e8137f4fSMarc Zyngier out: 25279791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 2528b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 25299791ec7dSMarc Zyngier return err; 2530b48ac83dSMarc Zyngier } 2531b48ac83dSMarc Zyngier 253254456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 253354456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 253454456db9SMarc Zyngier }; 253554456db9SMarc Zyngier 2536b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 2537b48ac83dSMarc Zyngier unsigned int virq, 2538b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 2539b48ac83dSMarc Zyngier { 2540f833f57fSMarc Zyngier struct irq_fwspec fwspec; 2541b48ac83dSMarc Zyngier 2542f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 2543f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 2544f833f57fSMarc Zyngier fwspec.param_count = 3; 2545f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 2546f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 2547f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 25483f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 25493f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 25503f010cf1STomasz Nowicki fwspec.param_count = 2; 25513f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 25523f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 2553f833f57fSMarc Zyngier } else { 2554f833f57fSMarc Zyngier return -EINVAL; 2555f833f57fSMarc Zyngier } 2556b48ac83dSMarc Zyngier 2557f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 2558b48ac83dSMarc Zyngier } 2559b48ac83dSMarc Zyngier 2560b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 2561b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 2562b48ac83dSMarc Zyngier { 2563b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 2564b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 2565b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 2566b48ac83dSMarc Zyngier int err; 2567b48ac83dSMarc Zyngier int i; 2568b48ac83dSMarc Zyngier 25698208d170SMarc Zyngier err = its_alloc_device_irq(its_dev, nr_irqs, &hwirq); 2570b48ac83dSMarc Zyngier if (err) 2571b48ac83dSMarc Zyngier return err; 2572b48ac83dSMarc Zyngier 25738208d170SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 25748208d170SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); 2575b48ac83dSMarc Zyngier if (err) 2576b48ac83dSMarc Zyngier return err; 2577b48ac83dSMarc Zyngier 2578b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 25798208d170SMarc Zyngier hwirq + i, &its_irq_chip, its_dev); 25800d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 2581f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 25828208d170SMarc Zyngier (int)(hwirq + i - its_dev->event_map.lpi_base), 25838208d170SMarc Zyngier (int)(hwirq + i), virq + i); 2584b48ac83dSMarc Zyngier } 2585b48ac83dSMarc Zyngier 2586b48ac83dSMarc Zyngier return 0; 2587b48ac83dSMarc Zyngier } 2588b48ac83dSMarc Zyngier 258972491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 2590702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 2591aca268dfSMarc Zyngier { 2592aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2593aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2594fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 25950d224d35SMarc Zyngier int cpu; 2596fbf8f40eSGanapatrao Kulkarni 2597fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 2598fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 2599fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 2600aca268dfSMarc Zyngier 2601591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 2602c1797b11SYang Yingliang cpu = cpumask_first_and(cpu_mask, cpu_online_mask); 2603c1797b11SYang Yingliang if (cpu >= nr_cpu_ids) { 2604c1797b11SYang Yingliang if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) 2605c1797b11SYang Yingliang return -EINVAL; 2606c1797b11SYang Yingliang 2607c1797b11SYang Yingliang cpu = cpumask_first(cpu_online_mask); 2608c1797b11SYang Yingliang } 2609c1797b11SYang Yingliang 26100d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 26110d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 2612591e5becSMarc Zyngier 2613aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 26146a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 261572491643SThomas Gleixner return 0; 2616aca268dfSMarc Zyngier } 2617aca268dfSMarc Zyngier 2618aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 2619aca268dfSMarc Zyngier struct irq_data *d) 2620aca268dfSMarc Zyngier { 2621aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 2622aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 2623aca268dfSMarc Zyngier 2624aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 2625aca268dfSMarc Zyngier its_send_discard(its_dev, event); 2626aca268dfSMarc Zyngier } 2627aca268dfSMarc Zyngier 2628b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 2629b48ac83dSMarc Zyngier unsigned int nr_irqs) 2630b48ac83dSMarc Zyngier { 2631b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 2632b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 26339791ec7dSMarc Zyngier struct its_node *its = its_dev->its; 2634b48ac83dSMarc Zyngier int i; 2635b48ac83dSMarc Zyngier 2636b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 2637b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 2638b48ac83dSMarc Zyngier virq + i); 2639aca268dfSMarc Zyngier u32 event = its_get_event_id(data); 2640b48ac83dSMarc Zyngier 2641b48ac83dSMarc Zyngier /* Mark interrupt index as unused */ 2642591e5becSMarc Zyngier clear_bit(event, its_dev->event_map.lpi_map); 2643b48ac83dSMarc Zyngier 2644b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 26452da39949SMarc Zyngier irq_domain_reset_irq_data(data); 2646b48ac83dSMarc Zyngier } 2647b48ac83dSMarc Zyngier 26489791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 26499791ec7dSMarc Zyngier 26509791ec7dSMarc Zyngier /* 26519791ec7dSMarc Zyngier * If all interrupts have been freed, start mopping the 26529791ec7dSMarc Zyngier * floor. This is conditionned on the device not being shared. 26539791ec7dSMarc Zyngier */ 26549791ec7dSMarc Zyngier if (!its_dev->shared && 26559791ec7dSMarc Zyngier bitmap_empty(its_dev->event_map.lpi_map, 2656591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 265738dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 2658cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 2659cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 2660cf2be8baSMarc Zyngier kfree(its_dev->event_map.col_map); 2661b48ac83dSMarc Zyngier 2662b48ac83dSMarc Zyngier /* Unmap device/itt */ 2663b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 2664b48ac83dSMarc Zyngier its_free_device(its_dev); 2665b48ac83dSMarc Zyngier } 2666b48ac83dSMarc Zyngier 26679791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 26689791ec7dSMarc Zyngier 2669b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 2670b48ac83dSMarc Zyngier } 2671b48ac83dSMarc Zyngier 2672b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 2673b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 2674b48ac83dSMarc Zyngier .free = its_irq_domain_free, 2675aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 2676aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 2677b48ac83dSMarc Zyngier }; 26784c21f3c2SMarc Zyngier 267920b3d54eSMarc Zyngier /* 268020b3d54eSMarc Zyngier * This is insane. 268120b3d54eSMarc Zyngier * 268220b3d54eSMarc Zyngier * If a GICv4 doesn't implement Direct LPIs (which is extremely 268320b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 268420b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 268520b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 268620b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 268720b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 268820b3d54eSMarc Zyngier * 268920b3d54eSMarc Zyngier * Broken by design(tm). 269020b3d54eSMarc Zyngier */ 269120b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 269220b3d54eSMarc Zyngier { 269320b3d54eSMarc Zyngier /* Already unmapped? */ 269420b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 269520b3d54eSMarc Zyngier return; 269620b3d54eSMarc Zyngier 269720b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 269820b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 269920b3d54eSMarc Zyngier 270020b3d54eSMarc Zyngier /* 270120b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 270220b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 270320b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 270420b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 270520b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 270620b3d54eSMarc Zyngier */ 270720b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 270820b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 270920b3d54eSMarc Zyngier 271020b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 271120b3d54eSMarc Zyngier } 271220b3d54eSMarc Zyngier 271320b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 271420b3d54eSMarc Zyngier { 271520b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 271620b3d54eSMarc Zyngier unsigned long flags; 271720b3d54eSMarc Zyngier 271820b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 271920b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 272020b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 272120b3d54eSMarc Zyngier } 272220b3d54eSMarc Zyngier } 272320b3d54eSMarc Zyngier 272420b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 272520b3d54eSMarc Zyngier { 272620b3d54eSMarc Zyngier /* Already mapped? */ 272720b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 272820b3d54eSMarc Zyngier return; 272920b3d54eSMarc Zyngier 273020b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 273120b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 273220b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 273320b3d54eSMarc Zyngier 273420b3d54eSMarc Zyngier /* Map the new VPE instead */ 273520b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 273620b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 273720b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 273820b3d54eSMarc Zyngier 273920b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 274020b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 274120b3d54eSMarc Zyngier } 274220b3d54eSMarc Zyngier 2743958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 2744958b90d1SMarc Zyngier { 2745958b90d1SMarc Zyngier unsigned long flags; 2746958b90d1SMarc Zyngier struct its_collection *target_col; 2747958b90d1SMarc Zyngier 2748958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2749958b90d1SMarc Zyngier void __iomem *rdbase; 2750958b90d1SMarc Zyngier 2751958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 2752958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2753958b90d1SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2754958b90d1SMarc Zyngier cpu_relax(); 2755958b90d1SMarc Zyngier 2756958b90d1SMarc Zyngier return; 2757958b90d1SMarc Zyngier } 2758958b90d1SMarc Zyngier 2759958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 2760958b90d1SMarc Zyngier 2761958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 2762958b90d1SMarc Zyngier 2763958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 2764958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 2765958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 2766958b90d1SMarc Zyngier 2767958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 2768958b90d1SMarc Zyngier } 2769958b90d1SMarc Zyngier 27703171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 27713171a47aSMarc Zyngier const struct cpumask *mask_val, 27723171a47aSMarc Zyngier bool force) 27733171a47aSMarc Zyngier { 27743171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 27753171a47aSMarc Zyngier int cpu = cpumask_first(mask_val); 27763171a47aSMarc Zyngier 27773171a47aSMarc Zyngier /* 27783171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 277920b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 2780958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 2781958b90d1SMarc Zyngier * interrupt to its new location. 27823171a47aSMarc Zyngier */ 27833171a47aSMarc Zyngier if (vpe->col_idx != cpu) { 2784958b90d1SMarc Zyngier int from = vpe->col_idx; 2785958b90d1SMarc Zyngier 27863171a47aSMarc Zyngier vpe->col_idx = cpu; 27873171a47aSMarc Zyngier its_send_vmovp(vpe); 2788958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 27893171a47aSMarc Zyngier } 27903171a47aSMarc Zyngier 279144c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 279244c4c25eSMarc Zyngier 27933171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 27943171a47aSMarc Zyngier } 27953171a47aSMarc Zyngier 2796e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 2797e643d803SMarc Zyngier { 279850c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2799e643d803SMarc Zyngier u64 val; 2800e643d803SMarc Zyngier 2801e643d803SMarc Zyngier /* Schedule the VPE */ 2802e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 2803e643d803SMarc Zyngier GENMASK_ULL(51, 12); 2804e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 2805e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 2806e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 2807e643d803SMarc Zyngier gits_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 2808e643d803SMarc Zyngier 2809e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 2810e643d803SMarc Zyngier GENMASK_ULL(51, 16); 2811e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 2812e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 2813e643d803SMarc Zyngier /* 2814e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 2815e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 2816e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 2817e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 2818e643d803SMarc Zyngier * that the pending table is empty. A good implementation 2819e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 2820e643d803SMarc Zyngier * making this a tolerable issue. 2821e643d803SMarc Zyngier */ 2822e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2823e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 2824e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 2825e643d803SMarc Zyngier gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 2826e643d803SMarc Zyngier } 2827e643d803SMarc Zyngier 2828e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 2829e643d803SMarc Zyngier { 283050c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 2831e643d803SMarc Zyngier u64 val; 2832e643d803SMarc Zyngier 28336479450fSHeyi Guo val = its_clear_vpend_valid(vlpi_base); 2834e643d803SMarc Zyngier 28356479450fSHeyi Guo if (unlikely(val & GICR_VPENDBASER_Dirty)) { 2836e643d803SMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2837e643d803SMarc Zyngier vpe->idai = false; 2838e643d803SMarc Zyngier vpe->pending_last = true; 2839e643d803SMarc Zyngier } else { 2840e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 2841e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 2842e643d803SMarc Zyngier } 2843e643d803SMarc Zyngier } 2844e643d803SMarc Zyngier 284540619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 284640619a2eSMarc Zyngier { 284740619a2eSMarc Zyngier struct its_node *its; 284840619a2eSMarc Zyngier 284940619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 285040619a2eSMarc Zyngier if (!its->is_v4) 285140619a2eSMarc Zyngier continue; 285240619a2eSMarc Zyngier 28532247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 28542247e1bfSMarc Zyngier continue; 28552247e1bfSMarc Zyngier 28563c1cceebSMarc Zyngier /* 28573c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 28583c1cceebSMarc Zyngier * we need is to reach the redistributors. 28593c1cceebSMarc Zyngier */ 286040619a2eSMarc Zyngier its_send_vinvall(its, vpe); 28613c1cceebSMarc Zyngier return; 286240619a2eSMarc Zyngier } 286340619a2eSMarc Zyngier } 286440619a2eSMarc Zyngier 2865e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 2866e643d803SMarc Zyngier { 2867e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2868e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 2869e643d803SMarc Zyngier 2870e643d803SMarc Zyngier switch (info->cmd_type) { 2871e643d803SMarc Zyngier case SCHEDULE_VPE: 2872e643d803SMarc Zyngier its_vpe_schedule(vpe); 2873e643d803SMarc Zyngier return 0; 2874e643d803SMarc Zyngier 2875e643d803SMarc Zyngier case DESCHEDULE_VPE: 2876e643d803SMarc Zyngier its_vpe_deschedule(vpe); 2877e643d803SMarc Zyngier return 0; 2878e643d803SMarc Zyngier 28795e2f7642SMarc Zyngier case INVALL_VPE: 288040619a2eSMarc Zyngier its_vpe_invall(vpe); 28815e2f7642SMarc Zyngier return 0; 28825e2f7642SMarc Zyngier 2883e643d803SMarc Zyngier default: 2884e643d803SMarc Zyngier return -EINVAL; 2885e643d803SMarc Zyngier } 2886e643d803SMarc Zyngier } 2887e643d803SMarc Zyngier 288820b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 288920b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 289020b3d54eSMarc Zyngier { 289120b3d54eSMarc Zyngier unsigned long flags; 289220b3d54eSMarc Zyngier 289320b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 289420b3d54eSMarc Zyngier 289520b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 289620b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 289720b3d54eSMarc Zyngier 289820b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 289920b3d54eSMarc Zyngier } 290020b3d54eSMarc Zyngier 2901f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 2902f6a91da7SMarc Zyngier { 2903f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 290420b3d54eSMarc Zyngier 290520b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 2906f6a91da7SMarc Zyngier void __iomem *rdbase; 2907f6a91da7SMarc Zyngier 2908f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2909f6a91da7SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_INVLPIR); 2910f6a91da7SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2911f6a91da7SMarc Zyngier cpu_relax(); 291220b3d54eSMarc Zyngier } else { 291320b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 291420b3d54eSMarc Zyngier } 2915f6a91da7SMarc Zyngier } 2916f6a91da7SMarc Zyngier 2917f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 2918f6a91da7SMarc Zyngier { 2919f6a91da7SMarc Zyngier /* 2920f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 2921f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 2922f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 2923f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 2924f6a91da7SMarc Zyngier */ 2925f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 2926f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2927f6a91da7SMarc Zyngier } 2928f6a91da7SMarc Zyngier 2929f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 2930f6a91da7SMarc Zyngier { 2931f6a91da7SMarc Zyngier /* Same hack as above... */ 2932f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 2933f6a91da7SMarc Zyngier its_vpe_send_inv(d); 2934f6a91da7SMarc Zyngier } 2935f6a91da7SMarc Zyngier 2936e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 2937e57a3e28SMarc Zyngier enum irqchip_irq_state which, 2938e57a3e28SMarc Zyngier bool state) 2939e57a3e28SMarc Zyngier { 2940e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 2941e57a3e28SMarc Zyngier 2942e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 2943e57a3e28SMarc Zyngier return -EINVAL; 2944e57a3e28SMarc Zyngier 2945e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 2946e57a3e28SMarc Zyngier void __iomem *rdbase; 2947e57a3e28SMarc Zyngier 2948e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 2949e57a3e28SMarc Zyngier if (state) { 2950e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 2951e57a3e28SMarc Zyngier } else { 2952e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 2953e57a3e28SMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 2954e57a3e28SMarc Zyngier cpu_relax(); 2955e57a3e28SMarc Zyngier } 2956e57a3e28SMarc Zyngier } else { 2957e57a3e28SMarc Zyngier if (state) 2958e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 2959e57a3e28SMarc Zyngier else 2960e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 2961e57a3e28SMarc Zyngier } 2962e57a3e28SMarc Zyngier 2963e57a3e28SMarc Zyngier return 0; 2964e57a3e28SMarc Zyngier } 2965e57a3e28SMarc Zyngier 29668fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 29678fff27aeSMarc Zyngier .name = "GICv4-vpe", 2968f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 2969f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 2970f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 29713171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 2972e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 2973e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 29748fff27aeSMarc Zyngier }; 29758fff27aeSMarc Zyngier 29767d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 29777d75bbb4SMarc Zyngier { 297832bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 29797d75bbb4SMarc Zyngier } 29807d75bbb4SMarc Zyngier 29817d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 29827d75bbb4SMarc Zyngier { 29837d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 29847d75bbb4SMarc Zyngier } 29857d75bbb4SMarc Zyngier 29867d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 29877d75bbb4SMarc Zyngier { 29887d75bbb4SMarc Zyngier struct page *vpt_page; 29897d75bbb4SMarc Zyngier int vpe_id; 29907d75bbb4SMarc Zyngier 29917d75bbb4SMarc Zyngier /* Allocate vpe_id */ 29927d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 29937d75bbb4SMarc Zyngier if (vpe_id < 0) 29947d75bbb4SMarc Zyngier return vpe_id; 29957d75bbb4SMarc Zyngier 29967d75bbb4SMarc Zyngier /* Allocate VPT */ 29977d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 29987d75bbb4SMarc Zyngier if (!vpt_page) { 29997d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 30007d75bbb4SMarc Zyngier return -ENOMEM; 30017d75bbb4SMarc Zyngier } 30027d75bbb4SMarc Zyngier 30037d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 30047d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 30057d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 30067d75bbb4SMarc Zyngier return -ENOMEM; 30077d75bbb4SMarc Zyngier } 30087d75bbb4SMarc Zyngier 30097d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 30107d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 301120b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 30127d75bbb4SMarc Zyngier 30137d75bbb4SMarc Zyngier return 0; 30147d75bbb4SMarc Zyngier } 30157d75bbb4SMarc Zyngier 30167d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 30177d75bbb4SMarc Zyngier { 301820b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 30197d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 30207d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 30217d75bbb4SMarc Zyngier } 30227d75bbb4SMarc Zyngier 30237d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 30247d75bbb4SMarc Zyngier unsigned int virq, 30257d75bbb4SMarc Zyngier unsigned int nr_irqs) 30267d75bbb4SMarc Zyngier { 30277d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 30287d75bbb4SMarc Zyngier int i; 30297d75bbb4SMarc Zyngier 30307d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 30317d75bbb4SMarc Zyngier 30327d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 30337d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 30347d75bbb4SMarc Zyngier virq + i); 30357d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 30367d75bbb4SMarc Zyngier 30377d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 30387d75bbb4SMarc Zyngier 30397d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 30407d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 30417d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 30427d75bbb4SMarc Zyngier } 30437d75bbb4SMarc Zyngier 30447d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 304538dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 30467d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 30477d75bbb4SMarc Zyngier } 30487d75bbb4SMarc Zyngier } 30497d75bbb4SMarc Zyngier 30507d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 30517d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 30527d75bbb4SMarc Zyngier { 30537d75bbb4SMarc Zyngier struct its_vm *vm = args; 30547d75bbb4SMarc Zyngier unsigned long *bitmap; 30557d75bbb4SMarc Zyngier struct page *vprop_page; 30567d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 30577d75bbb4SMarc Zyngier 30587d75bbb4SMarc Zyngier BUG_ON(!vm); 30597d75bbb4SMarc Zyngier 306038dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 30617d75bbb4SMarc Zyngier if (!bitmap) 30627d75bbb4SMarc Zyngier return -ENOMEM; 30637d75bbb4SMarc Zyngier 30647d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 306538dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 30667d75bbb4SMarc Zyngier return -ENOMEM; 30677d75bbb4SMarc Zyngier } 30687d75bbb4SMarc Zyngier 30697d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 30707d75bbb4SMarc Zyngier if (!vprop_page) { 307138dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 30727d75bbb4SMarc Zyngier return -ENOMEM; 30737d75bbb4SMarc Zyngier } 30747d75bbb4SMarc Zyngier 30757d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 30767d75bbb4SMarc Zyngier vm->db_lpi_base = base; 30777d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 30787d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 30797d75bbb4SMarc Zyngier 30807d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 30817d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 30827d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 30837d75bbb4SMarc Zyngier if (err) 30847d75bbb4SMarc Zyngier break; 30857d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 30867d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 30877d75bbb4SMarc Zyngier if (err) 30887d75bbb4SMarc Zyngier break; 30897d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 30907d75bbb4SMarc Zyngier &its_vpe_irq_chip, vm->vpes[i]); 30917d75bbb4SMarc Zyngier set_bit(i, bitmap); 30927d75bbb4SMarc Zyngier } 30937d75bbb4SMarc Zyngier 30947d75bbb4SMarc Zyngier if (err) { 30957d75bbb4SMarc Zyngier if (i > 0) 30967d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 30977d75bbb4SMarc Zyngier 309838dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 30997d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 31007d75bbb4SMarc Zyngier } 31017d75bbb4SMarc Zyngier 31027d75bbb4SMarc Zyngier return err; 31037d75bbb4SMarc Zyngier } 31047d75bbb4SMarc Zyngier 310572491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 3106702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3107eb78192bSMarc Zyngier { 3108eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 310940619a2eSMarc Zyngier struct its_node *its; 3110eb78192bSMarc Zyngier 31112247e1bfSMarc Zyngier /* If we use the list map, we issue VMAPP on demand... */ 31122247e1bfSMarc Zyngier if (its_list_map) 31136ef930f2SMarc Zyngier return 0; 3114eb78192bSMarc Zyngier 3115eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 3116eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 311740619a2eSMarc Zyngier 311840619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 311940619a2eSMarc Zyngier if (!its->is_v4) 312040619a2eSMarc Zyngier continue; 312140619a2eSMarc Zyngier 312275fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 312340619a2eSMarc Zyngier its_send_vinvall(its, vpe); 312440619a2eSMarc Zyngier } 312540619a2eSMarc Zyngier 312644c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 312744c4c25eSMarc Zyngier 312872491643SThomas Gleixner return 0; 3129eb78192bSMarc Zyngier } 3130eb78192bSMarc Zyngier 3131eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 3132eb78192bSMarc Zyngier struct irq_data *d) 3133eb78192bSMarc Zyngier { 3134eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 313575fd951bSMarc Zyngier struct its_node *its; 3136eb78192bSMarc Zyngier 31372247e1bfSMarc Zyngier /* 31382247e1bfSMarc Zyngier * If we use the list map, we unmap the VPE once no VLPIs are 31392247e1bfSMarc Zyngier * associated with the VM. 31402247e1bfSMarc Zyngier */ 31412247e1bfSMarc Zyngier if (its_list_map) 31422247e1bfSMarc Zyngier return; 31432247e1bfSMarc Zyngier 314475fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 314575fd951bSMarc Zyngier if (!its->is_v4) 314675fd951bSMarc Zyngier continue; 314775fd951bSMarc Zyngier 314875fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 314975fd951bSMarc Zyngier } 3150eb78192bSMarc Zyngier } 3151eb78192bSMarc Zyngier 31528fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 31537d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 31547d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 3155eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 3156eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 31578fff27aeSMarc Zyngier }; 31588fff27aeSMarc Zyngier 31594559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 31604559fbb3SYun Wu { 31614559fbb3SYun Wu u32 count = 1000000; /* 1s */ 31624559fbb3SYun Wu u32 val; 31634559fbb3SYun Wu 31644559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 31657611da86SDavid Daney /* 31667611da86SDavid Daney * GIC architecture specification requires the ITS to be both 31677611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 31687611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 31697611da86SDavid Daney */ 31707611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 31714559fbb3SYun Wu return 0; 31724559fbb3SYun Wu 31734559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 3174d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 31754559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 31764559fbb3SYun Wu 31774559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 31784559fbb3SYun Wu while (1) { 31794559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 31804559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 31814559fbb3SYun Wu return 0; 31824559fbb3SYun Wu 31834559fbb3SYun Wu count--; 31844559fbb3SYun Wu if (!count) 31854559fbb3SYun Wu return -EBUSY; 31864559fbb3SYun Wu 31874559fbb3SYun Wu cpu_relax(); 31884559fbb3SYun Wu udelay(1); 31894559fbb3SYun Wu } 31904559fbb3SYun Wu } 31914559fbb3SYun Wu 31929d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 319394100970SRobert Richter { 319494100970SRobert Richter struct its_node *its = data; 319594100970SRobert Richter 3196fa150019SArd Biesheuvel /* erratum 22375: only alloc 8MB table size */ 3197fa150019SArd Biesheuvel its->device_ids = 0x14; /* 20 bits, 8MB */ 319894100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 31999d111d49SArd Biesheuvel 32009d111d49SArd Biesheuvel return true; 320194100970SRobert Richter } 320294100970SRobert Richter 32039d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 3204fbf8f40eSGanapatrao Kulkarni { 3205fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 3206fbf8f40eSGanapatrao Kulkarni 3207fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 32089d111d49SArd Biesheuvel 32099d111d49SArd Biesheuvel return true; 3210fbf8f40eSGanapatrao Kulkarni } 3211fbf8f40eSGanapatrao Kulkarni 32129d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 321390922a2dSShanker Donthineni { 321490922a2dSShanker Donthineni struct its_node *its = data; 321590922a2dSShanker Donthineni 321690922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 321790922a2dSShanker Donthineni its->ite_size = 16; 32189d111d49SArd Biesheuvel 32199d111d49SArd Biesheuvel return true; 322090922a2dSShanker Donthineni } 322190922a2dSShanker Donthineni 3222558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 3223558b0165SArd Biesheuvel { 3224558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 3225558b0165SArd Biesheuvel 3226558b0165SArd Biesheuvel /* 3227558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 3228558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 3229558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 3230558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 3231558b0165SArd Biesheuvel * the window offset. 3232558b0165SArd Biesheuvel */ 3233558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 3234558b0165SArd Biesheuvel } 3235558b0165SArd Biesheuvel 3236558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 3237558b0165SArd Biesheuvel { 3238558b0165SArd Biesheuvel struct its_node *its = data; 3239558b0165SArd Biesheuvel u32 pre_its_window[2]; 3240558b0165SArd Biesheuvel u32 ids; 3241558b0165SArd Biesheuvel 3242558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 3243558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 3244558b0165SArd Biesheuvel pre_its_window, 3245558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 3246558b0165SArd Biesheuvel 3247558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 3248558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 3249558b0165SArd Biesheuvel 3250558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 3251558b0165SArd Biesheuvel if (its->device_ids > ids) 3252558b0165SArd Biesheuvel its->device_ids = ids; 3253558b0165SArd Biesheuvel 3254558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 3255558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 3256558b0165SArd Biesheuvel return true; 3257558b0165SArd Biesheuvel } 3258558b0165SArd Biesheuvel return false; 3259558b0165SArd Biesheuvel } 3260558b0165SArd Biesheuvel 32615c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 32625c9a882eSMarc Zyngier { 32635c9a882eSMarc Zyngier struct its_node *its = data; 32645c9a882eSMarc Zyngier 32655c9a882eSMarc Zyngier /* 32665c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 32675c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 32685c9a882eSMarc Zyngier */ 32695c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 32705c9a882eSMarc Zyngier return true; 3271cc2d3216SMarc Zyngier } 32724c21f3c2SMarc Zyngier 327367510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 327494100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 327594100970SRobert Richter { 327694100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 327794100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 327894100970SRobert Richter .mask = 0xffff0fff, 327994100970SRobert Richter .init = its_enable_quirk_cavium_22375, 328094100970SRobert Richter }, 328194100970SRobert Richter #endif 3282fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 3283fbf8f40eSGanapatrao Kulkarni { 3284fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 3285fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 3286fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 3287fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 3288fbf8f40eSGanapatrao Kulkarni }, 3289fbf8f40eSGanapatrao Kulkarni #endif 329090922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 329190922a2dSShanker Donthineni { 329290922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 329390922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 329490922a2dSShanker Donthineni .mask = 0xffffffff, 329590922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 329690922a2dSShanker Donthineni }, 329790922a2dSShanker Donthineni #endif 3298558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 3299558b0165SArd Biesheuvel { 3300558b0165SArd Biesheuvel /* 3301558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 3302558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 3303558b0165SArd Biesheuvel * special handling in software. 3304558b0165SArd Biesheuvel */ 3305558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 3306558b0165SArd Biesheuvel .iidr = 0x0001143b, 3307558b0165SArd Biesheuvel .mask = 0xffffffff, 3308558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 3309558b0165SArd Biesheuvel }, 3310558b0165SArd Biesheuvel #endif 33115c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 33125c9a882eSMarc Zyngier { 33135c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 33145c9a882eSMarc Zyngier .iidr = 0x00000004, 33155c9a882eSMarc Zyngier .mask = 0xffffffff, 33165c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 33175c9a882eSMarc Zyngier }, 33185c9a882eSMarc Zyngier #endif 331967510ccaSRobert Richter { 332067510ccaSRobert Richter } 332167510ccaSRobert Richter }; 332267510ccaSRobert Richter 332367510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 332467510ccaSRobert Richter { 332567510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 332667510ccaSRobert Richter 332767510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 332867510ccaSRobert Richter } 332967510ccaSRobert Richter 3330dba0bc7bSDerek Basehore static int its_save_disable(void) 3331dba0bc7bSDerek Basehore { 3332dba0bc7bSDerek Basehore struct its_node *its; 3333dba0bc7bSDerek Basehore int err = 0; 3334dba0bc7bSDerek Basehore 3335a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3336dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3337dba0bc7bSDerek Basehore void __iomem *base; 3338dba0bc7bSDerek Basehore 3339dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3340dba0bc7bSDerek Basehore continue; 3341dba0bc7bSDerek Basehore 3342dba0bc7bSDerek Basehore base = its->base; 3343dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 3344dba0bc7bSDerek Basehore err = its_force_quiescent(base); 3345dba0bc7bSDerek Basehore if (err) { 3346dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 3347dba0bc7bSDerek Basehore &its->phys_base, err); 3348dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3349dba0bc7bSDerek Basehore goto err; 3350dba0bc7bSDerek Basehore } 3351dba0bc7bSDerek Basehore 3352dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 3353dba0bc7bSDerek Basehore } 3354dba0bc7bSDerek Basehore 3355dba0bc7bSDerek Basehore err: 3356dba0bc7bSDerek Basehore if (err) { 3357dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 3358dba0bc7bSDerek Basehore void __iomem *base; 3359dba0bc7bSDerek Basehore 3360dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3361dba0bc7bSDerek Basehore continue; 3362dba0bc7bSDerek Basehore 3363dba0bc7bSDerek Basehore base = its->base; 3364dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3365dba0bc7bSDerek Basehore } 3366dba0bc7bSDerek Basehore } 3367a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3368dba0bc7bSDerek Basehore 3369dba0bc7bSDerek Basehore return err; 3370dba0bc7bSDerek Basehore } 3371dba0bc7bSDerek Basehore 3372dba0bc7bSDerek Basehore static void its_restore_enable(void) 3373dba0bc7bSDerek Basehore { 3374dba0bc7bSDerek Basehore struct its_node *its; 3375dba0bc7bSDerek Basehore int ret; 3376dba0bc7bSDerek Basehore 3377a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3378dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 3379dba0bc7bSDerek Basehore void __iomem *base; 3380dba0bc7bSDerek Basehore int i; 3381dba0bc7bSDerek Basehore 3382dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 3383dba0bc7bSDerek Basehore continue; 3384dba0bc7bSDerek Basehore 3385dba0bc7bSDerek Basehore base = its->base; 3386dba0bc7bSDerek Basehore 3387dba0bc7bSDerek Basehore /* 3388dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 3389dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 3390dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 3391dba0bc7bSDerek Basehore * Specification. 3392dba0bc7bSDerek Basehore */ 3393dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 3394dba0bc7bSDerek Basehore if (ret) { 3395dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 3396dba0bc7bSDerek Basehore &its->phys_base, ret); 3397dba0bc7bSDerek Basehore continue; 3398dba0bc7bSDerek Basehore } 3399dba0bc7bSDerek Basehore 3400dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 3401dba0bc7bSDerek Basehore 3402dba0bc7bSDerek Basehore /* 3403dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 3404dba0bc7bSDerek Basehore * cmd_write line up with it. 3405dba0bc7bSDerek Basehore */ 3406dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 3407dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 3408dba0bc7bSDerek Basehore 3409dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 3410dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3411dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 3412dba0bc7bSDerek Basehore 3413dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 3414dba0bc7bSDerek Basehore continue; 3415dba0bc7bSDerek Basehore 3416dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 3417dba0bc7bSDerek Basehore } 3418dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 3419920181ceSDerek Basehore 3420920181ceSDerek Basehore /* 3421920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 3422920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 3423920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 3424920181ceSDerek Basehore */ 3425920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 3426920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 3427920181ceSDerek Basehore its_cpu_init_collection(its); 3428dba0bc7bSDerek Basehore } 3429a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 3430dba0bc7bSDerek Basehore } 3431dba0bc7bSDerek Basehore 3432dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 3433dba0bc7bSDerek Basehore .suspend = its_save_disable, 3434dba0bc7bSDerek Basehore .resume = its_restore_enable, 3435dba0bc7bSDerek Basehore }; 3436dba0bc7bSDerek Basehore 3437db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 3438d14ae5e6STomasz Nowicki { 3439d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 3440d14ae5e6STomasz Nowicki struct msi_domain_info *info; 3441d14ae5e6STomasz Nowicki 3442d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 3443d14ae5e6STomasz Nowicki if (!info) 3444d14ae5e6STomasz Nowicki return -ENOMEM; 3445d14ae5e6STomasz Nowicki 3446db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 3447d14ae5e6STomasz Nowicki if (!inner_domain) { 3448d14ae5e6STomasz Nowicki kfree(info); 3449d14ae5e6STomasz Nowicki return -ENOMEM; 3450d14ae5e6STomasz Nowicki } 3451d14ae5e6STomasz Nowicki 3452db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 345396f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 3454558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 3455d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 3456d14ae5e6STomasz Nowicki info->data = its; 3457d14ae5e6STomasz Nowicki inner_domain->host_data = info; 3458d14ae5e6STomasz Nowicki 3459d14ae5e6STomasz Nowicki return 0; 3460d14ae5e6STomasz Nowicki } 3461d14ae5e6STomasz Nowicki 34628fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 34638fff27aeSMarc Zyngier { 346420b3d54eSMarc Zyngier struct its_node *its; 346520b3d54eSMarc Zyngier u32 devid; 346620b3d54eSMarc Zyngier int entries; 346720b3d54eSMarc Zyngier 346820b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 346920b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 347020b3d54eSMarc Zyngier return 0; 347120b3d54eSMarc Zyngier } 347220b3d54eSMarc Zyngier 347320b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 347420b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 347520b3d54eSMarc Zyngier 347620b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 34776396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 347820b3d54eSMarc Zyngier GFP_KERNEL); 347920b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 348020b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 348120b3d54eSMarc Zyngier return -ENOMEM; 348220b3d54eSMarc Zyngier } 348320b3d54eSMarc Zyngier 348420b3d54eSMarc Zyngier /* Use the last possible DevID */ 348520b3d54eSMarc Zyngier devid = GENMASK(its->device_ids - 1, 0); 348620b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 348720b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 348820b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 348920b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 349020b3d54eSMarc Zyngier return -ENOMEM; 349120b3d54eSMarc Zyngier } 349220b3d54eSMarc Zyngier 3493c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 349420b3d54eSMarc Zyngier 349520b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 349620b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 349720b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 349820b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 349920b3d54eSMarc Zyngier 35008fff27aeSMarc Zyngier return 0; 35018fff27aeSMarc Zyngier } 35028fff27aeSMarc Zyngier 35033dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 35043dfa576bSMarc Zyngier void __iomem *its_base) 35053dfa576bSMarc Zyngier { 35063dfa576bSMarc Zyngier int its_number; 35073dfa576bSMarc Zyngier u32 ctlr; 35083dfa576bSMarc Zyngier 35093dfa576bSMarc Zyngier /* 35103dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 35113dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 35123dfa576bSMarc Zyngier * locking. Should this change, we should address 35133dfa576bSMarc Zyngier * this. 35143dfa576bSMarc Zyngier */ 3515ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 3516ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 35173dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 35183dfa576bSMarc Zyngier &res->start); 35193dfa576bSMarc Zyngier return -EINVAL; 35203dfa576bSMarc Zyngier } 35213dfa576bSMarc Zyngier 35223dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 35233dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 35243dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 35253dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 35263dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 35273dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 35283dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 35293dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 35303dfa576bSMarc Zyngier } 35313dfa576bSMarc Zyngier 35323dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 35333dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 35343dfa576bSMarc Zyngier &res->start, its_number); 35353dfa576bSMarc Zyngier return -EINVAL; 35363dfa576bSMarc Zyngier } 35373dfa576bSMarc Zyngier 35383dfa576bSMarc Zyngier return its_number; 35393dfa576bSMarc Zyngier } 35403dfa576bSMarc Zyngier 3541db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 3542db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 35434c21f3c2SMarc Zyngier { 35444c21f3c2SMarc Zyngier struct its_node *its; 35454c21f3c2SMarc Zyngier void __iomem *its_base; 35463dfa576bSMarc Zyngier u32 val, ctlr; 35473dfa576bSMarc Zyngier u64 baser, tmp, typer; 3548539d3782SShanker Donthineni struct page *page; 35494c21f3c2SMarc Zyngier int err; 35504c21f3c2SMarc Zyngier 3551db40f0a7STomasz Nowicki its_base = ioremap(res->start, resource_size(res)); 35524c21f3c2SMarc Zyngier if (!its_base) { 3553db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 35544c21f3c2SMarc Zyngier return -ENOMEM; 35554c21f3c2SMarc Zyngier } 35564c21f3c2SMarc Zyngier 35574c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 35584c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 3559db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 35604c21f3c2SMarc Zyngier err = -ENODEV; 35614c21f3c2SMarc Zyngier goto out_unmap; 35624c21f3c2SMarc Zyngier } 35634c21f3c2SMarc Zyngier 35644559fbb3SYun Wu err = its_force_quiescent(its_base); 35654559fbb3SYun Wu if (err) { 3566db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 35674559fbb3SYun Wu goto out_unmap; 35684559fbb3SYun Wu } 35694559fbb3SYun Wu 3570db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 35714c21f3c2SMarc Zyngier 35724c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 35734c21f3c2SMarc Zyngier if (!its) { 35744c21f3c2SMarc Zyngier err = -ENOMEM; 35754c21f3c2SMarc Zyngier goto out_unmap; 35764c21f3c2SMarc Zyngier } 35774c21f3c2SMarc Zyngier 35784c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 35799791ec7dSMarc Zyngier mutex_init(&its->dev_alloc_lock); 35804c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 35814c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 35823dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 35834c21f3c2SMarc Zyngier its->base = its_base; 3584db40f0a7STomasz Nowicki its->phys_base = res->start; 35853dfa576bSMarc Zyngier its->ite_size = GITS_TYPER_ITT_ENTRY_SIZE(typer); 3586fa150019SArd Biesheuvel its->device_ids = GITS_TYPER_DEVBITS(typer); 35873dfa576bSMarc Zyngier its->is_v4 = !!(typer & GITS_TYPER_VLPIS); 35883dfa576bSMarc Zyngier if (its->is_v4) { 35893dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 35903dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 35913dfa576bSMarc Zyngier if (err < 0) 35923dfa576bSMarc Zyngier goto out_free_its; 35933dfa576bSMarc Zyngier 3594debf6d02SMarc Zyngier its->list_nr = err; 3595debf6d02SMarc Zyngier 35963dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 35973dfa576bSMarc Zyngier &res->start, err); 35983dfa576bSMarc Zyngier } else { 35993dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 36003dfa576bSMarc Zyngier } 36013dfa576bSMarc Zyngier } 36023dfa576bSMarc Zyngier 3603db40f0a7STomasz Nowicki its->numa_node = numa_node; 36044c21f3c2SMarc Zyngier 3605539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 36065bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 3607539d3782SShanker Donthineni if (!page) { 36084c21f3c2SMarc Zyngier err = -ENOMEM; 36094c21f3c2SMarc Zyngier goto out_free_its; 36104c21f3c2SMarc Zyngier } 3611539d3782SShanker Donthineni its->cmd_base = (void *)page_address(page); 36124c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 3613558b0165SArd Biesheuvel its->fwnode_handle = handle; 3614558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 3615558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 36164c21f3c2SMarc Zyngier 361767510ccaSRobert Richter its_enable_quirks(its); 361867510ccaSRobert Richter 36190e0b0f69SShanker Donthineni err = its_alloc_tables(its); 36204c21f3c2SMarc Zyngier if (err) 36214c21f3c2SMarc Zyngier goto out_free_cmd; 36224c21f3c2SMarc Zyngier 36234c21f3c2SMarc Zyngier err = its_alloc_collections(its); 36244c21f3c2SMarc Zyngier if (err) 36254c21f3c2SMarc Zyngier goto out_free_tables; 36264c21f3c2SMarc Zyngier 36274c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 36282fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 36294c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 36304c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 36314c21f3c2SMarc Zyngier GITS_CBASER_VALID); 36324c21f3c2SMarc Zyngier 36330968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 36340968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 36354c21f3c2SMarc Zyngier 36364ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 3637241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 3638241a386cSMarc Zyngier /* 3639241a386cSMarc Zyngier * The HW reports non-shareable, we must 3640241a386cSMarc Zyngier * remove the cacheability attributes as 3641241a386cSMarc Zyngier * well. 3642241a386cSMarc Zyngier */ 3643241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 3644241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 3645241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 36460968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 3647241a386cSMarc Zyngier } 36484c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 36494c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 36504c21f3c2SMarc Zyngier } 36514c21f3c2SMarc Zyngier 36520968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 36533dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 3654d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 3655d51c4b4dSMarc Zyngier if (its->is_v4) 3656d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 3657d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 3658241a386cSMarc Zyngier 3659dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 3660dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 3661dba0bc7bSDerek Basehore 3662db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 3663d14ae5e6STomasz Nowicki if (err) 366454456db9SMarc Zyngier goto out_free_tables; 36654c21f3c2SMarc Zyngier 3666a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 36674c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 3668a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 36694c21f3c2SMarc Zyngier 36704c21f3c2SMarc Zyngier return 0; 36714c21f3c2SMarc Zyngier 36724c21f3c2SMarc Zyngier out_free_tables: 36734c21f3c2SMarc Zyngier its_free_tables(its); 36744c21f3c2SMarc Zyngier out_free_cmd: 36755bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 36764c21f3c2SMarc Zyngier out_free_its: 36774c21f3c2SMarc Zyngier kfree(its); 36784c21f3c2SMarc Zyngier out_unmap: 36794c21f3c2SMarc Zyngier iounmap(its_base); 3680db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 36814c21f3c2SMarc Zyngier return err; 36824c21f3c2SMarc Zyngier } 36834c21f3c2SMarc Zyngier 36844c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 36854c21f3c2SMarc Zyngier { 3686589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 36874c21f3c2SMarc Zyngier } 36884c21f3c2SMarc Zyngier 36896eb486b6SShanker Donthineni static int redist_disable_lpis(void) 36904c21f3c2SMarc Zyngier { 36916eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 36926eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 36936eb486b6SShanker Donthineni u64 val; 36946eb486b6SShanker Donthineni 36954c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 36964c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 36974c21f3c2SMarc Zyngier return -ENXIO; 36984c21f3c2SMarc Zyngier } 36996eb486b6SShanker Donthineni 37006eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 37016eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 37026eb486b6SShanker Donthineni return 0; 37036eb486b6SShanker Donthineni 370411e37d35SMarc Zyngier /* 370511e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 370611e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 370711e37d35SMarc Zyngier * configured and all is well in the world. 3708c440a9d9SMarc Zyngier * 3709c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 371011e37d35SMarc Zyngier */ 3711c440a9d9SMarc Zyngier if (gic_data_rdist()->lpi_enabled || 3712c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 371311e37d35SMarc Zyngier return 0; 371411e37d35SMarc Zyngier 371511e37d35SMarc Zyngier /* 371611e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 371711e37d35SMarc Zyngier */ 371811e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 37196eb486b6SShanker Donthineni smp_processor_id()); 37206eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 37216eb486b6SShanker Donthineni 37226eb486b6SShanker Donthineni /* Disable LPIs */ 37236eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 37246eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 37256eb486b6SShanker Donthineni 37266eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 37276eb486b6SShanker Donthineni dsb(sy); 37286eb486b6SShanker Donthineni 37296eb486b6SShanker Donthineni /* 37306eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 37316eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 37326eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 37336eb486b6SShanker Donthineni */ 37346eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 37356eb486b6SShanker Donthineni if (!timeout) { 37366eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 37376eb486b6SShanker Donthineni smp_processor_id()); 37386eb486b6SShanker Donthineni return -ETIMEDOUT; 37396eb486b6SShanker Donthineni } 37406eb486b6SShanker Donthineni udelay(1); 37416eb486b6SShanker Donthineni timeout--; 37426eb486b6SShanker Donthineni } 37436eb486b6SShanker Donthineni 37446eb486b6SShanker Donthineni /* 37456eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 37466eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 37476eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 37486eb486b6SShanker Donthineni */ 37496eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 37506eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 37516eb486b6SShanker Donthineni return -EBUSY; 37526eb486b6SShanker Donthineni } 37536eb486b6SShanker Donthineni 37546eb486b6SShanker Donthineni return 0; 37556eb486b6SShanker Donthineni } 37566eb486b6SShanker Donthineni 37576eb486b6SShanker Donthineni int its_cpu_init(void) 37586eb486b6SShanker Donthineni { 37596eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 37606eb486b6SShanker Donthineni int ret; 37616eb486b6SShanker Donthineni 37626eb486b6SShanker Donthineni ret = redist_disable_lpis(); 37636eb486b6SShanker Donthineni if (ret) 37646eb486b6SShanker Donthineni return ret; 37656eb486b6SShanker Donthineni 37664c21f3c2SMarc Zyngier its_cpu_init_lpis(); 3767920181ceSDerek Basehore its_cpu_init_collections(); 37684c21f3c2SMarc Zyngier } 37694c21f3c2SMarc Zyngier 37704c21f3c2SMarc Zyngier return 0; 37714c21f3c2SMarc Zyngier } 37724c21f3c2SMarc Zyngier 3773935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 37744c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 37754c21f3c2SMarc Zyngier {}, 37764c21f3c2SMarc Zyngier }; 37774c21f3c2SMarc Zyngier 3778db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 37794c21f3c2SMarc Zyngier { 37804c21f3c2SMarc Zyngier struct device_node *np; 3781db40f0a7STomasz Nowicki struct resource res; 37824c21f3c2SMarc Zyngier 37834c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 37844c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 378595a25625SStephen Boyd if (!of_device_is_available(np)) 378695a25625SStephen Boyd continue; 3787d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 3788e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 3789e81f54c6SRob Herring np); 3790d14ae5e6STomasz Nowicki continue; 3791d14ae5e6STomasz Nowicki } 3792d14ae5e6STomasz Nowicki 3793db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 3794e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 3795db40f0a7STomasz Nowicki continue; 37964c21f3c2SMarc Zyngier } 37974c21f3c2SMarc Zyngier 3798db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 3799db40f0a7STomasz Nowicki } 3800db40f0a7STomasz Nowicki return 0; 3801db40f0a7STomasz Nowicki } 3802db40f0a7STomasz Nowicki 38033f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 38043f010cf1STomasz Nowicki 38053f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 38063f010cf1STomasz Nowicki 3807d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 3808dbd2b826SGanapatrao Kulkarni struct its_srat_map { 3809dbd2b826SGanapatrao Kulkarni /* numa node id */ 3810dbd2b826SGanapatrao Kulkarni u32 numa_node; 3811dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 3812dbd2b826SGanapatrao Kulkarni u32 its_id; 3813dbd2b826SGanapatrao Kulkarni }; 3814dbd2b826SGanapatrao Kulkarni 3815fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 3816dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 3817dbd2b826SGanapatrao Kulkarni 3818dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 3819dbd2b826SGanapatrao Kulkarni { 3820dbd2b826SGanapatrao Kulkarni int i; 3821dbd2b826SGanapatrao Kulkarni 3822dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 3823dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 3824dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 3825dbd2b826SGanapatrao Kulkarni } 3826dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 3827dbd2b826SGanapatrao Kulkarni } 3828dbd2b826SGanapatrao Kulkarni 3829fdf6e7a8SHanjun Guo static int __init gic_acpi_match_srat_its(struct acpi_subtable_header *header, 3830fdf6e7a8SHanjun Guo const unsigned long end) 3831fdf6e7a8SHanjun Guo { 3832fdf6e7a8SHanjun Guo return 0; 3833fdf6e7a8SHanjun Guo } 3834fdf6e7a8SHanjun Guo 3835dbd2b826SGanapatrao Kulkarni static int __init gic_acpi_parse_srat_its(struct acpi_subtable_header *header, 3836dbd2b826SGanapatrao Kulkarni const unsigned long end) 3837dbd2b826SGanapatrao Kulkarni { 3838dbd2b826SGanapatrao Kulkarni int node; 3839dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 3840dbd2b826SGanapatrao Kulkarni 3841dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 3842dbd2b826SGanapatrao Kulkarni if (!its_affinity) 3843dbd2b826SGanapatrao Kulkarni return -EINVAL; 3844dbd2b826SGanapatrao Kulkarni 3845dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 3846dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 3847dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 3848dbd2b826SGanapatrao Kulkarni return -EINVAL; 3849dbd2b826SGanapatrao Kulkarni } 3850dbd2b826SGanapatrao Kulkarni 3851dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 3852dbd2b826SGanapatrao Kulkarni 3853dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 3854dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 3855dbd2b826SGanapatrao Kulkarni return 0; 3856dbd2b826SGanapatrao Kulkarni } 3857dbd2b826SGanapatrao Kulkarni 3858dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 3859dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 3860dbd2b826SGanapatrao Kulkarni its_in_srat++; 3861dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 3862dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 3863dbd2b826SGanapatrao Kulkarni 3864dbd2b826SGanapatrao Kulkarni return 0; 3865dbd2b826SGanapatrao Kulkarni } 3866dbd2b826SGanapatrao Kulkarni 3867dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 3868dbd2b826SGanapatrao Kulkarni { 3869fdf6e7a8SHanjun Guo int count; 3870fdf6e7a8SHanjun Guo 3871fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 3872fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 3873fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3874fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 3875fdf6e7a8SHanjun Guo if (count <= 0) 3876fdf6e7a8SHanjun Guo return; 3877fdf6e7a8SHanjun Guo 38786da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 3879fdf6e7a8SHanjun Guo GFP_KERNEL); 3880fdf6e7a8SHanjun Guo if (!its_srat_maps) { 3881fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 3882fdf6e7a8SHanjun Guo return; 3883fdf6e7a8SHanjun Guo } 3884fdf6e7a8SHanjun Guo 3885dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 3886dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 3887dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 3888dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 3889dbd2b826SGanapatrao Kulkarni } 3890fdf6e7a8SHanjun Guo 3891fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 3892fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 3893fdf6e7a8SHanjun Guo { 3894fdf6e7a8SHanjun Guo kfree(its_srat_maps); 3895fdf6e7a8SHanjun Guo } 3896dbd2b826SGanapatrao Kulkarni #else 3897dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 3898dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 3899fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 3900dbd2b826SGanapatrao Kulkarni #endif 3901dbd2b826SGanapatrao Kulkarni 39023f010cf1STomasz Nowicki static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header, 39033f010cf1STomasz Nowicki const unsigned long end) 39043f010cf1STomasz Nowicki { 39053f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 39063f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 39073f010cf1STomasz Nowicki struct resource res; 39083f010cf1STomasz Nowicki int err; 39093f010cf1STomasz Nowicki 39103f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 39113f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 39123f010cf1STomasz Nowicki res.start = its_entry->base_address; 39133f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 39143f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 39153f010cf1STomasz Nowicki 39163f010cf1STomasz Nowicki dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address); 39173f010cf1STomasz Nowicki if (!dom_handle) { 39183f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 39193f010cf1STomasz Nowicki &res.start); 39203f010cf1STomasz Nowicki return -ENOMEM; 39213f010cf1STomasz Nowicki } 39223f010cf1STomasz Nowicki 39238b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 39248b4282e6SShameer Kolothum dom_handle); 39253f010cf1STomasz Nowicki if (err) { 39263f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 39273f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 39283f010cf1STomasz Nowicki goto dom_err; 39293f010cf1STomasz Nowicki } 39303f010cf1STomasz Nowicki 3931dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 3932dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 39333f010cf1STomasz Nowicki if (!err) 39343f010cf1STomasz Nowicki return 0; 39353f010cf1STomasz Nowicki 39363f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 39373f010cf1STomasz Nowicki dom_err: 39383f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 39393f010cf1STomasz Nowicki return err; 39403f010cf1STomasz Nowicki } 39413f010cf1STomasz Nowicki 39423f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 39433f010cf1STomasz Nowicki { 3944dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 39453f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 39463f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 3947fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 39483f010cf1STomasz Nowicki } 39493f010cf1STomasz Nowicki #else 39503f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 39513f010cf1STomasz Nowicki #endif 39523f010cf1STomasz Nowicki 3953db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 3954db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 3955db40f0a7STomasz Nowicki { 3956db40f0a7STomasz Nowicki struct device_node *of_node; 39578fff27aeSMarc Zyngier struct its_node *its; 39588fff27aeSMarc Zyngier bool has_v4 = false; 39598fff27aeSMarc Zyngier int err; 3960db40f0a7STomasz Nowicki 3961db40f0a7STomasz Nowicki its_parent = parent_domain; 3962db40f0a7STomasz Nowicki of_node = to_of_node(handle); 3963db40f0a7STomasz Nowicki if (of_node) 3964db40f0a7STomasz Nowicki its_of_probe(of_node); 3965db40f0a7STomasz Nowicki else 39663f010cf1STomasz Nowicki its_acpi_probe(); 3967db40f0a7STomasz Nowicki 39684c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 39694c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 39704c21f3c2SMarc Zyngier return -ENXIO; 39714c21f3c2SMarc Zyngier } 39724c21f3c2SMarc Zyngier 39734c21f3c2SMarc Zyngier gic_rdists = rdists; 397411e37d35SMarc Zyngier 397511e37d35SMarc Zyngier err = allocate_lpi_tables(); 39768fff27aeSMarc Zyngier if (err) 39778fff27aeSMarc Zyngier return err; 39788fff27aeSMarc Zyngier 39798fff27aeSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) 39808fff27aeSMarc Zyngier has_v4 |= its->is_v4; 39818fff27aeSMarc Zyngier 39828fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 39833d63cb53SMarc Zyngier if (its_init_vpe_domain() || 39843d63cb53SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops)) { 39858fff27aeSMarc Zyngier rdists->has_vlpis = false; 39868fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 39878fff27aeSMarc Zyngier } 39888fff27aeSMarc Zyngier } 39898fff27aeSMarc Zyngier 3990dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 3991dba0bc7bSDerek Basehore 39928fff27aeSMarc Zyngier return 0; 39934c21f3c2SMarc Zyngier } 3994