1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2cc2d3216SMarc Zyngier /* 3d7276b80SMarc Zyngier * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved. 4cc2d3216SMarc Zyngier * Author: Marc Zyngier <marc.zyngier@arm.com> 5cc2d3216SMarc Zyngier */ 6cc2d3216SMarc Zyngier 73f010cf1STomasz Nowicki #include <linux/acpi.h> 88d3554b8SHanjun Guo #include <linux/acpi_iort.h> 9ffedbf0cSMarc Zyngier #include <linux/bitfield.h> 10cc2d3216SMarc Zyngier #include <linux/bitmap.h> 11cc2d3216SMarc Zyngier #include <linux/cpu.h> 12c6e2ccb6SMarc Zyngier #include <linux/crash_dump.h> 13cc2d3216SMarc Zyngier #include <linux/delay.h> 1444bb7e24SRobin Murphy #include <linux/dma-iommu.h> 153fb68faeSMarc Zyngier #include <linux/efi.h> 16cc2d3216SMarc Zyngier #include <linux/interrupt.h> 173f010cf1STomasz Nowicki #include <linux/irqdomain.h> 18880cb3cdSMarc Zyngier #include <linux/list.h> 19cc2d3216SMarc Zyngier #include <linux/log2.h> 205e2c9f9aSMarc Zyngier #include <linux/memblock.h> 21cc2d3216SMarc Zyngier #include <linux/mm.h> 22cc2d3216SMarc Zyngier #include <linux/msi.h> 23cc2d3216SMarc Zyngier #include <linux/of.h> 24cc2d3216SMarc Zyngier #include <linux/of_address.h> 25cc2d3216SMarc Zyngier #include <linux/of_irq.h> 26cc2d3216SMarc Zyngier #include <linux/of_pci.h> 27cc2d3216SMarc Zyngier #include <linux/of_platform.h> 28cc2d3216SMarc Zyngier #include <linux/percpu.h> 29cc2d3216SMarc Zyngier #include <linux/slab.h> 30dba0bc7bSDerek Basehore #include <linux/syscore_ops.h> 31cc2d3216SMarc Zyngier 3241a83e06SJoel Porquet #include <linux/irqchip.h> 33cc2d3216SMarc Zyngier #include <linux/irqchip/arm-gic-v3.h> 34c808eea8SMarc Zyngier #include <linux/irqchip/arm-gic-v4.h> 35cc2d3216SMarc Zyngier 36cc2d3216SMarc Zyngier #include <asm/cputype.h> 37cc2d3216SMarc Zyngier #include <asm/exception.h> 38cc2d3216SMarc Zyngier 3967510ccaSRobert Richter #include "irq-gic-common.h" 4067510ccaSRobert Richter 4194100970SRobert Richter #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) 4294100970SRobert Richter #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) 43fbf8f40eSGanapatrao Kulkarni #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) 44dba0bc7bSDerek Basehore #define ITS_FLAGS_SAVE_SUSPEND_STATE (1ULL << 3) 45cc2d3216SMarc Zyngier 46c48ed51cSMarc Zyngier #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) 47c440a9d9SMarc Zyngier #define RDIST_FLAGS_RD_TABLES_PREALLOCATED (1 << 1) 48c48ed51cSMarc Zyngier 49a13b0404SMarc Zyngier static u32 lpi_id_bits; 50a13b0404SMarc Zyngier 51a13b0404SMarc Zyngier /* 52a13b0404SMarc Zyngier * We allocate memory for PROPBASE to cover 2 ^ lpi_id_bits LPIs to 53a13b0404SMarc Zyngier * deal with (one configuration byte per interrupt). PENDBASE has to 54a13b0404SMarc Zyngier * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). 55a13b0404SMarc Zyngier */ 56a13b0404SMarc Zyngier #define LPI_NRBITS lpi_id_bits 57a13b0404SMarc Zyngier #define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K) 58a13b0404SMarc Zyngier #define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K) 59a13b0404SMarc Zyngier 602130b789SJulien Thierry #define LPI_PROP_DEFAULT_PRIO GICD_INT_DEF_PRI 61a13b0404SMarc Zyngier 62cc2d3216SMarc Zyngier /* 63cc2d3216SMarc Zyngier * Collection structure - just an ID, and a redistributor address to 64cc2d3216SMarc Zyngier * ping. We use one per CPU as a bag of interrupts assigned to this 65cc2d3216SMarc Zyngier * CPU. 66cc2d3216SMarc Zyngier */ 67cc2d3216SMarc Zyngier struct its_collection { 68cc2d3216SMarc Zyngier u64 target_address; 69cc2d3216SMarc Zyngier u16 col_id; 70cc2d3216SMarc Zyngier }; 71cc2d3216SMarc Zyngier 72cc2d3216SMarc Zyngier /* 739347359aSShanker Donthineni * The ITS_BASER structure - contains memory information, cached 749347359aSShanker Donthineni * value of BASER register configuration and ITS page size. 75466b7d16SShanker Donthineni */ 76466b7d16SShanker Donthineni struct its_baser { 77466b7d16SShanker Donthineni void *base; 78466b7d16SShanker Donthineni u64 val; 79466b7d16SShanker Donthineni u32 order; 809347359aSShanker Donthineni u32 psz; 81466b7d16SShanker Donthineni }; 82466b7d16SShanker Donthineni 83558b0165SArd Biesheuvel struct its_device; 84558b0165SArd Biesheuvel 85466b7d16SShanker Donthineni /* 86cc2d3216SMarc Zyngier * The ITS structure - contains most of the infrastructure, with the 87841514abSMarc Zyngier * top-level MSI domain, the command queue, the collections, and the 88841514abSMarc Zyngier * list of devices writing to it. 899791ec7dSMarc Zyngier * 909791ec7dSMarc Zyngier * dev_alloc_lock has to be taken for device allocations, while the 919791ec7dSMarc Zyngier * spinlock must be taken to parse data structures such as the device 929791ec7dSMarc Zyngier * list. 93cc2d3216SMarc Zyngier */ 94cc2d3216SMarc Zyngier struct its_node { 95cc2d3216SMarc Zyngier raw_spinlock_t lock; 969791ec7dSMarc Zyngier struct mutex dev_alloc_lock; 97cc2d3216SMarc Zyngier struct list_head entry; 98cc2d3216SMarc Zyngier void __iomem *base; 995e46a484SMarc Zyngier void __iomem *sgir_base; 100db40f0a7STomasz Nowicki phys_addr_t phys_base; 101cc2d3216SMarc Zyngier struct its_cmd_block *cmd_base; 102cc2d3216SMarc Zyngier struct its_cmd_block *cmd_write; 103466b7d16SShanker Donthineni struct its_baser tables[GITS_BASER_NR_REGS]; 104cc2d3216SMarc Zyngier struct its_collection *collections; 105558b0165SArd Biesheuvel struct fwnode_handle *fwnode_handle; 106558b0165SArd Biesheuvel u64 (*get_msi_base)(struct its_device *its_dev); 1070dd57fedSMarc Zyngier u64 typer; 108dba0bc7bSDerek Basehore u64 cbaser_save; 109dba0bc7bSDerek Basehore u32 ctlr_save; 1105e516846SMarc Zyngier u32 mpidr; 111cc2d3216SMarc Zyngier struct list_head its_device_list; 112cc2d3216SMarc Zyngier u64 flags; 113debf6d02SMarc Zyngier unsigned long list_nr; 114fbf8f40eSGanapatrao Kulkarni int numa_node; 115558b0165SArd Biesheuvel unsigned int msi_domain_flags; 116558b0165SArd Biesheuvel u32 pre_its_base; /* for Socionext Synquacer */ 1175c9a882eSMarc Zyngier int vlpi_redist_offset; 118cc2d3216SMarc Zyngier }; 119cc2d3216SMarc Zyngier 1200dd57fedSMarc Zyngier #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) 1215e516846SMarc Zyngier #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) 122576a8342SMarc Zyngier #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) 1230dd57fedSMarc Zyngier 124cc2d3216SMarc Zyngier #define ITS_ITT_ALIGN SZ_256 125cc2d3216SMarc Zyngier 12632bd44dcSShanker Donthineni /* The maximum number of VPEID bits supported by VLPI commands */ 127f2d83409SMarc Zyngier #define ITS_MAX_VPEID_BITS \ 128f2d83409SMarc Zyngier ({ \ 129f2d83409SMarc Zyngier int nvpeid = 16; \ 130f2d83409SMarc Zyngier if (gic_rdists->has_rvpeid && \ 131f2d83409SMarc Zyngier gic_rdists->gicd_typer2 & GICD_TYPER2_VIL) \ 132f2d83409SMarc Zyngier nvpeid = 1 + (gic_rdists->gicd_typer2 & \ 133f2d83409SMarc Zyngier GICD_TYPER2_VID); \ 134f2d83409SMarc Zyngier \ 135f2d83409SMarc Zyngier nvpeid; \ 136f2d83409SMarc Zyngier }) 13732bd44dcSShanker Donthineni #define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS)) 13832bd44dcSShanker Donthineni 1392eca0d6cSShanker Donthineni /* Convert page order to size in bytes */ 1402eca0d6cSShanker Donthineni #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) 1412eca0d6cSShanker Donthineni 142591e5becSMarc Zyngier struct event_lpi_map { 143591e5becSMarc Zyngier unsigned long *lpi_map; 144591e5becSMarc Zyngier u16 *col_map; 145591e5becSMarc Zyngier irq_hw_number_t lpi_base; 146591e5becSMarc Zyngier int nr_lpis; 14711635fa2SMarc Zyngier raw_spinlock_t vlpi_lock; 148d011e4e6SMarc Zyngier struct its_vm *vm; 149d011e4e6SMarc Zyngier struct its_vlpi_map *vlpi_maps; 150d011e4e6SMarc Zyngier int nr_vlpis; 151591e5becSMarc Zyngier }; 152591e5becSMarc Zyngier 153cc2d3216SMarc Zyngier /* 154d011e4e6SMarc Zyngier * The ITS view of a device - belongs to an ITS, owns an interrupt 155d011e4e6SMarc Zyngier * translation table, and a list of interrupts. If it some of its 156d011e4e6SMarc Zyngier * LPIs are injected into a guest (GICv4), the event_map.vm field 157d011e4e6SMarc Zyngier * indicates which one. 158cc2d3216SMarc Zyngier */ 159cc2d3216SMarc Zyngier struct its_device { 160cc2d3216SMarc Zyngier struct list_head entry; 161cc2d3216SMarc Zyngier struct its_node *its; 162591e5becSMarc Zyngier struct event_lpi_map event_map; 163cc2d3216SMarc Zyngier void *itt; 164cc2d3216SMarc Zyngier u32 nr_ites; 165cc2d3216SMarc Zyngier u32 device_id; 1669791ec7dSMarc Zyngier bool shared; 167cc2d3216SMarc Zyngier }; 168cc2d3216SMarc Zyngier 16920b3d54eSMarc Zyngier static struct { 17020b3d54eSMarc Zyngier raw_spinlock_t lock; 17120b3d54eSMarc Zyngier struct its_device *dev; 17220b3d54eSMarc Zyngier struct its_vpe **vpes; 17320b3d54eSMarc Zyngier int next_victim; 17420b3d54eSMarc Zyngier } vpe_proxy; 17520b3d54eSMarc Zyngier 1761ac19ca6SMarc Zyngier static LIST_HEAD(its_nodes); 177a8db7456SSebastian Andrzej Siewior static DEFINE_RAW_SPINLOCK(its_lock); 1781ac19ca6SMarc Zyngier static struct rdists *gic_rdists; 179db40f0a7STomasz Nowicki static struct irq_domain *its_parent; 1801ac19ca6SMarc Zyngier 1813dfa576bSMarc Zyngier static unsigned long its_list_map; 1823171a47aSMarc Zyngier static u16 vmovp_seq_num; 1833171a47aSMarc Zyngier static DEFINE_RAW_SPINLOCK(vmovp_lock); 1843171a47aSMarc Zyngier 1857d75bbb4SMarc Zyngier static DEFINE_IDA(its_vpeid_ida); 1863dfa576bSMarc Zyngier 1871ac19ca6SMarc Zyngier #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 18811e37d35SMarc Zyngier #define gic_data_rdist_cpu(cpu) (per_cpu_ptr(gic_rdists->rdist, cpu)) 1891ac19ca6SMarc Zyngier #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 190e643d803SMarc Zyngier #define gic_data_rdist_vlpi_base() (gic_data_rdist_rd_base() + SZ_128K) 1911ac19ca6SMarc Zyngier 192009384b3SMarc Zyngier /* 193009384b3SMarc Zyngier * Skip ITSs that have no vLPIs mapped, unless we're on GICv4.1, as we 194009384b3SMarc Zyngier * always have vSGIs mapped. 195009384b3SMarc Zyngier */ 196009384b3SMarc Zyngier static bool require_its_list_vmovp(struct its_vm *vm, struct its_node *its) 197009384b3SMarc Zyngier { 198009384b3SMarc Zyngier return (gic_rdists->has_rvpeid || vm->vlpi_count[its->list_nr]); 199009384b3SMarc Zyngier } 200009384b3SMarc Zyngier 20184243125SZenghui Yu static u16 get_its_list(struct its_vm *vm) 20284243125SZenghui Yu { 20384243125SZenghui Yu struct its_node *its; 20484243125SZenghui Yu unsigned long its_list = 0; 20584243125SZenghui Yu 20684243125SZenghui Yu list_for_each_entry(its, &its_nodes, entry) { 2070dd57fedSMarc Zyngier if (!is_v4(its)) 20884243125SZenghui Yu continue; 20984243125SZenghui Yu 210009384b3SMarc Zyngier if (require_its_list_vmovp(vm, its)) 21184243125SZenghui Yu __set_bit(its->list_nr, &its_list); 21284243125SZenghui Yu } 21384243125SZenghui Yu 21484243125SZenghui Yu return (u16)its_list; 21584243125SZenghui Yu } 21684243125SZenghui Yu 217425c09beSMarc Zyngier static inline u32 its_get_event_id(struct irq_data *d) 218425c09beSMarc Zyngier { 219425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 220425c09beSMarc Zyngier return d->hwirq - its_dev->event_map.lpi_base; 221425c09beSMarc Zyngier } 222425c09beSMarc Zyngier 223591e5becSMarc Zyngier static struct its_collection *dev_event_to_col(struct its_device *its_dev, 224591e5becSMarc Zyngier u32 event) 225591e5becSMarc Zyngier { 226591e5becSMarc Zyngier struct its_node *its = its_dev->its; 227591e5becSMarc Zyngier 228591e5becSMarc Zyngier return its->collections + its_dev->event_map.col_map[event]; 229591e5becSMarc Zyngier } 230591e5becSMarc Zyngier 231c1d4d5cdSMarc Zyngier static struct its_vlpi_map *dev_event_to_vlpi_map(struct its_device *its_dev, 232c1d4d5cdSMarc Zyngier u32 event) 233c1d4d5cdSMarc Zyngier { 234c1d4d5cdSMarc Zyngier if (WARN_ON_ONCE(event >= its_dev->event_map.nr_lpis)) 235c1d4d5cdSMarc Zyngier return NULL; 236c1d4d5cdSMarc Zyngier 237c1d4d5cdSMarc Zyngier return &its_dev->event_map.vlpi_maps[event]; 238c1d4d5cdSMarc Zyngier } 239c1d4d5cdSMarc Zyngier 240f4a81f5aSMarc Zyngier static struct its_vlpi_map *get_vlpi_map(struct irq_data *d) 241f4a81f5aSMarc Zyngier { 242f4a81f5aSMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 243f4a81f5aSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 244f4a81f5aSMarc Zyngier u32 event = its_get_event_id(d); 245f4a81f5aSMarc Zyngier 246f4a81f5aSMarc Zyngier return dev_event_to_vlpi_map(its_dev, event); 247f4a81f5aSMarc Zyngier } 248f4a81f5aSMarc Zyngier 249f4a81f5aSMarc Zyngier return NULL; 250f4a81f5aSMarc Zyngier } 251f4a81f5aSMarc Zyngier 252f3a05921SMarc Zyngier static int vpe_to_cpuid_lock(struct its_vpe *vpe, unsigned long *flags) 253425c09beSMarc Zyngier { 254f3a05921SMarc Zyngier raw_spin_lock_irqsave(&vpe->vpe_lock, *flags); 255f3a05921SMarc Zyngier return vpe->col_idx; 256f3a05921SMarc Zyngier } 257f3a05921SMarc Zyngier 258f3a05921SMarc Zyngier static void vpe_to_cpuid_unlock(struct its_vpe *vpe, unsigned long flags) 259f3a05921SMarc Zyngier { 260f3a05921SMarc Zyngier raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); 261f3a05921SMarc Zyngier } 262f3a05921SMarc Zyngier 263f3a05921SMarc Zyngier static int irq_to_cpuid_lock(struct irq_data *d, unsigned long *flags) 264f3a05921SMarc Zyngier { 265f3a05921SMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 266f3a05921SMarc Zyngier int cpu; 267f3a05921SMarc Zyngier 268f3a05921SMarc Zyngier if (map) { 269f3a05921SMarc Zyngier cpu = vpe_to_cpuid_lock(map->vpe, flags); 270f3a05921SMarc Zyngier } else { 271f3a05921SMarc Zyngier /* Physical LPIs are already locked via the irq_desc lock */ 272425c09beSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 273f3a05921SMarc Zyngier cpu = its_dev->event_map.col_map[its_get_event_id(d)]; 274f3a05921SMarc Zyngier /* Keep GCC quiet... */ 275f3a05921SMarc Zyngier *flags = 0; 276f3a05921SMarc Zyngier } 277f3a05921SMarc Zyngier 278f3a05921SMarc Zyngier return cpu; 279f3a05921SMarc Zyngier } 280f3a05921SMarc Zyngier 281f3a05921SMarc Zyngier static void irq_to_cpuid_unlock(struct irq_data *d, unsigned long flags) 282f3a05921SMarc Zyngier { 283f4a81f5aSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 284425c09beSMarc Zyngier 285f4a81f5aSMarc Zyngier if (map) 286f3a05921SMarc Zyngier vpe_to_cpuid_unlock(map->vpe, flags); 287425c09beSMarc Zyngier } 288425c09beSMarc Zyngier 28983559b47SMarc Zyngier static struct its_collection *valid_col(struct its_collection *col) 29083559b47SMarc Zyngier { 29120faba84SJoe Perches if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(15, 0))) 29283559b47SMarc Zyngier return NULL; 29383559b47SMarc Zyngier 29483559b47SMarc Zyngier return col; 29583559b47SMarc Zyngier } 29683559b47SMarc Zyngier 297205e065dSMarc Zyngier static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) 298205e065dSMarc Zyngier { 299205e065dSMarc Zyngier if (valid_col(its->collections + vpe->col_idx)) 300205e065dSMarc Zyngier return vpe; 301205e065dSMarc Zyngier 302205e065dSMarc Zyngier return NULL; 303205e065dSMarc Zyngier } 304205e065dSMarc Zyngier 305cc2d3216SMarc Zyngier /* 306cc2d3216SMarc Zyngier * ITS command descriptors - parameters to be encoded in a command 307cc2d3216SMarc Zyngier * block. 308cc2d3216SMarc Zyngier */ 309cc2d3216SMarc Zyngier struct its_cmd_desc { 310cc2d3216SMarc Zyngier union { 311cc2d3216SMarc Zyngier struct { 312cc2d3216SMarc Zyngier struct its_device *dev; 313cc2d3216SMarc Zyngier u32 event_id; 314cc2d3216SMarc Zyngier } its_inv_cmd; 315cc2d3216SMarc Zyngier 316cc2d3216SMarc Zyngier struct { 317cc2d3216SMarc Zyngier struct its_device *dev; 318cc2d3216SMarc Zyngier u32 event_id; 3198d85dcedSMarc Zyngier } its_clear_cmd; 3208d85dcedSMarc Zyngier 3218d85dcedSMarc Zyngier struct { 3228d85dcedSMarc Zyngier struct its_device *dev; 3238d85dcedSMarc Zyngier u32 event_id; 324cc2d3216SMarc Zyngier } its_int_cmd; 325cc2d3216SMarc Zyngier 326cc2d3216SMarc Zyngier struct { 327cc2d3216SMarc Zyngier struct its_device *dev; 328cc2d3216SMarc Zyngier int valid; 329cc2d3216SMarc Zyngier } its_mapd_cmd; 330cc2d3216SMarc Zyngier 331cc2d3216SMarc Zyngier struct { 332cc2d3216SMarc Zyngier struct its_collection *col; 333cc2d3216SMarc Zyngier int valid; 334cc2d3216SMarc Zyngier } its_mapc_cmd; 335cc2d3216SMarc Zyngier 336cc2d3216SMarc Zyngier struct { 337cc2d3216SMarc Zyngier struct its_device *dev; 338cc2d3216SMarc Zyngier u32 phys_id; 339cc2d3216SMarc Zyngier u32 event_id; 3406a25ad3aSMarc Zyngier } its_mapti_cmd; 341cc2d3216SMarc Zyngier 342cc2d3216SMarc Zyngier struct { 343cc2d3216SMarc Zyngier struct its_device *dev; 344cc2d3216SMarc Zyngier struct its_collection *col; 345591e5becSMarc Zyngier u32 event_id; 346cc2d3216SMarc Zyngier } its_movi_cmd; 347cc2d3216SMarc Zyngier 348cc2d3216SMarc Zyngier struct { 349cc2d3216SMarc Zyngier struct its_device *dev; 350cc2d3216SMarc Zyngier u32 event_id; 351cc2d3216SMarc Zyngier } its_discard_cmd; 352cc2d3216SMarc Zyngier 353cc2d3216SMarc Zyngier struct { 354cc2d3216SMarc Zyngier struct its_collection *col; 355cc2d3216SMarc Zyngier } its_invall_cmd; 356d011e4e6SMarc Zyngier 357d011e4e6SMarc Zyngier struct { 358d011e4e6SMarc Zyngier struct its_vpe *vpe; 359eb78192bSMarc Zyngier } its_vinvall_cmd; 360eb78192bSMarc Zyngier 361eb78192bSMarc Zyngier struct { 362eb78192bSMarc Zyngier struct its_vpe *vpe; 363eb78192bSMarc Zyngier struct its_collection *col; 364eb78192bSMarc Zyngier bool valid; 365eb78192bSMarc Zyngier } its_vmapp_cmd; 366eb78192bSMarc Zyngier 367eb78192bSMarc Zyngier struct { 368eb78192bSMarc Zyngier struct its_vpe *vpe; 369d011e4e6SMarc Zyngier struct its_device *dev; 370d011e4e6SMarc Zyngier u32 virt_id; 371d011e4e6SMarc Zyngier u32 event_id; 372d011e4e6SMarc Zyngier bool db_enabled; 373d011e4e6SMarc Zyngier } its_vmapti_cmd; 374d011e4e6SMarc Zyngier 375d011e4e6SMarc Zyngier struct { 376d011e4e6SMarc Zyngier struct its_vpe *vpe; 377d011e4e6SMarc Zyngier struct its_device *dev; 378d011e4e6SMarc Zyngier u32 event_id; 379d011e4e6SMarc Zyngier bool db_enabled; 380d011e4e6SMarc Zyngier } its_vmovi_cmd; 3813171a47aSMarc Zyngier 3823171a47aSMarc Zyngier struct { 3833171a47aSMarc Zyngier struct its_vpe *vpe; 3843171a47aSMarc Zyngier struct its_collection *col; 3853171a47aSMarc Zyngier u16 seq_num; 3863171a47aSMarc Zyngier u16 its_list; 3873171a47aSMarc Zyngier } its_vmovp_cmd; 388d97c97baSMarc Zyngier 389d97c97baSMarc Zyngier struct { 390d97c97baSMarc Zyngier struct its_vpe *vpe; 391d97c97baSMarc Zyngier } its_invdb_cmd; 392e252cf8aSMarc Zyngier 393e252cf8aSMarc Zyngier struct { 394e252cf8aSMarc Zyngier struct its_vpe *vpe; 395e252cf8aSMarc Zyngier u8 sgi; 396e252cf8aSMarc Zyngier u8 priority; 397e252cf8aSMarc Zyngier bool enable; 398e252cf8aSMarc Zyngier bool group; 399e252cf8aSMarc Zyngier bool clear; 400e252cf8aSMarc Zyngier } its_vsgi_cmd; 401cc2d3216SMarc Zyngier }; 402cc2d3216SMarc Zyngier }; 403cc2d3216SMarc Zyngier 404cc2d3216SMarc Zyngier /* 405cc2d3216SMarc Zyngier * The ITS command block, which is what the ITS actually parses. 406cc2d3216SMarc Zyngier */ 407cc2d3216SMarc Zyngier struct its_cmd_block { 4082bbdfcc5SBen Dooks (Codethink) union { 409cc2d3216SMarc Zyngier u64 raw_cmd[4]; 4102bbdfcc5SBen Dooks (Codethink) __le64 raw_cmd_le[4]; 4112bbdfcc5SBen Dooks (Codethink) }; 412cc2d3216SMarc Zyngier }; 413cc2d3216SMarc Zyngier 414cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_SZ SZ_64K 415cc2d3216SMarc Zyngier #define ITS_CMD_QUEUE_NR_ENTRIES (ITS_CMD_QUEUE_SZ / sizeof(struct its_cmd_block)) 416cc2d3216SMarc Zyngier 41767047f90SMarc Zyngier typedef struct its_collection *(*its_cmd_builder_t)(struct its_node *, 41867047f90SMarc Zyngier struct its_cmd_block *, 419cc2d3216SMarc Zyngier struct its_cmd_desc *); 420cc2d3216SMarc Zyngier 42167047f90SMarc Zyngier typedef struct its_vpe *(*its_cmd_vbuilder_t)(struct its_node *, 42267047f90SMarc Zyngier struct its_cmd_block *, 423d011e4e6SMarc Zyngier struct its_cmd_desc *); 424d011e4e6SMarc Zyngier 4254d36f136SMarc Zyngier static void its_mask_encode(u64 *raw_cmd, u64 val, int h, int l) 4264d36f136SMarc Zyngier { 4274d36f136SMarc Zyngier u64 mask = GENMASK_ULL(h, l); 4284d36f136SMarc Zyngier *raw_cmd &= ~mask; 4294d36f136SMarc Zyngier *raw_cmd |= (val << l) & mask; 4304d36f136SMarc Zyngier } 4314d36f136SMarc Zyngier 432cc2d3216SMarc Zyngier static void its_encode_cmd(struct its_cmd_block *cmd, u8 cmd_nr) 433cc2d3216SMarc Zyngier { 4344d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], cmd_nr, 7, 0); 435cc2d3216SMarc Zyngier } 436cc2d3216SMarc Zyngier 437cc2d3216SMarc Zyngier static void its_encode_devid(struct its_cmd_block *cmd, u32 devid) 438cc2d3216SMarc Zyngier { 4394d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], devid, 63, 32); 440cc2d3216SMarc Zyngier } 441cc2d3216SMarc Zyngier 442cc2d3216SMarc Zyngier static void its_encode_event_id(struct its_cmd_block *cmd, u32 id) 443cc2d3216SMarc Zyngier { 4444d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], id, 31, 0); 445cc2d3216SMarc Zyngier } 446cc2d3216SMarc Zyngier 447cc2d3216SMarc Zyngier static void its_encode_phys_id(struct its_cmd_block *cmd, u32 phys_id) 448cc2d3216SMarc Zyngier { 4494d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], phys_id, 63, 32); 450cc2d3216SMarc Zyngier } 451cc2d3216SMarc Zyngier 452cc2d3216SMarc Zyngier static void its_encode_size(struct its_cmd_block *cmd, u8 size) 453cc2d3216SMarc Zyngier { 4544d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], size, 4, 0); 455cc2d3216SMarc Zyngier } 456cc2d3216SMarc Zyngier 457cc2d3216SMarc Zyngier static void its_encode_itt(struct its_cmd_block *cmd, u64 itt_addr) 458cc2d3216SMarc Zyngier { 45930ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], itt_addr >> 8, 51, 8); 460cc2d3216SMarc Zyngier } 461cc2d3216SMarc Zyngier 462cc2d3216SMarc Zyngier static void its_encode_valid(struct its_cmd_block *cmd, int valid) 463cc2d3216SMarc Zyngier { 4644d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], !!valid, 63, 63); 465cc2d3216SMarc Zyngier } 466cc2d3216SMarc Zyngier 467cc2d3216SMarc Zyngier static void its_encode_target(struct its_cmd_block *cmd, u64 target_addr) 468cc2d3216SMarc Zyngier { 46930ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[2], target_addr >> 16, 51, 16); 470cc2d3216SMarc Zyngier } 471cc2d3216SMarc Zyngier 472cc2d3216SMarc Zyngier static void its_encode_collection(struct its_cmd_block *cmd, u16 col) 473cc2d3216SMarc Zyngier { 4744d36f136SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], col, 15, 0); 475cc2d3216SMarc Zyngier } 476cc2d3216SMarc Zyngier 477d011e4e6SMarc Zyngier static void its_encode_vpeid(struct its_cmd_block *cmd, u16 vpeid) 478d011e4e6SMarc Zyngier { 479d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpeid, 47, 32); 480d011e4e6SMarc Zyngier } 481d011e4e6SMarc Zyngier 482d011e4e6SMarc Zyngier static void its_encode_virt_id(struct its_cmd_block *cmd, u32 virt_id) 483d011e4e6SMarc Zyngier { 484d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], virt_id, 31, 0); 485d011e4e6SMarc Zyngier } 486d011e4e6SMarc Zyngier 487d011e4e6SMarc Zyngier static void its_encode_db_phys_id(struct its_cmd_block *cmd, u32 db_phys_id) 488d011e4e6SMarc Zyngier { 489d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_phys_id, 63, 32); 490d011e4e6SMarc Zyngier } 491d011e4e6SMarc Zyngier 492d011e4e6SMarc Zyngier static void its_encode_db_valid(struct its_cmd_block *cmd, bool db_valid) 493d011e4e6SMarc Zyngier { 494d011e4e6SMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db_valid, 0, 0); 495d011e4e6SMarc Zyngier } 496d011e4e6SMarc Zyngier 4973171a47aSMarc Zyngier static void its_encode_seq_num(struct its_cmd_block *cmd, u16 seq_num) 4983171a47aSMarc Zyngier { 4993171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], seq_num, 47, 32); 5003171a47aSMarc Zyngier } 5013171a47aSMarc Zyngier 5023171a47aSMarc Zyngier static void its_encode_its_list(struct its_cmd_block *cmd, u16 its_list) 5033171a47aSMarc Zyngier { 5043171a47aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], its_list, 15, 0); 5053171a47aSMarc Zyngier } 5063171a47aSMarc Zyngier 507eb78192bSMarc Zyngier static void its_encode_vpt_addr(struct its_cmd_block *cmd, u64 vpt_pa) 508eb78192bSMarc Zyngier { 50930ae9610SShanker Donthineni its_mask_encode(&cmd->raw_cmd[3], vpt_pa >> 16, 51, 16); 510eb78192bSMarc Zyngier } 511eb78192bSMarc Zyngier 512eb78192bSMarc Zyngier static void its_encode_vpt_size(struct its_cmd_block *cmd, u8 vpt_size) 513eb78192bSMarc Zyngier { 514eb78192bSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpt_size, 4, 0); 515eb78192bSMarc Zyngier } 516eb78192bSMarc Zyngier 51764edfaa9SMarc Zyngier static void its_encode_vconf_addr(struct its_cmd_block *cmd, u64 vconf_pa) 51864edfaa9SMarc Zyngier { 51964edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], vconf_pa >> 16, 51, 16); 52064edfaa9SMarc Zyngier } 52164edfaa9SMarc Zyngier 52264edfaa9SMarc Zyngier static void its_encode_alloc(struct its_cmd_block *cmd, bool alloc) 52364edfaa9SMarc Zyngier { 52464edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], alloc, 8, 8); 52564edfaa9SMarc Zyngier } 52664edfaa9SMarc Zyngier 52764edfaa9SMarc Zyngier static void its_encode_ptz(struct its_cmd_block *cmd, bool ptz) 52864edfaa9SMarc Zyngier { 52964edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], ptz, 9, 9); 53064edfaa9SMarc Zyngier } 53164edfaa9SMarc Zyngier 53264edfaa9SMarc Zyngier static void its_encode_vmapp_default_db(struct its_cmd_block *cmd, 53364edfaa9SMarc Zyngier u32 vpe_db_lpi) 53464edfaa9SMarc Zyngier { 53564edfaa9SMarc Zyngier its_mask_encode(&cmd->raw_cmd[1], vpe_db_lpi, 31, 0); 53664edfaa9SMarc Zyngier } 53764edfaa9SMarc Zyngier 538dd3f050aSMarc Zyngier static void its_encode_vmovp_default_db(struct its_cmd_block *cmd, 539dd3f050aSMarc Zyngier u32 vpe_db_lpi) 540dd3f050aSMarc Zyngier { 541dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[3], vpe_db_lpi, 31, 0); 542dd3f050aSMarc Zyngier } 543dd3f050aSMarc Zyngier 544dd3f050aSMarc Zyngier static void its_encode_db(struct its_cmd_block *cmd, bool db) 545dd3f050aSMarc Zyngier { 546dd3f050aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[2], db, 63, 63); 547dd3f050aSMarc Zyngier } 548dd3f050aSMarc Zyngier 549e252cf8aSMarc Zyngier static void its_encode_sgi_intid(struct its_cmd_block *cmd, u8 sgi) 550e252cf8aSMarc Zyngier { 551e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], sgi, 35, 32); 552e252cf8aSMarc Zyngier } 553e252cf8aSMarc Zyngier 554e252cf8aSMarc Zyngier static void its_encode_sgi_priority(struct its_cmd_block *cmd, u8 prio) 555e252cf8aSMarc Zyngier { 556e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], prio >> 4, 23, 20); 557e252cf8aSMarc Zyngier } 558e252cf8aSMarc Zyngier 559e252cf8aSMarc Zyngier static void its_encode_sgi_group(struct its_cmd_block *cmd, bool grp) 560e252cf8aSMarc Zyngier { 561e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], grp, 10, 10); 562e252cf8aSMarc Zyngier } 563e252cf8aSMarc Zyngier 564e252cf8aSMarc Zyngier static void its_encode_sgi_clear(struct its_cmd_block *cmd, bool clr) 565e252cf8aSMarc Zyngier { 566e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], clr, 9, 9); 567e252cf8aSMarc Zyngier } 568e252cf8aSMarc Zyngier 569e252cf8aSMarc Zyngier static void its_encode_sgi_enable(struct its_cmd_block *cmd, bool en) 570e252cf8aSMarc Zyngier { 571e252cf8aSMarc Zyngier its_mask_encode(&cmd->raw_cmd[0], en, 8, 8); 572e252cf8aSMarc Zyngier } 573e252cf8aSMarc Zyngier 574cc2d3216SMarc Zyngier static inline void its_fixup_cmd(struct its_cmd_block *cmd) 575cc2d3216SMarc Zyngier { 576cc2d3216SMarc Zyngier /* Let's fixup BE commands */ 5772bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[0] = cpu_to_le64(cmd->raw_cmd[0]); 5782bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[1] = cpu_to_le64(cmd->raw_cmd[1]); 5792bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[2] = cpu_to_le64(cmd->raw_cmd[2]); 5802bbdfcc5SBen Dooks (Codethink) cmd->raw_cmd_le[3] = cpu_to_le64(cmd->raw_cmd[3]); 581cc2d3216SMarc Zyngier } 582cc2d3216SMarc Zyngier 58367047f90SMarc Zyngier static struct its_collection *its_build_mapd_cmd(struct its_node *its, 58467047f90SMarc Zyngier struct its_cmd_block *cmd, 585cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 586cc2d3216SMarc Zyngier { 587cc2d3216SMarc Zyngier unsigned long itt_addr; 588c8481267SMarc Zyngier u8 size = ilog2(desc->its_mapd_cmd.dev->nr_ites); 589cc2d3216SMarc Zyngier 590cc2d3216SMarc Zyngier itt_addr = virt_to_phys(desc->its_mapd_cmd.dev->itt); 591cc2d3216SMarc Zyngier itt_addr = ALIGN(itt_addr, ITS_ITT_ALIGN); 592cc2d3216SMarc Zyngier 593cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPD); 594cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_mapd_cmd.dev->device_id); 595cc2d3216SMarc Zyngier its_encode_size(cmd, size - 1); 596cc2d3216SMarc Zyngier its_encode_itt(cmd, itt_addr); 597cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapd_cmd.valid); 598cc2d3216SMarc Zyngier 599cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 600cc2d3216SMarc Zyngier 601591e5becSMarc Zyngier return NULL; 602cc2d3216SMarc Zyngier } 603cc2d3216SMarc Zyngier 60467047f90SMarc Zyngier static struct its_collection *its_build_mapc_cmd(struct its_node *its, 60567047f90SMarc Zyngier struct its_cmd_block *cmd, 606cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 607cc2d3216SMarc Zyngier { 608cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPC); 609cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_mapc_cmd.col->col_id); 610cc2d3216SMarc Zyngier its_encode_target(cmd, desc->its_mapc_cmd.col->target_address); 611cc2d3216SMarc Zyngier its_encode_valid(cmd, desc->its_mapc_cmd.valid); 612cc2d3216SMarc Zyngier 613cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 614cc2d3216SMarc Zyngier 615cc2d3216SMarc Zyngier return desc->its_mapc_cmd.col; 616cc2d3216SMarc Zyngier } 617cc2d3216SMarc Zyngier 61867047f90SMarc Zyngier static struct its_collection *its_build_mapti_cmd(struct its_node *its, 61967047f90SMarc Zyngier struct its_cmd_block *cmd, 620cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 621cc2d3216SMarc Zyngier { 622591e5becSMarc Zyngier struct its_collection *col; 623591e5becSMarc Zyngier 6246a25ad3aSMarc Zyngier col = dev_event_to_col(desc->its_mapti_cmd.dev, 6256a25ad3aSMarc Zyngier desc->its_mapti_cmd.event_id); 626591e5becSMarc Zyngier 6276a25ad3aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MAPTI); 6286a25ad3aSMarc Zyngier its_encode_devid(cmd, desc->its_mapti_cmd.dev->device_id); 6296a25ad3aSMarc Zyngier its_encode_event_id(cmd, desc->its_mapti_cmd.event_id); 6306a25ad3aSMarc Zyngier its_encode_phys_id(cmd, desc->its_mapti_cmd.phys_id); 631591e5becSMarc Zyngier its_encode_collection(cmd, col->col_id); 632cc2d3216SMarc Zyngier 633cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 634cc2d3216SMarc Zyngier 63583559b47SMarc Zyngier return valid_col(col); 636cc2d3216SMarc Zyngier } 637cc2d3216SMarc Zyngier 63867047f90SMarc Zyngier static struct its_collection *its_build_movi_cmd(struct its_node *its, 63967047f90SMarc Zyngier struct its_cmd_block *cmd, 640cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 641cc2d3216SMarc Zyngier { 642591e5becSMarc Zyngier struct its_collection *col; 643591e5becSMarc Zyngier 644591e5becSMarc Zyngier col = dev_event_to_col(desc->its_movi_cmd.dev, 645591e5becSMarc Zyngier desc->its_movi_cmd.event_id); 646591e5becSMarc Zyngier 647cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_MOVI); 648cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 649591e5becSMarc Zyngier its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 650cc2d3216SMarc Zyngier its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 651cc2d3216SMarc Zyngier 652cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 653cc2d3216SMarc Zyngier 65483559b47SMarc Zyngier return valid_col(col); 655cc2d3216SMarc Zyngier } 656cc2d3216SMarc Zyngier 65767047f90SMarc Zyngier static struct its_collection *its_build_discard_cmd(struct its_node *its, 65867047f90SMarc Zyngier struct its_cmd_block *cmd, 659cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 660cc2d3216SMarc Zyngier { 661591e5becSMarc Zyngier struct its_collection *col; 662591e5becSMarc Zyngier 663591e5becSMarc Zyngier col = dev_event_to_col(desc->its_discard_cmd.dev, 664591e5becSMarc Zyngier desc->its_discard_cmd.event_id); 665591e5becSMarc Zyngier 666cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_DISCARD); 667cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 668cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 669cc2d3216SMarc Zyngier 670cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 671cc2d3216SMarc Zyngier 67283559b47SMarc Zyngier return valid_col(col); 673cc2d3216SMarc Zyngier } 674cc2d3216SMarc Zyngier 67567047f90SMarc Zyngier static struct its_collection *its_build_inv_cmd(struct its_node *its, 67667047f90SMarc Zyngier struct its_cmd_block *cmd, 677cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 678cc2d3216SMarc Zyngier { 679591e5becSMarc Zyngier struct its_collection *col; 680591e5becSMarc Zyngier 681591e5becSMarc Zyngier col = dev_event_to_col(desc->its_inv_cmd.dev, 682591e5becSMarc Zyngier desc->its_inv_cmd.event_id); 683591e5becSMarc Zyngier 684cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 685cc2d3216SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 686cc2d3216SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 687cc2d3216SMarc Zyngier 688cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 689cc2d3216SMarc Zyngier 69083559b47SMarc Zyngier return valid_col(col); 691cc2d3216SMarc Zyngier } 692cc2d3216SMarc Zyngier 69367047f90SMarc Zyngier static struct its_collection *its_build_int_cmd(struct its_node *its, 69467047f90SMarc Zyngier struct its_cmd_block *cmd, 6958d85dcedSMarc Zyngier struct its_cmd_desc *desc) 6968d85dcedSMarc Zyngier { 6978d85dcedSMarc Zyngier struct its_collection *col; 6988d85dcedSMarc Zyngier 6998d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_int_cmd.dev, 7008d85dcedSMarc Zyngier desc->its_int_cmd.event_id); 7018d85dcedSMarc Zyngier 7028d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 7038d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 7048d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 7058d85dcedSMarc Zyngier 7068d85dcedSMarc Zyngier its_fixup_cmd(cmd); 7078d85dcedSMarc Zyngier 70883559b47SMarc Zyngier return valid_col(col); 7098d85dcedSMarc Zyngier } 7108d85dcedSMarc Zyngier 71167047f90SMarc Zyngier static struct its_collection *its_build_clear_cmd(struct its_node *its, 71267047f90SMarc Zyngier struct its_cmd_block *cmd, 7138d85dcedSMarc Zyngier struct its_cmd_desc *desc) 7148d85dcedSMarc Zyngier { 7158d85dcedSMarc Zyngier struct its_collection *col; 7168d85dcedSMarc Zyngier 7178d85dcedSMarc Zyngier col = dev_event_to_col(desc->its_clear_cmd.dev, 7188d85dcedSMarc Zyngier desc->its_clear_cmd.event_id); 7198d85dcedSMarc Zyngier 7208d85dcedSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 7218d85dcedSMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 7228d85dcedSMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 7238d85dcedSMarc Zyngier 7248d85dcedSMarc Zyngier its_fixup_cmd(cmd); 7258d85dcedSMarc Zyngier 72683559b47SMarc Zyngier return valid_col(col); 7278d85dcedSMarc Zyngier } 7288d85dcedSMarc Zyngier 72967047f90SMarc Zyngier static struct its_collection *its_build_invall_cmd(struct its_node *its, 73067047f90SMarc Zyngier struct its_cmd_block *cmd, 731cc2d3216SMarc Zyngier struct its_cmd_desc *desc) 732cc2d3216SMarc Zyngier { 733cc2d3216SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVALL); 73410794522SZenghui Yu its_encode_collection(cmd, desc->its_invall_cmd.col->col_id); 735cc2d3216SMarc Zyngier 736cc2d3216SMarc Zyngier its_fixup_cmd(cmd); 737cc2d3216SMarc Zyngier 738cc2d3216SMarc Zyngier return NULL; 739cc2d3216SMarc Zyngier } 740cc2d3216SMarc Zyngier 74167047f90SMarc Zyngier static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, 74267047f90SMarc Zyngier struct its_cmd_block *cmd, 743eb78192bSMarc Zyngier struct its_cmd_desc *desc) 744eb78192bSMarc Zyngier { 745eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VINVALL); 746eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vinvall_cmd.vpe->vpe_id); 747eb78192bSMarc Zyngier 748eb78192bSMarc Zyngier its_fixup_cmd(cmd); 749eb78192bSMarc Zyngier 750205e065dSMarc Zyngier return valid_vpe(its, desc->its_vinvall_cmd.vpe); 751eb78192bSMarc Zyngier } 752eb78192bSMarc Zyngier 75367047f90SMarc Zyngier static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, 75467047f90SMarc Zyngier struct its_cmd_block *cmd, 755eb78192bSMarc Zyngier struct its_cmd_desc *desc) 756eb78192bSMarc Zyngier { 75764edfaa9SMarc Zyngier unsigned long vpt_addr, vconf_addr; 7585c9a882eSMarc Zyngier u64 target; 75964edfaa9SMarc Zyngier bool alloc; 760eb78192bSMarc Zyngier 761eb78192bSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPP); 762eb78192bSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id); 763eb78192bSMarc Zyngier its_encode_valid(cmd, desc->its_vmapp_cmd.valid); 76464edfaa9SMarc Zyngier 76564edfaa9SMarc Zyngier if (!desc->its_vmapp_cmd.valid) { 76664edfaa9SMarc Zyngier if (is_v4_1(its)) { 76764edfaa9SMarc Zyngier alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count); 76864edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 76964edfaa9SMarc Zyngier } 77064edfaa9SMarc Zyngier 77164edfaa9SMarc Zyngier goto out; 77264edfaa9SMarc Zyngier } 77364edfaa9SMarc Zyngier 77464edfaa9SMarc Zyngier vpt_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->vpt_page)); 77564edfaa9SMarc Zyngier target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; 77664edfaa9SMarc Zyngier 7775c9a882eSMarc Zyngier its_encode_target(cmd, target); 778eb78192bSMarc Zyngier its_encode_vpt_addr(cmd, vpt_addr); 779eb78192bSMarc Zyngier its_encode_vpt_size(cmd, LPI_NRBITS - 1); 780eb78192bSMarc Zyngier 78164edfaa9SMarc Zyngier if (!is_v4_1(its)) 78264edfaa9SMarc Zyngier goto out; 78364edfaa9SMarc Zyngier 78464edfaa9SMarc Zyngier vconf_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->its_vm->vprop_page)); 78564edfaa9SMarc Zyngier 78664edfaa9SMarc Zyngier alloc = !atomic_fetch_inc(&desc->its_vmapp_cmd.vpe->vmapp_count); 78764edfaa9SMarc Zyngier 78864edfaa9SMarc Zyngier its_encode_alloc(cmd, alloc); 78964edfaa9SMarc Zyngier 79064edfaa9SMarc Zyngier /* We can only signal PTZ when alloc==1. Why do we have two bits? */ 79164edfaa9SMarc Zyngier its_encode_ptz(cmd, alloc); 79264edfaa9SMarc Zyngier its_encode_vconf_addr(cmd, vconf_addr); 79364edfaa9SMarc Zyngier its_encode_vmapp_default_db(cmd, desc->its_vmapp_cmd.vpe->vpe_db_lpi); 79464edfaa9SMarc Zyngier 79564edfaa9SMarc Zyngier out: 796eb78192bSMarc Zyngier its_fixup_cmd(cmd); 797eb78192bSMarc Zyngier 798205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapp_cmd.vpe); 799eb78192bSMarc Zyngier } 800eb78192bSMarc Zyngier 80167047f90SMarc Zyngier static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, 80267047f90SMarc Zyngier struct its_cmd_block *cmd, 803d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 804d011e4e6SMarc Zyngier { 805d011e4e6SMarc Zyngier u32 db; 806d011e4e6SMarc Zyngier 8073858d4dfSMarc Zyngier if (!is_v4_1(its) && desc->its_vmapti_cmd.db_enabled) 808d011e4e6SMarc Zyngier db = desc->its_vmapti_cmd.vpe->vpe_db_lpi; 809d011e4e6SMarc Zyngier else 810d011e4e6SMarc Zyngier db = 1023; 811d011e4e6SMarc Zyngier 812d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMAPTI); 813d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmapti_cmd.dev->device_id); 814d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmapti_cmd.vpe->vpe_id); 815d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmapti_cmd.event_id); 816d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 817d011e4e6SMarc Zyngier its_encode_virt_id(cmd, desc->its_vmapti_cmd.virt_id); 818d011e4e6SMarc Zyngier 819d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 820d011e4e6SMarc Zyngier 821205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmapti_cmd.vpe); 822d011e4e6SMarc Zyngier } 823d011e4e6SMarc Zyngier 82467047f90SMarc Zyngier static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, 82567047f90SMarc Zyngier struct its_cmd_block *cmd, 826d011e4e6SMarc Zyngier struct its_cmd_desc *desc) 827d011e4e6SMarc Zyngier { 828d011e4e6SMarc Zyngier u32 db; 829d011e4e6SMarc Zyngier 8303858d4dfSMarc Zyngier if (!is_v4_1(its) && desc->its_vmovi_cmd.db_enabled) 831d011e4e6SMarc Zyngier db = desc->its_vmovi_cmd.vpe->vpe_db_lpi; 832d011e4e6SMarc Zyngier else 833d011e4e6SMarc Zyngier db = 1023; 834d011e4e6SMarc Zyngier 835d011e4e6SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVI); 836d011e4e6SMarc Zyngier its_encode_devid(cmd, desc->its_vmovi_cmd.dev->device_id); 837d011e4e6SMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovi_cmd.vpe->vpe_id); 838d011e4e6SMarc Zyngier its_encode_event_id(cmd, desc->its_vmovi_cmd.event_id); 839d011e4e6SMarc Zyngier its_encode_db_phys_id(cmd, db); 840d011e4e6SMarc Zyngier its_encode_db_valid(cmd, true); 841d011e4e6SMarc Zyngier 842d011e4e6SMarc Zyngier its_fixup_cmd(cmd); 843d011e4e6SMarc Zyngier 844205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovi_cmd.vpe); 845d011e4e6SMarc Zyngier } 846d011e4e6SMarc Zyngier 84767047f90SMarc Zyngier static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, 84867047f90SMarc Zyngier struct its_cmd_block *cmd, 8493171a47aSMarc Zyngier struct its_cmd_desc *desc) 8503171a47aSMarc Zyngier { 8515c9a882eSMarc Zyngier u64 target; 8525c9a882eSMarc Zyngier 8535c9a882eSMarc Zyngier target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; 8543171a47aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VMOVP); 8553171a47aSMarc Zyngier its_encode_seq_num(cmd, desc->its_vmovp_cmd.seq_num); 8563171a47aSMarc Zyngier its_encode_its_list(cmd, desc->its_vmovp_cmd.its_list); 8573171a47aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vmovp_cmd.vpe->vpe_id); 8585c9a882eSMarc Zyngier its_encode_target(cmd, target); 8593171a47aSMarc Zyngier 860dd3f050aSMarc Zyngier if (is_v4_1(its)) { 861dd3f050aSMarc Zyngier its_encode_db(cmd, true); 862dd3f050aSMarc Zyngier its_encode_vmovp_default_db(cmd, desc->its_vmovp_cmd.vpe->vpe_db_lpi); 863dd3f050aSMarc Zyngier } 864dd3f050aSMarc Zyngier 8653171a47aSMarc Zyngier its_fixup_cmd(cmd); 8663171a47aSMarc Zyngier 867205e065dSMarc Zyngier return valid_vpe(its, desc->its_vmovp_cmd.vpe); 8683171a47aSMarc Zyngier } 8693171a47aSMarc Zyngier 87028614696SMarc Zyngier static struct its_vpe *its_build_vinv_cmd(struct its_node *its, 87128614696SMarc Zyngier struct its_cmd_block *cmd, 87228614696SMarc Zyngier struct its_cmd_desc *desc) 87328614696SMarc Zyngier { 87428614696SMarc Zyngier struct its_vlpi_map *map; 87528614696SMarc Zyngier 87628614696SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_inv_cmd.dev, 87728614696SMarc Zyngier desc->its_inv_cmd.event_id); 87828614696SMarc Zyngier 87928614696SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INV); 88028614696SMarc Zyngier its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 88128614696SMarc Zyngier its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 88228614696SMarc Zyngier 88328614696SMarc Zyngier its_fixup_cmd(cmd); 88428614696SMarc Zyngier 88528614696SMarc Zyngier return valid_vpe(its, map->vpe); 88628614696SMarc Zyngier } 88728614696SMarc Zyngier 888ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vint_cmd(struct its_node *its, 889ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 890ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 891ed0e4aa9SMarc Zyngier { 892ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 893ed0e4aa9SMarc Zyngier 894ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_int_cmd.dev, 895ed0e4aa9SMarc Zyngier desc->its_int_cmd.event_id); 896ed0e4aa9SMarc Zyngier 897ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INT); 898ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_int_cmd.dev->device_id); 899ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_int_cmd.event_id); 900ed0e4aa9SMarc Zyngier 901ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 902ed0e4aa9SMarc Zyngier 903ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 904ed0e4aa9SMarc Zyngier } 905ed0e4aa9SMarc Zyngier 906ed0e4aa9SMarc Zyngier static struct its_vpe *its_build_vclear_cmd(struct its_node *its, 907ed0e4aa9SMarc Zyngier struct its_cmd_block *cmd, 908ed0e4aa9SMarc Zyngier struct its_cmd_desc *desc) 909ed0e4aa9SMarc Zyngier { 910ed0e4aa9SMarc Zyngier struct its_vlpi_map *map; 911ed0e4aa9SMarc Zyngier 912ed0e4aa9SMarc Zyngier map = dev_event_to_vlpi_map(desc->its_clear_cmd.dev, 913ed0e4aa9SMarc Zyngier desc->its_clear_cmd.event_id); 914ed0e4aa9SMarc Zyngier 915ed0e4aa9SMarc Zyngier its_encode_cmd(cmd, GITS_CMD_CLEAR); 916ed0e4aa9SMarc Zyngier its_encode_devid(cmd, desc->its_clear_cmd.dev->device_id); 917ed0e4aa9SMarc Zyngier its_encode_event_id(cmd, desc->its_clear_cmd.event_id); 918ed0e4aa9SMarc Zyngier 919ed0e4aa9SMarc Zyngier its_fixup_cmd(cmd); 920ed0e4aa9SMarc Zyngier 921ed0e4aa9SMarc Zyngier return valid_vpe(its, map->vpe); 922ed0e4aa9SMarc Zyngier } 923ed0e4aa9SMarc Zyngier 924d97c97baSMarc Zyngier static struct its_vpe *its_build_invdb_cmd(struct its_node *its, 925d97c97baSMarc Zyngier struct its_cmd_block *cmd, 926d97c97baSMarc Zyngier struct its_cmd_desc *desc) 927d97c97baSMarc Zyngier { 928d97c97baSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 929d97c97baSMarc Zyngier return NULL; 930d97c97baSMarc Zyngier 931d97c97baSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_INVDB); 932d97c97baSMarc Zyngier its_encode_vpeid(cmd, desc->its_invdb_cmd.vpe->vpe_id); 933d97c97baSMarc Zyngier 934d97c97baSMarc Zyngier its_fixup_cmd(cmd); 935d97c97baSMarc Zyngier 936d97c97baSMarc Zyngier return valid_vpe(its, desc->its_invdb_cmd.vpe); 937d97c97baSMarc Zyngier } 938d97c97baSMarc Zyngier 939e252cf8aSMarc Zyngier static struct its_vpe *its_build_vsgi_cmd(struct its_node *its, 940e252cf8aSMarc Zyngier struct its_cmd_block *cmd, 941e252cf8aSMarc Zyngier struct its_cmd_desc *desc) 942e252cf8aSMarc Zyngier { 943e252cf8aSMarc Zyngier if (WARN_ON(!is_v4_1(its))) 944e252cf8aSMarc Zyngier return NULL; 945e252cf8aSMarc Zyngier 946e252cf8aSMarc Zyngier its_encode_cmd(cmd, GITS_CMD_VSGI); 947e252cf8aSMarc Zyngier its_encode_vpeid(cmd, desc->its_vsgi_cmd.vpe->vpe_id); 948e252cf8aSMarc Zyngier its_encode_sgi_intid(cmd, desc->its_vsgi_cmd.sgi); 949e252cf8aSMarc Zyngier its_encode_sgi_priority(cmd, desc->its_vsgi_cmd.priority); 950e252cf8aSMarc Zyngier its_encode_sgi_group(cmd, desc->its_vsgi_cmd.group); 951e252cf8aSMarc Zyngier its_encode_sgi_clear(cmd, desc->its_vsgi_cmd.clear); 952e252cf8aSMarc Zyngier its_encode_sgi_enable(cmd, desc->its_vsgi_cmd.enable); 953e252cf8aSMarc Zyngier 954e252cf8aSMarc Zyngier its_fixup_cmd(cmd); 955e252cf8aSMarc Zyngier 956e252cf8aSMarc Zyngier return valid_vpe(its, desc->its_vsgi_cmd.vpe); 957e252cf8aSMarc Zyngier } 958e252cf8aSMarc Zyngier 959cc2d3216SMarc Zyngier static u64 its_cmd_ptr_to_offset(struct its_node *its, 960cc2d3216SMarc Zyngier struct its_cmd_block *ptr) 961cc2d3216SMarc Zyngier { 962cc2d3216SMarc Zyngier return (ptr - its->cmd_base) * sizeof(*ptr); 963cc2d3216SMarc Zyngier } 964cc2d3216SMarc Zyngier 965cc2d3216SMarc Zyngier static int its_queue_full(struct its_node *its) 966cc2d3216SMarc Zyngier { 967cc2d3216SMarc Zyngier int widx; 968cc2d3216SMarc Zyngier int ridx; 969cc2d3216SMarc Zyngier 970cc2d3216SMarc Zyngier widx = its->cmd_write - its->cmd_base; 971cc2d3216SMarc Zyngier ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); 972cc2d3216SMarc Zyngier 973cc2d3216SMarc Zyngier /* This is incredibly unlikely to happen, unless the ITS locks up. */ 974cc2d3216SMarc Zyngier if (((widx + 1) % ITS_CMD_QUEUE_NR_ENTRIES) == ridx) 975cc2d3216SMarc Zyngier return 1; 976cc2d3216SMarc Zyngier 977cc2d3216SMarc Zyngier return 0; 978cc2d3216SMarc Zyngier } 979cc2d3216SMarc Zyngier 980cc2d3216SMarc Zyngier static struct its_cmd_block *its_allocate_entry(struct its_node *its) 981cc2d3216SMarc Zyngier { 982cc2d3216SMarc Zyngier struct its_cmd_block *cmd; 983cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 984cc2d3216SMarc Zyngier 985cc2d3216SMarc Zyngier while (its_queue_full(its)) { 986cc2d3216SMarc Zyngier count--; 987cc2d3216SMarc Zyngier if (!count) { 988cc2d3216SMarc Zyngier pr_err_ratelimited("ITS queue not draining\n"); 989cc2d3216SMarc Zyngier return NULL; 990cc2d3216SMarc Zyngier } 991cc2d3216SMarc Zyngier cpu_relax(); 992cc2d3216SMarc Zyngier udelay(1); 993cc2d3216SMarc Zyngier } 994cc2d3216SMarc Zyngier 995cc2d3216SMarc Zyngier cmd = its->cmd_write++; 996cc2d3216SMarc Zyngier 997cc2d3216SMarc Zyngier /* Handle queue wrapping */ 998cc2d3216SMarc Zyngier if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) 999cc2d3216SMarc Zyngier its->cmd_write = its->cmd_base; 1000cc2d3216SMarc Zyngier 100134d677a9SMarc Zyngier /* Clear command */ 100234d677a9SMarc Zyngier cmd->raw_cmd[0] = 0; 100334d677a9SMarc Zyngier cmd->raw_cmd[1] = 0; 100434d677a9SMarc Zyngier cmd->raw_cmd[2] = 0; 100534d677a9SMarc Zyngier cmd->raw_cmd[3] = 0; 100634d677a9SMarc Zyngier 1007cc2d3216SMarc Zyngier return cmd; 1008cc2d3216SMarc Zyngier } 1009cc2d3216SMarc Zyngier 1010cc2d3216SMarc Zyngier static struct its_cmd_block *its_post_commands(struct its_node *its) 1011cc2d3216SMarc Zyngier { 1012cc2d3216SMarc Zyngier u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); 1013cc2d3216SMarc Zyngier 1014cc2d3216SMarc Zyngier writel_relaxed(wr, its->base + GITS_CWRITER); 1015cc2d3216SMarc Zyngier 1016cc2d3216SMarc Zyngier return its->cmd_write; 1017cc2d3216SMarc Zyngier } 1018cc2d3216SMarc Zyngier 1019cc2d3216SMarc Zyngier static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) 1020cc2d3216SMarc Zyngier { 1021cc2d3216SMarc Zyngier /* 1022cc2d3216SMarc Zyngier * Make sure the commands written to memory are observable by 1023cc2d3216SMarc Zyngier * the ITS. 1024cc2d3216SMarc Zyngier */ 1025cc2d3216SMarc Zyngier if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) 1026328191c0SVladimir Murzin gic_flush_dcache_to_poc(cmd, sizeof(*cmd)); 1027cc2d3216SMarc Zyngier else 1028cc2d3216SMarc Zyngier dsb(ishst); 1029cc2d3216SMarc Zyngier } 1030cc2d3216SMarc Zyngier 1031a19b462fSMarc Zyngier static int its_wait_for_range_completion(struct its_node *its, 1032a050fa54SHeyi Guo u64 prev_idx, 1033cc2d3216SMarc Zyngier struct its_cmd_block *to) 1034cc2d3216SMarc Zyngier { 1035a050fa54SHeyi Guo u64 rd_idx, to_idx, linear_idx; 1036cc2d3216SMarc Zyngier u32 count = 1000000; /* 1s! */ 1037cc2d3216SMarc Zyngier 1038a050fa54SHeyi Guo /* Linearize to_idx if the command set has wrapped around */ 1039cc2d3216SMarc Zyngier to_idx = its_cmd_ptr_to_offset(its, to); 1040a050fa54SHeyi Guo if (to_idx < prev_idx) 1041a050fa54SHeyi Guo to_idx += ITS_CMD_QUEUE_SZ; 1042a050fa54SHeyi Guo 1043a050fa54SHeyi Guo linear_idx = prev_idx; 1044cc2d3216SMarc Zyngier 1045cc2d3216SMarc Zyngier while (1) { 1046a050fa54SHeyi Guo s64 delta; 1047a050fa54SHeyi Guo 1048cc2d3216SMarc Zyngier rd_idx = readl_relaxed(its->base + GITS_CREADR); 10499bdd8b1cSMarc Zyngier 1050a050fa54SHeyi Guo /* 1051a050fa54SHeyi Guo * Compute the read pointer progress, taking the 1052a050fa54SHeyi Guo * potential wrap-around into account. 1053a050fa54SHeyi Guo */ 1054a050fa54SHeyi Guo delta = rd_idx - prev_idx; 1055a050fa54SHeyi Guo if (rd_idx < prev_idx) 1056a050fa54SHeyi Guo delta += ITS_CMD_QUEUE_SZ; 10579bdd8b1cSMarc Zyngier 1058a050fa54SHeyi Guo linear_idx += delta; 1059a050fa54SHeyi Guo if (linear_idx >= to_idx) 1060cc2d3216SMarc Zyngier break; 1061cc2d3216SMarc Zyngier 1062cc2d3216SMarc Zyngier count--; 1063cc2d3216SMarc Zyngier if (!count) { 1064a050fa54SHeyi Guo pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", 1065a050fa54SHeyi Guo to_idx, linear_idx); 1066a19b462fSMarc Zyngier return -1; 1067cc2d3216SMarc Zyngier } 1068a050fa54SHeyi Guo prev_idx = rd_idx; 1069cc2d3216SMarc Zyngier cpu_relax(); 1070cc2d3216SMarc Zyngier udelay(1); 1071cc2d3216SMarc Zyngier } 1072a19b462fSMarc Zyngier 1073a19b462fSMarc Zyngier return 0; 1074cc2d3216SMarc Zyngier } 1075cc2d3216SMarc Zyngier 1076e4f9094bSMarc Zyngier /* Warning, macro hell follows */ 1077e4f9094bSMarc Zyngier #define BUILD_SINGLE_CMD_FUNC(name, buildtype, synctype, buildfn) \ 1078e4f9094bSMarc Zyngier void name(struct its_node *its, \ 1079e4f9094bSMarc Zyngier buildtype builder, \ 1080e4f9094bSMarc Zyngier struct its_cmd_desc *desc) \ 1081e4f9094bSMarc Zyngier { \ 1082e4f9094bSMarc Zyngier struct its_cmd_block *cmd, *sync_cmd, *next_cmd; \ 1083e4f9094bSMarc Zyngier synctype *sync_obj; \ 1084e4f9094bSMarc Zyngier unsigned long flags; \ 1085a050fa54SHeyi Guo u64 rd_idx; \ 1086e4f9094bSMarc Zyngier \ 1087e4f9094bSMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); \ 1088e4f9094bSMarc Zyngier \ 1089e4f9094bSMarc Zyngier cmd = its_allocate_entry(its); \ 1090e4f9094bSMarc Zyngier if (!cmd) { /* We're soooooo screewed... */ \ 1091e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1092e4f9094bSMarc Zyngier return; \ 1093e4f9094bSMarc Zyngier } \ 109467047f90SMarc Zyngier sync_obj = builder(its, cmd, desc); \ 1095e4f9094bSMarc Zyngier its_flush_cmd(its, cmd); \ 1096e4f9094bSMarc Zyngier \ 1097e4f9094bSMarc Zyngier if (sync_obj) { \ 1098e4f9094bSMarc Zyngier sync_cmd = its_allocate_entry(its); \ 1099e4f9094bSMarc Zyngier if (!sync_cmd) \ 1100e4f9094bSMarc Zyngier goto post; \ 1101e4f9094bSMarc Zyngier \ 110267047f90SMarc Zyngier buildfn(its, sync_cmd, sync_obj); \ 1103e4f9094bSMarc Zyngier its_flush_cmd(its, sync_cmd); \ 1104e4f9094bSMarc Zyngier } \ 1105e4f9094bSMarc Zyngier \ 1106e4f9094bSMarc Zyngier post: \ 1107a050fa54SHeyi Guo rd_idx = readl_relaxed(its->base + GITS_CREADR); \ 1108e4f9094bSMarc Zyngier next_cmd = its_post_commands(its); \ 1109e4f9094bSMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); \ 1110e4f9094bSMarc Zyngier \ 1111a050fa54SHeyi Guo if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \ 1112a19b462fSMarc Zyngier pr_err_ratelimited("ITS cmd %ps failed\n", builder); \ 1113e4f9094bSMarc Zyngier } 1114e4f9094bSMarc Zyngier 111567047f90SMarc Zyngier static void its_build_sync_cmd(struct its_node *its, 111667047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1117e4f9094bSMarc Zyngier struct its_collection *sync_col) 1118cc2d3216SMarc Zyngier { 1119cc2d3216SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_SYNC); 1120cc2d3216SMarc Zyngier its_encode_target(sync_cmd, sync_col->target_address); 1121e4f9094bSMarc Zyngier 1122cc2d3216SMarc Zyngier its_fixup_cmd(sync_cmd); 1123cc2d3216SMarc Zyngier } 1124cc2d3216SMarc Zyngier 1125e4f9094bSMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_command, its_cmd_builder_t, 1126e4f9094bSMarc Zyngier struct its_collection, its_build_sync_cmd) 1127cc2d3216SMarc Zyngier 112867047f90SMarc Zyngier static void its_build_vsync_cmd(struct its_node *its, 112967047f90SMarc Zyngier struct its_cmd_block *sync_cmd, 1130d011e4e6SMarc Zyngier struct its_vpe *sync_vpe) 1131d011e4e6SMarc Zyngier { 1132d011e4e6SMarc Zyngier its_encode_cmd(sync_cmd, GITS_CMD_VSYNC); 1133d011e4e6SMarc Zyngier its_encode_vpeid(sync_cmd, sync_vpe->vpe_id); 1134d011e4e6SMarc Zyngier 1135d011e4e6SMarc Zyngier its_fixup_cmd(sync_cmd); 1136d011e4e6SMarc Zyngier } 1137d011e4e6SMarc Zyngier 1138d011e4e6SMarc Zyngier static BUILD_SINGLE_CMD_FUNC(its_send_single_vcommand, its_cmd_vbuilder_t, 1139d011e4e6SMarc Zyngier struct its_vpe, its_build_vsync_cmd) 1140d011e4e6SMarc Zyngier 11418d85dcedSMarc Zyngier static void its_send_int(struct its_device *dev, u32 event_id) 11428d85dcedSMarc Zyngier { 11438d85dcedSMarc Zyngier struct its_cmd_desc desc; 11448d85dcedSMarc Zyngier 11458d85dcedSMarc Zyngier desc.its_int_cmd.dev = dev; 11468d85dcedSMarc Zyngier desc.its_int_cmd.event_id = event_id; 11478d85dcedSMarc Zyngier 11488d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_int_cmd, &desc); 11498d85dcedSMarc Zyngier } 11508d85dcedSMarc Zyngier 11518d85dcedSMarc Zyngier static void its_send_clear(struct its_device *dev, u32 event_id) 11528d85dcedSMarc Zyngier { 11538d85dcedSMarc Zyngier struct its_cmd_desc desc; 11548d85dcedSMarc Zyngier 11558d85dcedSMarc Zyngier desc.its_clear_cmd.dev = dev; 11568d85dcedSMarc Zyngier desc.its_clear_cmd.event_id = event_id; 11578d85dcedSMarc Zyngier 11588d85dcedSMarc Zyngier its_send_single_command(dev->its, its_build_clear_cmd, &desc); 1159cc2d3216SMarc Zyngier } 1160cc2d3216SMarc Zyngier 1161cc2d3216SMarc Zyngier static void its_send_inv(struct its_device *dev, u32 event_id) 1162cc2d3216SMarc Zyngier { 1163cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1164cc2d3216SMarc Zyngier 1165cc2d3216SMarc Zyngier desc.its_inv_cmd.dev = dev; 1166cc2d3216SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 1167cc2d3216SMarc Zyngier 1168cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_inv_cmd, &desc); 1169cc2d3216SMarc Zyngier } 1170cc2d3216SMarc Zyngier 1171cc2d3216SMarc Zyngier static void its_send_mapd(struct its_device *dev, int valid) 1172cc2d3216SMarc Zyngier { 1173cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1174cc2d3216SMarc Zyngier 1175cc2d3216SMarc Zyngier desc.its_mapd_cmd.dev = dev; 1176cc2d3216SMarc Zyngier desc.its_mapd_cmd.valid = !!valid; 1177cc2d3216SMarc Zyngier 1178cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_mapd_cmd, &desc); 1179cc2d3216SMarc Zyngier } 1180cc2d3216SMarc Zyngier 1181cc2d3216SMarc Zyngier static void its_send_mapc(struct its_node *its, struct its_collection *col, 1182cc2d3216SMarc Zyngier int valid) 1183cc2d3216SMarc Zyngier { 1184cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1185cc2d3216SMarc Zyngier 1186cc2d3216SMarc Zyngier desc.its_mapc_cmd.col = col; 1187cc2d3216SMarc Zyngier desc.its_mapc_cmd.valid = !!valid; 1188cc2d3216SMarc Zyngier 1189cc2d3216SMarc Zyngier its_send_single_command(its, its_build_mapc_cmd, &desc); 1190cc2d3216SMarc Zyngier } 1191cc2d3216SMarc Zyngier 11926a25ad3aSMarc Zyngier static void its_send_mapti(struct its_device *dev, u32 irq_id, u32 id) 1193cc2d3216SMarc Zyngier { 1194cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1195cc2d3216SMarc Zyngier 11966a25ad3aSMarc Zyngier desc.its_mapti_cmd.dev = dev; 11976a25ad3aSMarc Zyngier desc.its_mapti_cmd.phys_id = irq_id; 11986a25ad3aSMarc Zyngier desc.its_mapti_cmd.event_id = id; 1199cc2d3216SMarc Zyngier 12006a25ad3aSMarc Zyngier its_send_single_command(dev->its, its_build_mapti_cmd, &desc); 1201cc2d3216SMarc Zyngier } 1202cc2d3216SMarc Zyngier 1203cc2d3216SMarc Zyngier static void its_send_movi(struct its_device *dev, 1204cc2d3216SMarc Zyngier struct its_collection *col, u32 id) 1205cc2d3216SMarc Zyngier { 1206cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1207cc2d3216SMarc Zyngier 1208cc2d3216SMarc Zyngier desc.its_movi_cmd.dev = dev; 1209cc2d3216SMarc Zyngier desc.its_movi_cmd.col = col; 1210591e5becSMarc Zyngier desc.its_movi_cmd.event_id = id; 1211cc2d3216SMarc Zyngier 1212cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_movi_cmd, &desc); 1213cc2d3216SMarc Zyngier } 1214cc2d3216SMarc Zyngier 1215cc2d3216SMarc Zyngier static void its_send_discard(struct its_device *dev, u32 id) 1216cc2d3216SMarc Zyngier { 1217cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1218cc2d3216SMarc Zyngier 1219cc2d3216SMarc Zyngier desc.its_discard_cmd.dev = dev; 1220cc2d3216SMarc Zyngier desc.its_discard_cmd.event_id = id; 1221cc2d3216SMarc Zyngier 1222cc2d3216SMarc Zyngier its_send_single_command(dev->its, its_build_discard_cmd, &desc); 1223cc2d3216SMarc Zyngier } 1224cc2d3216SMarc Zyngier 1225cc2d3216SMarc Zyngier static void its_send_invall(struct its_node *its, struct its_collection *col) 1226cc2d3216SMarc Zyngier { 1227cc2d3216SMarc Zyngier struct its_cmd_desc desc; 1228cc2d3216SMarc Zyngier 1229cc2d3216SMarc Zyngier desc.its_invall_cmd.col = col; 1230cc2d3216SMarc Zyngier 1231cc2d3216SMarc Zyngier its_send_single_command(its, its_build_invall_cmd, &desc); 1232cc2d3216SMarc Zyngier } 1233c48ed51cSMarc Zyngier 1234d011e4e6SMarc Zyngier static void its_send_vmapti(struct its_device *dev, u32 id) 1235d011e4e6SMarc Zyngier { 1236c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1237d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1238d011e4e6SMarc Zyngier 1239d011e4e6SMarc Zyngier desc.its_vmapti_cmd.vpe = map->vpe; 1240d011e4e6SMarc Zyngier desc.its_vmapti_cmd.dev = dev; 1241d011e4e6SMarc Zyngier desc.its_vmapti_cmd.virt_id = map->vintid; 1242d011e4e6SMarc Zyngier desc.its_vmapti_cmd.event_id = id; 1243d011e4e6SMarc Zyngier desc.its_vmapti_cmd.db_enabled = map->db_enabled; 1244d011e4e6SMarc Zyngier 1245d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); 1246d011e4e6SMarc Zyngier } 1247d011e4e6SMarc Zyngier 1248d011e4e6SMarc Zyngier static void its_send_vmovi(struct its_device *dev, u32 id) 1249d011e4e6SMarc Zyngier { 1250c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = dev_event_to_vlpi_map(dev, id); 1251d011e4e6SMarc Zyngier struct its_cmd_desc desc; 1252d011e4e6SMarc Zyngier 1253d011e4e6SMarc Zyngier desc.its_vmovi_cmd.vpe = map->vpe; 1254d011e4e6SMarc Zyngier desc.its_vmovi_cmd.dev = dev; 1255d011e4e6SMarc Zyngier desc.its_vmovi_cmd.event_id = id; 1256d011e4e6SMarc Zyngier desc.its_vmovi_cmd.db_enabled = map->db_enabled; 1257d011e4e6SMarc Zyngier 1258d011e4e6SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); 1259d011e4e6SMarc Zyngier } 1260d011e4e6SMarc Zyngier 126175fd951bSMarc Zyngier static void its_send_vmapp(struct its_node *its, 126275fd951bSMarc Zyngier struct its_vpe *vpe, bool valid) 1263eb78192bSMarc Zyngier { 1264eb78192bSMarc Zyngier struct its_cmd_desc desc; 1265eb78192bSMarc Zyngier 1266eb78192bSMarc Zyngier desc.its_vmapp_cmd.vpe = vpe; 1267eb78192bSMarc Zyngier desc.its_vmapp_cmd.valid = valid; 1268eb78192bSMarc Zyngier desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; 126975fd951bSMarc Zyngier 1270eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); 1271eb78192bSMarc Zyngier } 1272eb78192bSMarc Zyngier 12733171a47aSMarc Zyngier static void its_send_vmovp(struct its_vpe *vpe) 12743171a47aSMarc Zyngier { 127584243125SZenghui Yu struct its_cmd_desc desc = {}; 12763171a47aSMarc Zyngier struct its_node *its; 12773171a47aSMarc Zyngier unsigned long flags; 12783171a47aSMarc Zyngier int col_id = vpe->col_idx; 12793171a47aSMarc Zyngier 12803171a47aSMarc Zyngier desc.its_vmovp_cmd.vpe = vpe; 12813171a47aSMarc Zyngier 12823171a47aSMarc Zyngier if (!its_list_map) { 12833171a47aSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 12843171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 12853171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 12863171a47aSMarc Zyngier return; 12873171a47aSMarc Zyngier } 12883171a47aSMarc Zyngier 12893171a47aSMarc Zyngier /* 12903171a47aSMarc Zyngier * Yet another marvel of the architecture. If using the 12913171a47aSMarc Zyngier * its_list "feature", we need to make sure that all ITSs 12923171a47aSMarc Zyngier * receive all VMOVP commands in the same order. The only way 12933171a47aSMarc Zyngier * to guarantee this is to make vmovp a serialization point. 12943171a47aSMarc Zyngier * 12953171a47aSMarc Zyngier * Wall <-- Head. 12963171a47aSMarc Zyngier */ 12973171a47aSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 12983171a47aSMarc Zyngier 12993171a47aSMarc Zyngier desc.its_vmovp_cmd.seq_num = vmovp_seq_num++; 130084243125SZenghui Yu desc.its_vmovp_cmd.its_list = get_its_list(vpe->its_vm); 13013171a47aSMarc Zyngier 13023171a47aSMarc Zyngier /* Emit VMOVPs */ 13033171a47aSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 13040dd57fedSMarc Zyngier if (!is_v4(its)) 13053171a47aSMarc Zyngier continue; 13063171a47aSMarc Zyngier 1307009384b3SMarc Zyngier if (!require_its_list_vmovp(vpe->its_vm, its)) 13082247e1bfSMarc Zyngier continue; 13092247e1bfSMarc Zyngier 13103171a47aSMarc Zyngier desc.its_vmovp_cmd.col = &its->collections[col_id]; 13113171a47aSMarc Zyngier its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); 13123171a47aSMarc Zyngier } 13133171a47aSMarc Zyngier 13143171a47aSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 13153171a47aSMarc Zyngier } 13163171a47aSMarc Zyngier 131740619a2eSMarc Zyngier static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) 1318eb78192bSMarc Zyngier { 1319eb78192bSMarc Zyngier struct its_cmd_desc desc; 1320eb78192bSMarc Zyngier 1321eb78192bSMarc Zyngier desc.its_vinvall_cmd.vpe = vpe; 1322eb78192bSMarc Zyngier its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); 1323eb78192bSMarc Zyngier } 1324eb78192bSMarc Zyngier 132528614696SMarc Zyngier static void its_send_vinv(struct its_device *dev, u32 event_id) 132628614696SMarc Zyngier { 132728614696SMarc Zyngier struct its_cmd_desc desc; 132828614696SMarc Zyngier 132928614696SMarc Zyngier /* 133028614696SMarc Zyngier * There is no real VINV command. This is just a normal INV, 133128614696SMarc Zyngier * with a VSYNC instead of a SYNC. 133228614696SMarc Zyngier */ 133328614696SMarc Zyngier desc.its_inv_cmd.dev = dev; 133428614696SMarc Zyngier desc.its_inv_cmd.event_id = event_id; 133528614696SMarc Zyngier 133628614696SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); 133728614696SMarc Zyngier } 133828614696SMarc Zyngier 1339ed0e4aa9SMarc Zyngier static void its_send_vint(struct its_device *dev, u32 event_id) 1340ed0e4aa9SMarc Zyngier { 1341ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1342ed0e4aa9SMarc Zyngier 1343ed0e4aa9SMarc Zyngier /* 1344ed0e4aa9SMarc Zyngier * There is no real VINT command. This is just a normal INT, 1345ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1346ed0e4aa9SMarc Zyngier */ 1347ed0e4aa9SMarc Zyngier desc.its_int_cmd.dev = dev; 1348ed0e4aa9SMarc Zyngier desc.its_int_cmd.event_id = event_id; 1349ed0e4aa9SMarc Zyngier 1350ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); 1351ed0e4aa9SMarc Zyngier } 1352ed0e4aa9SMarc Zyngier 1353ed0e4aa9SMarc Zyngier static void its_send_vclear(struct its_device *dev, u32 event_id) 1354ed0e4aa9SMarc Zyngier { 1355ed0e4aa9SMarc Zyngier struct its_cmd_desc desc; 1356ed0e4aa9SMarc Zyngier 1357ed0e4aa9SMarc Zyngier /* 1358ed0e4aa9SMarc Zyngier * There is no real VCLEAR command. This is just a normal CLEAR, 1359ed0e4aa9SMarc Zyngier * with a VSYNC instead of a SYNC. 1360ed0e4aa9SMarc Zyngier */ 1361ed0e4aa9SMarc Zyngier desc.its_clear_cmd.dev = dev; 1362ed0e4aa9SMarc Zyngier desc.its_clear_cmd.event_id = event_id; 1363ed0e4aa9SMarc Zyngier 1364ed0e4aa9SMarc Zyngier its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); 1365ed0e4aa9SMarc Zyngier } 1366ed0e4aa9SMarc Zyngier 1367d97c97baSMarc Zyngier static void its_send_invdb(struct its_node *its, struct its_vpe *vpe) 1368d97c97baSMarc Zyngier { 1369d97c97baSMarc Zyngier struct its_cmd_desc desc; 1370d97c97baSMarc Zyngier 1371d97c97baSMarc Zyngier desc.its_invdb_cmd.vpe = vpe; 1372d97c97baSMarc Zyngier its_send_single_vcommand(its, its_build_invdb_cmd, &desc); 1373d97c97baSMarc Zyngier } 1374d97c97baSMarc Zyngier 1375c48ed51cSMarc Zyngier /* 1376c48ed51cSMarc Zyngier * irqchip functions - assumes MSI, mostly. 1377c48ed51cSMarc Zyngier */ 1378015ec038SMarc Zyngier static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) 1379c48ed51cSMarc Zyngier { 1380c1d4d5cdSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1381015ec038SMarc Zyngier irq_hw_number_t hwirq; 1382e1a2e201SMarc Zyngier void *va; 1383adcdb94eSMarc Zyngier u8 *cfg; 1384c48ed51cSMarc Zyngier 1385c1d4d5cdSMarc Zyngier if (map) { 1386c1d4d5cdSMarc Zyngier va = page_address(map->vm->vprop_page); 1387d4d7b4adSMarc Zyngier hwirq = map->vintid; 1388d4d7b4adSMarc Zyngier 1389d4d7b4adSMarc Zyngier /* Remember the updated property */ 1390d4d7b4adSMarc Zyngier map->properties &= ~clr; 1391d4d7b4adSMarc Zyngier map->properties |= set | LPI_PROP_GROUP1; 1392015ec038SMarc Zyngier } else { 1393e1a2e201SMarc Zyngier va = gic_rdists->prop_table_va; 1394015ec038SMarc Zyngier hwirq = d->hwirq; 1395015ec038SMarc Zyngier } 1396adcdb94eSMarc Zyngier 1397e1a2e201SMarc Zyngier cfg = va + hwirq - 8192; 1398adcdb94eSMarc Zyngier *cfg &= ~clr; 1399015ec038SMarc Zyngier *cfg |= set | LPI_PROP_GROUP1; 1400c48ed51cSMarc Zyngier 1401c48ed51cSMarc Zyngier /* 1402c48ed51cSMarc Zyngier * Make the above write visible to the redistributors. 1403c48ed51cSMarc Zyngier * And yes, we're flushing exactly: One. Single. Byte. 1404c48ed51cSMarc Zyngier * Humpf... 1405c48ed51cSMarc Zyngier */ 1406c48ed51cSMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING) 1407328191c0SVladimir Murzin gic_flush_dcache_to_poc(cfg, sizeof(*cfg)); 1408c48ed51cSMarc Zyngier else 1409c48ed51cSMarc Zyngier dsb(ishst); 1410015ec038SMarc Zyngier } 1411015ec038SMarc Zyngier 14122f4f064bSMarc Zyngier static void wait_for_syncr(void __iomem *rdbase) 14132f4f064bSMarc Zyngier { 14142f4f064bSMarc Zyngier while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) 14152f4f064bSMarc Zyngier cpu_relax(); 14162f4f064bSMarc Zyngier } 14172f4f064bSMarc Zyngier 1418425c09beSMarc Zyngier static void direct_lpi_inv(struct irq_data *d) 1419425c09beSMarc Zyngier { 1420f4a81f5aSMarc Zyngier struct its_vlpi_map *map = get_vlpi_map(d); 1421425c09beSMarc Zyngier void __iomem *rdbase; 1422f3a05921SMarc Zyngier unsigned long flags; 1423f4a81f5aSMarc Zyngier u64 val; 1424f3a05921SMarc Zyngier int cpu; 1425f4a81f5aSMarc Zyngier 1426f4a81f5aSMarc Zyngier if (map) { 1427f4a81f5aSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1428f4a81f5aSMarc Zyngier 1429f4a81f5aSMarc Zyngier WARN_ON(!is_v4_1(its_dev->its)); 1430f4a81f5aSMarc Zyngier 1431f4a81f5aSMarc Zyngier val = GICR_INVLPIR_V; 1432f4a81f5aSMarc Zyngier val |= FIELD_PREP(GICR_INVLPIR_VPEID, map->vpe->vpe_id); 1433f4a81f5aSMarc Zyngier val |= FIELD_PREP(GICR_INVLPIR_INTID, map->vintid); 1434f4a81f5aSMarc Zyngier } else { 1435f4a81f5aSMarc Zyngier val = d->hwirq; 1436f4a81f5aSMarc Zyngier } 1437425c09beSMarc Zyngier 1438425c09beSMarc Zyngier /* Target the redistributor this LPI is currently routed to */ 1439f3a05921SMarc Zyngier cpu = irq_to_cpuid_lock(d, &flags); 14409058a4e9SMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 1441f3a05921SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base; 1442f4a81f5aSMarc Zyngier gic_write_lpir(val, rdbase + GICR_INVLPIR); 1443425c09beSMarc Zyngier 1444425c09beSMarc Zyngier wait_for_syncr(rdbase); 14459058a4e9SMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 1446f3a05921SMarc Zyngier irq_to_cpuid_unlock(d, flags); 1447425c09beSMarc Zyngier } 1448425c09beSMarc Zyngier 1449015ec038SMarc Zyngier static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) 1450015ec038SMarc Zyngier { 1451015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1452015ec038SMarc Zyngier 1453015ec038SMarc Zyngier lpi_write_config(d, clr, set); 1454f4a81f5aSMarc Zyngier if (gic_rdists->has_direct_lpi && 1455f4a81f5aSMarc Zyngier (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) 1456425c09beSMarc Zyngier direct_lpi_inv(d); 145728614696SMarc Zyngier else if (!irqd_is_forwarded_to_vcpu(d)) 1458adcdb94eSMarc Zyngier its_send_inv(its_dev, its_get_event_id(d)); 145928614696SMarc Zyngier else 146028614696SMarc Zyngier its_send_vinv(its_dev, its_get_event_id(d)); 1461c48ed51cSMarc Zyngier } 1462c48ed51cSMarc Zyngier 1463015ec038SMarc Zyngier static void its_vlpi_set_doorbell(struct irq_data *d, bool enable) 1464015ec038SMarc Zyngier { 1465015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1466015ec038SMarc Zyngier u32 event = its_get_event_id(d); 1467c1d4d5cdSMarc Zyngier struct its_vlpi_map *map; 1468015ec038SMarc Zyngier 14693858d4dfSMarc Zyngier /* 14703858d4dfSMarc Zyngier * GICv4.1 does away with the per-LPI nonsense, nothing to do 14713858d4dfSMarc Zyngier * here. 14723858d4dfSMarc Zyngier */ 14733858d4dfSMarc Zyngier if (is_v4_1(its_dev->its)) 14743858d4dfSMarc Zyngier return; 14753858d4dfSMarc Zyngier 1476c1d4d5cdSMarc Zyngier map = dev_event_to_vlpi_map(its_dev, event); 1477c1d4d5cdSMarc Zyngier 1478c1d4d5cdSMarc Zyngier if (map->db_enabled == enable) 1479015ec038SMarc Zyngier return; 1480015ec038SMarc Zyngier 1481c1d4d5cdSMarc Zyngier map->db_enabled = enable; 1482015ec038SMarc Zyngier 1483015ec038SMarc Zyngier /* 1484015ec038SMarc Zyngier * More fun with the architecture: 1485015ec038SMarc Zyngier * 1486015ec038SMarc Zyngier * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI 1487015ec038SMarc Zyngier * value or to 1023, depending on the enable bit. But that 1488015ec038SMarc Zyngier * would be issueing a mapping for an /existing/ DevID+EventID 1489015ec038SMarc Zyngier * pair, which is UNPREDICTABLE. Instead, let's issue a VMOVI 1490015ec038SMarc Zyngier * to the /same/ vPE, using this opportunity to adjust the 1491015ec038SMarc Zyngier * doorbell. Mouahahahaha. We loves it, Precious. 1492015ec038SMarc Zyngier */ 1493015ec038SMarc Zyngier its_send_vmovi(its_dev, event); 1494c48ed51cSMarc Zyngier } 1495c48ed51cSMarc Zyngier 1496c48ed51cSMarc Zyngier static void its_mask_irq(struct irq_data *d) 1497c48ed51cSMarc Zyngier { 1498015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1499015ec038SMarc Zyngier its_vlpi_set_doorbell(d, false); 1500015ec038SMarc Zyngier 1501adcdb94eSMarc Zyngier lpi_update_config(d, LPI_PROP_ENABLED, 0); 1502c48ed51cSMarc Zyngier } 1503c48ed51cSMarc Zyngier 1504c48ed51cSMarc Zyngier static void its_unmask_irq(struct irq_data *d) 1505c48ed51cSMarc Zyngier { 1506015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1507015ec038SMarc Zyngier its_vlpi_set_doorbell(d, true); 1508015ec038SMarc Zyngier 1509adcdb94eSMarc Zyngier lpi_update_config(d, 0, LPI_PROP_ENABLED); 1510c48ed51cSMarc Zyngier } 1511c48ed51cSMarc Zyngier 1512c48ed51cSMarc Zyngier static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, 1513c48ed51cSMarc Zyngier bool force) 1514c48ed51cSMarc Zyngier { 1515fbf8f40eSGanapatrao Kulkarni unsigned int cpu; 1516fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 1517c48ed51cSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1518c48ed51cSMarc Zyngier struct its_collection *target_col; 1519c48ed51cSMarc Zyngier u32 id = its_get_event_id(d); 1520c48ed51cSMarc Zyngier 1521015ec038SMarc Zyngier /* A forwarded interrupt should use irq_set_vcpu_affinity */ 1522015ec038SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) 1523015ec038SMarc Zyngier return -EINVAL; 1524015ec038SMarc Zyngier 1525fbf8f40eSGanapatrao Kulkarni /* lpi cannot be routed to a redistributor that is on a foreign node */ 1526fbf8f40eSGanapatrao Kulkarni if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 1527fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) { 1528fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 1529fbf8f40eSGanapatrao Kulkarni if (!cpumask_intersects(mask_val, cpu_mask)) 1530fbf8f40eSGanapatrao Kulkarni return -EINVAL; 1531fbf8f40eSGanapatrao Kulkarni } 1532fbf8f40eSGanapatrao Kulkarni } 1533fbf8f40eSGanapatrao Kulkarni 1534fbf8f40eSGanapatrao Kulkarni cpu = cpumask_any_and(mask_val, cpu_mask); 1535fbf8f40eSGanapatrao Kulkarni 1536c48ed51cSMarc Zyngier if (cpu >= nr_cpu_ids) 1537c48ed51cSMarc Zyngier return -EINVAL; 1538c48ed51cSMarc Zyngier 15398b8d94a7SMaJun /* don't set the affinity when the target cpu is same as current one */ 15408b8d94a7SMaJun if (cpu != its_dev->event_map.col_map[id]) { 1541c48ed51cSMarc Zyngier target_col = &its_dev->its->collections[cpu]; 1542c48ed51cSMarc Zyngier its_send_movi(its_dev, target_col, id); 1543591e5becSMarc Zyngier its_dev->event_map.col_map[id] = cpu; 15440d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 15458b8d94a7SMaJun } 1546c48ed51cSMarc Zyngier 1547c48ed51cSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 1548c48ed51cSMarc Zyngier } 1549c48ed51cSMarc Zyngier 1550558b0165SArd Biesheuvel static u64 its_irq_get_msi_base(struct its_device *its_dev) 1551558b0165SArd Biesheuvel { 1552558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 1553558b0165SArd Biesheuvel 1554558b0165SArd Biesheuvel return its->phys_base + GITS_TRANSLATER; 1555558b0165SArd Biesheuvel } 1556558b0165SArd Biesheuvel 1557b48ac83dSMarc Zyngier static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) 1558b48ac83dSMarc Zyngier { 1559b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1560b48ac83dSMarc Zyngier struct its_node *its; 1561b48ac83dSMarc Zyngier u64 addr; 1562b48ac83dSMarc Zyngier 1563b48ac83dSMarc Zyngier its = its_dev->its; 1564558b0165SArd Biesheuvel addr = its->get_msi_base(its_dev); 1565b48ac83dSMarc Zyngier 1566b11283ebSVladimir Murzin msg->address_lo = lower_32_bits(addr); 1567b11283ebSVladimir Murzin msg->address_hi = upper_32_bits(addr); 1568b48ac83dSMarc Zyngier msg->data = its_get_event_id(d); 156944bb7e24SRobin Murphy 157035ae7df2SJulien Grall iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); 1571b48ac83dSMarc Zyngier } 1572b48ac83dSMarc Zyngier 15738d85dcedSMarc Zyngier static int its_irq_set_irqchip_state(struct irq_data *d, 15748d85dcedSMarc Zyngier enum irqchip_irq_state which, 15758d85dcedSMarc Zyngier bool state) 15768d85dcedSMarc Zyngier { 15778d85dcedSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 15788d85dcedSMarc Zyngier u32 event = its_get_event_id(d); 15798d85dcedSMarc Zyngier 15808d85dcedSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 15818d85dcedSMarc Zyngier return -EINVAL; 15828d85dcedSMarc Zyngier 1583ed0e4aa9SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1584ed0e4aa9SMarc Zyngier if (state) 1585ed0e4aa9SMarc Zyngier its_send_vint(its_dev, event); 1586ed0e4aa9SMarc Zyngier else 1587ed0e4aa9SMarc Zyngier its_send_vclear(its_dev, event); 1588ed0e4aa9SMarc Zyngier } else { 15898d85dcedSMarc Zyngier if (state) 15908d85dcedSMarc Zyngier its_send_int(its_dev, event); 15918d85dcedSMarc Zyngier else 15928d85dcedSMarc Zyngier its_send_clear(its_dev, event); 1593ed0e4aa9SMarc Zyngier } 15948d85dcedSMarc Zyngier 15958d85dcedSMarc Zyngier return 0; 15968d85dcedSMarc Zyngier } 15978d85dcedSMarc Zyngier 1598009384b3SMarc Zyngier /* 1599009384b3SMarc Zyngier * Two favourable cases: 1600009384b3SMarc Zyngier * 1601009384b3SMarc Zyngier * (a) Either we have a GICv4.1, and all vPEs have to be mapped at all times 1602009384b3SMarc Zyngier * for vSGI delivery 1603009384b3SMarc Zyngier * 1604009384b3SMarc Zyngier * (b) Or the ITSs do not use a list map, meaning that VMOVP is cheap enough 1605009384b3SMarc Zyngier * and we're better off mapping all VPEs always 1606009384b3SMarc Zyngier * 1607009384b3SMarc Zyngier * If neither (a) nor (b) is true, then we map vPEs on demand. 1608009384b3SMarc Zyngier * 1609009384b3SMarc Zyngier */ 1610009384b3SMarc Zyngier static bool gic_requires_eager_mapping(void) 1611009384b3SMarc Zyngier { 1612009384b3SMarc Zyngier if (!its_list_map || gic_rdists->has_rvpeid) 1613009384b3SMarc Zyngier return true; 1614009384b3SMarc Zyngier 1615009384b3SMarc Zyngier return false; 1616009384b3SMarc Zyngier } 1617009384b3SMarc Zyngier 16182247e1bfSMarc Zyngier static void its_map_vm(struct its_node *its, struct its_vm *vm) 16192247e1bfSMarc Zyngier { 16202247e1bfSMarc Zyngier unsigned long flags; 16212247e1bfSMarc Zyngier 1622009384b3SMarc Zyngier if (gic_requires_eager_mapping()) 16232247e1bfSMarc Zyngier return; 16242247e1bfSMarc Zyngier 16252247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 16262247e1bfSMarc Zyngier 16272247e1bfSMarc Zyngier /* 16282247e1bfSMarc Zyngier * If the VM wasn't mapped yet, iterate over the vpes and get 16292247e1bfSMarc Zyngier * them mapped now. 16302247e1bfSMarc Zyngier */ 16312247e1bfSMarc Zyngier vm->vlpi_count[its->list_nr]++; 16322247e1bfSMarc Zyngier 16332247e1bfSMarc Zyngier if (vm->vlpi_count[its->list_nr] == 1) { 16342247e1bfSMarc Zyngier int i; 16352247e1bfSMarc Zyngier 16362247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) { 16372247e1bfSMarc Zyngier struct its_vpe *vpe = vm->vpes[i]; 163844c4c25eSMarc Zyngier struct irq_data *d = irq_get_irq_data(vpe->irq); 16392247e1bfSMarc Zyngier 16402247e1bfSMarc Zyngier /* Map the VPE to the first possible CPU */ 16412247e1bfSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 16422247e1bfSMarc Zyngier its_send_vmapp(its, vpe, true); 16432247e1bfSMarc Zyngier its_send_vinvall(its, vpe); 164444c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 16452247e1bfSMarc Zyngier } 16462247e1bfSMarc Zyngier } 16472247e1bfSMarc Zyngier 16482247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 16492247e1bfSMarc Zyngier } 16502247e1bfSMarc Zyngier 16512247e1bfSMarc Zyngier static void its_unmap_vm(struct its_node *its, struct its_vm *vm) 16522247e1bfSMarc Zyngier { 16532247e1bfSMarc Zyngier unsigned long flags; 16542247e1bfSMarc Zyngier 16552247e1bfSMarc Zyngier /* Not using the ITS list? Everything is always mapped. */ 1656009384b3SMarc Zyngier if (gic_requires_eager_mapping()) 16572247e1bfSMarc Zyngier return; 16582247e1bfSMarc Zyngier 16592247e1bfSMarc Zyngier raw_spin_lock_irqsave(&vmovp_lock, flags); 16602247e1bfSMarc Zyngier 16612247e1bfSMarc Zyngier if (!--vm->vlpi_count[its->list_nr]) { 16622247e1bfSMarc Zyngier int i; 16632247e1bfSMarc Zyngier 16642247e1bfSMarc Zyngier for (i = 0; i < vm->nr_vpes; i++) 16652247e1bfSMarc Zyngier its_send_vmapp(its, vm->vpes[i], false); 16662247e1bfSMarc Zyngier } 16672247e1bfSMarc Zyngier 16682247e1bfSMarc Zyngier raw_spin_unlock_irqrestore(&vmovp_lock, flags); 16692247e1bfSMarc Zyngier } 16702247e1bfSMarc Zyngier 1671d011e4e6SMarc Zyngier static int its_vlpi_map(struct irq_data *d, struct its_cmd_info *info) 1672d011e4e6SMarc Zyngier { 1673d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1674d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1675d011e4e6SMarc Zyngier int ret = 0; 1676d011e4e6SMarc Zyngier 1677d011e4e6SMarc Zyngier if (!info->map) 1678d011e4e6SMarc Zyngier return -EINVAL; 1679d011e4e6SMarc Zyngier 168011635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1681d011e4e6SMarc Zyngier 1682d011e4e6SMarc Zyngier if (!its_dev->event_map.vm) { 1683d011e4e6SMarc Zyngier struct its_vlpi_map *maps; 1684d011e4e6SMarc Zyngier 16856396bb22SKees Cook maps = kcalloc(its_dev->event_map.nr_lpis, sizeof(*maps), 168611635fa2SMarc Zyngier GFP_ATOMIC); 1687d011e4e6SMarc Zyngier if (!maps) { 1688d011e4e6SMarc Zyngier ret = -ENOMEM; 1689d011e4e6SMarc Zyngier goto out; 1690d011e4e6SMarc Zyngier } 1691d011e4e6SMarc Zyngier 1692d011e4e6SMarc Zyngier its_dev->event_map.vm = info->map->vm; 1693d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps = maps; 1694d011e4e6SMarc Zyngier } else if (its_dev->event_map.vm != info->map->vm) { 1695d011e4e6SMarc Zyngier ret = -EINVAL; 1696d011e4e6SMarc Zyngier goto out; 1697d011e4e6SMarc Zyngier } 1698d011e4e6SMarc Zyngier 1699d011e4e6SMarc Zyngier /* Get our private copy of the mapping information */ 1700d011e4e6SMarc Zyngier its_dev->event_map.vlpi_maps[event] = *info->map; 1701d011e4e6SMarc Zyngier 1702d011e4e6SMarc Zyngier if (irqd_is_forwarded_to_vcpu(d)) { 1703d011e4e6SMarc Zyngier /* Already mapped, move it around */ 1704d011e4e6SMarc Zyngier its_send_vmovi(its_dev, event); 1705d011e4e6SMarc Zyngier } else { 17062247e1bfSMarc Zyngier /* Ensure all the VPEs are mapped on this ITS */ 17072247e1bfSMarc Zyngier its_map_vm(its_dev->its, info->map->vm); 17082247e1bfSMarc Zyngier 1709d4d7b4adSMarc Zyngier /* 1710d4d7b4adSMarc Zyngier * Flag the interrupt as forwarded so that we can 1711d4d7b4adSMarc Zyngier * start poking the virtual property table. 1712d4d7b4adSMarc Zyngier */ 1713d4d7b4adSMarc Zyngier irqd_set_forwarded_to_vcpu(d); 1714d4d7b4adSMarc Zyngier 1715d4d7b4adSMarc Zyngier /* Write out the property to the prop table */ 1716d4d7b4adSMarc Zyngier lpi_write_config(d, 0xff, info->map->properties); 1717d4d7b4adSMarc Zyngier 1718d011e4e6SMarc Zyngier /* Drop the physical mapping */ 1719d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1720d011e4e6SMarc Zyngier 1721d011e4e6SMarc Zyngier /* and install the virtual one */ 1722d011e4e6SMarc Zyngier its_send_vmapti(its_dev, event); 1723d011e4e6SMarc Zyngier 1724d011e4e6SMarc Zyngier /* Increment the number of VLPIs */ 1725d011e4e6SMarc Zyngier its_dev->event_map.nr_vlpis++; 1726d011e4e6SMarc Zyngier } 1727d011e4e6SMarc Zyngier 1728d011e4e6SMarc Zyngier out: 172911635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1730d011e4e6SMarc Zyngier return ret; 1731d011e4e6SMarc Zyngier } 1732d011e4e6SMarc Zyngier 1733d011e4e6SMarc Zyngier static int its_vlpi_get(struct irq_data *d, struct its_cmd_info *info) 1734d011e4e6SMarc Zyngier { 1735d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1736046b5054SMarc Zyngier struct its_vlpi_map *map; 1737d011e4e6SMarc Zyngier int ret = 0; 1738d011e4e6SMarc Zyngier 173911635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1740d011e4e6SMarc Zyngier 1741046b5054SMarc Zyngier map = get_vlpi_map(d); 1742046b5054SMarc Zyngier 1743046b5054SMarc Zyngier if (!its_dev->event_map.vm || !map) { 1744d011e4e6SMarc Zyngier ret = -EINVAL; 1745d011e4e6SMarc Zyngier goto out; 1746d011e4e6SMarc Zyngier } 1747d011e4e6SMarc Zyngier 1748d011e4e6SMarc Zyngier /* Copy our mapping information to the incoming request */ 1749c1d4d5cdSMarc Zyngier *info->map = *map; 1750d011e4e6SMarc Zyngier 1751d011e4e6SMarc Zyngier out: 175211635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1753d011e4e6SMarc Zyngier return ret; 1754d011e4e6SMarc Zyngier } 1755d011e4e6SMarc Zyngier 1756d011e4e6SMarc Zyngier static int its_vlpi_unmap(struct irq_data *d) 1757d011e4e6SMarc Zyngier { 1758d011e4e6SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1759d011e4e6SMarc Zyngier u32 event = its_get_event_id(d); 1760d011e4e6SMarc Zyngier int ret = 0; 1761d011e4e6SMarc Zyngier 176211635fa2SMarc Zyngier raw_spin_lock(&its_dev->event_map.vlpi_lock); 1763d011e4e6SMarc Zyngier 1764d011e4e6SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) { 1765d011e4e6SMarc Zyngier ret = -EINVAL; 1766d011e4e6SMarc Zyngier goto out; 1767d011e4e6SMarc Zyngier } 1768d011e4e6SMarc Zyngier 1769d011e4e6SMarc Zyngier /* Drop the virtual mapping */ 1770d011e4e6SMarc Zyngier its_send_discard(its_dev, event); 1771d011e4e6SMarc Zyngier 1772d011e4e6SMarc Zyngier /* and restore the physical one */ 1773d011e4e6SMarc Zyngier irqd_clr_forwarded_to_vcpu(d); 1774d011e4e6SMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 1775d011e4e6SMarc Zyngier lpi_update_config(d, 0xff, (LPI_PROP_DEFAULT_PRIO | 1776d011e4e6SMarc Zyngier LPI_PROP_ENABLED | 1777d011e4e6SMarc Zyngier LPI_PROP_GROUP1)); 1778d011e4e6SMarc Zyngier 17792247e1bfSMarc Zyngier /* Potentially unmap the VM from this ITS */ 17802247e1bfSMarc Zyngier its_unmap_vm(its_dev->its, its_dev->event_map.vm); 17812247e1bfSMarc Zyngier 1782d011e4e6SMarc Zyngier /* 1783d011e4e6SMarc Zyngier * Drop the refcount and make the device available again if 1784d011e4e6SMarc Zyngier * this was the last VLPI. 1785d011e4e6SMarc Zyngier */ 1786d011e4e6SMarc Zyngier if (!--its_dev->event_map.nr_vlpis) { 1787d011e4e6SMarc Zyngier its_dev->event_map.vm = NULL; 1788d011e4e6SMarc Zyngier kfree(its_dev->event_map.vlpi_maps); 1789d011e4e6SMarc Zyngier } 1790d011e4e6SMarc Zyngier 1791d011e4e6SMarc Zyngier out: 179211635fa2SMarc Zyngier raw_spin_unlock(&its_dev->event_map.vlpi_lock); 1793d011e4e6SMarc Zyngier return ret; 1794d011e4e6SMarc Zyngier } 1795d011e4e6SMarc Zyngier 1796015ec038SMarc Zyngier static int its_vlpi_prop_update(struct irq_data *d, struct its_cmd_info *info) 1797015ec038SMarc Zyngier { 1798015ec038SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1799015ec038SMarc Zyngier 1800015ec038SMarc Zyngier if (!its_dev->event_map.vm || !irqd_is_forwarded_to_vcpu(d)) 1801015ec038SMarc Zyngier return -EINVAL; 1802015ec038SMarc Zyngier 1803015ec038SMarc Zyngier if (info->cmd_type == PROP_UPDATE_AND_INV_VLPI) 1804015ec038SMarc Zyngier lpi_update_config(d, 0xff, info->config); 1805015ec038SMarc Zyngier else 1806015ec038SMarc Zyngier lpi_write_config(d, 0xff, info->config); 1807015ec038SMarc Zyngier its_vlpi_set_doorbell(d, !!(info->config & LPI_PROP_ENABLED)); 1808015ec038SMarc Zyngier 1809015ec038SMarc Zyngier return 0; 1810015ec038SMarc Zyngier } 1811015ec038SMarc Zyngier 1812c808eea8SMarc Zyngier static int its_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 1813c808eea8SMarc Zyngier { 1814c808eea8SMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1815c808eea8SMarc Zyngier struct its_cmd_info *info = vcpu_info; 1816c808eea8SMarc Zyngier 1817c808eea8SMarc Zyngier /* Need a v4 ITS */ 18180dd57fedSMarc Zyngier if (!is_v4(its_dev->its)) 1819c808eea8SMarc Zyngier return -EINVAL; 1820c808eea8SMarc Zyngier 1821d011e4e6SMarc Zyngier /* Unmap request? */ 1822d011e4e6SMarc Zyngier if (!info) 1823d011e4e6SMarc Zyngier return its_vlpi_unmap(d); 1824d011e4e6SMarc Zyngier 1825c808eea8SMarc Zyngier switch (info->cmd_type) { 1826c808eea8SMarc Zyngier case MAP_VLPI: 1827d011e4e6SMarc Zyngier return its_vlpi_map(d, info); 1828c808eea8SMarc Zyngier 1829c808eea8SMarc Zyngier case GET_VLPI: 1830d011e4e6SMarc Zyngier return its_vlpi_get(d, info); 1831c808eea8SMarc Zyngier 1832c808eea8SMarc Zyngier case PROP_UPDATE_VLPI: 1833c808eea8SMarc Zyngier case PROP_UPDATE_AND_INV_VLPI: 1834015ec038SMarc Zyngier return its_vlpi_prop_update(d, info); 1835c808eea8SMarc Zyngier 1836c808eea8SMarc Zyngier default: 1837c808eea8SMarc Zyngier return -EINVAL; 1838c808eea8SMarc Zyngier } 1839c808eea8SMarc Zyngier } 1840c808eea8SMarc Zyngier 1841c48ed51cSMarc Zyngier static struct irq_chip its_irq_chip = { 1842c48ed51cSMarc Zyngier .name = "ITS", 1843c48ed51cSMarc Zyngier .irq_mask = its_mask_irq, 1844c48ed51cSMarc Zyngier .irq_unmask = its_unmask_irq, 1845004fa08dSAshok Kumar .irq_eoi = irq_chip_eoi_parent, 1846c48ed51cSMarc Zyngier .irq_set_affinity = its_set_affinity, 1847b48ac83dSMarc Zyngier .irq_compose_msi_msg = its_irq_compose_msi_msg, 18488d85dcedSMarc Zyngier .irq_set_irqchip_state = its_irq_set_irqchip_state, 1849c808eea8SMarc Zyngier .irq_set_vcpu_affinity = its_irq_set_vcpu_affinity, 1850b48ac83dSMarc Zyngier }; 1851b48ac83dSMarc Zyngier 1852880cb3cdSMarc Zyngier 1853bf9529f8SMarc Zyngier /* 1854bf9529f8SMarc Zyngier * How we allocate LPIs: 1855bf9529f8SMarc Zyngier * 1856880cb3cdSMarc Zyngier * lpi_range_list contains ranges of LPIs that are to available to 1857880cb3cdSMarc Zyngier * allocate from. To allocate LPIs, just pick the first range that 1858880cb3cdSMarc Zyngier * fits the required allocation, and reduce it by the required 1859880cb3cdSMarc Zyngier * amount. Once empty, remove the range from the list. 1860bf9529f8SMarc Zyngier * 1861880cb3cdSMarc Zyngier * To free a range of LPIs, add a free range to the list, sort it and 1862880cb3cdSMarc Zyngier * merge the result if the new range happens to be adjacent to an 1863880cb3cdSMarc Zyngier * already free block. 1864880cb3cdSMarc Zyngier * 1865880cb3cdSMarc Zyngier * The consequence of the above is that allocation is cost is low, but 1866880cb3cdSMarc Zyngier * freeing is expensive. We assumes that freeing rarely occurs. 1867880cb3cdSMarc Zyngier */ 18684cb205c0SJia He #define ITS_MAX_LPI_NRBITS 16 /* 64K LPIs */ 1869880cb3cdSMarc Zyngier 1870880cb3cdSMarc Zyngier static DEFINE_MUTEX(lpi_range_lock); 1871880cb3cdSMarc Zyngier static LIST_HEAD(lpi_range_list); 1872bf9529f8SMarc Zyngier 1873880cb3cdSMarc Zyngier struct lpi_range { 1874880cb3cdSMarc Zyngier struct list_head entry; 1875880cb3cdSMarc Zyngier u32 base_id; 1876880cb3cdSMarc Zyngier u32 span; 1877880cb3cdSMarc Zyngier }; 1878880cb3cdSMarc Zyngier 1879880cb3cdSMarc Zyngier static struct lpi_range *mk_lpi_range(u32 base, u32 span) 1880bf9529f8SMarc Zyngier { 1881880cb3cdSMarc Zyngier struct lpi_range *range; 1882880cb3cdSMarc Zyngier 18831c73fac5SRasmus Villemoes range = kmalloc(sizeof(*range), GFP_KERNEL); 1884880cb3cdSMarc Zyngier if (range) { 1885880cb3cdSMarc Zyngier range->base_id = base; 1886880cb3cdSMarc Zyngier range->span = span; 1887bf9529f8SMarc Zyngier } 1888bf9529f8SMarc Zyngier 1889880cb3cdSMarc Zyngier return range; 1890880cb3cdSMarc Zyngier } 1891880cb3cdSMarc Zyngier 1892880cb3cdSMarc Zyngier static int alloc_lpi_range(u32 nr_lpis, u32 *base) 1893880cb3cdSMarc Zyngier { 1894880cb3cdSMarc Zyngier struct lpi_range *range, *tmp; 1895880cb3cdSMarc Zyngier int err = -ENOSPC; 1896880cb3cdSMarc Zyngier 1897880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1898880cb3cdSMarc Zyngier 1899880cb3cdSMarc Zyngier list_for_each_entry_safe(range, tmp, &lpi_range_list, entry) { 1900880cb3cdSMarc Zyngier if (range->span >= nr_lpis) { 1901880cb3cdSMarc Zyngier *base = range->base_id; 1902880cb3cdSMarc Zyngier range->base_id += nr_lpis; 1903880cb3cdSMarc Zyngier range->span -= nr_lpis; 1904880cb3cdSMarc Zyngier 1905880cb3cdSMarc Zyngier if (range->span == 0) { 1906880cb3cdSMarc Zyngier list_del(&range->entry); 1907880cb3cdSMarc Zyngier kfree(range); 1908880cb3cdSMarc Zyngier } 1909880cb3cdSMarc Zyngier 1910880cb3cdSMarc Zyngier err = 0; 1911880cb3cdSMarc Zyngier break; 1912880cb3cdSMarc Zyngier } 1913880cb3cdSMarc Zyngier } 1914880cb3cdSMarc Zyngier 1915880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1916880cb3cdSMarc Zyngier 1917880cb3cdSMarc Zyngier pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); 1918880cb3cdSMarc Zyngier return err; 1919880cb3cdSMarc Zyngier } 1920880cb3cdSMarc Zyngier 192112eade12SRasmus Villemoes static void merge_lpi_ranges(struct lpi_range *a, struct lpi_range *b) 192212eade12SRasmus Villemoes { 192312eade12SRasmus Villemoes if (&a->entry == &lpi_range_list || &b->entry == &lpi_range_list) 192412eade12SRasmus Villemoes return; 192512eade12SRasmus Villemoes if (a->base_id + a->span != b->base_id) 192612eade12SRasmus Villemoes return; 192712eade12SRasmus Villemoes b->base_id = a->base_id; 192812eade12SRasmus Villemoes b->span += a->span; 192912eade12SRasmus Villemoes list_del(&a->entry); 193012eade12SRasmus Villemoes kfree(a); 193112eade12SRasmus Villemoes } 193212eade12SRasmus Villemoes 1933880cb3cdSMarc Zyngier static int free_lpi_range(u32 base, u32 nr_lpis) 1934880cb3cdSMarc Zyngier { 193512eade12SRasmus Villemoes struct lpi_range *new, *old; 1936880cb3cdSMarc Zyngier 1937880cb3cdSMarc Zyngier new = mk_lpi_range(base, nr_lpis); 1938b31a3838SRasmus Villemoes if (!new) 1939b31a3838SRasmus Villemoes return -ENOMEM; 1940880cb3cdSMarc Zyngier 1941880cb3cdSMarc Zyngier mutex_lock(&lpi_range_lock); 1942880cb3cdSMarc Zyngier 194312eade12SRasmus Villemoes list_for_each_entry_reverse(old, &lpi_range_list, entry) { 194412eade12SRasmus Villemoes if (old->base_id < base) 194512eade12SRasmus Villemoes break; 1946880cb3cdSMarc Zyngier } 194712eade12SRasmus Villemoes /* 194812eade12SRasmus Villemoes * old is the last element with ->base_id smaller than base, 194912eade12SRasmus Villemoes * so new goes right after it. If there are no elements with 195012eade12SRasmus Villemoes * ->base_id smaller than base, &old->entry ends up pointing 195112eade12SRasmus Villemoes * at the head of the list, and inserting new it the start of 195212eade12SRasmus Villemoes * the list is the right thing to do in that case as well. 195312eade12SRasmus Villemoes */ 195412eade12SRasmus Villemoes list_add(&new->entry, &old->entry); 195512eade12SRasmus Villemoes /* 195612eade12SRasmus Villemoes * Now check if we can merge with the preceding and/or 195712eade12SRasmus Villemoes * following ranges. 195812eade12SRasmus Villemoes */ 195912eade12SRasmus Villemoes merge_lpi_ranges(old, new); 196012eade12SRasmus Villemoes merge_lpi_ranges(new, list_next_entry(new, entry)); 1961880cb3cdSMarc Zyngier 1962880cb3cdSMarc Zyngier mutex_unlock(&lpi_range_lock); 1963b31a3838SRasmus Villemoes return 0; 1964bf9529f8SMarc Zyngier } 1965bf9529f8SMarc Zyngier 196604a0e4deSTomasz Nowicki static int __init its_lpi_init(u32 id_bits) 1967bf9529f8SMarc Zyngier { 1968880cb3cdSMarc Zyngier u32 lpis = (1UL << id_bits) - 8192; 196912b2905aSMarc Zyngier u32 numlpis; 1970880cb3cdSMarc Zyngier int err; 1971bf9529f8SMarc Zyngier 197212b2905aSMarc Zyngier numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer); 197312b2905aSMarc Zyngier 197412b2905aSMarc Zyngier if (numlpis > 2 && !WARN_ON(numlpis > lpis)) { 197512b2905aSMarc Zyngier lpis = numlpis; 197612b2905aSMarc Zyngier pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", 197712b2905aSMarc Zyngier lpis); 197812b2905aSMarc Zyngier } 197912b2905aSMarc Zyngier 1980880cb3cdSMarc Zyngier /* 1981880cb3cdSMarc Zyngier * Initializing the allocator is just the same as freeing the 1982880cb3cdSMarc Zyngier * full range of LPIs. 1983880cb3cdSMarc Zyngier */ 1984880cb3cdSMarc Zyngier err = free_lpi_range(8192, lpis); 1985880cb3cdSMarc Zyngier pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); 1986880cb3cdSMarc Zyngier return err; 1987bf9529f8SMarc Zyngier } 1988bf9529f8SMarc Zyngier 198938dd7c49SMarc Zyngier static unsigned long *its_lpi_alloc(int nr_irqs, u32 *base, int *nr_ids) 1990bf9529f8SMarc Zyngier { 1991bf9529f8SMarc Zyngier unsigned long *bitmap = NULL; 1992880cb3cdSMarc Zyngier int err = 0; 1993bf9529f8SMarc Zyngier 1994bf9529f8SMarc Zyngier do { 199538dd7c49SMarc Zyngier err = alloc_lpi_range(nr_irqs, base); 1996880cb3cdSMarc Zyngier if (!err) 1997bf9529f8SMarc Zyngier break; 1998bf9529f8SMarc Zyngier 199938dd7c49SMarc Zyngier nr_irqs /= 2; 200038dd7c49SMarc Zyngier } while (nr_irqs > 0); 2001bf9529f8SMarc Zyngier 200245725e0fSMarc Zyngier if (!nr_irqs) 200345725e0fSMarc Zyngier err = -ENOSPC; 200445725e0fSMarc Zyngier 2005880cb3cdSMarc Zyngier if (err) 2006bf9529f8SMarc Zyngier goto out; 2007bf9529f8SMarc Zyngier 200838dd7c49SMarc Zyngier bitmap = kcalloc(BITS_TO_LONGS(nr_irqs), sizeof (long), GFP_ATOMIC); 2009bf9529f8SMarc Zyngier if (!bitmap) 2010bf9529f8SMarc Zyngier goto out; 2011bf9529f8SMarc Zyngier 201238dd7c49SMarc Zyngier *nr_ids = nr_irqs; 2013bf9529f8SMarc Zyngier 2014bf9529f8SMarc Zyngier out: 2015c8415b94SMarc Zyngier if (!bitmap) 2016c8415b94SMarc Zyngier *base = *nr_ids = 0; 2017c8415b94SMarc Zyngier 2018bf9529f8SMarc Zyngier return bitmap; 2019bf9529f8SMarc Zyngier } 2020bf9529f8SMarc Zyngier 202138dd7c49SMarc Zyngier static void its_lpi_free(unsigned long *bitmap, u32 base, u32 nr_ids) 2022bf9529f8SMarc Zyngier { 2023880cb3cdSMarc Zyngier WARN_ON(free_lpi_range(base, nr_ids)); 2024cf2be8baSMarc Zyngier kfree(bitmap); 2025bf9529f8SMarc Zyngier } 20261ac19ca6SMarc Zyngier 2027053be485SMarc Zyngier static void gic_reset_prop_table(void *va) 2028053be485SMarc Zyngier { 2029053be485SMarc Zyngier /* Priority 0xa0, Group-1, disabled */ 2030053be485SMarc Zyngier memset(va, LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1, LPI_PROPBASE_SZ); 2031053be485SMarc Zyngier 2032053be485SMarc Zyngier /* Make sure the GIC will observe the written configuration */ 2033053be485SMarc Zyngier gic_flush_dcache_to_poc(va, LPI_PROPBASE_SZ); 2034053be485SMarc Zyngier } 2035053be485SMarc Zyngier 20360e5ccf91SMarc Zyngier static struct page *its_allocate_prop_table(gfp_t gfp_flags) 20370e5ccf91SMarc Zyngier { 20380e5ccf91SMarc Zyngier struct page *prop_page; 20391ac19ca6SMarc Zyngier 20400e5ccf91SMarc Zyngier prop_page = alloc_pages(gfp_flags, get_order(LPI_PROPBASE_SZ)); 20410e5ccf91SMarc Zyngier if (!prop_page) 20420e5ccf91SMarc Zyngier return NULL; 20430e5ccf91SMarc Zyngier 2044053be485SMarc Zyngier gic_reset_prop_table(page_address(prop_page)); 20450e5ccf91SMarc Zyngier 20460e5ccf91SMarc Zyngier return prop_page; 20470e5ccf91SMarc Zyngier } 20480e5ccf91SMarc Zyngier 20497d75bbb4SMarc Zyngier static void its_free_prop_table(struct page *prop_page) 20507d75bbb4SMarc Zyngier { 20517d75bbb4SMarc Zyngier free_pages((unsigned long)page_address(prop_page), 20527d75bbb4SMarc Zyngier get_order(LPI_PROPBASE_SZ)); 20537d75bbb4SMarc Zyngier } 20541ac19ca6SMarc Zyngier 20555e2c9f9aSMarc Zyngier static bool gic_check_reserved_range(phys_addr_t addr, unsigned long size) 20565e2c9f9aSMarc Zyngier { 20575e2c9f9aSMarc Zyngier phys_addr_t start, end, addr_end; 20585e2c9f9aSMarc Zyngier u64 i; 20595e2c9f9aSMarc Zyngier 20605e2c9f9aSMarc Zyngier /* 20615e2c9f9aSMarc Zyngier * We don't bother checking for a kdump kernel as by 20625e2c9f9aSMarc Zyngier * construction, the LPI tables are out of this kernel's 20635e2c9f9aSMarc Zyngier * memory map. 20645e2c9f9aSMarc Zyngier */ 20655e2c9f9aSMarc Zyngier if (is_kdump_kernel()) 20665e2c9f9aSMarc Zyngier return true; 20675e2c9f9aSMarc Zyngier 20685e2c9f9aSMarc Zyngier addr_end = addr + size - 1; 20695e2c9f9aSMarc Zyngier 20705e2c9f9aSMarc Zyngier for_each_reserved_mem_region(i, &start, &end) { 20715e2c9f9aSMarc Zyngier if (addr >= start && addr_end <= end) 20725e2c9f9aSMarc Zyngier return true; 20735e2c9f9aSMarc Zyngier } 20745e2c9f9aSMarc Zyngier 20755e2c9f9aSMarc Zyngier /* Not found, not a good sign... */ 20765e2c9f9aSMarc Zyngier pr_warn("GICv3: Expected reserved range [%pa:%pa], not found\n", 20775e2c9f9aSMarc Zyngier &addr, &addr_end); 20785e2c9f9aSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 20795e2c9f9aSMarc Zyngier return false; 20805e2c9f9aSMarc Zyngier } 20815e2c9f9aSMarc Zyngier 20823fb68faeSMarc Zyngier static int gic_reserve_range(phys_addr_t addr, unsigned long size) 20833fb68faeSMarc Zyngier { 20843fb68faeSMarc Zyngier if (efi_enabled(EFI_CONFIG_TABLES)) 20853fb68faeSMarc Zyngier return efi_mem_reserve_persistent(addr, size); 20863fb68faeSMarc Zyngier 20873fb68faeSMarc Zyngier return 0; 20883fb68faeSMarc Zyngier } 20893fb68faeSMarc Zyngier 209011e37d35SMarc Zyngier static int __init its_setup_lpi_prop_table(void) 20911ac19ca6SMarc Zyngier { 2092c440a9d9SMarc Zyngier if (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) { 2093c440a9d9SMarc Zyngier u64 val; 2094c440a9d9SMarc Zyngier 2095c440a9d9SMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 2096c440a9d9SMarc Zyngier lpi_id_bits = (val & GICR_PROPBASER_IDBITS_MASK) + 1; 2097c440a9d9SMarc Zyngier 2098c440a9d9SMarc Zyngier gic_rdists->prop_table_pa = val & GENMASK_ULL(51, 12); 2099c440a9d9SMarc Zyngier gic_rdists->prop_table_va = memremap(gic_rdists->prop_table_pa, 2100c440a9d9SMarc Zyngier LPI_PROPBASE_SZ, 2101c440a9d9SMarc Zyngier MEMREMAP_WB); 2102c440a9d9SMarc Zyngier gic_reset_prop_table(gic_rdists->prop_table_va); 2103c440a9d9SMarc Zyngier } else { 2104e1a2e201SMarc Zyngier struct page *page; 21051ac19ca6SMarc Zyngier 2106c440a9d9SMarc Zyngier lpi_id_bits = min_t(u32, 2107c440a9d9SMarc Zyngier GICD_TYPER_ID_BITS(gic_rdists->gicd_typer), 21084cb205c0SJia He ITS_MAX_LPI_NRBITS); 2109e1a2e201SMarc Zyngier page = its_allocate_prop_table(GFP_NOWAIT); 2110e1a2e201SMarc Zyngier if (!page) { 21111ac19ca6SMarc Zyngier pr_err("Failed to allocate PROPBASE\n"); 21121ac19ca6SMarc Zyngier return -ENOMEM; 21131ac19ca6SMarc Zyngier } 21141ac19ca6SMarc Zyngier 2115e1a2e201SMarc Zyngier gic_rdists->prop_table_pa = page_to_phys(page); 2116e1a2e201SMarc Zyngier gic_rdists->prop_table_va = page_address(page); 21173fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(gic_rdists->prop_table_pa, 21183fb68faeSMarc Zyngier LPI_PROPBASE_SZ)); 2119c440a9d9SMarc Zyngier } 2120e1a2e201SMarc Zyngier 2121e1a2e201SMarc Zyngier pr_info("GICv3: using LPI property table @%pa\n", 2122e1a2e201SMarc Zyngier &gic_rdists->prop_table_pa); 21231ac19ca6SMarc Zyngier 21246c31e123SShanker Donthineni return its_lpi_init(lpi_id_bits); 21251ac19ca6SMarc Zyngier } 21261ac19ca6SMarc Zyngier 21271ac19ca6SMarc Zyngier static const char *its_base_type_string[] = { 21281ac19ca6SMarc Zyngier [GITS_BASER_TYPE_DEVICE] = "Devices", 21291ac19ca6SMarc Zyngier [GITS_BASER_TYPE_VCPU] = "Virtual CPUs", 21304f46de9dSMarc Zyngier [GITS_BASER_TYPE_RESERVED3] = "Reserved (3)", 21311ac19ca6SMarc Zyngier [GITS_BASER_TYPE_COLLECTION] = "Interrupt Collections", 21321ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED5] = "Reserved (5)", 21331ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED6] = "Reserved (6)", 21341ac19ca6SMarc Zyngier [GITS_BASER_TYPE_RESERVED7] = "Reserved (7)", 21351ac19ca6SMarc Zyngier }; 21361ac19ca6SMarc Zyngier 21372d81d425SShanker Donthineni static u64 its_read_baser(struct its_node *its, struct its_baser *baser) 21382d81d425SShanker Donthineni { 21392d81d425SShanker Donthineni u32 idx = baser - its->tables; 21402d81d425SShanker Donthineni 21410968a619SVladimir Murzin return gits_read_baser(its->base + GITS_BASER + (idx << 3)); 21422d81d425SShanker Donthineni } 21432d81d425SShanker Donthineni 21442d81d425SShanker Donthineni static void its_write_baser(struct its_node *its, struct its_baser *baser, 21452d81d425SShanker Donthineni u64 val) 21462d81d425SShanker Donthineni { 21472d81d425SShanker Donthineni u32 idx = baser - its->tables; 21482d81d425SShanker Donthineni 21490968a619SVladimir Murzin gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); 21502d81d425SShanker Donthineni baser->val = its_read_baser(its, baser); 21512d81d425SShanker Donthineni } 21522d81d425SShanker Donthineni 21539347359aSShanker Donthineni static int its_setup_baser(struct its_node *its, struct its_baser *baser, 21543faf24eaSShanker Donthineni u64 cache, u64 shr, u32 psz, u32 order, 21553faf24eaSShanker Donthineni bool indirect) 21569347359aSShanker Donthineni { 21579347359aSShanker Donthineni u64 val = its_read_baser(its, baser); 21589347359aSShanker Donthineni u64 esz = GITS_BASER_ENTRY_SIZE(val); 21599347359aSShanker Donthineni u64 type = GITS_BASER_TYPE(val); 216030ae9610SShanker Donthineni u64 baser_phys, tmp; 21619347359aSShanker Donthineni u32 alloc_pages; 2162539d3782SShanker Donthineni struct page *page; 21639347359aSShanker Donthineni void *base; 21649347359aSShanker Donthineni 21659347359aSShanker Donthineni retry_alloc_baser: 21669347359aSShanker Donthineni alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); 21679347359aSShanker Donthineni if (alloc_pages > GITS_BASER_PAGES_MAX) { 21689347359aSShanker Donthineni pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", 21699347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 21709347359aSShanker Donthineni alloc_pages, GITS_BASER_PAGES_MAX); 21719347359aSShanker Donthineni alloc_pages = GITS_BASER_PAGES_MAX; 21729347359aSShanker Donthineni order = get_order(GITS_BASER_PAGES_MAX * psz); 21739347359aSShanker Donthineni } 21749347359aSShanker Donthineni 2175539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); 2176539d3782SShanker Donthineni if (!page) 21779347359aSShanker Donthineni return -ENOMEM; 21789347359aSShanker Donthineni 2179539d3782SShanker Donthineni base = (void *)page_address(page); 218030ae9610SShanker Donthineni baser_phys = virt_to_phys(base); 218130ae9610SShanker Donthineni 218230ae9610SShanker Donthineni /* Check if the physical address of the memory is above 48bits */ 218330ae9610SShanker Donthineni if (IS_ENABLED(CONFIG_ARM64_64K_PAGES) && (baser_phys >> 48)) { 218430ae9610SShanker Donthineni 218530ae9610SShanker Donthineni /* 52bit PA is supported only when PageSize=64K */ 218630ae9610SShanker Donthineni if (psz != SZ_64K) { 218730ae9610SShanker Donthineni pr_err("ITS: no 52bit PA support when psz=%d\n", psz); 218830ae9610SShanker Donthineni free_pages((unsigned long)base, order); 218930ae9610SShanker Donthineni return -ENXIO; 219030ae9610SShanker Donthineni } 219130ae9610SShanker Donthineni 219230ae9610SShanker Donthineni /* Convert 52bit PA to 48bit field */ 219330ae9610SShanker Donthineni baser_phys = GITS_BASER_PHYS_52_to_48(baser_phys); 219430ae9610SShanker Donthineni } 219530ae9610SShanker Donthineni 21969347359aSShanker Donthineni retry_baser: 219730ae9610SShanker Donthineni val = (baser_phys | 21989347359aSShanker Donthineni (type << GITS_BASER_TYPE_SHIFT) | 21999347359aSShanker Donthineni ((esz - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | 22009347359aSShanker Donthineni ((alloc_pages - 1) << GITS_BASER_PAGES_SHIFT) | 22019347359aSShanker Donthineni cache | 22029347359aSShanker Donthineni shr | 22039347359aSShanker Donthineni GITS_BASER_VALID); 22049347359aSShanker Donthineni 22053faf24eaSShanker Donthineni val |= indirect ? GITS_BASER_INDIRECT : 0x0; 22063faf24eaSShanker Donthineni 22079347359aSShanker Donthineni switch (psz) { 22089347359aSShanker Donthineni case SZ_4K: 22099347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_4K; 22109347359aSShanker Donthineni break; 22119347359aSShanker Donthineni case SZ_16K: 22129347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_16K; 22139347359aSShanker Donthineni break; 22149347359aSShanker Donthineni case SZ_64K: 22159347359aSShanker Donthineni val |= GITS_BASER_PAGE_SIZE_64K; 22169347359aSShanker Donthineni break; 22179347359aSShanker Donthineni } 22189347359aSShanker Donthineni 22199347359aSShanker Donthineni its_write_baser(its, baser, val); 22209347359aSShanker Donthineni tmp = baser->val; 22219347359aSShanker Donthineni 22229347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { 22239347359aSShanker Donthineni /* 22249347359aSShanker Donthineni * Shareability didn't stick. Just use 22259347359aSShanker Donthineni * whatever the read reported, which is likely 22269347359aSShanker Donthineni * to be the only thing this redistributor 22279347359aSShanker Donthineni * supports. If that's zero, make it 22289347359aSShanker Donthineni * non-cacheable as well. 22299347359aSShanker Donthineni */ 22309347359aSShanker Donthineni shr = tmp & GITS_BASER_SHAREABILITY_MASK; 22319347359aSShanker Donthineni if (!shr) { 22329347359aSShanker Donthineni cache = GITS_BASER_nC; 2233328191c0SVladimir Murzin gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); 22349347359aSShanker Donthineni } 22359347359aSShanker Donthineni goto retry_baser; 22369347359aSShanker Donthineni } 22379347359aSShanker Donthineni 22389347359aSShanker Donthineni if ((val ^ tmp) & GITS_BASER_PAGE_SIZE_MASK) { 22399347359aSShanker Donthineni /* 22409347359aSShanker Donthineni * Page size didn't stick. Let's try a smaller 22419347359aSShanker Donthineni * size and retry. If we reach 4K, then 22429347359aSShanker Donthineni * something is horribly wrong... 22439347359aSShanker Donthineni */ 22449347359aSShanker Donthineni free_pages((unsigned long)base, order); 22459347359aSShanker Donthineni baser->base = NULL; 22469347359aSShanker Donthineni 22479347359aSShanker Donthineni switch (psz) { 22489347359aSShanker Donthineni case SZ_16K: 22499347359aSShanker Donthineni psz = SZ_4K; 22509347359aSShanker Donthineni goto retry_alloc_baser; 22519347359aSShanker Donthineni case SZ_64K: 22529347359aSShanker Donthineni psz = SZ_16K; 22539347359aSShanker Donthineni goto retry_alloc_baser; 22549347359aSShanker Donthineni } 22559347359aSShanker Donthineni } 22569347359aSShanker Donthineni 22579347359aSShanker Donthineni if (val != tmp) { 2258b11283ebSVladimir Murzin pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", 22599347359aSShanker Donthineni &its->phys_base, its_base_type_string[type], 2260b11283ebSVladimir Murzin val, tmp); 22619347359aSShanker Donthineni free_pages((unsigned long)base, order); 22629347359aSShanker Donthineni return -ENXIO; 22639347359aSShanker Donthineni } 22649347359aSShanker Donthineni 22659347359aSShanker Donthineni baser->order = order; 22669347359aSShanker Donthineni baser->base = base; 22679347359aSShanker Donthineni baser->psz = psz; 22683faf24eaSShanker Donthineni tmp = indirect ? GITS_LVL1_ENTRY_SIZE : esz; 22699347359aSShanker Donthineni 22703faf24eaSShanker Donthineni pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", 2271d524eaa2SVladimir Murzin &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), 22729347359aSShanker Donthineni its_base_type_string[type], 22739347359aSShanker Donthineni (unsigned long)virt_to_phys(base), 22743faf24eaSShanker Donthineni indirect ? "indirect" : "flat", (int)esz, 22759347359aSShanker Donthineni psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 22769347359aSShanker Donthineni 22779347359aSShanker Donthineni return 0; 22789347359aSShanker Donthineni } 22799347359aSShanker Donthineni 22804cacac57SMarc Zyngier static bool its_parse_indirect_baser(struct its_node *its, 22814cacac57SMarc Zyngier struct its_baser *baser, 228232bd44dcSShanker Donthineni u32 psz, u32 *order, u32 ids) 22834b75c459SShanker Donthineni { 22844cacac57SMarc Zyngier u64 tmp = its_read_baser(its, baser); 22854cacac57SMarc Zyngier u64 type = GITS_BASER_TYPE(tmp); 22864cacac57SMarc Zyngier u64 esz = GITS_BASER_ENTRY_SIZE(tmp); 22872fd632a0SShanker Donthineni u64 val = GITS_BASER_InnerShareable | GITS_BASER_RaWaWb; 22884b75c459SShanker Donthineni u32 new_order = *order; 22893faf24eaSShanker Donthineni bool indirect = false; 22903faf24eaSShanker Donthineni 22913faf24eaSShanker Donthineni /* No need to enable Indirection if memory requirement < (psz*2)bytes */ 22923faf24eaSShanker Donthineni if ((esz << ids) > (psz * 2)) { 22933faf24eaSShanker Donthineni /* 22943faf24eaSShanker Donthineni * Find out whether hw supports a single or two-level table by 22953faf24eaSShanker Donthineni * table by reading bit at offset '62' after writing '1' to it. 22963faf24eaSShanker Donthineni */ 22973faf24eaSShanker Donthineni its_write_baser(its, baser, val | GITS_BASER_INDIRECT); 22983faf24eaSShanker Donthineni indirect = !!(baser->val & GITS_BASER_INDIRECT); 22993faf24eaSShanker Donthineni 23003faf24eaSShanker Donthineni if (indirect) { 23013faf24eaSShanker Donthineni /* 23023faf24eaSShanker Donthineni * The size of the lvl2 table is equal to ITS page size 23033faf24eaSShanker Donthineni * which is 'psz'. For computing lvl1 table size, 23043faf24eaSShanker Donthineni * subtract ID bits that sparse lvl2 table from 'ids' 23053faf24eaSShanker Donthineni * which is reported by ITS hardware times lvl1 table 23063faf24eaSShanker Donthineni * entry size. 23073faf24eaSShanker Donthineni */ 2308d524eaa2SVladimir Murzin ids -= ilog2(psz / (int)esz); 23093faf24eaSShanker Donthineni esz = GITS_LVL1_ENTRY_SIZE; 23103faf24eaSShanker Donthineni } 23113faf24eaSShanker Donthineni } 23124b75c459SShanker Donthineni 23134b75c459SShanker Donthineni /* 23144b75c459SShanker Donthineni * Allocate as many entries as required to fit the 23154b75c459SShanker Donthineni * range of device IDs that the ITS can grok... The ID 23164b75c459SShanker Donthineni * space being incredibly sparse, this results in a 23173faf24eaSShanker Donthineni * massive waste of memory if two-level device table 23183faf24eaSShanker Donthineni * feature is not supported by hardware. 23194b75c459SShanker Donthineni */ 23204b75c459SShanker Donthineni new_order = max_t(u32, get_order(esz << ids), new_order); 23214b75c459SShanker Donthineni if (new_order >= MAX_ORDER) { 23224b75c459SShanker Donthineni new_order = MAX_ORDER - 1; 2323d524eaa2SVladimir Murzin ids = ilog2(PAGE_ORDER_TO_SIZE(new_order) / (int)esz); 2324576a8342SMarc Zyngier pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", 23254cacac57SMarc Zyngier &its->phys_base, its_base_type_string[type], 2326576a8342SMarc Zyngier device_ids(its), ids); 23274b75c459SShanker Donthineni } 23284b75c459SShanker Donthineni 23294b75c459SShanker Donthineni *order = new_order; 23303faf24eaSShanker Donthineni 23313faf24eaSShanker Donthineni return indirect; 23324b75c459SShanker Donthineni } 23334b75c459SShanker Donthineni 23345e516846SMarc Zyngier static u32 compute_common_aff(u64 val) 23355e516846SMarc Zyngier { 23365e516846SMarc Zyngier u32 aff, clpiaff; 23375e516846SMarc Zyngier 23385e516846SMarc Zyngier aff = FIELD_GET(GICR_TYPER_AFFINITY, val); 23395e516846SMarc Zyngier clpiaff = FIELD_GET(GICR_TYPER_COMMON_LPI_AFF, val); 23405e516846SMarc Zyngier 23415e516846SMarc Zyngier return aff & ~(GENMASK(31, 0) >> (clpiaff * 8)); 23425e516846SMarc Zyngier } 23435e516846SMarc Zyngier 23445e516846SMarc Zyngier static u32 compute_its_aff(struct its_node *its) 23455e516846SMarc Zyngier { 23465e516846SMarc Zyngier u64 val; 23475e516846SMarc Zyngier u32 svpet; 23485e516846SMarc Zyngier 23495e516846SMarc Zyngier /* 23505e516846SMarc Zyngier * Reencode the ITS SVPET and MPIDR as a GICR_TYPER, and compute 23515e516846SMarc Zyngier * the resulting affinity. We then use that to see if this match 23525e516846SMarc Zyngier * our own affinity. 23535e516846SMarc Zyngier */ 23545e516846SMarc Zyngier svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); 23555e516846SMarc Zyngier val = FIELD_PREP(GICR_TYPER_COMMON_LPI_AFF, svpet); 23565e516846SMarc Zyngier val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); 23575e516846SMarc Zyngier return compute_common_aff(val); 23585e516846SMarc Zyngier } 23595e516846SMarc Zyngier 23605e516846SMarc Zyngier static struct its_node *find_sibling_its(struct its_node *cur_its) 23615e516846SMarc Zyngier { 23625e516846SMarc Zyngier struct its_node *its; 23635e516846SMarc Zyngier u32 aff; 23645e516846SMarc Zyngier 23655e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, cur_its->typer)) 23665e516846SMarc Zyngier return NULL; 23675e516846SMarc Zyngier 23685e516846SMarc Zyngier aff = compute_its_aff(cur_its); 23695e516846SMarc Zyngier 23705e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 23715e516846SMarc Zyngier u64 baser; 23725e516846SMarc Zyngier 23735e516846SMarc Zyngier if (!is_v4_1(its) || its == cur_its) 23745e516846SMarc Zyngier continue; 23755e516846SMarc Zyngier 23765e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 23775e516846SMarc Zyngier continue; 23785e516846SMarc Zyngier 23795e516846SMarc Zyngier if (aff != compute_its_aff(its)) 23805e516846SMarc Zyngier continue; 23815e516846SMarc Zyngier 23825e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 23835e516846SMarc Zyngier baser = its->tables[2].val; 23845e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 23855e516846SMarc Zyngier continue; 23865e516846SMarc Zyngier 23875e516846SMarc Zyngier return its; 23885e516846SMarc Zyngier } 23895e516846SMarc Zyngier 23905e516846SMarc Zyngier return NULL; 23915e516846SMarc Zyngier } 23925e516846SMarc Zyngier 23931ac19ca6SMarc Zyngier static void its_free_tables(struct its_node *its) 23941ac19ca6SMarc Zyngier { 23951ac19ca6SMarc Zyngier int i; 23961ac19ca6SMarc Zyngier 23971ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 23981a485f4dSShanker Donthineni if (its->tables[i].base) { 23991a485f4dSShanker Donthineni free_pages((unsigned long)its->tables[i].base, 24001a485f4dSShanker Donthineni its->tables[i].order); 24011a485f4dSShanker Donthineni its->tables[i].base = NULL; 24021ac19ca6SMarc Zyngier } 24031ac19ca6SMarc Zyngier } 24041ac19ca6SMarc Zyngier } 24051ac19ca6SMarc Zyngier 24060e0b0f69SShanker Donthineni static int its_alloc_tables(struct its_node *its) 24071ac19ca6SMarc Zyngier { 24081ac19ca6SMarc Zyngier u64 shr = GITS_BASER_InnerShareable; 24092fd632a0SShanker Donthineni u64 cache = GITS_BASER_RaWaWb; 24109347359aSShanker Donthineni u32 psz = SZ_64K; 24119347359aSShanker Donthineni int err, i; 241294100970SRobert Richter 2413fa150019SArd Biesheuvel if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) 2414fa150019SArd Biesheuvel /* erratum 24313: ignore memory access type */ 24159347359aSShanker Donthineni cache = GITS_BASER_nCnB; 2416466b7d16SShanker Donthineni 24171ac19ca6SMarc Zyngier for (i = 0; i < GITS_BASER_NR_REGS; i++) { 24182d81d425SShanker Donthineni struct its_baser *baser = its->tables + i; 24192d81d425SShanker Donthineni u64 val = its_read_baser(its, baser); 24201ac19ca6SMarc Zyngier u64 type = GITS_BASER_TYPE(val); 24219347359aSShanker Donthineni u32 order = get_order(psz); 24223faf24eaSShanker Donthineni bool indirect = false; 24231ac19ca6SMarc Zyngier 24244cacac57SMarc Zyngier switch (type) { 24254cacac57SMarc Zyngier case GITS_BASER_TYPE_NONE: 24261ac19ca6SMarc Zyngier continue; 24271ac19ca6SMarc Zyngier 24284cacac57SMarc Zyngier case GITS_BASER_TYPE_DEVICE: 242932bd44dcSShanker Donthineni indirect = its_parse_indirect_baser(its, baser, 243032bd44dcSShanker Donthineni psz, &order, 2431576a8342SMarc Zyngier device_ids(its)); 24328d565748SZenghui Yu break; 24338d565748SZenghui Yu 24344cacac57SMarc Zyngier case GITS_BASER_TYPE_VCPU: 24355e516846SMarc Zyngier if (is_v4_1(its)) { 24365e516846SMarc Zyngier struct its_node *sibling; 24375e516846SMarc Zyngier 24385e516846SMarc Zyngier WARN_ON(i != 2); 24395e516846SMarc Zyngier if ((sibling = find_sibling_its(its))) { 24405e516846SMarc Zyngier *baser = sibling->tables[2]; 24415e516846SMarc Zyngier its_write_baser(its, baser, baser->val); 24425e516846SMarc Zyngier continue; 24435e516846SMarc Zyngier } 24445e516846SMarc Zyngier } 24455e516846SMarc Zyngier 24464cacac57SMarc Zyngier indirect = its_parse_indirect_baser(its, baser, 244732bd44dcSShanker Donthineni psz, &order, 244832bd44dcSShanker Donthineni ITS_MAX_VPEID_BITS); 24494cacac57SMarc Zyngier break; 24504cacac57SMarc Zyngier } 2451f54b97edSMarc Zyngier 24523faf24eaSShanker Donthineni err = its_setup_baser(its, baser, cache, shr, psz, order, indirect); 24539347359aSShanker Donthineni if (err < 0) { 24549347359aSShanker Donthineni its_free_tables(its); 24559347359aSShanker Donthineni return err; 245630f21363SRobert Richter } 245730f21363SRobert Richter 24589347359aSShanker Donthineni /* Update settings which will be used for next BASERn */ 24599347359aSShanker Donthineni psz = baser->psz; 24609347359aSShanker Donthineni cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 24619347359aSShanker Donthineni shr = baser->val & GITS_BASER_SHAREABILITY_MASK; 24621ac19ca6SMarc Zyngier } 24631ac19ca6SMarc Zyngier 24641ac19ca6SMarc Zyngier return 0; 24651ac19ca6SMarc Zyngier } 24661ac19ca6SMarc Zyngier 24675e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_its(void) 24685e516846SMarc Zyngier { 24695e516846SMarc Zyngier struct its_node *its; 24705e516846SMarc Zyngier u64 val; 24715e516846SMarc Zyngier u32 aff; 24725e516846SMarc Zyngier 24735e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 24745e516846SMarc Zyngier aff = compute_common_aff(val); 24755e516846SMarc Zyngier 24765e516846SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 24775e516846SMarc Zyngier u64 baser, addr; 24785e516846SMarc Zyngier 24795e516846SMarc Zyngier if (!is_v4_1(its)) 24805e516846SMarc Zyngier continue; 24815e516846SMarc Zyngier 24825e516846SMarc Zyngier if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) 24835e516846SMarc Zyngier continue; 24845e516846SMarc Zyngier 24855e516846SMarc Zyngier if (aff != compute_its_aff(its)) 24865e516846SMarc Zyngier continue; 24875e516846SMarc Zyngier 24885e516846SMarc Zyngier /* GICv4.1 guarantees that the vPE table is GITS_BASER2 */ 24895e516846SMarc Zyngier baser = its->tables[2].val; 24905e516846SMarc Zyngier if (!(baser & GITS_BASER_VALID)) 24915e516846SMarc Zyngier continue; 24925e516846SMarc Zyngier 24935e516846SMarc Zyngier /* We have a winner! */ 24948b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = its->tables[2].base; 24958b718d40SZenghui Yu 24965e516846SMarc Zyngier val = GICR_VPROPBASER_4_1_VALID; 24975e516846SMarc Zyngier if (baser & GITS_BASER_INDIRECT) 24985e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 24995e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, 25005e516846SMarc Zyngier FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)); 25015e516846SMarc Zyngier switch (FIELD_GET(GITS_BASER_PAGE_SIZE_MASK, baser)) { 25025e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 25035e516846SMarc Zyngier addr = GITS_BASER_ADDR_48_to_52(baser); 25045e516846SMarc Zyngier break; 25055e516846SMarc Zyngier default: 25065e516846SMarc Zyngier addr = baser & GENMASK_ULL(47, 12); 25075e516846SMarc Zyngier break; 25085e516846SMarc Zyngier } 25095e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, addr >> 12); 25105e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_SHAREABILITY_MASK, 25115e516846SMarc Zyngier FIELD_GET(GITS_BASER_SHAREABILITY_MASK, baser)); 25125e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_INNER_CACHEABILITY_MASK, 25135e516846SMarc Zyngier FIELD_GET(GITS_BASER_INNER_CACHEABILITY_MASK, baser)); 25145e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, GITS_BASER_NR_PAGES(baser) - 1); 25155e516846SMarc Zyngier 25165e516846SMarc Zyngier return val; 25175e516846SMarc Zyngier } 25185e516846SMarc Zyngier 25195e516846SMarc Zyngier return 0; 25205e516846SMarc Zyngier } 25215e516846SMarc Zyngier 25225e516846SMarc Zyngier static u64 inherit_vpe_l1_table_from_rd(cpumask_t **mask) 25235e516846SMarc Zyngier { 25245e516846SMarc Zyngier u32 aff; 25255e516846SMarc Zyngier u64 val; 25265e516846SMarc Zyngier int cpu; 25275e516846SMarc Zyngier 25285e516846SMarc Zyngier val = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 25295e516846SMarc Zyngier aff = compute_common_aff(val); 25305e516846SMarc Zyngier 25315e516846SMarc Zyngier for_each_possible_cpu(cpu) { 25325e516846SMarc Zyngier void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 25335e516846SMarc Zyngier 25345e516846SMarc Zyngier if (!base || cpu == smp_processor_id()) 25355e516846SMarc Zyngier continue; 25365e516846SMarc Zyngier 25375e516846SMarc Zyngier val = gic_read_typer(base + GICR_TYPER); 25384bccf1d7SZenghui Yu if (aff != compute_common_aff(val)) 25395e516846SMarc Zyngier continue; 25405e516846SMarc Zyngier 25415e516846SMarc Zyngier /* 25425e516846SMarc Zyngier * At this point, we have a victim. This particular CPU 25435e516846SMarc Zyngier * has already booted, and has an affinity that matches 25445e516846SMarc Zyngier * ours wrt CommonLPIAff. Let's use its own VPROPBASER. 25455e516846SMarc Zyngier * Make sure we don't write the Z bit in that case. 25465e516846SMarc Zyngier */ 25475186a6ccSZenghui Yu val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 25485e516846SMarc Zyngier val &= ~GICR_VPROPBASER_4_1_Z; 25495e516846SMarc Zyngier 25508b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = gic_data_rdist_cpu(cpu)->vpe_l1_base; 25515e516846SMarc Zyngier *mask = gic_data_rdist_cpu(cpu)->vpe_table_mask; 25525e516846SMarc Zyngier 25535e516846SMarc Zyngier return val; 25545e516846SMarc Zyngier } 25555e516846SMarc Zyngier 25565e516846SMarc Zyngier return 0; 25575e516846SMarc Zyngier } 25585e516846SMarc Zyngier 25594e6437f1SZenghui Yu static bool allocate_vpe_l2_table(int cpu, u32 id) 25604e6437f1SZenghui Yu { 25614e6437f1SZenghui Yu void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 2562490d332eSMarc Zyngier unsigned int psz, esz, idx, npg, gpsz; 2563490d332eSMarc Zyngier u64 val; 25644e6437f1SZenghui Yu struct page *page; 25654e6437f1SZenghui Yu __le64 *table; 25664e6437f1SZenghui Yu 25674e6437f1SZenghui Yu if (!gic_rdists->has_rvpeid) 25684e6437f1SZenghui Yu return true; 25694e6437f1SZenghui Yu 257028d160deSMarc Zyngier /* Skip non-present CPUs */ 257128d160deSMarc Zyngier if (!base) 257228d160deSMarc Zyngier return true; 257328d160deSMarc Zyngier 25745186a6ccSZenghui Yu val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); 25754e6437f1SZenghui Yu 25764e6437f1SZenghui Yu esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val) + 1; 25774e6437f1SZenghui Yu gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 25784e6437f1SZenghui Yu npg = FIELD_GET(GICR_VPROPBASER_4_1_SIZE, val) + 1; 25794e6437f1SZenghui Yu 25804e6437f1SZenghui Yu switch (gpsz) { 25814e6437f1SZenghui Yu default: 25824e6437f1SZenghui Yu WARN_ON(1); 25834e6437f1SZenghui Yu /* fall through */ 25844e6437f1SZenghui Yu case GIC_PAGE_SIZE_4K: 25854e6437f1SZenghui Yu psz = SZ_4K; 25864e6437f1SZenghui Yu break; 25874e6437f1SZenghui Yu case GIC_PAGE_SIZE_16K: 25884e6437f1SZenghui Yu psz = SZ_16K; 25894e6437f1SZenghui Yu break; 25904e6437f1SZenghui Yu case GIC_PAGE_SIZE_64K: 25914e6437f1SZenghui Yu psz = SZ_64K; 25924e6437f1SZenghui Yu break; 25934e6437f1SZenghui Yu } 25944e6437f1SZenghui Yu 25954e6437f1SZenghui Yu /* Don't allow vpe_id that exceeds single, flat table limit */ 25964e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_4_1_INDIRECT)) 25974e6437f1SZenghui Yu return (id < (npg * psz / (esz * SZ_8))); 25984e6437f1SZenghui Yu 25994e6437f1SZenghui Yu /* Compute 1st level table index & check if that exceeds table limit */ 26004e6437f1SZenghui Yu idx = id >> ilog2(psz / (esz * SZ_8)); 26014e6437f1SZenghui Yu if (idx >= (npg * psz / GITS_LVL1_ENTRY_SIZE)) 26024e6437f1SZenghui Yu return false; 26034e6437f1SZenghui Yu 26044e6437f1SZenghui Yu table = gic_data_rdist_cpu(cpu)->vpe_l1_base; 26054e6437f1SZenghui Yu 26064e6437f1SZenghui Yu /* Allocate memory for 2nd level table */ 26074e6437f1SZenghui Yu if (!table[idx]) { 26084e6437f1SZenghui Yu page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(psz)); 26094e6437f1SZenghui Yu if (!page) 26104e6437f1SZenghui Yu return false; 26114e6437f1SZenghui Yu 26124e6437f1SZenghui Yu /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 26134e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_SHAREABILITY_MASK)) 26144e6437f1SZenghui Yu gic_flush_dcache_to_poc(page_address(page), psz); 26154e6437f1SZenghui Yu 26164e6437f1SZenghui Yu table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 26174e6437f1SZenghui Yu 26184e6437f1SZenghui Yu /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 26194e6437f1SZenghui Yu if (!(val & GICR_VPROPBASER_SHAREABILITY_MASK)) 26204e6437f1SZenghui Yu gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 26214e6437f1SZenghui Yu 26224e6437f1SZenghui Yu /* Ensure updated table contents are visible to RD hardware */ 26234e6437f1SZenghui Yu dsb(sy); 26244e6437f1SZenghui Yu } 26254e6437f1SZenghui Yu 26264e6437f1SZenghui Yu return true; 26274e6437f1SZenghui Yu } 26284e6437f1SZenghui Yu 26295e516846SMarc Zyngier static int allocate_vpe_l1_table(void) 26305e516846SMarc Zyngier { 26315e516846SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 26325e516846SMarc Zyngier u64 val, gpsz, npg, pa; 26335e516846SMarc Zyngier unsigned int psz = SZ_64K; 26345e516846SMarc Zyngier unsigned int np, epp, esz; 26355e516846SMarc Zyngier struct page *page; 26365e516846SMarc Zyngier 26375e516846SMarc Zyngier if (!gic_rdists->has_rvpeid) 26385e516846SMarc Zyngier return 0; 26395e516846SMarc Zyngier 26405e516846SMarc Zyngier /* 26415e516846SMarc Zyngier * if VPENDBASER.Valid is set, disable any previously programmed 26425e516846SMarc Zyngier * VPE by setting PendingLast while clearing Valid. This has the 26435e516846SMarc Zyngier * effect of making sure no doorbell will be generated and we can 26445e516846SMarc Zyngier * then safely clear VPROPBASER.Valid. 26455e516846SMarc Zyngier */ 26465186a6ccSZenghui Yu if (gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER) & GICR_VPENDBASER_Valid) 26475186a6ccSZenghui Yu gicr_write_vpendbaser(GICR_VPENDBASER_PendingLast, 26485e516846SMarc Zyngier vlpi_base + GICR_VPENDBASER); 26495e516846SMarc Zyngier 26505e516846SMarc Zyngier /* 26515e516846SMarc Zyngier * If we can inherit the configuration from another RD, let's do 26525e516846SMarc Zyngier * so. Otherwise, we have to go through the allocation process. We 26535e516846SMarc Zyngier * assume that all RDs have the exact same requirements, as 26545e516846SMarc Zyngier * nothing will work otherwise. 26555e516846SMarc Zyngier */ 26565e516846SMarc Zyngier val = inherit_vpe_l1_table_from_rd(&gic_data_rdist()->vpe_table_mask); 26575e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 26585e516846SMarc Zyngier goto out; 26595e516846SMarc Zyngier 26605e516846SMarc Zyngier gic_data_rdist()->vpe_table_mask = kzalloc(sizeof(cpumask_t), GFP_KERNEL); 26615e516846SMarc Zyngier if (!gic_data_rdist()->vpe_table_mask) 26625e516846SMarc Zyngier return -ENOMEM; 26635e516846SMarc Zyngier 26645e516846SMarc Zyngier val = inherit_vpe_l1_table_from_its(); 26655e516846SMarc Zyngier if (val & GICR_VPROPBASER_4_1_VALID) 26665e516846SMarc Zyngier goto out; 26675e516846SMarc Zyngier 26685e516846SMarc Zyngier /* First probe the page size */ 26695e516846SMarc Zyngier val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K); 26705186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 26715186a6ccSZenghui Yu val = gicr_read_vpropbaser(vlpi_base + GICR_VPROPBASER); 26725e516846SMarc Zyngier gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); 26735e516846SMarc Zyngier esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val); 26745e516846SMarc Zyngier 26755e516846SMarc Zyngier switch (gpsz) { 26765e516846SMarc Zyngier default: 26775e516846SMarc Zyngier gpsz = GIC_PAGE_SIZE_4K; 26785e516846SMarc Zyngier /* fall through */ 26795e516846SMarc Zyngier case GIC_PAGE_SIZE_4K: 26805e516846SMarc Zyngier psz = SZ_4K; 26815e516846SMarc Zyngier break; 26825e516846SMarc Zyngier case GIC_PAGE_SIZE_16K: 26835e516846SMarc Zyngier psz = SZ_16K; 26845e516846SMarc Zyngier break; 26855e516846SMarc Zyngier case GIC_PAGE_SIZE_64K: 26865e516846SMarc Zyngier psz = SZ_64K; 26875e516846SMarc Zyngier break; 26885e516846SMarc Zyngier } 26895e516846SMarc Zyngier 26905e516846SMarc Zyngier /* 26915e516846SMarc Zyngier * Start populating the register from scratch, including RO fields 26925e516846SMarc Zyngier * (which we want to print in debug cases...) 26935e516846SMarc Zyngier */ 26945e516846SMarc Zyngier val = 0; 26955e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, gpsz); 26965e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ENTRY_SIZE, esz); 26975e516846SMarc Zyngier 26985e516846SMarc Zyngier /* How many entries per GIC page? */ 26995e516846SMarc Zyngier esz++; 27005e516846SMarc Zyngier epp = psz / (esz * SZ_8); 27015e516846SMarc Zyngier 27025e516846SMarc Zyngier /* 27035e516846SMarc Zyngier * If we need more than just a single L1 page, flag the table 27045e516846SMarc Zyngier * as indirect and compute the number of required L1 pages. 27055e516846SMarc Zyngier */ 27065e516846SMarc Zyngier if (epp < ITS_MAX_VPEID) { 27075e516846SMarc Zyngier int nl2; 27085e516846SMarc Zyngier 27095e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_INDIRECT; 27105e516846SMarc Zyngier 27115e516846SMarc Zyngier /* Number of L2 pages required to cover the VPEID space */ 27125e516846SMarc Zyngier nl2 = DIV_ROUND_UP(ITS_MAX_VPEID, epp); 27135e516846SMarc Zyngier 27145e516846SMarc Zyngier /* Number of L1 pages to point to the L2 pages */ 27155e516846SMarc Zyngier npg = DIV_ROUND_UP(nl2 * SZ_8, psz); 27165e516846SMarc Zyngier } else { 27175e516846SMarc Zyngier npg = 1; 27185e516846SMarc Zyngier } 27195e516846SMarc Zyngier 2720e88bd316SZenghui Yu val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1); 27215e516846SMarc Zyngier 27225e516846SMarc Zyngier /* Right, that's the number of CPU pages we need for L1 */ 27235e516846SMarc Zyngier np = DIV_ROUND_UP(npg * psz, PAGE_SIZE); 27245e516846SMarc Zyngier 27255e516846SMarc Zyngier pr_debug("np = %d, npg = %lld, psz = %d, epp = %d, esz = %d\n", 27265e516846SMarc Zyngier np, npg, psz, epp, esz); 27275e516846SMarc Zyngier page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(np * PAGE_SIZE)); 27285e516846SMarc Zyngier if (!page) 27295e516846SMarc Zyngier return -ENOMEM; 27305e516846SMarc Zyngier 27318b718d40SZenghui Yu gic_data_rdist()->vpe_l1_base = page_address(page); 27325e516846SMarc Zyngier pa = virt_to_phys(page_address(page)); 27335e516846SMarc Zyngier WARN_ON(!IS_ALIGNED(pa, psz)); 27345e516846SMarc Zyngier 27355e516846SMarc Zyngier val |= FIELD_PREP(GICR_VPROPBASER_4_1_ADDR, pa >> 12); 27365e516846SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 27375e516846SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 27385e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_Z; 27395e516846SMarc Zyngier val |= GICR_VPROPBASER_4_1_VALID; 27405e516846SMarc Zyngier 27415e516846SMarc Zyngier out: 27425186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 27435e516846SMarc Zyngier cpumask_set_cpu(smp_processor_id(), gic_data_rdist()->vpe_table_mask); 27445e516846SMarc Zyngier 27455e516846SMarc Zyngier pr_debug("CPU%d: VPROPBASER = %llx %*pbl\n", 27465e516846SMarc Zyngier smp_processor_id(), val, 27475e516846SMarc Zyngier cpumask_pr_args(gic_data_rdist()->vpe_table_mask)); 27485e516846SMarc Zyngier 27495e516846SMarc Zyngier return 0; 27505e516846SMarc Zyngier } 27515e516846SMarc Zyngier 27521ac19ca6SMarc Zyngier static int its_alloc_collections(struct its_node *its) 27531ac19ca6SMarc Zyngier { 275483559b47SMarc Zyngier int i; 275583559b47SMarc Zyngier 27566396bb22SKees Cook its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), 27571ac19ca6SMarc Zyngier GFP_KERNEL); 27581ac19ca6SMarc Zyngier if (!its->collections) 27591ac19ca6SMarc Zyngier return -ENOMEM; 27601ac19ca6SMarc Zyngier 276183559b47SMarc Zyngier for (i = 0; i < nr_cpu_ids; i++) 276283559b47SMarc Zyngier its->collections[i].target_address = ~0ULL; 276383559b47SMarc Zyngier 27641ac19ca6SMarc Zyngier return 0; 27651ac19ca6SMarc Zyngier } 27661ac19ca6SMarc Zyngier 27677c297a2dSMarc Zyngier static struct page *its_allocate_pending_table(gfp_t gfp_flags) 27687c297a2dSMarc Zyngier { 27697c297a2dSMarc Zyngier struct page *pend_page; 2770adaab500SMarc Zyngier 27717c297a2dSMarc Zyngier pend_page = alloc_pages(gfp_flags | __GFP_ZERO, 2772adaab500SMarc Zyngier get_order(LPI_PENDBASE_SZ)); 27737c297a2dSMarc Zyngier if (!pend_page) 27747c297a2dSMarc Zyngier return NULL; 27757c297a2dSMarc Zyngier 27767c297a2dSMarc Zyngier /* Make sure the GIC will observe the zero-ed page */ 27777c297a2dSMarc Zyngier gic_flush_dcache_to_poc(page_address(pend_page), LPI_PENDBASE_SZ); 27787c297a2dSMarc Zyngier 27797c297a2dSMarc Zyngier return pend_page; 27807c297a2dSMarc Zyngier } 27817c297a2dSMarc Zyngier 27827d75bbb4SMarc Zyngier static void its_free_pending_table(struct page *pt) 27837d75bbb4SMarc Zyngier { 2784adaab500SMarc Zyngier free_pages((unsigned long)page_address(pt), get_order(LPI_PENDBASE_SZ)); 27857d75bbb4SMarc Zyngier } 27867d75bbb4SMarc Zyngier 2787c6e2ccb6SMarc Zyngier /* 27885e2c9f9aSMarc Zyngier * Booting with kdump and LPIs enabled is generally fine. Any other 27895e2c9f9aSMarc Zyngier * case is wrong in the absence of firmware/EFI support. 2790c6e2ccb6SMarc Zyngier */ 2791c440a9d9SMarc Zyngier static bool enabled_lpis_allowed(void) 2792c440a9d9SMarc Zyngier { 27935e2c9f9aSMarc Zyngier phys_addr_t addr; 27945e2c9f9aSMarc Zyngier u64 val; 2795c6e2ccb6SMarc Zyngier 27965e2c9f9aSMarc Zyngier /* Check whether the property table is in a reserved region */ 27975e2c9f9aSMarc Zyngier val = gicr_read_propbaser(gic_data_rdist_rd_base() + GICR_PROPBASER); 27985e2c9f9aSMarc Zyngier addr = val & GENMASK_ULL(51, 12); 27995e2c9f9aSMarc Zyngier 28005e2c9f9aSMarc Zyngier return gic_check_reserved_range(addr, LPI_PROPBASE_SZ); 2801c440a9d9SMarc Zyngier } 2802c440a9d9SMarc Zyngier 280311e37d35SMarc Zyngier static int __init allocate_lpi_tables(void) 280411e37d35SMarc Zyngier { 2805c440a9d9SMarc Zyngier u64 val; 280611e37d35SMarc Zyngier int err, cpu; 280711e37d35SMarc Zyngier 2808c440a9d9SMarc Zyngier /* 2809c440a9d9SMarc Zyngier * If LPIs are enabled while we run this from the boot CPU, 2810c440a9d9SMarc Zyngier * flag the RD tables as pre-allocated if the stars do align. 2811c440a9d9SMarc Zyngier */ 2812c440a9d9SMarc Zyngier val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); 2813c440a9d9SMarc Zyngier if ((val & GICR_CTLR_ENABLE_LPIS) && enabled_lpis_allowed()) { 2814c440a9d9SMarc Zyngier gic_rdists->flags |= (RDIST_FLAGS_RD_TABLES_PREALLOCATED | 2815c440a9d9SMarc Zyngier RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING); 2816c440a9d9SMarc Zyngier pr_info("GICv3: Using preallocated redistributor tables\n"); 2817c440a9d9SMarc Zyngier } 2818c440a9d9SMarc Zyngier 281911e37d35SMarc Zyngier err = its_setup_lpi_prop_table(); 282011e37d35SMarc Zyngier if (err) 282111e37d35SMarc Zyngier return err; 282211e37d35SMarc Zyngier 282311e37d35SMarc Zyngier /* 282411e37d35SMarc Zyngier * We allocate all the pending tables anyway, as we may have a 282511e37d35SMarc Zyngier * mix of RDs that have had LPIs enabled, and some that 282611e37d35SMarc Zyngier * don't. We'll free the unused ones as each CPU comes online. 282711e37d35SMarc Zyngier */ 282811e37d35SMarc Zyngier for_each_possible_cpu(cpu) { 282911e37d35SMarc Zyngier struct page *pend_page; 283011e37d35SMarc Zyngier 283111e37d35SMarc Zyngier pend_page = its_allocate_pending_table(GFP_NOWAIT); 283211e37d35SMarc Zyngier if (!pend_page) { 283311e37d35SMarc Zyngier pr_err("Failed to allocate PENDBASE for CPU%d\n", cpu); 283411e37d35SMarc Zyngier return -ENOMEM; 283511e37d35SMarc Zyngier } 283611e37d35SMarc Zyngier 283711e37d35SMarc Zyngier gic_data_rdist_cpu(cpu)->pend_page = pend_page; 283811e37d35SMarc Zyngier } 283911e37d35SMarc Zyngier 284011e37d35SMarc Zyngier return 0; 284111e37d35SMarc Zyngier } 284211e37d35SMarc Zyngier 2843e64fab1aSMarc Zyngier static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set) 28446479450fSHeyi Guo { 28456479450fSHeyi Guo u32 count = 1000000; /* 1s! */ 28466479450fSHeyi Guo bool clean; 28476479450fSHeyi Guo u64 val; 28486479450fSHeyi Guo 28495186a6ccSZenghui Yu val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 28506479450fSHeyi Guo val &= ~GICR_VPENDBASER_Valid; 2851e64fab1aSMarc Zyngier val &= ~clr; 2852e64fab1aSMarc Zyngier val |= set; 28535186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 28546479450fSHeyi Guo 28556479450fSHeyi Guo do { 28565186a6ccSZenghui Yu val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER); 28576479450fSHeyi Guo clean = !(val & GICR_VPENDBASER_Dirty); 28586479450fSHeyi Guo if (!clean) { 28596479450fSHeyi Guo count--; 28606479450fSHeyi Guo cpu_relax(); 28616479450fSHeyi Guo udelay(1); 28626479450fSHeyi Guo } 28636479450fSHeyi Guo } while (!clean && count); 28646479450fSHeyi Guo 2865e64fab1aSMarc Zyngier if (unlikely(val & GICR_VPENDBASER_Dirty)) { 2866e64fab1aSMarc Zyngier pr_err_ratelimited("ITS virtual pending table not cleaning\n"); 2867e64fab1aSMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 2868e64fab1aSMarc Zyngier } 2869e64fab1aSMarc Zyngier 28706479450fSHeyi Guo return val; 28716479450fSHeyi Guo } 28726479450fSHeyi Guo 28731ac19ca6SMarc Zyngier static void its_cpu_init_lpis(void) 28741ac19ca6SMarc Zyngier { 28751ac19ca6SMarc Zyngier void __iomem *rbase = gic_data_rdist_rd_base(); 28761ac19ca6SMarc Zyngier struct page *pend_page; 287711e37d35SMarc Zyngier phys_addr_t paddr; 28781ac19ca6SMarc Zyngier u64 val, tmp; 28791ac19ca6SMarc Zyngier 288011e37d35SMarc Zyngier if (gic_data_rdist()->lpi_enabled) 28811ac19ca6SMarc Zyngier return; 28821ac19ca6SMarc Zyngier 2883c440a9d9SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 2884c440a9d9SMarc Zyngier if ((gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED) && 2885c440a9d9SMarc Zyngier (val & GICR_CTLR_ENABLE_LPIS)) { 2886f842ca8eSMarc Zyngier /* 2887f842ca8eSMarc Zyngier * Check that we get the same property table on all 2888f842ca8eSMarc Zyngier * RDs. If we don't, this is hopeless. 2889f842ca8eSMarc Zyngier */ 2890f842ca8eSMarc Zyngier paddr = gicr_read_propbaser(rbase + GICR_PROPBASER); 2891f842ca8eSMarc Zyngier paddr &= GENMASK_ULL(51, 12); 2892f842ca8eSMarc Zyngier if (WARN_ON(gic_rdists->prop_table_pa != paddr)) 2893f842ca8eSMarc Zyngier add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 2894f842ca8eSMarc Zyngier 2895c440a9d9SMarc Zyngier paddr = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2896c440a9d9SMarc Zyngier paddr &= GENMASK_ULL(51, 16); 2897c440a9d9SMarc Zyngier 28985e2c9f9aSMarc Zyngier WARN_ON(!gic_check_reserved_range(paddr, LPI_PENDBASE_SZ)); 2899c440a9d9SMarc Zyngier its_free_pending_table(gic_data_rdist()->pend_page); 2900c440a9d9SMarc Zyngier gic_data_rdist()->pend_page = NULL; 2901c440a9d9SMarc Zyngier 2902c440a9d9SMarc Zyngier goto out; 2903c440a9d9SMarc Zyngier } 2904c440a9d9SMarc Zyngier 290511e37d35SMarc Zyngier pend_page = gic_data_rdist()->pend_page; 29061ac19ca6SMarc Zyngier paddr = page_to_phys(pend_page); 29073fb68faeSMarc Zyngier WARN_ON(gic_reserve_range(paddr, LPI_PENDBASE_SZ)); 29081ac19ca6SMarc Zyngier 29091ac19ca6SMarc Zyngier /* set PROPBASE */ 2910e1a2e201SMarc Zyngier val = (gic_rdists->prop_table_pa | 29111ac19ca6SMarc Zyngier GICR_PROPBASER_InnerShareable | 29122fd632a0SShanker Donthineni GICR_PROPBASER_RaWaWb | 29131ac19ca6SMarc Zyngier ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK)); 29141ac19ca6SMarc Zyngier 29150968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 29160968a619SVladimir Murzin tmp = gicr_read_propbaser(rbase + GICR_PROPBASER); 29171ac19ca6SMarc Zyngier 29181ac19ca6SMarc Zyngier if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) { 2919241a386cSMarc Zyngier if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) { 2920241a386cSMarc Zyngier /* 2921241a386cSMarc Zyngier * The HW reports non-shareable, we must 2922241a386cSMarc Zyngier * remove the cacheability attributes as 2923241a386cSMarc Zyngier * well. 2924241a386cSMarc Zyngier */ 2925241a386cSMarc Zyngier val &= ~(GICR_PROPBASER_SHAREABILITY_MASK | 2926241a386cSMarc Zyngier GICR_PROPBASER_CACHEABILITY_MASK); 2927241a386cSMarc Zyngier val |= GICR_PROPBASER_nC; 29280968a619SVladimir Murzin gicr_write_propbaser(val, rbase + GICR_PROPBASER); 2929241a386cSMarc Zyngier } 29301ac19ca6SMarc Zyngier pr_info_once("GIC: using cache flushing for LPI property table\n"); 29311ac19ca6SMarc Zyngier gic_rdists->flags |= RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING; 29321ac19ca6SMarc Zyngier } 29331ac19ca6SMarc Zyngier 29341ac19ca6SMarc Zyngier /* set PENDBASE */ 29351ac19ca6SMarc Zyngier val = (page_to_phys(pend_page) | 29364ad3e363SMarc Zyngier GICR_PENDBASER_InnerShareable | 29372fd632a0SShanker Donthineni GICR_PENDBASER_RaWaWb); 29381ac19ca6SMarc Zyngier 29390968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 29400968a619SVladimir Murzin tmp = gicr_read_pendbaser(rbase + GICR_PENDBASER); 2941241a386cSMarc Zyngier 2942241a386cSMarc Zyngier if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) { 2943241a386cSMarc Zyngier /* 2944241a386cSMarc Zyngier * The HW reports non-shareable, we must remove the 2945241a386cSMarc Zyngier * cacheability attributes as well. 2946241a386cSMarc Zyngier */ 2947241a386cSMarc Zyngier val &= ~(GICR_PENDBASER_SHAREABILITY_MASK | 2948241a386cSMarc Zyngier GICR_PENDBASER_CACHEABILITY_MASK); 2949241a386cSMarc Zyngier val |= GICR_PENDBASER_nC; 29500968a619SVladimir Murzin gicr_write_pendbaser(val, rbase + GICR_PENDBASER); 2951241a386cSMarc Zyngier } 29521ac19ca6SMarc Zyngier 29531ac19ca6SMarc Zyngier /* Enable LPIs */ 29541ac19ca6SMarc Zyngier val = readl_relaxed(rbase + GICR_CTLR); 29551ac19ca6SMarc Zyngier val |= GICR_CTLR_ENABLE_LPIS; 29561ac19ca6SMarc Zyngier writel_relaxed(val, rbase + GICR_CTLR); 29571ac19ca6SMarc Zyngier 29585e516846SMarc Zyngier if (gic_rdists->has_vlpis && !gic_rdists->has_rvpeid) { 29596479450fSHeyi Guo void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 29606479450fSHeyi Guo 29616479450fSHeyi Guo /* 29626479450fSHeyi Guo * It's possible for CPU to receive VLPIs before it is 29636479450fSHeyi Guo * sheduled as a vPE, especially for the first CPU, and the 29646479450fSHeyi Guo * VLPI with INTID larger than 2^(IDbits+1) will be considered 29656479450fSHeyi Guo * as out of range and dropped by GIC. 29666479450fSHeyi Guo * So we initialize IDbits to known value to avoid VLPI drop. 29676479450fSHeyi Guo */ 29686479450fSHeyi Guo val = (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 29696479450fSHeyi Guo pr_debug("GICv4: CPU%d: Init IDbits to 0x%llx for GICR_VPROPBASER\n", 29706479450fSHeyi Guo smp_processor_id(), val); 29715186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 29726479450fSHeyi Guo 29736479450fSHeyi Guo /* 29746479450fSHeyi Guo * Also clear Valid bit of GICR_VPENDBASER, in case some 29756479450fSHeyi Guo * ancient programming gets left in and has possibility of 29766479450fSHeyi Guo * corrupting memory. 29776479450fSHeyi Guo */ 2978e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 29796479450fSHeyi Guo } 29806479450fSHeyi Guo 29815e516846SMarc Zyngier if (allocate_vpe_l1_table()) { 29825e516846SMarc Zyngier /* 29835e516846SMarc Zyngier * If the allocation has failed, we're in massive trouble. 29845e516846SMarc Zyngier * Disable direct injection, and pray that no VM was 29855e516846SMarc Zyngier * already running... 29865e516846SMarc Zyngier */ 29875e516846SMarc Zyngier gic_rdists->has_rvpeid = false; 29885e516846SMarc Zyngier gic_rdists->has_vlpis = false; 29895e516846SMarc Zyngier } 29905e516846SMarc Zyngier 29911ac19ca6SMarc Zyngier /* Make sure the GIC has seen the above */ 29921ac19ca6SMarc Zyngier dsb(sy); 2993c440a9d9SMarc Zyngier out: 299411e37d35SMarc Zyngier gic_data_rdist()->lpi_enabled = true; 2995c440a9d9SMarc Zyngier pr_info("GICv3: CPU%d: using %s LPI pending table @%pa\n", 299611e37d35SMarc Zyngier smp_processor_id(), 2997c440a9d9SMarc Zyngier gic_data_rdist()->pend_page ? "allocated" : "reserved", 299811e37d35SMarc Zyngier &paddr); 29991ac19ca6SMarc Zyngier } 30001ac19ca6SMarc Zyngier 3001920181ceSDerek Basehore static void its_cpu_init_collection(struct its_node *its) 30021ac19ca6SMarc Zyngier { 3003920181ceSDerek Basehore int cpu = smp_processor_id(); 30041ac19ca6SMarc Zyngier u64 target; 30051ac19ca6SMarc Zyngier 3006fbf8f40eSGanapatrao Kulkarni /* avoid cross node collections and its mapping */ 3007fbf8f40eSGanapatrao Kulkarni if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { 3008fbf8f40eSGanapatrao Kulkarni struct device_node *cpu_node; 3009fbf8f40eSGanapatrao Kulkarni 3010fbf8f40eSGanapatrao Kulkarni cpu_node = of_get_cpu_node(cpu, NULL); 3011fbf8f40eSGanapatrao Kulkarni if (its->numa_node != NUMA_NO_NODE && 3012fbf8f40eSGanapatrao Kulkarni its->numa_node != of_node_to_nid(cpu_node)) 3013920181ceSDerek Basehore return; 3014fbf8f40eSGanapatrao Kulkarni } 3015fbf8f40eSGanapatrao Kulkarni 30161ac19ca6SMarc Zyngier /* 30171ac19ca6SMarc Zyngier * We now have to bind each collection to its target 30181ac19ca6SMarc Zyngier * redistributor. 30191ac19ca6SMarc Zyngier */ 3020589ce5f4SMarc Zyngier if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { 30211ac19ca6SMarc Zyngier /* 30221ac19ca6SMarc Zyngier * This ITS wants the physical address of the 30231ac19ca6SMarc Zyngier * redistributor. 30241ac19ca6SMarc Zyngier */ 30251ac19ca6SMarc Zyngier target = gic_data_rdist()->phys_base; 30261ac19ca6SMarc Zyngier } else { 3027920181ceSDerek Basehore /* This ITS wants a linear CPU number. */ 3028589ce5f4SMarc Zyngier target = gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER); 3029263fcd31SMarc Zyngier target = GICR_TYPER_CPU_NUMBER(target) << 16; 30301ac19ca6SMarc Zyngier } 30311ac19ca6SMarc Zyngier 30321ac19ca6SMarc Zyngier /* Perform collection mapping */ 30331ac19ca6SMarc Zyngier its->collections[cpu].target_address = target; 30341ac19ca6SMarc Zyngier its->collections[cpu].col_id = cpu; 30351ac19ca6SMarc Zyngier 30361ac19ca6SMarc Zyngier its_send_mapc(its, &its->collections[cpu], 1); 30371ac19ca6SMarc Zyngier its_send_invall(its, &its->collections[cpu]); 30381ac19ca6SMarc Zyngier } 30391ac19ca6SMarc Zyngier 3040920181ceSDerek Basehore static void its_cpu_init_collections(void) 3041920181ceSDerek Basehore { 3042920181ceSDerek Basehore struct its_node *its; 3043920181ceSDerek Basehore 3044a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 3045920181ceSDerek Basehore 3046920181ceSDerek Basehore list_for_each_entry(its, &its_nodes, entry) 3047920181ceSDerek Basehore its_cpu_init_collection(its); 3048920181ceSDerek Basehore 3049a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 30501ac19ca6SMarc Zyngier } 305184a6a2e7SMarc Zyngier 305284a6a2e7SMarc Zyngier static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 305384a6a2e7SMarc Zyngier { 305484a6a2e7SMarc Zyngier struct its_device *its_dev = NULL, *tmp; 30553e39e8f5SMarc Zyngier unsigned long flags; 305684a6a2e7SMarc Zyngier 30573e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 305884a6a2e7SMarc Zyngier 305984a6a2e7SMarc Zyngier list_for_each_entry(tmp, &its->its_device_list, entry) { 306084a6a2e7SMarc Zyngier if (tmp->device_id == dev_id) { 306184a6a2e7SMarc Zyngier its_dev = tmp; 306284a6a2e7SMarc Zyngier break; 306384a6a2e7SMarc Zyngier } 306484a6a2e7SMarc Zyngier } 306584a6a2e7SMarc Zyngier 30663e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 306784a6a2e7SMarc Zyngier 306884a6a2e7SMarc Zyngier return its_dev; 306984a6a2e7SMarc Zyngier } 307084a6a2e7SMarc Zyngier 3071466b7d16SShanker Donthineni static struct its_baser *its_get_baser(struct its_node *its, u32 type) 3072466b7d16SShanker Donthineni { 3073466b7d16SShanker Donthineni int i; 3074466b7d16SShanker Donthineni 3075466b7d16SShanker Donthineni for (i = 0; i < GITS_BASER_NR_REGS; i++) { 3076466b7d16SShanker Donthineni if (GITS_BASER_TYPE(its->tables[i].val) == type) 3077466b7d16SShanker Donthineni return &its->tables[i]; 3078466b7d16SShanker Donthineni } 3079466b7d16SShanker Donthineni 3080466b7d16SShanker Donthineni return NULL; 3081466b7d16SShanker Donthineni } 3082466b7d16SShanker Donthineni 3083539d3782SShanker Donthineni static bool its_alloc_table_entry(struct its_node *its, 3084539d3782SShanker Donthineni struct its_baser *baser, u32 id) 30853faf24eaSShanker Donthineni { 30863faf24eaSShanker Donthineni struct page *page; 30873faf24eaSShanker Donthineni u32 esz, idx; 30883faf24eaSShanker Donthineni __le64 *table; 30893faf24eaSShanker Donthineni 30903faf24eaSShanker Donthineni /* Don't allow device id that exceeds single, flat table limit */ 30913faf24eaSShanker Donthineni esz = GITS_BASER_ENTRY_SIZE(baser->val); 30923faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_INDIRECT)) 309370cc81edSMarc Zyngier return (id < (PAGE_ORDER_TO_SIZE(baser->order) / esz)); 30943faf24eaSShanker Donthineni 30953faf24eaSShanker Donthineni /* Compute 1st level table index & check if that exceeds table limit */ 309670cc81edSMarc Zyngier idx = id >> ilog2(baser->psz / esz); 30973faf24eaSShanker Donthineni if (idx >= (PAGE_ORDER_TO_SIZE(baser->order) / GITS_LVL1_ENTRY_SIZE)) 30983faf24eaSShanker Donthineni return false; 30993faf24eaSShanker Donthineni 31003faf24eaSShanker Donthineni table = baser->base; 31013faf24eaSShanker Donthineni 31023faf24eaSShanker Donthineni /* Allocate memory for 2nd level table */ 31033faf24eaSShanker Donthineni if (!table[idx]) { 3104539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 3105539d3782SShanker Donthineni get_order(baser->psz)); 31063faf24eaSShanker Donthineni if (!page) 31073faf24eaSShanker Donthineni return false; 31083faf24eaSShanker Donthineni 31093faf24eaSShanker Donthineni /* Flush Lvl2 table to PoC if hw doesn't support coherency */ 31103faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 3111328191c0SVladimir Murzin gic_flush_dcache_to_poc(page_address(page), baser->psz); 31123faf24eaSShanker Donthineni 31133faf24eaSShanker Donthineni table[idx] = cpu_to_le64(page_to_phys(page) | GITS_BASER_VALID); 31143faf24eaSShanker Donthineni 31153faf24eaSShanker Donthineni /* Flush Lvl1 entry to PoC if hw doesn't support coherency */ 31163faf24eaSShanker Donthineni if (!(baser->val & GITS_BASER_SHAREABILITY_MASK)) 3117328191c0SVladimir Murzin gic_flush_dcache_to_poc(table + idx, GITS_LVL1_ENTRY_SIZE); 31183faf24eaSShanker Donthineni 31193faf24eaSShanker Donthineni /* Ensure updated table contents are visible to ITS hardware */ 31203faf24eaSShanker Donthineni dsb(sy); 31213faf24eaSShanker Donthineni } 31223faf24eaSShanker Donthineni 31233faf24eaSShanker Donthineni return true; 31243faf24eaSShanker Donthineni } 31253faf24eaSShanker Donthineni 312670cc81edSMarc Zyngier static bool its_alloc_device_table(struct its_node *its, u32 dev_id) 312770cc81edSMarc Zyngier { 312870cc81edSMarc Zyngier struct its_baser *baser; 312970cc81edSMarc Zyngier 313070cc81edSMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); 313170cc81edSMarc Zyngier 313270cc81edSMarc Zyngier /* Don't allow device id that exceeds ITS hardware limit */ 313370cc81edSMarc Zyngier if (!baser) 3134576a8342SMarc Zyngier return (ilog2(dev_id) < device_ids(its)); 313570cc81edSMarc Zyngier 3136539d3782SShanker Donthineni return its_alloc_table_entry(its, baser, dev_id); 313770cc81edSMarc Zyngier } 313870cc81edSMarc Zyngier 31397d75bbb4SMarc Zyngier static bool its_alloc_vpe_table(u32 vpe_id) 31407d75bbb4SMarc Zyngier { 31417d75bbb4SMarc Zyngier struct its_node *its; 31424e6437f1SZenghui Yu int cpu; 31437d75bbb4SMarc Zyngier 31447d75bbb4SMarc Zyngier /* 31457d75bbb4SMarc Zyngier * Make sure the L2 tables are allocated on *all* v4 ITSs. We 31467d75bbb4SMarc Zyngier * could try and only do it on ITSs corresponding to devices 31477d75bbb4SMarc Zyngier * that have interrupts targeted at this VPE, but the 31487d75bbb4SMarc Zyngier * complexity becomes crazy (and you have tons of memory 31497d75bbb4SMarc Zyngier * anyway, right?). 31507d75bbb4SMarc Zyngier */ 31517d75bbb4SMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 31527d75bbb4SMarc Zyngier struct its_baser *baser; 31537d75bbb4SMarc Zyngier 31540dd57fedSMarc Zyngier if (!is_v4(its)) 31557d75bbb4SMarc Zyngier continue; 31567d75bbb4SMarc Zyngier 31577d75bbb4SMarc Zyngier baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); 31587d75bbb4SMarc Zyngier if (!baser) 31597d75bbb4SMarc Zyngier return false; 31607d75bbb4SMarc Zyngier 3161539d3782SShanker Donthineni if (!its_alloc_table_entry(its, baser, vpe_id)) 31627d75bbb4SMarc Zyngier return false; 31637d75bbb4SMarc Zyngier } 31647d75bbb4SMarc Zyngier 31654e6437f1SZenghui Yu /* Non v4.1? No need to iterate RDs and go back early. */ 31664e6437f1SZenghui Yu if (!gic_rdists->has_rvpeid) 31674e6437f1SZenghui Yu return true; 31684e6437f1SZenghui Yu 31694e6437f1SZenghui Yu /* 31704e6437f1SZenghui Yu * Make sure the L2 tables are allocated for all copies of 31714e6437f1SZenghui Yu * the L1 table on *all* v4.1 RDs. 31724e6437f1SZenghui Yu */ 31734e6437f1SZenghui Yu for_each_possible_cpu(cpu) { 31744e6437f1SZenghui Yu if (!allocate_vpe_l2_table(cpu, vpe_id)) 31754e6437f1SZenghui Yu return false; 31764e6437f1SZenghui Yu } 31774e6437f1SZenghui Yu 31787d75bbb4SMarc Zyngier return true; 31797d75bbb4SMarc Zyngier } 31807d75bbb4SMarc Zyngier 318184a6a2e7SMarc Zyngier static struct its_device *its_create_device(struct its_node *its, u32 dev_id, 318293f94ea0SMarc Zyngier int nvecs, bool alloc_lpis) 318384a6a2e7SMarc Zyngier { 318484a6a2e7SMarc Zyngier struct its_device *dev; 318593f94ea0SMarc Zyngier unsigned long *lpi_map = NULL; 31863e39e8f5SMarc Zyngier unsigned long flags; 3187591e5becSMarc Zyngier u16 *col_map = NULL; 318884a6a2e7SMarc Zyngier void *itt; 318984a6a2e7SMarc Zyngier int lpi_base; 319084a6a2e7SMarc Zyngier int nr_lpis; 3191c8481267SMarc Zyngier int nr_ites; 319284a6a2e7SMarc Zyngier int sz; 319384a6a2e7SMarc Zyngier 31943faf24eaSShanker Donthineni if (!its_alloc_device_table(its, dev_id)) 3195466b7d16SShanker Donthineni return NULL; 3196466b7d16SShanker Donthineni 3197147c8f37SMarc Zyngier if (WARN_ON(!is_power_of_2(nvecs))) 3198147c8f37SMarc Zyngier nvecs = roundup_pow_of_two(nvecs); 3199147c8f37SMarc Zyngier 320084a6a2e7SMarc Zyngier dev = kzalloc(sizeof(*dev), GFP_KERNEL); 3201c8481267SMarc Zyngier /* 3202147c8f37SMarc Zyngier * Even if the device wants a single LPI, the ITT must be 3203147c8f37SMarc Zyngier * sized as a power of two (and you need at least one bit...). 3204c8481267SMarc Zyngier */ 3205147c8f37SMarc Zyngier nr_ites = max(2, nvecs); 3206ffedbf0cSMarc Zyngier sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); 320784a6a2e7SMarc Zyngier sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 3208539d3782SShanker Donthineni itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); 320993f94ea0SMarc Zyngier if (alloc_lpis) { 321038dd7c49SMarc Zyngier lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis); 3211591e5becSMarc Zyngier if (lpi_map) 32126396bb22SKees Cook col_map = kcalloc(nr_lpis, sizeof(*col_map), 321393f94ea0SMarc Zyngier GFP_KERNEL); 321493f94ea0SMarc Zyngier } else { 32156396bb22SKees Cook col_map = kcalloc(nr_ites, sizeof(*col_map), GFP_KERNEL); 321693f94ea0SMarc Zyngier nr_lpis = 0; 321793f94ea0SMarc Zyngier lpi_base = 0; 321893f94ea0SMarc Zyngier } 321984a6a2e7SMarc Zyngier 322093f94ea0SMarc Zyngier if (!dev || !itt || !col_map || (!lpi_map && alloc_lpis)) { 322184a6a2e7SMarc Zyngier kfree(dev); 322284a6a2e7SMarc Zyngier kfree(itt); 322384a6a2e7SMarc Zyngier kfree(lpi_map); 3224591e5becSMarc Zyngier kfree(col_map); 322584a6a2e7SMarc Zyngier return NULL; 322684a6a2e7SMarc Zyngier } 322784a6a2e7SMarc Zyngier 3228328191c0SVladimir Murzin gic_flush_dcache_to_poc(itt, sz); 32295a9a8915SMarc Zyngier 323084a6a2e7SMarc Zyngier dev->its = its; 323184a6a2e7SMarc Zyngier dev->itt = itt; 3232c8481267SMarc Zyngier dev->nr_ites = nr_ites; 3233591e5becSMarc Zyngier dev->event_map.lpi_map = lpi_map; 3234591e5becSMarc Zyngier dev->event_map.col_map = col_map; 3235591e5becSMarc Zyngier dev->event_map.lpi_base = lpi_base; 3236591e5becSMarc Zyngier dev->event_map.nr_lpis = nr_lpis; 323711635fa2SMarc Zyngier raw_spin_lock_init(&dev->event_map.vlpi_lock); 323884a6a2e7SMarc Zyngier dev->device_id = dev_id; 323984a6a2e7SMarc Zyngier INIT_LIST_HEAD(&dev->entry); 324084a6a2e7SMarc Zyngier 32413e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its->lock, flags); 324284a6a2e7SMarc Zyngier list_add(&dev->entry, &its->its_device_list); 32433e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its->lock, flags); 324484a6a2e7SMarc Zyngier 324584a6a2e7SMarc Zyngier /* Map device to its ITT */ 324684a6a2e7SMarc Zyngier its_send_mapd(dev, 1); 324784a6a2e7SMarc Zyngier 324884a6a2e7SMarc Zyngier return dev; 324984a6a2e7SMarc Zyngier } 325084a6a2e7SMarc Zyngier 325184a6a2e7SMarc Zyngier static void its_free_device(struct its_device *its_dev) 325284a6a2e7SMarc Zyngier { 32533e39e8f5SMarc Zyngier unsigned long flags; 32543e39e8f5SMarc Zyngier 32553e39e8f5SMarc Zyngier raw_spin_lock_irqsave(&its_dev->its->lock, flags); 325684a6a2e7SMarc Zyngier list_del(&its_dev->entry); 32573e39e8f5SMarc Zyngier raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); 3258898aa5ceSMarc Zyngier kfree(its_dev->event_map.col_map); 325984a6a2e7SMarc Zyngier kfree(its_dev->itt); 326084a6a2e7SMarc Zyngier kfree(its_dev); 326184a6a2e7SMarc Zyngier } 3262b48ac83dSMarc Zyngier 32638208d170SMarc Zyngier static int its_alloc_device_irq(struct its_device *dev, int nvecs, irq_hw_number_t *hwirq) 3264b48ac83dSMarc Zyngier { 3265b48ac83dSMarc Zyngier int idx; 3266b48ac83dSMarc Zyngier 3267342be106SZenghui Yu /* Find a free LPI region in lpi_map and allocate them. */ 32688208d170SMarc Zyngier idx = bitmap_find_free_region(dev->event_map.lpi_map, 32698208d170SMarc Zyngier dev->event_map.nr_lpis, 32708208d170SMarc Zyngier get_count_order(nvecs)); 32718208d170SMarc Zyngier if (idx < 0) 3272b48ac83dSMarc Zyngier return -ENOSPC; 3273b48ac83dSMarc Zyngier 3274591e5becSMarc Zyngier *hwirq = dev->event_map.lpi_base + idx; 3275b48ac83dSMarc Zyngier 3276b48ac83dSMarc Zyngier return 0; 3277b48ac83dSMarc Zyngier } 3278b48ac83dSMarc Zyngier 327954456db9SMarc Zyngier static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 3280b48ac83dSMarc Zyngier int nvec, msi_alloc_info_t *info) 3281b48ac83dSMarc Zyngier { 3282b48ac83dSMarc Zyngier struct its_node *its; 3283b48ac83dSMarc Zyngier struct its_device *its_dev; 328454456db9SMarc Zyngier struct msi_domain_info *msi_info; 328554456db9SMarc Zyngier u32 dev_id; 32869791ec7dSMarc Zyngier int err = 0; 3287b48ac83dSMarc Zyngier 328854456db9SMarc Zyngier /* 3289a7c90f51SJulien Grall * We ignore "dev" entirely, and rely on the dev_id that has 329054456db9SMarc Zyngier * been passed via the scratchpad. This limits this domain's 329154456db9SMarc Zyngier * usefulness to upper layers that definitely know that they 329254456db9SMarc Zyngier * are built on top of the ITS. 329354456db9SMarc Zyngier */ 329454456db9SMarc Zyngier dev_id = info->scratchpad[0].ul; 329554456db9SMarc Zyngier 329654456db9SMarc Zyngier msi_info = msi_get_domain_info(domain); 329754456db9SMarc Zyngier its = msi_info->data; 329854456db9SMarc Zyngier 329920b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi && 330020b3d54eSMarc Zyngier vpe_proxy.dev && 330120b3d54eSMarc Zyngier vpe_proxy.dev->its == its && 330220b3d54eSMarc Zyngier dev_id == vpe_proxy.dev->device_id) { 330320b3d54eSMarc Zyngier /* Bad luck. Get yourself a better implementation */ 330420b3d54eSMarc Zyngier WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n", 330520b3d54eSMarc Zyngier dev_id); 330620b3d54eSMarc Zyngier return -EINVAL; 330720b3d54eSMarc Zyngier } 330820b3d54eSMarc Zyngier 33099791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 3310f130420eSMarc Zyngier its_dev = its_find_device(its, dev_id); 3311e8137f4fSMarc Zyngier if (its_dev) { 3312e8137f4fSMarc Zyngier /* 3313e8137f4fSMarc Zyngier * We already have seen this ID, probably through 3314e8137f4fSMarc Zyngier * another alias (PCI bridge of some sort). No need to 3315e8137f4fSMarc Zyngier * create the device. 3316e8137f4fSMarc Zyngier */ 33179791ec7dSMarc Zyngier its_dev->shared = true; 3318f130420eSMarc Zyngier pr_debug("Reusing ITT for devID %x\n", dev_id); 3319e8137f4fSMarc Zyngier goto out; 3320e8137f4fSMarc Zyngier } 3321b48ac83dSMarc Zyngier 332293f94ea0SMarc Zyngier its_dev = its_create_device(its, dev_id, nvec, true); 33239791ec7dSMarc Zyngier if (!its_dev) { 33249791ec7dSMarc Zyngier err = -ENOMEM; 33259791ec7dSMarc Zyngier goto out; 33269791ec7dSMarc Zyngier } 3327b48ac83dSMarc Zyngier 3328f130420eSMarc Zyngier pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 3329e8137f4fSMarc Zyngier out: 33309791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 3331b48ac83dSMarc Zyngier info->scratchpad[0].ptr = its_dev; 33329791ec7dSMarc Zyngier return err; 3333b48ac83dSMarc Zyngier } 3334b48ac83dSMarc Zyngier 333554456db9SMarc Zyngier static struct msi_domain_ops its_msi_domain_ops = { 333654456db9SMarc Zyngier .msi_prepare = its_msi_prepare, 333754456db9SMarc Zyngier }; 333854456db9SMarc Zyngier 3339b48ac83dSMarc Zyngier static int its_irq_gic_domain_alloc(struct irq_domain *domain, 3340b48ac83dSMarc Zyngier unsigned int virq, 3341b48ac83dSMarc Zyngier irq_hw_number_t hwirq) 3342b48ac83dSMarc Zyngier { 3343f833f57fSMarc Zyngier struct irq_fwspec fwspec; 3344b48ac83dSMarc Zyngier 3345f833f57fSMarc Zyngier if (irq_domain_get_of_node(domain->parent)) { 3346f833f57fSMarc Zyngier fwspec.fwnode = domain->parent->fwnode; 3347f833f57fSMarc Zyngier fwspec.param_count = 3; 3348f833f57fSMarc Zyngier fwspec.param[0] = GIC_IRQ_TYPE_LPI; 3349f833f57fSMarc Zyngier fwspec.param[1] = hwirq; 3350f833f57fSMarc Zyngier fwspec.param[2] = IRQ_TYPE_EDGE_RISING; 33513f010cf1STomasz Nowicki } else if (is_fwnode_irqchip(domain->parent->fwnode)) { 33523f010cf1STomasz Nowicki fwspec.fwnode = domain->parent->fwnode; 33533f010cf1STomasz Nowicki fwspec.param_count = 2; 33543f010cf1STomasz Nowicki fwspec.param[0] = hwirq; 33553f010cf1STomasz Nowicki fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 3356f833f57fSMarc Zyngier } else { 3357f833f57fSMarc Zyngier return -EINVAL; 3358f833f57fSMarc Zyngier } 3359b48ac83dSMarc Zyngier 3360f833f57fSMarc Zyngier return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 3361b48ac83dSMarc Zyngier } 3362b48ac83dSMarc Zyngier 3363b48ac83dSMarc Zyngier static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 3364b48ac83dSMarc Zyngier unsigned int nr_irqs, void *args) 3365b48ac83dSMarc Zyngier { 3366b48ac83dSMarc Zyngier msi_alloc_info_t *info = args; 3367b48ac83dSMarc Zyngier struct its_device *its_dev = info->scratchpad[0].ptr; 336835ae7df2SJulien Grall struct its_node *its = its_dev->its; 3369b48ac83dSMarc Zyngier irq_hw_number_t hwirq; 3370b48ac83dSMarc Zyngier int err; 3371b48ac83dSMarc Zyngier int i; 3372b48ac83dSMarc Zyngier 33738208d170SMarc Zyngier err = its_alloc_device_irq(its_dev, nr_irqs, &hwirq); 3374b48ac83dSMarc Zyngier if (err) 3375b48ac83dSMarc Zyngier return err; 3376b48ac83dSMarc Zyngier 337735ae7df2SJulien Grall err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); 337835ae7df2SJulien Grall if (err) 337935ae7df2SJulien Grall return err; 338035ae7df2SJulien Grall 33818208d170SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 33828208d170SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, hwirq + i); 3383b48ac83dSMarc Zyngier if (err) 3384b48ac83dSMarc Zyngier return err; 3385b48ac83dSMarc Zyngier 3386b48ac83dSMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, 33878208d170SMarc Zyngier hwirq + i, &its_irq_chip, its_dev); 33880d224d35SMarc Zyngier irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); 3389f130420eSMarc Zyngier pr_debug("ID:%d pID:%d vID:%d\n", 33908208d170SMarc Zyngier (int)(hwirq + i - its_dev->event_map.lpi_base), 33918208d170SMarc Zyngier (int)(hwirq + i), virq + i); 3392b48ac83dSMarc Zyngier } 3393b48ac83dSMarc Zyngier 3394b48ac83dSMarc Zyngier return 0; 3395b48ac83dSMarc Zyngier } 3396b48ac83dSMarc Zyngier 339772491643SThomas Gleixner static int its_irq_domain_activate(struct irq_domain *domain, 3398702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 3399aca268dfSMarc Zyngier { 3400aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3401aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 3402fbf8f40eSGanapatrao Kulkarni const struct cpumask *cpu_mask = cpu_online_mask; 34030d224d35SMarc Zyngier int cpu; 3404fbf8f40eSGanapatrao Kulkarni 3405fbf8f40eSGanapatrao Kulkarni /* get the cpu_mask of local node */ 3406fbf8f40eSGanapatrao Kulkarni if (its_dev->its->numa_node >= 0) 3407fbf8f40eSGanapatrao Kulkarni cpu_mask = cpumask_of_node(its_dev->its->numa_node); 3408aca268dfSMarc Zyngier 3409591e5becSMarc Zyngier /* Bind the LPI to the first possible CPU */ 3410c1797b11SYang Yingliang cpu = cpumask_first_and(cpu_mask, cpu_online_mask); 3411c1797b11SYang Yingliang if (cpu >= nr_cpu_ids) { 3412c1797b11SYang Yingliang if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) 3413c1797b11SYang Yingliang return -EINVAL; 3414c1797b11SYang Yingliang 3415c1797b11SYang Yingliang cpu = cpumask_first(cpu_online_mask); 3416c1797b11SYang Yingliang } 3417c1797b11SYang Yingliang 34180d224d35SMarc Zyngier its_dev->event_map.col_map[event] = cpu; 34190d224d35SMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3420591e5becSMarc Zyngier 3421aca268dfSMarc Zyngier /* Map the GIC IRQ and event to the device */ 34226a25ad3aSMarc Zyngier its_send_mapti(its_dev, d->hwirq, event); 342372491643SThomas Gleixner return 0; 3424aca268dfSMarc Zyngier } 3425aca268dfSMarc Zyngier 3426aca268dfSMarc Zyngier static void its_irq_domain_deactivate(struct irq_domain *domain, 3427aca268dfSMarc Zyngier struct irq_data *d) 3428aca268dfSMarc Zyngier { 3429aca268dfSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 3430aca268dfSMarc Zyngier u32 event = its_get_event_id(d); 3431aca268dfSMarc Zyngier 3432aca268dfSMarc Zyngier /* Stop the delivery of interrupts */ 3433aca268dfSMarc Zyngier its_send_discard(its_dev, event); 3434aca268dfSMarc Zyngier } 3435aca268dfSMarc Zyngier 3436b48ac83dSMarc Zyngier static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq, 3437b48ac83dSMarc Zyngier unsigned int nr_irqs) 3438b48ac83dSMarc Zyngier { 3439b48ac83dSMarc Zyngier struct irq_data *d = irq_domain_get_irq_data(domain, virq); 3440b48ac83dSMarc Zyngier struct its_device *its_dev = irq_data_get_irq_chip_data(d); 34419791ec7dSMarc Zyngier struct its_node *its = its_dev->its; 3442b48ac83dSMarc Zyngier int i; 3443b48ac83dSMarc Zyngier 3444c9c96e30SMarc Zyngier bitmap_release_region(its_dev->event_map.lpi_map, 3445c9c96e30SMarc Zyngier its_get_event_id(irq_domain_get_irq_data(domain, virq)), 3446c9c96e30SMarc Zyngier get_count_order(nr_irqs)); 3447c9c96e30SMarc Zyngier 3448b48ac83dSMarc Zyngier for (i = 0; i < nr_irqs; i++) { 3449b48ac83dSMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 3450b48ac83dSMarc Zyngier virq + i); 3451b48ac83dSMarc Zyngier /* Nuke the entry in the domain */ 34522da39949SMarc Zyngier irq_domain_reset_irq_data(data); 3453b48ac83dSMarc Zyngier } 3454b48ac83dSMarc Zyngier 34559791ec7dSMarc Zyngier mutex_lock(&its->dev_alloc_lock); 34569791ec7dSMarc Zyngier 34579791ec7dSMarc Zyngier /* 34589791ec7dSMarc Zyngier * If all interrupts have been freed, start mopping the 34599791ec7dSMarc Zyngier * floor. This is conditionned on the device not being shared. 34609791ec7dSMarc Zyngier */ 34619791ec7dSMarc Zyngier if (!its_dev->shared && 34629791ec7dSMarc Zyngier bitmap_empty(its_dev->event_map.lpi_map, 3463591e5becSMarc Zyngier its_dev->event_map.nr_lpis)) { 346438dd7c49SMarc Zyngier its_lpi_free(its_dev->event_map.lpi_map, 3465cf2be8baSMarc Zyngier its_dev->event_map.lpi_base, 3466cf2be8baSMarc Zyngier its_dev->event_map.nr_lpis); 3467b48ac83dSMarc Zyngier 3468b48ac83dSMarc Zyngier /* Unmap device/itt */ 3469b48ac83dSMarc Zyngier its_send_mapd(its_dev, 0); 3470b48ac83dSMarc Zyngier its_free_device(its_dev); 3471b48ac83dSMarc Zyngier } 3472b48ac83dSMarc Zyngier 34739791ec7dSMarc Zyngier mutex_unlock(&its->dev_alloc_lock); 34749791ec7dSMarc Zyngier 3475b48ac83dSMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 3476b48ac83dSMarc Zyngier } 3477b48ac83dSMarc Zyngier 3478b48ac83dSMarc Zyngier static const struct irq_domain_ops its_domain_ops = { 3479b48ac83dSMarc Zyngier .alloc = its_irq_domain_alloc, 3480b48ac83dSMarc Zyngier .free = its_irq_domain_free, 3481aca268dfSMarc Zyngier .activate = its_irq_domain_activate, 3482aca268dfSMarc Zyngier .deactivate = its_irq_domain_deactivate, 3483b48ac83dSMarc Zyngier }; 34844c21f3c2SMarc Zyngier 348520b3d54eSMarc Zyngier /* 348620b3d54eSMarc Zyngier * This is insane. 348720b3d54eSMarc Zyngier * 34880684c704SMarc Zyngier * If a GICv4.0 doesn't implement Direct LPIs (which is extremely 348920b3d54eSMarc Zyngier * likely), the only way to perform an invalidate is to use a fake 349020b3d54eSMarc Zyngier * device to issue an INV command, implying that the LPI has first 349120b3d54eSMarc Zyngier * been mapped to some event on that device. Since this is not exactly 349220b3d54eSMarc Zyngier * cheap, we try to keep that mapping around as long as possible, and 349320b3d54eSMarc Zyngier * only issue an UNMAP if we're short on available slots. 349420b3d54eSMarc Zyngier * 349520b3d54eSMarc Zyngier * Broken by design(tm). 34960684c704SMarc Zyngier * 34970684c704SMarc Zyngier * GICv4.1, on the other hand, mandates that we're able to invalidate 34980684c704SMarc Zyngier * by writing to a MMIO register. It doesn't implement the whole of 34990684c704SMarc Zyngier * DirectLPI, but that's good enough. And most of the time, we don't 35000684c704SMarc Zyngier * even have to invalidate anything, as the redistributor can be told 35010684c704SMarc Zyngier * whether to generate a doorbell or not (we thus leave it enabled, 35020684c704SMarc Zyngier * always). 350320b3d54eSMarc Zyngier */ 350420b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap_locked(struct its_vpe *vpe) 350520b3d54eSMarc Zyngier { 35060684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 35070684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 35080684c704SMarc Zyngier return; 35090684c704SMarc Zyngier 351020b3d54eSMarc Zyngier /* Already unmapped? */ 351120b3d54eSMarc Zyngier if (vpe->vpe_proxy_event == -1) 351220b3d54eSMarc Zyngier return; 351320b3d54eSMarc Zyngier 351420b3d54eSMarc Zyngier its_send_discard(vpe_proxy.dev, vpe->vpe_proxy_event); 351520b3d54eSMarc Zyngier vpe_proxy.vpes[vpe->vpe_proxy_event] = NULL; 351620b3d54eSMarc Zyngier 351720b3d54eSMarc Zyngier /* 351820b3d54eSMarc Zyngier * We don't track empty slots at all, so let's move the 351920b3d54eSMarc Zyngier * next_victim pointer if we can quickly reuse that slot 352020b3d54eSMarc Zyngier * instead of nuking an existing entry. Not clear that this is 352120b3d54eSMarc Zyngier * always a win though, and this might just generate a ripple 352220b3d54eSMarc Zyngier * effect... Let's just hope VPEs don't migrate too often. 352320b3d54eSMarc Zyngier */ 352420b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 352520b3d54eSMarc Zyngier vpe_proxy.next_victim = vpe->vpe_proxy_event; 352620b3d54eSMarc Zyngier 352720b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 352820b3d54eSMarc Zyngier } 352920b3d54eSMarc Zyngier 353020b3d54eSMarc Zyngier static void its_vpe_db_proxy_unmap(struct its_vpe *vpe) 353120b3d54eSMarc Zyngier { 35320684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 35330684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 35340684c704SMarc Zyngier return; 35350684c704SMarc Zyngier 353620b3d54eSMarc Zyngier if (!gic_rdists->has_direct_lpi) { 353720b3d54eSMarc Zyngier unsigned long flags; 353820b3d54eSMarc Zyngier 353920b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 354020b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe); 354120b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 354220b3d54eSMarc Zyngier } 354320b3d54eSMarc Zyngier } 354420b3d54eSMarc Zyngier 354520b3d54eSMarc Zyngier static void its_vpe_db_proxy_map_locked(struct its_vpe *vpe) 354620b3d54eSMarc Zyngier { 35470684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 35480684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 35490684c704SMarc Zyngier return; 35500684c704SMarc Zyngier 355120b3d54eSMarc Zyngier /* Already mapped? */ 355220b3d54eSMarc Zyngier if (vpe->vpe_proxy_event != -1) 355320b3d54eSMarc Zyngier return; 355420b3d54eSMarc Zyngier 355520b3d54eSMarc Zyngier /* This slot was already allocated. Kick the other VPE out. */ 355620b3d54eSMarc Zyngier if (vpe_proxy.vpes[vpe_proxy.next_victim]) 355720b3d54eSMarc Zyngier its_vpe_db_proxy_unmap_locked(vpe_proxy.vpes[vpe_proxy.next_victim]); 355820b3d54eSMarc Zyngier 355920b3d54eSMarc Zyngier /* Map the new VPE instead */ 356020b3d54eSMarc Zyngier vpe_proxy.vpes[vpe_proxy.next_victim] = vpe; 356120b3d54eSMarc Zyngier vpe->vpe_proxy_event = vpe_proxy.next_victim; 356220b3d54eSMarc Zyngier vpe_proxy.next_victim = (vpe_proxy.next_victim + 1) % vpe_proxy.dev->nr_ites; 356320b3d54eSMarc Zyngier 356420b3d54eSMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = vpe->col_idx; 356520b3d54eSMarc Zyngier its_send_mapti(vpe_proxy.dev, vpe->vpe_db_lpi, vpe->vpe_proxy_event); 356620b3d54eSMarc Zyngier } 356720b3d54eSMarc Zyngier 3568958b90d1SMarc Zyngier static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) 3569958b90d1SMarc Zyngier { 3570958b90d1SMarc Zyngier unsigned long flags; 3571958b90d1SMarc Zyngier struct its_collection *target_col; 3572958b90d1SMarc Zyngier 35730684c704SMarc Zyngier /* GICv4.1 doesn't use a proxy, so nothing to do here */ 35740684c704SMarc Zyngier if (gic_rdists->has_rvpeid) 35750684c704SMarc Zyngier return; 35760684c704SMarc Zyngier 3577958b90d1SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3578958b90d1SMarc Zyngier void __iomem *rdbase; 3579958b90d1SMarc Zyngier 3580958b90d1SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; 3581958b90d1SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 35822f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3583958b90d1SMarc Zyngier 3584958b90d1SMarc Zyngier return; 3585958b90d1SMarc Zyngier } 3586958b90d1SMarc Zyngier 3587958b90d1SMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 3588958b90d1SMarc Zyngier 3589958b90d1SMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 3590958b90d1SMarc Zyngier 3591958b90d1SMarc Zyngier target_col = &vpe_proxy.dev->its->collections[to]; 3592958b90d1SMarc Zyngier its_send_movi(vpe_proxy.dev, target_col, vpe->vpe_proxy_event); 3593958b90d1SMarc Zyngier vpe_proxy.dev->event_map.col_map[vpe->vpe_proxy_event] = to; 3594958b90d1SMarc Zyngier 3595958b90d1SMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 3596958b90d1SMarc Zyngier } 3597958b90d1SMarc Zyngier 35983171a47aSMarc Zyngier static int its_vpe_set_affinity(struct irq_data *d, 35993171a47aSMarc Zyngier const struct cpumask *mask_val, 36003171a47aSMarc Zyngier bool force) 36013171a47aSMarc Zyngier { 36023171a47aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3603dd3f050aSMarc Zyngier int from, cpu = cpumask_first(mask_val); 3604f3a05921SMarc Zyngier unsigned long flags; 36053171a47aSMarc Zyngier 36063171a47aSMarc Zyngier /* 36073171a47aSMarc Zyngier * Changing affinity is mega expensive, so let's be as lazy as 360820b3d54eSMarc Zyngier * we can and only do it if we really have to. Also, if mapped 3609958b90d1SMarc Zyngier * into the proxy device, we need to move the doorbell 3610958b90d1SMarc Zyngier * interrupt to its new location. 3611f3a05921SMarc Zyngier * 3612f3a05921SMarc Zyngier * Another thing is that changing the affinity of a vPE affects 3613f3a05921SMarc Zyngier * *other interrupts* such as all the vLPIs that are routed to 3614f3a05921SMarc Zyngier * this vPE. This means that the irq_desc lock is not enough to 3615f3a05921SMarc Zyngier * protect us, and that we must ensure nobody samples vpe->col_idx 3616f3a05921SMarc Zyngier * during the update, hence the lock below which must also be 3617f3a05921SMarc Zyngier * taken on any vLPI handling path that evaluates vpe->col_idx. 36183171a47aSMarc Zyngier */ 3619f3a05921SMarc Zyngier from = vpe_to_cpuid_lock(vpe, &flags); 3620f3a05921SMarc Zyngier if (from == cpu) 3621dd3f050aSMarc Zyngier goto out; 3622958b90d1SMarc Zyngier 36233171a47aSMarc Zyngier vpe->col_idx = cpu; 3624dd3f050aSMarc Zyngier 3625dd3f050aSMarc Zyngier /* 3626dd3f050aSMarc Zyngier * GICv4.1 allows us to skip VMOVP if moving to a cpu whose RD 3627dd3f050aSMarc Zyngier * is sharing its VPE table with the current one. 3628dd3f050aSMarc Zyngier */ 3629dd3f050aSMarc Zyngier if (gic_data_rdist_cpu(cpu)->vpe_table_mask && 3630dd3f050aSMarc Zyngier cpumask_test_cpu(from, gic_data_rdist_cpu(cpu)->vpe_table_mask)) 3631dd3f050aSMarc Zyngier goto out; 3632dd3f050aSMarc Zyngier 36333171a47aSMarc Zyngier its_send_vmovp(vpe); 3634958b90d1SMarc Zyngier its_vpe_db_proxy_move(vpe, from, cpu); 36353171a47aSMarc Zyngier 3636dd3f050aSMarc Zyngier out: 363744c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(cpu)); 3638f3a05921SMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 363944c4c25eSMarc Zyngier 36403171a47aSMarc Zyngier return IRQ_SET_MASK_OK_DONE; 36413171a47aSMarc Zyngier } 36423171a47aSMarc Zyngier 3643e643d803SMarc Zyngier static void its_vpe_schedule(struct its_vpe *vpe) 3644e643d803SMarc Zyngier { 364550c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3646e643d803SMarc Zyngier u64 val; 3647e643d803SMarc Zyngier 3648e643d803SMarc Zyngier /* Schedule the VPE */ 3649e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->its_vm->vprop_page)) & 3650e643d803SMarc Zyngier GENMASK_ULL(51, 12); 3651e643d803SMarc Zyngier val |= (LPI_NRBITS - 1) & GICR_VPROPBASER_IDBITS_MASK; 3652e643d803SMarc Zyngier val |= GICR_VPROPBASER_RaWb; 3653e643d803SMarc Zyngier val |= GICR_VPROPBASER_InnerShareable; 36545186a6ccSZenghui Yu gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); 3655e643d803SMarc Zyngier 3656e643d803SMarc Zyngier val = virt_to_phys(page_address(vpe->vpt_page)) & 3657e643d803SMarc Zyngier GENMASK_ULL(51, 16); 3658e643d803SMarc Zyngier val |= GICR_VPENDBASER_RaWaWb; 3659e643d803SMarc Zyngier val |= GICR_VPENDBASER_NonShareable; 3660e643d803SMarc Zyngier /* 3661e643d803SMarc Zyngier * There is no good way of finding out if the pending table is 3662e643d803SMarc Zyngier * empty as we can race against the doorbell interrupt very 3663e643d803SMarc Zyngier * easily. So in the end, vpe->pending_last is only an 3664e643d803SMarc Zyngier * indication that the vcpu has something pending, not one 3665e643d803SMarc Zyngier * that the pending table is empty. A good implementation 3666e643d803SMarc Zyngier * would be able to read its coarse map pretty quickly anyway, 3667e643d803SMarc Zyngier * making this a tolerable issue. 3668e643d803SMarc Zyngier */ 3669e643d803SMarc Zyngier val |= GICR_VPENDBASER_PendingLast; 3670e643d803SMarc Zyngier val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0; 3671e643d803SMarc Zyngier val |= GICR_VPENDBASER_Valid; 36725186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 3673e643d803SMarc Zyngier } 3674e643d803SMarc Zyngier 3675e643d803SMarc Zyngier static void its_vpe_deschedule(struct its_vpe *vpe) 3676e643d803SMarc Zyngier { 367750c33097SRobin Murphy void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3678e643d803SMarc Zyngier u64 val; 3679e643d803SMarc Zyngier 3680e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 0, 0); 3681e643d803SMarc Zyngier 3682e643d803SMarc Zyngier vpe->idai = !!(val & GICR_VPENDBASER_IDAI); 3683e643d803SMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 3684e643d803SMarc Zyngier } 3685e643d803SMarc Zyngier 368640619a2eSMarc Zyngier static void its_vpe_invall(struct its_vpe *vpe) 368740619a2eSMarc Zyngier { 368840619a2eSMarc Zyngier struct its_node *its; 368940619a2eSMarc Zyngier 369040619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 36910dd57fedSMarc Zyngier if (!is_v4(its)) 369240619a2eSMarc Zyngier continue; 369340619a2eSMarc Zyngier 36942247e1bfSMarc Zyngier if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) 36952247e1bfSMarc Zyngier continue; 36962247e1bfSMarc Zyngier 36973c1cceebSMarc Zyngier /* 36983c1cceebSMarc Zyngier * Sending a VINVALL to a single ITS is enough, as all 36993c1cceebSMarc Zyngier * we need is to reach the redistributors. 37003c1cceebSMarc Zyngier */ 370140619a2eSMarc Zyngier its_send_vinvall(its, vpe); 37023c1cceebSMarc Zyngier return; 370340619a2eSMarc Zyngier } 370440619a2eSMarc Zyngier } 370540619a2eSMarc Zyngier 3706e643d803SMarc Zyngier static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 3707e643d803SMarc Zyngier { 3708e643d803SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3709e643d803SMarc Zyngier struct its_cmd_info *info = vcpu_info; 3710e643d803SMarc Zyngier 3711e643d803SMarc Zyngier switch (info->cmd_type) { 3712e643d803SMarc Zyngier case SCHEDULE_VPE: 3713e643d803SMarc Zyngier its_vpe_schedule(vpe); 3714e643d803SMarc Zyngier return 0; 3715e643d803SMarc Zyngier 3716e643d803SMarc Zyngier case DESCHEDULE_VPE: 3717e643d803SMarc Zyngier its_vpe_deschedule(vpe); 3718e643d803SMarc Zyngier return 0; 3719e643d803SMarc Zyngier 37205e2f7642SMarc Zyngier case INVALL_VPE: 372140619a2eSMarc Zyngier its_vpe_invall(vpe); 37225e2f7642SMarc Zyngier return 0; 37235e2f7642SMarc Zyngier 3724e643d803SMarc Zyngier default: 3725e643d803SMarc Zyngier return -EINVAL; 3726e643d803SMarc Zyngier } 3727e643d803SMarc Zyngier } 3728e643d803SMarc Zyngier 372920b3d54eSMarc Zyngier static void its_vpe_send_cmd(struct its_vpe *vpe, 373020b3d54eSMarc Zyngier void (*cmd)(struct its_device *, u32)) 373120b3d54eSMarc Zyngier { 373220b3d54eSMarc Zyngier unsigned long flags; 373320b3d54eSMarc Zyngier 373420b3d54eSMarc Zyngier raw_spin_lock_irqsave(&vpe_proxy.lock, flags); 373520b3d54eSMarc Zyngier 373620b3d54eSMarc Zyngier its_vpe_db_proxy_map_locked(vpe); 373720b3d54eSMarc Zyngier cmd(vpe_proxy.dev, vpe->vpe_proxy_event); 373820b3d54eSMarc Zyngier 373920b3d54eSMarc Zyngier raw_spin_unlock_irqrestore(&vpe_proxy.lock, flags); 374020b3d54eSMarc Zyngier } 374120b3d54eSMarc Zyngier 3742f6a91da7SMarc Zyngier static void its_vpe_send_inv(struct irq_data *d) 3743f6a91da7SMarc Zyngier { 3744f6a91da7SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 374520b3d54eSMarc Zyngier 374620b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 3747f6a91da7SMarc Zyngier void __iomem *rdbase; 3748f6a91da7SMarc Zyngier 3749425c09beSMarc Zyngier /* Target the redistributor this VPE is currently known on */ 37509058a4e9SMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 3751f6a91da7SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3752425c09beSMarc Zyngier gic_write_lpir(d->parent_data->hwirq, rdbase + GICR_INVLPIR); 37532f4f064bSMarc Zyngier wait_for_syncr(rdbase); 37549058a4e9SMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 375520b3d54eSMarc Zyngier } else { 375620b3d54eSMarc Zyngier its_vpe_send_cmd(vpe, its_send_inv); 375720b3d54eSMarc Zyngier } 3758f6a91da7SMarc Zyngier } 3759f6a91da7SMarc Zyngier 3760f6a91da7SMarc Zyngier static void its_vpe_mask_irq(struct irq_data *d) 3761f6a91da7SMarc Zyngier { 3762f6a91da7SMarc Zyngier /* 3763f6a91da7SMarc Zyngier * We need to unmask the LPI, which is described by the parent 3764f6a91da7SMarc Zyngier * irq_data. Instead of calling into the parent (which won't 3765f6a91da7SMarc Zyngier * exactly do the right thing, let's simply use the 3766f6a91da7SMarc Zyngier * parent_data pointer. Yes, I'm naughty. 3767f6a91da7SMarc Zyngier */ 3768f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 3769f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3770f6a91da7SMarc Zyngier } 3771f6a91da7SMarc Zyngier 3772f6a91da7SMarc Zyngier static void its_vpe_unmask_irq(struct irq_data *d) 3773f6a91da7SMarc Zyngier { 3774f6a91da7SMarc Zyngier /* Same hack as above... */ 3775f6a91da7SMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 3776f6a91da7SMarc Zyngier its_vpe_send_inv(d); 3777f6a91da7SMarc Zyngier } 3778f6a91da7SMarc Zyngier 3779e57a3e28SMarc Zyngier static int its_vpe_set_irqchip_state(struct irq_data *d, 3780e57a3e28SMarc Zyngier enum irqchip_irq_state which, 3781e57a3e28SMarc Zyngier bool state) 3782e57a3e28SMarc Zyngier { 3783e57a3e28SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3784e57a3e28SMarc Zyngier 3785e57a3e28SMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 3786e57a3e28SMarc Zyngier return -EINVAL; 3787e57a3e28SMarc Zyngier 3788e57a3e28SMarc Zyngier if (gic_rdists->has_direct_lpi) { 3789e57a3e28SMarc Zyngier void __iomem *rdbase; 3790e57a3e28SMarc Zyngier 3791e57a3e28SMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3792e57a3e28SMarc Zyngier if (state) { 3793e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); 3794e57a3e28SMarc Zyngier } else { 3795e57a3e28SMarc Zyngier gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); 37962f4f064bSMarc Zyngier wait_for_syncr(rdbase); 3797e57a3e28SMarc Zyngier } 3798e57a3e28SMarc Zyngier } else { 3799e57a3e28SMarc Zyngier if (state) 3800e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_int); 3801e57a3e28SMarc Zyngier else 3802e57a3e28SMarc Zyngier its_vpe_send_cmd(vpe, its_send_clear); 3803e57a3e28SMarc Zyngier } 3804e57a3e28SMarc Zyngier 3805e57a3e28SMarc Zyngier return 0; 3806e57a3e28SMarc Zyngier } 3807e57a3e28SMarc Zyngier 38088fff27aeSMarc Zyngier static struct irq_chip its_vpe_irq_chip = { 38098fff27aeSMarc Zyngier .name = "GICv4-vpe", 3810f6a91da7SMarc Zyngier .irq_mask = its_vpe_mask_irq, 3811f6a91da7SMarc Zyngier .irq_unmask = its_vpe_unmask_irq, 3812f6a91da7SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 38133171a47aSMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 3814e57a3e28SMarc Zyngier .irq_set_irqchip_state = its_vpe_set_irqchip_state, 3815e643d803SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_set_vcpu_affinity, 38168fff27aeSMarc Zyngier }; 38178fff27aeSMarc Zyngier 3818d97c97baSMarc Zyngier static struct its_node *find_4_1_its(void) 3819d97c97baSMarc Zyngier { 3820d97c97baSMarc Zyngier static struct its_node *its = NULL; 3821d97c97baSMarc Zyngier 3822d97c97baSMarc Zyngier if (!its) { 3823d97c97baSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 3824d97c97baSMarc Zyngier if (is_v4_1(its)) 3825d97c97baSMarc Zyngier return its; 3826d97c97baSMarc Zyngier } 3827d97c97baSMarc Zyngier 3828d97c97baSMarc Zyngier /* Oops? */ 3829d97c97baSMarc Zyngier its = NULL; 3830d97c97baSMarc Zyngier } 3831d97c97baSMarc Zyngier 3832d97c97baSMarc Zyngier return its; 3833d97c97baSMarc Zyngier } 3834d97c97baSMarc Zyngier 3835d97c97baSMarc Zyngier static void its_vpe_4_1_send_inv(struct irq_data *d) 3836d97c97baSMarc Zyngier { 3837d97c97baSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3838d97c97baSMarc Zyngier struct its_node *its; 3839d97c97baSMarc Zyngier 3840d97c97baSMarc Zyngier /* 3841d97c97baSMarc Zyngier * GICv4.1 wants doorbells to be invalidated using the 3842d97c97baSMarc Zyngier * INVDB command in order to be broadcast to all RDs. Send 3843d97c97baSMarc Zyngier * it to the first valid ITS, and let the HW do its magic. 3844d97c97baSMarc Zyngier */ 3845d97c97baSMarc Zyngier its = find_4_1_its(); 3846d97c97baSMarc Zyngier if (its) 3847d97c97baSMarc Zyngier its_send_invdb(its, vpe); 3848d97c97baSMarc Zyngier } 3849d97c97baSMarc Zyngier 3850d97c97baSMarc Zyngier static void its_vpe_4_1_mask_irq(struct irq_data *d) 3851d97c97baSMarc Zyngier { 3852d97c97baSMarc Zyngier lpi_write_config(d->parent_data, LPI_PROP_ENABLED, 0); 3853d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 3854d97c97baSMarc Zyngier } 3855d97c97baSMarc Zyngier 3856d97c97baSMarc Zyngier static void its_vpe_4_1_unmask_irq(struct irq_data *d) 3857d97c97baSMarc Zyngier { 3858d97c97baSMarc Zyngier lpi_write_config(d->parent_data, 0, LPI_PROP_ENABLED); 3859d97c97baSMarc Zyngier its_vpe_4_1_send_inv(d); 3860d97c97baSMarc Zyngier } 3861d97c97baSMarc Zyngier 386291bf6395SMarc Zyngier static void its_vpe_4_1_schedule(struct its_vpe *vpe, 386391bf6395SMarc Zyngier struct its_cmd_info *info) 386491bf6395SMarc Zyngier { 386591bf6395SMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 386691bf6395SMarc Zyngier u64 val = 0; 386791bf6395SMarc Zyngier 386891bf6395SMarc Zyngier /* Schedule the VPE */ 386991bf6395SMarc Zyngier val |= GICR_VPENDBASER_Valid; 387091bf6395SMarc Zyngier val |= info->g0en ? GICR_VPENDBASER_4_1_VGRP0EN : 0; 387191bf6395SMarc Zyngier val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0; 387291bf6395SMarc Zyngier val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id); 387391bf6395SMarc Zyngier 38745186a6ccSZenghui Yu gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER); 387591bf6395SMarc Zyngier } 387691bf6395SMarc Zyngier 3877e64fab1aSMarc Zyngier static void its_vpe_4_1_deschedule(struct its_vpe *vpe, 3878e64fab1aSMarc Zyngier struct its_cmd_info *info) 3879e64fab1aSMarc Zyngier { 3880e64fab1aSMarc Zyngier void __iomem *vlpi_base = gic_data_rdist_vlpi_base(); 3881e64fab1aSMarc Zyngier u64 val; 3882e64fab1aSMarc Zyngier 3883e64fab1aSMarc Zyngier if (info->req_db) { 3884e64fab1aSMarc Zyngier /* 3885e64fab1aSMarc Zyngier * vPE is going to block: make the vPE non-resident with 3886e64fab1aSMarc Zyngier * PendingLast clear and DB set. The GIC guarantees that if 3887e64fab1aSMarc Zyngier * we read-back PendingLast clear, then a doorbell will be 3888e64fab1aSMarc Zyngier * delivered when an interrupt comes. 3889e64fab1aSMarc Zyngier */ 3890e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 3891e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast, 3892e64fab1aSMarc Zyngier GICR_VPENDBASER_4_1_DB); 3893e64fab1aSMarc Zyngier vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); 3894e64fab1aSMarc Zyngier } else { 3895e64fab1aSMarc Zyngier /* 3896e64fab1aSMarc Zyngier * We're not blocking, so just make the vPE non-resident 3897e64fab1aSMarc Zyngier * with PendingLast set, indicating that we'll be back. 3898e64fab1aSMarc Zyngier */ 3899e64fab1aSMarc Zyngier val = its_clear_vpend_valid(vlpi_base, 3900e64fab1aSMarc Zyngier 0, 3901e64fab1aSMarc Zyngier GICR_VPENDBASER_PendingLast); 3902e64fab1aSMarc Zyngier vpe->pending_last = true; 3903e64fab1aSMarc Zyngier } 3904e64fab1aSMarc Zyngier } 3905e64fab1aSMarc Zyngier 3906b4a4bd0fSMarc Zyngier static void its_vpe_4_1_invall(struct its_vpe *vpe) 3907b4a4bd0fSMarc Zyngier { 3908b4a4bd0fSMarc Zyngier void __iomem *rdbase; 3909b4a4bd0fSMarc Zyngier u64 val; 3910b4a4bd0fSMarc Zyngier 3911b4a4bd0fSMarc Zyngier val = GICR_INVALLR_V; 3912b4a4bd0fSMarc Zyngier val |= FIELD_PREP(GICR_INVALLR_VPEID, vpe->vpe_id); 3913b4a4bd0fSMarc Zyngier 3914b4a4bd0fSMarc Zyngier /* Target the redistributor this vPE is currently known on */ 39159058a4e9SMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 3916b4a4bd0fSMarc Zyngier rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; 3917b4a4bd0fSMarc Zyngier gic_write_lpir(val, rdbase + GICR_INVALLR); 3918b978c25fSZenghui Yu 3919b978c25fSZenghui Yu wait_for_syncr(rdbase); 39209058a4e9SMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock); 3921b4a4bd0fSMarc Zyngier } 3922b4a4bd0fSMarc Zyngier 392329c647f3SMarc Zyngier static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 392429c647f3SMarc Zyngier { 392591bf6395SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 392629c647f3SMarc Zyngier struct its_cmd_info *info = vcpu_info; 392729c647f3SMarc Zyngier 392829c647f3SMarc Zyngier switch (info->cmd_type) { 392929c647f3SMarc Zyngier case SCHEDULE_VPE: 393091bf6395SMarc Zyngier its_vpe_4_1_schedule(vpe, info); 393129c647f3SMarc Zyngier return 0; 393229c647f3SMarc Zyngier 393329c647f3SMarc Zyngier case DESCHEDULE_VPE: 3934e64fab1aSMarc Zyngier its_vpe_4_1_deschedule(vpe, info); 393529c647f3SMarc Zyngier return 0; 393629c647f3SMarc Zyngier 393729c647f3SMarc Zyngier case INVALL_VPE: 3938b4a4bd0fSMarc Zyngier its_vpe_4_1_invall(vpe); 393929c647f3SMarc Zyngier return 0; 394029c647f3SMarc Zyngier 394129c647f3SMarc Zyngier default: 394229c647f3SMarc Zyngier return -EINVAL; 394329c647f3SMarc Zyngier } 394429c647f3SMarc Zyngier } 394529c647f3SMarc Zyngier 394629c647f3SMarc Zyngier static struct irq_chip its_vpe_4_1_irq_chip = { 394729c647f3SMarc Zyngier .name = "GICv4.1-vpe", 3948d97c97baSMarc Zyngier .irq_mask = its_vpe_4_1_mask_irq, 3949d97c97baSMarc Zyngier .irq_unmask = its_vpe_4_1_unmask_irq, 395029c647f3SMarc Zyngier .irq_eoi = irq_chip_eoi_parent, 395129c647f3SMarc Zyngier .irq_set_affinity = its_vpe_set_affinity, 395229c647f3SMarc Zyngier .irq_set_vcpu_affinity = its_vpe_4_1_set_vcpu_affinity, 395329c647f3SMarc Zyngier }; 395429c647f3SMarc Zyngier 3955e252cf8aSMarc Zyngier static void its_configure_sgi(struct irq_data *d, bool clear) 3956e252cf8aSMarc Zyngier { 3957e252cf8aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3958e252cf8aSMarc Zyngier struct its_cmd_desc desc; 3959e252cf8aSMarc Zyngier 3960e252cf8aSMarc Zyngier desc.its_vsgi_cmd.vpe = vpe; 3961e252cf8aSMarc Zyngier desc.its_vsgi_cmd.sgi = d->hwirq; 3962e252cf8aSMarc Zyngier desc.its_vsgi_cmd.priority = vpe->sgi_config[d->hwirq].priority; 3963e252cf8aSMarc Zyngier desc.its_vsgi_cmd.enable = vpe->sgi_config[d->hwirq].enabled; 3964e252cf8aSMarc Zyngier desc.its_vsgi_cmd.group = vpe->sgi_config[d->hwirq].group; 3965e252cf8aSMarc Zyngier desc.its_vsgi_cmd.clear = clear; 3966e252cf8aSMarc Zyngier 3967e252cf8aSMarc Zyngier /* 3968e252cf8aSMarc Zyngier * GICv4.1 allows us to send VSGI commands to any ITS as long as the 3969e252cf8aSMarc Zyngier * destination VPE is mapped there. Since we map them eagerly at 3970e252cf8aSMarc Zyngier * activation time, we're pretty sure the first GICv4.1 ITS will do. 3971e252cf8aSMarc Zyngier */ 3972e252cf8aSMarc Zyngier its_send_single_vcommand(find_4_1_its(), its_build_vsgi_cmd, &desc); 3973e252cf8aSMarc Zyngier } 3974e252cf8aSMarc Zyngier 3975b4e8d644SMarc Zyngier static void its_sgi_mask_irq(struct irq_data *d) 3976b4e8d644SMarc Zyngier { 3977b4e8d644SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3978b4e8d644SMarc Zyngier 3979b4e8d644SMarc Zyngier vpe->sgi_config[d->hwirq].enabled = false; 3980b4e8d644SMarc Zyngier its_configure_sgi(d, false); 3981b4e8d644SMarc Zyngier } 3982b4e8d644SMarc Zyngier 3983b4e8d644SMarc Zyngier static void its_sgi_unmask_irq(struct irq_data *d) 3984b4e8d644SMarc Zyngier { 3985b4e8d644SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 3986b4e8d644SMarc Zyngier 3987b4e8d644SMarc Zyngier vpe->sgi_config[d->hwirq].enabled = true; 3988b4e8d644SMarc Zyngier its_configure_sgi(d, false); 3989b4e8d644SMarc Zyngier } 3990b4e8d644SMarc Zyngier 3991166cba71SMarc Zyngier static int its_sgi_set_affinity(struct irq_data *d, 3992166cba71SMarc Zyngier const struct cpumask *mask_val, 3993166cba71SMarc Zyngier bool force) 3994166cba71SMarc Zyngier { 3995166cba71SMarc Zyngier /* 3996166cba71SMarc Zyngier * There is no notion of affinity for virtual SGIs, at least 3997166cba71SMarc Zyngier * not on the host (since they can only be targetting a vPE). 3998166cba71SMarc Zyngier * Tell the kernel we've done whatever it asked for. 3999166cba71SMarc Zyngier */ 4000166cba71SMarc Zyngier return IRQ_SET_MASK_OK; 4001166cba71SMarc Zyngier } 4002166cba71SMarc Zyngier 40037017ff0eSMarc Zyngier static int its_sgi_set_irqchip_state(struct irq_data *d, 40047017ff0eSMarc Zyngier enum irqchip_irq_state which, 40057017ff0eSMarc Zyngier bool state) 40067017ff0eSMarc Zyngier { 40077017ff0eSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 40087017ff0eSMarc Zyngier return -EINVAL; 40097017ff0eSMarc Zyngier 40107017ff0eSMarc Zyngier if (state) { 40117017ff0eSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 40127017ff0eSMarc Zyngier struct its_node *its = find_4_1_its(); 40137017ff0eSMarc Zyngier u64 val; 40147017ff0eSMarc Zyngier 40157017ff0eSMarc Zyngier val = FIELD_PREP(GITS_SGIR_VPEID, vpe->vpe_id); 40167017ff0eSMarc Zyngier val |= FIELD_PREP(GITS_SGIR_VINTID, d->hwirq); 40177017ff0eSMarc Zyngier writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); 40187017ff0eSMarc Zyngier } else { 40197017ff0eSMarc Zyngier its_configure_sgi(d, true); 40207017ff0eSMarc Zyngier } 40217017ff0eSMarc Zyngier 40227017ff0eSMarc Zyngier return 0; 40237017ff0eSMarc Zyngier } 40247017ff0eSMarc Zyngier 40257017ff0eSMarc Zyngier static int its_sgi_get_irqchip_state(struct irq_data *d, 40267017ff0eSMarc Zyngier enum irqchip_irq_state which, bool *val) 40277017ff0eSMarc Zyngier { 40287017ff0eSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 40297017ff0eSMarc Zyngier void __iomem *base; 40307017ff0eSMarc Zyngier unsigned long flags; 40317017ff0eSMarc Zyngier u32 count = 1000000; /* 1s! */ 40327017ff0eSMarc Zyngier u32 status; 40337017ff0eSMarc Zyngier int cpu; 40347017ff0eSMarc Zyngier 40357017ff0eSMarc Zyngier if (which != IRQCHIP_STATE_PENDING) 40367017ff0eSMarc Zyngier return -EINVAL; 40377017ff0eSMarc Zyngier 40387017ff0eSMarc Zyngier /* 40397017ff0eSMarc Zyngier * Locking galore! We can race against two different events: 40407017ff0eSMarc Zyngier * 40417017ff0eSMarc Zyngier * - Concurent vPE affinity change: we must make sure it cannot 40427017ff0eSMarc Zyngier * happen, or we'll talk to the wrong redistributor. This is 40437017ff0eSMarc Zyngier * identical to what happens with vLPIs. 40447017ff0eSMarc Zyngier * 40457017ff0eSMarc Zyngier * - Concurrent VSGIPENDR access: As it involves accessing two 40467017ff0eSMarc Zyngier * MMIO registers, this must be made atomic one way or another. 40477017ff0eSMarc Zyngier */ 40487017ff0eSMarc Zyngier cpu = vpe_to_cpuid_lock(vpe, &flags); 40497017ff0eSMarc Zyngier raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock); 40507017ff0eSMarc Zyngier base = gic_data_rdist_cpu(cpu)->rd_base + SZ_128K; 40517017ff0eSMarc Zyngier writel_relaxed(vpe->vpe_id, base + GICR_VSGIR); 40527017ff0eSMarc Zyngier do { 40537017ff0eSMarc Zyngier status = readl_relaxed(base + GICR_VSGIPENDR); 40547017ff0eSMarc Zyngier if (!(status & GICR_VSGIPENDR_BUSY)) 40557017ff0eSMarc Zyngier goto out; 40567017ff0eSMarc Zyngier 40577017ff0eSMarc Zyngier count--; 40587017ff0eSMarc Zyngier if (!count) { 40597017ff0eSMarc Zyngier pr_err_ratelimited("Unable to get SGI status\n"); 40607017ff0eSMarc Zyngier goto out; 40617017ff0eSMarc Zyngier } 40627017ff0eSMarc Zyngier cpu_relax(); 40637017ff0eSMarc Zyngier udelay(1); 40647017ff0eSMarc Zyngier } while (count); 40657017ff0eSMarc Zyngier 40667017ff0eSMarc Zyngier out: 40677017ff0eSMarc Zyngier raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock); 40687017ff0eSMarc Zyngier vpe_to_cpuid_unlock(vpe, flags); 40697017ff0eSMarc Zyngier 40707017ff0eSMarc Zyngier if (!count) 40717017ff0eSMarc Zyngier return -ENXIO; 40727017ff0eSMarc Zyngier 40737017ff0eSMarc Zyngier *val = !!(status & (1 << d->hwirq)); 40747017ff0eSMarc Zyngier 40757017ff0eSMarc Zyngier return 0; 40767017ff0eSMarc Zyngier } 40777017ff0eSMarc Zyngier 407805d32df1SMarc Zyngier static int its_sgi_set_vcpu_affinity(struct irq_data *d, void *vcpu_info) 407905d32df1SMarc Zyngier { 408005d32df1SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 408105d32df1SMarc Zyngier struct its_cmd_info *info = vcpu_info; 408205d32df1SMarc Zyngier 408305d32df1SMarc Zyngier switch (info->cmd_type) { 408405d32df1SMarc Zyngier case PROP_UPDATE_VSGI: 408505d32df1SMarc Zyngier vpe->sgi_config[d->hwirq].priority = info->priority; 408605d32df1SMarc Zyngier vpe->sgi_config[d->hwirq].group = info->group; 408705d32df1SMarc Zyngier its_configure_sgi(d, false); 408805d32df1SMarc Zyngier return 0; 408905d32df1SMarc Zyngier 409005d32df1SMarc Zyngier default: 409105d32df1SMarc Zyngier return -EINVAL; 409205d32df1SMarc Zyngier } 409305d32df1SMarc Zyngier } 409405d32df1SMarc Zyngier 4095166cba71SMarc Zyngier static struct irq_chip its_sgi_irq_chip = { 4096166cba71SMarc Zyngier .name = "GICv4.1-sgi", 4097b4e8d644SMarc Zyngier .irq_mask = its_sgi_mask_irq, 4098b4e8d644SMarc Zyngier .irq_unmask = its_sgi_unmask_irq, 4099166cba71SMarc Zyngier .irq_set_affinity = its_sgi_set_affinity, 41007017ff0eSMarc Zyngier .irq_set_irqchip_state = its_sgi_set_irqchip_state, 41017017ff0eSMarc Zyngier .irq_get_irqchip_state = its_sgi_get_irqchip_state, 410205d32df1SMarc Zyngier .irq_set_vcpu_affinity = its_sgi_set_vcpu_affinity, 4103166cba71SMarc Zyngier }; 4104166cba71SMarc Zyngier 4105166cba71SMarc Zyngier static int its_sgi_irq_domain_alloc(struct irq_domain *domain, 4106166cba71SMarc Zyngier unsigned int virq, unsigned int nr_irqs, 4107166cba71SMarc Zyngier void *args) 4108166cba71SMarc Zyngier { 4109166cba71SMarc Zyngier struct its_vpe *vpe = args; 4110166cba71SMarc Zyngier int i; 4111166cba71SMarc Zyngier 4112166cba71SMarc Zyngier /* Yes, we do want 16 SGIs */ 4113166cba71SMarc Zyngier WARN_ON(nr_irqs != 16); 4114166cba71SMarc Zyngier 4115166cba71SMarc Zyngier for (i = 0; i < 16; i++) { 4116166cba71SMarc Zyngier vpe->sgi_config[i].priority = 0; 4117166cba71SMarc Zyngier vpe->sgi_config[i].enabled = false; 4118166cba71SMarc Zyngier vpe->sgi_config[i].group = false; 4119166cba71SMarc Zyngier 4120166cba71SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 4121166cba71SMarc Zyngier &its_sgi_irq_chip, vpe); 4122166cba71SMarc Zyngier irq_set_status_flags(virq + i, IRQ_DISABLE_UNLAZY); 4123166cba71SMarc Zyngier } 4124166cba71SMarc Zyngier 4125166cba71SMarc Zyngier return 0; 4126166cba71SMarc Zyngier } 4127166cba71SMarc Zyngier 4128166cba71SMarc Zyngier static void its_sgi_irq_domain_free(struct irq_domain *domain, 4129166cba71SMarc Zyngier unsigned int virq, 4130166cba71SMarc Zyngier unsigned int nr_irqs) 4131166cba71SMarc Zyngier { 4132166cba71SMarc Zyngier /* Nothing to do */ 4133166cba71SMarc Zyngier } 4134166cba71SMarc Zyngier 4135166cba71SMarc Zyngier static int its_sgi_irq_domain_activate(struct irq_domain *domain, 4136166cba71SMarc Zyngier struct irq_data *d, bool reserve) 4137166cba71SMarc Zyngier { 4138e252cf8aSMarc Zyngier /* Write out the initial SGI configuration */ 4139e252cf8aSMarc Zyngier its_configure_sgi(d, false); 4140166cba71SMarc Zyngier return 0; 4141166cba71SMarc Zyngier } 4142166cba71SMarc Zyngier 4143166cba71SMarc Zyngier static void its_sgi_irq_domain_deactivate(struct irq_domain *domain, 4144166cba71SMarc Zyngier struct irq_data *d) 4145166cba71SMarc Zyngier { 4146e252cf8aSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 4147e252cf8aSMarc Zyngier 4148e252cf8aSMarc Zyngier /* 4149e252cf8aSMarc Zyngier * The VSGI command is awkward: 4150e252cf8aSMarc Zyngier * 4151e252cf8aSMarc Zyngier * - To change the configuration, CLEAR must be set to false, 4152e252cf8aSMarc Zyngier * leaving the pending bit unchanged. 4153e252cf8aSMarc Zyngier * - To clear the pending bit, CLEAR must be set to true, leaving 4154e252cf8aSMarc Zyngier * the configuration unchanged. 4155e252cf8aSMarc Zyngier * 4156e252cf8aSMarc Zyngier * You just can't do both at once, hence the two commands below. 4157e252cf8aSMarc Zyngier */ 4158e252cf8aSMarc Zyngier vpe->sgi_config[d->hwirq].enabled = false; 4159e252cf8aSMarc Zyngier its_configure_sgi(d, false); 4160e252cf8aSMarc Zyngier its_configure_sgi(d, true); 4161166cba71SMarc Zyngier } 4162166cba71SMarc Zyngier 4163166cba71SMarc Zyngier static const struct irq_domain_ops its_sgi_domain_ops = { 4164166cba71SMarc Zyngier .alloc = its_sgi_irq_domain_alloc, 4165166cba71SMarc Zyngier .free = its_sgi_irq_domain_free, 4166166cba71SMarc Zyngier .activate = its_sgi_irq_domain_activate, 4167166cba71SMarc Zyngier .deactivate = its_sgi_irq_domain_deactivate, 4168166cba71SMarc Zyngier }; 4169166cba71SMarc Zyngier 41707d75bbb4SMarc Zyngier static int its_vpe_id_alloc(void) 41717d75bbb4SMarc Zyngier { 417232bd44dcSShanker Donthineni return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); 41737d75bbb4SMarc Zyngier } 41747d75bbb4SMarc Zyngier 41757d75bbb4SMarc Zyngier static void its_vpe_id_free(u16 id) 41767d75bbb4SMarc Zyngier { 41777d75bbb4SMarc Zyngier ida_simple_remove(&its_vpeid_ida, id); 41787d75bbb4SMarc Zyngier } 41797d75bbb4SMarc Zyngier 41807d75bbb4SMarc Zyngier static int its_vpe_init(struct its_vpe *vpe) 41817d75bbb4SMarc Zyngier { 41827d75bbb4SMarc Zyngier struct page *vpt_page; 41837d75bbb4SMarc Zyngier int vpe_id; 41847d75bbb4SMarc Zyngier 41857d75bbb4SMarc Zyngier /* Allocate vpe_id */ 41867d75bbb4SMarc Zyngier vpe_id = its_vpe_id_alloc(); 41877d75bbb4SMarc Zyngier if (vpe_id < 0) 41887d75bbb4SMarc Zyngier return vpe_id; 41897d75bbb4SMarc Zyngier 41907d75bbb4SMarc Zyngier /* Allocate VPT */ 41917d75bbb4SMarc Zyngier vpt_page = its_allocate_pending_table(GFP_KERNEL); 41927d75bbb4SMarc Zyngier if (!vpt_page) { 41937d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 41947d75bbb4SMarc Zyngier return -ENOMEM; 41957d75bbb4SMarc Zyngier } 41967d75bbb4SMarc Zyngier 41977d75bbb4SMarc Zyngier if (!its_alloc_vpe_table(vpe_id)) { 41987d75bbb4SMarc Zyngier its_vpe_id_free(vpe_id); 419934f8eb92SNianyao Tang its_free_pending_table(vpt_page); 42007d75bbb4SMarc Zyngier return -ENOMEM; 42017d75bbb4SMarc Zyngier } 42027d75bbb4SMarc Zyngier 4203f3a05921SMarc Zyngier raw_spin_lock_init(&vpe->vpe_lock); 42047d75bbb4SMarc Zyngier vpe->vpe_id = vpe_id; 42057d75bbb4SMarc Zyngier vpe->vpt_page = vpt_page; 420664edfaa9SMarc Zyngier if (gic_rdists->has_rvpeid) 420764edfaa9SMarc Zyngier atomic_set(&vpe->vmapp_count, 0); 420864edfaa9SMarc Zyngier else 420920b3d54eSMarc Zyngier vpe->vpe_proxy_event = -1; 42107d75bbb4SMarc Zyngier 42117d75bbb4SMarc Zyngier return 0; 42127d75bbb4SMarc Zyngier } 42137d75bbb4SMarc Zyngier 42147d75bbb4SMarc Zyngier static void its_vpe_teardown(struct its_vpe *vpe) 42157d75bbb4SMarc Zyngier { 421620b3d54eSMarc Zyngier its_vpe_db_proxy_unmap(vpe); 42177d75bbb4SMarc Zyngier its_vpe_id_free(vpe->vpe_id); 42187d75bbb4SMarc Zyngier its_free_pending_table(vpe->vpt_page); 42197d75bbb4SMarc Zyngier } 42207d75bbb4SMarc Zyngier 42217d75bbb4SMarc Zyngier static void its_vpe_irq_domain_free(struct irq_domain *domain, 42227d75bbb4SMarc Zyngier unsigned int virq, 42237d75bbb4SMarc Zyngier unsigned int nr_irqs) 42247d75bbb4SMarc Zyngier { 42257d75bbb4SMarc Zyngier struct its_vm *vm = domain->host_data; 42267d75bbb4SMarc Zyngier int i; 42277d75bbb4SMarc Zyngier 42287d75bbb4SMarc Zyngier irq_domain_free_irqs_parent(domain, virq, nr_irqs); 42297d75bbb4SMarc Zyngier 42307d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 42317d75bbb4SMarc Zyngier struct irq_data *data = irq_domain_get_irq_data(domain, 42327d75bbb4SMarc Zyngier virq + i); 42337d75bbb4SMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(data); 42347d75bbb4SMarc Zyngier 42357d75bbb4SMarc Zyngier BUG_ON(vm != vpe->its_vm); 42367d75bbb4SMarc Zyngier 42377d75bbb4SMarc Zyngier clear_bit(data->hwirq, vm->db_bitmap); 42387d75bbb4SMarc Zyngier its_vpe_teardown(vpe); 42397d75bbb4SMarc Zyngier irq_domain_reset_irq_data(data); 42407d75bbb4SMarc Zyngier } 42417d75bbb4SMarc Zyngier 42427d75bbb4SMarc Zyngier if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) { 424338dd7c49SMarc Zyngier its_lpi_free(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis); 42447d75bbb4SMarc Zyngier its_free_prop_table(vm->vprop_page); 42457d75bbb4SMarc Zyngier } 42467d75bbb4SMarc Zyngier } 42477d75bbb4SMarc Zyngier 42487d75bbb4SMarc Zyngier static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 42497d75bbb4SMarc Zyngier unsigned int nr_irqs, void *args) 42507d75bbb4SMarc Zyngier { 425129c647f3SMarc Zyngier struct irq_chip *irqchip = &its_vpe_irq_chip; 42527d75bbb4SMarc Zyngier struct its_vm *vm = args; 42537d75bbb4SMarc Zyngier unsigned long *bitmap; 42547d75bbb4SMarc Zyngier struct page *vprop_page; 42557d75bbb4SMarc Zyngier int base, nr_ids, i, err = 0; 42567d75bbb4SMarc Zyngier 42577d75bbb4SMarc Zyngier BUG_ON(!vm); 42587d75bbb4SMarc Zyngier 425938dd7c49SMarc Zyngier bitmap = its_lpi_alloc(roundup_pow_of_two(nr_irqs), &base, &nr_ids); 42607d75bbb4SMarc Zyngier if (!bitmap) 42617d75bbb4SMarc Zyngier return -ENOMEM; 42627d75bbb4SMarc Zyngier 42637d75bbb4SMarc Zyngier if (nr_ids < nr_irqs) { 426438dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 42657d75bbb4SMarc Zyngier return -ENOMEM; 42667d75bbb4SMarc Zyngier } 42677d75bbb4SMarc Zyngier 42687d75bbb4SMarc Zyngier vprop_page = its_allocate_prop_table(GFP_KERNEL); 42697d75bbb4SMarc Zyngier if (!vprop_page) { 427038dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 42717d75bbb4SMarc Zyngier return -ENOMEM; 42727d75bbb4SMarc Zyngier } 42737d75bbb4SMarc Zyngier 42747d75bbb4SMarc Zyngier vm->db_bitmap = bitmap; 42757d75bbb4SMarc Zyngier vm->db_lpi_base = base; 42767d75bbb4SMarc Zyngier vm->nr_db_lpis = nr_ids; 42777d75bbb4SMarc Zyngier vm->vprop_page = vprop_page; 42787d75bbb4SMarc Zyngier 427929c647f3SMarc Zyngier if (gic_rdists->has_rvpeid) 428029c647f3SMarc Zyngier irqchip = &its_vpe_4_1_irq_chip; 428129c647f3SMarc Zyngier 42827d75bbb4SMarc Zyngier for (i = 0; i < nr_irqs; i++) { 42837d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi = base + i; 42847d75bbb4SMarc Zyngier err = its_vpe_init(vm->vpes[i]); 42857d75bbb4SMarc Zyngier if (err) 42867d75bbb4SMarc Zyngier break; 42877d75bbb4SMarc Zyngier err = its_irq_gic_domain_alloc(domain, virq + i, 42887d75bbb4SMarc Zyngier vm->vpes[i]->vpe_db_lpi); 42897d75bbb4SMarc Zyngier if (err) 42907d75bbb4SMarc Zyngier break; 42917d75bbb4SMarc Zyngier irq_domain_set_hwirq_and_chip(domain, virq + i, i, 429229c647f3SMarc Zyngier irqchip, vm->vpes[i]); 42937d75bbb4SMarc Zyngier set_bit(i, bitmap); 42947d75bbb4SMarc Zyngier } 42957d75bbb4SMarc Zyngier 42967d75bbb4SMarc Zyngier if (err) { 42977d75bbb4SMarc Zyngier if (i > 0) 42987d75bbb4SMarc Zyngier its_vpe_irq_domain_free(domain, virq, i - 1); 42997d75bbb4SMarc Zyngier 430038dd7c49SMarc Zyngier its_lpi_free(bitmap, base, nr_ids); 43017d75bbb4SMarc Zyngier its_free_prop_table(vprop_page); 43027d75bbb4SMarc Zyngier } 43037d75bbb4SMarc Zyngier 43047d75bbb4SMarc Zyngier return err; 43057d75bbb4SMarc Zyngier } 43067d75bbb4SMarc Zyngier 430772491643SThomas Gleixner static int its_vpe_irq_domain_activate(struct irq_domain *domain, 4308702cb0a0SThomas Gleixner struct irq_data *d, bool reserve) 4309eb78192bSMarc Zyngier { 4310eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 431140619a2eSMarc Zyngier struct its_node *its; 4312eb78192bSMarc Zyngier 4313009384b3SMarc Zyngier /* 4314009384b3SMarc Zyngier * If we use the list map, we issue VMAPP on demand... Unless 4315009384b3SMarc Zyngier * we're on a GICv4.1 and we eagerly map the VPE on all ITSs 4316009384b3SMarc Zyngier * so that VSGIs can work. 4317009384b3SMarc Zyngier */ 4318009384b3SMarc Zyngier if (!gic_requires_eager_mapping()) 43196ef930f2SMarc Zyngier return 0; 4320eb78192bSMarc Zyngier 4321eb78192bSMarc Zyngier /* Map the VPE to the first possible CPU */ 4322eb78192bSMarc Zyngier vpe->col_idx = cpumask_first(cpu_online_mask); 432340619a2eSMarc Zyngier 432440619a2eSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 43250dd57fedSMarc Zyngier if (!is_v4(its)) 432640619a2eSMarc Zyngier continue; 432740619a2eSMarc Zyngier 432875fd951bSMarc Zyngier its_send_vmapp(its, vpe, true); 432940619a2eSMarc Zyngier its_send_vinvall(its, vpe); 433040619a2eSMarc Zyngier } 433140619a2eSMarc Zyngier 433244c4c25eSMarc Zyngier irq_data_update_effective_affinity(d, cpumask_of(vpe->col_idx)); 433344c4c25eSMarc Zyngier 433472491643SThomas Gleixner return 0; 4335eb78192bSMarc Zyngier } 4336eb78192bSMarc Zyngier 4337eb78192bSMarc Zyngier static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, 4338eb78192bSMarc Zyngier struct irq_data *d) 4339eb78192bSMarc Zyngier { 4340eb78192bSMarc Zyngier struct its_vpe *vpe = irq_data_get_irq_chip_data(d); 434175fd951bSMarc Zyngier struct its_node *its; 4342eb78192bSMarc Zyngier 43432247e1bfSMarc Zyngier /* 4344009384b3SMarc Zyngier * If we use the list map on GICv4.0, we unmap the VPE once no 4345009384b3SMarc Zyngier * VLPIs are associated with the VM. 43462247e1bfSMarc Zyngier */ 4347009384b3SMarc Zyngier if (!gic_requires_eager_mapping()) 43482247e1bfSMarc Zyngier return; 43492247e1bfSMarc Zyngier 435075fd951bSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 43510dd57fedSMarc Zyngier if (!is_v4(its)) 435275fd951bSMarc Zyngier continue; 435375fd951bSMarc Zyngier 435475fd951bSMarc Zyngier its_send_vmapp(its, vpe, false); 435575fd951bSMarc Zyngier } 4356eb78192bSMarc Zyngier } 4357eb78192bSMarc Zyngier 43588fff27aeSMarc Zyngier static const struct irq_domain_ops its_vpe_domain_ops = { 43597d75bbb4SMarc Zyngier .alloc = its_vpe_irq_domain_alloc, 43607d75bbb4SMarc Zyngier .free = its_vpe_irq_domain_free, 4361eb78192bSMarc Zyngier .activate = its_vpe_irq_domain_activate, 4362eb78192bSMarc Zyngier .deactivate = its_vpe_irq_domain_deactivate, 43638fff27aeSMarc Zyngier }; 43648fff27aeSMarc Zyngier 43654559fbb3SYun Wu static int its_force_quiescent(void __iomem *base) 43664559fbb3SYun Wu { 43674559fbb3SYun Wu u32 count = 1000000; /* 1s */ 43684559fbb3SYun Wu u32 val; 43694559fbb3SYun Wu 43704559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 43717611da86SDavid Daney /* 43727611da86SDavid Daney * GIC architecture specification requires the ITS to be both 43737611da86SDavid Daney * disabled and quiescent for writes to GITS_BASER<n> or 43747611da86SDavid Daney * GITS_CBASER to not have UNPREDICTABLE results. 43757611da86SDavid Daney */ 43767611da86SDavid Daney if ((val & GITS_CTLR_QUIESCENT) && !(val & GITS_CTLR_ENABLE)) 43774559fbb3SYun Wu return 0; 43784559fbb3SYun Wu 43794559fbb3SYun Wu /* Disable the generation of all interrupts to this ITS */ 4380d51c4b4dSMarc Zyngier val &= ~(GITS_CTLR_ENABLE | GITS_CTLR_ImDe); 43814559fbb3SYun Wu writel_relaxed(val, base + GITS_CTLR); 43824559fbb3SYun Wu 43834559fbb3SYun Wu /* Poll GITS_CTLR and wait until ITS becomes quiescent */ 43844559fbb3SYun Wu while (1) { 43854559fbb3SYun Wu val = readl_relaxed(base + GITS_CTLR); 43864559fbb3SYun Wu if (val & GITS_CTLR_QUIESCENT) 43874559fbb3SYun Wu return 0; 43884559fbb3SYun Wu 43894559fbb3SYun Wu count--; 43904559fbb3SYun Wu if (!count) 43914559fbb3SYun Wu return -EBUSY; 43924559fbb3SYun Wu 43934559fbb3SYun Wu cpu_relax(); 43944559fbb3SYun Wu udelay(1); 43954559fbb3SYun Wu } 43964559fbb3SYun Wu } 43974559fbb3SYun Wu 43989d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) 439994100970SRobert Richter { 440094100970SRobert Richter struct its_node *its = data; 440194100970SRobert Richter 4402576a8342SMarc Zyngier /* erratum 22375: only alloc 8MB table size (20 bits) */ 4403576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 4404576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); 440594100970SRobert Richter its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; 44069d111d49SArd Biesheuvel 44079d111d49SArd Biesheuvel return true; 440894100970SRobert Richter } 440994100970SRobert Richter 44109d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_cavium_23144(void *data) 4411fbf8f40eSGanapatrao Kulkarni { 4412fbf8f40eSGanapatrao Kulkarni struct its_node *its = data; 4413fbf8f40eSGanapatrao Kulkarni 4414fbf8f40eSGanapatrao Kulkarni its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; 44159d111d49SArd Biesheuvel 44169d111d49SArd Biesheuvel return true; 4417fbf8f40eSGanapatrao Kulkarni } 4418fbf8f40eSGanapatrao Kulkarni 44199d111d49SArd Biesheuvel static bool __maybe_unused its_enable_quirk_qdf2400_e0065(void *data) 442090922a2dSShanker Donthineni { 442190922a2dSShanker Donthineni struct its_node *its = data; 442290922a2dSShanker Donthineni 442390922a2dSShanker Donthineni /* On QDF2400, the size of the ITE is 16Bytes */ 4424ffedbf0cSMarc Zyngier its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; 4425ffedbf0cSMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); 44269d111d49SArd Biesheuvel 44279d111d49SArd Biesheuvel return true; 442890922a2dSShanker Donthineni } 442990922a2dSShanker Donthineni 4430558b0165SArd Biesheuvel static u64 its_irq_get_msi_base_pre_its(struct its_device *its_dev) 4431558b0165SArd Biesheuvel { 4432558b0165SArd Biesheuvel struct its_node *its = its_dev->its; 4433558b0165SArd Biesheuvel 4434558b0165SArd Biesheuvel /* 4435558b0165SArd Biesheuvel * The Socionext Synquacer SoC has a so-called 'pre-ITS', 4436558b0165SArd Biesheuvel * which maps 32-bit writes targeted at a separate window of 4437558b0165SArd Biesheuvel * size '4 << device_id_bits' onto writes to GITS_TRANSLATER 4438558b0165SArd Biesheuvel * with device ID taken from bits [device_id_bits + 1:2] of 4439558b0165SArd Biesheuvel * the window offset. 4440558b0165SArd Biesheuvel */ 4441558b0165SArd Biesheuvel return its->pre_its_base + (its_dev->device_id << 2); 4442558b0165SArd Biesheuvel } 4443558b0165SArd Biesheuvel 4444558b0165SArd Biesheuvel static bool __maybe_unused its_enable_quirk_socionext_synquacer(void *data) 4445558b0165SArd Biesheuvel { 4446558b0165SArd Biesheuvel struct its_node *its = data; 4447558b0165SArd Biesheuvel u32 pre_its_window[2]; 4448558b0165SArd Biesheuvel u32 ids; 4449558b0165SArd Biesheuvel 4450558b0165SArd Biesheuvel if (!fwnode_property_read_u32_array(its->fwnode_handle, 4451558b0165SArd Biesheuvel "socionext,synquacer-pre-its", 4452558b0165SArd Biesheuvel pre_its_window, 4453558b0165SArd Biesheuvel ARRAY_SIZE(pre_its_window))) { 4454558b0165SArd Biesheuvel 4455558b0165SArd Biesheuvel its->pre_its_base = pre_its_window[0]; 4456558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base_pre_its; 4457558b0165SArd Biesheuvel 4458558b0165SArd Biesheuvel ids = ilog2(pre_its_window[1]) - 2; 4459576a8342SMarc Zyngier if (device_ids(its) > ids) { 4460576a8342SMarc Zyngier its->typer &= ~GITS_TYPER_DEVBITS; 4461576a8342SMarc Zyngier its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); 4462576a8342SMarc Zyngier } 4463558b0165SArd Biesheuvel 4464558b0165SArd Biesheuvel /* the pre-ITS breaks isolation, so disable MSI remapping */ 4465558b0165SArd Biesheuvel its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_MSI_REMAP; 4466558b0165SArd Biesheuvel return true; 4467558b0165SArd Biesheuvel } 4468558b0165SArd Biesheuvel return false; 4469558b0165SArd Biesheuvel } 4470558b0165SArd Biesheuvel 44715c9a882eSMarc Zyngier static bool __maybe_unused its_enable_quirk_hip07_161600802(void *data) 44725c9a882eSMarc Zyngier { 44735c9a882eSMarc Zyngier struct its_node *its = data; 44745c9a882eSMarc Zyngier 44755c9a882eSMarc Zyngier /* 44765c9a882eSMarc Zyngier * Hip07 insists on using the wrong address for the VLPI 44775c9a882eSMarc Zyngier * page. Trick it into doing the right thing... 44785c9a882eSMarc Zyngier */ 44795c9a882eSMarc Zyngier its->vlpi_redist_offset = SZ_128K; 44805c9a882eSMarc Zyngier return true; 4481cc2d3216SMarc Zyngier } 44824c21f3c2SMarc Zyngier 448367510ccaSRobert Richter static const struct gic_quirk its_quirks[] = { 448494100970SRobert Richter #ifdef CONFIG_CAVIUM_ERRATUM_22375 448594100970SRobert Richter { 448694100970SRobert Richter .desc = "ITS: Cavium errata 22375, 24313", 448794100970SRobert Richter .iidr = 0xa100034c, /* ThunderX pass 1.x */ 448894100970SRobert Richter .mask = 0xffff0fff, 448994100970SRobert Richter .init = its_enable_quirk_cavium_22375, 449094100970SRobert Richter }, 449194100970SRobert Richter #endif 4492fbf8f40eSGanapatrao Kulkarni #ifdef CONFIG_CAVIUM_ERRATUM_23144 4493fbf8f40eSGanapatrao Kulkarni { 4494fbf8f40eSGanapatrao Kulkarni .desc = "ITS: Cavium erratum 23144", 4495fbf8f40eSGanapatrao Kulkarni .iidr = 0xa100034c, /* ThunderX pass 1.x */ 4496fbf8f40eSGanapatrao Kulkarni .mask = 0xffff0fff, 4497fbf8f40eSGanapatrao Kulkarni .init = its_enable_quirk_cavium_23144, 4498fbf8f40eSGanapatrao Kulkarni }, 4499fbf8f40eSGanapatrao Kulkarni #endif 450090922a2dSShanker Donthineni #ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065 450190922a2dSShanker Donthineni { 450290922a2dSShanker Donthineni .desc = "ITS: QDF2400 erratum 0065", 450390922a2dSShanker Donthineni .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */ 450490922a2dSShanker Donthineni .mask = 0xffffffff, 450590922a2dSShanker Donthineni .init = its_enable_quirk_qdf2400_e0065, 450690922a2dSShanker Donthineni }, 450790922a2dSShanker Donthineni #endif 4508558b0165SArd Biesheuvel #ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS 4509558b0165SArd Biesheuvel { 4510558b0165SArd Biesheuvel /* 4511558b0165SArd Biesheuvel * The Socionext Synquacer SoC incorporates ARM's own GIC-500 4512558b0165SArd Biesheuvel * implementation, but with a 'pre-ITS' added that requires 4513558b0165SArd Biesheuvel * special handling in software. 4514558b0165SArd Biesheuvel */ 4515558b0165SArd Biesheuvel .desc = "ITS: Socionext Synquacer pre-ITS", 4516558b0165SArd Biesheuvel .iidr = 0x0001143b, 4517558b0165SArd Biesheuvel .mask = 0xffffffff, 4518558b0165SArd Biesheuvel .init = its_enable_quirk_socionext_synquacer, 4519558b0165SArd Biesheuvel }, 4520558b0165SArd Biesheuvel #endif 45215c9a882eSMarc Zyngier #ifdef CONFIG_HISILICON_ERRATUM_161600802 45225c9a882eSMarc Zyngier { 45235c9a882eSMarc Zyngier .desc = "ITS: Hip07 erratum 161600802", 45245c9a882eSMarc Zyngier .iidr = 0x00000004, 45255c9a882eSMarc Zyngier .mask = 0xffffffff, 45265c9a882eSMarc Zyngier .init = its_enable_quirk_hip07_161600802, 45275c9a882eSMarc Zyngier }, 45285c9a882eSMarc Zyngier #endif 452967510ccaSRobert Richter { 453067510ccaSRobert Richter } 453167510ccaSRobert Richter }; 453267510ccaSRobert Richter 453367510ccaSRobert Richter static void its_enable_quirks(struct its_node *its) 453467510ccaSRobert Richter { 453567510ccaSRobert Richter u32 iidr = readl_relaxed(its->base + GITS_IIDR); 453667510ccaSRobert Richter 453767510ccaSRobert Richter gic_enable_quirks(iidr, its_quirks, its); 453867510ccaSRobert Richter } 453967510ccaSRobert Richter 4540dba0bc7bSDerek Basehore static int its_save_disable(void) 4541dba0bc7bSDerek Basehore { 4542dba0bc7bSDerek Basehore struct its_node *its; 4543dba0bc7bSDerek Basehore int err = 0; 4544dba0bc7bSDerek Basehore 4545a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4546dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4547dba0bc7bSDerek Basehore void __iomem *base; 4548dba0bc7bSDerek Basehore 4549dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 4550dba0bc7bSDerek Basehore continue; 4551dba0bc7bSDerek Basehore 4552dba0bc7bSDerek Basehore base = its->base; 4553dba0bc7bSDerek Basehore its->ctlr_save = readl_relaxed(base + GITS_CTLR); 4554dba0bc7bSDerek Basehore err = its_force_quiescent(base); 4555dba0bc7bSDerek Basehore if (err) { 4556dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce: %d\n", 4557dba0bc7bSDerek Basehore &its->phys_base, err); 4558dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4559dba0bc7bSDerek Basehore goto err; 4560dba0bc7bSDerek Basehore } 4561dba0bc7bSDerek Basehore 4562dba0bc7bSDerek Basehore its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); 4563dba0bc7bSDerek Basehore } 4564dba0bc7bSDerek Basehore 4565dba0bc7bSDerek Basehore err: 4566dba0bc7bSDerek Basehore if (err) { 4567dba0bc7bSDerek Basehore list_for_each_entry_continue_reverse(its, &its_nodes, entry) { 4568dba0bc7bSDerek Basehore void __iomem *base; 4569dba0bc7bSDerek Basehore 4570dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 4571dba0bc7bSDerek Basehore continue; 4572dba0bc7bSDerek Basehore 4573dba0bc7bSDerek Basehore base = its->base; 4574dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4575dba0bc7bSDerek Basehore } 4576dba0bc7bSDerek Basehore } 4577a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4578dba0bc7bSDerek Basehore 4579dba0bc7bSDerek Basehore return err; 4580dba0bc7bSDerek Basehore } 4581dba0bc7bSDerek Basehore 4582dba0bc7bSDerek Basehore static void its_restore_enable(void) 4583dba0bc7bSDerek Basehore { 4584dba0bc7bSDerek Basehore struct its_node *its; 4585dba0bc7bSDerek Basehore int ret; 4586dba0bc7bSDerek Basehore 4587a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 4588dba0bc7bSDerek Basehore list_for_each_entry(its, &its_nodes, entry) { 4589dba0bc7bSDerek Basehore void __iomem *base; 4590dba0bc7bSDerek Basehore int i; 4591dba0bc7bSDerek Basehore 4592dba0bc7bSDerek Basehore if (!(its->flags & ITS_FLAGS_SAVE_SUSPEND_STATE)) 4593dba0bc7bSDerek Basehore continue; 4594dba0bc7bSDerek Basehore 4595dba0bc7bSDerek Basehore base = its->base; 4596dba0bc7bSDerek Basehore 4597dba0bc7bSDerek Basehore /* 4598dba0bc7bSDerek Basehore * Make sure that the ITS is disabled. If it fails to quiesce, 4599dba0bc7bSDerek Basehore * don't restore it since writing to CBASER or BASER<n> 4600dba0bc7bSDerek Basehore * registers is undefined according to the GIC v3 ITS 4601dba0bc7bSDerek Basehore * Specification. 4602dba0bc7bSDerek Basehore */ 4603dba0bc7bSDerek Basehore ret = its_force_quiescent(base); 4604dba0bc7bSDerek Basehore if (ret) { 4605dba0bc7bSDerek Basehore pr_err("ITS@%pa: failed to quiesce on resume: %d\n", 4606dba0bc7bSDerek Basehore &its->phys_base, ret); 4607dba0bc7bSDerek Basehore continue; 4608dba0bc7bSDerek Basehore } 4609dba0bc7bSDerek Basehore 4610dba0bc7bSDerek Basehore gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); 4611dba0bc7bSDerek Basehore 4612dba0bc7bSDerek Basehore /* 4613dba0bc7bSDerek Basehore * Writing CBASER resets CREADR to 0, so make CWRITER and 4614dba0bc7bSDerek Basehore * cmd_write line up with it. 4615dba0bc7bSDerek Basehore */ 4616dba0bc7bSDerek Basehore its->cmd_write = its->cmd_base; 4617dba0bc7bSDerek Basehore gits_write_cwriter(0, base + GITS_CWRITER); 4618dba0bc7bSDerek Basehore 4619dba0bc7bSDerek Basehore /* Restore GITS_BASER from the value cache. */ 4620dba0bc7bSDerek Basehore for (i = 0; i < GITS_BASER_NR_REGS; i++) { 4621dba0bc7bSDerek Basehore struct its_baser *baser = &its->tables[i]; 4622dba0bc7bSDerek Basehore 4623dba0bc7bSDerek Basehore if (!(baser->val & GITS_BASER_VALID)) 4624dba0bc7bSDerek Basehore continue; 4625dba0bc7bSDerek Basehore 4626dba0bc7bSDerek Basehore its_write_baser(its, baser, baser->val); 4627dba0bc7bSDerek Basehore } 4628dba0bc7bSDerek Basehore writel_relaxed(its->ctlr_save, base + GITS_CTLR); 4629920181ceSDerek Basehore 4630920181ceSDerek Basehore /* 4631920181ceSDerek Basehore * Reinit the collection if it's stored in the ITS. This is 4632920181ceSDerek Basehore * indicated by the col_id being less than the HCC field. 4633920181ceSDerek Basehore * CID < HCC as specified in the GIC v3 Documentation. 4634920181ceSDerek Basehore */ 4635920181ceSDerek Basehore if (its->collections[smp_processor_id()].col_id < 4636920181ceSDerek Basehore GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) 4637920181ceSDerek Basehore its_cpu_init_collection(its); 4638dba0bc7bSDerek Basehore } 4639a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 4640dba0bc7bSDerek Basehore } 4641dba0bc7bSDerek Basehore 4642dba0bc7bSDerek Basehore static struct syscore_ops its_syscore_ops = { 4643dba0bc7bSDerek Basehore .suspend = its_save_disable, 4644dba0bc7bSDerek Basehore .resume = its_restore_enable, 4645dba0bc7bSDerek Basehore }; 4646dba0bc7bSDerek Basehore 4647db40f0a7STomasz Nowicki static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) 4648d14ae5e6STomasz Nowicki { 4649d14ae5e6STomasz Nowicki struct irq_domain *inner_domain; 4650d14ae5e6STomasz Nowicki struct msi_domain_info *info; 4651d14ae5e6STomasz Nowicki 4652d14ae5e6STomasz Nowicki info = kzalloc(sizeof(*info), GFP_KERNEL); 4653d14ae5e6STomasz Nowicki if (!info) 4654d14ae5e6STomasz Nowicki return -ENOMEM; 4655d14ae5e6STomasz Nowicki 4656db40f0a7STomasz Nowicki inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its); 4657d14ae5e6STomasz Nowicki if (!inner_domain) { 4658d14ae5e6STomasz Nowicki kfree(info); 4659d14ae5e6STomasz Nowicki return -ENOMEM; 4660d14ae5e6STomasz Nowicki } 4661d14ae5e6STomasz Nowicki 4662db40f0a7STomasz Nowicki inner_domain->parent = its_parent; 466396f0d93aSMarc Zyngier irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); 4664558b0165SArd Biesheuvel inner_domain->flags |= its->msi_domain_flags; 4665d14ae5e6STomasz Nowicki info->ops = &its_msi_domain_ops; 4666d14ae5e6STomasz Nowicki info->data = its; 4667d14ae5e6STomasz Nowicki inner_domain->host_data = info; 4668d14ae5e6STomasz Nowicki 4669d14ae5e6STomasz Nowicki return 0; 4670d14ae5e6STomasz Nowicki } 4671d14ae5e6STomasz Nowicki 46728fff27aeSMarc Zyngier static int its_init_vpe_domain(void) 46738fff27aeSMarc Zyngier { 467420b3d54eSMarc Zyngier struct its_node *its; 467520b3d54eSMarc Zyngier u32 devid; 467620b3d54eSMarc Zyngier int entries; 467720b3d54eSMarc Zyngier 467820b3d54eSMarc Zyngier if (gic_rdists->has_direct_lpi) { 467920b3d54eSMarc Zyngier pr_info("ITS: Using DirectLPI for VPE invalidation\n"); 468020b3d54eSMarc Zyngier return 0; 468120b3d54eSMarc Zyngier } 468220b3d54eSMarc Zyngier 468320b3d54eSMarc Zyngier /* Any ITS will do, even if not v4 */ 468420b3d54eSMarc Zyngier its = list_first_entry(&its_nodes, struct its_node, entry); 468520b3d54eSMarc Zyngier 468620b3d54eSMarc Zyngier entries = roundup_pow_of_two(nr_cpu_ids); 46876396bb22SKees Cook vpe_proxy.vpes = kcalloc(entries, sizeof(*vpe_proxy.vpes), 468820b3d54eSMarc Zyngier GFP_KERNEL); 468920b3d54eSMarc Zyngier if (!vpe_proxy.vpes) { 469020b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device array\n"); 469120b3d54eSMarc Zyngier return -ENOMEM; 469220b3d54eSMarc Zyngier } 469320b3d54eSMarc Zyngier 469420b3d54eSMarc Zyngier /* Use the last possible DevID */ 4695576a8342SMarc Zyngier devid = GENMASK(device_ids(its) - 1, 0); 469620b3d54eSMarc Zyngier vpe_proxy.dev = its_create_device(its, devid, entries, false); 469720b3d54eSMarc Zyngier if (!vpe_proxy.dev) { 469820b3d54eSMarc Zyngier kfree(vpe_proxy.vpes); 469920b3d54eSMarc Zyngier pr_err("ITS: Can't allocate GICv4 proxy device\n"); 470020b3d54eSMarc Zyngier return -ENOMEM; 470120b3d54eSMarc Zyngier } 470220b3d54eSMarc Zyngier 4703c427a475SShanker Donthineni BUG_ON(entries > vpe_proxy.dev->nr_ites); 470420b3d54eSMarc Zyngier 470520b3d54eSMarc Zyngier raw_spin_lock_init(&vpe_proxy.lock); 470620b3d54eSMarc Zyngier vpe_proxy.next_victim = 0; 470720b3d54eSMarc Zyngier pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", 470820b3d54eSMarc Zyngier devid, vpe_proxy.dev->nr_ites); 470920b3d54eSMarc Zyngier 47108fff27aeSMarc Zyngier return 0; 47118fff27aeSMarc Zyngier } 47128fff27aeSMarc Zyngier 47133dfa576bSMarc Zyngier static int __init its_compute_its_list_map(struct resource *res, 47143dfa576bSMarc Zyngier void __iomem *its_base) 47153dfa576bSMarc Zyngier { 47163dfa576bSMarc Zyngier int its_number; 47173dfa576bSMarc Zyngier u32 ctlr; 47183dfa576bSMarc Zyngier 47193dfa576bSMarc Zyngier /* 47203dfa576bSMarc Zyngier * This is assumed to be done early enough that we're 47213dfa576bSMarc Zyngier * guaranteed to be single-threaded, hence no 47223dfa576bSMarc Zyngier * locking. Should this change, we should address 47233dfa576bSMarc Zyngier * this. 47243dfa576bSMarc Zyngier */ 4725ab60491eSMarc Zyngier its_number = find_first_zero_bit(&its_list_map, GICv4_ITS_LIST_MAX); 4726ab60491eSMarc Zyngier if (its_number >= GICv4_ITS_LIST_MAX) { 47273dfa576bSMarc Zyngier pr_err("ITS@%pa: No ITSList entry available!\n", 47283dfa576bSMarc Zyngier &res->start); 47293dfa576bSMarc Zyngier return -EINVAL; 47303dfa576bSMarc Zyngier } 47313dfa576bSMarc Zyngier 47323dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 47333dfa576bSMarc Zyngier ctlr &= ~GITS_CTLR_ITS_NUMBER; 47343dfa576bSMarc Zyngier ctlr |= its_number << GITS_CTLR_ITS_NUMBER_SHIFT; 47353dfa576bSMarc Zyngier writel_relaxed(ctlr, its_base + GITS_CTLR); 47363dfa576bSMarc Zyngier ctlr = readl_relaxed(its_base + GITS_CTLR); 47373dfa576bSMarc Zyngier if ((ctlr & GITS_CTLR_ITS_NUMBER) != (its_number << GITS_CTLR_ITS_NUMBER_SHIFT)) { 47383dfa576bSMarc Zyngier its_number = ctlr & GITS_CTLR_ITS_NUMBER; 47393dfa576bSMarc Zyngier its_number >>= GITS_CTLR_ITS_NUMBER_SHIFT; 47403dfa576bSMarc Zyngier } 47413dfa576bSMarc Zyngier 47423dfa576bSMarc Zyngier if (test_and_set_bit(its_number, &its_list_map)) { 47433dfa576bSMarc Zyngier pr_err("ITS@%pa: Duplicate ITSList entry %d\n", 47443dfa576bSMarc Zyngier &res->start, its_number); 47453dfa576bSMarc Zyngier return -EINVAL; 47463dfa576bSMarc Zyngier } 47473dfa576bSMarc Zyngier 47483dfa576bSMarc Zyngier return its_number; 47493dfa576bSMarc Zyngier } 47503dfa576bSMarc Zyngier 4751db40f0a7STomasz Nowicki static int __init its_probe_one(struct resource *res, 4752db40f0a7STomasz Nowicki struct fwnode_handle *handle, int numa_node) 47534c21f3c2SMarc Zyngier { 47544c21f3c2SMarc Zyngier struct its_node *its; 47554c21f3c2SMarc Zyngier void __iomem *its_base; 47563dfa576bSMarc Zyngier u32 val, ctlr; 47573dfa576bSMarc Zyngier u64 baser, tmp, typer; 4758539d3782SShanker Donthineni struct page *page; 47594c21f3c2SMarc Zyngier int err; 47604c21f3c2SMarc Zyngier 47615e46a484SMarc Zyngier its_base = ioremap(res->start, SZ_64K); 47624c21f3c2SMarc Zyngier if (!its_base) { 4763db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); 47644c21f3c2SMarc Zyngier return -ENOMEM; 47654c21f3c2SMarc Zyngier } 47664c21f3c2SMarc Zyngier 47674c21f3c2SMarc Zyngier val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK; 47684c21f3c2SMarc Zyngier if (val != 0x30 && val != 0x40) { 4769db40f0a7STomasz Nowicki pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); 47704c21f3c2SMarc Zyngier err = -ENODEV; 47714c21f3c2SMarc Zyngier goto out_unmap; 47724c21f3c2SMarc Zyngier } 47734c21f3c2SMarc Zyngier 47744559fbb3SYun Wu err = its_force_quiescent(its_base); 47754559fbb3SYun Wu if (err) { 4776db40f0a7STomasz Nowicki pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); 47774559fbb3SYun Wu goto out_unmap; 47784559fbb3SYun Wu } 47794559fbb3SYun Wu 4780db40f0a7STomasz Nowicki pr_info("ITS %pR\n", res); 47814c21f3c2SMarc Zyngier 47824c21f3c2SMarc Zyngier its = kzalloc(sizeof(*its), GFP_KERNEL); 47834c21f3c2SMarc Zyngier if (!its) { 47844c21f3c2SMarc Zyngier err = -ENOMEM; 47854c21f3c2SMarc Zyngier goto out_unmap; 47864c21f3c2SMarc Zyngier } 47874c21f3c2SMarc Zyngier 47884c21f3c2SMarc Zyngier raw_spin_lock_init(&its->lock); 47899791ec7dSMarc Zyngier mutex_init(&its->dev_alloc_lock); 47904c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->entry); 47914c21f3c2SMarc Zyngier INIT_LIST_HEAD(&its->its_device_list); 47923dfa576bSMarc Zyngier typer = gic_read_typer(its_base + GITS_TYPER); 47930dd57fedSMarc Zyngier its->typer = typer; 47944c21f3c2SMarc Zyngier its->base = its_base; 4795db40f0a7STomasz Nowicki its->phys_base = res->start; 47960dd57fedSMarc Zyngier if (is_v4(its)) { 47973dfa576bSMarc Zyngier if (!(typer & GITS_TYPER_VMOVP)) { 47983dfa576bSMarc Zyngier err = its_compute_its_list_map(res, its_base); 47993dfa576bSMarc Zyngier if (err < 0) 48003dfa576bSMarc Zyngier goto out_free_its; 48013dfa576bSMarc Zyngier 4802debf6d02SMarc Zyngier its->list_nr = err; 4803debf6d02SMarc Zyngier 48043dfa576bSMarc Zyngier pr_info("ITS@%pa: Using ITS number %d\n", 48053dfa576bSMarc Zyngier &res->start, err); 48063dfa576bSMarc Zyngier } else { 48073dfa576bSMarc Zyngier pr_info("ITS@%pa: Single VMOVP capable\n", &res->start); 48083dfa576bSMarc Zyngier } 48095e516846SMarc Zyngier 48105e516846SMarc Zyngier if (is_v4_1(its)) { 48115e516846SMarc Zyngier u32 svpet = FIELD_GET(GITS_TYPER_SVPET, typer); 48125e46a484SMarc Zyngier 48135e46a484SMarc Zyngier its->sgir_base = ioremap(res->start + SZ_128K, SZ_64K); 48145e46a484SMarc Zyngier if (!its->sgir_base) { 48155e46a484SMarc Zyngier err = -ENOMEM; 48165e46a484SMarc Zyngier goto out_free_its; 48175e46a484SMarc Zyngier } 48185e46a484SMarc Zyngier 48195e516846SMarc Zyngier its->mpidr = readl_relaxed(its_base + GITS_MPIDR); 48205e516846SMarc Zyngier 48215e516846SMarc Zyngier pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n", 48225e516846SMarc Zyngier &res->start, its->mpidr, svpet); 48235e516846SMarc Zyngier } 48243dfa576bSMarc Zyngier } 48253dfa576bSMarc Zyngier 4826db40f0a7STomasz Nowicki its->numa_node = numa_node; 48274c21f3c2SMarc Zyngier 4828539d3782SShanker Donthineni page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, 48295bc13c2cSRobert Richter get_order(ITS_CMD_QUEUE_SZ)); 4830539d3782SShanker Donthineni if (!page) { 48314c21f3c2SMarc Zyngier err = -ENOMEM; 48325e46a484SMarc Zyngier goto out_unmap_sgir; 48334c21f3c2SMarc Zyngier } 4834539d3782SShanker Donthineni its->cmd_base = (void *)page_address(page); 48354c21f3c2SMarc Zyngier its->cmd_write = its->cmd_base; 4836558b0165SArd Biesheuvel its->fwnode_handle = handle; 4837558b0165SArd Biesheuvel its->get_msi_base = its_irq_get_msi_base; 4838558b0165SArd Biesheuvel its->msi_domain_flags = IRQ_DOMAIN_FLAG_MSI_REMAP; 48394c21f3c2SMarc Zyngier 484067510ccaSRobert Richter its_enable_quirks(its); 484167510ccaSRobert Richter 48420e0b0f69SShanker Donthineni err = its_alloc_tables(its); 48434c21f3c2SMarc Zyngier if (err) 48444c21f3c2SMarc Zyngier goto out_free_cmd; 48454c21f3c2SMarc Zyngier 48464c21f3c2SMarc Zyngier err = its_alloc_collections(its); 48474c21f3c2SMarc Zyngier if (err) 48484c21f3c2SMarc Zyngier goto out_free_tables; 48494c21f3c2SMarc Zyngier 48504c21f3c2SMarc Zyngier baser = (virt_to_phys(its->cmd_base) | 48512fd632a0SShanker Donthineni GITS_CBASER_RaWaWb | 48524c21f3c2SMarc Zyngier GITS_CBASER_InnerShareable | 48534c21f3c2SMarc Zyngier (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | 48544c21f3c2SMarc Zyngier GITS_CBASER_VALID); 48554c21f3c2SMarc Zyngier 48560968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 48570968a619SVladimir Murzin tmp = gits_read_cbaser(its->base + GITS_CBASER); 48584c21f3c2SMarc Zyngier 48594ad3e363SMarc Zyngier if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) { 4860241a386cSMarc Zyngier if (!(tmp & GITS_CBASER_SHAREABILITY_MASK)) { 4861241a386cSMarc Zyngier /* 4862241a386cSMarc Zyngier * The HW reports non-shareable, we must 4863241a386cSMarc Zyngier * remove the cacheability attributes as 4864241a386cSMarc Zyngier * well. 4865241a386cSMarc Zyngier */ 4866241a386cSMarc Zyngier baser &= ~(GITS_CBASER_SHAREABILITY_MASK | 4867241a386cSMarc Zyngier GITS_CBASER_CACHEABILITY_MASK); 4868241a386cSMarc Zyngier baser |= GITS_CBASER_nC; 48690968a619SVladimir Murzin gits_write_cbaser(baser, its->base + GITS_CBASER); 4870241a386cSMarc Zyngier } 48714c21f3c2SMarc Zyngier pr_info("ITS: using cache flushing for cmd queue\n"); 48724c21f3c2SMarc Zyngier its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; 48734c21f3c2SMarc Zyngier } 48744c21f3c2SMarc Zyngier 48750968a619SVladimir Murzin gits_write_cwriter(0, its->base + GITS_CWRITER); 48763dfa576bSMarc Zyngier ctlr = readl_relaxed(its->base + GITS_CTLR); 4877d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ENABLE; 48780dd57fedSMarc Zyngier if (is_v4(its)) 4879d51c4b4dSMarc Zyngier ctlr |= GITS_CTLR_ImDe; 4880d51c4b4dSMarc Zyngier writel_relaxed(ctlr, its->base + GITS_CTLR); 4881241a386cSMarc Zyngier 4882dba0bc7bSDerek Basehore if (GITS_TYPER_HCC(typer)) 4883dba0bc7bSDerek Basehore its->flags |= ITS_FLAGS_SAVE_SUSPEND_STATE; 4884dba0bc7bSDerek Basehore 4885db40f0a7STomasz Nowicki err = its_init_domain(handle, its); 4886d14ae5e6STomasz Nowicki if (err) 488754456db9SMarc Zyngier goto out_free_tables; 48884c21f3c2SMarc Zyngier 4889a8db7456SSebastian Andrzej Siewior raw_spin_lock(&its_lock); 48904c21f3c2SMarc Zyngier list_add(&its->entry, &its_nodes); 4891a8db7456SSebastian Andrzej Siewior raw_spin_unlock(&its_lock); 48924c21f3c2SMarc Zyngier 48934c21f3c2SMarc Zyngier return 0; 48944c21f3c2SMarc Zyngier 48954c21f3c2SMarc Zyngier out_free_tables: 48964c21f3c2SMarc Zyngier its_free_tables(its); 48974c21f3c2SMarc Zyngier out_free_cmd: 48985bc13c2cSRobert Richter free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); 48995e46a484SMarc Zyngier out_unmap_sgir: 49005e46a484SMarc Zyngier if (its->sgir_base) 49015e46a484SMarc Zyngier iounmap(its->sgir_base); 49024c21f3c2SMarc Zyngier out_free_its: 49034c21f3c2SMarc Zyngier kfree(its); 49044c21f3c2SMarc Zyngier out_unmap: 49054c21f3c2SMarc Zyngier iounmap(its_base); 4906db40f0a7STomasz Nowicki pr_err("ITS@%pa: failed probing (%d)\n", &res->start, err); 49074c21f3c2SMarc Zyngier return err; 49084c21f3c2SMarc Zyngier } 49094c21f3c2SMarc Zyngier 49104c21f3c2SMarc Zyngier static bool gic_rdists_supports_plpis(void) 49114c21f3c2SMarc Zyngier { 4912589ce5f4SMarc Zyngier return !!(gic_read_typer(gic_data_rdist_rd_base() + GICR_TYPER) & GICR_TYPER_PLPIS); 49134c21f3c2SMarc Zyngier } 49144c21f3c2SMarc Zyngier 49156eb486b6SShanker Donthineni static int redist_disable_lpis(void) 49164c21f3c2SMarc Zyngier { 49176eb486b6SShanker Donthineni void __iomem *rbase = gic_data_rdist_rd_base(); 49186eb486b6SShanker Donthineni u64 timeout = USEC_PER_SEC; 49196eb486b6SShanker Donthineni u64 val; 49206eb486b6SShanker Donthineni 49214c21f3c2SMarc Zyngier if (!gic_rdists_supports_plpis()) { 49224c21f3c2SMarc Zyngier pr_info("CPU%d: LPIs not supported\n", smp_processor_id()); 49234c21f3c2SMarc Zyngier return -ENXIO; 49244c21f3c2SMarc Zyngier } 49256eb486b6SShanker Donthineni 49266eb486b6SShanker Donthineni val = readl_relaxed(rbase + GICR_CTLR); 49276eb486b6SShanker Donthineni if (!(val & GICR_CTLR_ENABLE_LPIS)) 49286eb486b6SShanker Donthineni return 0; 49296eb486b6SShanker Donthineni 493011e37d35SMarc Zyngier /* 493111e37d35SMarc Zyngier * If coming via a CPU hotplug event, we don't need to disable 493211e37d35SMarc Zyngier * LPIs before trying to re-enable them. They are already 493311e37d35SMarc Zyngier * configured and all is well in the world. 4934c440a9d9SMarc Zyngier * 4935c440a9d9SMarc Zyngier * If running with preallocated tables, there is nothing to do. 493611e37d35SMarc Zyngier */ 4937c440a9d9SMarc Zyngier if (gic_data_rdist()->lpi_enabled || 4938c440a9d9SMarc Zyngier (gic_rdists->flags & RDIST_FLAGS_RD_TABLES_PREALLOCATED)) 493911e37d35SMarc Zyngier return 0; 494011e37d35SMarc Zyngier 494111e37d35SMarc Zyngier /* 494211e37d35SMarc Zyngier * From that point on, we only try to do some damage control. 494311e37d35SMarc Zyngier */ 494411e37d35SMarc Zyngier pr_warn("GICv3: CPU%d: Booted with LPIs enabled, memory probably corrupted\n", 49456eb486b6SShanker Donthineni smp_processor_id()); 49466eb486b6SShanker Donthineni add_taint(TAINT_CRAP, LOCKDEP_STILL_OK); 49476eb486b6SShanker Donthineni 49486eb486b6SShanker Donthineni /* Disable LPIs */ 49496eb486b6SShanker Donthineni val &= ~GICR_CTLR_ENABLE_LPIS; 49506eb486b6SShanker Donthineni writel_relaxed(val, rbase + GICR_CTLR); 49516eb486b6SShanker Donthineni 49526eb486b6SShanker Donthineni /* Make sure any change to GICR_CTLR is observable by the GIC */ 49536eb486b6SShanker Donthineni dsb(sy); 49546eb486b6SShanker Donthineni 49556eb486b6SShanker Donthineni /* 49566eb486b6SShanker Donthineni * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs 49576eb486b6SShanker Donthineni * from 1 to 0 before programming GICR_PEND{PROP}BASER registers. 49586eb486b6SShanker Donthineni * Error out if we time out waiting for RWP to clear. 49596eb486b6SShanker Donthineni */ 49606eb486b6SShanker Donthineni while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { 49616eb486b6SShanker Donthineni if (!timeout) { 49626eb486b6SShanker Donthineni pr_err("CPU%d: Timeout while disabling LPIs\n", 49636eb486b6SShanker Donthineni smp_processor_id()); 49646eb486b6SShanker Donthineni return -ETIMEDOUT; 49656eb486b6SShanker Donthineni } 49666eb486b6SShanker Donthineni udelay(1); 49676eb486b6SShanker Donthineni timeout--; 49686eb486b6SShanker Donthineni } 49696eb486b6SShanker Donthineni 49706eb486b6SShanker Donthineni /* 49716eb486b6SShanker Donthineni * After it has been written to 1, it is IMPLEMENTATION 49726eb486b6SShanker Donthineni * DEFINED whether GICR_CTLR.EnableLPI becomes RES1 or can be 49736eb486b6SShanker Donthineni * cleared to 0. Error out if clearing the bit failed. 49746eb486b6SShanker Donthineni */ 49756eb486b6SShanker Donthineni if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { 49766eb486b6SShanker Donthineni pr_err("CPU%d: Failed to disable LPIs\n", smp_processor_id()); 49776eb486b6SShanker Donthineni return -EBUSY; 49786eb486b6SShanker Donthineni } 49796eb486b6SShanker Donthineni 49806eb486b6SShanker Donthineni return 0; 49816eb486b6SShanker Donthineni } 49826eb486b6SShanker Donthineni 49836eb486b6SShanker Donthineni int its_cpu_init(void) 49846eb486b6SShanker Donthineni { 49856eb486b6SShanker Donthineni if (!list_empty(&its_nodes)) { 49866eb486b6SShanker Donthineni int ret; 49876eb486b6SShanker Donthineni 49886eb486b6SShanker Donthineni ret = redist_disable_lpis(); 49896eb486b6SShanker Donthineni if (ret) 49906eb486b6SShanker Donthineni return ret; 49916eb486b6SShanker Donthineni 49924c21f3c2SMarc Zyngier its_cpu_init_lpis(); 4993920181ceSDerek Basehore its_cpu_init_collections(); 49944c21f3c2SMarc Zyngier } 49954c21f3c2SMarc Zyngier 49964c21f3c2SMarc Zyngier return 0; 49974c21f3c2SMarc Zyngier } 49984c21f3c2SMarc Zyngier 4999935bba7cSArvind Yadav static const struct of_device_id its_device_id[] = { 50004c21f3c2SMarc Zyngier { .compatible = "arm,gic-v3-its", }, 50014c21f3c2SMarc Zyngier {}, 50024c21f3c2SMarc Zyngier }; 50034c21f3c2SMarc Zyngier 5004db40f0a7STomasz Nowicki static int __init its_of_probe(struct device_node *node) 50054c21f3c2SMarc Zyngier { 50064c21f3c2SMarc Zyngier struct device_node *np; 5007db40f0a7STomasz Nowicki struct resource res; 50084c21f3c2SMarc Zyngier 50094c21f3c2SMarc Zyngier for (np = of_find_matching_node(node, its_device_id); np; 50104c21f3c2SMarc Zyngier np = of_find_matching_node(np, its_device_id)) { 501195a25625SStephen Boyd if (!of_device_is_available(np)) 501295a25625SStephen Boyd continue; 5013d14ae5e6STomasz Nowicki if (!of_property_read_bool(np, "msi-controller")) { 5014e81f54c6SRob Herring pr_warn("%pOF: no msi-controller property, ITS ignored\n", 5015e81f54c6SRob Herring np); 5016d14ae5e6STomasz Nowicki continue; 5017d14ae5e6STomasz Nowicki } 5018d14ae5e6STomasz Nowicki 5019db40f0a7STomasz Nowicki if (of_address_to_resource(np, 0, &res)) { 5020e81f54c6SRob Herring pr_warn("%pOF: no regs?\n", np); 5021db40f0a7STomasz Nowicki continue; 50224c21f3c2SMarc Zyngier } 50234c21f3c2SMarc Zyngier 5024db40f0a7STomasz Nowicki its_probe_one(&res, &np->fwnode, of_node_to_nid(np)); 5025db40f0a7STomasz Nowicki } 5026db40f0a7STomasz Nowicki return 0; 5027db40f0a7STomasz Nowicki } 5028db40f0a7STomasz Nowicki 50293f010cf1STomasz Nowicki #ifdef CONFIG_ACPI 50303f010cf1STomasz Nowicki 50313f010cf1STomasz Nowicki #define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K) 50323f010cf1STomasz Nowicki 5033d1ce263fSRobert Richter #ifdef CONFIG_ACPI_NUMA 5034dbd2b826SGanapatrao Kulkarni struct its_srat_map { 5035dbd2b826SGanapatrao Kulkarni /* numa node id */ 5036dbd2b826SGanapatrao Kulkarni u32 numa_node; 5037dbd2b826SGanapatrao Kulkarni /* GIC ITS ID */ 5038dbd2b826SGanapatrao Kulkarni u32 its_id; 5039dbd2b826SGanapatrao Kulkarni }; 5040dbd2b826SGanapatrao Kulkarni 5041fdf6e7a8SHanjun Guo static struct its_srat_map *its_srat_maps __initdata; 5042dbd2b826SGanapatrao Kulkarni static int its_in_srat __initdata; 5043dbd2b826SGanapatrao Kulkarni 5044dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) 5045dbd2b826SGanapatrao Kulkarni { 5046dbd2b826SGanapatrao Kulkarni int i; 5047dbd2b826SGanapatrao Kulkarni 5048dbd2b826SGanapatrao Kulkarni for (i = 0; i < its_in_srat; i++) { 5049dbd2b826SGanapatrao Kulkarni if (its_id == its_srat_maps[i].its_id) 5050dbd2b826SGanapatrao Kulkarni return its_srat_maps[i].numa_node; 5051dbd2b826SGanapatrao Kulkarni } 5052dbd2b826SGanapatrao Kulkarni return NUMA_NO_NODE; 5053dbd2b826SGanapatrao Kulkarni } 5054dbd2b826SGanapatrao Kulkarni 505560574d1eSKeith Busch static int __init gic_acpi_match_srat_its(union acpi_subtable_headers *header, 5056fdf6e7a8SHanjun Guo const unsigned long end) 5057fdf6e7a8SHanjun Guo { 5058fdf6e7a8SHanjun Guo return 0; 5059fdf6e7a8SHanjun Guo } 5060fdf6e7a8SHanjun Guo 506160574d1eSKeith Busch static int __init gic_acpi_parse_srat_its(union acpi_subtable_headers *header, 5062dbd2b826SGanapatrao Kulkarni const unsigned long end) 5063dbd2b826SGanapatrao Kulkarni { 5064dbd2b826SGanapatrao Kulkarni int node; 5065dbd2b826SGanapatrao Kulkarni struct acpi_srat_gic_its_affinity *its_affinity; 5066dbd2b826SGanapatrao Kulkarni 5067dbd2b826SGanapatrao Kulkarni its_affinity = (struct acpi_srat_gic_its_affinity *)header; 5068dbd2b826SGanapatrao Kulkarni if (!its_affinity) 5069dbd2b826SGanapatrao Kulkarni return -EINVAL; 5070dbd2b826SGanapatrao Kulkarni 5071dbd2b826SGanapatrao Kulkarni if (its_affinity->header.length < sizeof(*its_affinity)) { 5072dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid header length %d in ITS affinity\n", 5073dbd2b826SGanapatrao Kulkarni its_affinity->header.length); 5074dbd2b826SGanapatrao Kulkarni return -EINVAL; 5075dbd2b826SGanapatrao Kulkarni } 5076dbd2b826SGanapatrao Kulkarni 5077dbd2b826SGanapatrao Kulkarni node = acpi_map_pxm_to_node(its_affinity->proximity_domain); 5078dbd2b826SGanapatrao Kulkarni 5079dbd2b826SGanapatrao Kulkarni if (node == NUMA_NO_NODE || node >= MAX_NUMNODES) { 5080dbd2b826SGanapatrao Kulkarni pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); 5081dbd2b826SGanapatrao Kulkarni return 0; 5082dbd2b826SGanapatrao Kulkarni } 5083dbd2b826SGanapatrao Kulkarni 5084dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].numa_node = node; 5085dbd2b826SGanapatrao Kulkarni its_srat_maps[its_in_srat].its_id = its_affinity->its_id; 5086dbd2b826SGanapatrao Kulkarni its_in_srat++; 5087dbd2b826SGanapatrao Kulkarni pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", 5088dbd2b826SGanapatrao Kulkarni its_affinity->proximity_domain, its_affinity->its_id, node); 5089dbd2b826SGanapatrao Kulkarni 5090dbd2b826SGanapatrao Kulkarni return 0; 5091dbd2b826SGanapatrao Kulkarni } 5092dbd2b826SGanapatrao Kulkarni 5093dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) 5094dbd2b826SGanapatrao Kulkarni { 5095fdf6e7a8SHanjun Guo int count; 5096fdf6e7a8SHanjun Guo 5097fdf6e7a8SHanjun Guo count = acpi_table_parse_entries(ACPI_SIG_SRAT, 5098fdf6e7a8SHanjun Guo sizeof(struct acpi_table_srat), 5099fdf6e7a8SHanjun Guo ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 5100fdf6e7a8SHanjun Guo gic_acpi_match_srat_its, 0); 5101fdf6e7a8SHanjun Guo if (count <= 0) 5102fdf6e7a8SHanjun Guo return; 5103fdf6e7a8SHanjun Guo 51046da2ec56SKees Cook its_srat_maps = kmalloc_array(count, sizeof(struct its_srat_map), 5105fdf6e7a8SHanjun Guo GFP_KERNEL); 5106fdf6e7a8SHanjun Guo if (!its_srat_maps) { 5107fdf6e7a8SHanjun Guo pr_warn("SRAT: Failed to allocate memory for its_srat_maps!\n"); 5108fdf6e7a8SHanjun Guo return; 5109fdf6e7a8SHanjun Guo } 5110fdf6e7a8SHanjun Guo 5111dbd2b826SGanapatrao Kulkarni acpi_table_parse_entries(ACPI_SIG_SRAT, 5112dbd2b826SGanapatrao Kulkarni sizeof(struct acpi_table_srat), 5113dbd2b826SGanapatrao Kulkarni ACPI_SRAT_TYPE_GIC_ITS_AFFINITY, 5114dbd2b826SGanapatrao Kulkarni gic_acpi_parse_srat_its, 0); 5115dbd2b826SGanapatrao Kulkarni } 5116fdf6e7a8SHanjun Guo 5117fdf6e7a8SHanjun Guo /* free the its_srat_maps after ITS probing */ 5118fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) 5119fdf6e7a8SHanjun Guo { 5120fdf6e7a8SHanjun Guo kfree(its_srat_maps); 5121fdf6e7a8SHanjun Guo } 5122dbd2b826SGanapatrao Kulkarni #else 5123dbd2b826SGanapatrao Kulkarni static void __init acpi_table_parse_srat_its(void) { } 5124dbd2b826SGanapatrao Kulkarni static int __init acpi_get_its_numa_node(u32 its_id) { return NUMA_NO_NODE; } 5125fdf6e7a8SHanjun Guo static void __init acpi_its_srat_maps_free(void) { } 5126dbd2b826SGanapatrao Kulkarni #endif 5127dbd2b826SGanapatrao Kulkarni 512860574d1eSKeith Busch static int __init gic_acpi_parse_madt_its(union acpi_subtable_headers *header, 51293f010cf1STomasz Nowicki const unsigned long end) 51303f010cf1STomasz Nowicki { 51313f010cf1STomasz Nowicki struct acpi_madt_generic_translator *its_entry; 51323f010cf1STomasz Nowicki struct fwnode_handle *dom_handle; 51333f010cf1STomasz Nowicki struct resource res; 51343f010cf1STomasz Nowicki int err; 51353f010cf1STomasz Nowicki 51363f010cf1STomasz Nowicki its_entry = (struct acpi_madt_generic_translator *)header; 51373f010cf1STomasz Nowicki memset(&res, 0, sizeof(res)); 51383f010cf1STomasz Nowicki res.start = its_entry->base_address; 51393f010cf1STomasz Nowicki res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1; 51403f010cf1STomasz Nowicki res.flags = IORESOURCE_MEM; 51413f010cf1STomasz Nowicki 51425778cc77SMarc Zyngier dom_handle = irq_domain_alloc_fwnode(&res.start); 51433f010cf1STomasz Nowicki if (!dom_handle) { 51443f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", 51453f010cf1STomasz Nowicki &res.start); 51463f010cf1STomasz Nowicki return -ENOMEM; 51473f010cf1STomasz Nowicki } 51483f010cf1STomasz Nowicki 51498b4282e6SShameer Kolothum err = iort_register_domain_token(its_entry->translation_id, res.start, 51508b4282e6SShameer Kolothum dom_handle); 51513f010cf1STomasz Nowicki if (err) { 51523f010cf1STomasz Nowicki pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", 51533f010cf1STomasz Nowicki &res.start, its_entry->translation_id); 51543f010cf1STomasz Nowicki goto dom_err; 51553f010cf1STomasz Nowicki } 51563f010cf1STomasz Nowicki 5157dbd2b826SGanapatrao Kulkarni err = its_probe_one(&res, dom_handle, 5158dbd2b826SGanapatrao Kulkarni acpi_get_its_numa_node(its_entry->translation_id)); 51593f010cf1STomasz Nowicki if (!err) 51603f010cf1STomasz Nowicki return 0; 51613f010cf1STomasz Nowicki 51623f010cf1STomasz Nowicki iort_deregister_domain_token(its_entry->translation_id); 51633f010cf1STomasz Nowicki dom_err: 51643f010cf1STomasz Nowicki irq_domain_free_fwnode(dom_handle); 51653f010cf1STomasz Nowicki return err; 51663f010cf1STomasz Nowicki } 51673f010cf1STomasz Nowicki 51683f010cf1STomasz Nowicki static void __init its_acpi_probe(void) 51693f010cf1STomasz Nowicki { 5170dbd2b826SGanapatrao Kulkarni acpi_table_parse_srat_its(); 51713f010cf1STomasz Nowicki acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR, 51723f010cf1STomasz Nowicki gic_acpi_parse_madt_its, 0); 5173fdf6e7a8SHanjun Guo acpi_its_srat_maps_free(); 51743f010cf1STomasz Nowicki } 51753f010cf1STomasz Nowicki #else 51763f010cf1STomasz Nowicki static void __init its_acpi_probe(void) { } 51773f010cf1STomasz Nowicki #endif 51783f010cf1STomasz Nowicki 5179db40f0a7STomasz Nowicki int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, 5180db40f0a7STomasz Nowicki struct irq_domain *parent_domain) 5181db40f0a7STomasz Nowicki { 5182db40f0a7STomasz Nowicki struct device_node *of_node; 51838fff27aeSMarc Zyngier struct its_node *its; 51848fff27aeSMarc Zyngier bool has_v4 = false; 51853c40706dSMarc Zyngier bool has_v4_1 = false; 51868fff27aeSMarc Zyngier int err; 5187db40f0a7STomasz Nowicki 51885e516846SMarc Zyngier gic_rdists = rdists; 51895e516846SMarc Zyngier 5190db40f0a7STomasz Nowicki its_parent = parent_domain; 5191db40f0a7STomasz Nowicki of_node = to_of_node(handle); 5192db40f0a7STomasz Nowicki if (of_node) 5193db40f0a7STomasz Nowicki its_of_probe(of_node); 5194db40f0a7STomasz Nowicki else 51953f010cf1STomasz Nowicki its_acpi_probe(); 5196db40f0a7STomasz Nowicki 51974c21f3c2SMarc Zyngier if (list_empty(&its_nodes)) { 51984c21f3c2SMarc Zyngier pr_warn("ITS: No ITS available, not enabling LPIs\n"); 51994c21f3c2SMarc Zyngier return -ENXIO; 52004c21f3c2SMarc Zyngier } 52014c21f3c2SMarc Zyngier 520211e37d35SMarc Zyngier err = allocate_lpi_tables(); 52038fff27aeSMarc Zyngier if (err) 52048fff27aeSMarc Zyngier return err; 52058fff27aeSMarc Zyngier 52063c40706dSMarc Zyngier list_for_each_entry(its, &its_nodes, entry) { 52070dd57fedSMarc Zyngier has_v4 |= is_v4(its); 52083c40706dSMarc Zyngier has_v4_1 |= is_v4_1(its); 52093c40706dSMarc Zyngier } 52103c40706dSMarc Zyngier 52113c40706dSMarc Zyngier /* Don't bother with inconsistent systems */ 52123c40706dSMarc Zyngier if (WARN_ON(!has_v4_1 && rdists->has_rvpeid)) 52133c40706dSMarc Zyngier rdists->has_rvpeid = false; 52148fff27aeSMarc Zyngier 52158fff27aeSMarc Zyngier if (has_v4 & rdists->has_vlpis) { 5216166cba71SMarc Zyngier const struct irq_domain_ops *sgi_ops; 5217166cba71SMarc Zyngier 5218166cba71SMarc Zyngier if (has_v4_1) 5219166cba71SMarc Zyngier sgi_ops = &its_sgi_domain_ops; 5220166cba71SMarc Zyngier else 5221166cba71SMarc Zyngier sgi_ops = NULL; 5222166cba71SMarc Zyngier 52233d63cb53SMarc Zyngier if (its_init_vpe_domain() || 5224166cba71SMarc Zyngier its_init_v4(parent_domain, &its_vpe_domain_ops, sgi_ops)) { 52258fff27aeSMarc Zyngier rdists->has_vlpis = false; 52268fff27aeSMarc Zyngier pr_err("ITS: Disabling GICv4 support\n"); 52278fff27aeSMarc Zyngier } 52288fff27aeSMarc Zyngier } 52298fff27aeSMarc Zyngier 5230dba0bc7bSDerek Basehore register_syscore_ops(&its_syscore_ops); 5231dba0bc7bSDerek Basehore 52328fff27aeSMarc Zyngier return 0; 52334c21f3c2SMarc Zyngier } 5234