12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 27e4ac676SOleksij Rempel /* 37e4ac676SOleksij Rempel * Copyright (C) 2014 Oleksij Rempel <linux@rempel-privat.de> 47e4ac676SOleksij Rempel */ 57e4ac676SOleksij Rempel 67e4ac676SOleksij Rempel #ifndef _ALPHASCALE_ASM9260_ICOLL_H 77e4ac676SOleksij Rempel #define _ALPHASCALE_ASM9260_ICOLL_H 87e4ac676SOleksij Rempel 97e4ac676SOleksij Rempel #define ASM9260_NUM_IRQS 64 107e4ac676SOleksij Rempel /* 117e4ac676SOleksij Rempel * this device provide 4 offsets for each register: 127e4ac676SOleksij Rempel * 0x0 - plain read write mode 137e4ac676SOleksij Rempel * 0x4 - set mode, OR logic. 147e4ac676SOleksij Rempel * 0x8 - clr mode, XOR logic. 157e4ac676SOleksij Rempel * 0xc - togle mode. 167e4ac676SOleksij Rempel */ 177e4ac676SOleksij Rempel 187e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_VECTOR 0x0000 197e4ac676SOleksij Rempel /* 207e4ac676SOleksij Rempel * bits 31:2 217e4ac676SOleksij Rempel * This register presents the vector address for the interrupt currently 227e4ac676SOleksij Rempel * active on the CPU IRQ input. Writing to this register notifies the 237e4ac676SOleksij Rempel * interrupt collector that the interrupt service routine for the current 247e4ac676SOleksij Rempel * interrupt has been entered. 257e4ac676SOleksij Rempel * The exception trap should have a LDPC instruction from this address: 267e4ac676SOleksij Rempel * LDPC ASM9260_HW_ICOLL_VECTOR_ADDR; IRQ exception at 0xffff0018 277e4ac676SOleksij Rempel */ 287e4ac676SOleksij Rempel 297e4ac676SOleksij Rempel /* 307e4ac676SOleksij Rempel * The Interrupt Collector Level Acknowledge Register is used by software to 317e4ac676SOleksij Rempel * indicate the completion of an interrupt on a specific level. 327e4ac676SOleksij Rempel * This register is written at the very end of an interrupt service routine. If 337e4ac676SOleksij Rempel * nesting is used then the CPU irq must be turned on before writing to this 347e4ac676SOleksij Rempel * register to avoid a race condition in the CPU interrupt hardware. 357e4ac676SOleksij Rempel */ 367e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_LEVELACK 0x0010 377e4ac676SOleksij Rempel #define ASM9260_BM_LEVELn(nr) BIT(nr) 387e4ac676SOleksij Rempel 397e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_CTRL 0x0020 407e4ac676SOleksij Rempel /* 417e4ac676SOleksij Rempel * ASM9260_BM_CTRL_SFTRST and ASM9260_BM_CTRL_CLKGATE are not available on 427e4ac676SOleksij Rempel * asm9260. 437e4ac676SOleksij Rempel */ 447e4ac676SOleksij Rempel #define ASM9260_BM_CTRL_SFTRST BIT(31) 457e4ac676SOleksij Rempel #define ASM9260_BM_CTRL_CLKGATE BIT(30) 467e4ac676SOleksij Rempel /* disable interrupt level nesting */ 477e4ac676SOleksij Rempel #define ASM9260_BM_CTRL_NO_NESTING BIT(19) 487e4ac676SOleksij Rempel /* 497e4ac676SOleksij Rempel * Set this bit to one enable the RISC32-style read side effect associated with 507e4ac676SOleksij Rempel * the vector address register. In this mode, interrupt in-service is signaled 517e4ac676SOleksij Rempel * by the read of the ASM9260_HW_ICOLL_VECTOR register to acquire the interrupt 527e4ac676SOleksij Rempel * vector address. Set this bit to zero for normal operation, in which the ISR 537e4ac676SOleksij Rempel * signals in-service explicitly by means of a write to the 547e4ac676SOleksij Rempel * ASM9260_HW_ICOLL_VECTOR register. 557e4ac676SOleksij Rempel * 0 - Must Write to Vector register to go in-service. 567e4ac676SOleksij Rempel * 1 - Go in-service as a read side effect 577e4ac676SOleksij Rempel */ 587e4ac676SOleksij Rempel #define ASM9260_BM_CTRL_ARM_RSE_MODE BIT(18) 597e4ac676SOleksij Rempel #define ASM9260_BM_CTRL_IRQ_ENABLE BIT(16) 607e4ac676SOleksij Rempel 617e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_STAT_OFFSET 0x0030 627e4ac676SOleksij Rempel /* 637e4ac676SOleksij Rempel * bits 5:0 647e4ac676SOleksij Rempel * Vector number of current interrupt. Multiply by 4 and add to vector base 657e4ac676SOleksij Rempel * address to obtain the value in ASM9260_HW_ICOLL_VECTOR. 667e4ac676SOleksij Rempel */ 677e4ac676SOleksij Rempel 687e4ac676SOleksij Rempel /* 697e4ac676SOleksij Rempel * RAW0 and RAW1 provides a read-only view of the raw interrupt request lines 707e4ac676SOleksij Rempel * coming from various parts of the chip. Its purpose is to improve diagnostic 717e4ac676SOleksij Rempel * observability. 727e4ac676SOleksij Rempel */ 737e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_RAW0 0x0040 747e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_RAW1 0x0050 757e4ac676SOleksij Rempel 767e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_INTERRUPT0 0x0060 777e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_INTERRUPTn(n) (0x0060 + ((n) >> 2) * 0x10) 787e4ac676SOleksij Rempel /* 797e4ac676SOleksij Rempel * WARNING: Modifying the priority of an enabled interrupt may result in 807e4ac676SOleksij Rempel * undefined behavior. 817e4ac676SOleksij Rempel */ 827e4ac676SOleksij Rempel #define ASM9260_BM_INT_PRIORITY_MASK 0x3 837e4ac676SOleksij Rempel #define ASM9260_BM_INT_ENABLE BIT(2) 847e4ac676SOleksij Rempel #define ASM9260_BM_INT_SOFTIRQ BIT(3) 857e4ac676SOleksij Rempel 867e4ac676SOleksij Rempel #define ASM9260_BM_ICOLL_INTERRUPTn_SHIFT(n) (((n) & 0x3) << 3) 877e4ac676SOleksij Rempel #define ASM9260_BM_ICOLL_INTERRUPTn_ENABLE(n) (1 << (2 + \ 887e4ac676SOleksij Rempel ASM9260_BM_ICOLL_INTERRUPTn_SHIFT(n))) 897e4ac676SOleksij Rempel 907e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_VBASE 0x0160 917e4ac676SOleksij Rempel /* 927e4ac676SOleksij Rempel * bits 31:2 937e4ac676SOleksij Rempel * This bitfield holds the upper 30 bits of the base address of the vector 947e4ac676SOleksij Rempel * table. 957e4ac676SOleksij Rempel */ 967e4ac676SOleksij Rempel 977e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_CLEAR0 0x01d0 987e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_CLEAR1 0x01e0 997e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_CLEARn(n) (((n >> 5) * 0x10) \ 1007e4ac676SOleksij Rempel + SET_REG) 1017e4ac676SOleksij Rempel #define ASM9260_BM_CLEAR_BIT(n) BIT(n & 0x1f) 1027e4ac676SOleksij Rempel 1037e4ac676SOleksij Rempel /* Scratchpad */ 1047e4ac676SOleksij Rempel #define ASM9260_HW_ICOLL_UNDEF_VECTOR 0x01f0 1057e4ac676SOleksij Rempel #endif 106