1config IRQCHIP 2 def_bool y 3 depends on OF_IRQ 4 5config ARM_GIC 6 bool 7 select IRQ_DOMAIN 8 select IRQ_DOMAIN_HIERARCHY 9 select MULTI_IRQ_HANDLER 10 select GENERIC_IRQ_EFFECTIVE_AFF_MASK 11 12config ARM_GIC_PM 13 bool 14 depends on PM 15 select ARM_GIC 16 select PM_CLK 17 18config ARM_GIC_MAX_NR 19 int 20 default 2 if ARCH_REALVIEW 21 default 1 22 23config ARM_GIC_V2M 24 bool 25 depends on PCI 26 select ARM_GIC 27 select PCI_MSI 28 29config GIC_NON_BANKED 30 bool 31 32config ARM_GIC_V3 33 bool 34 select IRQ_DOMAIN 35 select MULTI_IRQ_HANDLER 36 select IRQ_DOMAIN_HIERARCHY 37 select PARTITION_PERCPU 38 select GENERIC_IRQ_EFFECTIVE_AFF_MASK 39 40config ARM_GIC_V3_ITS 41 bool 42 depends on PCI 43 depends on PCI_MSI 44 45config ARM_NVIC 46 bool 47 select IRQ_DOMAIN 48 select IRQ_DOMAIN_HIERARCHY 49 select GENERIC_IRQ_CHIP 50 51config ARM_VIC 52 bool 53 select IRQ_DOMAIN 54 select MULTI_IRQ_HANDLER 55 56config ARM_VIC_NR 57 int 58 default 4 if ARCH_S5PV210 59 default 2 60 depends on ARM_VIC 61 help 62 The maximum number of VICs available in the system, for 63 power management. 64 65config ARMADA_370_XP_IRQ 66 bool 67 select GENERIC_IRQ_CHIP 68 select PCI_MSI if PCI 69 select GENERIC_IRQ_EFFECTIVE_AFF_MASK 70 71config ALPINE_MSI 72 bool 73 depends on PCI 74 select PCI_MSI 75 select GENERIC_IRQ_CHIP 76 77config ATMEL_AIC_IRQ 78 bool 79 select GENERIC_IRQ_CHIP 80 select IRQ_DOMAIN 81 select MULTI_IRQ_HANDLER 82 select SPARSE_IRQ 83 84config ATMEL_AIC5_IRQ 85 bool 86 select GENERIC_IRQ_CHIP 87 select IRQ_DOMAIN 88 select MULTI_IRQ_HANDLER 89 select SPARSE_IRQ 90 91config I8259 92 bool 93 select IRQ_DOMAIN 94 95config BCM6345_L1_IRQ 96 bool 97 select GENERIC_IRQ_CHIP 98 select IRQ_DOMAIN 99 select GENERIC_IRQ_EFFECTIVE_AFF_MASK 100 101config BCM7038_L1_IRQ 102 bool 103 select GENERIC_IRQ_CHIP 104 select IRQ_DOMAIN 105 select GENERIC_IRQ_EFFECTIVE_AFF_MASK 106 107config BCM7120_L2_IRQ 108 bool 109 select GENERIC_IRQ_CHIP 110 select IRQ_DOMAIN 111 112config BRCMSTB_L2_IRQ 113 bool 114 select GENERIC_IRQ_CHIP 115 select IRQ_DOMAIN 116 117config DW_APB_ICTL 118 bool 119 select GENERIC_IRQ_CHIP 120 select IRQ_DOMAIN 121 122config FARADAY_FTINTC010 123 bool 124 select IRQ_DOMAIN 125 select MULTI_IRQ_HANDLER 126 select SPARSE_IRQ 127 128config HISILICON_IRQ_MBIGEN 129 bool 130 select ARM_GIC_V3 131 select ARM_GIC_V3_ITS 132 133config IMGPDC_IRQ 134 bool 135 select GENERIC_IRQ_CHIP 136 select IRQ_DOMAIN 137 138config IRQ_MIPS_CPU 139 bool 140 select GENERIC_IRQ_CHIP 141 select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING 142 select IRQ_DOMAIN 143 select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI 144 select GENERIC_IRQ_EFFECTIVE_AFF_MASK 145 146config CLPS711X_IRQCHIP 147 bool 148 depends on ARCH_CLPS711X 149 select IRQ_DOMAIN 150 select MULTI_IRQ_HANDLER 151 select SPARSE_IRQ 152 default y 153 154config OR1K_PIC 155 bool 156 select IRQ_DOMAIN 157 158config OMAP_IRQCHIP 159 bool 160 select GENERIC_IRQ_CHIP 161 select IRQ_DOMAIN 162 163config ORION_IRQCHIP 164 bool 165 select IRQ_DOMAIN 166 select MULTI_IRQ_HANDLER 167 168config PIC32_EVIC 169 bool 170 select GENERIC_IRQ_CHIP 171 select IRQ_DOMAIN 172 173config JCORE_AIC 174 bool "J-Core integrated AIC" if COMPILE_TEST 175 depends on OF 176 select IRQ_DOMAIN 177 help 178 Support for the J-Core integrated AIC. 179 180config RENESAS_INTC_IRQPIN 181 bool 182 select IRQ_DOMAIN 183 184config RENESAS_IRQC 185 bool 186 select GENERIC_IRQ_CHIP 187 select IRQ_DOMAIN 188 189config ST_IRQCHIP 190 bool 191 select REGMAP 192 select MFD_SYSCON 193 help 194 Enables SysCfg Controlled IRQs on STi based platforms. 195 196config TANGO_IRQ 197 bool 198 select IRQ_DOMAIN 199 select GENERIC_IRQ_CHIP 200 201config TB10X_IRQC 202 bool 203 select IRQ_DOMAIN 204 select GENERIC_IRQ_CHIP 205 206config TS4800_IRQ 207 tristate "TS-4800 IRQ controller" 208 select IRQ_DOMAIN 209 depends on HAS_IOMEM 210 depends on SOC_IMX51 || COMPILE_TEST 211 help 212 Support for the TS-4800 FPGA IRQ controller 213 214config VERSATILE_FPGA_IRQ 215 bool 216 select IRQ_DOMAIN 217 218config VERSATILE_FPGA_IRQ_NR 219 int 220 default 4 221 depends on VERSATILE_FPGA_IRQ 222 223config XTENSA_MX 224 bool 225 select IRQ_DOMAIN 226 select GENERIC_IRQ_EFFECTIVE_AFF_MASK 227 228config XILINX_INTC 229 bool 230 select IRQ_DOMAIN 231 232config IRQ_CROSSBAR 233 bool 234 help 235 Support for a CROSSBAR ip that precedes the main interrupt controller. 236 The primary irqchip invokes the crossbar's callback which inturn allocates 237 a free irq and configures the IP. Thus the peripheral interrupts are 238 routed to one of the free irqchip interrupt lines. 239 240config KEYSTONE_IRQ 241 tristate "Keystone 2 IRQ controller IP" 242 depends on ARCH_KEYSTONE 243 help 244 Support for Texas Instruments Keystone 2 IRQ controller IP which 245 is part of the Keystone 2 IPC mechanism 246 247config MIPS_GIC 248 bool 249 select GENERIC_IRQ_IPI 250 select IRQ_DOMAIN_HIERARCHY 251 select MIPS_CM 252 253config INGENIC_IRQ 254 bool 255 depends on MACH_INGENIC 256 default y 257 258config RENESAS_H8300H_INTC 259 bool 260 select IRQ_DOMAIN 261 262config RENESAS_H8S_INTC 263 bool 264 select IRQ_DOMAIN 265 266config IMX_GPCV2 267 bool 268 select IRQ_DOMAIN 269 help 270 Enables the wakeup IRQs for IMX platforms with GPCv2 block 271 272config IRQ_MXS 273 def_bool y if MACH_ASM9260 || ARCH_MXS 274 select IRQ_DOMAIN 275 select STMP_DEVICE 276 277config MVEBU_GICP 278 bool 279 280config MVEBU_ICU 281 bool 282 283config MVEBU_ODMI 284 bool 285 select GENERIC_MSI_IRQ_DOMAIN 286 287config MVEBU_PIC 288 bool 289 290config LS_SCFG_MSI 291 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 292 depends on PCI && PCI_MSI 293 294config PARTITION_PERCPU 295 bool 296 297config EZNPS_GIC 298 bool "NPS400 Global Interrupt Manager (GIM)" 299 depends on ARC || (COMPILE_TEST && !64BIT) 300 select IRQ_DOMAIN 301 help 302 Support the EZchip NPS400 global interrupt controller 303 304config STM32_EXTI 305 bool 306 select IRQ_DOMAIN 307 308config QCOM_IRQ_COMBINER 309 bool "QCOM IRQ combiner support" 310 depends on ARCH_QCOM && ACPI 311 select IRQ_DOMAIN 312 select IRQ_DOMAIN_HIERARCHY 313 help 314 Say yes here to add support for the IRQ combiner devices embedded 315 in Qualcomm Technologies chips. 316 317config IRQ_UNIPHIER_AIDET 318 bool "UniPhier AIDET support" if COMPILE_TEST 319 depends on ARCH_UNIPHIER || COMPILE_TEST 320 default ARCH_UNIPHIER 321 select IRQ_DOMAIN_HIERARCHY 322 help 323 Support for the UniPhier AIDET (ARM Interrupt Detector). 324